LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/X86 - X86GenAsmMatcher.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1233 1510 81.7 %
Date: 2018-06-17 00:07:59 Functions: 10 10 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Assembly Matcher Source Fragment                                           *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : 
      10             : #ifdef GET_ASSEMBLER_HEADER
      11             : #undef GET_ASSEMBLER_HEADER
      12             :   // This should be included into the middle of the declaration of
      13             :   // your subclasses implementation of MCTargetAsmParser.
      14             :   uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
      15             :   void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
      16             :                        const OperandVector &Operands);
      17             :   void convertToMapAndConstraints(unsigned Kind,
      18             :                            const OperandVector &Operands) override;
      19             :   unsigned MatchInstructionImpl(const OperandVector &Operands,
      20             :                                 MCInst &Inst,
      21             :                                 uint64_t &ErrorInfo,
      22             :                                 bool matchingInlineAsm,
      23             :                                 unsigned VariantID = 0);
      24             : #endif // GET_ASSEMBLER_HEADER_INFO
      25             : 
      26             : 
      27             : #ifdef GET_OPERAND_DIAGNOSTIC_TYPES
      28             : #undef GET_OPERAND_DIAGNOSTIC_TYPES
      29             : 
      30             : #endif // GET_OPERAND_DIAGNOSTIC_TYPES
      31             : 
      32             : 
      33             : #ifdef GET_REGISTER_MATCHER
      34             : #undef GET_REGISTER_MATCHER
      35             : 
      36             : // Flags for subtarget features that participate in instruction matching.
      37             : enum SubtargetFeatureFlag : uint8_t {
      38             :   Feature_Not64BitMode = (1ULL << 4),
      39             :   Feature_In64BitMode = (1ULL << 2),
      40             :   Feature_In16BitMode = (1ULL << 0),
      41             :   Feature_Not16BitMode = (1ULL << 3),
      42             :   Feature_In32BitMode = (1ULL << 1),
      43             :   Feature_None = 0
      44             : };
      45             : 
      46      305111 : static unsigned MatchRegisterName(StringRef Name) {
      47      305111 :   switch (Name.size()) {
      48             :   default: break;
      49       33980 :   case 2:        // 33 strings to match.
      50       33980 :     switch (Name[0]) {
      51             :     default: break;
      52         907 :     case 'a':    // 3 strings to match.
      53         907 :       switch (Name[1]) {
      54             :       default: break;
      55             :       case 'h':  // 1 string to match.
      56             :         return 1;        // "ah"
      57             :       case 'l':  // 1 string to match.
      58             :         return 2;        // "al"
      59             :       case 'x':  // 1 string to match.
      60             :         return 3;        // "ax"
      61             :       }
      62             :       break;
      63         194 :     case 'b':    // 4 strings to match.
      64         194 :       switch (Name[1]) {
      65             :       default: break;
      66             :       case 'h':  // 1 string to match.
      67             :         return 4;        // "bh"
      68             :       case 'l':  // 1 string to match.
      69             :         return 5;        // "bl"
      70             :       case 'p':  // 1 string to match.
      71             :         return 6;        // "bp"
      72             :       case 'x':  // 1 string to match.
      73             :         return 8;        // "bx"
      74             :       }
      75             :       break;
      76        1761 :     case 'c':    // 4 strings to match.
      77        1761 :       switch (Name[1]) {
      78             :       default: break;
      79             :       case 'h':  // 1 string to match.
      80             :         return 9;        // "ch"
      81             :       case 'l':  // 1 string to match.
      82             :         return 10;       // "cl"
      83             :       case 's':  // 1 string to match.
      84             :         return 11;       // "cs"
      85             :       case 'x':  // 1 string to match.
      86             :         return 12;       // "cx"
      87             :       }
      88             :       break;
      89        3344 :     case 'd':    // 5 strings to match.
      90        3344 :       switch (Name[1]) {
      91             :       default: break;
      92             :       case 'h':  // 1 string to match.
      93             :         return 14;       // "dh"
      94             :       case 'i':  // 1 string to match.
      95             :         return 15;       // "di"
      96             :       case 'l':  // 1 string to match.
      97             :         return 17;       // "dl"
      98             :       case 's':  // 1 string to match.
      99             :         return 18;       // "ds"
     100             :       case 'x':  // 1 string to match.
     101             :         return 19;       // "dx"
     102             :       }
     103             :       break;
     104         360 :     case 'e':    // 1 string to match.
     105         360 :       if (Name[1] != 's')
     106             :         break;
     107             :       return 29;         // "es"
     108          92 :     case 'f':    // 1 string to match.
     109          92 :       if (Name[1] != 's')
     110             :         break;
     111             :       return 33;         // "fs"
     112         180 :     case 'g':    // 1 string to match.
     113         180 :       if (Name[1] != 's')
     114             :         break;
     115             :       return 34;         // "gs"
     116           0 :     case 'i':    // 1 string to match.
     117           0 :       if (Name[1] != 'p')
     118             :         break;
     119             :       return 44;         // "ip"
     120       20499 :     case 'k':    // 8 strings to match.
     121       20499 :       switch (Name[1]) {
     122             :       default: break;
     123             :       case '0':  // 1 string to match.
     124             :         return 105;      // "k0"
     125             :       case '1':  // 1 string to match.
     126             :         return 106;      // "k1"
     127             :       case '2':  // 1 string to match.
     128             :         return 107;      // "k2"
     129             :       case '3':  // 1 string to match.
     130             :         return 108;      // "k3"
     131             :       case '4':  // 1 string to match.
     132             :         return 109;      // "k4"
     133             :       case '5':  // 1 string to match.
     134             :         return 110;      // "k5"
     135             :       case '6':  // 1 string to match.
     136             :         return 111;      // "k6"
     137             :       case '7':  // 1 string to match.
     138             :         return 112;      // "k7"
     139             :       }
     140             :       break;
     141         606 :     case 'r':    // 2 strings to match.
     142         606 :       switch (Name[1]) {
     143             :       default: break;
     144             :       case '8':  // 1 string to match.
     145             :         return 121;      // "r8"
     146         258 :       case '9':  // 1 string to match.
     147         258 :         return 122;      // "r9"
     148             :       }
     149             :       break;
     150        4752 :     case 's':    // 3 strings to match.
     151        4752 :       switch (Name[1]) {
     152             :       default: break;
     153             :       case 'i':  // 1 string to match.
     154             :         return 55;       // "si"
     155             :       case 'p':  // 1 string to match.
     156             :         return 57;       // "sp"
     157             :       case 's':  // 1 string to match.
     158             :         return 59;       // "ss"
     159             :       }
     160             :       break;
     161             :     }
     162             :     break;
     163      117103 :   case 3:        // 82 strings to match.
     164      117103 :     switch (Name[0]) {
     165             :     default: break;
     166             :     case 'b':    // 1 string to match.
     167           6 :       if (memcmp(Name.data()+1, "pl", 2) != 0)
     168             :         break;
     169             :       return 7;  // "bpl"
     170          21 :     case 'c':    // 10 strings to match.
     171          21 :       if (Name[1] != 'r')
     172             :         break;
     173          21 :       switch (Name[2]) {
     174             :       default: break;
     175             :       case '0':  // 1 string to match.
     176             :         return 65;       // "cr0"
     177             :       case '1':  // 1 string to match.
     178             :         return 66;       // "cr1"
     179             :       case '2':  // 1 string to match.
     180             :         return 67;       // "cr2"
     181             :       case '3':  // 1 string to match.
     182             :         return 68;       // "cr3"
     183             :       case '4':  // 1 string to match.
     184             :         return 69;       // "cr4"
     185             :       case '5':  // 1 string to match.
     186             :         return 70;       // "cr5"
     187             :       case '6':  // 1 string to match.
     188             :         return 71;       // "cr6"
     189             :       case '7':  // 1 string to match.
     190             :         return 72;       // "cr7"
     191             :       case '8':  // 1 string to match.
     192             :         return 73;       // "cr8"
     193             :       case '9':  // 1 string to match.
     194             :         return 74;       // "cr9"
     195             :       }
     196             :       break;
     197        1499 :     case 'd':    // 11 strings to match.
     198        1499 :       switch (Name[1]) {
     199             :       default: break;
     200        1470 :       case 'i':  // 1 string to match.
     201        1470 :         if (Name[2] != 'l')
     202             :           break;
     203             :         return 16;       // "dil"
     204          27 :       case 'r':  // 10 strings to match.
     205          27 :         switch (Name[2]) {
     206             :         default: break;
     207             :         case '0':        // 1 string to match.
     208             :           return 81;     // "dr0"
     209             :         case '1':        // 1 string to match.
     210             :           return 82;     // "dr1"
     211             :         case '2':        // 1 string to match.
     212             :           return 83;     // "dr2"
     213             :         case '3':        // 1 string to match.
     214             :           return 84;     // "dr3"
     215             :         case '4':        // 1 string to match.
     216             :           return 85;     // "dr4"
     217             :         case '5':        // 1 string to match.
     218             :           return 86;     // "dr5"
     219             :         case '6':        // 1 string to match.
     220             :           return 87;     // "dr6"
     221             :         case '7':        // 1 string to match.
     222             :           return 88;     // "dr7"
     223             :         case '8':        // 1 string to match.
     224             :           return 89;     // "dr8"
     225             :         case '9':        // 1 string to match.
     226             :           return 90;     // "dr9"
     227             :         }
     228             :         break;
     229             :       }
     230             :       break;
     231       36054 :     case 'e':    // 10 strings to match.
     232       36054 :       switch (Name[1]) {
     233             :       default: break;
     234       15205 :       case 'a':  // 1 string to match.
     235       15205 :         if (Name[2] != 'x')
     236             :           break;
     237             :         return 20;       // "eax"
     238        1925 :       case 'b':  // 2 strings to match.
     239        1925 :         switch (Name[2]) {
     240             :         default: break;
     241             :         case 'p':        // 1 string to match.
     242             :           return 21;     // "ebp"
     243        1578 :         case 'x':        // 1 string to match.
     244        1578 :           return 22;     // "ebx"
     245             :         }
     246             :         break;
     247        2721 :       case 'c':  // 1 string to match.
     248        2721 :         if (Name[2] != 'x')
     249             :           break;
     250             :         return 23;       // "ecx"
     251       14643 :       case 'd':  // 2 strings to match.
     252       14643 :         switch (Name[2]) {
     253             :         default: break;
     254             :         case 'i':        // 1 string to match.
     255             :           return 24;     // "edi"
     256       11533 :         case 'x':        // 1 string to match.
     257       11533 :           return 25;     // "edx"
     258             :         }
     259             :         break;
     260          18 :       case 'i':  // 2 strings to match.
     261          18 :         switch (Name[2]) {
     262             :         default: break;
     263             :         case 'p':        // 1 string to match.
     264             :           return 27;     // "eip"
     265          11 :         case 'z':        // 1 string to match.
     266          11 :           return 28;     // "eiz"
     267             :         }
     268             :         break;
     269        1542 :       case 's':  // 2 strings to match.
     270        1542 :         switch (Name[2]) {
     271             :         default: break;
     272             :         case 'i':        // 1 string to match.
     273             :           return 30;     // "esi"
     274         177 :         case 'p':        // 1 string to match.
     275         177 :           return 31;     // "esp"
     276             :         }
     277             :         break;
     278             :       }
     279             :       break;
     280          27 :     case 'f':    // 8 strings to match.
     281          27 :       if (Name[1] != 'p')
     282             :         break;
     283           0 :       switch (Name[2]) {
     284             :       default: break;
     285             :       case '0':  // 1 string to match.
     286             :         return 97;       // "fp0"
     287             :       case '1':  // 1 string to match.
     288             :         return 98;       // "fp1"
     289             :       case '2':  // 1 string to match.
     290             :         return 99;       // "fp2"
     291             :       case '3':  // 1 string to match.
     292             :         return 100;      // "fp3"
     293             :       case '4':  // 1 string to match.
     294             :         return 101;      // "fp4"
     295             :       case '5':  // 1 string to match.
     296             :         return 102;      // "fp5"
     297             :       case '6':  // 1 string to match.
     298             :         return 103;      // "fp6"
     299             :       case '7':  // 1 string to match.
     300             :         return 104;      // "fp7"
     301             :       }
     302             :       break;
     303           0 :     case 'h':    // 9 strings to match.
     304           0 :       switch (Name[1]) {
     305             :       default: break;
     306           0 :       case 'a':  // 1 string to match.
     307           0 :         if (Name[2] != 'x')
     308             :           break;
     309             :         return 35;       // "hax"
     310           0 :       case 'b':  // 2 strings to match.
     311           0 :         switch (Name[2]) {
     312             :         default: break;
     313             :         case 'p':        // 1 string to match.
     314             :           return 36;     // "hbp"
     315           0 :         case 'x':        // 1 string to match.
     316           0 :           return 37;     // "hbx"
     317             :         }
     318             :         break;
     319           0 :       case 'c':  // 1 string to match.
     320           0 :         if (Name[2] != 'x')
     321             :           break;
     322             :         return 38;       // "hcx"
     323           0 :       case 'd':  // 2 strings to match.
     324           0 :         switch (Name[2]) {
     325             :         default: break;
     326             :         case 'i':        // 1 string to match.
     327             :           return 39;     // "hdi"
     328           0 :         case 'x':        // 1 string to match.
     329           0 :           return 40;     // "hdx"
     330             :         }
     331             :         break;
     332           0 :       case 'i':  // 1 string to match.
     333           0 :         if (Name[2] != 'p')
     334             :           break;
     335             :         return 41;       // "hip"
     336           0 :       case 's':  // 2 strings to match.
     337           0 :         switch (Name[2]) {
     338             :         default: break;
     339             :         case 'i':        // 1 string to match.
     340             :           return 42;     // "hsi"
     341           0 :         case 'p':        // 1 string to match.
     342           0 :           return 43;     // "hsp"
     343             :         }
     344             :         break;
     345             :       }
     346             :       break;
     347        4796 :     case 'm':    // 8 strings to match.
     348        4796 :       if (Name[1] != 'm')
     349             :         break;
     350        4792 :       switch (Name[2]) {
     351             :       default: break;
     352             :       case '0':  // 1 string to match.
     353             :         return 113;      // "mm0"
     354             :       case '1':  // 1 string to match.
     355             :         return 114;      // "mm1"
     356             :       case '2':  // 1 string to match.
     357             :         return 115;      // "mm2"
     358             :       case '3':  // 1 string to match.
     359             :         return 116;      // "mm3"
     360             :       case '4':  // 1 string to match.
     361             :         return 117;      // "mm4"
     362             :       case '5':  // 1 string to match.
     363             :         return 118;      // "mm5"
     364             :       case '6':  // 1 string to match.
     365             :         return 119;      // "mm6"
     366             :       case '7':  // 1 string to match.
     367             :         return 120;      // "mm7"
     368             :       }
     369             :       break;
     370       73920 :     case 'r':    // 22 strings to match.
     371       73920 :       switch (Name[1]) {
     372             :       default: break;
     373        3880 :       case '1':  // 6 strings to match.
     374        3880 :         switch (Name[2]) {
     375             :         default: break;
     376             :         case '0':        // 1 string to match.
     377             :           return 123;    // "r10"
     378             :         case '1':        // 1 string to match.
     379             :           return 124;    // "r11"
     380             :         case '2':        // 1 string to match.
     381             :           return 125;    // "r12"
     382             :         case '3':        // 1 string to match.
     383             :           return 126;    // "r13"
     384             :         case '4':        // 1 string to match.
     385             :           return 127;    // "r14"
     386             :         case '5':        // 1 string to match.
     387             :           return 128;    // "r15"
     388             :         }
     389             :         break;
     390          16 :       case '8':  // 3 strings to match.
     391          16 :         switch (Name[2]) {
     392             :         default: break;
     393             :         case 'b':        // 1 string to match.
     394             :           return 233;    // "r8b"
     395             :         case 'd':        // 1 string to match.
     396             :           return 241;    // "r8d"
     397             :         case 'w':        // 1 string to match.
     398             :           return 249;    // "r8w"
     399             :         }
     400             :         break;
     401           1 :       case '9':  // 3 strings to match.
     402           1 :         switch (Name[2]) {
     403             :         default: break;
     404             :         case 'b':        // 1 string to match.
     405             :           return 234;    // "r9b"
     406             :         case 'd':        // 1 string to match.
     407             :           return 242;    // "r9d"
     408             :         case 'w':        // 1 string to match.
     409             :           return 250;    // "r9w"
     410             :         }
     411             :         break;
     412       23845 :       case 'a':  // 1 string to match.
     413       23845 :         if (Name[2] != 'x')
     414             :           break;
     415             :         return 45;       // "rax"
     416        1075 :       case 'b':  // 2 strings to match.
     417        1075 :         switch (Name[2]) {
     418             :         default: break;
     419             :         case 'p':        // 1 string to match.
     420             :           return 46;     // "rbp"
     421         499 :         case 'x':        // 1 string to match.
     422         499 :           return 47;     // "rbx"
     423             :         }
     424             :         break;
     425        6212 :       case 'c':  // 1 string to match.
     426        6212 :         if (Name[2] != 'x')
     427             :           break;
     428             :         return 48;       // "rcx"
     429       34466 :       case 'd':  // 2 strings to match.
     430       34466 :         switch (Name[2]) {
     431             :         default: break;
     432             :         case 'i':        // 1 string to match.
     433             :           return 49;     // "rdi"
     434       29776 :         case 'x':        // 1 string to match.
     435       29776 :           return 50;     // "rdx"
     436             :         }
     437             :         break;
     438         359 :       case 'i':  // 2 strings to match.
     439         359 :         switch (Name[2]) {
     440             :         default: break;
     441             :         case 'p':        // 1 string to match.
     442             :           return 51;     // "rip"
     443           6 :         case 'z':        // 1 string to match.
     444           6 :           return 52;     // "riz"
     445             :         }
     446             :         break;
     447        4062 :       case 's':  // 2 strings to match.
     448        4062 :         switch (Name[2]) {
     449             :         default: break;
     450             :         case 'i':        // 1 string to match.
     451             :           return 53;     // "rsi"
     452         859 :         case 'p':        // 1 string to match.
     453         859 :           return 54;     // "rsp"
     454             :         }
     455             :         break;
     456             :       }
     457             :       break;
     458         186 :     case 's':    // 3 strings to match.
     459         186 :       switch (Name[1]) {
     460             :       default: break;
     461         173 :       case 'i':  // 1 string to match.
     462         173 :         if (Name[2] != 'l')
     463             :           break;
     464             :         return 56;       // "sil"
     465           0 :       case 'p':  // 1 string to match.
     466           0 :         if (Name[2] != 'l')
     467             :           break;
     468             :         return 58;       // "spl"
     469           0 :       case 's':  // 1 string to match.
     470           0 :         if (Name[2] != 'p')
     471             :           break;
     472             :         return 60;       // "ssp"
     473             :       }
     474             :       break;
     475             :     }
     476             :     break;
     477       86331 :   case 4:        // 65 strings to match.
     478       86331 :     switch (Name[0]) {
     479             :     default: break;
     480             :     case 'b':    // 4 strings to match.
     481          26 :       if (memcmp(Name.data()+1, "nd", 2) != 0)
     482             :         break;
     483          24 :       switch (Name[3]) {
     484             :       default: break;
     485             :       case '0':  // 1 string to match.
     486             :         return 61;       // "bnd0"
     487             :       case '1':  // 1 string to match.
     488             :         return 62;       // "bnd1"
     489             :       case '2':  // 1 string to match.
     490             :         return 63;       // "bnd2"
     491             :       case '3':  // 1 string to match.
     492             :         return 64;       // "bnd3"
     493             :       }
     494             :       break;
     495             :     case 'c':    // 6 strings to match.
     496           1 :       if (memcmp(Name.data()+1, "r1", 2) != 0)
     497             :         break;
     498           1 :       switch (Name[3]) {
     499             :       default: break;
     500             :       case '0':  // 1 string to match.
     501             :         return 75;       // "cr10"
     502             :       case '1':  // 1 string to match.
     503             :         return 76;       // "cr11"
     504             :       case '2':  // 1 string to match.
     505             :         return 77;       // "cr12"
     506             :       case '3':  // 1 string to match.
     507             :         return 78;       // "cr13"
     508             :       case '4':  // 1 string to match.
     509             :         return 79;       // "cr14"
     510             :       case '5':  // 1 string to match.
     511             :         return 80;       // "cr15"
     512             :       }
     513             :       break;
     514             :     case 'd':    // 6 strings to match.
     515           3 :       if (memcmp(Name.data()+1, "r1", 2) != 0)
     516             :         break;
     517           1 :       switch (Name[3]) {
     518             :       default: break;
     519             :       case '0':  // 1 string to match.
     520             :         return 91;       // "dr10"
     521             :       case '1':  // 1 string to match.
     522             :         return 92;       // "dr11"
     523             :       case '2':  // 1 string to match.
     524             :         return 93;       // "dr12"
     525             :       case '3':  // 1 string to match.
     526             :         return 94;       // "dr13"
     527             :       case '4':  // 1 string to match.
     528             :         return 95;       // "dr14"
     529             :       case '5':  // 1 string to match.
     530             :         return 96;       // "dr15"
     531             :       }
     532             :       break;
     533             :     case 'f':    // 1 string to match.
     534           0 :       if (memcmp(Name.data()+1, "psw", 3) != 0)
     535             :         break;
     536             :       return 32;         // "fpsw"
     537        1173 :     case 'r':    // 18 strings to match.
     538        1173 :       if (Name[1] != '1')
     539             :         break;
     540        1173 :       switch (Name[2]) {
     541             :       default: break;
     542          25 :       case '0':  // 3 strings to match.
     543          25 :         switch (Name[3]) {
     544             :         default: break;
     545             :         case 'b':        // 1 string to match.
     546             :           return 235;    // "r10b"
     547             :         case 'd':        // 1 string to match.
     548             :           return 243;    // "r10d"
     549             :         case 'w':        // 1 string to match.
     550             :           return 251;    // "r10w"
     551             :         }
     552             :         break;
     553          31 :       case '1':  // 3 strings to match.
     554          31 :         switch (Name[3]) {
     555             :         default: break;
     556             :         case 'b':        // 1 string to match.
     557             :           return 236;    // "r11b"
     558             :         case 'd':        // 1 string to match.
     559             :           return 244;    // "r11d"
     560             :         case 'w':        // 1 string to match.
     561             :           return 252;    // "r11w"
     562             :         }
     563             :         break;
     564          18 :       case '2':  // 3 strings to match.
     565          18 :         switch (Name[3]) {
     566             :         default: break;
     567             :         case 'b':        // 1 string to match.
     568             :           return 237;    // "r12b"
     569             :         case 'd':        // 1 string to match.
     570             :           return 245;    // "r12d"
     571             :         case 'w':        // 1 string to match.
     572             :           return 253;    // "r12w"
     573             :         }
     574             :         break;
     575         693 :       case '3':  // 3 strings to match.
     576         693 :         switch (Name[3]) {
     577             :         default: break;
     578             :         case 'b':        // 1 string to match.
     579             :           return 238;    // "r13b"
     580             :         case 'd':        // 1 string to match.
     581             :           return 246;    // "r13d"
     582             :         case 'w':        // 1 string to match.
     583             :           return 254;    // "r13w"
     584             :         }
     585             :         break;
     586         396 :       case '4':  // 3 strings to match.
     587         396 :         switch (Name[3]) {
     588             :         default: break;
     589             :         case 'b':        // 1 string to match.
     590             :           return 239;    // "r14b"
     591             :         case 'd':        // 1 string to match.
     592             :           return 247;    // "r14d"
     593             :         case 'w':        // 1 string to match.
     594             :           return 255;    // "r14w"
     595             :         }
     596             :         break;
     597          10 :       case '5':  // 3 strings to match.
     598          10 :         switch (Name[3]) {
     599             :         default: break;
     600             :         case 'b':        // 1 string to match.
     601             :           return 240;    // "r15b"
     602             :         case 'd':        // 1 string to match.
     603             :           return 248;    // "r15d"
     604             :         case 'w':        // 1 string to match.
     605             :           return 256;    // "r15w"
     606             :         }
     607             :         break;
     608             :       }
     609             :       break;
     610             :     case 'x':    // 10 strings to match.
     611       41050 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     612             :         break;
     613       41050 :       switch (Name[3]) {
     614             :       default: break;
     615             :       case '0':  // 1 string to match.
     616             :         return 137;      // "xmm0"
     617             :       case '1':  // 1 string to match.
     618             :         return 138;      // "xmm1"
     619             :       case '2':  // 1 string to match.
     620             :         return 139;      // "xmm2"
     621             :       case '3':  // 1 string to match.
     622             :         return 140;      // "xmm3"
     623             :       case '4':  // 1 string to match.
     624             :         return 141;      // "xmm4"
     625             :       case '5':  // 1 string to match.
     626             :         return 142;      // "xmm5"
     627             :       case '6':  // 1 string to match.
     628             :         return 143;      // "xmm6"
     629             :       case '7':  // 1 string to match.
     630             :         return 144;      // "xmm7"
     631             :       case '8':  // 1 string to match.
     632             :         return 145;      // "xmm8"
     633             :       case '9':  // 1 string to match.
     634             :         return 146;      // "xmm9"
     635             :       }
     636             :       break;
     637             :     case 'y':    // 10 strings to match.
     638       21527 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     639             :         break;
     640       21527 :       switch (Name[3]) {
     641             :       default: break;
     642             :       case '0':  // 1 string to match.
     643             :         return 169;      // "ymm0"
     644             :       case '1':  // 1 string to match.
     645             :         return 170;      // "ymm1"
     646             :       case '2':  // 1 string to match.
     647             :         return 171;      // "ymm2"
     648             :       case '3':  // 1 string to match.
     649             :         return 172;      // "ymm3"
     650             :       case '4':  // 1 string to match.
     651             :         return 173;      // "ymm4"
     652             :       case '5':  // 1 string to match.
     653             :         return 174;      // "ymm5"
     654             :       case '6':  // 1 string to match.
     655             :         return 175;      // "ymm6"
     656             :       case '7':  // 1 string to match.
     657             :         return 176;      // "ymm7"
     658             :       case '8':  // 1 string to match.
     659             :         return 177;      // "ymm8"
     660             :       case '9':  // 1 string to match.
     661             :         return 178;      // "ymm9"
     662             :       }
     663             :       break;
     664             :     case 'z':    // 10 strings to match.
     665       22308 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     666             :         break;
     667       22308 :       switch (Name[3]) {
     668             :       default: break;
     669             :       case '0':  // 1 string to match.
     670             :         return 201;      // "zmm0"
     671             :       case '1':  // 1 string to match.
     672             :         return 202;      // "zmm1"
     673             :       case '2':  // 1 string to match.
     674             :         return 203;      // "zmm2"
     675             :       case '3':  // 1 string to match.
     676             :         return 204;      // "zmm3"
     677             :       case '4':  // 1 string to match.
     678             :         return 205;      // "zmm4"
     679             :       case '5':  // 1 string to match.
     680             :         return 206;      // "zmm5"
     681             :       case '6':  // 1 string to match.
     682             :         return 207;      // "zmm6"
     683             :       case '7':  // 1 string to match.
     684             :         return 208;      // "zmm7"
     685             :       case '8':  // 1 string to match.
     686             :         return 209;      // "zmm8"
     687             :       case '9':  // 1 string to match.
     688             :         return 210;      // "zmm9"
     689             :       }
     690             :       break;
     691             :     }
     692             :     break;
     693       67305 :   case 5:        // 75 strings to match.
     694       67305 :     switch (Name[0]) {
     695             :     default: break;
     696             :     case 'f':    // 1 string to match.
     697           2 :       if (memcmp(Name.data()+1, "lags", 4) != 0)
     698             :         break;
     699             :       return 26;         // "flags"
     700             :     case 's':    // 8 strings to match.
     701           0 :       if (memcmp(Name.data()+1, "t(", 2) != 0)
     702             :         break;
     703           0 :       switch (Name[3]) {
     704             :       default: break;
     705           0 :       case '0':  // 1 string to match.
     706           0 :         if (Name[4] != ')')
     707             :           break;
     708             :         return 129;      // "st(0)"
     709           0 :       case '1':  // 1 string to match.
     710           0 :         if (Name[4] != ')')
     711             :           break;
     712             :         return 130;      // "st(1)"
     713           0 :       case '2':  // 1 string to match.
     714           0 :         if (Name[4] != ')')
     715             :           break;
     716             :         return 131;      // "st(2)"
     717           0 :       case '3':  // 1 string to match.
     718           0 :         if (Name[4] != ')')
     719             :           break;
     720             :         return 132;      // "st(3)"
     721           0 :       case '4':  // 1 string to match.
     722           0 :         if (Name[4] != ')')
     723             :           break;
     724             :         return 133;      // "st(4)"
     725           0 :       case '5':  // 1 string to match.
     726           0 :         if (Name[4] != ')')
     727             :           break;
     728             :         return 134;      // "st(5)"
     729           0 :       case '6':  // 1 string to match.
     730           0 :         if (Name[4] != ')')
     731             :           break;
     732             :         return 135;      // "st(6)"
     733           0 :       case '7':  // 1 string to match.
     734           0 :         if (Name[4] != ')')
     735             :           break;
     736             :         return 136;      // "st(7)"
     737             :       }
     738             :       break;
     739             :     case 'x':    // 22 strings to match.
     740       22902 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     741             :         break;
     742       22902 :       switch (Name[3]) {
     743             :       default: break;
     744       11461 :       case '1':  // 10 strings to match.
     745       11461 :         switch (Name[4]) {
     746             :         default: break;
     747             :         case '0':        // 1 string to match.
     748             :           return 147;    // "xmm10"
     749             :         case '1':        // 1 string to match.
     750             :           return 148;    // "xmm11"
     751             :         case '2':        // 1 string to match.
     752             :           return 149;    // "xmm12"
     753             :         case '3':        // 1 string to match.
     754             :           return 150;    // "xmm13"
     755             :         case '4':        // 1 string to match.
     756             :           return 151;    // "xmm14"
     757             :         case '5':        // 1 string to match.
     758             :           return 152;    // "xmm15"
     759             :         case '6':        // 1 string to match.
     760             :           return 153;    // "xmm16"
     761             :         case '7':        // 1 string to match.
     762             :           return 154;    // "xmm17"
     763             :         case '8':        // 1 string to match.
     764             :           return 155;    // "xmm18"
     765             :         case '9':        // 1 string to match.
     766             :           return 156;    // "xmm19"
     767             :         }
     768             :         break;
     769       10570 :       case '2':  // 10 strings to match.
     770       10570 :         switch (Name[4]) {
     771             :         default: break;
     772             :         case '0':        // 1 string to match.
     773             :           return 157;    // "xmm20"
     774             :         case '1':        // 1 string to match.
     775             :           return 158;    // "xmm21"
     776             :         case '2':        // 1 string to match.
     777             :           return 159;    // "xmm22"
     778             :         case '3':        // 1 string to match.
     779             :           return 160;    // "xmm23"
     780             :         case '4':        // 1 string to match.
     781             :           return 161;    // "xmm24"
     782             :         case '5':        // 1 string to match.
     783             :           return 162;    // "xmm25"
     784             :         case '6':        // 1 string to match.
     785             :           return 163;    // "xmm26"
     786             :         case '7':        // 1 string to match.
     787             :           return 164;    // "xmm27"
     788             :         case '8':        // 1 string to match.
     789             :           return 165;    // "xmm28"
     790             :         case '9':        // 1 string to match.
     791             :           return 166;    // "xmm29"
     792             :         }
     793             :         break;
     794         871 :       case '3':  // 2 strings to match.
     795         871 :         switch (Name[4]) {
     796             :         default: break;
     797             :         case '0':        // 1 string to match.
     798             :           return 167;    // "xmm30"
     799         234 :         case '1':        // 1 string to match.
     800         234 :           return 168;    // "xmm31"
     801             :         }
     802             :         break;
     803             :       }
     804             :       break;
     805             :     case 'y':    // 22 strings to match.
     806       11578 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     807             :         break;
     808       11578 :       switch (Name[3]) {
     809             :       default: break;
     810        2810 :       case '1':  // 10 strings to match.
     811        2810 :         switch (Name[4]) {
     812             :         default: break;
     813             :         case '0':        // 1 string to match.
     814             :           return 179;    // "ymm10"
     815             :         case '1':        // 1 string to match.
     816             :           return 180;    // "ymm11"
     817             :         case '2':        // 1 string to match.
     818             :           return 181;    // "ymm12"
     819             :         case '3':        // 1 string to match.
     820             :           return 182;    // "ymm13"
     821             :         case '4':        // 1 string to match.
     822             :           return 183;    // "ymm14"
     823             :         case '5':        // 1 string to match.
     824             :           return 184;    // "ymm15"
     825             :         case '6':        // 1 string to match.
     826             :           return 185;    // "ymm16"
     827             :         case '7':        // 1 string to match.
     828             :           return 186;    // "ymm17"
     829             :         case '8':        // 1 string to match.
     830             :           return 187;    // "ymm18"
     831             :         case '9':        // 1 string to match.
     832             :           return 188;    // "ymm19"
     833             :         }
     834             :         break;
     835        8182 :       case '2':  // 10 strings to match.
     836        8182 :         switch (Name[4]) {
     837             :         default: break;
     838             :         case '0':        // 1 string to match.
     839             :           return 189;    // "ymm20"
     840             :         case '1':        // 1 string to match.
     841             :           return 190;    // "ymm21"
     842             :         case '2':        // 1 string to match.
     843             :           return 191;    // "ymm22"
     844             :         case '3':        // 1 string to match.
     845             :           return 192;    // "ymm23"
     846             :         case '4':        // 1 string to match.
     847             :           return 193;    // "ymm24"
     848             :         case '5':        // 1 string to match.
     849             :           return 194;    // "ymm25"
     850             :         case '6':        // 1 string to match.
     851             :           return 195;    // "ymm26"
     852             :         case '7':        // 1 string to match.
     853             :           return 196;    // "ymm27"
     854             :         case '8':        // 1 string to match.
     855             :           return 197;    // "ymm28"
     856             :         case '9':        // 1 string to match.
     857             :           return 198;    // "ymm29"
     858             :         }
     859             :         break;
     860         586 :       case '3':  // 2 strings to match.
     861         586 :         switch (Name[4]) {
     862             :         default: break;
     863             :         case '0':        // 1 string to match.
     864             :           return 199;    // "ymm30"
     865         138 :         case '1':        // 1 string to match.
     866         138 :           return 200;    // "ymm31"
     867             :         }
     868             :         break;
     869             :       }
     870             :       break;
     871             :     case 'z':    // 22 strings to match.
     872       32764 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     873             :         break;
     874       32764 :       switch (Name[3]) {
     875             :       default: break;
     876       22393 :       case '1':  // 10 strings to match.
     877       22393 :         switch (Name[4]) {
     878             :         default: break;
     879             :         case '0':        // 1 string to match.
     880             :           return 211;    // "zmm10"
     881             :         case '1':        // 1 string to match.
     882             :           return 212;    // "zmm11"
     883             :         case '2':        // 1 string to match.
     884             :           return 213;    // "zmm12"
     885             :         case '3':        // 1 string to match.
     886             :           return 214;    // "zmm13"
     887             :         case '4':        // 1 string to match.
     888             :           return 215;    // "zmm14"
     889             :         case '5':        // 1 string to match.
     890             :           return 216;    // "zmm15"
     891             :         case '6':        // 1 string to match.
     892             :           return 217;    // "zmm16"
     893             :         case '7':        // 1 string to match.
     894             :           return 218;    // "zmm17"
     895             :         case '8':        // 1 string to match.
     896             :           return 219;    // "zmm18"
     897             :         case '9':        // 1 string to match.
     898             :           return 220;    // "zmm19"
     899             :         }
     900             :         break;
     901        9914 :       case '2':  // 10 strings to match.
     902        9914 :         switch (Name[4]) {
     903             :         default: break;
     904             :         case '0':        // 1 string to match.
     905             :           return 221;    // "zmm20"
     906             :         case '1':        // 1 string to match.
     907             :           return 222;    // "zmm21"
     908             :         case '2':        // 1 string to match.
     909             :           return 223;    // "zmm22"
     910             :         case '3':        // 1 string to match.
     911             :           return 224;    // "zmm23"
     912             :         case '4':        // 1 string to match.
     913             :           return 225;    // "zmm24"
     914             :         case '5':        // 1 string to match.
     915             :           return 226;    // "zmm25"
     916             :         case '6':        // 1 string to match.
     917             :           return 227;    // "zmm26"
     918             :         case '7':        // 1 string to match.
     919             :           return 228;    // "zmm27"
     920             :         case '8':        // 1 string to match.
     921             :           return 229;    // "zmm28"
     922             :         case '9':        // 1 string to match.
     923             :           return 230;    // "zmm29"
     924             :         }
     925             :         break;
     926         457 :       case '3':  // 2 strings to match.
     927         457 :         switch (Name[4]) {
     928             :         default: break;
     929             :         case '0':        // 1 string to match.
     930             :           return 231;    // "zmm30"
     931           1 :         case '1':        // 1 string to match.
     932           1 :           return 232;    // "zmm31"
     933             :         }
     934             :         break;
     935             :       }
     936             :       break;
     937             :     }
     938             :     break;
     939             :   case 7:        // 1 string to match.
     940          10 :     if (memcmp(Name.data()+0, "dirflag", 7) != 0)
     941             :       break;
     942             :     return 13;   // "dirflag"
     943             :   }
     944             :   return 0;
     945             : }
     946             : 
     947             : #endif // GET_REGISTER_MATCHER
     948             : 
     949             : 
     950             : #ifdef GET_SUBTARGET_FEATURE_NAME
     951             : #undef GET_SUBTARGET_FEATURE_NAME
     952             : 
     953             : // User-level names for subtarget features that participate in
     954             : // instruction matching.
     955             : static const char *getSubtargetFeatureName(uint64_t Val) {
     956          20 :   switch(Val) {
     957             :   case Feature_Not64BitMode: return "Not 64-bit mode";
     958          15 :   case Feature_In64BitMode: return "64-bit mode";
     959           0 :   case Feature_In16BitMode: return "16-bit mode";
     960           0 :   case Feature_Not16BitMode: return "Not 16-bit mode";
     961           0 :   case Feature_In32BitMode: return "32-bit mode";
     962           0 :   default: return "(unknown)";
     963             :   }
     964             : }
     965             : 
     966             : #endif // GET_SUBTARGET_FEATURE_NAME
     967             : 
     968             : 
     969             : #ifdef GET_MATCHER_IMPLEMENTATION
     970             : #undef GET_MATCHER_IMPLEMENTATION
     971             : 
     972      155404 : static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
     973      155404 :   switch (VariantID) {
     974             :     case 0:
     975      141601 :       switch (Mnemonic.size()) {
     976             :       default: break;
     977        9995 :       case 3:    // 6 strings to match.
     978       19990 :         switch (Mnemonic[0]) {
     979             :         default: break;
     980         132 :         case 'c':        // 4 strings to match.
     981         132 :           switch (Mnemonic[1]) {
     982             :           default: break;
     983          12 :           case 'b':      // 1 string to match.
     984          12 :             if (Mnemonic[2] != 'w')
     985             :               break;
     986          12 :             Mnemonic = "cbtw";         // "cbw"
     987          12 :             return;
     988          12 :           case 'd':      // 1 string to match.
     989          12 :             if (Mnemonic[2] != 'q')
     990             :               break;
     991          12 :             Mnemonic = "cltd";         // "cdq"
     992          12 :             return;
     993          12 :           case 'q':      // 1 string to match.
     994          12 :             if (Mnemonic[2] != 'o')
     995             :               break;
     996          12 :             Mnemonic = "cqto";         // "cqo"
     997          12 :             return;
     998          12 :           case 'w':      // 1 string to match.
     999          12 :             if (Mnemonic[2] != 'd')
    1000             :               break;
    1001          12 :             Mnemonic = "cwtd";         // "cwd"
    1002          12 :             return;
    1003             :           }
    1004             :           break;
    1005             :         case 'p':        // 1 string to match.
    1006         180 :           if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
    1007             :             break;
    1008         102 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "pop"
    1009           3 :             Mnemonic = "popw";
    1010          99 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1011          62 :             Mnemonic = "popl";
    1012          37 :           else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1013          37 :             Mnemonic = "popq";
    1014             :           return;
    1015             :         case 'r':        // 1 string to match.
    1016         465 :           if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
    1017             :             break;
    1018         451 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "ret"
    1019           3 :             Mnemonic = "retw";
    1020         448 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1021         154 :             Mnemonic = "retl";
    1022         294 :           else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1023         294 :             Mnemonic = "retq";
    1024             :           return;
    1025             :         }
    1026             :         break;
    1027       39476 :       case 4:    // 18 strings to match.
    1028       78952 :         switch (Mnemonic[0]) {
    1029             :         default: break;
    1030         907 :         case 'c':        // 3 strings to match.
    1031         907 :           switch (Mnemonic[1]) {
    1032             :           default: break;
    1033             :           case 'a':      // 1 string to match.
    1034         253 :             if (memcmp(Mnemonic.data()+2, "ll", 2) != 0)
    1035             :               break;
    1036         253 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "call"
    1037           2 :               Mnemonic = "callw";
    1038         251 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1039          81 :               Mnemonic = "calll";
    1040         170 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1041         170 :               Mnemonic = "callq";
    1042             :             return;
    1043             :           case 'd':      // 1 string to match.
    1044          12 :             if (memcmp(Mnemonic.data()+2, "qe", 2) != 0)
    1045             :               break;
    1046          12 :             Mnemonic = "cltq";         // "cdqe"
    1047          12 :             return;
    1048             :           case 'w':      // 1 string to match.
    1049          23 :             if (memcmp(Mnemonic.data()+2, "de", 2) != 0)
    1050             :               break;
    1051          12 :             Mnemonic = "cwtl";         // "cwde"
    1052          12 :             return;
    1053             :           }
    1054             :           break;
    1055             :         case 'i':        // 1 string to match.
    1056       18197 :           if (memcmp(Mnemonic.data()+1, "ret", 3) != 0)
    1057             :             break;
    1058           3 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "iret"
    1059           1 :             Mnemonic = "iretw";
    1060           2 :           else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
    1061           2 :             Mnemonic = "iretl";
    1062             :           return;
    1063         368 :         case 'l':        // 3 strings to match.
    1064         368 :           switch (Mnemonic[1]) {
    1065             :           default: break;
    1066             :           case 'g':      // 1 string to match.
    1067          13 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1068             :               break;
    1069          13 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lgdt"
    1070           4 :               Mnemonic = "lgdtw";
    1071           9 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1072           5 :               Mnemonic = "lgdtl";
    1073           4 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1074           4 :               Mnemonic = "lgdtq";
    1075             :             return;
    1076             :           case 'i':      // 1 string to match.
    1077           3 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1078             :               break;
    1079           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lidt"
    1080           1 :               Mnemonic = "lidtw";
    1081           2 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1082           1 :               Mnemonic = "lidtl";
    1083           1 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1084           1 :               Mnemonic = "lidtq";
    1085             :             return;
    1086             :           case 'r':      // 1 string to match.
    1087          54 :             if (memcmp(Mnemonic.data()+2, "et", 2) != 0)
    1088             :               break;
    1089          54 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lret"
    1090           3 :               Mnemonic = "lretw";
    1091          51 :             else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
    1092          51 :               Mnemonic = "lretl";
    1093             :             return;
    1094             :           }
    1095             :           break;
    1096         703 :         case 'p':        // 3 strings to match.
    1097         703 :           switch (Mnemonic[1]) {
    1098             :           default: break;
    1099         303 :           case 'o':      // 2 strings to match.
    1100         303 :             if (Mnemonic[2] != 'p')
    1101             :               break;
    1102         303 :             switch (Mnemonic[3]) {
    1103             :             default: break;
    1104          14 :             case 'a':    // 1 string to match.
    1105          14 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "popa"
    1106           1 :                 Mnemonic = "popaw";
    1107          13 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1108          13 :                 Mnemonic = "popal";
    1109             :               return;
    1110          27 :             case 'f':    // 1 string to match.
    1111          27 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "popf"
    1112           1 :                 Mnemonic = "popfw";
    1113          26 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1114          14 :                 Mnemonic = "popfl";
    1115          12 :               else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1116          12 :                 Mnemonic = "popfq";
    1117             :               return;
    1118             :             }
    1119             :             break;
    1120             :           case 'u':      // 1 string to match.
    1121         194 :             if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
    1122             :               break;
    1123         194 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "push"
    1124           6 :               Mnemonic = "pushw";
    1125         188 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1126          83 :               Mnemonic = "pushl";
    1127         105 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1128         105 :               Mnemonic = "pushq";
    1129             :             return;
    1130             :           }
    1131             :           break;
    1132             :         case 'r':        // 1 string to match.
    1133        3068 :           if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
    1134             :             break;
    1135           6 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "retn"
    1136           2 :             Mnemonic = "retw";
    1137           4 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1138           2 :             Mnemonic = "retl";
    1139           2 :           else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1140           2 :             Mnemonic = "retq";
    1141             :           return;
    1142        4532 :         case 's':        // 6 strings to match.
    1143        4532 :           switch (Mnemonic[1]) {
    1144             :           default: break;
    1145         759 :           case 'a':      // 4 strings to match.
    1146         759 :             if (Mnemonic[2] != 'l')
    1147             :               break;
    1148          53 :             switch (Mnemonic[3]) {
    1149             :             default: break;
    1150             :             case 'b':    // 1 string to match.
    1151          12 :               Mnemonic = "shlb";       // "salb"
    1152          12 :               return;
    1153             :             case 'l':    // 1 string to match.
    1154          21 :               Mnemonic = "shll";       // "sall"
    1155          21 :               return;
    1156             :             case 'q':    // 1 string to match.
    1157           2 :               Mnemonic = "shlq";       // "salq"
    1158           2 :               return;
    1159             :             case 'w':    // 1 string to match.
    1160           4 :               Mnemonic = "shlw";       // "salw"
    1161           4 :               return;
    1162             :             }
    1163             :             break;
    1164             :           case 'g':      // 1 string to match.
    1165           3 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1166             :               break;
    1167           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "sgdt"
    1168           1 :               Mnemonic = "sgdtw";
    1169           2 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1170           1 :               Mnemonic = "sgdtl";
    1171           1 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1172           1 :               Mnemonic = "sgdtq";
    1173             :             return;
    1174             :           case 'i':      // 1 string to match.
    1175           3 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1176             :               break;
    1177           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "sidt"
    1178           1 :               Mnemonic = "sidtw";
    1179           2 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1180           1 :               Mnemonic = "sidtl";
    1181           1 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1182           1 :               Mnemonic = "sidtq";
    1183             :             return;
    1184             :           }
    1185             :           break;
    1186             :         case 'u':        // 1 string to match.
    1187           4 :           if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0)
    1188             :             break;
    1189           2 :           Mnemonic = "ud2";    // "ud2a"
    1190           2 :           return;
    1191             :         }
    1192             :         break;
    1193       14216 :       case 5:    // 9 strings to match.
    1194       28432 :         switch (Mnemonic[0]) {
    1195             :         default: break;
    1196             :         case 'f':        // 1 string to match.
    1197        1356 :           if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0)
    1198             :             break;
    1199           1 :           Mnemonic = "fildll";         // "fildq"
    1200           1 :           return;
    1201        2715 :         case 'p':        // 3 strings to match.
    1202        2715 :           switch (Mnemonic[1]) {
    1203             :           default: break;
    1204             :           case 'o':      // 1 string to match.
    1205          27 :             if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0)
    1206             :               break;
    1207           2 :             Mnemonic = "popfl";        // "popfd"
    1208           2 :             return;
    1209             :           case 'u':      // 2 strings to match.
    1210         450 :             if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
    1211             :               break;
    1212         450 :             switch (Mnemonic[4]) {
    1213             :             default: break;
    1214          13 :             case 'a':    // 1 string to match.
    1215          13 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "pusha"
    1216           1 :                 Mnemonic = "pushaw";
    1217          12 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1218          12 :                 Mnemonic = "pushal";
    1219             :               return;
    1220          26 :             case 'f':    // 1 string to match.
    1221          26 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "pushf"
    1222           1 :                 Mnemonic = "pushfw";
    1223          25 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1224          13 :                 Mnemonic = "pushfl";
    1225          12 :               else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1226          12 :                 Mnemonic = "pushfq";
    1227             :               return;
    1228             :             }
    1229             :             break;
    1230             :           }
    1231             :           break;
    1232             :         case 's':        // 4 strings to match.
    1233        2472 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1234             :             break;
    1235           4 :           switch (Mnemonic[4]) {
    1236             :           default: break;
    1237             :           case 'b':      // 1 string to match.
    1238           1 :             Mnemonic = "movsb";        // "smovb"
    1239           1 :             return;
    1240             :           case 'l':      // 1 string to match.
    1241           1 :             Mnemonic = "movsl";        // "smovl"
    1242           1 :             return;
    1243             :           case 'q':      // 1 string to match.
    1244           1 :             Mnemonic = "movsq";        // "smovq"
    1245           1 :             return;
    1246             :           case 'w':      // 1 string to match.
    1247           1 :             Mnemonic = "movsw";        // "smovw"
    1248           1 :             return;
    1249             :           }
    1250             :           break;
    1251             :         case 'v':        // 1 string to match.
    1252        1740 :           if (memcmp(Mnemonic.data()+1, "errw", 4) != 0)
    1253             :             break;
    1254           2 :           Mnemonic = "verr";   // "verrw"
    1255           2 :           return;
    1256             :         }
    1257             :         break;
    1258       17634 :       case 6:    // 15 strings to match.
    1259       35268 :         switch (Mnemonic[0]) {
    1260             :         default: break;
    1261             :         case 'c':        // 6 strings to match.
    1262        1398 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1263             :             break;
    1264        1179 :           switch (Mnemonic[4]) {
    1265             :           default: break;
    1266          68 :           case 'c':      // 3 strings to match.
    1267          68 :             switch (Mnemonic[5]) {
    1268             :             default: break;
    1269             :             case 'l':    // 1 string to match.
    1270          24 :               Mnemonic = "cmovbl";     // "cmovcl"
    1271          24 :               return;
    1272             :             case 'q':    // 1 string to match.
    1273          22 :               Mnemonic = "cmovbq";     // "cmovcq"
    1274          22 :               return;
    1275             :             case 'w':    // 1 string to match.
    1276          22 :               Mnemonic = "cmovbw";     // "cmovcw"
    1277          22 :               return;
    1278             :             }
    1279             :             break;
    1280          68 :           case 'z':      // 3 strings to match.
    1281          68 :             switch (Mnemonic[5]) {
    1282             :             default: break;
    1283             :             case 'l':    // 1 string to match.
    1284          24 :               Mnemonic = "cmovel";     // "cmovzl"
    1285          24 :               return;
    1286             :             case 'q':    // 1 string to match.
    1287          22 :               Mnemonic = "cmoveq";     // "cmovzq"
    1288          22 :               return;
    1289             :             case 'w':    // 1 string to match.
    1290          22 :               Mnemonic = "cmovew";     // "cmovzw"
    1291          22 :               return;
    1292             :             }
    1293             :             break;
    1294             :           }
    1295             :           break;
    1296        1566 :         case 'f':        // 4 strings to match.
    1297        1566 :           switch (Mnemonic[1]) {
    1298             :           default: break;
    1299             :           case 'c':      // 2 strings to match.
    1300         205 :             if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
    1301             :               break;
    1302          79 :             switch (Mnemonic[5]) {
    1303             :             default: break;
    1304             :             case 'a':    // 1 string to match.
    1305           1 :               Mnemonic = "fcmovnbe";   // "fcmova"
    1306           1 :               return;
    1307             :             case 'z':    // 1 string to match.
    1308           0 :               Mnemonic = "fcmove";     // "fcmovz"
    1309           0 :               return;
    1310             :             }
    1311             :             break;
    1312             :           case 'i':      // 1 string to match.
    1313         478 :             if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0)
    1314             :               break;
    1315           0 :             Mnemonic = "fistpll";      // "fistpq"
    1316           0 :             return;
    1317             :           case 'l':      // 1 string to match.
    1318         137 :             if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0)
    1319             :               break;
    1320           2 :             Mnemonic = "fldcw";        // "fldcww"
    1321           2 :             return;
    1322             :           }
    1323             :           break;
    1324             :         case 'l':        // 2 strings to match.
    1325         133 :           if (memcmp(Mnemonic.data()+1, "eave", 4) != 0)
    1326             :             break;
    1327           3 :           switch (Mnemonic[5]) {
    1328             :           default: break;
    1329           2 :           case 'l':      // 1 string to match.
    1330           2 :             if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)   // "leavel"
    1331           2 :               Mnemonic = "leave";
    1332             :             return;
    1333           1 :           case 'q':      // 1 string to match.
    1334           1 :             if ((Features & Feature_In64BitMode) == Feature_In64BitMode)     // "leaveq"
    1335           1 :               Mnemonic = "leave";
    1336             :             return;
    1337             :           }
    1338             :           break;
    1339             :         case 'p':        // 1 string to match.
    1340        1966 :           if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0)
    1341             :             break;
    1342           2 :           Mnemonic = "pushfl";         // "pushfd"
    1343           2 :           return;
    1344             :         case 's':        // 1 string to match.
    1345         276 :           if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0)
    1346             :             break;
    1347           3 :           Mnemonic = "sysretl";        // "sysret"
    1348           3 :           return;
    1349             :         case 'x':        // 1 string to match.
    1350          73 :           if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0)
    1351             :             break;
    1352           0 :           Mnemonic = "xsave64";        // "xsaveq"
    1353           0 :           return;
    1354             :         }
    1355             :         break;
    1356       16828 :       case 7:    // 34 strings to match.
    1357       33656 :         switch (Mnemonic[0]) {
    1358             :         default: break;
    1359             :         case 'c':        // 24 strings to match.
    1360        1634 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1361             :             break;
    1362        1603 :           switch (Mnemonic[4]) {
    1363             :           default: break;
    1364         949 :           case 'n':      // 18 strings to match.
    1365         949 :             switch (Mnemonic[5]) {
    1366             :             default: break;
    1367          70 :             case 'a':    // 3 strings to match.
    1368          70 :               switch (Mnemonic[6]) {
    1369             :               default: break;
    1370             :               case 'l':  // 1 string to match.
    1371          24 :                 Mnemonic = "cmovbel";  // "cmovnal"
    1372          24 :                 return;
    1373             :               case 'q':  // 1 string to match.
    1374          22 :                 Mnemonic = "cmovbeq";  // "cmovnaq"
    1375          22 :                 return;
    1376             :               case 'w':  // 1 string to match.
    1377          22 :                 Mnemonic = "cmovbew";  // "cmovnaw"
    1378          22 :                 return;
    1379             :               }
    1380             :               break;
    1381          68 :             case 'b':    // 3 strings to match.
    1382          68 :               switch (Mnemonic[6]) {
    1383             :               default: break;
    1384             :               case 'l':  // 1 string to match.
    1385          24 :                 Mnemonic = "cmovael";  // "cmovnbl"
    1386          24 :                 return;
    1387             :               case 'q':  // 1 string to match.
    1388          22 :                 Mnemonic = "cmovaeq";  // "cmovnbq"
    1389          22 :                 return;
    1390             :               case 'w':  // 1 string to match.
    1391          22 :                 Mnemonic = "cmovaew";  // "cmovnbw"
    1392          22 :                 return;
    1393             :               }
    1394             :               break;
    1395          68 :             case 'c':    // 3 strings to match.
    1396          68 :               switch (Mnemonic[6]) {
    1397             :               default: break;
    1398             :               case 'l':  // 1 string to match.
    1399          24 :                 Mnemonic = "cmovael";  // "cmovncl"
    1400          24 :                 return;
    1401             :               case 'q':  // 1 string to match.
    1402          22 :                 Mnemonic = "cmovaeq";  // "cmovncq"
    1403          22 :                 return;
    1404             :               case 'w':  // 1 string to match.
    1405          22 :                 Mnemonic = "cmovaew";  // "cmovncw"
    1406          22 :                 return;
    1407             :               }
    1408             :               break;
    1409          70 :             case 'g':    // 3 strings to match.
    1410          70 :               switch (Mnemonic[6]) {
    1411             :               default: break;
    1412             :               case 'l':  // 1 string to match.
    1413          26 :                 Mnemonic = "cmovlel";  // "cmovngl"
    1414          26 :                 return;
    1415             :               case 'q':  // 1 string to match.
    1416          22 :                 Mnemonic = "cmovleq";  // "cmovngq"
    1417          22 :                 return;
    1418             :               case 'w':  // 1 string to match.
    1419          22 :                 Mnemonic = "cmovlew";  // "cmovngw"
    1420          22 :                 return;
    1421             :               }
    1422             :               break;
    1423          76 :             case 'l':    // 3 strings to match.
    1424          76 :               switch (Mnemonic[6]) {
    1425             :               default: break;
    1426             :               case 'l':  // 1 string to match.
    1427          26 :                 Mnemonic = "cmovgel";  // "cmovnll"
    1428          26 :                 return;
    1429             :               case 'q':  // 1 string to match.
    1430          24 :                 Mnemonic = "cmovgeq";  // "cmovnlq"
    1431          24 :                 return;
    1432             :               case 'w':  // 1 string to match.
    1433          24 :                 Mnemonic = "cmovgew";  // "cmovnlw"
    1434          24 :                 return;
    1435             :               }
    1436             :               break;
    1437          73 :             case 'z':    // 3 strings to match.
    1438          73 :               switch (Mnemonic[6]) {
    1439             :               default: break;
    1440             :               case 'l':  // 1 string to match.
    1441          25 :                 Mnemonic = "cmovnel";  // "cmovnzl"
    1442          25 :                 return;
    1443             :               case 'q':  // 1 string to match.
    1444          24 :                 Mnemonic = "cmovneq";  // "cmovnzq"
    1445          24 :                 return;
    1446             :               case 'w':  // 1 string to match.
    1447          23 :                 Mnemonic = "cmovnew";  // "cmovnzw"
    1448          23 :                 return;
    1449             :               }
    1450             :               break;
    1451             :             }
    1452             :             break;
    1453         132 :           case 'p':      // 6 strings to match.
    1454         132 :             switch (Mnemonic[5]) {
    1455             :             default: break;
    1456          66 :             case 'e':    // 3 strings to match.
    1457          66 :               switch (Mnemonic[6]) {
    1458             :               default: break;
    1459             :               case 'l':  // 1 string to match.
    1460          22 :                 Mnemonic = "cmovpl";   // "cmovpel"
    1461          22 :                 return;
    1462             :               case 'q':  // 1 string to match.
    1463          22 :                 Mnemonic = "cmovpq";   // "cmovpeq"
    1464          22 :                 return;
    1465             :               case 'w':  // 1 string to match.
    1466          22 :                 Mnemonic = "cmovpw";   // "cmovpew"
    1467          22 :                 return;
    1468             :               }
    1469             :               break;
    1470          66 :             case 'o':    // 3 strings to match.
    1471          66 :               switch (Mnemonic[6]) {
    1472             :               default: break;
    1473             :               case 'l':  // 1 string to match.
    1474          22 :                 Mnemonic = "cmovnpl";  // "cmovpol"
    1475          22 :                 return;
    1476             :               case 'q':  // 1 string to match.
    1477          22 :                 Mnemonic = "cmovnpq";  // "cmovpoq"
    1478          22 :                 return;
    1479             :               case 'w':  // 1 string to match.
    1480          22 :                 Mnemonic = "cmovnpw";  // "cmovpow"
    1481          22 :                 return;
    1482             :               }
    1483             :               break;
    1484             :             }
    1485             :             break;
    1486             :           }
    1487             :           break;
    1488         714 :         case 'f':        // 6 strings to match.
    1489         714 :           switch (Mnemonic[1]) {
    1490             :           default: break;
    1491             :           case 'c':      // 2 strings to match.
    1492         106 :             if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
    1493             :               break;
    1494         106 :             switch (Mnemonic[5]) {
    1495             :             default: break;
    1496           1 :             case 'a':    // 1 string to match.
    1497           1 :               if (Mnemonic[6] != 'e')
    1498             :                 break;
    1499           1 :               Mnemonic = "fcmovnb";    // "fcmovae"
    1500           1 :               return;
    1501          79 :             case 'n':    // 1 string to match.
    1502          79 :               if (Mnemonic[6] != 'a')
    1503             :                 break;
    1504           1 :               Mnemonic = "fcmovbe";    // "fcmovna"
    1505           1 :               return;
    1506             :             }
    1507             :             break;
    1508             :           case 'i':      // 1 string to match.
    1509         334 :             if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0)
    1510             :               break;
    1511           0 :             Mnemonic = "fisttpll";     // "fisttpq"
    1512           0 :             return;
    1513             :           case 'n':      // 2 strings to match.
    1514          50 :             if (memcmp(Mnemonic.data()+2, "st", 2) != 0)
    1515             :               break;
    1516          50 :             switch (Mnemonic[4]) {
    1517             :             default: break;
    1518             :             case 'c':    // 1 string to match.
    1519           2 :               if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
    1520             :                 break;
    1521           2 :               Mnemonic = "fnstcw";     // "fnstcww"
    1522           2 :               return;
    1523             :             case 's':    // 1 string to match.
    1524           2 :               if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
    1525             :                 break;
    1526           2 :               Mnemonic = "fnstsw";     // "fnstsww"
    1527           2 :               return;
    1528             :             }
    1529             :             break;
    1530             :           case 'x':      // 1 string to match.
    1531          67 :             if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0)
    1532             :               break;
    1533           1 :             Mnemonic = "fxsave64";     // "fxsaveq"
    1534           1 :             return;
    1535             :           }
    1536             :           break;
    1537             :         case 's':        // 1 string to match.
    1538          53 :           if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0)
    1539             :             break;
    1540           3 :           Mnemonic = "sysexitl";       // "sysexit"
    1541           3 :           return;
    1542          26 :         case 'x':        // 3 strings to match.
    1543          26 :           switch (Mnemonic[1]) {
    1544             :           default: break;
    1545             :           case 'r':      // 1 string to match.
    1546          20 :             if (memcmp(Mnemonic.data()+2, "storq", 5) != 0)
    1547             :               break;
    1548           0 :             Mnemonic = "xrstor64";     // "xrstorq"
    1549           0 :             return;
    1550             :           case 's':      // 2 strings to match.
    1551           6 :             if (memcmp(Mnemonic.data()+2, "ave", 3) != 0)
    1552             :               break;
    1553           6 :             switch (Mnemonic[5]) {
    1554             :             default: break;
    1555           0 :             case 'c':    // 1 string to match.
    1556           0 :               if (Mnemonic[6] != 'q')
    1557             :                 break;
    1558           0 :               Mnemonic = "xsavec64";   // "xsavecq"
    1559           0 :               return;
    1560           0 :             case 's':    // 1 string to match.
    1561           0 :               if (Mnemonic[6] != 'q')
    1562             :                 break;
    1563           0 :               Mnemonic = "xsaves64";   // "xsavesq"
    1564           0 :               return;
    1565             :             }
    1566             :             break;
    1567             :           }
    1568             :           break;
    1569             :         }
    1570             :         break;
    1571        9439 :       case 8:    // 15 strings to match.
    1572       18878 :         switch (Mnemonic[0]) {
    1573             :         default: break;
    1574             :         case 'c':        // 12 strings to match.
    1575         978 :           if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
    1576             :             break;
    1577         278 :           switch (Mnemonic[5]) {
    1578             :           default: break;
    1579          74 :           case 'a':      // 3 strings to match.
    1580          74 :             if (Mnemonic[6] != 'e')
    1581             :               break;
    1582          74 :             switch (Mnemonic[7]) {
    1583             :             default: break;
    1584             :             case 'l':    // 1 string to match.
    1585          24 :               Mnemonic = "cmovbl";     // "cmovnael"
    1586          24 :               return;
    1587             :             case 'q':    // 1 string to match.
    1588          24 :               Mnemonic = "cmovbq";     // "cmovnaeq"
    1589          24 :               return;
    1590             :             case 'w':    // 1 string to match.
    1591          24 :               Mnemonic = "cmovbw";     // "cmovnaew"
    1592          24 :               return;
    1593             :             }
    1594             :             break;
    1595          68 :           case 'b':      // 3 strings to match.
    1596          68 :             if (Mnemonic[6] != 'e')
    1597             :               break;
    1598          68 :             switch (Mnemonic[7]) {
    1599             :             default: break;
    1600             :             case 'l':    // 1 string to match.
    1601          24 :               Mnemonic = "cmoval";     // "cmovnbel"
    1602          24 :               return;
    1603             :             case 'q':    // 1 string to match.
    1604          22 :               Mnemonic = "cmovaq";     // "cmovnbeq"
    1605          22 :               return;
    1606             :             case 'w':    // 1 string to match.
    1607          22 :               Mnemonic = "cmovaw";     // "cmovnbew"
    1608          22 :               return;
    1609             :             }
    1610             :             break;
    1611          68 :           case 'g':      // 3 strings to match.
    1612          68 :             if (Mnemonic[6] != 'e')
    1613             :               break;
    1614          68 :             switch (Mnemonic[7]) {
    1615             :             default: break;
    1616             :             case 'l':    // 1 string to match.
    1617          24 :               Mnemonic = "cmovll";     // "cmovngel"
    1618          24 :               return;
    1619             :             case 'q':    // 1 string to match.
    1620          22 :               Mnemonic = "cmovlq";     // "cmovngeq"
    1621          22 :               return;
    1622             :             case 'w':    // 1 string to match.
    1623          22 :               Mnemonic = "cmovlw";     // "cmovngew"
    1624          22 :               return;
    1625             :             }
    1626             :             break;
    1627          68 :           case 'l':      // 3 strings to match.
    1628          68 :             if (Mnemonic[6] != 'e')
    1629             :               break;
    1630          68 :             switch (Mnemonic[7]) {
    1631             :             default: break;
    1632             :             case 'l':    // 1 string to match.
    1633          24 :               Mnemonic = "cmovgl";     // "cmovnlel"
    1634          24 :               return;
    1635             :             case 'q':    // 1 string to match.
    1636          22 :               Mnemonic = "cmovgq";     // "cmovnleq"
    1637          22 :               return;
    1638             :             case 'w':    // 1 string to match.
    1639          22 :               Mnemonic = "cmovgw";     // "cmovnlew"
    1640          22 :               return;
    1641             :             }
    1642             :             break;
    1643             :           }
    1644             :           break;
    1645          56 :         case 'f':        // 2 strings to match.
    1646          56 :           switch (Mnemonic[1]) {
    1647             :           default: break;
    1648             :           case 'c':      // 1 string to match.
    1649          27 :             if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0)
    1650             :               break;
    1651           1 :             Mnemonic = "fcmovb";       // "fcmovnae"
    1652           1 :             return;
    1653             :           case 'x':      // 1 string to match.
    1654           8 :             if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0)
    1655             :               break;
    1656           1 :             Mnemonic = "fxrstor64";    // "fxrstorq"
    1657           1 :             return;
    1658             :           }
    1659             :           break;
    1660             :         case 'x':        // 1 string to match.
    1661          42 :           if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0)
    1662             :             break;
    1663           0 :           Mnemonic = "xrstors64";      // "xrstorsq"
    1664           0 :           return;
    1665             :         }
    1666             :         break;
    1667             :       case 9:    // 1 string to match.
    1668       12030 :         if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0)
    1669             :           break;
    1670           0 :         Mnemonic = "xsaveopt64";       // "xsaveoptq"
    1671           0 :         return;
    1672             :       }
    1673             :     break;
    1674             :     case 1:
    1675       13803 :       switch (Mnemonic.size()) {
    1676             :       default: break;
    1677             :       case 3:    // 1 string to match.
    1678        2917 :         if (memcmp(Mnemonic.data()+0, "sal", 3) != 0)
    1679             :           break;
    1680           1 :         Mnemonic = "shl";      // "sal"
    1681           1 :         return;
    1682         401 :       case 4:    // 7 strings to match.
    1683         802 :         switch (Mnemonic[0]) {
    1684             :         default: break;
    1685          41 :         case 'l':        // 2 strings to match.
    1686          41 :           switch (Mnemonic[1]) {
    1687             :           default: break;
    1688             :           case 'g':      // 1 string to match.
    1689          16 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1690             :               break;
    1691          16 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lgdt"
    1692           8 :               Mnemonic = "lgdtw";
    1693           8 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1694           8 :               Mnemonic = "lgdtd";
    1695             :             return;
    1696             :           case 'i':      // 1 string to match.
    1697          16 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1698             :               break;
    1699          16 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lidt"
    1700           8 :               Mnemonic = "lidtw";
    1701           8 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1702           8 :               Mnemonic = "lidtd";
    1703             :             return;
    1704             :           }
    1705             :           break;
    1706             :         case 'p':        // 2 strings to match.
    1707          18 :           if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
    1708             :             break;
    1709           4 :           switch (Mnemonic[3]) {
    1710             :           default: break;
    1711           3 :           case 'a':      // 1 string to match.
    1712           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "popa"
    1713           0 :               Mnemonic = "popaw";
    1714           3 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1715           3 :               Mnemonic = "popal";
    1716             :             return;
    1717           1 :           case 'f':      // 1 string to match.
    1718           1 :             if ((Features & Feature_In64BitMode) == Feature_In64BitMode)     // "popf"
    1719           1 :               Mnemonic = "popfq";
    1720             :             return;
    1721             :           }
    1722             :           break;
    1723             :         case 'r':        // 1 string to match.
    1724           3 :           if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
    1725             :             break;
    1726           0 :           Mnemonic = "ret";    // "retn"
    1727           0 :           return;
    1728          76 :         case 's':        // 2 strings to match.
    1729          76 :           switch (Mnemonic[1]) {
    1730             :           default: break;
    1731             :           case 'g':      // 1 string to match.
    1732          16 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1733             :               break;
    1734          16 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "sgdt"
    1735           8 :               Mnemonic = "sgdtw";
    1736           8 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1737           8 :               Mnemonic = "sgdtd";
    1738             :             return;
    1739             :           case 'i':      // 1 string to match.
    1740          17 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1741             :               break;
    1742          17 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "sidt"
    1743           8 :               Mnemonic = "sidtw";
    1744           9 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1745           8 :               Mnemonic = "sidtd";
    1746             :             return;
    1747             :           }
    1748             :           break;
    1749             :         }
    1750             :         break;
    1751         296 :       case 5:    // 5 strings to match.
    1752         592 :         switch (Mnemonic[0]) {
    1753             :         default: break;
    1754             :         case 'c':        // 2 strings to match.
    1755          36 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1756             :             break;
    1757           2 :           switch (Mnemonic[4]) {
    1758             :           default: break;
    1759             :           case 'c':      // 1 string to match.
    1760           1 :             Mnemonic = "cmovb";        // "cmovc"
    1761           1 :             return;
    1762             :           case 'z':      // 1 string to match.
    1763           1 :             Mnemonic = "cmove";        // "cmovz"
    1764           1 :             return;
    1765             :           }
    1766             :           break;
    1767           8 :         case 'p':        // 3 strings to match.
    1768           8 :           switch (Mnemonic[1]) {
    1769             :           default: break;
    1770             :           case 'o':      // 1 string to match.
    1771           4 :             if (memcmp(Mnemonic.data()+2, "pad", 3) != 0)
    1772             :               break;
    1773           3 :             if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)   // "popad"
    1774           3 :               Mnemonic = "popal";
    1775             :             return;
    1776             :           case 'u':      // 2 strings to match.
    1777           4 :             if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
    1778             :               break;
    1779           4 :             switch (Mnemonic[4]) {
    1780             :             default: break;
    1781           3 :             case 'a':    // 1 string to match.
    1782           3 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "pusha"
    1783           0 :                 Mnemonic = "pushaw";
    1784           3 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1785           3 :                 Mnemonic = "pushal";
    1786             :               return;
    1787           1 :             case 'f':    // 1 string to match.
    1788           1 :               if ((Features & Feature_In64BitMode) == Feature_In64BitMode)   // "pushf"
    1789           1 :                 Mnemonic = "pushfq";
    1790             :               return;
    1791             :             }
    1792             :             break;
    1793             :           }
    1794             :           break;
    1795             :         }
    1796             :         break;
    1797        1948 :       case 6:    // 9 strings to match.
    1798        3896 :         switch (Mnemonic[0]) {
    1799             :         default: break;
    1800             :         case 'c':        // 8 strings to match.
    1801          10 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1802             :             break;
    1803           8 :           switch (Mnemonic[4]) {
    1804             :           default: break;
    1805           6 :           case 'n':      // 6 strings to match.
    1806           6 :             switch (Mnemonic[5]) {
    1807             :             default: break;
    1808             :             case 'a':    // 1 string to match.
    1809           1 :               Mnemonic = "cmovbe";     // "cmovna"
    1810           1 :               return;
    1811             :             case 'b':    // 1 string to match.
    1812           1 :               Mnemonic = "cmovae";     // "cmovnb"
    1813           1 :               return;
    1814             :             case 'c':    // 1 string to match.
    1815           1 :               Mnemonic = "cmovae";     // "cmovnc"
    1816           1 :               return;
    1817             :             case 'g':    // 1 string to match.
    1818           1 :               Mnemonic = "cmovle";     // "cmovng"
    1819           1 :               return;
    1820             :             case 'l':    // 1 string to match.
    1821           1 :               Mnemonic = "cmovge";     // "cmovnl"
    1822           1 :               return;
    1823             :             case 'z':    // 1 string to match.
    1824           1 :               Mnemonic = "cmovne";     // "cmovnz"
    1825           1 :               return;
    1826             :             }
    1827             :             break;
    1828           2 :           case 'p':      // 2 strings to match.
    1829           2 :             switch (Mnemonic[5]) {
    1830             :             default: break;
    1831             :             case 'e':    // 1 string to match.
    1832           1 :               Mnemonic = "cmovp";      // "cmovpe"
    1833           1 :               return;
    1834             :             case 'o':    // 1 string to match.
    1835           1 :               Mnemonic = "cmovnp";     // "cmovpo"
    1836           1 :               return;
    1837             :             }
    1838             :             break;
    1839             :           }
    1840             :           break;
    1841             :         case 'p':        // 1 string to match.
    1842           4 :           if (memcmp(Mnemonic.data()+1, "ushad", 5) != 0)
    1843             :             break;
    1844           3 :           if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)     // "pushad"
    1845           3 :             Mnemonic = "pushal";
    1846             :           return;
    1847             :         }
    1848             :         break;
    1849        1428 :       case 7:    // 6 strings to match.
    1850        2856 :         switch (Mnemonic[0]) {
    1851             :         default: break;
    1852             :         case 'a':        // 1 string to match.
    1853           1 :           if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0)
    1854             :             break;
    1855           1 :           Mnemonic = "xacquire";       // "acquire"
    1856           1 :           return;
    1857             :         case 'c':        // 4 strings to match.
    1858           4 :           if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
    1859             :             break;
    1860           4 :           switch (Mnemonic[5]) {
    1861             :           default: break;
    1862           1 :           case 'a':      // 1 string to match.
    1863           1 :             if (Mnemonic[6] != 'e')
    1864             :               break;
    1865           1 :             Mnemonic = "cmovb";        // "cmovnae"
    1866           1 :             return;
    1867           1 :           case 'b':      // 1 string to match.
    1868           1 :             if (Mnemonic[6] != 'e')
    1869             :               break;
    1870           1 :             Mnemonic = "cmova";        // "cmovnbe"
    1871           1 :             return;
    1872           1 :           case 'g':      // 1 string to match.
    1873           1 :             if (Mnemonic[6] != 'e')
    1874             :               break;
    1875           1 :             Mnemonic = "cmovl";        // "cmovnge"
    1876           1 :             return;
    1877           1 :           case 'l':      // 1 string to match.
    1878           1 :             if (Mnemonic[6] != 'e')
    1879             :               break;
    1880           1 :             Mnemonic = "cmovg";        // "cmovnle"
    1881           1 :             return;
    1882             :           }
    1883             :           break;
    1884             :         case 'r':        // 1 string to match.
    1885           1 :           if (memcmp(Mnemonic.data()+1, "elease", 6) != 0)
    1886             :             break;
    1887           1 :           Mnemonic = "xrelease";       // "release"
    1888           1 :           return;
    1889             :         }
    1890             :         break;
    1891             :       }
    1892             :     break;
    1893             :   }
    1894      153034 :   switch (Mnemonic.size()) {
    1895             :   default: break;
    1896         278 :   case 2:        // 2 strings to match.
    1897         556 :     if (Mnemonic[0] != 'j')
    1898             :       break;
    1899         242 :     switch (Mnemonic[1]) {
    1900             :     default: break;
    1901             :     case 'c':    // 1 string to match.
    1902          21 :       Mnemonic = "jb";         // "jc"
    1903          21 :       return;
    1904             :     case 'z':    // 1 string to match.
    1905          29 :       Mnemonic = "je";         // "jz"
    1906          29 :       return;
    1907             :     }
    1908             :     break;
    1909       12310 :   case 3:        // 8 strings to match.
    1910       24620 :     if (Mnemonic[0] != 'j')
    1911             :       break;
    1912         518 :     switch (Mnemonic[1]) {
    1913             :     default: break;
    1914         186 :     case 'n':    // 6 strings to match.
    1915         186 :       switch (Mnemonic[2]) {
    1916             :       default: break;
    1917             :       case 'a':  // 1 string to match.
    1918          12 :         Mnemonic = "jbe";      // "jna"
    1919          12 :         return;
    1920             :       case 'b':  // 1 string to match.
    1921          12 :         Mnemonic = "jae";      // "jnb"
    1922          12 :         return;
    1923             :       case 'c':  // 1 string to match.
    1924          12 :         Mnemonic = "jae";      // "jnc"
    1925          12 :         return;
    1926             :       case 'g':  // 1 string to match.
    1927          12 :         Mnemonic = "jle";      // "jng"
    1928          12 :         return;
    1929             :       case 'l':  // 1 string to match.
    1930          12 :         Mnemonic = "jge";      // "jnl"
    1931          12 :         return;
    1932             :       case 'z':  // 1 string to match.
    1933          21 :         Mnemonic = "jne";      // "jnz"
    1934          21 :         return;
    1935             :       }
    1936             :       break;
    1937          24 :     case 'p':    // 2 strings to match.
    1938          24 :       switch (Mnemonic[2]) {
    1939             :       default: break;
    1940             :       case 'e':  // 1 string to match.
    1941          12 :         Mnemonic = "jp";       // "jpe"
    1942          12 :         return;
    1943             :       case 'o':  // 1 string to match.
    1944          12 :         Mnemonic = "jnp";      // "jpo"
    1945          12 :         return;
    1946             :       }
    1947             :       break;
    1948             :     }
    1949             :     break;
    1950       39170 :   case 4:        // 8 strings to match.
    1951       78340 :     switch (Mnemonic[0]) {
    1952             :     default: break;
    1953          99 :     case 'j':    // 4 strings to match.
    1954          99 :       if (Mnemonic[1] != 'n')
    1955             :         break;
    1956          48 :       switch (Mnemonic[2]) {
    1957             :       default: break;
    1958          12 :       case 'a':  // 1 string to match.
    1959          12 :         if (Mnemonic[3] != 'e')
    1960             :           break;
    1961          12 :         Mnemonic = "jb";       // "jnae"
    1962          12 :         return;
    1963          12 :       case 'b':  // 1 string to match.
    1964          12 :         if (Mnemonic[3] != 'e')
    1965             :           break;
    1966          12 :         Mnemonic = "ja";       // "jnbe"
    1967          12 :         return;
    1968          12 :       case 'g':  // 1 string to match.
    1969          12 :         if (Mnemonic[3] != 'e')
    1970             :           break;
    1971          12 :         Mnemonic = "jl";       // "jnge"
    1972          12 :         return;
    1973          12 :       case 'l':  // 1 string to match.
    1974          12 :         if (Mnemonic[3] != 'e')
    1975             :           break;
    1976          12 :         Mnemonic = "jg";       // "jnle"
    1977          12 :         return;
    1978             :       }
    1979             :       break;
    1980             :     case 'r':    // 2 strings to match.
    1981        3065 :       if (memcmp(Mnemonic.data()+1, "ep", 2) != 0)
    1982             :         break;
    1983           2 :       switch (Mnemonic[3]) {
    1984             :       default: break;
    1985             :       case 'e':  // 1 string to match.
    1986           1 :         Mnemonic = "rep";      // "repe"
    1987           1 :         return;
    1988             :       case 'z':  // 1 string to match.
    1989           1 :         Mnemonic = "rep";      // "repz"
    1990           1 :         return;
    1991             :       }
    1992             :       break;
    1993             :     case 's':    // 2 strings to match.
    1994        4530 :       if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
    1995             :         break;
    1996         328 :       switch (Mnemonic[3]) {
    1997             :       default: break;
    1998             :       case 'c':  // 1 string to match.
    1999           6 :         Mnemonic = "setb";     // "setc"
    2000           6 :         return;
    2001             :       case 'z':  // 1 string to match.
    2002          24 :         Mnemonic = "sete";     // "setz"
    2003          24 :         return;
    2004             :       }
    2005             :       break;
    2006             :     }
    2007             :     break;
    2008       14455 :   case 5:        // 11 strings to match.
    2009       28910 :     switch (Mnemonic[0]) {
    2010             :     default: break;
    2011             :     case 'f':    // 1 string to match.
    2012        1390 :       if (memcmp(Mnemonic.data()+1, "wait", 4) != 0)
    2013             :         break;
    2014          24 :       Mnemonic = "wait";       // "fwait"
    2015          24 :       return;
    2016             :     case 'l':    // 1 string to match.
    2017         316 :       if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0)
    2018             :         break;
    2019          11 :       Mnemonic = "loope";      // "loopz"
    2020          11 :       return;
    2021             :     case 'r':    // 1 string to match.
    2022         251 :       if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0)
    2023             :         break;
    2024           1 :       Mnemonic = "repne";      // "repnz"
    2025           1 :       return;
    2026             :     case 's':    // 8 strings to match.
    2027        2476 :       if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
    2028             :         break;
    2029         387 :       switch (Mnemonic[3]) {
    2030             :       default: break;
    2031         244 :       case 'n':  // 6 strings to match.
    2032         244 :         switch (Mnemonic[4]) {
    2033             :         default: break;
    2034             :         case 'a':        // 1 string to match.
    2035           3 :           Mnemonic = "setbe";  // "setna"
    2036           3 :           return;
    2037             :         case 'b':        // 1 string to match.
    2038          25 :           Mnemonic = "setae";  // "setnb"
    2039          25 :           return;
    2040             :         case 'c':        // 1 string to match.
    2041           3 :           Mnemonic = "setae";  // "setnc"
    2042           3 :           return;
    2043             :         case 'g':        // 1 string to match.
    2044           3 :           Mnemonic = "setle";  // "setng"
    2045           3 :           return;
    2046             :         case 'l':        // 1 string to match.
    2047          25 :           Mnemonic = "setge";  // "setnl"
    2048          25 :           return;
    2049             :         case 'z':        // 1 string to match.
    2050          24 :           Mnemonic = "setne";  // "setnz"
    2051          24 :           return;
    2052             :         }
    2053             :         break;
    2054           6 :       case 'p':  // 2 strings to match.
    2055           6 :         switch (Mnemonic[4]) {
    2056             :         default: break;
    2057             :         case 'e':        // 1 string to match.
    2058           3 :           Mnemonic = "setp";   // "setpe"
    2059           3 :           return;
    2060             :         case 'o':        // 1 string to match.
    2061           3 :           Mnemonic = "setnp";  // "setpo"
    2062           3 :           return;
    2063             :         }
    2064             :         break;
    2065             :       }
    2066             :       break;
    2067             :     }
    2068             :     break;
    2069       19424 :   case 6:        // 6 strings to match.
    2070       38848 :     switch (Mnemonic[0]) {
    2071             :     default: break;
    2072             :     case 'f':    // 1 string to match.
    2073        1604 :       if (memcmp(Mnemonic.data()+1, "comip", 5) != 0)
    2074             :         break;
    2075          14 :       Mnemonic = "fcompi";     // "fcomip"
    2076          14 :       return;
    2077             :     case 'l':    // 1 string to match.
    2078         138 :       if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0)
    2079             :         break;
    2080          11 :       Mnemonic = "loopne";     // "loopnz"
    2081          11 :       return;
    2082             :     case 's':    // 4 strings to match.
    2083         278 :       if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
    2084             :         break;
    2085          58 :       switch (Mnemonic[4]) {
    2086             :       default: break;
    2087           5 :       case 'a':  // 1 string to match.
    2088           5 :         if (Mnemonic[5] != 'e')
    2089             :           break;
    2090           5 :         Mnemonic = "setb";     // "setnae"
    2091           5 :         return;
    2092          25 :       case 'b':  // 1 string to match.
    2093          25 :         if (Mnemonic[5] != 'e')
    2094             :           break;
    2095          25 :         Mnemonic = "seta";     // "setnbe"
    2096          25 :         return;
    2097           3 :       case 'g':  // 1 string to match.
    2098           3 :         if (Mnemonic[5] != 'e')
    2099             :           break;
    2100           3 :         Mnemonic = "setl";     // "setnge"
    2101           3 :         return;
    2102          25 :       case 'l':  // 1 string to match.
    2103          25 :         if (Mnemonic[5] != 'e')
    2104             :           break;
    2105          25 :         Mnemonic = "setg";     // "setnle"
    2106          25 :         return;
    2107             :       }
    2108             :       break;
    2109             :     }
    2110             :     break;
    2111             :   case 7:        // 1 string to match.
    2112       17688 :     if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0)
    2113             :       break;
    2114          14 :     Mnemonic = "fucompi";      // "fucomip"
    2115          14 :     return;
    2116             :   }
    2117             : }
    2118             : 
    2119             : enum {
    2120             :   Tie0_1_1,
    2121             :   Tie0_2_2,
    2122             :   Tie0_3_3,
    2123             :   Tie0_4_4,
    2124             :   Tie1_1_1,
    2125             :   Tie1_2_2,
    2126             :   Tie1_3_3,
    2127             :   Tie1_4_4,
    2128             : };
    2129             : 
    2130             : const char TiedAsmOperandTable[][3] = {
    2131             :   /* Tie0_1_1 */ { 0, 1, 1 },
    2132             :   /* Tie0_2_2 */ { 0, 2, 2 },
    2133             :   /* Tie0_3_3 */ { 0, 3, 3 },
    2134             :   /* Tie0_4_4 */ { 0, 4, 4 },
    2135             :   /* Tie1_1_1 */ { 1, 1, 1 },
    2136             :   /* Tie1_2_2 */ { 1, 2, 2 },
    2137             :   /* Tie1_3_3 */ { 1, 3, 3 },
    2138             :   /* Tie1_4_4 */ { 1, 4, 4 },
    2139             : };
    2140             : 
    2141             : namespace {
    2142             : enum OperatorConversionKind {
    2143             :   CVT_Done,
    2144             :   CVT_Reg,
    2145             :   CVT_Tied,
    2146             :   CVT_imm_95_10,
    2147             :   CVT_95_addImmOperands,
    2148             :   CVT_regAX,
    2149             :   CVT_regEAX,
    2150             :   CVT_regRAX,
    2151             :   CVT_95_Reg,
    2152             :   CVT_95_addMemOperands,
    2153             :   CVT_95_addAbsMemOperands,
    2154             :   CVT_95_addDstIdxOperands,
    2155             :   CVT_95_addSrcIdxOperands,
    2156             :   CVT_95_addGR32orGR64Operands,
    2157             :   CVT_regST1,
    2158             :   CVT_regST0,
    2159             :   CVT_95_addMemOffsOperands,
    2160             :   CVT_imm_95_17,
    2161             :   CVT_imm_95_1,
    2162             :   CVT_imm_95_16,
    2163             :   CVT_imm_95_0,
    2164             :   CVT_95_addAVX512RCOperands,
    2165             :   CVT_NUM_CONVERTERS
    2166             : };
    2167             : 
    2168             : enum InstructionConversionKind {
    2169             :   Convert_NoOperands,
    2170             :   Convert__imm_95_10,
    2171             :   Convert__Imm1_0,
    2172             :   Convert__Imm1_1,
    2173             :   Convert__regAX__Tie0_1_1__ImmSExti16i81_1,
    2174             :   Convert__regEAX__Tie0_1_1__ImmSExti32i81_1,
    2175             :   Convert__regRAX__Tie0_1_1__ImmSExti64i81_1,
    2176             :   Convert__ImmSExti64i321_1,
    2177             :   Convert__Reg1_0__Tie0_1_1__Reg1_1,
    2178             :   Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1,
    2179             :   Convert__Reg1_0__Tie0_1_1__Imm1_1,
    2180             :   Convert__Reg1_0__Tie0_1_1__Mem165_1,
    2181             :   Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1,
    2182             :   Convert__Reg1_0__Tie0_1_1__Mem325_1,
    2183             :   Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1,
    2184             :   Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1,
    2185             :   Convert__Reg1_0__Tie0_1_1__Mem645_1,
    2186             :   Convert__Reg1_0__Tie0_1_1__Mem85_1,
    2187             :   Convert__Mem165_0__Reg1_1,
    2188             :   Convert__Mem165_0__ImmSExti16i81_1,
    2189             :   Convert__Mem165_0__Imm1_1,
    2190             :   Convert__Mem325_0__Reg1_1,
    2191             :   Convert__Mem325_0__ImmSExti32i81_1,
    2192             :   Convert__Mem325_0__Imm1_1,
    2193             :   Convert__Mem645_0__Reg1_1,
    2194             :   Convert__Mem645_0__ImmSExti64i81_1,
    2195             :   Convert__Mem645_0__ImmSExti64i321_1,
    2196             :   Convert__Mem85_0__Reg1_1,
    2197             :   Convert__Mem85_0__Imm1_1,
    2198             :   Convert__Reg1_1__Tie0_2_2__Reg1_0,
    2199             :   Convert__Mem85_1__Reg1_0,
    2200             :   Convert__Reg1_1__Tie0_2_2__Imm1_0,
    2201             :   Convert__Mem85_1__Imm1_0,
    2202             :   Convert__Reg1_1__Tie0_2_2__Mem85_0,
    2203             :   Convert__Mem325_1__Reg1_0,
    2204             :   Convert__regEAX__Tie0_1_1__ImmSExti32i81_0,
    2205             :   Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0,
    2206             :   Convert__Mem325_1__ImmSExti32i81_0,
    2207             :   Convert__Mem325_1__Imm1_0,
    2208             :   Convert__Reg1_1__Tie0_2_2__Mem325_0,
    2209             :   Convert__Mem645_1__Reg1_0,
    2210             :   Convert__regRAX__Tie0_1_1__ImmSExti64i81_0,
    2211             :   Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0,
    2212             :   Convert__Mem645_1__ImmSExti64i81_0,
    2213             :   Convert__ImmSExti64i321_0,
    2214             :   Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0,
    2215             :   Convert__Mem645_1__ImmSExti64i321_0,
    2216             :   Convert__Reg1_1__Tie0_2_2__Mem645_0,
    2217             :   Convert__Mem165_1__Reg1_0,
    2218             :   Convert__regAX__Tie0_1_1__ImmSExti16i81_0,
    2219             :   Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0,
    2220             :   Convert__Mem165_1__ImmSExti16i81_0,
    2221             :   Convert__Mem165_1__Imm1_0,
    2222             :   Convert__Reg1_1__Tie0_2_2__Mem165_0,
    2223             :   Convert__Reg1_1__Tie0_1_1__Reg1_0,
    2224             :   Convert__Reg1_1__Tie0_1_1__Mem325_0,
    2225             :   Convert__Reg1_1__Tie0_1_1__Mem645_0,
    2226             :   Convert__Reg1_0__Tie0_1_1__Mem1285_1,
    2227             :   Convert__Reg1_1__Tie0_1_1__Mem1285_0,
    2228             :   Convert__Reg1_1__Reg1_0,
    2229             :   Convert__Reg1_0__Reg1_1,
    2230             :   Convert__Reg1_0__Mem1285_1,
    2231             :   Convert__Reg1_1__Mem1285_0,
    2232             :   Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
    2233             :   Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
    2234             :   Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2235             :   Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2236             :   Convert__Reg1_0__Reg1_1__Reg1_2,
    2237             :   Convert__Reg1_0__Reg1_1__Mem325_2,
    2238             :   Convert__Reg1_0__Reg1_1__Mem645_2,
    2239             :   Convert__Reg1_2__Reg1_1__Reg1_0,
    2240             :   Convert__Reg1_2__Reg1_1__Mem325_0,
    2241             :   Convert__Reg1_2__Reg1_1__Mem645_0,
    2242             :   Convert__Reg1_0__Reg1_1__Imm1_2,
    2243             :   Convert__Reg1_0__Mem325_1__Reg1_2,
    2244             :   Convert__Reg1_0__Mem325_1__Imm1_2,
    2245             :   Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
    2246             :   Convert__Reg1_0__Mem645_1__Reg1_2,
    2247             :   Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
    2248             :   Convert__Reg1_2__Mem325_1__Reg1_0,
    2249             :   Convert__Reg1_2__Reg1_1__Imm1_0,
    2250             :   Convert__Reg1_2__Mem325_1__Imm1_0,
    2251             :   Convert__Reg1_2__Mem645_1__Reg1_0,
    2252             :   Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
    2253             :   Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
    2254             :   Convert__Reg1_0__Mem325_1,
    2255             :   Convert__Reg1_0__Mem645_1,
    2256             :   Convert__Reg1_1__Mem325_0,
    2257             :   Convert__Reg1_1__Mem645_0,
    2258             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2,
    2259             :   Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2,
    2260             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0,
    2261             :   Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0,
    2262             :   Convert__Reg1_1__Tie0_2_2__Mem1285_0,
    2263             :   Convert__Reg1_2__Tie0_1_1__Reg1_1,
    2264             :   Convert__Reg1_2__Tie0_1_1__Mem1285_1,
    2265             :   Convert__Reg1_0__Mem5_1,
    2266             :   Convert__Reg1_1__Mem5_0,
    2267             :   Convert__Mem1285_1__Reg1_0,
    2268             :   Convert__Mem1285_0__Reg1_1,
    2269             :   Convert__Mem5_1__Reg1_0,
    2270             :   Convert__Mem5_0__Reg1_1,
    2271             :   Convert__Reg1_0__Mem165_1,
    2272             :   Convert__Reg1_1__Mem165_0,
    2273             :   Convert__Reg1_0__Tie0_1_1,
    2274             :   Convert__Reg1_0__ImmSExti16i81_1,
    2275             :   Convert__Reg1_0__ImmSExti32i81_1,
    2276             :   Convert__Reg1_0__ImmSExti64i81_1,
    2277             :   Convert__Reg1_1__ImmSExti32i81_0,
    2278             :   Convert__Reg1_1__ImmSExti64i81_0,
    2279             :   Convert__Reg1_1__ImmSExti16i81_0,
    2280             :   Convert__Reg1_0,
    2281             :   Convert__AbsMem1_0,
    2282             :   Convert__Mem165_0,
    2283             :   Convert__Mem325_0,
    2284             :   Convert__Mem645_0,
    2285             :   Convert__Mem5_0,
    2286             :   Convert__Imm1_1__Imm1_0,
    2287             :   Convert__Reg1_1,
    2288             :   Convert__Mem325_1,
    2289             :   Convert__Mem645_1,
    2290             :   Convert__Mem165_1,
    2291             :   Convert__Mem85_0,
    2292             :   Convert__Reg1_0__Tie0_1_1__Reg1_0,
    2293             :   Convert__Reg1_1__Tie0_1_1__Mem165_0,
    2294             :   Convert__regAX__ImmSExti16i81_1,
    2295             :   Convert__regEAX__ImmSExti32i81_1,
    2296             :   Convert__regRAX__ImmSExti64i81_1,
    2297             :   Convert__Reg1_0__Imm1_1,
    2298             :   Convert__Reg1_0__ImmSExti64i321_1,
    2299             :   Convert__Reg1_0__Mem85_1,
    2300             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0,
    2301             :   Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0,
    2302             :   Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0,
    2303             :   Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0,
    2304             :   Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0,
    2305             :   Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0,
    2306             :   Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0,
    2307             :   Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0,
    2308             :   Convert__Reg1_1__Imm1_0,
    2309             :   Convert__Reg1_1__Mem85_0,
    2310             :   Convert__regEAX__ImmSExti32i81_0,
    2311             :   Convert__regRAX__ImmSExti64i81_0,
    2312             :   Convert__Reg1_1__ImmSExti64i321_0,
    2313             :   Convert__DstIdx161_1__SrcIdx162_0,
    2314             :   Convert__DstIdx321_1__SrcIdx322_0,
    2315             :   Convert__DstIdx641_1__SrcIdx642_0,
    2316             :   Convert__DstIdx81_1__SrcIdx82_0,
    2317             :   Convert__DstIdx81_0__SrcIdx82_1,
    2318             :   Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2,
    2319             :   Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0,
    2320             :   Convert__DstIdx321_0__SrcIdx322_1,
    2321             :   Convert__DstIdx641_0__SrcIdx642_1,
    2322             :   Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2,
    2323             :   Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0,
    2324             :   Convert__DstIdx161_0__SrcIdx162_1,
    2325             :   Convert__regAX__ImmSExti16i81_0,
    2326             :   Convert__Mem1285_0,
    2327             :   Convert__Mem85_1,
    2328             :   Convert__Imm1_0__Imm1_1,
    2329             :   Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
    2330             :   Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
    2331             :   Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
    2332             :   Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
    2333             :   Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2,
    2334             :   Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0,
    2335             :   Convert__regST1,
    2336             :   Convert__regST0,
    2337             :   Convert__Mem805_0,
    2338             :   Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
    2339             :   Convert__Reg1_0__Reg1_0__Imm1_1,
    2340             :   Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
    2341             :   Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
    2342             :   Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
    2343             :   Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
    2344             :   Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
    2345             :   Convert__Reg1_0__Mem165_1__Imm1_2,
    2346             :   Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
    2347             :   Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
    2348             :   Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
    2349             :   Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
    2350             :   Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
    2351             :   Convert__Reg1_1__Reg1_1__Imm1_0,
    2352             :   Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
    2353             :   Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
    2354             :   Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
    2355             :   Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
    2356             :   Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
    2357             :   Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
    2358             :   Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
    2359             :   Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
    2360             :   Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
    2361             :   Convert__Reg1_2__Mem165_1__Imm1_0,
    2362             :   Convert__ImmUnsignedi81_1,
    2363             :   Convert__ImmUnsignedi81_0,
    2364             :   Convert__DstIdx161_0,
    2365             :   Convert__DstIdx321_0,
    2366             :   Convert__DstIdx81_0,
    2367             :   Convert__DstIdx81_1,
    2368             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
    2369             :   Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
    2370             :   Convert__DstIdx321_1,
    2371             :   Convert__DstIdx161_1,
    2372             :   Convert__Mem5_1,
    2373             :   Convert__SrcIdx162_0,
    2374             :   Convert__SrcIdx322_0,
    2375             :   Convert__SrcIdx642_0,
    2376             :   Convert__SrcIdx82_0,
    2377             :   Convert__SrcIdx82_1,
    2378             :   Convert__SrcIdx162_1,
    2379             :   Convert__SrcIdx322_1,
    2380             :   Convert__SrcIdx642_1,
    2381             :   Convert__MemOffs16_82_1,
    2382             :   Convert__MemOffs32_82_1,
    2383             :   Convert__MemOffs16_162_1,
    2384             :   Convert__MemOffs32_162_1,
    2385             :   Convert__MemOffs16_322_1,
    2386             :   Convert__MemOffs32_322_1,
    2387             :   Convert__MemOffs32_642_1,
    2388             :   Convert__MemOffs16_162_0,
    2389             :   Convert__MemOffs16_322_0,
    2390             :   Convert__MemOffs16_82_0,
    2391             :   Convert__MemOffs32_162_0,
    2392             :   Convert__MemOffs32_322_0,
    2393             :   Convert__MemOffs32_642_0,
    2394             :   Convert__MemOffs32_82_0,
    2395             :   Convert__MemOffs64_82_1,
    2396             :   Convert__MemOffs64_162_1,
    2397             :   Convert__MemOffs64_322_1,
    2398             :   Convert__MemOffs64_642_1,
    2399             :   Convert__MemOffs64_162_0,
    2400             :   Convert__MemOffs64_322_0,
    2401             :   Convert__MemOffs64_642_0,
    2402             :   Convert__MemOffs64_82_0,
    2403             :   Convert__Reg1_0__Mem5125_1,
    2404             :   Convert__Reg1_1__Mem5125_0,
    2405             :   Convert__GR32orGR641_1__Reg1_0,
    2406             :   Convert__GR32orGR641_0__Reg1_1,
    2407             :   Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17,
    2408             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17,
    2409             :   Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17,
    2410             :   Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17,
    2411             :   Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1,
    2412             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1,
    2413             :   Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1,
    2414             :   Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1,
    2415             :   Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16,
    2416             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16,
    2417             :   Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16,
    2418             :   Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16,
    2419             :   Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0,
    2420             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0,
    2421             :   Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0,
    2422             :   Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0,
    2423             :   Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
    2424             :   Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
    2425             :   Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
    2426             :   Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
    2427             :   Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
    2428             :   Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
    2429             :   Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2,
    2430             :   Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2,
    2431             :   Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0,
    2432             :   Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0,
    2433             :   Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2,
    2434             :   Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0,
    2435             :   Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
    2436             :   Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2437             :   Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1,
    2438             :   Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0,
    2439             :   Convert__ImmSExti64i81_0,
    2440             :   Convert__ImmSExti16i81_0,
    2441             :   Convert__ImmSExti32i81_0,
    2442             :   Convert__Mem165_0__ImmUnsignedi81_1,
    2443             :   Convert__Mem325_0__ImmUnsignedi81_1,
    2444             :   Convert__Mem645_0__ImmUnsignedi81_1,
    2445             :   Convert__Mem85_0__ImmUnsignedi81_1,
    2446             :   Convert__Reg1_1__Tie0_1_1,
    2447             :   Convert__Mem85_1__ImmUnsignedi81_0,
    2448             :   Convert__Mem325_1__ImmUnsignedi81_0,
    2449             :   Convert__Mem645_1__ImmUnsignedi81_0,
    2450             :   Convert__Mem165_1__ImmUnsignedi81_0,
    2451             :   Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
    2452             :   Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2453             :   Convert__DstIdx641_0,
    2454             :   Convert__DstIdx641_1,
    2455             :   Convert__Mem325_2__Reg1_1,
    2456             :   Convert__Mem645_2__Reg1_1,
    2457             :   Convert__Mem165_2__Reg1_1,
    2458             :   Convert__GR32orGR641_0,
    2459             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2,
    2460             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0,
    2461             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5,
    2462             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0,
    2463             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6,
    2464             :   Convert__Reg1_0__Reg1_1__Mem1285_2,
    2465             :   Convert__Reg1_0__Reg1_1__Mem2565_2,
    2466             :   Convert__Reg1_0__Reg1_1__Mem5125_2,
    2467             :   Convert__Reg1_2__Reg1_1__Mem1285_0,
    2468             :   Convert__Reg1_2__Reg1_1__Mem2565_0,
    2469             :   Convert__Reg1_2__Reg1_1__Mem5125_0,
    2470             :   Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
    2471             :   Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
    2472             :   Convert__Reg1_3__Reg1_2__Mem645_0,
    2473             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5,
    2474             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0,
    2475             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5,
    2476             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5,
    2477             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0,
    2478             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0,
    2479             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
    2480             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
    2481             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5,
    2482             :   Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
    2483             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
    2484             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
    2485             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
    2486             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
    2487             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
    2488             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
    2489             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
    2490             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0,
    2491             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
    2492             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
    2493             :   Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
    2494             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
    2495             :   Convert__Reg1_3__Reg1_2__Mem325_0,
    2496             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5,
    2497             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0,
    2498             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
    2499             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
    2500             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0,
    2501             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0,
    2502             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0,
    2503             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0,
    2504             :   Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
    2505             :   Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
    2506             :   Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
    2507             :   Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
    2508             :   Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2509             :   Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2510             :   Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2511             :   Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2512             :   Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
    2513             :   Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2514             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
    2515             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
    2516             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
    2517             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
    2518             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2519             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2520             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2521             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2522             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
    2523             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
    2524             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
    2525             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
    2526             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
    2527             :   Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2528             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2529             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2530             :   Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2531             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2532             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
    2533             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2534             :   Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
    2535             :   Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2536             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
    2537             :   Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2538             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
    2539             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2540             :   Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
    2541             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
    2542             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
    2543             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
    2544             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
    2545             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
    2546             :   Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
    2547             :   Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
    2548             :   Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
    2549             :   Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
    2550             :   Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
    2551             :   Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
    2552             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0,
    2553             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4,
    2554             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4,
    2555             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0,
    2556             :   Convert__Reg1_1__Reg1_3__Reg1_0,
    2557             :   Convert__Reg1_0__Reg1_2__Reg1_5,
    2558             :   Convert__Reg1_0__Reg1_2__Mem645_5,
    2559             :   Convert__Reg1_1__Reg1_3__Mem645_0,
    2560             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4,
    2561             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0,
    2562             :   Convert__Reg1_0__Reg1_2__Mem1285_5,
    2563             :   Convert__Reg1_1__Reg1_3__Mem1285_0,
    2564             :   Convert__Reg1_0__Mem2565_1,
    2565             :   Convert__Reg1_1__Mem2565_0,
    2566             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4,
    2567             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0,
    2568             :   Convert__Reg1_0__Reg1_2__Mem2565_5,
    2569             :   Convert__Reg1_1__Reg1_3__Mem2565_0,
    2570             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4,
    2571             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0,
    2572             :   Convert__Reg1_0__Reg1_2__Mem325_5,
    2573             :   Convert__Reg1_1__Reg1_3__Mem325_0,
    2574             :   Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0,
    2575             :   Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0,
    2576             :   Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0,
    2577             :   Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0,
    2578             :   Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0,
    2579             :   Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0,
    2580             :   Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0,
    2581             :   Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0,
    2582             :   Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0,
    2583             :   Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0,
    2584             :   Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0,
    2585             :   Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0,
    2586             :   Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0,
    2587             :   Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0,
    2588             :   Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0,
    2589             :   Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0,
    2590             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0,
    2591             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0,
    2592             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0,
    2593             :   Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0,
    2594             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0,
    2595             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0,
    2596             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0,
    2597             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0,
    2598             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0,
    2599             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0,
    2600             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0,
    2601             :   Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0,
    2602             :   Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0,
    2603             :   Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0,
    2604             :   Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
    2605             :   Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2606             :   Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
    2607             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
    2608             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
    2609             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
    2610             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
    2611             :   Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
    2612             :   Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2613             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
    2614             :   Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
    2615             :   Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2616             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
    2617             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2618             :   Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
    2619             :   Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2620             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
    2621             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2622             :   Convert__Reg1_2__Reg1_1,
    2623             :   Convert__Mem2565_1__Reg1_0,
    2624             :   Convert__Mem5125_1__Reg1_0,
    2625             :   Convert__Mem2565_0__Reg1_1,
    2626             :   Convert__Mem5125_0__Reg1_1,
    2627             :   Convert__Mem1285_1__Reg1_3__Reg1_0,
    2628             :   Convert__Mem2565_1__Reg1_3__Reg1_0,
    2629             :   Convert__Mem5125_1__Reg1_3__Reg1_0,
    2630             :   Convert__Mem1285_0__Reg1_2__Reg1_4,
    2631             :   Convert__Mem2565_0__Reg1_2__Reg1_4,
    2632             :   Convert__Mem5125_0__Reg1_2__Reg1_4,
    2633             :   Convert__Reg1_2__Mem325_0,
    2634             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0,
    2635             :   Convert__Reg1_2__Reg1_4__Mem325_0,
    2636             :   Convert__Reg1_0__Reg1_1__AVX512RC1_2,
    2637             :   Convert__Reg1_2__Reg1_1__AVX512RC1_0,
    2638             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4,
    2639             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0,
    2640             :   Convert__Reg1_0__Reg1_2__Mem5125_5,
    2641             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5,
    2642             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0,
    2643             :   Convert__Reg1_1__Reg1_3__Mem5125_0,
    2644             :   Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
    2645             :   Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
    2646             :   Convert__Reg1_2__Mem645_0,
    2647             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0,
    2648             :   Convert__Reg1_2__Reg1_4__Mem645_0,
    2649             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1,
    2650             :   Convert__Reg1_2__Reg1_4__Reg1_1,
    2651             :   Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
    2652             :   Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
    2653             :   Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
    2654             :   Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
    2655             :   Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
    2656             :   Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2657             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2658             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2659             :   Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2660             :   Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2661             :   Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2662             :   Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2663             :   Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2664             :   Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2665             :   Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
    2666             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6,
    2667             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0,
    2668             :   Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2669             :   Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
    2670             :   Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
    2671             :   Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
    2672             :   Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
    2673             :   Convert__Reg1_3__Reg1_2__Reg1_1,
    2674             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1,
    2675             :   Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
    2676             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3,
    2677             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
    2678             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
    2679             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
    2680             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2681             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2682             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2683             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2684             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4,
    2685             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4,
    2686             :   Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2687             :   Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2688             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
    2689             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
    2690             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
    2691             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
    2692             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
    2693             :   Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2694             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
    2695             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
    2696             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4,
    2697             :   Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2698             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
    2699             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3,
    2700             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2701             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
    2702             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2703             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
    2704             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3,
    2705             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2706             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
    2707             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2708             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
    2709             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0,
    2710             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
    2711             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2,
    2712             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2,
    2713             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0,
    2714             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0,
    2715             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2,
    2716             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3,
    2717             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0,
    2718             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0,
    2719             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6,
    2720             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6,
    2721             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6,
    2722             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6,
    2723             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
    2724             :   Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2,
    2725             :   Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0,
    2726             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6,
    2727             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0,
    2728             :   Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0,
    2729             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
    2730             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
    2731             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
    2732             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
    2733             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
    2734             :   Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
    2735             :   Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
    2736             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
    2737             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
    2738             :   Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
    2739             :   Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
    2740             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
    2741             :   Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
    2742             :   Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
    2743             :   Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
    2744             :   Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2745             :   Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
    2746             :   Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
    2747             :   Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
    2748             :   Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
    2749             :   Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2750             :   Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
    2751             :   Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
    2752             :   Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2753             :   Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
    2754             :   Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2755             :   Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
    2756             :   Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
    2757             :   Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
    2758             :   Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2759             :   Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
    2760             :   Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5,
    2761             :   Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0,
    2762             :   Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5,
    2763             :   Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0,
    2764             :   Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1,
    2765             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3,
    2766             :   Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1,
    2767             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3,
    2768             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4,
    2769             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4,
    2770             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4,
    2771             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0,
    2772             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0,
    2773             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0,
    2774             :   Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1,
    2775             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3,
    2776             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4,
    2777             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4,
    2778             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0,
    2779             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0,
    2780             :   Convert__Reg1_1__Mem512_RC256X5_3,
    2781             :   Convert__Reg1_2__Mem512_RC256X5_0,
    2782             :   Convert__Reg1_1__Mem512_RC5125_3,
    2783             :   Convert__Reg1_2__Mem512_RC5125_0,
    2784             :   Convert__Reg1_1__Mem256_RC5125_3,
    2785             :   Convert__Reg1_2__Mem256_RC5125_0,
    2786             :   Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1,
    2787             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3,
    2788             :   Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1,
    2789             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3,
    2790             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4,
    2791             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4,
    2792             :   Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4,
    2793             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0,
    2794             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0,
    2795             :   Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0,
    2796             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
    2797             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
    2798             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
    2799             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
    2800             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
    2801             :   Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
    2802             :   Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
    2803             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6,
    2804             :   Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
    2805             :   Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
    2806             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0,
    2807             :   Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
    2808             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6,
    2809             :   Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0,
    2810             :   Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
    2811             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
    2812             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
    2813             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
    2814             :   Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4,
    2815             :   Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0,
    2816             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7,
    2817             :   Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
    2818             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8,
    2819             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
    2820             :   Convert__Mem1285_2__Reg1_1__Reg1_0,
    2821             :   Convert__Mem2565_2__Reg1_1__Reg1_0,
    2822             :   Convert__Mem1285_0__Reg1_1__Reg1_2,
    2823             :   Convert__Mem2565_0__Reg1_1__Reg1_2,
    2824             :   Convert__Reg1_0__Reg1_2__Reg1_4,
    2825             :   Convert__Mem645_1__Reg1_3__Reg1_0,
    2826             :   Convert__Mem645_0__Reg1_2__Reg1_4,
    2827             :   Convert__Mem325_1__Reg1_3__Reg1_0,
    2828             :   Convert__Mem325_0__Reg1_2__Reg1_4,
    2829             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4,
    2830             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0,
    2831             :   Convert__Reg1_0__Reg1_2__Mem85_5,
    2832             :   Convert__Reg1_1__Reg1_3__Mem85_0,
    2833             :   Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4,
    2834             :   Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0,
    2835             :   Convert__Reg1_0__Reg1_2__Mem165_5,
    2836             :   Convert__Reg1_1__Reg1_3__Mem165_0,
    2837             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
    2838             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
    2839             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
    2840             :   Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17,
    2841             :   Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17,
    2842             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
    2843             :   Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17,
    2844             :   Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17,
    2845             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
    2846             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
    2847             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
    2848             :   Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1,
    2849             :   Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1,
    2850             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
    2851             :   Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1,
    2852             :   Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1,
    2853             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
    2854             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
    2855             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
    2856             :   Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16,
    2857             :   Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16,
    2858             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
    2859             :   Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16,
    2860             :   Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16,
    2861             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
    2862             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
    2863             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
    2864             :   Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0,
    2865             :   Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0,
    2866             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
    2867             :   Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0,
    2868             :   Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0,
    2869             :   Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4,
    2870             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4,
    2871             :   Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4,
    2872             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4,
    2873             :   Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4,
    2874             :   Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2875             :   Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
    2876             :   Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
    2877             :   Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2878             :   Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2879             :   Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
    2880             :   Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
    2881             :   Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
    2882             :   Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
    2883             :   Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
    2884             :   Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
    2885             :   Convert__Mem165_1__Reg1_3__Reg1_0,
    2886             :   Convert__Mem165_0__Reg1_2__Reg1_4,
    2887             :   Convert__Reg1_2__Mem1285_1__Reg1_0,
    2888             :   Convert__Reg1_0__Mem1285_1__Reg1_2,
    2889             :   Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0,
    2890             :   Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0,
    2891             :   Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0,
    2892             :   Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4,
    2893             :   Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4,
    2894             :   Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4,
    2895             :   Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0,
    2896             :   Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0,
    2897             :   Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4,
    2898             :   Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4,
    2899             :   Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0,
    2900             :   Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0,
    2901             :   Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0,
    2902             :   Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4,
    2903             :   Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4,
    2904             :   Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4,
    2905             :   Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2,
    2906             :   Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1,
    2907             :   Convert__AbsMem161_0,
    2908             :   Convert__Reg1_1__Tie0_2_2,
    2909             :   Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1,
    2910             :   CVT_NUM_SIGNATURES
    2911             : };
    2912             : 
    2913             : } // end anonymous namespace
    2914             : 
    2915             : static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
    2916             :   // Convert_NoOperands
    2917             :   { CVT_Done },
    2918             :   // Convert__imm_95_10
    2919             :   { CVT_imm_95_10, 0, CVT_Done },
    2920             :   // Convert__Imm1_0
    2921             :   { CVT_95_addImmOperands, 1, CVT_Done },
    2922             :   // Convert__Imm1_1
    2923             :   { CVT_95_addImmOperands, 2, CVT_Done },
    2924             :   // Convert__regAX__Tie0_1_1__ImmSExti16i81_1
    2925             :   { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2926             :   // Convert__regEAX__Tie0_1_1__ImmSExti32i81_1
    2927             :   { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2928             :   // Convert__regRAX__Tie0_1_1__ImmSExti64i81_1
    2929             :   { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2930             :   // Convert__ImmSExti64i321_1
    2931             :   { CVT_95_addImmOperands, 2, CVT_Done },
    2932             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1
    2933             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
    2934             :   // Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1
    2935             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2936             :   // Convert__Reg1_0__Tie0_1_1__Imm1_1
    2937             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2938             :   // Convert__Reg1_0__Tie0_1_1__Mem165_1
    2939             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
    2940             :   // Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1
    2941             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2942             :   // Convert__Reg1_0__Tie0_1_1__Mem325_1
    2943             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
    2944             :   // Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1
    2945             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2946             :   // Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1
    2947             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    2948             :   // Convert__Reg1_0__Tie0_1_1__Mem645_1
    2949             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
    2950             :   // Convert__Reg1_0__Tie0_1_1__Mem85_1
    2951             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
    2952             :   // Convert__Mem165_0__Reg1_1
    2953             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2954             :   // Convert__Mem165_0__ImmSExti16i81_1
    2955             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2956             :   // Convert__Mem165_0__Imm1_1
    2957             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2958             :   // Convert__Mem325_0__Reg1_1
    2959             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2960             :   // Convert__Mem325_0__ImmSExti32i81_1
    2961             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2962             :   // Convert__Mem325_0__Imm1_1
    2963             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2964             :   // Convert__Mem645_0__Reg1_1
    2965             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2966             :   // Convert__Mem645_0__ImmSExti64i81_1
    2967             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2968             :   // Convert__Mem645_0__ImmSExti64i321_1
    2969             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2970             :   // Convert__Mem85_0__Reg1_1
    2971             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2972             :   // Convert__Mem85_0__Imm1_1
    2973             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2974             :   // Convert__Reg1_1__Tie0_2_2__Reg1_0
    2975             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_Done },
    2976             :   // Convert__Mem85_1__Reg1_0
    2977             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2978             :   // Convert__Reg1_1__Tie0_2_2__Imm1_0
    2979             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
    2980             :   // Convert__Mem85_1__Imm1_0
    2981             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2982             :   // Convert__Reg1_1__Tie0_2_2__Mem85_0
    2983             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
    2984             :   // Convert__Mem325_1__Reg1_0
    2985             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2986             :   // Convert__regEAX__Tie0_1_1__ImmSExti32i81_0
    2987             :   { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    2988             :   // Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0
    2989             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
    2990             :   // Convert__Mem325_1__ImmSExti32i81_0
    2991             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2992             :   // Convert__Mem325_1__Imm1_0
    2993             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2994             :   // Convert__Reg1_1__Tie0_2_2__Mem325_0
    2995             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
    2996             :   // Convert__Mem645_1__Reg1_0
    2997             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2998             :   // Convert__regRAX__Tie0_1_1__ImmSExti64i81_0
    2999             :   { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    3000             :   // Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0
    3001             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
    3002             :   // Convert__Mem645_1__ImmSExti64i81_0
    3003             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3004             :   // Convert__ImmSExti64i321_0
    3005             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3006             :   // Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0
    3007             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
    3008             :   // Convert__Mem645_1__ImmSExti64i321_0
    3009             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3010             :   // Convert__Reg1_1__Tie0_2_2__Mem645_0
    3011             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
    3012             :   // Convert__Mem165_1__Reg1_0
    3013             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3014             :   // Convert__regAX__Tie0_1_1__ImmSExti16i81_0
    3015             :   { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    3016             :   // Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0
    3017             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
    3018             :   // Convert__Mem165_1__ImmSExti16i81_0
    3019             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3020             :   // Convert__Mem165_1__Imm1_0
    3021             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3022             :   // Convert__Reg1_1__Tie0_2_2__Mem165_0
    3023             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
    3024             :   // Convert__Reg1_1__Tie0_1_1__Reg1_0
    3025             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
    3026             :   // Convert__Reg1_1__Tie0_1_1__Mem325_0
    3027             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
    3028             :   // Convert__Reg1_1__Tie0_1_1__Mem645_0
    3029             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
    3030             :   // Convert__Reg1_0__Tie0_1_1__Mem1285_1
    3031             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
    3032             :   // Convert__Reg1_1__Tie0_1_1__Mem1285_0
    3033             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
    3034             :   // Convert__Reg1_1__Reg1_0
    3035             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3036             :   // Convert__Reg1_0__Reg1_1
    3037             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
    3038             :   // Convert__Reg1_0__Mem1285_1
    3039             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3040             :   // Convert__Reg1_1__Mem1285_0
    3041             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3042             :   // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
    3043             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3044             :   // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
    3045             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3046             :   // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3047             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3048             :   // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3049             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3050             :   // Convert__Reg1_0__Reg1_1__Reg1_2
    3051             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    3052             :   // Convert__Reg1_0__Reg1_1__Mem325_2
    3053             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3054             :   // Convert__Reg1_0__Reg1_1__Mem645_2
    3055             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3056             :   // Convert__Reg1_2__Reg1_1__Reg1_0
    3057             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3058             :   // Convert__Reg1_2__Reg1_1__Mem325_0
    3059             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3060             :   // Convert__Reg1_2__Reg1_1__Mem645_0
    3061             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3062             :   // Convert__Reg1_0__Reg1_1__Imm1_2
    3063             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3064             :   // Convert__Reg1_0__Mem325_1__Reg1_2
    3065             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
    3066             :   // Convert__Reg1_0__Mem325_1__Imm1_2
    3067             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3068             :   // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
    3069             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3070             :   // Convert__Reg1_0__Mem645_1__Reg1_2
    3071             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
    3072             :   // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
    3073             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3074             :   // Convert__Reg1_2__Mem325_1__Reg1_0
    3075             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3076             :   // Convert__Reg1_2__Reg1_1__Imm1_0
    3077             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3078             :   // Convert__Reg1_2__Mem325_1__Imm1_0
    3079             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3080             :   // Convert__Reg1_2__Mem645_1__Reg1_0
    3081             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3082             :   // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
    3083             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3084             :   // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
    3085             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3086             :   // Convert__Reg1_0__Mem325_1
    3087             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3088             :   // Convert__Reg1_0__Mem645_1
    3089             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3090             :   // Convert__Reg1_1__Mem325_0
    3091             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3092             :   // Convert__Reg1_1__Mem645_0
    3093             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3094             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2
    3095             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3096             :   // Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2
    3097             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3098             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0
    3099             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3100             :   // Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0
    3101             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3102             :   // Convert__Reg1_1__Tie0_2_2__Mem1285_0
    3103             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
    3104             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1
    3105             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
    3106             :   // Convert__Reg1_2__Tie0_1_1__Mem1285_1
    3107             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
    3108             :   // Convert__Reg1_0__Mem5_1
    3109             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3110             :   // Convert__Reg1_1__Mem5_0
    3111             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3112             :   // Convert__Mem1285_1__Reg1_0
    3113             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3114             :   // Convert__Mem1285_0__Reg1_1
    3115             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    3116             :   // Convert__Mem5_1__Reg1_0
    3117             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3118             :   // Convert__Mem5_0__Reg1_1
    3119             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    3120             :   // Convert__Reg1_0__Mem165_1
    3121             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3122             :   // Convert__Reg1_1__Mem165_0
    3123             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3124             :   // Convert__Reg1_0__Tie0_1_1
    3125             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
    3126             :   // Convert__Reg1_0__ImmSExti16i81_1
    3127             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3128             :   // Convert__Reg1_0__ImmSExti32i81_1
    3129             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3130             :   // Convert__Reg1_0__ImmSExti64i81_1
    3131             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3132             :   // Convert__Reg1_1__ImmSExti32i81_0
    3133             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3134             :   // Convert__Reg1_1__ImmSExti64i81_0
    3135             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3136             :   // Convert__Reg1_1__ImmSExti16i81_0
    3137             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3138             :   // Convert__Reg1_0
    3139             :   { CVT_95_Reg, 1, CVT_Done },
    3140             :   // Convert__AbsMem1_0
    3141             :   { CVT_95_addAbsMemOperands, 1, CVT_Done },
    3142             :   // Convert__Mem165_0
    3143             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3144             :   // Convert__Mem325_0
    3145             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3146             :   // Convert__Mem645_0
    3147             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3148             :   // Convert__Mem5_0
    3149             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3150             :   // Convert__Imm1_1__Imm1_0
    3151             :   { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3152             :   // Convert__Reg1_1
    3153             :   { CVT_95_Reg, 2, CVT_Done },
    3154             :   // Convert__Mem325_1
    3155             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3156             :   // Convert__Mem645_1
    3157             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3158             :   // Convert__Mem165_1
    3159             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3160             :   // Convert__Mem85_0
    3161             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3162             :   // Convert__Reg1_0__Tie0_1_1__Reg1_0
    3163             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
    3164             :   // Convert__Reg1_1__Tie0_1_1__Mem165_0
    3165             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
    3166             :   // Convert__regAX__ImmSExti16i81_1
    3167             :   { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3168             :   // Convert__regEAX__ImmSExti32i81_1
    3169             :   { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3170             :   // Convert__regRAX__ImmSExti64i81_1
    3171             :   { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3172             :   // Convert__Reg1_0__Imm1_1
    3173             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3174             :   // Convert__Reg1_0__ImmSExti64i321_1
    3175             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3176             :   // Convert__Reg1_0__Mem85_1
    3177             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3178             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0
    3179             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3180             :   // Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0
    3181             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3182             :   // Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0
    3183             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3184             :   // Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0
    3185             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3186             :   // Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0
    3187             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3188             :   // Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0
    3189             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3190             :   // Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0
    3191             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3192             :   // Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0
    3193             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3194             :   // Convert__Reg1_1__Imm1_0
    3195             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3196             :   // Convert__Reg1_1__Mem85_0
    3197             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3198             :   // Convert__regEAX__ImmSExti32i81_0
    3199             :   { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3200             :   // Convert__regRAX__ImmSExti64i81_0
    3201             :   { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3202             :   // Convert__Reg1_1__ImmSExti64i321_0
    3203             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3204             :   // Convert__DstIdx161_1__SrcIdx162_0
    3205             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3206             :   // Convert__DstIdx321_1__SrcIdx322_0
    3207             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3208             :   // Convert__DstIdx641_1__SrcIdx642_0
    3209             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3210             :   // Convert__DstIdx81_1__SrcIdx82_0
    3211             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3212             :   // Convert__DstIdx81_0__SrcIdx82_1
    3213             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3214             :   // Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2
    3215             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3216             :   // Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0
    3217             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3218             :   // Convert__DstIdx321_0__SrcIdx322_1
    3219             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3220             :   // Convert__DstIdx641_0__SrcIdx642_1
    3221             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3222             :   // Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2
    3223             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3224             :   // Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0
    3225             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3226             :   // Convert__DstIdx161_0__SrcIdx162_1
    3227             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3228             :   // Convert__regAX__ImmSExti16i81_0
    3229             :   { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3230             :   // Convert__Mem1285_0
    3231             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3232             :   // Convert__Mem85_1
    3233             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3234             :   // Convert__Imm1_0__Imm1_1
    3235             :   { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3236             :   // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
    3237             :   { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3238             :   // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
    3239             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3240             :   // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
    3241             :   { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3242             :   // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
    3243             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3244             :   // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2
    3245             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3246             :   // Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0
    3247             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3248             :   // Convert__regST1
    3249             :   { CVT_regST1, 0, CVT_Done },
    3250             :   // Convert__regST0
    3251             :   { CVT_regST0, 0, CVT_Done },
    3252             :   // Convert__Mem805_0
    3253             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3254             :   // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
    3255             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3256             :   // Convert__Reg1_0__Reg1_0__Imm1_1
    3257             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3258             :   // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
    3259             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3260             :   // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
    3261             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3262             :   // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
    3263             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3264             :   // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
    3265             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3266             :   // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
    3267             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3268             :   // Convert__Reg1_0__Mem165_1__Imm1_2
    3269             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3270             :   // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
    3271             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3272             :   // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
    3273             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3274             :   // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
    3275             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3276             :   // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
    3277             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3278             :   // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
    3279             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3280             :   // Convert__Reg1_1__Reg1_1__Imm1_0
    3281             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3282             :   // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
    3283             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3284             :   // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
    3285             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3286             :   // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
    3287             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3288             :   // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
    3289             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3290             :   // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
    3291             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3292             :   // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
    3293             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3294             :   // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
    3295             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3296             :   // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
    3297             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3298             :   // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
    3299             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3300             :   // Convert__Reg1_2__Mem165_1__Imm1_0
    3301             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3302             :   // Convert__ImmUnsignedi81_1
    3303             :   { CVT_95_addImmOperands, 2, CVT_Done },
    3304             :   // Convert__ImmUnsignedi81_0
    3305             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3306             :   // Convert__DstIdx161_0
    3307             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3308             :   // Convert__DstIdx321_0
    3309             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3310             :   // Convert__DstIdx81_0
    3311             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3312             :   // Convert__DstIdx81_1
    3313             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3314             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
    3315             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3316             :   // Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
    3317             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_4_4, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3318             :   // Convert__DstIdx321_1
    3319             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3320             :   // Convert__DstIdx161_1
    3321             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3322             :   // Convert__Mem5_1
    3323             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3324             :   // Convert__SrcIdx162_0
    3325             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3326             :   // Convert__SrcIdx322_0
    3327             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3328             :   // Convert__SrcIdx642_0
    3329             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3330             :   // Convert__SrcIdx82_0
    3331             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3332             :   // Convert__SrcIdx82_1
    3333             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3334             :   // Convert__SrcIdx162_1
    3335             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3336             :   // Convert__SrcIdx322_1
    3337             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3338             :   // Convert__SrcIdx642_1
    3339             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3340             :   // Convert__MemOffs16_82_1
    3341             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3342             :   // Convert__MemOffs32_82_1
    3343             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3344             :   // Convert__MemOffs16_162_1
    3345             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3346             :   // Convert__MemOffs32_162_1
    3347             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3348             :   // Convert__MemOffs16_322_1
    3349             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3350             :   // Convert__MemOffs32_322_1
    3351             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3352             :   // Convert__MemOffs32_642_1
    3353             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3354             :   // Convert__MemOffs16_162_0
    3355             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3356             :   // Convert__MemOffs16_322_0
    3357             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3358             :   // Convert__MemOffs16_82_0
    3359             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3360             :   // Convert__MemOffs32_162_0
    3361             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3362             :   // Convert__MemOffs32_322_0
    3363             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3364             :   // Convert__MemOffs32_642_0
    3365             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3366             :   // Convert__MemOffs32_82_0
    3367             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3368             :   // Convert__MemOffs64_82_1
    3369             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3370             :   // Convert__MemOffs64_162_1
    3371             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3372             :   // Convert__MemOffs64_322_1
    3373             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3374             :   // Convert__MemOffs64_642_1
    3375             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3376             :   // Convert__MemOffs64_162_0
    3377             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3378             :   // Convert__MemOffs64_322_0
    3379             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3380             :   // Convert__MemOffs64_642_0
    3381             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3382             :   // Convert__MemOffs64_82_0
    3383             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3384             :   // Convert__Reg1_0__Mem5125_1
    3385             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3386             :   // Convert__Reg1_1__Mem5125_0
    3387             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3388             :   // Convert__GR32orGR641_1__Reg1_0
    3389             :   { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
    3390             :   // Convert__GR32orGR641_0__Reg1_1
    3391             :   { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
    3392             :   // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17
    3393             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
    3394             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17
    3395             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
    3396             :   // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17
    3397             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
    3398             :   // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17
    3399             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
    3400             :   // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1
    3401             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
    3402             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1
    3403             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
    3404             :   // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1
    3405             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
    3406             :   // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1
    3407             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    3408             :   // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16
    3409             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
    3410             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16
    3411             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
    3412             :   // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16
    3413             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
    3414             :   // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16
    3415             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
    3416             :   // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0
    3417             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
    3418             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0
    3419             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
    3420             :   // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0
    3421             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
    3422             :   // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0
    3423             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    3424             :   // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
    3425             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3426             :   // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
    3427             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3428             :   // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
    3429             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3430             :   // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
    3431             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3432             :   // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
    3433             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3434             :   // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
    3435             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3436             :   // Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2
    3437             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3438             :   // Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2
    3439             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3440             :   // Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0
    3441             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3442             :   // Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0
    3443             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3444             :   // Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2
    3445             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3446             :   // Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0
    3447             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3448             :   // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
    3449             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3450             :   // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3451             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3452             :   // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1
    3453             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
    3454             :   // Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0
    3455             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
    3456             :   // Convert__ImmSExti64i81_0
    3457             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3458             :   // Convert__ImmSExti16i81_0
    3459             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3460             :   // Convert__ImmSExti32i81_0
    3461             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3462             :   // Convert__Mem165_0__ImmUnsignedi81_1
    3463             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3464             :   // Convert__Mem325_0__ImmUnsignedi81_1
    3465             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3466             :   // Convert__Mem645_0__ImmUnsignedi81_1
    3467             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3468             :   // Convert__Mem85_0__ImmUnsignedi81_1
    3469             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3470             :   // Convert__Reg1_1__Tie0_1_1
    3471             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Done },
    3472             :   // Convert__Mem85_1__ImmUnsignedi81_0
    3473             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3474             :   // Convert__Mem325_1__ImmUnsignedi81_0
    3475             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3476             :   // Convert__Mem645_1__ImmUnsignedi81_0
    3477             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3478             :   // Convert__Mem165_1__ImmUnsignedi81_0
    3479             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3480             :   // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
    3481             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3482             :   // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3483             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3484             :   // Convert__DstIdx641_0
    3485             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3486             :   // Convert__DstIdx641_1
    3487             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3488             :   // Convert__Mem325_2__Reg1_1
    3489             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
    3490             :   // Convert__Mem645_2__Reg1_1
    3491             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
    3492             :   // Convert__Mem165_2__Reg1_1
    3493             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
    3494             :   // Convert__GR32orGR641_0
    3495             :   { CVT_95_addGR32orGR64Operands, 1, CVT_Done },
    3496             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2
    3497             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3498             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0
    3499             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3500             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5
    3501             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3502             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0
    3503             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3504             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6
    3505             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3506             :   // Convert__Reg1_0__Reg1_1__Mem1285_2
    3507             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3508             :   // Convert__Reg1_0__Reg1_1__Mem2565_2
    3509             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3510             :   // Convert__Reg1_0__Reg1_1__Mem5125_2
    3511             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3512             :   // Convert__Reg1_2__Reg1_1__Mem1285_0
    3513             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3514             :   // Convert__Reg1_2__Reg1_1__Mem2565_0
    3515             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3516             :   // Convert__Reg1_2__Reg1_1__Mem5125_0
    3517             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3518             :   // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
    3519             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
    3520             :   // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
    3521             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3522             :   // Convert__Reg1_3__Reg1_2__Mem645_0
    3523             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3524             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5
    3525             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
    3526             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0
    3527             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3528             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5
    3529             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3530             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5
    3531             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3532             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0
    3533             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3534             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0
    3535             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3536             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
    3537             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
    3538             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
    3539             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3540             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5
    3541             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3542             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
    3543             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3544             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
    3545             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3546             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
    3547             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3548             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
    3549             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
    3550             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
    3551             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3552             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
    3553             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3554             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
    3555             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3556             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
    3557             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3558             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0
    3559             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3560             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
    3561             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3562             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
    3563             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
    3564             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
    3565             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3566             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
    3567             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3568             :   // Convert__Reg1_3__Reg1_2__Mem325_0
    3569             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3570             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5
    3571             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3572             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0
    3573             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3574             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
    3575             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3576             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
    3577             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3578             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0
    3579             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3580             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0
    3581             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3582             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0
    3583             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3584             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0
    3585             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3586             :   // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
    3587             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3588             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
    3589             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3590             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
    3591             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3592             :   // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
    3593             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3594             :   // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3595             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3596             :   // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3597             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3598             :   // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3599             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3600             :   // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3601             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3602             :   // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
    3603             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3604             :   // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3605             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3606             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
    3607             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3608             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
    3609             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3610             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
    3611             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3612             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
    3613             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3614             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3615             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3616             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3617             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3618             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3619             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3620             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3621             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3622             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
    3623             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3624             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
    3625             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3626             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
    3627             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3628             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
    3629             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3630             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
    3631             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3632             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3633             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3634             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3635             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3636             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3637             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3638             :   // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3639             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3640             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3641             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3642             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
    3643             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3644             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3645             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3646             :   // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
    3647             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3648             :   // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3649             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3650             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
    3651             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3652             :   // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3653             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3654             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
    3655             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3656             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3657             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3658             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
    3659             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
    3660             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
    3661             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3662             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
    3663             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3664             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
    3665             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3666             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
    3667             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3668             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
    3669             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3670             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
    3671             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3672             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
    3673             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
    3674             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
    3675             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    3676             :   // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
    3677             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3678             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
    3679             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    3680             :   // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
    3681             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3682             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0
    3683             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3684             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4
    3685             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3686             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4
    3687             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3688             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0
    3689             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3690             :   // Convert__Reg1_1__Reg1_3__Reg1_0
    3691             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3692             :   // Convert__Reg1_0__Reg1_2__Reg1_5
    3693             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
    3694             :   // Convert__Reg1_0__Reg1_2__Mem645_5
    3695             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3696             :   // Convert__Reg1_1__Reg1_3__Mem645_0
    3697             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3698             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4
    3699             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3700             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0
    3701             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3702             :   // Convert__Reg1_0__Reg1_2__Mem1285_5
    3703             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3704             :   // Convert__Reg1_1__Reg1_3__Mem1285_0
    3705             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3706             :   // Convert__Reg1_0__Mem2565_1
    3707             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3708             :   // Convert__Reg1_1__Mem2565_0
    3709             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3710             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4
    3711             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3712             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0
    3713             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3714             :   // Convert__Reg1_0__Reg1_2__Mem2565_5
    3715             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3716             :   // Convert__Reg1_1__Reg1_3__Mem2565_0
    3717             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3718             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4
    3719             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3720             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0
    3721             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3722             :   // Convert__Reg1_0__Reg1_2__Mem325_5
    3723             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3724             :   // Convert__Reg1_1__Reg1_3__Mem325_0
    3725             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3726             :   // Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0
    3727             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3728             :   // Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0
    3729             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3730             :   // Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0
    3731             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3732             :   // Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0
    3733             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3734             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0
    3735             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3736             :   // Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0
    3737             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3738             :   // Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0
    3739             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3740             :   // Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0
    3741             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3742             :   // Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0
    3743             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3744             :   // Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0
    3745             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3746             :   // Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0
    3747             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3748             :   // Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0
    3749             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3750             :   // Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0
    3751             :   { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3752             :   // Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0
    3753             :   { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3754             :   // Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0
    3755             :   { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3756             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0
    3757             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3758             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0
    3759             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3760             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0
    3761             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3762             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0
    3763             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3764             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0
    3765             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3766             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0
    3767             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3768             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0
    3769             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3770             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0
    3771             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3772             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0
    3773             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3774             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0
    3775             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3776             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0
    3777             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3778             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0
    3779             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3780             :   // Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0
    3781             :   { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3782             :   // Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0
    3783             :   { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3784             :   // Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0
    3785             :   { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3786             :   // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
    3787             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3788             :   // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3789             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3790             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
    3791             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3792             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
    3793             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3794             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
    3795             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3796             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
    3797             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3798             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
    3799             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3800             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
    3801             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3802             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3803             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3804             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
    3805             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3806             :   // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
    3807             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3808             :   // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3809             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3810             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
    3811             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3812             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3813             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3814             :   // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
    3815             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3816             :   // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3817             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3818             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
    3819             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3820             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3821             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3822             :   // Convert__Reg1_2__Reg1_1
    3823             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3824             :   // Convert__Mem2565_1__Reg1_0
    3825             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3826             :   // Convert__Mem5125_1__Reg1_0
    3827             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3828             :   // Convert__Mem2565_0__Reg1_1
    3829             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    3830             :   // Convert__Mem5125_0__Reg1_1
    3831             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    3832             :   // Convert__Mem1285_1__Reg1_3__Reg1_0
    3833             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3834             :   // Convert__Mem2565_1__Reg1_3__Reg1_0
    3835             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3836             :   // Convert__Mem5125_1__Reg1_3__Reg1_0
    3837             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3838             :   // Convert__Mem1285_0__Reg1_2__Reg1_4
    3839             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3840             :   // Convert__Mem2565_0__Reg1_2__Reg1_4
    3841             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3842             :   // Convert__Mem5125_0__Reg1_2__Reg1_4
    3843             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3844             :   // Convert__Reg1_2__Mem325_0
    3845             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3846             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0
    3847             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3848             :   // Convert__Reg1_2__Reg1_4__Mem325_0
    3849             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3850             :   // Convert__Reg1_0__Reg1_1__AVX512RC1_2
    3851             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
    3852             :   // Convert__Reg1_2__Reg1_1__AVX512RC1_0
    3853             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3854             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4
    3855             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3856             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0
    3857             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3858             :   // Convert__Reg1_0__Reg1_2__Mem5125_5
    3859             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3860             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5
    3861             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
    3862             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0
    3863             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3864             :   // Convert__Reg1_1__Reg1_3__Mem5125_0
    3865             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3866             :   // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
    3867             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
    3868             :   // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
    3869             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3870             :   // Convert__Reg1_2__Mem645_0
    3871             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3872             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0
    3873             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3874             :   // Convert__Reg1_2__Reg1_4__Mem645_0
    3875             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3876             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1
    3877             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
    3878             :   // Convert__Reg1_2__Reg1_4__Reg1_1
    3879             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
    3880             :   // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
    3881             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3882             :   // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
    3883             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3884             :   // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
    3885             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3886             :   // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
    3887             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3888             :   // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
    3889             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
    3890             :   // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3891             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3892             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3893             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3894             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3895             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3896             :   // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3897             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3898             :   // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3899             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3900             :   // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3901             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3902             :   // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3903             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3904             :   // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3905             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3906             :   // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3907             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3908             :   // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
    3909             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3910             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6
    3911             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
    3912             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0
    3913             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3914             :   // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3915             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3916             :   // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
    3917             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3918             :   // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
    3919             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3920             :   // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
    3921             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
    3922             :   // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
    3923             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
    3924             :   // Convert__Reg1_3__Reg1_2__Reg1_1
    3925             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3926             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1
    3927             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3928             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
    3929             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3930             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3
    3931             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3932             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3
    3933             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3934             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3
    3935             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3936             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3
    3937             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3938             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3939             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3940             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3941             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3942             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3943             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3944             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3945             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3946             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4
    3947             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3948             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4
    3949             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3950             :   // Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3951             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3952             :   // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3953             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3954             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
    3955             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3956             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
    3957             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3958             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
    3959             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3960             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
    3961             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3962             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
    3963             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3964             :   // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3965             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3966             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
    3967             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3968             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
    3969             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3970             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4
    3971             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3972             :   // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3973             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3974             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
    3975             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3976             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3
    3977             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3978             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3979             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3980             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
    3981             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3982             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3983             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3984             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
    3985             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3986             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3
    3987             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3988             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3989             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3990             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
    3991             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3992             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3993             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3994             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
    3995             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3996             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0
    3997             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3998             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
    3999             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    4000             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2
    4001             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    4002             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2
    4003             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    4004             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0
    4005             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4006             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0
    4007             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4008             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2
    4009             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    4010             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3
    4011             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
    4012             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0
    4013             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    4014             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0
    4015             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    4016             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6
    4017             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
    4018             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6
    4019             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    4020             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6
    4021             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    4022             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6
    4023             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    4024             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
    4025             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
    4026             :   // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2
    4027             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    4028             :   // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0
    4029             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    4030             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6
    4031             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    4032             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0
    4033             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4034             :   // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0
    4035             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4036             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
    4037             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    4038             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
    4039             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    4040             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
    4041             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4042             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
    4043             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4044             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
    4045             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    4046             :   // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
    4047             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    4048             :   // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
    4049             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    4050             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
    4051             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4052             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
    4053             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    4054             :   // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
    4055             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    4056             :   // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
    4057             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    4058             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
    4059             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    4060             :   // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
    4061             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    4062             :   // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
    4063             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    4064             :   // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
    4065             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
    4066             :   // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    4067             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4068             :   // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
    4069             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4070             :   // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
    4071             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4072             :   // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
    4073             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4074             :   // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
    4075             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    4076             :   // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
    4077             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4078             :   // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
    4079             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4080             :   // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
    4081             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4082             :   // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    4083             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4084             :   // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
    4085             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4086             :   // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    4087             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4088             :   // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
    4089             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4090             :   // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
    4091             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
    4092             :   // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
    4093             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    4094             :   // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
    4095             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4096             :   // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
    4097             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4098             :   // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5
    4099             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4100             :   // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0
    4101             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4102             :   // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5
    4103             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4104             :   // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0
    4105             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4106             :   // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1
    4107             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
    4108             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3
    4109             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
    4110             :   // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1
    4111             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
    4112             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3
    4113             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
    4114             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4
    4115             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4116             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4
    4117             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4118             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4
    4119             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4120             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0
    4121             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4122             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0
    4123             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4124             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0
    4125             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4126             :   // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1
    4127             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
    4128             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3
    4129             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
    4130             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4
    4131             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4132             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4
    4133             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4134             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0
    4135             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4136             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0
    4137             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4138             :   // Convert__Reg1_1__Mem512_RC256X5_3
    4139             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
    4140             :   // Convert__Reg1_2__Mem512_RC256X5_0
    4141             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    4142             :   // Convert__Reg1_1__Mem512_RC5125_3
    4143             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
    4144             :   // Convert__Reg1_2__Mem512_RC5125_0
    4145             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    4146             :   // Convert__Reg1_1__Mem256_RC5125_3
    4147             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
    4148             :   // Convert__Reg1_2__Mem256_RC5125_0
    4149             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    4150             :   // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1
    4151             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
    4152             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3
    4153             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
    4154             :   // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1
    4155             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
    4156             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3
    4157             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
    4158             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4
    4159             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4160             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4
    4161             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4162             :   // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4
    4163             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
    4164             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0
    4165             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4166             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0
    4167             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4168             :   // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0
    4169             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
    4170             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5
    4171             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4172             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5
    4173             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4174             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5
    4175             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4176             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0
    4177             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4178             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0
    4179             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4180             :   // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0
    4181             :   { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4182             :   // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
    4183             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    4184             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6
    4185             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    4186             :   // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
    4187             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    4188             :   // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
    4189             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    4190             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0
    4191             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4192             :   // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
    4193             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    4194             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6
    4195             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    4196             :   // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0
    4197             :   { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4198             :   // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
    4199             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    4200             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
    4201             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    4202             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
    4203             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
    4204             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
    4205             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    4206             :   // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4
    4207             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    4208             :   // Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0
    4209             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4210             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7
    4211             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    4212             :   // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
    4213             :   { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4214             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8
    4215             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    4216             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
    4217             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4218             :   // Convert__Mem1285_2__Reg1_1__Reg1_0
    4219             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    4220             :   // Convert__Mem2565_2__Reg1_1__Reg1_0
    4221             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    4222             :   // Convert__Mem1285_0__Reg1_1__Reg1_2
    4223             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    4224             :   // Convert__Mem2565_0__Reg1_1__Reg1_2
    4225             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    4226             :   // Convert__Reg1_0__Reg1_2__Reg1_4
    4227             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4228             :   // Convert__Mem645_1__Reg1_3__Reg1_0
    4229             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    4230             :   // Convert__Mem645_0__Reg1_2__Reg1_4
    4231             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4232             :   // Convert__Mem325_1__Reg1_3__Reg1_0
    4233             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    4234             :   // Convert__Mem325_0__Reg1_2__Reg1_4
    4235             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4236             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4
    4237             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    4238             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0
    4239             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4240             :   // Convert__Reg1_0__Reg1_2__Mem85_5
    4241             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    4242             :   // Convert__Reg1_1__Reg1_3__Mem85_0
    4243             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4244             :   // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4
    4245             :   { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    4246             :   // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0
    4247             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4248             :   // Convert__Reg1_0__Reg1_2__Mem165_5
    4249             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    4250             :   // Convert__Reg1_1__Reg1_3__Mem165_0
    4251             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4252             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
    4253             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
    4254             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
    4255             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
    4256             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
    4257             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
    4258             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17
    4259             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
    4260             :   // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17
    4261             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
    4262             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
    4263             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
    4264             :   // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17
    4265             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
    4266             :   // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17
    4267             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
    4268             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
    4269             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
    4270             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
    4271             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
    4272             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
    4273             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
    4274             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1
    4275             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
    4276             :   // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1
    4277             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
    4278             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
    4279             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    4280             :   // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1
    4281             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    4282             :   // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1
    4283             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    4284             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
    4285             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
    4286             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
    4287             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
    4288             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
    4289             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
    4290             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16
    4291             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
    4292             :   // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16
    4293             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
    4294             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
    4295             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
    4296             :   // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16
    4297             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
    4298             :   // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16
    4299             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
    4300             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
    4301             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
    4302             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
    4303             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
    4304             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
    4305             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
    4306             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0
    4307             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
    4308             :   // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0
    4309             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
    4310             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
    4311             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    4312             :   // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0
    4313             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    4314             :   // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0
    4315             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    4316             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4
    4317             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4318             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4
    4319             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4320             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4
    4321             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4322             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4
    4323             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4324             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4
    4325             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4326             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
    4327             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4328             :   // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0
    4329             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4330             :   // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0
    4331             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4332             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    4333             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4334             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    4335             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4336             :   // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
    4337             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    4338             :   // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
    4339             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    4340             :   // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
    4341             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4342             :   // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
    4343             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4344             :   // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
    4345             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    4346             :   // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
    4347             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4348             :   // Convert__Mem165_1__Reg1_3__Reg1_0
    4349             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    4350             :   // Convert__Mem165_0__Reg1_2__Reg1_4
    4351             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4352             :   // Convert__Reg1_2__Mem1285_1__Reg1_0
    4353             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    4354             :   // Convert__Reg1_0__Mem1285_1__Reg1_2
    4355             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
    4356             :   // Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0
    4357             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4358             :   // Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0
    4359             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4360             :   // Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0
    4361             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4362             :   // Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4
    4363             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4364             :   // Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4
    4365             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4366             :   // Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4
    4367             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4368             :   // Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0
    4369             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4370             :   // Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0
    4371             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4372             :   // Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4
    4373             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4374             :   // Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4
    4375             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4376             :   // Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0
    4377             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4378             :   // Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0
    4379             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4380             :   // Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0
    4381             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
    4382             :   // Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4
    4383             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4384             :   // Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4
    4385             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4386             :   // Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4
    4387             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
    4388             :   // Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2
    4389             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_2_2, CVT_Done },
    4390             :   // Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1
    4391             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_1_1, CVT_Done },
    4392             :   // Convert__AbsMem161_0
    4393             :   { CVT_95_addAbsMemOperands, 1, CVT_Done },
    4394             :   // Convert__Reg1_1__Tie0_2_2
    4395             :   { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done },
    4396             :   // Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1
    4397             :   { CVT_regEAX, 0, CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_1_1, CVT_Done },
    4398             : };
    4399             : 
    4400      127636 : void X86AsmParser::
    4401             : convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
    4402             :                 const OperandVector &Operands) {
    4403             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    4404      127636 :   const uint8_t *Converter = ConversionTable[Kind];
    4405             :   unsigned OpIdx;
    4406             :   Inst.setOpcode(Opcode);
    4407      838702 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    4408      355533 :     OpIdx = *(p + 1);
    4409      355533 :     switch (*p) {
    4410           0 :     default: llvm_unreachable("invalid conversion entry!");
    4411           0 :     case CVT_Reg:
    4412           0 :       static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
    4413             :       break;
    4414       44735 :     case CVT_Tied: {
    4415             :       assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
    4416             :                           std::begin(TiedAsmOperandTable)) &&
    4417             :              "Tied operand not found");
    4418       44735 :       unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
    4419             :       Inst.addOperand(Inst.getOperand(TiedResOpnd));
    4420             :       break;
    4421             :     }
    4422             :     case CVT_imm_95_10:
    4423          52 :       Inst.addOperand(MCOperand::createImm(10));
    4424             :       break;
    4425       21578 :     case CVT_95_addImmOperands:
    4426       21578 :       static_cast<X86Operand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
    4427             :       break;
    4428             :     case CVT_regAX:
    4429          30 :       Inst.addOperand(MCOperand::createReg(X86::AX));
    4430             :       break;
    4431             :     case CVT_regEAX:
    4432         196 :       Inst.addOperand(MCOperand::createReg(X86::EAX));
    4433             :       break;
    4434             :     case CVT_regRAX:
    4435          42 :       Inst.addOperand(MCOperand::createReg(X86::RAX));
    4436             :       break;
    4437      205231 :     case CVT_95_Reg:
    4438      410462 :       static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
    4439             :       break;
    4440       78052 :     case CVT_95_addMemOperands:
    4441      156104 :       static_cast<X86Operand&>(*Operands[OpIdx]).addMemOperands(Inst, 5);
    4442             :       break;
    4443        1309 :     case CVT_95_addAbsMemOperands:
    4444        2618 :       static_cast<X86Operand&>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1);
    4445             :       break;
    4446         548 :     case CVT_95_addDstIdxOperands:
    4447        1096 :       static_cast<X86Operand&>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1);
    4448             :       break;
    4449         501 :     case CVT_95_addSrcIdxOperands:
    4450        1002 :       static_cast<X86Operand&>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2);
    4451             :       break;
    4452         303 :     case CVT_95_addGR32orGR64Operands:
    4453         606 :       static_cast<X86Operand&>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1);
    4454             :       break;
    4455             :     case CVT_regST1:
    4456         342 :       Inst.addOperand(MCOperand::createReg(X86::ST1));
    4457             :       break;
    4458             :     case CVT_regST0:
    4459          24 :       Inst.addOperand(MCOperand::createReg(X86::ST0));
    4460             :       break;
    4461          64 :     case CVT_95_addMemOffsOperands:
    4462         128 :       static_cast<X86Operand&>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2);
    4463             :       break;
    4464             :     case CVT_imm_95_17:
    4465          10 :       Inst.addOperand(MCOperand::createImm(17));
    4466             :       break;
    4467             :     case CVT_imm_95_1:
    4468           8 :       Inst.addOperand(MCOperand::createImm(1));
    4469             :       break;
    4470             :     case CVT_imm_95_16:
    4471          10 :       Inst.addOperand(MCOperand::createImm(16));
    4472             :       break;
    4473             :     case CVT_imm_95_0:
    4474           8 :       Inst.addOperand(MCOperand::createImm(0));
    4475             :       break;
    4476        2851 :     case CVT_95_addAVX512RCOperands:
    4477        2851 :       static_cast<X86Operand&>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1);
    4478             :       break;
    4479             :     }
    4480             :   }
    4481      127636 : }
    4482             : 
    4483         436 : void X86AsmParser::
    4484             : convertToMapAndConstraints(unsigned Kind,
    4485             :                            const OperandVector &Operands) {
    4486             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    4487             :   unsigned NumMCOperands = 0;
    4488         436 :   const uint8_t *Converter = ConversionTable[Kind];
    4489        1936 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    4490         750 :     switch (*p) {
    4491           0 :     default: llvm_unreachable("invalid conversion entry!");
    4492           0 :     case CVT_Reg:
    4493           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4494           0 :       Operands[*(p + 1)]->setConstraint("r");
    4495           0 :       ++NumMCOperands;
    4496           0 :       break;
    4497          11 :     case CVT_Tied:
    4498          11 :       ++NumMCOperands;
    4499          11 :       break;
    4500           0 :     case CVT_imm_95_10:
    4501           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4502           0 :       Operands[*(p + 1)]->setConstraint("");
    4503           0 :       ++NumMCOperands;
    4504           0 :       break;
    4505         113 :     case CVT_95_addImmOperands:
    4506         113 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4507         226 :       Operands[*(p + 1)]->setConstraint("m");
    4508         113 :       NumMCOperands += 1;
    4509         113 :       break;
    4510           0 :     case CVT_regAX:
    4511           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4512           0 :       Operands[*(p + 1)]->setConstraint("m");
    4513           0 :       ++NumMCOperands;
    4514           0 :       break;
    4515           0 :     case CVT_regEAX:
    4516           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4517           0 :       Operands[*(p + 1)]->setConstraint("m");
    4518           0 :       ++NumMCOperands;
    4519           0 :       break;
    4520           0 :     case CVT_regRAX:
    4521           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4522           0 :       Operands[*(p + 1)]->setConstraint("m");
    4523           0 :       ++NumMCOperands;
    4524           0 :       break;
    4525         378 :     case CVT_95_Reg:
    4526         378 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4527         756 :       Operands[*(p + 1)]->setConstraint("r");
    4528         378 :       NumMCOperands += 1;
    4529         378 :       break;
    4530         239 :     case CVT_95_addMemOperands:
    4531         239 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4532         478 :       Operands[*(p + 1)]->setConstraint("m");
    4533         239 :       NumMCOperands += 5;
    4534         239 :       break;
    4535           8 :     case CVT_95_addAbsMemOperands:
    4536           8 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4537          16 :       Operands[*(p + 1)]->setConstraint("m");
    4538           8 :       NumMCOperands += 1;
    4539           8 :       break;
    4540           0 :     case CVT_95_addDstIdxOperands:
    4541           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4542           0 :       Operands[*(p + 1)]->setConstraint("m");
    4543           0 :       NumMCOperands += 1;
    4544           0 :       break;
    4545           0 :     case CVT_95_addSrcIdxOperands:
    4546           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4547           0 :       Operands[*(p + 1)]->setConstraint("m");
    4548           0 :       NumMCOperands += 2;
    4549           0 :       break;
    4550           0 :     case CVT_95_addGR32orGR64Operands:
    4551           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4552           0 :       Operands[*(p + 1)]->setConstraint("m");
    4553           0 :       NumMCOperands += 1;
    4554           0 :       break;
    4555           0 :     case CVT_regST1:
    4556           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4557           0 :       Operands[*(p + 1)]->setConstraint("m");
    4558           0 :       ++NumMCOperands;
    4559           0 :       break;
    4560           0 :     case CVT_regST0:
    4561           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4562           0 :       Operands[*(p + 1)]->setConstraint("m");
    4563           0 :       ++NumMCOperands;
    4564           0 :       break;
    4565           1 :     case CVT_95_addMemOffsOperands:
    4566           1 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4567           2 :       Operands[*(p + 1)]->setConstraint("m");
    4568           1 :       NumMCOperands += 2;
    4569           1 :       break;
    4570           0 :     case CVT_imm_95_17:
    4571           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4572           0 :       Operands[*(p + 1)]->setConstraint("");
    4573           0 :       ++NumMCOperands;
    4574           0 :       break;
    4575           0 :     case CVT_imm_95_1:
    4576           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4577           0 :       Operands[*(p + 1)]->setConstraint("");
    4578           0 :       ++NumMCOperands;
    4579           0 :       break;
    4580           0 :     case CVT_imm_95_16:
    4581           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4582           0 :       Operands[*(p + 1)]->setConstraint("");
    4583           0 :       ++NumMCOperands;
    4584           0 :       break;
    4585           0 :     case CVT_imm_95_0:
    4586           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4587           0 :       Operands[*(p + 1)]->setConstraint("");
    4588           0 :       ++NumMCOperands;
    4589           0 :       break;
    4590           0 :     case CVT_95_addAVX512RCOperands:
    4591           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4592           0 :       Operands[*(p + 1)]->setConstraint("m");
    4593           0 :       NumMCOperands += 1;
    4594           0 :       break;
    4595             :     }
    4596             :   }
    4597         436 : }
    4598             : 
    4599             : namespace {
    4600             : 
    4601             : /// MatchClassKind - The kinds of classes which participate in
    4602             : /// instruction matching.
    4603             : enum MatchClassKind {
    4604             :   InvalidMatchClass = 0,
    4605             :   OptionalMatchClass = 1,
    4606             :   MCK__STAR_, // '*'
    4607             :   MCK_b, // 'b'
    4608             :   MCK_d, // 'd'
    4609             :   MCK_pd, // 'pd'
    4610             :   MCK_ps, // 'ps'
    4611             :   MCK_q, // 'q'
    4612             :   MCK_sae, // 'sae'
    4613             :   MCK_sd, // 'sd'
    4614             :   MCK_ss, // 'ss'
    4615             :   MCK_ub, // 'ub'
    4616             :   MCK_ud, // 'ud'
    4617             :   MCK_uq, // 'uq'
    4618             :   MCK_uw, // 'uw'
    4619             :   MCK_w, // 'w'
    4620             :   MCK__123_, // '{'
    4621             :   MCK__123_1to16_125_, // '{1to16}'
    4622             :   MCK__123_1to2_125_, // '{1to2}'
    4623             :   MCK__123_1to4_125_, // '{1to4}'
    4624             :   MCK__123_1to8_125_, // '{1to8}'
    4625             :   MCK__123_sae_125_, // '{sae}'
    4626             :   MCK__123_z_125_, // '{z}'
    4627             :   MCK__125_, // '}'
    4628             :   MCK_LAST_TOKEN = MCK__125_,
    4629             :   MCK_Reg49, // derived register class
    4630             :   MCK_Reg51, // derived register class
    4631             :   MCK_AL, // register class 'AL'
    4632             :   MCK_AX, // register class 'AX'
    4633             :   MCK_CCR, // register class 'CCR'
    4634             :   MCK_CL, // register class 'CL'
    4635             :   MCK_CS, // register class 'CS'
    4636             :   MCK_DFCCR, // register class 'DFCCR'
    4637             :   MCK_DS, // register class 'DS'
    4638             :   MCK_DX, // register class 'DX'
    4639             :   MCK_EAX, // register class 'EAX'
    4640             :   MCK_EBX, // register class 'EBX'
    4641             :   MCK_ECX, // register class 'ECX'
    4642             :   MCK_EDX, // register class 'EDX'
    4643             :   MCK_ES, // register class 'ES'
    4644             :   MCK_FPCCR, // register class 'FPCCR'
    4645             :   MCK_FS, // register class 'FS'
    4646             :   MCK_GS, // register class 'GS'
    4647             :   MCK_RAX, // register class 'RAX'
    4648             :   MCK_RBX, // register class 'RBX'
    4649             :   MCK_RCX, // register class 'RCX'
    4650             :   MCK_RDX, // register class 'RDX'
    4651             :   MCK_SS, // register class 'SS'
    4652             :   MCK_ST0, // register class 'ST0'
    4653             :   MCK_XMM0, // register class 'XMM0'
    4654             :   MCK_Reg50, // derived register class
    4655             :   MCK_GR32_AD, // register class 'GR32_AD'
    4656             :   MCK_GR64_AD, // register class 'GR64_AD'
    4657             :   MCK_Reg29, // derived register class
    4658             :   MCK_GR32_TC, // register class 'GR32_TC'
    4659             :   MCK_Reg45, // derived register class
    4660             :   MCK_BNDR, // register class 'BNDR'
    4661             :   MCK_GR16_ABCD, // register class 'GR16_ABCD'
    4662             :   MCK_GR32_ABCD, // register class 'GR32_ABCD'
    4663             :   MCK_GR64_ABCD, // register class 'GR64_ABCD'
    4664             :   MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
    4665             :   MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
    4666             :   MCK_Reg37, // derived register class
    4667             :   MCK_Reg40, // derived register class
    4668             :   MCK_Reg43, // derived register class
    4669             :   MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
    4670             :   MCK_Reg41, // derived register class
    4671             :   MCK_Reg44, // derived register class
    4672             :   MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
    4673             :   MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
    4674             :   MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
    4675             :   MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM'
    4676             :   MCK_Reg32, // derived register class
    4677             :   MCK_Reg38, // derived register class
    4678             :   MCK_Reg63, // derived register class
    4679             :   MCK_Reg66, // derived register class
    4680             :   MCK_GR16_NOREX, // register class 'GR16_NOREX'
    4681             :   MCK_GR32_NOREX, // register class 'GR32_NOREX'
    4682             :   MCK_GR64_TCW64, // register class 'GR64_TCW64'
    4683             :   MCK_GR8_NOREX, // register class 'GR8_NOREX'
    4684             :   MCK_RST, // register class 'RST'
    4685             :   MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64'
    4686             :   MCK_VR128H, // register class 'VR128H'
    4687             :   MCK_VR128L, // register class 'VR128L'
    4688             :   MCK_VR256H, // register class 'VR256H'
    4689             :   MCK_VR256L, // register class 'VR256L'
    4690             :   MCK_VR64, // register class 'VR64'
    4691             :   MCK_Reg22, // derived register class
    4692             :   MCK_GR64_NOREX, // register class 'GR64_NOREX'
    4693             :   MCK_GR64_TC, // register class 'GR64_TC'
    4694             :   MCK_GRH16, // register class 'GRH16'
    4695             :   MCK_GR32_NOSP, // register class 'GR32_NOSP'
    4696             :   MCK_GR64_NOSP, // register class 'GR64_NOSP'
    4697             :   MCK_Reg33, // derived register class
    4698             :   MCK_Reg64, // derived register class
    4699             :   MCK_CONTROL_REG, // register class 'CONTROL_REG'
    4700             :   MCK_DEBUG_REG, // register class 'DEBUG_REG'
    4701             :   MCK_FR32, // register class 'FR32,FR64,FR128,VR128'
    4702             :   MCK_GR16, // register class 'GR16'
    4703             :   MCK_GR32, // register class 'GR32'
    4704             :   MCK_VR256, // register class 'VR256'
    4705             :   MCK_Reg19, // derived register class
    4706             :   MCK_GR64, // register class 'GR64'
    4707             :   MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS'
    4708             :   MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP'
    4709             :   MCK_GR8, // register class 'GR8'
    4710             :   MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
    4711             :   MCK_VR256X, // register class 'VR256X'
    4712             :   MCK_VR512, // register class 'VR512'
    4713             :   MCK_LAST_REGISTER = MCK_VR512,
    4714             :   MCK_AVX512RC, // user defined class 'AVX512RCOperand'
    4715             :   MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
    4716             :   MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
    4717             :   MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
    4718             :   MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
    4719             :   MCK_Imm, // user defined class 'ImmAsmOperand'
    4720             :   MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
    4721             :   MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
    4722             :   MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
    4723             :   MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
    4724             :   MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
    4725             :   MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
    4726             :   MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
    4727             :   MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
    4728             :   MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
    4729             :   MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
    4730             :   MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
    4731             :   MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
    4732             :   MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
    4733             :   MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
    4734             :   MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
    4735             :   MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
    4736             :   MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
    4737             :   MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
    4738             :   MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
    4739             :   MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
    4740             :   MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
    4741             :   MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
    4742             :   MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
    4743             :   MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
    4744             :   MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand'
    4745             :   MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand'
    4746             :   MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand'
    4747             :   MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand'
    4748             :   MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
    4749             :   MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
    4750             :   MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand'
    4751             :   MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand'
    4752             :   MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand'
    4753             :   MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand'
    4754             :   MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand'
    4755             :   MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
    4756             :   MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
    4757             :   MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand'
    4758             :   MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand'
    4759             :   MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
    4760             :   MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand'
    4761             :   MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand'
    4762             :   MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
    4763             :   MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
    4764             :   MCK_Mem, // user defined class 'X86MemAsmOperand'
    4765             :   NumMatchClassKinds
    4766             : };
    4767             : 
    4768             : }
    4769             : 
    4770             : static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
    4771             :   return MCTargetAsmParser::Match_InvalidOperand;
    4772             : }
    4773             : 
    4774      139226 : static MatchClassKind matchTokenString(StringRef Name) {
    4775      139226 :   switch (Name.size()) {
    4776             :   default: break;
    4777       59230 :   case 1:        // 7 strings to match.
    4778       59230 :     switch (Name[0]) {
    4779             :     default: break;
    4780             :     case '*':    // 1 string to match.
    4781             :       return MCK__STAR_;         // "*"
    4782         510 :     case 'b':    // 1 string to match.
    4783         510 :       return MCK_b;      // "b"
    4784        1975 :     case 'd':    // 1 string to match.
    4785        1975 :       return MCK_d;      // "d"
    4786        2340 :     case 'q':    // 1 string to match.
    4787        2340 :       return MCK_q;      // "q"
    4788        2310 :     case 'w':    // 1 string to match.
    4789        2310 :       return MCK_w;      // "w"
    4790       25910 :     case '{':    // 1 string to match.
    4791       25910 :       return MCK__123_;  // "{"
    4792       25910 :     case '}':    // 1 string to match.
    4793       25910 :       return MCK__125_;  // "}"
    4794             :     }
    4795             :     break;
    4796       33359 :   case 2:        // 8 strings to match.
    4797       33359 :     switch (Name[0]) {
    4798             :     default: break;
    4799        9439 :     case 'p':    // 2 strings to match.
    4800        9439 :       switch (Name[1]) {
    4801             :       default: break;
    4802             :       case 'd':  // 1 string to match.
    4803             :         return MCK_pd;   // "pd"
    4804        5645 :       case 's':  // 1 string to match.
    4805        5645 :         return MCK_ps;   // "ps"
    4806             :       }
    4807             :       break;
    4808        4904 :     case 's':    // 2 strings to match.
    4809        4904 :       switch (Name[1]) {
    4810             :       default: break;
    4811             :       case 'd':  // 1 string to match.
    4812             :         return MCK_sd;   // "sd"
    4813        2662 :       case 's':  // 1 string to match.
    4814        2662 :         return MCK_ss;   // "ss"
    4815             :       }
    4816             :       break;
    4817       19016 :     case 'u':    // 4 strings to match.
    4818       19016 :       switch (Name[1]) {
    4819             :       default: break;
    4820             :       case 'b':  // 1 string to match.
    4821             :         return MCK_ub;   // "ub"
    4822             :       case 'd':  // 1 string to match.
    4823             :         return MCK_ud;   // "ud"
    4824             :       case 'q':  // 1 string to match.
    4825             :         return MCK_uq;   // "uq"
    4826             :       case 'w':  // 1 string to match.
    4827             :         return MCK_uw;   // "uw"
    4828             :       }
    4829             :       break;
    4830             :     }
    4831             :     break;
    4832        7528 :   case 3:        // 2 strings to match.
    4833        7528 :     switch (Name[0]) {
    4834             :     default: break;
    4835             :     case 's':    // 1 string to match.
    4836           0 :       if (memcmp(Name.data()+1, "ae", 2) != 0)
    4837             :         break;
    4838             :       return MCK_sae;    // "sae"
    4839             :     case '{':    // 1 string to match.
    4840        7528 :       if (memcmp(Name.data()+1, "z}", 2) != 0)
    4841             :         break;
    4842             :       return MCK__123_z_125_;    // "{z}"
    4843             :     }
    4844             :     break;
    4845             :   case 5:        // 1 string to match.
    4846         506 :     if (memcmp(Name.data()+0, "{sae}", 5) != 0)
    4847             :       break;
    4848             :     return MCK__123_sae_125_;    // "{sae}"
    4849             :   case 6:        // 3 strings to match.
    4850       25421 :     if (memcmp(Name.data()+0, "{1to", 4) != 0)
    4851             :       break;
    4852       25421 :     switch (Name[4]) {
    4853             :     default: break;
    4854         590 :     case '2':    // 1 string to match.
    4855         590 :       if (Name[5] != '}')
    4856             :         break;
    4857             :       return MCK__123_1to2_125_;         // "{1to2}"
    4858        2187 :     case '4':    // 1 string to match.
    4859        2187 :       if (Name[5] != '}')
    4860             :         break;
    4861             :       return MCK__123_1to4_125_;         // "{1to4}"
    4862       22644 :     case '8':    // 1 string to match.
    4863       22644 :       if (Name[5] != '}')
    4864             :         break;
    4865             :       return MCK__123_1to8_125_;         // "{1to8}"
    4866             :     }
    4867             :     break;
    4868             :   case 7:        // 1 string to match.
    4869       13182 :     if (memcmp(Name.data()+0, "{1to16}", 7) != 0)
    4870             :       break;
    4871             :     return MCK__123_1to16_125_;  // "{1to16}"
    4872             :   }
    4873             :   return InvalidMatchClass;
    4874             : }
    4875             : 
    4876             : /// isSubclass - Compute whether \p A is a subclass of \p B.
    4877     1707858 : static bool isSubclass(MatchClassKind A, MatchClassKind B) {
    4878     1707858 :   if (A == B)
    4879             :     return true;
    4880             : 
    4881     1483199 :   switch (A) {
    4882             :   default:
    4883             :     return false;
    4884             : 
    4885         968 :   case MCK_Reg49:
    4886             :     switch (B) {
    4887             :     default: return false;
    4888             :     case MCK_Reg50: return true;
    4889             :     case MCK_GR64_NOREX_NOSP: return true;
    4890             :     case MCK_Reg32: return true;
    4891             :     case MCK_Reg22: return true;
    4892             :     case MCK_GR64_NOREX: return true;
    4893             :     case MCK_GR64_NOSP: return true;
    4894             :     case MCK_Reg33: return true;
    4895             :     case MCK_Reg19: return true;
    4896             :     case MCK_GR64: return true;
    4897             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4898             :     }
    4899             : 
    4900           0 :   case MCK_Reg51:
    4901             :     switch (B) {
    4902             :     default: return false;
    4903             :     case MCK_Reg50: return true;
    4904             :     case MCK_Reg45: return true;
    4905             :     case MCK_Reg40: return true;
    4906             :     case MCK_Reg44: return true;
    4907             :     case MCK_GR64_TCW64: return true;
    4908             :     case MCK_GR64_NOREX: return true;
    4909             :     case MCK_GR64_TC: return true;
    4910             :     case MCK_GR64: return true;
    4911             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4912             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4913             :     }
    4914             : 
    4915        6846 :   case MCK_AL:
    4916        6846 :     switch (B) {
    4917             :     default: return false;
    4918           0 :     case MCK_GR8_ABCD_L: return true;
    4919           0 :     case MCK_GR8_NOREX: return true;
    4920         145 :     case MCK_GR8: return true;
    4921             :     }
    4922             : 
    4923        8219 :   case MCK_AX:
    4924        8219 :     switch (B) {
    4925             :     default: return false;
    4926           0 :     case MCK_GR16_ABCD: return true;
    4927           0 :     case MCK_GR16_NOREX: return true;
    4928         243 :     case MCK_GR16: return true;
    4929             :     }
    4930             : 
    4931        8266 :   case MCK_CL:
    4932        8266 :     switch (B) {
    4933             :     default: return false;
    4934           0 :     case MCK_GR8_ABCD_L: return true;
    4935           0 :     case MCK_GR8_NOREX: return true;
    4936         393 :     case MCK_GR8: return true;
    4937             :     }
    4938             : 
    4939         918 :   case MCK_CS:
    4940         918 :     return B == MCK_SEGMENT_REG;
    4941             : 
    4942         903 :   case MCK_DS:
    4943         903 :     return B == MCK_SEGMENT_REG;
    4944             : 
    4945         450 :   case MCK_DX:
    4946         450 :     switch (B) {
    4947             :     default: return false;
    4948           0 :     case MCK_GR16_ABCD: return true;
    4949           0 :     case MCK_GR16_NOREX: return true;
    4950         117 :     case MCK_GR16: return true;
    4951             :     }
    4952             : 
    4953       97878 :   case MCK_EAX:
    4954             :     switch (B) {
    4955             :     default: return false;
    4956             :     case MCK_GR32_AD: return true;
    4957             :     case MCK_GR32_TC: return true;
    4958             :     case MCK_GR32_ABCD: return true;
    4959             :     case MCK_GR32_NOREX_NOSP: return true;
    4960             :     case MCK_GR32_NOREX: return true;
    4961             :     case MCK_Reg22: return true;
    4962             :     case MCK_GR32_NOSP: return true;
    4963             :     case MCK_GR32: return true;
    4964             :     case MCK_Reg19: return true;
    4965             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4966             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4967             :     }
    4968             : 
    4969        1907 :   case MCK_EBX:
    4970             :     switch (B) {
    4971             :     default: return false;
    4972             :     case MCK_GR32_ABCD: return true;
    4973             :     case MCK_GR32_NOREX_NOSP: return true;
    4974             :     case MCK_GR32_NOREX: return true;
    4975             :     case MCK_Reg22: return true;
    4976             :     case MCK_GR32_NOSP: return true;
    4977             :     case MCK_GR32: return true;
    4978             :     case MCK_Reg19: return true;
    4979             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4980             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4981             :     }
    4982             : 
    4983        4137 :   case MCK_ECX:
    4984             :     switch (B) {
    4985             :     default: return false;
    4986             :     case MCK_GR32_TC: return true;
    4987             :     case MCK_GR32_ABCD: return true;
    4988             :     case MCK_GR32_NOREX_NOSP: return true;
    4989             :     case MCK_GR32_NOREX: return true;
    4990             :     case MCK_Reg22: return true;
    4991             :     case MCK_GR32_NOSP: return true;
    4992             :     case MCK_GR32: return true;
    4993             :     case MCK_Reg19: return true;
    4994             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4995             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4996             :     }
    4997             : 
    4998        2099 :   case MCK_EDX:
    4999             :     switch (B) {
    5000             :     default: return false;
    5001             :     case MCK_GR32_AD: return true;
    5002             :     case MCK_GR32_TC: return true;
    5003             :     case MCK_GR32_ABCD: return true;
    5004             :     case MCK_GR32_NOREX_NOSP: return true;
    5005             :     case MCK_GR32_NOREX: return true;
    5006             :     case MCK_Reg22: return true;
    5007             :     case MCK_GR32_NOSP: return true;
    5008             :     case MCK_GR32: return true;
    5009             :     case MCK_Reg19: return true;
    5010             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5011             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5012             :     }
    5013             : 
    5014         971 :   case MCK_ES:
    5015         971 :     return B == MCK_SEGMENT_REG;
    5016             : 
    5017        1345 :   case MCK_FS:
    5018        1345 :     return B == MCK_SEGMENT_REG;
    5019             : 
    5020        1403 :   case MCK_GS:
    5021        1403 :     return B == MCK_SEGMENT_REG;
    5022             : 
    5023       10045 :   case MCK_RAX:
    5024             :     switch (B) {
    5025             :     default: return false;
    5026             :     case MCK_GR64_AD: return true;
    5027             :     case MCK_Reg29: return true;
    5028             :     case MCK_Reg45: return true;
    5029             :     case MCK_GR64_ABCD: return true;
    5030             :     case MCK_Reg37: return true;
    5031             :     case MCK_Reg40: return true;
    5032             :     case MCK_Reg43: return true;
    5033             :     case MCK_Reg41: return true;
    5034             :     case MCK_Reg44: return true;
    5035             :     case MCK_GR64_NOREX_NOSP: return true;
    5036             :     case MCK_Reg32: return true;
    5037             :     case MCK_Reg38: return true;
    5038             :     case MCK_GR64_TCW64: return true;
    5039             :     case MCK_GR64_NOREX: return true;
    5040             :     case MCK_GR64_TC: return true;
    5041             :     case MCK_GR64_NOSP: return true;
    5042             :     case MCK_Reg33: return true;
    5043             :     case MCK_GR64: return true;
    5044             :     }
    5045             : 
    5046        1575 :   case MCK_RBX:
    5047             :     switch (B) {
    5048             :     default: return false;
    5049             :     case MCK_GR64_ABCD: return true;
    5050             :     case MCK_GR64_NOREX_NOSP: return true;
    5051             :     case MCK_Reg32: return true;
    5052             :     case MCK_GR64_NOREX: return true;
    5053             :     case MCK_GR64_NOSP: return true;
    5054             :     case MCK_Reg33: return true;
    5055             :     case MCK_GR64: return true;
    5056             :     }
    5057             : 
    5058        1332 :   case MCK_RCX:
    5059             :     switch (B) {
    5060             :     default: return false;
    5061             :     case MCK_Reg29: return true;
    5062             :     case MCK_Reg45: return true;
    5063             :     case MCK_GR64_ABCD: return true;
    5064             :     case MCK_Reg37: return true;
    5065             :     case MCK_Reg40: return true;
    5066             :     case MCK_Reg43: return true;
    5067             :     case MCK_Reg41: return true;
    5068             :     case MCK_Reg44: return true;
    5069             :     case MCK_GR64_NOREX_NOSP: return true;
    5070             :     case MCK_Reg32: return true;
    5071             :     case MCK_Reg38: return true;
    5072             :     case MCK_GR64_TCW64: return true;
    5073             :     case MCK_GR64_NOREX: return true;
    5074             :     case MCK_GR64_TC: return true;
    5075             :     case MCK_GR64_NOSP: return true;
    5076             :     case MCK_Reg33: return true;
    5077             :     case MCK_GR64: return true;
    5078             :     }
    5079             : 
    5080        1481 :   case MCK_RDX:
    5081             :     switch (B) {
    5082             :     default: return false;
    5083             :     case MCK_GR64_AD: return true;
    5084             :     case MCK_Reg29: return true;
    5085             :     case MCK_Reg45: return true;
    5086             :     case MCK_GR64_ABCD: return true;
    5087             :     case MCK_Reg37: return true;
    5088             :     case MCK_Reg40: return true;
    5089             :     case MCK_Reg43: return true;
    5090             :     case MCK_Reg41: return true;
    5091             :     case MCK_Reg44: return true;
    5092             :     case MCK_GR64_NOREX_NOSP: return true;
    5093             :     case MCK_Reg32: return true;
    5094             :     case MCK_Reg38: return true;
    5095             :     case MCK_GR64_TCW64: return true;
    5096             :     case MCK_GR64_NOREX: return true;
    5097             :     case MCK_GR64_TC: return true;
    5098             :     case MCK_GR64_NOSP: return true;
    5099             :     case MCK_Reg33: return true;
    5100             :     case MCK_GR64: return true;
    5101             :     }
    5102             : 
    5103         915 :   case MCK_SS:
    5104         915 :     return B == MCK_SEGMENT_REG;
    5105             : 
    5106         814 :   case MCK_ST0:
    5107         814 :     return B == MCK_RST;
    5108             : 
    5109       11019 :   case MCK_XMM0:
    5110             :     switch (B) {
    5111             :     default: return false;
    5112             :     case MCK_VR128L: return true;
    5113             :     case MCK_FR32: return true;
    5114             :     case MCK_FR32X: return true;
    5115             :     }
    5116             : 
    5117           0 :   case MCK_Reg50:
    5118             :     switch (B) {
    5119             :     default: return false;
    5120             :     case MCK_GR64_NOREX: return true;
    5121             :     case MCK_GR64: return true;
    5122             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5123             :     }
    5124             : 
    5125           0 :   case MCK_GR32_AD:
    5126             :     switch (B) {
    5127             :     default: return false;
    5128             :     case MCK_GR32_TC: return true;
    5129             :     case MCK_GR32_ABCD: return true;
    5130             :     case MCK_GR32_NOREX_NOSP: return true;
    5131             :     case MCK_GR32_NOREX: return true;
    5132             :     case MCK_Reg22: return true;
    5133             :     case MCK_GR32_NOSP: return true;
    5134             :     case MCK_GR32: return true;
    5135             :     case MCK_Reg19: return true;
    5136             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5137             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5138             :     }
    5139             : 
    5140           0 :   case MCK_GR64_AD:
    5141             :     switch (B) {
    5142             :     default: return false;
    5143             :     case MCK_Reg29: return true;
    5144             :     case MCK_Reg45: return true;
    5145             :     case MCK_GR64_ABCD: return true;
    5146             :     case MCK_Reg37: return true;
    5147             :     case MCK_Reg40: return true;
    5148             :     case MCK_Reg43: return true;
    5149             :     case MCK_Reg41: return true;
    5150             :     case MCK_Reg44: return true;
    5151             :     case MCK_GR64_NOREX_NOSP: return true;
    5152             :     case MCK_Reg32: return true;
    5153             :     case MCK_Reg38: return true;
    5154             :     case MCK_GR64_TCW64: return true;
    5155             :     case MCK_GR64_NOREX: return true;
    5156             :     case MCK_GR64_TC: return true;
    5157             :     case MCK_GR64_NOSP: return true;
    5158             :     case MCK_Reg33: return true;
    5159             :     case MCK_GR64: return true;
    5160             :     }
    5161             : 
    5162           0 :   case MCK_Reg29:
    5163             :     switch (B) {
    5164             :     default: return false;
    5165             :     case MCK_Reg45: return true;
    5166             :     case MCK_GR64_ABCD: return true;
    5167             :     case MCK_Reg37: return true;
    5168             :     case MCK_Reg40: return true;
    5169             :     case MCK_Reg43: return true;
    5170             :     case MCK_Reg41: return true;
    5171             :     case MCK_Reg44: return true;
    5172             :     case MCK_GR64_NOREX_NOSP: return true;
    5173             :     case MCK_Reg32: return true;
    5174             :     case MCK_Reg38: return true;
    5175             :     case MCK_GR64_TCW64: return true;
    5176             :     case MCK_GR64_NOREX: return true;
    5177             :     case MCK_GR64_TC: return true;
    5178             :     case MCK_GR64_NOSP: return true;
    5179             :     case MCK_Reg33: return true;
    5180             :     case MCK_GR64: return true;
    5181             :     }
    5182             : 
    5183           0 :   case MCK_GR32_TC:
    5184             :     switch (B) {
    5185             :     default: return false;
    5186             :     case MCK_GR32_ABCD: return true;
    5187             :     case MCK_GR32_NOREX_NOSP: return true;
    5188             :     case MCK_GR32_NOREX: return true;
    5189             :     case MCK_Reg22: return true;
    5190             :     case MCK_GR32_NOSP: return true;
    5191             :     case MCK_GR32: return true;
    5192             :     case MCK_Reg19: return true;
    5193             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5194             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5195             :     }
    5196             : 
    5197           0 :   case MCK_Reg45:
    5198             :     switch (B) {
    5199             :     default: return false;
    5200             :     case MCK_Reg40: return true;
    5201             :     case MCK_Reg44: return true;
    5202             :     case MCK_GR64_TCW64: return true;
    5203             :     case MCK_GR64_NOREX: return true;
    5204             :     case MCK_GR64_TC: return true;
    5205             :     case MCK_GR64: return true;
    5206             :     }
    5207             : 
    5208         675 :   case MCK_GR16_ABCD:
    5209         675 :     switch (B) {
    5210             :     default: return false;
    5211           0 :     case MCK_GR16_NOREX: return true;
    5212         206 :     case MCK_GR16: return true;
    5213             :     }
    5214             : 
    5215           0 :   case MCK_GR32_ABCD:
    5216             :     switch (B) {
    5217             :     default: return false;
    5218             :     case MCK_GR32_NOREX_NOSP: return true;
    5219             :     case MCK_GR32_NOREX: return true;
    5220             :     case MCK_Reg22: return true;
    5221             :     case MCK_GR32_NOSP: return true;
    5222             :     case MCK_GR32: return true;
    5223             :     case MCK_Reg19: return true;
    5224             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5225             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5226             :     }
    5227             : 
    5228           0 :   case MCK_GR64_ABCD:
    5229             :     switch (B) {
    5230             :     default: return false;
    5231             :     case MCK_GR64_NOREX_NOSP: return true;
    5232             :     case MCK_Reg32: return true;
    5233             :     case MCK_GR64_NOREX: return true;
    5234             :     case MCK_GR64_NOSP: return true;
    5235             :     case MCK_Reg33: return true;
    5236             :     case MCK_GR64: return true;
    5237             :     }
    5238             : 
    5239          40 :   case MCK_GR8_ABCD_H:
    5240          40 :     switch (B) {
    5241             :     default: return false;
    5242           0 :     case MCK_GR8_NOREX: return true;
    5243           9 :     case MCK_GR8: return true;
    5244             :     }
    5245             : 
    5246         213 :   case MCK_GR8_ABCD_L:
    5247         213 :     switch (B) {
    5248             :     default: return false;
    5249           0 :     case MCK_GR8_NOREX: return true;
    5250         161 :     case MCK_GR8: return true;
    5251             :     }
    5252             : 
    5253        6594 :   case MCK_Reg37:
    5254             :     switch (B) {
    5255             :     default: return false;
    5256             :     case MCK_Reg40: return true;
    5257             :     case MCK_GR64_NOREX_NOSP: return true;
    5258             :     case MCK_Reg32: return true;
    5259             :     case MCK_Reg38: return true;
    5260             :     case MCK_GR64_NOREX: return true;
    5261             :     case MCK_GR64_TC: return true;
    5262             :     case MCK_GR64_NOSP: return true;
    5263             :     case MCK_Reg33: return true;
    5264             :     case MCK_GR64: return true;
    5265             :     }
    5266             : 
    5267           0 :   case MCK_Reg40:
    5268             :     switch (B) {
    5269             :     default: return false;
    5270             :     case MCK_GR64_NOREX: return true;
    5271             :     case MCK_GR64_TC: return true;
    5272             :     case MCK_GR64: return true;
    5273             :     }
    5274             : 
    5275        1046 :   case MCK_Reg43:
    5276             :     switch (B) {
    5277             :     default: return false;
    5278             :     case MCK_Reg41: return true;
    5279             :     case MCK_Reg44: return true;
    5280             :     case MCK_Reg38: return true;
    5281             :     case MCK_GR64_TCW64: return true;
    5282             :     case MCK_GR64_TC: return true;
    5283             :     case MCK_GR64_NOSP: return true;
    5284             :     case MCK_Reg33: return true;
    5285             :     case MCK_GR64: return true;
    5286             :     }
    5287             : 
    5288          58 :   case MCK_Reg41:
    5289             :     switch (B) {
    5290             :     default: return false;
    5291             :     case MCK_GR64_TCW64: return true;
    5292             :     case MCK_GR64_NOSP: return true;
    5293             :     case MCK_Reg33: return true;
    5294             :     case MCK_GR64: return true;
    5295             :     }
    5296             : 
    5297           0 :   case MCK_Reg44:
    5298             :     switch (B) {
    5299             :     default: return false;
    5300             :     case MCK_GR64_TCW64: return true;
    5301             :     case MCK_GR64_TC: return true;
    5302             :     case MCK_GR64: return true;
    5303             :     }
    5304             : 
    5305        8412 :   case MCK_GR32_NOREX_NOSP:
    5306             :     switch (B) {
    5307             :     default: return false;
    5308             :     case MCK_GR32_NOREX: return true;
    5309             :     case MCK_Reg22: return true;
    5310             :     case MCK_GR32_NOSP: return true;
    5311             :     case MCK_GR32: return true;
    5312             :     case MCK_Reg19: return true;
    5313             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5314             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5315             :     }
    5316             : 
    5317           0 :   case MCK_GR64_NOREX_NOSP:
    5318             :     switch (B) {
    5319             :     default: return false;
    5320             :     case MCK_Reg32: return true;
    5321             :     case MCK_GR64_NOREX: return true;
    5322             :     case MCK_GR64_NOSP: return true;
    5323             :     case MCK_Reg33: return true;
    5324             :     case MCK_GR64: return true;
    5325             :     }
    5326             : 
    5327        6814 :   case MCK_VK16WM:
    5328        6814 :     return B == MCK_VK1;
    5329             : 
    5330        1542 :   case MCK_Reg32:
    5331             :     switch (B) {
    5332             :     default: return false;
    5333             :     case MCK_GR64_NOREX: return true;
    5334             :     case MCK_Reg33: return true;
    5335             :     case MCK_GR64: return true;
    5336             :     }
    5337             : 
    5338           0 :   case MCK_Reg38:
    5339             :     switch (B) {
    5340             :     default: return false;
    5341             :     case MCK_GR64_TC: return true;
    5342             :     case MCK_GR64_NOSP: return true;
    5343             :     case MCK_Reg33: return true;
    5344             :     case MCK_GR64: return true;
    5345             :     }
    5346             : 
    5347       97085 :   case MCK_Reg63:
    5348       97085 :     switch (B) {
    5349             :     default: return false;
    5350           0 :     case MCK_Reg64: return true;
    5351       42623 :     case MCK_VR512: return true;
    5352             :     }
    5353             : 
    5354       25089 :   case MCK_Reg66:
    5355       25089 :     switch (B) {
    5356             :     default: return false;
    5357           0 :     case MCK_Reg64: return true;
    5358        9449 :     case MCK_VR512: return true;
    5359             :     }
    5360             : 
    5361        5828 :   case MCK_GR16_NOREX:
    5362        5828 :     return B == MCK_GR16;
    5363             : 
    5364         305 :   case MCK_GR32_NOREX:
    5365             :     switch (B) {
    5366             :     default: return false;
    5367             :     case MCK_Reg22: return true;
    5368             :     case MCK_GR32: return true;
    5369             :     case MCK_Reg19: return true;
    5370             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5371             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5372             :     }
    5373             : 
    5374           0 :   case MCK_GR64_TCW64:
    5375           0 :     return B == MCK_GR64;
    5376             : 
    5377           0 :   case MCK_GR8_NOREX:
    5378           0 :     return B == MCK_GR8;
    5379             : 
    5380       14383 :   case MCK_VR128H:
    5381       14383 :     switch (B) {
    5382             :     default: return false;
    5383        7927 :     case MCK_FR32: return true;
    5384        3846 :     case MCK_FR32X: return true;
    5385             :     }
    5386             : 
    5387       41233 :   case MCK_VR128L:
    5388       41233 :     switch (B) {
    5389             :     default: return false;
    5390       31484 :     case MCK_FR32: return true;
    5391        4971 :     case MCK_FR32X: return true;
    5392             :     }
    5393             : 
    5394        8987 :   case MCK_VR256H:
    5395        8987 :     switch (B) {
    5396             :     default: return false;
    5397        3989 :     case MCK_VR256: return true;
    5398         227 :     case MCK_VR256X: return true;
    5399             :     }
    5400             : 
    5401       33798 :   case MCK_VR256L:
    5402       33798 :     switch (B) {
    5403             :     default: return false;
    5404       17424 :     case MCK_VR256: return true;
    5405        1923 :     case MCK_VR256X: return true;
    5406             :     }
    5407             : 
    5408           0 :   case MCK_Reg22:
    5409           0 :     switch (B) {
    5410             :     default: return false;
    5411           0 :     case MCK_Reg19: return true;
    5412           0 :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5413             :     }
    5414             : 
    5415           0 :   case MCK_GR64_NOREX:
    5416           0 :     return B == MCK_GR64;
    5417             : 
    5418           0 :   case MCK_GR64_TC:
    5419           0 :     return B == MCK_GR64;
    5420             : 
    5421        1402 :   case MCK_GR32_NOSP:
    5422             :     switch (B) {
    5423             :     default: return false;
    5424             :     case MCK_GR32: return true;
    5425             :     case MCK_Reg19: return true;
    5426             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5427             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5428             :     }
    5429             : 
    5430         692 :   case MCK_GR64_NOSP:
    5431         692 :     switch (B) {
    5432             :     default: return false;
    5433           0 :     case MCK_Reg33: return true;
    5434         424 :     case MCK_GR64: return true;
    5435             :     }
    5436             : 
    5437           0 :   case MCK_Reg33:
    5438           0 :     return B == MCK_GR64;
    5439             : 
    5440           0 :   case MCK_Reg64:
    5441           0 :     return B == MCK_VR512;
    5442             : 
    5443       89783 :   case MCK_FR32:
    5444       89783 :     return B == MCK_FR32X;
    5445             : 
    5446       27368 :   case MCK_GR32:
    5447             :     switch (B) {
    5448             :     default: return false;
    5449             :     case MCK_Reg19: return true;
    5450             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5451             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5452             :     }
    5453             : 
    5454       52577 :   case MCK_VR256:
    5455       52577 :     return B == MCK_VR256X;
    5456             : 
    5457           0 :   case MCK_Reg19:
    5458           0 :     return B == MCK_LOW32_ADDR_ACCESS_RBP;
    5459             : 
    5460           0 :   case MCK_LOW32_ADDR_ACCESS:
    5461           0 :     return B == MCK_LOW32_ADDR_ACCESS_RBP;
    5462             : 
    5463        2590 :   case MCK_ImmSExti64i8:
    5464             :     switch (B) {
    5465             :     default: return false;
    5466             :     case MCK_ImmSExti16i8: return true;
    5467             :     case MCK_ImmSExti32i8: return true;
    5468             :     case MCK_ImmSExti64i32: return true;
    5469             :     case MCK_Imm: return true;
    5470             :     }
    5471             : 
    5472        2906 :   case MCK_ImmSExti16i8:
    5473        2906 :     switch (B) {
    5474             :     default: return false;
    5475           0 :     case MCK_ImmSExti64i32: return true;
    5476           0 :     case MCK_Imm: return true;
    5477             :     }
    5478             : 
    5479        3048 :   case MCK_ImmSExti32i8:
    5480        3048 :     return B == MCK_Imm;
    5481             : 
    5482        1643 :   case MCK_ImmSExti64i32:
    5483        1643 :     return B == MCK_Imm;
    5484             : 
    5485           2 :   case MCK_AbsMem16:
    5486           2 :     switch (B) {
    5487             :     default: return false;
    5488           0 :     case MCK_AbsMem: return true;
    5489           0 :     case MCK_Mem: return true;
    5490             :     }
    5491             : 
    5492          20 :   case MCK_DstIdx16:
    5493          20 :     switch (B) {
    5494             :     default: return false;
    5495           0 :     case MCK_Mem16: return true;
    5496           0 :     case MCK_Mem: return true;
    5497             :     }
    5498             : 
    5499          27 :   case MCK_DstIdx32:
    5500          27 :     switch (B) {
    5501             :     default: return false;
    5502           0 :     case MCK_Mem32: return true;
    5503           0 :     case MCK_Mem: return true;
    5504             :     }
    5505             : 
    5506           2 :   case MCK_DstIdx64:
    5507           2 :     switch (B) {
    5508             :     default: return false;
    5509           0 :     case MCK_Mem64: return true;
    5510           0 :     case MCK_Mem: return true;
    5511             :     }
    5512             : 
    5513          26 :   case MCK_DstIdx8:
    5514          26 :     switch (B) {
    5515             :     default: return false;
    5516           0 :     case MCK_Mem8: return true;
    5517           0 :     case MCK_Mem: return true;
    5518             :     }
    5519             : 
    5520        2174 :   case MCK_MemOffs16_16:
    5521        2174 :     switch (B) {
    5522             :     default: return false;
    5523           0 :     case MCK_Mem16: return true;
    5524           0 :     case MCK_Mem: return true;
    5525             :     }
    5526             : 
    5527        3556 :   case MCK_MemOffs16_32:
    5528        3556 :     switch (B) {
    5529             :     default: return false;
    5530           0 :     case MCK_Mem32: return true;
    5531           0 :     case MCK_Mem: return true;
    5532             :     }
    5533             : 
    5534        2181 :   case MCK_MemOffs16_8:
    5535        2181 :     switch (B) {
    5536             :     default: return false;
    5537           0 :     case MCK_Mem8: return true;
    5538           0 :     case MCK_Mem: return true;
    5539             :     }
    5540             : 
    5541        2169 :   case MCK_MemOffs32_16:
    5542        2169 :     switch (B) {
    5543             :     default: return false;
    5544           0 :     case MCK_Mem16: return true;
    5545           0 :     case MCK_Mem: return true;
    5546             :     }
    5547             : 
    5548        3495 :   case MCK_MemOffs32_32:
    5549        3495 :     switch (B) {
    5550             :     default: return false;
    5551           0 :     case MCK_Mem32: return true;
    5552           0 :     case MCK_Mem: return true;
    5553             :     }
    5554             : 
    5555        2271 :   case MCK_MemOffs32_64:
    5556        2271 :     switch (B) {
    5557             :     default: return false;
    5558           0 :     case MCK_Mem64: return true;
    5559           0 :     case MCK_Mem: return true;
    5560             :     }
    5561             : 
    5562        2176 :   case MCK_MemOffs32_8:
    5563        2176 :     switch (B) {
    5564             :     default: return false;
    5565           0 :     case MCK_Mem8: return true;
    5566           0 :     case MCK_Mem: return true;
    5567             :     }
    5568             : 
    5569           4 :   case MCK_MemOffs64_16:
    5570           4 :     switch (B) {
    5571             :     default: return false;
    5572           0 :     case MCK_Mem16: return true;
    5573           0 :     case MCK_Mem: return true;
    5574             :     }
    5575             : 
    5576           4 :   case MCK_MemOffs64_32:
    5577           4 :     switch (B) {
    5578             :     default: return false;
    5579           0 :     case MCK_Mem32: return true;
    5580           0 :     case MCK_Mem: return true;
    5581             :     }
    5582             : 
    5583           0 :   case MCK_MemOffs64_64:
    5584           0 :     switch (B) {
    5585             :     default: return false;
    5586           0 :     case MCK_Mem64: return true;
    5587           0 :     case MCK_Mem: return true;
    5588             :     }
    5589             : 
    5590           4 :   case MCK_MemOffs64_8:
    5591           4 :     switch (B) {
    5592             :     default: return false;
    5593           0 :     case MCK_Mem8: return true;
    5594           0 :     case MCK_Mem: return true;
    5595             :     }
    5596             : 
    5597           8 :   case MCK_SrcIdx16:
    5598           8 :     switch (B) {
    5599             :     default: return false;
    5600           0 :     case MCK_Mem16: return true;
    5601           0 :     case MCK_Mem: return true;
    5602             :     }
    5603             : 
    5604          19 :   case MCK_SrcIdx32:
    5605          19 :     switch (B) {
    5606             :     default: return false;
    5607           0 :     case MCK_Mem32: return true;
    5608           0 :     case MCK_Mem: return true;
    5609             :     }
    5610             : 
    5611           0 :   case MCK_SrcIdx64:
    5612           0 :     switch (B) {
    5613             :     default: return false;
    5614           0 :     case MCK_Mem64: return true;
    5615           0 :     case MCK_Mem: return true;
    5616             :     }
    5617             : 
    5618          35 :   case MCK_SrcIdx8:
    5619          35 :     switch (B) {
    5620             :     default: return false;
    5621           0 :     case MCK_Mem8: return true;
    5622           0 :     case MCK_Mem: return true;
    5623             :     }
    5624             : 
    5625         190 :   case MCK_AbsMem:
    5626         190 :     return B == MCK_Mem;
    5627             : 
    5628       15423 :   case MCK_Mem128:
    5629       15423 :     return B == MCK_Mem;
    5630             : 
    5631           0 :   case MCK_Mem128_RC128:
    5632           0 :     return B == MCK_Mem;
    5633             : 
    5634         164 :   case MCK_Mem128_RC128X:
    5635         164 :     return B == MCK_Mem;
    5636             : 
    5637          16 :   case MCK_Mem128_RC256:
    5638          16 :     return B == MCK_Mem;
    5639             : 
    5640          81 :   case MCK_Mem128_RC256X:
    5641          81 :     return B == MCK_Mem;
    5642             : 
    5643       13014 :   case MCK_Mem16:
    5644       13014 :     return B == MCK_Mem;
    5645             : 
    5646       11567 :   case MCK_Mem256:
    5647       11567 :     return B == MCK_Mem;
    5648             : 
    5649           0 :   case MCK_Mem256_RC128:
    5650           0 :     return B == MCK_Mem;
    5651             : 
    5652          35 :   case MCK_Mem256_RC128X:
    5653          35 :     return B == MCK_Mem;
    5654             : 
    5655           0 :   case MCK_Mem256_RC256:
    5656           0 :     return B == MCK_Mem;
    5657             : 
    5658          69 :   case MCK_Mem256_RC256X:
    5659          69 :     return B == MCK_Mem;
    5660             : 
    5661          22 :   case MCK_Mem256_RC512:
    5662          22 :     return B == MCK_Mem;
    5663             : 
    5664       14445 :   case MCK_Mem32:
    5665       14445 :     return B == MCK_Mem;
    5666             : 
    5667       10651 :   case MCK_Mem512:
    5668       10651 :     return B == MCK_Mem;
    5669             : 
    5670           0 :   case MCK_Mem512_RC256X:
    5671           0 :     return B == MCK_Mem;
    5672             : 
    5673           0 :   case MCK_Mem512_RC512:
    5674           0 :     return B == MCK_Mem;
    5675             : 
    5676       18189 :   case MCK_Mem64:
    5677       18189 :     return B == MCK_Mem;
    5678             : 
    5679           0 :   case MCK_Mem64_RC128:
    5680           0 :     return B == MCK_Mem;
    5681             : 
    5682           0 :   case MCK_Mem64_RC128X:
    5683           0 :     return B == MCK_Mem;
    5684             : 
    5685           5 :   case MCK_Mem80:
    5686           5 :     return B == MCK_Mem;
    5687             : 
    5688       10031 :   case MCK_Mem8:
    5689       10031 :     return B == MCK_Mem;
    5690             :   }
    5691             : }
    5692             : 
    5693     1736725 : static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
    5694             :   X86Operand &Operand = (X86Operand&)GOp;
    5695     1736725 :   if (Kind == InvalidMatchClass)
    5696             :     return MCTargetAsmParser::Match_InvalidOperand;
    5697             : 
    5698     1710987 :   if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
    5699      278452 :     return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
    5700             :              MCTargetAsmParser::Match_Success :
    5701             :              MCTargetAsmParser::Match_InvalidOperand;
    5702             : 
    5703     1571761 :   switch (Kind) {
    5704             :   default: break;
    5705             :   // 'AVX512RC' class
    5706       11860 :   case MCK_AVX512RC: {
    5707             :     DiagnosticPredicate DP(Operand.isAVX512RC());
    5708       11860 :     if (DP.isMatch())
    5709             :       return MCTargetAsmParser::Match_Success;
    5710             :     break;
    5711             :     }
    5712             :   // 'ImmSExti64i8' class
    5713             :   case MCK_ImmSExti64i8: {
    5714             :     DiagnosticPredicate DP(Operand.isImmSExti64i8());
    5715        4442 :     if (DP.isMatch())
    5716             :       return MCTargetAsmParser::Match_Success;
    5717             :     break;
    5718             :     }
    5719             :   // 'ImmSExti16i8' class
    5720             :   case MCK_ImmSExti16i8: {
    5721             :     DiagnosticPredicate DP(Operand.isImmSExti16i8());
    5722        4704 :     if (DP.isMatch())
    5723             :       return MCTargetAsmParser::Match_Success;
    5724             :     break;
    5725             :     }
    5726             :   // 'ImmSExti32i8' class
    5727             :   case MCK_ImmSExti32i8: {
    5728             :     DiagnosticPredicate DP(Operand.isImmSExti32i8());
    5729        5131 :     if (DP.isMatch())
    5730             :       return MCTargetAsmParser::Match_Success;
    5731             :     break;
    5732             :     }
    5733             :   // 'ImmSExti64i32' class
    5734             :   case MCK_ImmSExti64i32: {
    5735             :     DiagnosticPredicate DP(Operand.isImmSExti64i32());
    5736        3284 :     if (DP.isMatch())
    5737             :       return MCTargetAsmParser::Match_Success;
    5738             :     break;
    5739             :     }
    5740             :   // 'Imm' class
    5741             :   case MCK_Imm: {
    5742             :     DiagnosticPredicate DP(Operand.isImm());
    5743       53966 :     if (DP.isMatch())
    5744             :       return MCTargetAsmParser::Match_Success;
    5745             :     break;
    5746             :     }
    5747             :   // 'ImmUnsignedi8' class
    5748             :   case MCK_ImmUnsignedi8: {
    5749             :     DiagnosticPredicate DP(Operand.isImmUnsignedi8());
    5750      100763 :     if (DP.isMatch())
    5751             :       return MCTargetAsmParser::Match_Success;
    5752             :     break;
    5753             :     }
    5754             :   // 'GR32orGR64' class
    5755         635 :   case MCK_GR32orGR64: {
    5756         635 :     DiagnosticPredicate DP(Operand.isGR32orGR64());
    5757         635 :     if (DP.isMatch())
    5758             :       return MCTargetAsmParser::Match_Success;
    5759             :     break;
    5760             :     }
    5761             :   // 'AbsMem16' class
    5762             :   case MCK_AbsMem16: {
    5763             :     DiagnosticPredicate DP(Operand.isAbsMem16());
    5764           2 :     if (DP.isMatch())
    5765             :       return MCTargetAsmParser::Match_Success;
    5766             :     break;
    5767             :     }
    5768             :   // 'DstIdx16' class
    5769         187 :   case MCK_DstIdx16: {
    5770         187 :     DiagnosticPredicate DP(Operand.isDstIdx16());
    5771         187 :     if (DP.isMatch())
    5772             :       return MCTargetAsmParser::Match_Success;
    5773             :     break;
    5774             :     }
    5775             :   // 'DstIdx32' class
    5776         197 :   case MCK_DstIdx32: {
    5777         197 :     DiagnosticPredicate DP(Operand.isDstIdx32());
    5778         197 :     if (DP.isMatch())
    5779             :       return MCTargetAsmParser::Match_Success;
    5780             :     break;
    5781             :     }
    5782             :   // 'DstIdx64' class
    5783          85 :   case MCK_DstIdx64: {
    5784          85 :     DiagnosticPredicate DP(Operand.isDstIdx64());
    5785          85 :     if (DP.isMatch())
    5786             :       return MCTargetAsmParser::Match_Success;
    5787             :     break;
    5788             :     }
    5789             :   // 'DstIdx8' class
    5790         196 :   case MCK_DstIdx8: {
    5791         196 :     DiagnosticPredicate DP(Operand.isDstIdx8());
    5792         196 :     if (DP.isMatch())
    5793             :       return MCTargetAsmParser::Match_Success;
    5794             :     break;
    5795             :     }
    5796             :   // 'MemOffs16_16' class
    5797        2175 :   case MCK_MemOffs16_16: {
    5798        2175 :     DiagnosticPredicate DP(Operand.isMemOffs16_16());
    5799        2175 :     if (DP.isMatch())
    5800             :       return MCTargetAsmParser::Match_Success;
    5801             :     break;
    5802             :     }
    5803             :   // 'MemOffs16_32' class
    5804        3558 :   case MCK_MemOffs16_32: {
    5805        3558 :     DiagnosticPredicate DP(Operand.isMemOffs16_32());
    5806        3558 :     if (DP.isMatch())
    5807             :       return MCTargetAsmParser::Match_Success;
    5808             :     break;
    5809             :     }
    5810             :   // 'MemOffs16_8' class
    5811        2182 :   case MCK_MemOffs16_8: {
    5812        2182 :     DiagnosticPredicate DP(Operand.isMemOffs16_8());
    5813        2182 :     if (DP.isMatch())
    5814             :       return MCTargetAsmParser::Match_Success;
    5815             :     break;
    5816             :     }
    5817             :   // 'MemOffs32_16' class
    5818        2174 :   case MCK_MemOffs32_16: {
    5819        2174 :     DiagnosticPredicate DP(Operand.isMemOffs32_16());
    5820        2174 :     if (DP.isMatch())
    5821             :       return MCTargetAsmParser::Match_Success;
    5822             :     break;
    5823             :     }
    5824             :   // 'MemOffs32_32' class
    5825        3556 :   case MCK_MemOffs32_32: {
    5826        3556 :     DiagnosticPredicate DP(Operand.isMemOffs32_32());
    5827        3556 :     if (DP.isMatch())
    5828             :       return MCTargetAsmParser::Match_Success;
    5829             :     break;
    5830             :     }
    5831             :   // 'MemOffs32_64' class
    5832        2282 :   case MCK_MemOffs32_64: {
    5833        2282 :     DiagnosticPredicate DP(Operand.isMemOffs32_64());
    5834        2282 :     if (DP.isMatch())
    5835             :       return MCTargetAsmParser::Match_Success;
    5836             :     break;
    5837             :     }
    5838             :   // 'MemOffs32_8' class
    5839        2181 :   case MCK_MemOffs32_8: {
    5840        2181 :     DiagnosticPredicate DP(Operand.isMemOffs32_8());
    5841        2181 :     if (DP.isMatch())
    5842             :       return MCTargetAsmParser::Match_Success;
    5843             :     break;
    5844             :     }
    5845             :   // 'MemOffs64_16' class
    5846           8 :   case MCK_MemOffs64_16: {
    5847           8 :     DiagnosticPredicate DP(Operand.isMemOffs64_16());
    5848           8 :     if (DP.isMatch())
    5849             :       return MCTargetAsmParser::Match_Success;
    5850             :     break;
    5851             :     }
    5852             :   // 'MemOffs64_32' class
    5853           8 :   case MCK_MemOffs64_32: {
    5854           8 :     DiagnosticPredicate DP(Operand.isMemOffs64_32());
    5855           8 :     if (DP.isMatch())
    5856             :       return MCTargetAsmParser::Match_Success;
    5857             :     break;
    5858             :     }
    5859             :   // 'MemOffs64_64' class
    5860           4 :   case MCK_MemOffs64_64: {
    5861           4 :     DiagnosticPredicate DP(Operand.isMemOffs64_64());
    5862           4 :     if (DP.isMatch())
    5863             :       return MCTargetAsmParser::Match_Success;
    5864             :     break;
    5865             :     }
    5866             :   // 'MemOffs64_8' class
    5867           8 :   case MCK_MemOffs64_8: {
    5868           8 :     DiagnosticPredicate DP(Operand.isMemOffs64_8());
    5869           8 :     if (DP.isMatch())
    5870             :       return MCTargetAsmParser::Match_Success;
    5871             :     break;
    5872             :     }
    5873             :   // 'SrcIdx16' class
    5874         173 :   case MCK_SrcIdx16: {
    5875         173 :     DiagnosticPredicate DP(Operand.isSrcIdx16());
    5876         173 :     if (DP.isMatch())
    5877             :       return MCTargetAsmParser::Match_Success;
    5878             :     break;
    5879             :     }
    5880             :   // 'SrcIdx32' class
    5881         183 :   case MCK_SrcIdx32: {
    5882         183 :     DiagnosticPredicate DP(Operand.isSrcIdx32());
    5883         183 :     if (DP.isMatch())
    5884             :       return MCTargetAsmParser::Match_Success;
    5885             :     break;
    5886             :     }
    5887             :   // 'SrcIdx64' class
    5888          66 :   case MCK_SrcIdx64: {
    5889          66 :     DiagnosticPredicate DP(Operand.isSrcIdx64());
    5890          66 :     if (DP.isMatch())
    5891             :       return MCTargetAsmParser::Match_Success;
    5892             :     break;
    5893             :     }
    5894             :   // 'SrcIdx8' class
    5895         215 :   case MCK_SrcIdx8: {
    5896         215 :     DiagnosticPredicate DP(Operand.isSrcIdx8());
    5897         215 :     if (DP.isMatch())
    5898             :       return MCTargetAsmParser::Match_Success;
    5899             :     break;
    5900             :     }
    5901             :   // 'AbsMem' class
    5902             :   case MCK_AbsMem: {
    5903             :     DiagnosticPredicate DP(Operand.isAbsMem());
    5904        1519 :     if (DP.isMatch())
    5905             :       return MCTargetAsmParser::Match_Success;
    5906             :     break;
    5907             :     }
    5908             :   // 'Mem128' class
    5909       94120 :   case MCK_Mem128: {
    5910             :     DiagnosticPredicate DP(Operand.isMem128());
    5911       94120 :     if (DP.isMatch())
    5912             :       return MCTargetAsmParser::Match_Success;
    5913             :     break;
    5914             :     }
    5915             :   // 'Mem128_RC128' class
    5916             :   case MCK_Mem128_RC128: {
    5917             :     DiagnosticPredicate DP(Operand.isMem128_RC128());
    5918          50 :     if (DP.isMatch())
    5919             :       return MCTargetAsmParser::Match_Success;
    5920             :     break;
    5921             :     }
    5922             :   // 'Mem128_RC128X' class
    5923             :   case MCK_Mem128_RC128X: {
    5924             :     DiagnosticPredicate DP(Operand.isMem128_RC128X());
    5925         308 :     if (DP.isMatch())
    5926             :       return MCTargetAsmParser::Match_Success;
    5927             :     break;
    5928             :     }
    5929             :   // 'Mem128_RC256' class
    5930             :   case MCK_Mem128_RC256: {
    5931             :     DiagnosticPredicate DP(Operand.isMem128_RC256());
    5932          26 :     if (DP.isMatch())
    5933             :       return MCTargetAsmParser::Match_Success;
    5934             :     break;
    5935             :     }
    5936             :   // 'Mem128_RC256X' class
    5937             :   case MCK_Mem128_RC256X: {
    5938             :     DiagnosticPredicate DP(Operand.isMem128_RC256X());
    5939         127 :     if (DP.isMatch())
    5940             :       return MCTargetAsmParser::Match_Success;
    5941             :     break;
    5942             :     }
    5943             :   // 'Mem16' class
    5944       18354 :   case MCK_Mem16: {
    5945             :     DiagnosticPredicate DP(Operand.isMem16());
    5946       18354 :     if (DP.isMatch())
    5947             :       return MCTargetAsmParser::Match_Success;
    5948             :     break;
    5949             :     }
    5950             :   // 'Mem256' class
    5951       66932 :   case MCK_Mem256: {
    5952             :     DiagnosticPredicate DP(Operand.isMem256());
    5953       66932 :     if (DP.isMatch())
    5954             :       return MCTargetAsmParser::Match_Success;
    5955             :     break;
    5956             :     }
    5957             :   // 'Mem256_RC128' class
    5958             :   case MCK_Mem256_RC128: {
    5959             :     DiagnosticPredicate DP(Operand.isMem256_RC128());
    5960          16 :     if (DP.isMatch())
    5961             :       return MCTargetAsmParser::Match_Success;
    5962             :     break;
    5963             :     }
    5964             :   // 'Mem256_RC128X' class
    5965             :   case MCK_Mem256_RC128X: {
    5966             :     DiagnosticPredicate DP(Operand.isMem256_RC128X());
    5967          81 :     if (DP.isMatch())
    5968             :       return MCTargetAsmParser::Match_Success;
    5969             :     break;
    5970             :     }
    5971             :   // 'Mem256_RC256' class
    5972             :   case MCK_Mem256_RC256: {
    5973             :     DiagnosticPredicate DP(Operand.isMem256_RC256());
    5974          38 :     if (DP.isMatch())
    5975             :       return MCTargetAsmParser::Match_Success;
    5976             :     break;
    5977             :     }
    5978             :   // 'Mem256_RC256X' class
    5979             :   case MCK_Mem256_RC256X: {
    5980             :     DiagnosticPredicate DP(Operand.isMem256_RC256X());
    5981         161 :     if (DP.isMatch())
    5982             :       return MCTargetAsmParser::Match_Success;
    5983             :     break;
    5984             :     }
    5985             :   // 'Mem256_RC512' class
    5986             :   case MCK_Mem256_RC512: {
    5987             :     DiagnosticPredicate DP(Operand.isMem256_RC512());
    5988          89 :     if (DP.isMatch())
    5989             :       return MCTargetAsmParser::Match_Success;
    5990             :     break;
    5991             :     }
    5992             :   // 'Mem32' class
    5993       52306 :   case MCK_Mem32: {
    5994             :     DiagnosticPredicate DP(Operand.isMem32());
    5995       52306 :     if (DP.isMatch())
    5996             :       return MCTargetAsmParser::Match_Success;
    5997             :     break;
    5998             :     }
    5999             :   // 'Mem512' class
    6000       46583 :   case MCK_Mem512: {
    6001             :     DiagnosticPredicate DP(Operand.isMem512());
    6002       46583 :     if (DP.isMatch())
    6003             :       return MCTargetAsmParser::Match_Success;
    6004             :     break;
    6005             :     }
    6006             :   // 'Mem512_RC256X' class
    6007             :   case MCK_Mem512_RC256X: {
    6008             :     DiagnosticPredicate DP(Operand.isMem512_RC256X());
    6009          67 :     if (DP.isMatch())
    6010             :       return MCTargetAsmParser::Match_Success;
    6011             :     break;
    6012             :     }
    6013             :   // 'Mem512_RC512' class
    6014             :   case MCK_Mem512_RC512: {
    6015             :     DiagnosticPredicate DP(Operand.isMem512_RC512());
    6016         133 :     if (DP.isMatch())
    6017             :       return MCTargetAsmParser::Match_Success;
    6018             :     break;
    6019             :     }
    6020             :   // 'Mem64' class
    6021       59807 :   case MCK_Mem64: {
    6022             :     DiagnosticPredicate DP(Operand.isMem64());
    6023       59807 :     if (DP.isMatch())
    6024             :       return MCTargetAsmParser::Match_Success;
    6025             :     break;
    6026             :     }
    6027             :   // 'Mem64_RC128' class
    6028             :   case MCK_Mem64_RC128: {
    6029             :     DiagnosticPredicate DP(Operand.isMem64_RC128());
    6030          16 :     if (DP.isMatch())
    6031             :       return MCTargetAsmParser::Match_Success;
    6032             :     break;
    6033             :     }
    6034             :   // 'Mem64_RC128X' class
    6035             :   case MCK_Mem64_RC128X: {
    6036             :     DiagnosticPredicate DP(Operand.isMem64_RC128X());
    6037          46 :     if (DP.isMatch())
    6038             :       return MCTargetAsmParser::Match_Success;
    6039             :     break;
    6040             :     }
    6041             :   // 'Mem80' class
    6042         174 :   case MCK_Mem80: {
    6043             :     DiagnosticPredicate DP(Operand.isMem80());
    6044         174 :     if (DP.isMatch())
    6045             :       return MCTargetAsmParser::Match_Success;
    6046             :     break;
    6047             :     }
    6048             :   // 'Mem8' class
    6049       13846 :   case MCK_Mem8: {
    6050             :     DiagnosticPredicate DP(Operand.isMem8());
    6051       13846 :     if (DP.isMatch())
    6052             :       return MCTargetAsmParser::Match_Success;
    6053             :     break;
    6054             :     }
    6055             :   // 'Mem' class
    6056             :   case MCK_Mem: {
    6057             :     DiagnosticPredicate DP(Operand.isMem());
    6058         974 :     if (DP.isMatch())
    6059             :       return MCTargetAsmParser::Match_Success;
    6060             :     break;
    6061             :     }
    6062             :   } // end switch (Kind)
    6063             : 
    6064     1166687 :   if (Operand.isReg()) {
    6065             :     MatchClassKind OpKind;
    6066             :     switch (Operand.getReg()) {
    6067             :     default: OpKind = InvalidMatchClass; break;
    6068             :     case X86::AL: OpKind = MCK_AL; break;
    6069             :     case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
    6070             :     case X86::CL: OpKind = MCK_CL; break;
    6071             :     case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
    6072             :     case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
    6073             :     case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
    6074             :     case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
    6075             :     case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
    6076             :     case X86::SIL: OpKind = MCK_GR8; break;
    6077             :     case X86::DIL: OpKind = MCK_GR8; break;
    6078             :     case X86::BPL: OpKind = MCK_GR8; break;
    6079             :     case X86::SPL: OpKind = MCK_GR8; break;
    6080             :     case X86::R8B: OpKind = MCK_GR8; break;
    6081             :     case X86::R9B: OpKind = MCK_GR8; break;
    6082             :     case X86::R10B: OpKind = MCK_GR8; break;
    6083             :     case X86::R11B: OpKind = MCK_GR8; break;
    6084             :     case X86::R12B: OpKind = MCK_GR8; break;
    6085             :     case X86::R13B: OpKind = MCK_GR8; break;
    6086             :     case X86::R14B: OpKind = MCK_GR8; break;
    6087             :     case X86::R15B: OpKind = MCK_GR8; break;
    6088             :     case X86::AX: OpKind = MCK_AX; break;
    6089             :     case X86::DX: OpKind = MCK_DX; break;
    6090             :     case X86::CX: OpKind = MCK_GR16_ABCD; break;
    6091             :     case X86::BX: OpKind = MCK_GR16_ABCD; break;
    6092             :     case X86::SI: OpKind = MCK_GR16_NOREX; break;
    6093             :     case X86::DI: OpKind = MCK_GR16_NOREX; break;
    6094             :     case X86::BP: OpKind = MCK_GR16_NOREX; break;
    6095             :     case X86::SP: OpKind = MCK_GR16_NOREX; break;
    6096             :     case X86::HAX: OpKind = MCK_GRH16; break;
    6097             :     case X86::HDX: OpKind = MCK_GRH16; break;
    6098             :     case X86::HCX: OpKind = MCK_GRH16; break;
    6099             :     case X86::HBX: OpKind = MCK_GRH16; break;
    6100             :     case X86::HSI: OpKind = MCK_GRH16; break;
    6101             :     case X86::HDI: OpKind = MCK_GRH16; break;
    6102             :     case X86::HBP: OpKind = MCK_GRH16; break;
    6103             :     case X86::HSP: OpKind = MCK_GRH16; break;
    6104             :     case X86::HIP: OpKind = MCK_GRH16; break;
    6105             :     case X86::R8W: OpKind = MCK_GR16; break;
    6106             :     case X86::R9W: OpKind = MCK_GR16; break;
    6107             :     case X86::R10W: OpKind = MCK_GR16; break;
    6108             :     case X86::R11W: OpKind = MCK_GR16; break;
    6109             :     case X86::R12W: OpKind = MCK_GR16; break;
    6110             :     case X86::R13W: OpKind = MCK_GR16; break;
    6111             :     case X86::R14W: OpKind = MCK_GR16; break;
    6112             :     case X86::R15W: OpKind = MCK_GR16; break;
    6113             :     case X86::EAX: OpKind = MCK_EAX; break;
    6114             :     case X86::EDX: OpKind = MCK_EDX; break;
    6115             :     case X86::ECX: OpKind = MCK_ECX; break;
    6116             :     case X86::EBX: OpKind = MCK_EBX; break;
    6117             :     case X86::ESI: OpKind = MCK_GR32_NOREX_NOSP; break;
    6118             :     case X86::EDI: OpKind = MCK_GR32_NOREX_NOSP; break;
    6119             :     case X86::EBP: OpKind = MCK_GR32_NOREX_NOSP; break;
    6120             :     case X86::ESP: OpKind = MCK_GR32_NOREX; break;
    6121             :     case X86::R8D: OpKind = MCK_GR32_NOSP; break;
    6122             :     case X86::R9D: OpKind = MCK_GR32_NOSP; break;
    6123             :     case X86::R10D: OpKind = MCK_GR32_NOSP; break;
    6124             :     case X86::R11D: OpKind = MCK_GR32_NOSP; break;
    6125             :     case X86::R12D: OpKind = MCK_GR32_NOSP; break;
    6126             :     case X86::R13D: OpKind = MCK_GR32_NOSP; break;
    6127             :     case X86::R14D: OpKind = MCK_GR32_NOSP; break;
    6128             :     case X86::R15D: OpKind = MCK_GR32_NOSP; break;
    6129             :     case X86::RAX: OpKind = MCK_RAX; break;
    6130             :     case X86::RDX: OpKind = MCK_RDX; break;
    6131             :     case X86::RCX: OpKind = MCK_RCX; break;
    6132             :     case X86::RBX: OpKind = MCK_RBX; break;
    6133             :     case X86::RSI: OpKind = MCK_Reg37; break;
    6134             :     case X86::RDI: OpKind = MCK_Reg37; break;
    6135             :     case X86::RBP: OpKind = MCK_Reg49; break;
    6136             :     case X86::RSP: OpKind = MCK_Reg32; break;
    6137             :     case X86::R8: OpKind = MCK_Reg43; break;
    6138             :     case X86::R9: OpKind = MCK_Reg43; break;
    6139             :     case X86::R10: OpKind = MCK_Reg41; break;
    6140             :     case X86::R11: OpKind = MCK_Reg43; break;
    6141             :     case X86::R12: OpKind = MCK_GR64_NOSP; break;
    6142             :     case X86::R13: OpKind = MCK_GR64_NOSP; break;
    6143             :     case X86::R14: OpKind = MCK_GR64_NOSP; break;
    6144             :     case X86::R15: OpKind = MCK_GR64_NOSP; break;
    6145             :     case X86::RIP: OpKind = MCK_Reg51; break;
    6146             :     case X86::MM0: OpKind = MCK_VR64; break;
    6147             :     case X86::MM1: OpKind = MCK_VR64; break;
    6148             :     case X86::MM2: OpKind = MCK_VR64; break;
    6149             :     case X86::MM3: OpKind = MCK_VR64; break;
    6150             :     case X86::MM4: OpKind = MCK_VR64; break;
    6151             :     case X86::MM5: OpKind = MCK_VR64; break;
    6152             :     case X86::MM6: OpKind = MCK_VR64; break;
    6153             :     case X86::MM7: OpKind = MCK_VR64; break;
    6154             :     case X86::FP0: OpKind = MCK_RFP32; break;
    6155             :     case X86::FP1: OpKind = MCK_RFP32; break;
    6156             :     case X86::FP2: OpKind = MCK_RFP32; break;
    6157             :     case X86::FP3: OpKind = MCK_RFP32; break;
    6158             :     case X86::FP4: OpKind = MCK_RFP32; break;
    6159             :     case X86::FP5: OpKind = MCK_RFP32; break;
    6160             :     case X86::FP6: OpKind = MCK_RFP32; break;
    6161             :     case X86::XMM0: OpKind = MCK_XMM0; break;
    6162             :     case X86::XMM1: OpKind = MCK_VR128L; break;
    6163             :     case X86::XMM2: OpKind = MCK_VR128L; break;
    6164             :     case X86::XMM3: OpKind = MCK_VR128L; break;
    6165             :     case X86::XMM4: OpKind = MCK_VR128L; break;
    6166             :     case X86::XMM5: OpKind = MCK_VR128L; break;
    6167             :     case X86::XMM6: OpKind = MCK_VR128L; break;
    6168             :     case X86::XMM7: OpKind = MCK_VR128L; break;
    6169             :     case X86::XMM8: OpKind = MCK_VR128H; break;
    6170             :     case X86::XMM9: OpKind = MCK_VR128H; break;
    6171             :     case X86::XMM10: OpKind = MCK_VR128H; break;
    6172             :     case X86::XMM11: OpKind = MCK_VR128H; break;
    6173             :     case X86::XMM12: OpKind = MCK_VR128H; break;
    6174             :     case X86::XMM13: OpKind = MCK_VR128H; break;
    6175             :     case X86::XMM14: OpKind = MCK_VR128H; break;
    6176             :     case X86::XMM15: OpKind = MCK_VR128H; break;
    6177             :     case X86::XMM16: OpKind = MCK_FR32X; break;
    6178             :     case X86::XMM17: OpKind = MCK_FR32X; break;
    6179             :     case X86::XMM18: OpKind = MCK_FR32X; break;
    6180             :     case X86::XMM19: OpKind = MCK_FR32X; break;
    6181             :     case X86::XMM20: OpKind = MCK_FR32X; break;
    6182             :     case X86::XMM21: OpKind = MCK_FR32X; break;
    6183             :     case X86::XMM22: OpKind = MCK_FR32X; break;
    6184             :     case X86::XMM23: OpKind = MCK_FR32X; break;
    6185             :     case X86::XMM24: OpKind = MCK_FR32X; break;
    6186             :     case X86::XMM25: OpKind = MCK_FR32X; break;
    6187             :     case X86::XMM26: OpKind = MCK_FR32X; break;
    6188             :     case X86::XMM27: OpKind = MCK_FR32X; break;
    6189             :     case X86::XMM28: OpKind = MCK_FR32X; break;
    6190             :     case X86::XMM29: OpKind = MCK_FR32X; break;
    6191             :     case X86::XMM30: OpKind = MCK_FR32X; break;
    6192             :     case X86::XMM31: OpKind = MCK_FR32X; break;
    6193             :     case X86::YMM0: OpKind = MCK_VR256L; break;
    6194             :     case X86::YMM1: OpKind = MCK_VR256L; break;
    6195             :     case X86::YMM2: OpKind = MCK_VR256L; break;
    6196             :     case X86::YMM3: OpKind = MCK_VR256L; break;
    6197             :     case X86::YMM4: OpKind = MCK_VR256L; break;
    6198             :     case X86::YMM5: OpKind = MCK_VR256L; break;
    6199             :     case X86::YMM6: OpKind = MCK_VR256L; break;
    6200             :     case X86::YMM7: OpKind = MCK_VR256L; break;
    6201             :     case X86::YMM8: OpKind = MCK_VR256H; break;
    6202             :     case X86::YMM9: OpKind = MCK_VR256H; break;
    6203             :     case X86::YMM10: OpKind = MCK_VR256H; break;
    6204             :     case X86::YMM11: OpKind = MCK_VR256H; break;
    6205             :     case X86::YMM12: OpKind = MCK_VR256H; break;
    6206             :     case X86::YMM13: OpKind = MCK_VR256H; break;
    6207             :     case X86::YMM14: OpKind = MCK_VR256H; break;
    6208             :     case X86::YMM15: OpKind = MCK_VR256H; break;
    6209             :     case X86::YMM16: OpKind = MCK_VR256X; break;
    6210             :     case X86::YMM17: OpKind = MCK_VR256X; break;
    6211             :     case X86::YMM18: OpKind = MCK_VR256X; break;
    6212             :     case X86::YMM19: OpKind = MCK_VR256X; break;
    6213             :     case X86::YMM20: OpKind = MCK_VR256X; break;
    6214             :     case X86::YMM21: OpKind = MCK_VR256X; break;
    6215             :     case X86::YMM22: OpKind = MCK_VR256X; break;
    6216             :     case X86::YMM23: OpKind = MCK_VR256X; break;
    6217             :     case X86::YMM24: OpKind = MCK_VR256X; break;
    6218             :     case X86::YMM25: OpKind = MCK_VR256X; break;
    6219             :     case X86::YMM26: OpKind = MCK_VR256X; break;
    6220             :     case X86::YMM27: OpKind = MCK_VR256X; break;
    6221             :     case X86::YMM28: OpKind = MCK_VR256X; break;
    6222             :     case X86::YMM29: OpKind = MCK_VR256X; break;
    6223             :     case X86::YMM30: OpKind = MCK_VR256X; break;
    6224             :     case X86::YMM31: OpKind = MCK_VR256X; break;
    6225             :     case X86::ZMM0: OpKind = MCK_Reg63; break;
    6226             :     case X86::ZMM1: OpKind = MCK_Reg63; break;
    6227             :     case X86::ZMM2: OpKind = MCK_Reg63; break;
    6228             :     case X86::ZMM3: OpKind = MCK_Reg63; break;
    6229             :     case X86::ZMM4: OpKind = MCK_Reg63; break;
    6230             :     case X86::ZMM5: OpKind = MCK_Reg63; break;
    6231             :     case X86::ZMM6: OpKind = MCK_Reg63; break;
    6232             :     case X86::ZMM7: OpKind = MCK_Reg63; break;
    6233             :     case X86::ZMM8: OpKind = MCK_Reg66; break;
    6234             :     case X86::ZMM9: OpKind = MCK_Reg66; break;
    6235             :     case X86::ZMM10: OpKind = MCK_Reg66; break;
    6236             :     case X86::ZMM11: OpKind = MCK_Reg66; break;
    6237             :     case X86::ZMM12: OpKind = MCK_Reg66; break;
    6238             :     case X86::ZMM13: OpKind = MCK_Reg66; break;
    6239             :     case X86::ZMM14: OpKind = MCK_Reg66; break;
    6240             :     case X86::ZMM15: OpKind = MCK_Reg66; break;
    6241             :     case X86::ZMM16: OpKind = MCK_VR512; break;
    6242             :     case X86::ZMM17: OpKind = MCK_VR512; break;
    6243             :     case X86::ZMM18: OpKind = MCK_VR512; break;
    6244             :     case X86::ZMM19: OpKind = MCK_VR512; break;
    6245             :     case X86::ZMM20: OpKind = MCK_VR512; break;
    6246             :     case X86::ZMM21: OpKind = MCK_VR512; break;
    6247             :     case X86::ZMM22: OpKind = MCK_VR512; break;
    6248             :     case X86::ZMM23: OpKind = MCK_VR512; break;
    6249             :     case X86::ZMM24: OpKind = MCK_VR512; break;
    6250             :     case X86::ZMM25: OpKind = MCK_VR512; break;
    6251             :     case X86::ZMM26: OpKind = MCK_VR512; break;
    6252             :     case X86::ZMM27: OpKind = MCK_VR512; break;
    6253             :     case X86::ZMM28: OpKind = MCK_VR512; break;
    6254             :     case X86::ZMM29: OpKind = MCK_VR512; break;
    6255             :     case X86::ZMM30: OpKind = MCK_VR512; break;
    6256             :     case X86::ZMM31: OpKind = MCK_VR512; break;
    6257             :     case X86::K0: OpKind = MCK_VK1; break;
    6258             :     case X86::K1: OpKind = MCK_VK16WM; break;
    6259             :     case X86::K2: OpKind = MCK_VK16WM; break;
    6260             :     case X86::K3: OpKind = MCK_VK16WM; break;
    6261             :     case X86::K4: OpKind = MCK_VK16WM; break;
    6262             :     case X86::K5: OpKind = MCK_VK16WM; break;
    6263             :     case X86::K6: OpKind = MCK_VK16WM; break;
    6264             :     case X86::K7: OpKind = MCK_VK16WM; break;
    6265             :     case X86::ST0: OpKind = MCK_ST0; break;
    6266             :     case X86::ST1: OpKind = MCK_RST; break;
    6267             :     case X86::ST2: OpKind = MCK_RST; break;
    6268             :     case X86::ST3: OpKind = MCK_RST; break;
    6269             :     case X86::ST4: OpKind = MCK_RST; break;
    6270             :     case X86::ST5: OpKind = MCK_RST; break;
    6271             :     case X86::ST6: OpKind = MCK_RST; break;
    6272             :     case X86::ST7: OpKind = MCK_RST; break;
    6273             :     case X86::FPSW: OpKind = MCK_FPCCR; break;
    6274             :     case X86::EFLAGS: OpKind = MCK_CCR; break;
    6275             :     case X86::DF: OpKind = MCK_DFCCR; break;
    6276             :     case X86::CS: OpKind = MCK_CS; break;
    6277             :     case X86::DS: OpKind = MCK_DS; break;
    6278             :     case X86::SS: OpKind = MCK_SS; break;
    6279             :     case X86::ES: OpKind = MCK_ES; break;
    6280             :     case X86::FS: OpKind = MCK_FS; break;
    6281             :     case X86::GS: OpKind = MCK_GS; break;
    6282             :     case X86::DR0: OpKind = MCK_DEBUG_REG; break;
    6283             :     case X86::DR1: OpKind = MCK_DEBUG_REG; break;
    6284             :     case X86::DR2: OpKind = MCK_DEBUG_REG; break;
    6285             :     case X86::DR3: OpKind = MCK_DEBUG_REG; break;
    6286             :     case X86::DR4: OpKind = MCK_DEBUG_REG; break;
    6287             :     case X86::DR5: OpKind = MCK_DEBUG_REG; break;
    6288             :     case X86::DR6: OpKind = MCK_DEBUG_REG; break;
    6289             :     case X86::DR7: OpKind = MCK_DEBUG_REG; break;
    6290             :     case X86::DR8: OpKind = MCK_DEBUG_REG; break;
    6291             :     case X86::DR9: OpKind = MCK_DEBUG_REG; break;
    6292             :     case X86::DR10: OpKind = MCK_DEBUG_REG; break;
    6293             :     case X86::DR11: OpKind = MCK_DEBUG_REG; break;
    6294             :     case X86::DR12: OpKind = MCK_DEBUG_REG; break;
    6295             :     case X86::DR13: OpKind = MCK_DEBUG_REG; break;
    6296             :     case X86::DR14: OpKind = MCK_DEBUG_REG; break;
    6297             :     case X86::DR15: OpKind = MCK_DEBUG_REG; break;
    6298             :     case X86::CR0: OpKind = MCK_CONTROL_REG; break;
    6299             :     case X86::CR1: OpKind = MCK_CONTROL_REG; break;
    6300             :     case X86::CR2: OpKind = MCK_CONTROL_REG; break;
    6301             :     case X86::CR3: OpKind = MCK_CONTROL_REG; break;
    6302             :     case X86::CR4: OpKind = MCK_CONTROL_REG; break;
    6303             :     case X86::CR5: OpKind = MCK_CONTROL_REG; break;
    6304             :     case X86::CR6: OpKind = MCK_CONTROL_REG; break;
    6305             :     case X86::CR7: OpKind = MCK_CONTROL_REG; break;
    6306             :     case X86::CR8: OpKind = MCK_CONTROL_REG; break;
    6307             :     case X86::CR9: OpKind = MCK_CONTROL_REG; break;
    6308             :     case X86::CR10: OpKind = MCK_CONTROL_REG; break;
    6309             :     case X86::CR11: OpKind = MCK_CONTROL_REG; break;
    6310             :     case X86::CR12: OpKind = MCK_CONTROL_REG; break;
    6311             :     case X86::CR13: OpKind = MCK_CONTROL_REG; break;
    6312             :     case X86::CR14: OpKind = MCK_CONTROL_REG; break;
    6313             :     case X86::CR15: OpKind = MCK_CONTROL_REG; break;
    6314             :     case X86::BND0: OpKind = MCK_BNDR; break;
    6315             :     case X86::BND1: OpKind = MCK_BNDR; break;
    6316             :     case X86::BND2: OpKind = MCK_BNDR; break;
    6317             :     case X86::BND3: OpKind = MCK_BNDR; break;
    6318             :     }
    6319      639625 :     return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
    6320             :                                       getDiagKindFromRegisterClass(Kind);
    6321             :   }
    6322             : 
    6323             :   if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
    6324             :     return getDiagKindFromRegisterClass(Kind);
    6325             : 
    6326             :   return MCTargetAsmParser::Match_InvalidOperand;
    6327             : }
    6328             : 
    6329             : #ifndef NDEBUG
    6330             : const char *getMatchClassName(MatchClassKind Kind) {
    6331             :   switch (Kind) {
    6332             :   case InvalidMatchClass: return "InvalidMatchClass";
    6333             :   case OptionalMatchClass: return "OptionalMatchClass";
    6334             :   case MCK__STAR_: return "MCK__STAR_";
    6335             :   case MCK_b: return "MCK_b";
    6336             :   case MCK_d: return "MCK_d";
    6337             :   case MCK_pd: return "MCK_pd";
    6338             :   case MCK_ps: return "MCK_ps";
    6339             :   case MCK_q: return "MCK_q";
    6340             :   case MCK_sae: return "MCK_sae";
    6341             :   case MCK_sd: return "MCK_sd";
    6342             :   case MCK_ss: return "MCK_ss";
    6343             :   case MCK_ub: return "MCK_ub";
    6344             :   case MCK_ud: return "MCK_ud";
    6345             :   case MCK_uq: return "MCK_uq";
    6346             :   case MCK_uw: return "MCK_uw";
    6347             :   case MCK_w: return "MCK_w";
    6348             :   case MCK__123_: return "MCK__123_";
    6349             :   case MCK__123_1to16_125_: return "MCK__123_1to16_125_";
    6350             :   case MCK__123_1to2_125_: return "MCK__123_1to2_125_";
    6351             :   case MCK__123_1to4_125_: return "MCK__123_1to4_125_";
    6352             :   case MCK__123_1to8_125_: return "MCK__123_1to8_125_";
    6353             :   case MCK__123_sae_125_: return "MCK__123_sae_125_";
    6354             :   case MCK__123_z_125_: return "MCK__123_z_125_";
    6355             :   case MCK__125_: return "MCK__125_";
    6356             :   case MCK_Reg49: return "MCK_Reg49";
    6357             :   case MCK_Reg51: return "MCK_Reg51";
    6358             :   case MCK_AL: return "MCK_AL";
    6359             :   case MCK_AX: return "MCK_AX";
    6360             :   case MCK_CCR: return "MCK_CCR";
    6361             :   case MCK_CL: return "MCK_CL";
    6362             :   case MCK_CS: return "MCK_CS";
    6363             :   case MCK_DFCCR: return "MCK_DFCCR";
    6364             :   case MCK_DS: return "MCK_DS";
    6365             :   case MCK_DX: return "MCK_DX";
    6366             :   case MCK_EAX: return "MCK_EAX";
    6367             :   case MCK_EBX: return "MCK_EBX";
    6368             :   case MCK_ECX: return "MCK_ECX";
    6369             :   case MCK_EDX: return "MCK_EDX";
    6370             :   case MCK_ES: return "MCK_ES";
    6371             :   case MCK_FPCCR: return "MCK_FPCCR";
    6372             :   case MCK_FS: return "MCK_FS";
    6373             :   case MCK_GS: return "MCK_GS";
    6374             :   case MCK_RAX: return "MCK_RAX";
    6375             :   case MCK_RBX: return "MCK_RBX";
    6376             :   case MCK_RCX: return "MCK_RCX";
    6377             :   case MCK_RDX: return "MCK_RDX";
    6378             :   case MCK_SS: return "MCK_SS";
    6379             :   case MCK_ST0: return "MCK_ST0";
    6380             :   case MCK_XMM0: return "MCK_XMM0";
    6381             :   case MCK_Reg50: return "MCK_Reg50";
    6382             :   case MCK_GR32_AD: return "MCK_GR32_AD";
    6383             :   case MCK_GR64_AD: return "MCK_GR64_AD";
    6384             :   case MCK_Reg29: return "MCK_Reg29";
    6385             :   case MCK_GR32_TC: return "MCK_GR32_TC";
    6386             :   case MCK_Reg45: return "MCK_Reg45";
    6387             :   case MCK_BNDR: return "MCK_BNDR";
    6388             :   case MCK_GR16_ABCD: return "MCK_GR16_ABCD";
    6389             :   case MCK_GR32_ABCD: return "MCK_GR32_ABCD";
    6390             :   case MCK_GR64_ABCD: return "MCK_GR64_ABCD";
    6391             :   case MCK_GR8_ABCD_H: return "MCK_GR8_ABCD_H";
    6392             :   case MCK_GR8_ABCD_L: return "MCK_GR8_ABCD_L";
    6393             :   case MCK_Reg37: return "MCK_Reg37";
    6394             :   case MCK_Reg40: return "MCK_Reg40";
    6395             :   case MCK_Reg43: return "MCK_Reg43";
    6396             :   case MCK_SEGMENT_REG: return "MCK_SEGMENT_REG";
    6397             :   case MCK_Reg41: return "MCK_Reg41";
    6398             :   case MCK_Reg44: return "MCK_Reg44";
    6399             :   case MCK_GR32_NOREX_NOSP: return "MCK_GR32_NOREX_NOSP";
    6400             :   case MCK_GR64_NOREX_NOSP: return "MCK_GR64_NOREX_NOSP";
    6401             :   case MCK_RFP32: return "MCK_RFP32";
    6402             :   case MCK_VK16WM: return "MCK_VK16WM";
    6403             :   case MCK_Reg32: return "MCK_Reg32";
    6404             :   case MCK_Reg38: return "MCK_Reg38";
    6405             :   case MCK_Reg63: return "MCK_Reg63";
    6406             :   case MCK_Reg66: return "MCK_Reg66";
    6407             :   case MCK_GR16_NOREX: return "MCK_GR16_NOREX";
    6408             :   case MCK_GR32_NOREX: return "MCK_GR32_NOREX";
    6409             :   case MCK_GR64_TCW64: return "MCK_GR64_TCW64";
    6410             :   case MCK_GR8_NOREX: return "MCK_GR8_NOREX";
    6411             :   case MCK_RST: return "MCK_RST";
    6412             :   case MCK_VK1: return "MCK_VK1";
    6413             :   case MCK_VR128H: return "MCK_VR128H";
    6414             :   case MCK_VR128L: return "MCK_VR128L";
    6415             :   case MCK_VR256H: return "MCK_VR256H";
    6416             :   case MCK_VR256L: return "MCK_VR256L";
    6417             :   case MCK_VR64: return "MCK_VR64";
    6418             :   case MCK_Reg22: return "MCK_Reg22";
    6419             :   case MCK_GR64_NOREX: return "MCK_GR64_NOREX";
    6420             :   case MCK_GR64_TC: return "MCK_GR64_TC";
    6421             :   case MCK_GRH16: return "MCK_GRH16";
    6422             :   case MCK_GR32_NOSP: return "MCK_GR32_NOSP";
    6423             :   case MCK_GR64_NOSP: return "MCK_GR64_NOSP";
    6424             :   case MCK_Reg33: return "MCK_Reg33";
    6425             :   case MCK_Reg64: return "MCK_Reg64";
    6426             :   case MCK_CONTROL_REG: return "MCK_CONTROL_REG";
    6427             :   case MCK_DEBUG_REG: return "MCK_DEBUG_REG";
    6428             :   case MCK_FR32: return "MCK_FR32";
    6429             :   case MCK_GR16: return "MCK_GR16";
    6430             :   case MCK_GR32: return "MCK_GR32";
    6431             :   case MCK_VR256: return "MCK_VR256";
    6432             :   case MCK_Reg19: return "MCK_Reg19";
    6433             :   case MCK_GR64: return "MCK_GR64";
    6434             :   case MCK_LOW32_ADDR_ACCESS: return "MCK_LOW32_ADDR_ACCESS";
    6435             :   case MCK_LOW32_ADDR_ACCESS_RBP: return "MCK_LOW32_ADDR_ACCESS_RBP";
    6436             :   case MCK_GR8: return "MCK_GR8";
    6437             :   case MCK_FR32X: return "MCK_FR32X";
    6438             :   case MCK_VR256X: return "MCK_VR256X";
    6439             :   case MCK_VR512: return "MCK_VR512";
    6440             :   case MCK_AVX512RC: return "MCK_AVX512RC";
    6441             :   case MCK_ImmSExti64i8: return "MCK_ImmSExti64i8";
    6442             :   case MCK_ImmSExti16i8: return "MCK_ImmSExti16i8";
    6443             :   case MCK_ImmSExti32i8: return "MCK_ImmSExti32i8";
    6444             :   case MCK_ImmSExti64i32: return "MCK_ImmSExti64i32";
    6445             :   case MCK_Imm: return "MCK_Imm";
    6446             :   case MCK_ImmUnsignedi8: return "MCK_ImmUnsignedi8";
    6447             :   case MCK_GR32orGR64: return "MCK_GR32orGR64";
    6448             :   case MCK_AbsMem16: return "MCK_AbsMem16";
    6449             :   case MCK_DstIdx16: return "MCK_DstIdx16";
    6450             :   case MCK_DstIdx32: return "MCK_DstIdx32";
    6451             :   case MCK_DstIdx64: return "MCK_DstIdx64";
    6452             :   case MCK_DstIdx8: return "MCK_DstIdx8";
    6453             :   case MCK_MemOffs16_16: return "MCK_MemOffs16_16";
    6454             :   case MCK_MemOffs16_32: return "MCK_MemOffs16_32";
    6455             :   case MCK_MemOffs16_8: return "MCK_MemOffs16_8";
    6456             :   case MCK_MemOffs32_16: return "MCK_MemOffs32_16";
    6457             :   case MCK_MemOffs32_32: return "MCK_MemOffs32_32";
    6458             :   case MCK_MemOffs32_64: return "MCK_MemOffs32_64";
    6459             :   case MCK_MemOffs32_8: return "MCK_MemOffs32_8";
    6460             :   case MCK_MemOffs64_16: return "MCK_MemOffs64_16";
    6461             :   case MCK_MemOffs64_32: return "MCK_MemOffs64_32";
    6462             :   case MCK_MemOffs64_64: return "MCK_MemOffs64_64";
    6463             :   case MCK_MemOffs64_8: return "MCK_MemOffs64_8";
    6464             :   case MCK_SrcIdx16: return "MCK_SrcIdx16";
    6465             :   case MCK_SrcIdx32: return "MCK_SrcIdx32";
    6466             :   case MCK_SrcIdx64: return "MCK_SrcIdx64";
    6467             :   case MCK_SrcIdx8: return "MCK_SrcIdx8";
    6468             :   case MCK_AbsMem: return "MCK_AbsMem";
    6469             :   case MCK_Mem128: return "MCK_Mem128";
    6470             :   case MCK_Mem128_RC128: return "MCK_Mem128_RC128";
    6471             :   case MCK_Mem128_RC128X: return "MCK_Mem128_RC128X";
    6472             :   case MCK_Mem128_RC256: return "MCK_Mem128_RC256";
    6473             :   case MCK_Mem128_RC256X: return "MCK_Mem128_RC256X";
    6474             :   case MCK_Mem16: return "MCK_Mem16";
    6475             :   case MCK_Mem256: return "MCK_Mem256";
    6476             :   case MCK_Mem256_RC128: return "MCK_Mem256_RC128";
    6477             :   case MCK_Mem256_RC128X: return "MCK_Mem256_RC128X";
    6478             :   case MCK_Mem256_RC256: return "MCK_Mem256_RC256";
    6479             :   case MCK_Mem256_RC256X: return "MCK_Mem256_RC256X";
    6480             :   case MCK_Mem256_RC512: return "MCK_Mem256_RC512";
    6481             :   case MCK_Mem32: return "MCK_Mem32";
    6482             :   case MCK_Mem512: return "MCK_Mem512";
    6483             :   case MCK_Mem512_RC256X: return "MCK_Mem512_RC256X";
    6484             :   case MCK_Mem512_RC512: return "MCK_Mem512_RC512";
    6485             :   case MCK_Mem64: return "MCK_Mem64";
    6486             :   case MCK_Mem64_RC128: return "MCK_Mem64_RC128";
    6487             :   case MCK_Mem64_RC128X: return "MCK_Mem64_RC128X";
    6488             :   case MCK_Mem80: return "MCK_Mem80";
    6489             :   case MCK_Mem8: return "MCK_Mem8";
    6490             :   case MCK_Mem: return "MCK_Mem";
    6491             :   case NumMatchClassKinds: return "NumMatchClassKinds";
    6492             :   }
    6493             :   llvm_unreachable("unhandled MatchClassKind!");
    6494             : }
    6495             : 
    6496             : #endif // NDEBUG
    6497        8093 : uint64_t X86AsmParser::
    6498             : ComputeAvailableFeatures(const FeatureBitset& FB) const {
    6499             :   uint64_t Features = 0;
    6500        8093 :   if ((!FB[X86::Mode64Bit]))
    6501             :     Features |= Feature_Not64BitMode;
    6502        8093 :   if ((FB[X86::Mode64Bit]))
    6503        6184 :     Features |= Feature_In64BitMode;
    6504        8093 :   if ((FB[X86::Mode16Bit]))
    6505          46 :     Features |= Feature_In16BitMode;
    6506        8093 :   if ((!FB[X86::Mode16Bit]))
    6507        8047 :     Features |= Feature_Not16BitMode;
    6508        8093 :   if ((FB[X86::Mode32Bit]))
    6509        1863 :     Features |= Feature_In32BitMode;
    6510        8093 :   return Features;
    6511             : }
    6512             : 
    6513      128072 : static bool checkAsmTiedOperandConstraints(unsigned Kind,
    6514             :                                const OperandVector &Operands,
    6515             :                                uint64_t &ErrorInfo) {
    6516             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    6517      128072 :   const uint8_t *Converter = ConversionTable[Kind];
    6518      840638 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    6519      356283 :     switch (*p) {
    6520       44746 :     case CVT_Tied: {
    6521       44746 :       unsigned OpIdx = *(p+1);
    6522             :       assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
    6523             :                               std::begin(TiedAsmOperandTable)) &&
    6524             :              "Tied operand not found");
    6525       44746 :       unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
    6526       44746 :       unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
    6527       44746 :       if (OpndNum1 != OpndNum2) {
    6528           0 :         auto &SrcOp1 = Operands[OpndNum1];
    6529           0 :         auto &SrcOp2 = Operands[OpndNum2];
    6530           0 :         if (SrcOp1->isReg() && SrcOp2->isReg() &&
    6531           0 :             SrcOp1->getReg() != SrcOp2->getReg()) {
    6532           0 :           ErrorInfo = OpndNum2;
    6533           0 :           return false;
    6534             :         }
    6535             :       }
    6536             :       break;
    6537             :     }
    6538             :     default:
    6539             :       break;
    6540             :     }
    6541             :   }
    6542             :   return true;
    6543             : }
    6544             : 
    6545             : static const char *const MnemonicTable =
    6546             :     "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
    6547             :     "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
    6548             :     "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005"
    6549             :     "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge"
    6550             :     "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005"
    6551             :     "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
    6552             :     "extrq\007blcfill\010blcfilll\010blcfillq\004blci\005blcic\006blcicl\006"
    6553             :     "blcicq\005blcil\005blciq\006blcmsk\007blcmskl\007blcmskq\004blcs\005blc"
    6554             :     "sl\005blcsq\007blendpd\007blendps\010blendvpd\010blendvps\007blsfill\010"
    6555             :     "blsfilll\010blsfillq\004blsi\005blsic\006blsicl\006blsicq\005blsil\005b"
    6556             :     "lsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl"
    6557             :     "\005bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003b"
    6558             :     "sf\004bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006b"
    6559             :     "swapl\006bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003b"
    6560             :     "tr\004btrl\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzh"
    6561             :     "i\005bzhil\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003"
    6562             :     "cdq\004cdqe\004clac\003clc\003cld\010cldemote\007clflush\nclflushopt\004"
    6563             :     "clgi\003cli\003clr\004clrb\004clrl\004clrq\010clrssbsy\004clrw\004cltd\004"
    6564             :     "cltq\004clts\004clwb\006clzero\003cmc\005cmova\006cmovae\007cmovael\007"
    6565             :     "cmovaeq\007cmovaew\006cmoval\006cmovaq\006cmovaw\005cmovb\006cmovbe\007"
    6566             :     "cmovbel\007cmovbeq\007cmovbew\006cmovbl\006cmovbq\006cmovbw\005cmove\006"
    6567             :     "cmovel\006cmoveq\006cmovew\005cmovg\006cmovge\007cmovgel\007cmovgeq\007"
    6568             :     "cmovgew\006cmovgl\006cmovgq\006cmovgw\005cmovl\006cmovle\007cmovlel\007"
    6569             :     "cmovleq\007cmovlew\006cmovll\006cmovlq\006cmovlw\006cmovne\007cmovnel\007"
    6570             :     "cmovneq\007cmovnew\006cmovno\007cmovnol\007cmovnoq\007cmovnow\006cmovnp"
    6571             :     "\007cmovnpl\007cmovnpq\007cmovnpw\006cmovns\007cmovnsl\007cmovnsq\007cm"
    6572             :     "ovnsw\005cmovo\006cmovol\006cmovoq\006cmovow\005cmovp\006cmovpl\006cmov"
    6573             :     "pq\006cmovpw\005cmovs\006cmovsl\006cmovsq\006cmovsw\003cmp\004cmpb\004c"
    6574             :     "mpl\005cmppd\005cmpps\004cmpq\004cmps\005cmpsb\005cmpsd\005cmpsl\005cmp"
    6575             :     "sq\005cmpss\005cmpsw\004cmpw\007cmpxchg\ncmpxchg16b\tcmpxchg8b\010cmpxc"
    6576             :     "hgb\010cmpxchgl\010cmpxchgq\010cmpxchgw\006comisd\006comiss\005cpuid\003"
    6577             :     "cqo\004cqto\005crc32\006crc32b\006crc32l\006crc32q\006crc32w\002cs\010c"
    6578             :     "vtdq2pd\010cvtdq2ps\010cvtpd2dq\010cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010"
    6579             :     "cvtpi2ps\010cvtps2dq\010cvtps2pd\010cvtps2pi\010cvtsd2si\tcvtsd2sil\tcv"
    6580             :     "tsd2siq\010cvtsd2ss\010cvtsi2sd\tcvtsi2sdl\tcvtsi2sdq\010cvtsi2ss\tcvts"
    6581             :     "i2ssl\tcvtsi2ssq\010cvtss2sd\010cvtss2si\tcvtss2sil\tcvtss2siq\tcvttpd2"
    6582             :     "dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\tcvttsd2si\ncvttsd2sil\ncvttsd2siq\t"
    6583             :     "cvttss2si\ncvttss2sil\ncvttss2siq\003cwd\004cwde\004cwtd\004cwtl\003daa"
    6584             :     "\003das\006data16\003dec\004decb\004decl\004decq\004decw\003div\004divb"
    6585             :     "\004divl\005divpd\005divps\004divq\005divsd\005divss\004divw\004dppd\004"
    6586             :     "dpps\002ds\004emms\005encls\005enclu\005enclv\007endbr32\007endbr64\005"
    6587             :     "enter\002es\textractps\005extrq\005f2xm1\004fabs\004fadd\005faddl\005fa"
    6588             :     "ddp\005fadds\004fbld\005fbstp\004fchs\006fcmovb\007fcmovbe\006fcmove\007"
    6589             :     "fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006fcmovu\004fcom\005fcomi\005"
    6590             :     "fcoml\005fcomp\006fcompi\006fcompl\006fcompp\006fcomps\005fcoms\004fcos"
    6591             :     "\007fdecstp\004fdiv\005fdivl\005fdivp\005fdivr\006fdivrl\006fdivrp\006f"
    6592             :     "divrs\005fdivs\005femms\005ffree\006ffreep\005fiadd\006fiaddl\006fiadds"
    6593             :     "\005ficom\006ficoml\006ficomp\007ficompl\007ficomps\006ficoms\005fidiv\006"
    6594             :     "fidivl\006fidivr\007fidivrl\007fidivrs\006fidivs\004fild\005fildl\006fi"
    6595             :     "ldll\005filds\005fimul\006fimull\006fimuls\007fincstp\004fist\005fistl\005"
    6596             :     "fistp\006fistpl\007fistpll\006fistps\005fists\006fisttp\007fisttpl\010f"
    6597             :     "isttpll\007fisttps\005fisub\006fisubl\006fisubr\007fisubrl\007fisubrs\006"
    6598             :     "fisubs\003fld\004fld1\005fldcw\006fldenv\004fldl\006fldl2e\006fldl2t\006"
    6599             :     "fldlg2\006fldln2\005fldpi\004flds\004fldt\004fldz\004fmul\005fmull\005f"
    6600             :     "mulp\005fmuls\006fnclex\006fninit\004fnop\006fnsave\006fnstcw\007fnsten"
    6601             :     "v\006fnstsw\006fpatan\005fprem\006fprem1\005fptan\007frndint\006frstor\002"
    6602             :     "fs\006fscale\004fsin\007fsincos\005fsqrt\003fst\004fstl\004fstp\005fstp"
    6603             :     "l\005fstps\005fstpt\004fsts\004fsub\005fsubl\005fsubp\005fsubr\006fsubr"
    6604             :     "l\006fsubrp\006fsubrs\005fsubs\004ftst\005fucom\006fucomi\006fucomp\007"
    6605             :     "fucompi\007fucompp\004fxam\004fxch\007fxrstor\tfxrstor64\006fxsave\010f"
    6606             :     "xsave64\007fxtract\005fyl2x\007fyl2xp1\006getsec\020gf2p8affineinvqb\015"
    6607             :     "gf2p8affineqb\tgf2p8mulb\002gs\006haddpd\006haddps\003hlt\006hsubpd\006"
    6608             :     "hsubps\004idiv\005idivb\005idivl\005idivq\005idivw\004imul\005imulb\005"
    6609             :     "imull\005imulq\005imulw\002in\003inb\003inc\004incb\004incl\004incq\007"
    6610             :     "incsspd\007incsspq\004incw\003inl\003ins\004insb\004insd\010insertps\007"
    6611             :     "insertq\004insl\004insw\003int\004int3\004into\004invd\006invept\006inv"
    6612             :     "lpg\007invlpga\007invpcid\007invvpid\003inw\004iret\005iretd\005iretl\005"
    6613             :     "iretq\005iretw\002ja\003jae\002jb\003jbe\004jcxz\002je\005jecxz\002jg\003"
    6614             :     "jge\002jl\003jle\003jmp\004jmpl\004jmpq\004jmpw\003jne\003jno\003jnp\003"
    6615             :     "jns\002jo\002jp\005jrcxz\002js\005kaddb\005kaddd\005kaddq\005kaddw\005k"
    6616             :     "andb\005kandd\006kandnb\006kandnd\006kandnq\006kandnw\005kandq\005kandw"
    6617             :     "\005kmovb\005kmovd\005kmovq\005kmovw\005knotb\005knotd\005knotq\005knot"
    6618             :     "w\004korb\004kord\004korq\010kortestb\010kortestd\010kortestq\010kortes"
    6619             :     "tw\004korw\010kshiftlb\010kshiftld\010kshiftlq\010kshiftlw\010kshiftrb\010"
    6620             :     "kshiftrd\010kshiftrq\010kshiftrw\006ktestb\006ktestd\006ktestq\006ktest"
    6621             :     "w\010kunpckbw\010kunpckdq\010kunpckwd\006kxnorb\006kxnord\006kxnorq\006"
    6622             :     "kxnorw\005kxorb\005kxord\005kxorq\005kxorw\004lahf\003lar\004larl\004la"
    6623             :     "rq\004larw\005lcall\006lcalll\006lcallq\006lcallw\005lddqu\007ldmxcsr\003"
    6624             :     "lds\004ldsl\004ldsw\003lea\004leal\004leaq\005leave\004leaw\003les\004l"
    6625             :     "esl\004lesw\006lfence\003lfs\004lfsl\004lfsq\004lfsw\004lgdt\005lgdtd\005"
    6626             :     "lgdtl\005lgdtq\005lgdtw\003lgs\004lgsl\004lgsq\004lgsw\004lidt\005lidtd"
    6627             :     "\005lidtl\005lidtq\005lidtw\004ljmp\005ljmpl\005ljmpq\005ljmpw\004lldt\005"
    6628             :     "lldtw\006llwpcb\004lmsw\005lmsww\004lock\004lods\005lodsb\005lodsd\005l"
    6629             :     "odsl\005lodsq\005lodsw\004loop\005loope\006loopne\005lretl\005lretq\005"
    6630             :     "lretw\003lsl\004lsll\004lslq\004lslw\003lss\004lssl\004lssq\004lssw\003"
    6631             :     "ltr\004ltrw\006lwpins\006lwpval\005lzcnt\006lzcntl\006lzcntq\006lzcntw\n"
    6632             :     "maskmovdqu\010maskmovq\005maxpd\005maxps\005maxsd\005maxss\006mfence\005"
    6633             :     "minpd\005minps\005minsd\005minss\007monitor\010monitorx\007montmul\003m"
    6634             :     "ov\006movabs\007movabsb\007movabsl\007movabsq\007movabsw\006movapd\006m"
    6635             :     "ovaps\004movb\005movbe\006movbel\006movbeq\006movbew\004movd\007movddup"
    6636             :     "\tmovdir64b\007movdiri\007movdq2q\006movdqa\006movdqu\007movhlps\006mov"
    6637             :     "hpd\006movhps\004movl\007movlhps\006movlpd\006movlps\010movmskpd\010mov"
    6638             :     "mskps\007movntdq\010movntdqa\006movnti\007movntil\007movntiq\007movntpd"
    6639             :     "\007movntps\006movntq\007movntsd\007movntss\004movq\007movq2dq\004movs\005"
    6640             :     "movsb\006movsbl\006movsbq\006movsbw\005movsd\010movshdup\005movsl\010mo"
    6641             :     "vsldup\006movslq\005movsq\005movss\005movsw\006movswl\006movswq\005movs"
    6642             :     "x\006movsxd\006movupd\006movups\004movw\006movzbl\006movzbq\006movzbw\006"
    6643             :     "movzwl\006movzwq\005movzx\007mpsadbw\003mul\004mulb\004mull\005mulpd\005"
    6644             :     "mulps\004mulq\005mulsd\005mulss\004mulw\004mulx\005mulxl\005mulxq\005mw"
    6645             :     "ait\006mwaitx\003neg\004negb\004negl\004negq\004negw\003nop\004nopl\004"
    6646             :     "nopq\004nopw\003not\004notb\004notl\004notq\004notw\002or\003orb\003orl"
    6647             :     "\004orpd\004orps\003orq\003orw\003out\004outb\004outl\004outs\005outsb\005"
    6648             :     "outsd\005outsl\005outsw\004outw\005pabsb\005pabsd\005pabsw\010packssdw\010"
    6649             :     "packsswb\010packusdw\010packuswb\005paddb\005paddd\005paddq\006paddsb\006"
    6650             :     "paddsw\007paddusb\007paddusw\005paddw\007palignr\004pand\005pandn\005pa"
    6651             :     "use\005pavgb\007pavgusb\005pavgw\010pblendvb\007pblendw\014pclmulhqhqdq"
    6652             :     "\014pclmulhqlqdq\014pclmullqhqdq\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007"
    6653             :     "pcmpeqd\007pcmpeqq\007pcmpeqw\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpg"
    6654             :     "td\007pcmpgtq\007pcmpgtw\tpcmpistri\tpcmpistrm\007pconfig\004pdep\005pd"
    6655             :     "epl\005pdepq\004pext\005pextl\005pextq\006pextrb\006pextrd\006pextrq\006"
    6656             :     "pextrw\005pf2id\005pf2iw\005pfacc\005pfadd\007pfcmpeq\007pfcmpge\007pfc"
    6657             :     "mpgt\005pfmax\005pfmin\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpi"
    6658             :     "t1\010pfrcpit2\010pfrsqit1\007pfrsqrt\005pfsub\006pfsubr\006phaddd\007p"
    6659             :     "haddsw\006phaddw\nphminposuw\006phsubd\007phsubsw\006phsubw\005pi2fd\005"
    6660             :     "pi2fw\006pinsrb\006pinsrd\006pinsrq\006pinsrw\tpmaddubsw\007pmaddwd\006"
    6661             :     "pmaxsb\006pmaxsd\006pmaxsw\006pmaxub\006pmaxud\006pmaxuw\006pminsb\006p"
    6662             :     "minsd\006pminsw\006pminub\006pminud\006pminuw\010pmovmskb\010pmovsxbd\010"
    6663             :     "pmovsxbq\010pmovsxbw\010pmovsxdq\010pmovsxwd\010pmovsxwq\010pmovzxbd\010"
    6664             :     "pmovzxbq\010pmovzxbw\010pmovzxdq\010pmovzxwd\010pmovzxwq\006pmuldq\010p"
    6665             :     "mulhrsw\007pmulhrw\007pmulhuw\006pmulhw\006pmulld\006pmullw\007pmuludq\003"
    6666             :     "pop\005popal\005popaw\006popcnt\007popcntl\007popcntq\007popcntw\004pop"
    6667             :     "f\005popfd\005popfl\005popfq\005popfw\004popl\004popq\004popw\003por\010"
    6668             :     "prefetch\013prefetchnta\nprefetcht0\nprefetcht1\nprefetcht2\tprefetchw\013"
    6669             :     "prefetchwt1\006psadbw\006pshufb\006pshufd\007pshufhw\007pshuflw\006pshu"
    6670             :     "fw\006psignb\006psignd\006psignw\005pslld\006pslldq\005psllq\005psllw\005"
    6671             :     "psrad\005psraw\005psrld\006psrldq\005psrlq\005psrlw\005psubb\005psubd\005"
    6672             :     "psubq\006psubsb\006psubsw\007psubusb\007psubusw\005psubw\006pswapd\005p"
    6673             :     "test\007ptwrite\010ptwritel\010ptwriteq\tpunpckhbw\tpunpckhdq\npunpckhq"
    6674             :     "dq\tpunpckhwd\tpunpcklbw\tpunpckldq\npunpcklqdq\tpunpcklwd\004push\006p"
    6675             :     "ushal\006pushaw\005pushf\006pushfd\006pushfl\006pushfq\006pushfw\005pus"
    6676             :     "hl\005pushq\005pushw\004pxor\003rcl\004rclb\004rcll\004rclq\004rclw\005"
    6677             :     "rcpps\005rcpss\003rcr\004rcrb\004rcrl\004rcrq\004rcrw\010rdfsbase\trdfs"
    6678             :     "basel\trdfsbaseq\010rdgsbase\trdgsbasel\trdgsbaseq\005rdmsr\005rdpid\006"
    6679             :     "rdpkru\005rdpmc\006rdrand\007rdrandl\007rdrandq\007rdrandw\006rdseed\007"
    6680             :     "rdseedl\007rdseedq\007rdseedw\006rdsspd\006rdsspq\005rdtsc\006rdtscp\003"
    6681             :     "rep\005repne\003ret\004retf\005retfq\004retl\004retq\004retw\005rex64\003"
    6682             :     "rol\004rolb\004roll\004rolq\004rolw\003ror\004rorb\004rorl\004rorq\004r"
    6683             :     "orw\004rorx\005rorxl\005rorxq\007roundpd\007roundps\007roundsd\007round"
    6684             :     "ss\003rsm\007rsqrtps\007rsqrtss\010rstorssp\004sahf\004salc\003sar\004s"
    6685             :     "arb\004sarl\004sarq\004sarw\004sarx\005sarxl\005sarxq\013saveprevssp\003"
    6686             :     "sbb\004sbbb\004sbbl\004sbbq\004sbbw\004scas\005scasb\005scasd\005scasl\005"
    6687             :     "scasq\005scasw\004seta\005setae\004setb\005setbe\004sete\004setg\005set"
    6688             :     "ge\004setl\005setle\005setne\005setno\005setnp\005setns\004seto\004setp"
    6689             :     "\004sets\010setssbsy\006sfence\004sgdt\005sgdtd\005sgdtl\005sgdtq\005sg"
    6690             :     "dtw\010sha1msg1\010sha1msg2\tsha1nexte\tsha1rnds4\nsha256msg1\nsha256ms"
    6691             :     "g2\013sha256rnds2\003shl\004shlb\004shld\005shldl\005shldq\005shldw\004"
    6692             :     "shll\004shlq\004shlw\004shlx\005shlxl\005shlxq\003shr\004shrb\004shrd\005"
    6693             :     "shrdl\005shrdq\005shrdw\004shrl\004shrq\004shrw\004shrx\005shrxl\005shr"
    6694             :     "xq\006shufpd\006shufps\004sidt\005sidtd\005sidtl\005sidtq\005sidtw\006s"
    6695             :     "kinit\004sldt\005sldtl\005sldtq\005sldtw\006slwpcb\004smsw\005smswl\005"
    6696             :     "smswq\005smsww\006sqrtpd\006sqrtps\006sqrtsd\006sqrtss\002ss\004stac\003"
    6697             :     "stc\003std\004stgi\003sti\007stmxcsr\004stos\005stosb\005stosd\005stosl"
    6698             :     "\005stosq\005stosw\003str\004strl\004strq\004strw\003sub\004subb\004sub"
    6699             :     "l\005subpd\005subps\004subq\005subsd\005subss\004subw\006swapgs\007sysc"
    6700             :     "all\010sysenter\007sysexit\010sysexitl\010sysexitq\006sysret\007sysretl"
    6701             :     "\007sysretq\006t1mskc\007t1mskcl\007t1mskcq\004test\005testb\005testl\005"
    6702             :     "testq\005testw\006tpause\005tzcnt\006tzcntl\006tzcntq\006tzcntw\005tzms"
    6703             :     "k\006tzmskl\006tzmskq\007ucomisd\007ucomiss\003ud2\004ud2b\010umonitor\006"
    6704             :     "umwait\010unpckhpd\010unpckhps\010unpcklpd\010unpcklps\tv4fmaddps\tv4fm"
    6705             :     "addss\nv4fnmaddps\nv4fnmaddss\006vaddpd\006vaddps\006vaddsd\006vaddss\t"
    6706             :     "vaddsubpd\tvaddsubps\007vaesdec\013vaesdeclast\007vaesenc\013vaesenclas"
    6707             :     "t\007vaesimc\020vaeskeygenassist\007valignd\007valignq\007vandnpd\007va"
    6708             :     "ndnps\006vandpd\006vandps\tvblendmpd\tvblendmps\010vblendpd\010vblendps"
    6709             :     "\tvblendvpd\tvblendvps\016vbroadcastf128\017vbroadcastf32x2\017vbroadca"
    6710             :     "stf32x4\017vbroadcastf32x8\017vbroadcastf64x2\017vbroadcastf64x4\016vbr"
    6711             :     "oadcasti128\017vbroadcasti32x2\017vbroadcasti32x4\017vbroadcasti32x8\017"
    6712             :     "vbroadcasti64x2\017vbroadcasti64x4\014vbroadcastsd\014vbroadcastss\004v"
    6713             :     "cmp\006vcmppd\006vcmpps\006vcmpsd\006vcmpss\007vcomisd\007vcomiss\013vc"
    6714             :     "ompresspd\013vcompressps\tvcvtdq2pd\tvcvtdq2ps\tvcvtpd2dq\nvcvtpd2dqx\n"
    6715             :     "vcvtpd2dqy\tvcvtpd2ps\nvcvtpd2psx\nvcvtpd2psy\tvcvtpd2qq\nvcvtpd2udq\013"
    6716             :     "vcvtpd2udqx\013vcvtpd2udqy\nvcvtpd2uqq\tvcvtph2ps\tvcvtps2dq\tvcvtps2pd"
    6717             :     "\tvcvtps2ph\tvcvtps2qq\nvcvtps2udq\nvcvtps2uqq\tvcvtqq2pd\tvcvtqq2ps\nv"
    6718             :     "cvtqq2psx\nvcvtqq2psy\tvcvtsd2si\nvcvtsd2sil\nvcvtsd2siq\tvcvtsd2ss\nvc"
    6719             :     "vtsd2usi\013vcvtsd2usil\013vcvtsd2usiq\tvcvtsi2sd\nvcvtsi2sdl\nvcvtsi2s"
    6720             :     "dq\tvcvtsi2ss\nvcvtsi2ssl\nvcvtsi2ssq\tvcvtss2sd\tvcvtss2si\nvcvtss2sil"
    6721             :     "\nvcvtss2siq\nvcvtss2usi\013vcvtss2usil\013vcvtss2usiq\nvcvttpd2dq\013v"
    6722             :     "cvttpd2dqx\013vcvttpd2dqy\nvcvttpd2qq\013vcvttpd2udq\014vcvttpd2udqx\014"
    6723             :     "vcvttpd2udqy\013vcvttpd2uqq\nvcvttps2dq\nvcvttps2qq\013vcvttps2udq\013v"
    6724             :     "cvttps2uqq\nvcvttsd2si\013vcvttsd2sil\013vcvttsd2siq\013vcvttsd2usi\014"
    6725             :     "vcvttsd2usil\014vcvttsd2usiq\nvcvttss2si\013vcvttss2sil\013vcvttss2siq\013"
    6726             :     "vcvttss2usi\014vcvttss2usil\014vcvttss2usiq\nvcvtudq2pd\nvcvtudq2ps\nvc"
    6727             :     "vtuqq2pd\nvcvtuqq2ps\013vcvtuqq2psx\013vcvtuqq2psy\nvcvtusi2sd\013vcvtu"
    6728             :     "si2sdl\013vcvtusi2sdq\nvcvtusi2ss\013vcvtusi2ssl\013vcvtusi2ssq\tvdbpsa"
    6729             :     "dbw\006vdivpd\006vdivps\006vdivsd\006vdivss\005vdppd\005vdpps\004verr\004"
    6730             :     "verw\007vexp2pd\007vexp2ps\tvexpandpd\tvexpandps\014vextractf128\015vex"
    6731             :     "tractf32x4\015vextractf32x8\015vextractf64x2\015vextractf64x4\014vextra"
    6732             :     "cti128\015vextracti32x4\015vextracti32x8\015vextracti64x2\015vextracti6"
    6733             :     "4x4\nvextractps\013vfixupimmpd\013vfixupimmps\013vfixupimmsd\013vfixupi"
    6734             :     "mmss\013vfmadd132pd\013vfmadd132ps\013vfmadd132sd\013vfmadd132ss\013vfm"
    6735             :     "add213pd\013vfmadd213ps\013vfmadd213sd\013vfmadd213ss\013vfmadd231pd\013"
    6736             :     "vfmadd231ps\013vfmadd231sd\013vfmadd231ss\010vfmaddpd\010vfmaddps\010vf"
    6737             :     "maddsd\010vfmaddss\016vfmaddsub132pd\016vfmaddsub132ps\016vfmaddsub213p"
    6738             :     "d\016vfmaddsub213ps\016vfmaddsub231pd\016vfmaddsub231ps\013vfmaddsubpd\013"
    6739             :     "vfmaddsubps\013vfmsub132pd\013vfmsub132ps\013vfmsub132sd\013vfmsub132ss"
    6740             :     "\013vfmsub213pd\013vfmsub213ps\013vfmsub213sd\013vfmsub213ss\013vfmsub2"
    6741             :     "31pd\013vfmsub231ps\013vfmsub231sd\013vfmsub231ss\016vfmsubadd132pd\016"
    6742             :     "vfmsubadd132ps\016vfmsubadd213pd\016vfmsubadd213ps\016vfmsubadd231pd\016"
    6743             :     "vfmsubadd231ps\013vfmsubaddpd\013vfmsubaddps\010vfmsubpd\010vfmsubps\010"
    6744             :     "vfmsubsd\010vfmsubss\014vfnmadd132pd\014vfnmadd132ps\014vfnmadd132sd\014"
    6745             :     "vfnmadd132ss\014vfnmadd213pd\014vfnmadd213ps\014vfnmadd213sd\014vfnmadd"
    6746             :     "213ss\014vfnmadd231pd\014vfnmadd231ps\014vfnmadd231sd\014vfnmadd231ss\t"
    6747             :     "vfnmaddpd\tvfnmaddps\tvfnmaddsd\tvfnmaddss\014vfnmsub132pd\014vfnmsub13"
    6748             :     "2ps\014vfnmsub132sd\014vfnmsub132ss\014vfnmsub213pd\014vfnmsub213ps\014"
    6749             :     "vfnmsub213sd\014vfnmsub213ss\014vfnmsub231pd\014vfnmsub231ps\014vfnmsub"
    6750             :     "231sd\014vfnmsub231ss\tvfnmsubpd\tvfnmsubps\tvfnmsubsd\tvfnmsubss\nvfpc"
    6751             :     "lasspd\013vfpclasspdq\013vfpclasspdx\013vfpclasspdy\013vfpclasspdz\nvfp"
    6752             :     "classps\013vfpclasspsl\013vfpclasspsx\013vfpclasspsy\013vfpclasspsz\nvf"
    6753             :     "pclasssd\nvfpclassss\007vfrczpd\007vfrczps\007vfrczsd\007vfrczss\nvgath"
    6754             :     "erdpd\nvgatherdps\015vgatherpf0dpd\015vgatherpf0dps\015vgatherpf0qpd\015"
    6755             :     "vgatherpf0qps\015vgatherpf1dpd\015vgatherpf1dps\015vgatherpf1qpd\015vga"
    6756             :     "therpf1qps\nvgatherqpd\nvgatherqps\tvgetexppd\tvgetexpps\tvgetexpsd\tvg"
    6757             :     "etexpss\nvgetmantpd\nvgetmantps\nvgetmantsd\nvgetmantss\021vgf2p8affine"
    6758             :     "invqb\016vgf2p8affineqb\nvgf2p8mulb\007vhaddpd\007vhaddps\007vhsubpd\007"
    6759             :     "vhsubps\013vinsertf128\014vinsertf32x4\014vinsertf32x8\014vinsertf64x2\014"
    6760             :     "vinsertf64x4\013vinserti128\014vinserti32x4\014vinserti32x8\014vinserti"
    6761             :     "64x2\014vinserti64x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nv"
    6762             :     "maskmovpd\nvmaskmovps\006vmaxpd\006vmaxps\006vmaxsd\006vmaxss\006vmcall"
    6763             :     "\007vmclear\006vmfunc\006vminpd\006vminps\006vminsd\006vminss\010vmlaun"
    6764             :     "ch\006vmload\007vmmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005"
    6765             :     "vmovd\010vmovddup\007vmovdqa\tvmovdqa32\013vmovdqa32.s\tvmovdqa64\013vm"
    6766             :     "ovdqa64.s\007vmovdqu\tvmovdqu16\013vmovdqu16.s\tvmovdqu32\013vmovdqu32."
    6767             :     "s\tvmovdqu64\013vmovdqu64.s\010vmovdqu8\nvmovdqu8.s\010vmovhlps\007vmov"
    6768             :     "hpd\007vmovhps\010vmovlhps\007vmovlpd\007vmovlps\tvmovmskpd\tvmovmskps\010"
    6769             :     "vmovntdq\tvmovntdqa\010vmovntpd\010vmovntps\005vmovq\007vmovq.s\006vmov"
    6770             :     "sd\010vmovsd.s\tvmovshdup\tvmovsldup\006vmovss\010vmovss.s\007vmovupd\t"
    6771             :     "vmovupd.s\007vmovups\tvmovups.s\010vmpsadbw\007vmptrld\007vmptrst\006vm"
    6772             :     "read\007vmreadl\007vmreadq\010vmresume\005vmrun\006vmsave\006vmulpd\006"
    6773             :     "vmulps\006vmulsd\006vmulss\007vmwrite\010vmwritel\010vmwriteq\006vmxoff"
    6774             :     "\005vmxon\005vorpd\005vorps\tvp4dpwssd\nvp4dpwssds\006vpabsb\006vpabsd\006"
    6775             :     "vpabsq\006vpabsw\tvpackssdw\tvpacksswb\tvpackusdw\tvpackuswb\006vpaddb\006"
    6776             :     "vpaddd\006vpaddq\007vpaddsb\007vpaddsw\010vpaddusb\010vpaddusw\006vpadd"
    6777             :     "w\010vpalignr\005vpand\006vpandd\006vpandn\007vpandnd\007vpandnq\006vpa"
    6778             :     "ndq\006vpavgb\006vpavgw\010vpblendd\tvpblendmb\tvpblendmd\tvpblendmq\tv"
    6779             :     "pblendmw\tvpblendvb\010vpblendw\014vpbroadcastb\014vpbroadcastd\017vpbr"
    6780             :     "oadcastmb2q\017vpbroadcastmw2d\014vpbroadcastq\014vpbroadcastw\015vpclm"
    6781             :     "ulhqhqdq\015vpclmulhqlqdq\015vpclmullqhqdq\015vpclmullqlqdq\nvpclmulqdq"
    6782             :     "\006vpcmov\005vpcmp\006vpcmpb\006vpcmpd\010vpcmpeqb\010vpcmpeqd\010vpcm"
    6783             :     "peqq\010vpcmpeqw\nvpcmpestri\nvpcmpestrm\010vpcmpgtb\010vpcmpgtd\010vpc"
    6784             :     "mpgtq\010vpcmpgtw\nvpcmpistri\nvpcmpistrm\006vpcmpq\007vpcmpub\007vpcmp"
    6785             :     "ud\007vpcmpuq\007vpcmpuw\006vpcmpw\005vpcom\006vpcomb\006vpcomd\013vpco"
    6786             :     "mpressb\013vpcompressd\013vpcompressq\013vpcompressw\006vpcomq\007vpcom"
    6787             :     "ub\007vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vpconflictd\013vpconfl"
    6788             :     "ictq\010vpdpbusd\tvpdpbusds\010vpdpwssd\tvpdpwssds\nvperm2f128\nvperm2i"
    6789             :     "128\006vpermb\006vpermd\010vpermi2b\010vpermi2d\tvpermi2pd\tvpermi2ps\010"
    6790             :     "vpermi2q\010vpermi2w\nvpermil2pd\nvpermil2ps\tvpermilpd\tvpermilps\007v"
    6791             :     "permpd\007vpermps\006vpermq\010vpermt2b\010vpermt2d\tvpermt2pd\tvpermt2"
    6792             :     "ps\010vpermt2q\010vpermt2w\006vpermw\tvpexpandb\tvpexpandd\tvpexpandq\t"
    6793             :     "vpexpandw\007vpextrb\007vpextrd\007vpextrq\007vpextrw\tvpextrw.s\nvpgat"
    6794             :     "herdd\nvpgatherdq\nvpgatherqd\nvpgatherqq\010vphaddbd\010vphaddbq\010vp"
    6795             :     "haddbw\007vphaddd\010vphadddq\010vphaddsw\tvphaddubd\tvphaddubq\tvphadd"
    6796             :     "ubw\tvphaddudq\tvphadduwd\tvphadduwq\007vphaddw\010vphaddwd\010vphaddwq"
    6797             :     "\013vphminposuw\010vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007vphsu"
    6798             :     "bw\010vphsubwd\007vpinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplzcntd\010"
    6799             :     "vplzcntq\010vpmacsdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssdqh\nvpma"
    6800             :     "cssdql\tvpmacsswd\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcsswd\tvpmad"
    6801             :     "cswd\013vpmadd52huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpmaskmovd\n"
    6802             :     "vpmaskmovq\007vpmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpmaxub\007vp"
    6803             :     "maxud\007vpmaxuq\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007vpminsw"
    6804             :     "\007vpminub\007vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmovd2m\007"
    6805             :     "vpmovdb\007vpmovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmovm2w\tvpm"
    6806             :     "ovmskb\010vpmovq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb\010vpmo"
    6807             :     "vsdw\010vpmovsqb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd\tvpmovs"
    6808             :     "xbq\tvpmovsxbw\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpmovusdw\t"
    6809             :     "vpmovusqb\tvpmovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmovwb\tvpmo"
    6810             :     "vzxbd\tvpmovzxbq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007vpmuldq"
    6811             :     "\tvpmulhrsw\010vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmullw\016"
    6812             :     "vpmultishiftqb\010vpmuludq\010vpopcntb\010vpopcntd\010vpopcntq\010vpopc"
    6813             :     "ntw\004vpor\005vpord\005vporq\006vpperm\006vprold\006vprolq\007vprolvd\007"
    6814             :     "vprolvq\006vprord\006vprorq\007vprorvd\007vprorvq\006vprotb\006vprotd\006"
    6815             :     "vprotq\006vprotw\007vpsadbw\013vpscatterdd\013vpscatterdq\013vpscatterq"
    6816             :     "d\013vpscatterqq\006vpshab\006vpshad\006vpshaq\006vpshaw\006vpshlb\006v"
    6817             :     "pshld\007vpshldd\007vpshldq\010vpshldvd\010vpshldvq\010vpshldvw\007vpsh"
    6818             :     "ldw\006vpshlq\006vpshlw\007vpshrdd\007vpshrdq\010vpshrdvd\010vpshrdvq\010"
    6819             :     "vpshrdvw\007vpshrdw\007vpshufb\014vpshufbitqmb\007vpshufd\010vpshufhw\010"
    6820             :     "vpshuflw\007vpsignb\007vpsignd\007vpsignw\006vpslld\007vpslldq\006vpsll"
    6821             :     "q\007vpsllvd\007vpsllvq\007vpsllvw\006vpsllw\006vpsrad\006vpsraq\007vps"
    6822             :     "ravd\007vpsravq\007vpsravw\006vpsraw\006vpsrld\007vpsrldq\006vpsrlq\007"
    6823             :     "vpsrlvd\007vpsrlvq\007vpsrlvw\006vpsrlw\006vpsubb\006vpsubd\006vpsubq\007"
    6824             :     "vpsubsb\007vpsubsw\010vpsubusb\010vpsubusw\006vpsubw\nvpternlogd\nvpter"
    6825             :     "nlogq\006vptest\010vptestmb\010vptestmd\010vptestmq\010vptestmw\tvptest"
    6826             :     "nmb\tvptestnmd\tvptestnmq\tvptestnmw\nvpunpckhbw\nvpunpckhdq\013vpunpck"
    6827             :     "hqdq\nvpunpckhwd\nvpunpcklbw\nvpunpckldq\013vpunpcklqdq\nvpunpcklwd\005"
    6828             :     "vpxor\006vpxord\006vpxorq\010vrangepd\010vrangeps\010vrangesd\010vrange"
    6829             :     "ss\010vrcp14pd\010vrcp14ps\010vrcp14sd\010vrcp14ss\010vrcp28pd\010vrcp2"
    6830             :     "8ps\010vrcp28sd\010vrcp28ss\006vrcpps\006vrcpss\tvreducepd\tvreduceps\t"
    6831             :     "vreducesd\tvreducess\013vrndscalepd\013vrndscaleps\013vrndscalesd\013vr"
    6832             :     "ndscaless\010vroundpd\010vroundps\010vroundsd\010vroundss\nvrsqrt14pd\n"
    6833             :     "vrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nvrsqrt28pd\nvrsqrt28ps\nvrsqrt28sd\n"
    6834             :     "vrsqrt28ss\010vrsqrtps\010vrsqrtss\tvscalefpd\tvscalefps\tvscalefsd\tvs"
    6835             :     "calefss\013vscatterdpd\013vscatterdps\016vscatterpf0dpd\016vscatterpf0d"
    6836             :     "ps\016vscatterpf0qpd\016vscatterpf0qps\016vscatterpf1dpd\016vscatterpf1"
    6837             :     "dps\016vscatterpf1qpd\016vscatterpf1qps\013vscatterqpd\013vscatterqps\n"
    6838             :     "vshuff32x4\nvshuff64x2\nvshufi32x4\nvshufi64x2\007vshufpd\007vshufps\007"
    6839             :     "vsqrtpd\007vsqrtps\007vsqrtsd\007vsqrtss\010vstmxcsr\006vsubpd\006vsubp"
    6840             :     "s\006vsubsd\006vsubss\007vtestpd\007vtestps\010vucomisd\010vucomiss\tvu"
    6841             :     "npckhpd\tvunpckhps\tvunpcklpd\tvunpcklps\006vxorpd\006vxorps\010vzeroal"
    6842             :     "l\nvzeroupper\004wait\006wbinvd\010wbnoinvd\010wrfsbase\twrfsbasel\twrf"
    6843             :     "sbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrmsr\006wrpkru\005wrssd\005"
    6844             :     "wrssq\006wrussd\006wrussq\006xabort\010xacquire\004xadd\005xaddb\005xad"
    6845             :     "dl\005xaddq\005xaddw\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xc"
    6846             :     "hgw\txcryptcbc\txcryptcfb\txcryptctr\txcryptecb\txcryptofb\004xend\006x"
    6847             :     "getbv\005xlatb\003xor\004xorb\004xorl\005xorpd\005xorps\004xorq\004xorw"
    6848             :     "\010xrelease\006xrstor\010xrstor64\007xrstors\txrstors64\005xsave\007xs"
    6849             :     "ave64\006xsavec\010xsavec64\010xsaveopt\nxsaveopt64\006xsaves\010xsaves"
    6850             :     "64\006xsetbv\005xsha1\007xsha256\006xstore\txstorerng\005xtest";
    6851             : 
    6852             : namespace {
    6853             :   struct MatchEntry {
    6854             :     uint16_t Mnemonic;
    6855             :     uint16_t Opcode;
    6856             :     uint16_t ConvertFn;
    6857             :     uint8_t RequiredFeatures;
    6858             :     uint8_t Classes[9];
    6859             :     StringRef getMnemonic() const {
    6860     3724126 :       return StringRef(MnemonicTable + Mnemonic + 1,
    6861     3724126 :                        MnemonicTable[Mnemonic]);
    6862             :     }
    6863             :   };
    6864             : 
    6865             :   // Predicate for searching for an opcode.
    6866             :   struct LessOpcode {
    6867             :     bool operator()(const MatchEntry &LHS, StringRef RHS) {
    6868     4297166 :       return LHS.getMnemonic() < RHS;
    6869             :     }
    6870             :     bool operator()(StringRef LHS, const MatchEntry &RHS) {
    6871     3151086 :       return LHS < RHS.getMnemonic();
    6872             :     }
    6873             :     bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
    6874             :       return LHS.getMnemonic() < RHS.getMnemonic();
    6875             :     }
    6876             :   };
    6877             : } // end anonymous namespace.
    6878             : 
    6879             : static const MatchEntry MatchTable0[] = {
    6880             :   { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    6881             :   { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
    6882             :   { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    6883             :   { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
    6884             :   { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    6885             :   { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    6886             :   { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    6887             :   { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    6888             :   { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    6889             :   { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    6890             :   { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    6891             :   { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    6892             :   { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6893             :   { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6894             :   { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    6895             :   { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6896             :   { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6897             :   { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    6898             :   { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    6899             :   { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    6900             :   { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6901             :   { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6902             :   { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6903             :   { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    6904             :   { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6905             :   { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6906             :   { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    6907             :   { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    6908             :   { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    6909             :   { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6910             :   { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6911             :   { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6912             :   { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    6913             :   { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6914             :   { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6915             :   { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    6916             :   { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    6917             :   { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    6918             :   { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6919             :   { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6920             :   { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6921             :   { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6922             :   { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6923             :   { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    6924             :   { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    6925             :   { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    6926             :   { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    6927             :   { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    6928             :   { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    6929             :   { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6930             :   { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6931             :   { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    6932             :   { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6933             :   { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6934             :   { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    6935             :   { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    6936             :   { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    6937             :   { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6938             :   { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6939             :   { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6940             :   { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6941             :   { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6942             :   { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6943             :   { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6944             :   { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    6945             :   { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6946             :   { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6947             :   { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    6948             :   { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    6949             :   { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    6950             :   { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6951             :   { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6952             :   { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    6953             :   { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6954             :   { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    6955             :   { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6956             :   { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6957             :   { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6958             :   { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6959             :   { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6960             :   { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6961             :   { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    6962             :   { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6963             :   { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6964             :   { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    6965             :   { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    6966             :   { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    6967             :   { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6968             :   { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6969             :   { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6970             :   { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6971             :   { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6972             :   { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6973             :   { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6974             :   { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6975             :   { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6976             :   { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6977             :   { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6978             :   { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6979             :   { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6980             :   { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6981             :   { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6982             :   { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    6983             :   { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    6984             :   { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    6985             :   { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    6986             :   { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    6987             :   { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    6988             :   { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    6989             :   { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    6990             :   { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6991             :   { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6992             :   { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    6993             :   { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6994             :   { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6995             :   { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    6996             :   { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    6997             :   { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    6998             :   { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6999             :   { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    7000             :   { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    7001             :   { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7002             :   { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7003             :   { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7004             :   { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7005             :   { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    7006             :   { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    7007             :   { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7008             :   { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7009             :   { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7010             :   { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7011             :   { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7012             :   { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7013             :   { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    7014             :   { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7015             :   { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7016             :   { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    7017             :   { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    7018             :   { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    7019             :   { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7020             :   { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7021             :   { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7022             :   { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    7023             :   { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7024             :   { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7025             :   { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    7026             :   { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    7027             :   { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    7028             :   { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7029             :   { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
    7030             :   { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
    7031             :   { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    7032             :   { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    7033             :   { 277 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    7034             :   { 277 /* bextrl */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    7035             :   { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    7036             :   { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    7037             :   { 284 /* bextrq */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
    7038             :   { 284 /* bextrq */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
    7039             :   { 299 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7040             :   { 299 /* blcfilll */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7041             :   { 308 /* blcfillq */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7042             :   { 308 /* blcfillq */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7043             :   { 328 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7044             :   { 328 /* blcicl */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7045             :   { 335 /* blcicq */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7046             :   { 335 /* blcicq */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7047             :   { 342 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7048             :   { 342 /* blcil */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7049             :   { 348 /* blciq */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7050             :   { 348 /* blciq */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7051             :   { 361 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7052             :   { 361 /* blcmskl */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7053             :   { 369 /* blcmskq */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7054             :   { 369 /* blcmskq */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7055             :   { 382 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7056             :   { 382 /* blcsl */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7057             :   { 388 /* blcsq */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7058             :   { 388 /* blcsq */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7059             :   { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7060             :   { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7061             :   { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7062             :   { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7063             :   { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7064             :   { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7065             :   { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    7066             :   { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    7067             :   { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7068             :   { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7069             :   { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    7070             :   { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    7071             :   { 436 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7072             :   { 436 /* blsfilll */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7073             :   { 445 /* blsfillq */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7074             :   { 445 /* blsfillq */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7075             :   { 465 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7076             :   { 465 /* blsicl */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7077             :   { 472 /* blsicq */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7078             :   { 472 /* blsicq */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7079             :   { 479 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7080             :   { 479 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7081             :   { 485 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7082             :   { 485 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7083             :   { 498 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7084             :   { 498 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7085             :   { 506 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7086             :   { 506 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7087             :   { 519 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7088             :   { 519 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7089             :   { 525 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7090             :   { 525 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7091             :   { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
    7092             :   { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
    7093             :   { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
    7094             :   { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
    7095             :   { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
    7096             :   { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
    7097             :   { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
    7098             :   { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
    7099             :   { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
    7100             :   { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
    7101             :   { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
    7102             :   { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
    7103             :   { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_BNDR }, },
    7104             :   { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
    7105             :   { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
    7106             :   { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
    7107             :   { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_1__Reg1_0, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
    7108             :   { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_1__Reg1_0, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
    7109             :   { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
    7110             :   { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
    7111             :   { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_1__Reg1_0, 0, { MCK_BNDR, MCK_Mem }, },
    7112             :   { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
    7113             :   { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
    7114             :   { 586 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7115             :   { 586 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7116             :   { 591 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7117             :   { 591 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7118             :   { 596 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7119             :   { 596 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7120             :   { 605 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7121             :   { 605 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7122             :   { 610 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7123             :   { 610 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7124             :   { 615 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7125             :   { 615 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7126             :   { 626 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    7127             :   { 633 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    7128             :   { 640 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7129             :   { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7130             :   { 647 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7131             :   { 647 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7132             :   { 647 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7133             :   { 647 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7134             :   { 652 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7135             :   { 652 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7136             :   { 652 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7137             :   { 652 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7138             :   { 657 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7139             :   { 657 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7140             :   { 657 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7141             :   { 657 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7142             :   { 662 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7143             :   { 662 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7144             :   { 662 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7145             :   { 662 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7146             :   { 666 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7147             :   { 666 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7148             :   { 666 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7149             :   { 666 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7150             :   { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7151             :   { 674 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7152             :   { 674 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7153             :   { 674 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7154             :   { 674 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7155             :   { 679 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7156             :   { 679 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7157             :   { 679 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7158             :   { 679 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7159             :   { 684 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7160             :   { 684 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7161             :   { 684 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7162             :   { 684 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7163             :   { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7164             :   { 693 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7165             :   { 693 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7166             :   { 693 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7167             :   { 693 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7168             :   { 698 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7169             :   { 698 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7170             :   { 698 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7171             :   { 698 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7172             :   { 703 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7173             :   { 703 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7174             :   { 703 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7175             :   { 703 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7176             :   { 708 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7177             :   { 708 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7178             :   { 708 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7179             :   { 708 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7180             :   { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    7181             :   { 717 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    7182             :   { 723 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    7183             :   { 723 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    7184             :   { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7185             :   { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7186             :   { 734 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
    7187             :   { 734 /* calll */, X86::CALL32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
    7188             :   { 734 /* calll */, X86::CALL32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
    7189             :   { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7190             :   { 740 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
    7191             :   { 740 /* callq */, X86::CALL64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
    7192             :   { 740 /* callq */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    7193             :   { 746 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7194             :   { 746 /* callw */, X86::CALL16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
    7195             :   { 746 /* callw */, X86::CALL16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
    7196             :   { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7197             :   { 752 /* cbtw */, X86::CBW, Convert_NoOperands, 0, {  }, },
    7198             :   { 770 /* clac */, X86::CLAC, Convert_NoOperands, 0, {  }, },
    7199             :   { 775 /* clc */, X86::CLC, Convert_NoOperands, 0, {  }, },
    7200             :   { 779 /* cld */, X86::CLD, Convert_NoOperands, 0, {  }, },
    7201             :   { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7202             :   { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7203             :   { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7204             :   { 811 /* clgi */, X86::CLGI, Convert_NoOperands, 0, {  }, },
    7205             :   { 816 /* cli */, X86::CLI, Convert_NoOperands, 0, {  }, },
    7206             :   { 824 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR8 }, },
    7207             :   { 829 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR32 }, },
    7208             :   { 834 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR64 }, },
    7209             :   { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7210             :   { 848 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR16 }, },
    7211             :   { 853 /* cltd */, X86::CDQ, Convert_NoOperands, 0, {  }, },
    7212             :   { 858 /* cltq */, X86::CDQE, Convert_NoOperands, 0, {  }, },
    7213             :   { 863 /* clts */, X86::CLTS, Convert_NoOperands, 0, {  }, },
    7214             :   { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7215             :   { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, {  }, },
    7216             :   { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
    7217             :   { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
    7218             :   { 880 /* cmc */, X86::CMC, Convert_NoOperands, 0, {  }, },
    7219             :   { 897 /* cmovael */, X86::CMOVAE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7220             :   { 897 /* cmovael */, X86::CMOVAE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7221             :   { 905 /* cmovaeq */, X86::CMOVAE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7222             :   { 905 /* cmovaeq */, X86::CMOVAE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7223             :   { 913 /* cmovaew */, X86::CMOVAE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7224             :   { 913 /* cmovaew */, X86::CMOVAE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7225             :   { 921 /* cmoval */, X86::CMOVA32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7226             :   { 921 /* cmoval */, X86::CMOVA32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7227             :   { 928 /* cmovaq */, X86::CMOVA64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7228             :   { 928 /* cmovaq */, X86::CMOVA64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7229             :   { 935 /* cmovaw */, X86::CMOVA16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7230             :   { 935 /* cmovaw */, X86::CMOVA16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7231             :   { 955 /* cmovbel */, X86::CMOVBE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7232             :   { 955 /* cmovbel */, X86::CMOVBE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7233             :   { 963 /* cmovbeq */, X86::CMOVBE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7234             :   { 963 /* cmovbeq */, X86::CMOVBE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7235             :   { 971 /* cmovbew */, X86::CMOVBE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7236             :   { 971 /* cmovbew */, X86::CMOVBE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7237             :   { 979 /* cmovbl */, X86::CMOVB32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7238             :   { 979 /* cmovbl */, X86::CMOVB32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7239             :   { 986 /* cmovbq */, X86::CMOVB64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7240             :   { 986 /* cmovbq */, X86::CMOVB64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7241             :   { 993 /* cmovbw */, X86::CMOVB16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7242             :   { 993 /* cmovbw */, X86::CMOVB16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7243             :   { 1006 /* cmovel */, X86::CMOVE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7244             :   { 1006 /* cmovel */, X86::CMOVE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7245             :   { 1013 /* cmoveq */, X86::CMOVE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7246             :   { 1013 /* cmoveq */, X86::CMOVE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7247             :   { 1020 /* cmovew */, X86::CMOVE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7248             :   { 1020 /* cmovew */, X86::CMOVE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7249             :   { 1040 /* cmovgel */, X86::CMOVGE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7250             :   { 1040 /* cmovgel */, X86::CMOVGE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7251             :   { 1048 /* cmovgeq */, X86::CMOVGE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7252             :   { 1048 /* cmovgeq */, X86::CMOVGE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7253             :   { 1056 /* cmovgew */, X86::CMOVGE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7254             :   { 1056 /* cmovgew */, X86::CMOVGE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7255             :   { 1064 /* cmovgl */, X86::CMOVG32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7256             :   { 1064 /* cmovgl */, X86::CMOVG32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7257             :   { 1071 /* cmovgq */, X86::CMOVG64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7258             :   { 1071 /* cmovgq */, X86::CMOVG64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7259             :   { 1078 /* cmovgw */, X86::CMOVG16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7260             :   { 1078 /* cmovgw */, X86::CMOVG16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7261             :   { 1098 /* cmovlel */, X86::CMOVLE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7262             :   { 1098 /* cmovlel */, X86::CMOVLE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7263             :   { 1106 /* cmovleq */, X86::CMOVLE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7264             :   { 1106 /* cmovleq */, X86::CMOVLE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7265             :   { 1114 /* cmovlew */, X86::CMOVLE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7266             :   { 1114 /* cmovlew */, X86::CMOVLE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7267             :   { 1122 /* cmovll */, X86::CMOVL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7268             :   { 1122 /* cmovll */, X86::CMOVL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7269             :   { 1129 /* cmovlq */, X86::CMOVL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7270             :   { 1129 /* cmovlq */, X86::CMOVL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7271             :   { 1136 /* cmovlw */, X86::CMOVL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7272             :   { 1136 /* cmovlw */, X86::CMOVL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7273             :   { 1150 /* cmovnel */, X86::CMOVNE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7274             :   { 1150 /* cmovnel */, X86::CMOVNE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7275             :   { 1158 /* cmovneq */, X86::CMOVNE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7276             :   { 1158 /* cmovneq */, X86::CMOVNE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7277             :   { 1166 /* cmovnew */, X86::CMOVNE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7278             :   { 1166 /* cmovnew */, X86::CMOVNE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7279             :   { 1181 /* cmovnol */, X86::CMOVNO32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7280             :   { 1181 /* cmovnol */, X86::CMOVNO32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7281             :   { 1189 /* cmovnoq */, X86::CMOVNO64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7282             :   { 1189 /* cmovnoq */, X86::CMOVNO64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7283             :   { 1197 /* cmovnow */, X86::CMOVNO16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7284             :   { 1197 /* cmovnow */, X86::CMOVNO16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7285             :   { 1212 /* cmovnpl */, X86::CMOVNP32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7286             :   { 1212 /* cmovnpl */, X86::CMOVNP32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7287             :   { 1220 /* cmovnpq */, X86::CMOVNP64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7288             :   { 1220 /* cmovnpq */, X86::CMOVNP64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7289             :   { 1228 /* cmovnpw */, X86::CMOVNP16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7290             :   { 1228 /* cmovnpw */, X86::CMOVNP16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7291             :   { 1243 /* cmovnsl */, X86::CMOVNS32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7292             :   { 1243 /* cmovnsl */, X86::CMOVNS32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7293             :   { 1251 /* cmovnsq */, X86::CMOVNS64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7294             :   { 1251 /* cmovnsq */, X86::CMOVNS64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7295             :   { 1259 /* cmovnsw */, X86::CMOVNS16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7296             :   { 1259 /* cmovnsw */, X86::CMOVNS16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7297             :   { 1273 /* cmovol */, X86::CMOVO32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7298             :   { 1273 /* cmovol */, X86::CMOVO32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7299             :   { 1280 /* cmovoq */, X86::CMOVO64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7300             :   { 1280 /* cmovoq */, X86::CMOVO64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7301             :   { 1287 /* cmovow */, X86::CMOVO16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7302             :   { 1287 /* cmovow */, X86::CMOVO16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7303             :   { 1300 /* cmovpl */, X86::CMOVP32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7304             :   { 1300 /* cmovpl */, X86::CMOVP32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7305             :   { 1307 /* cmovpq */, X86::CMOVP64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7306             :   { 1307 /* cmovpq */, X86::CMOVP64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7307             :   { 1314 /* cmovpw */, X86::CMOVP16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7308             :   { 1314 /* cmovpw */, X86::CMOVP16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7309             :   { 1327 /* cmovsl */, X86::CMOVS32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7310             :   { 1327 /* cmovsl */, X86::CMOVS32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7311             :   { 1334 /* cmovsq */, X86::CMOVS64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7312             :   { 1334 /* cmovsq */, X86::CMOVS64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7313             :   { 1341 /* cmovsw */, X86::CMOVS16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7314             :   { 1341 /* cmovsw */, X86::CMOVS16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7315             :   { 1348 /* cmp */, X86::CMPPDrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
    7316             :   { 1348 /* cmp */, X86::CMPPDrmi, Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32 }, },
    7317             :   { 1348 /* cmp */, X86::CMPPSrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
    7318             :   { 1348 /* cmp */, X86::CMPPSrmi, Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32 }, },
    7319             :   { 1348 /* cmp */, X86::CMPSDrr, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
    7320             :   { 1348 /* cmp */, X86::CMPSDrm, Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32 }, },
    7321             :   { 1348 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
    7322             :   { 1348 /* cmp */, X86::CMPSSrm, Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32 }, },
    7323             :   { 1352 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    7324             :   { 1352 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    7325             :   { 1352 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    7326             :   { 1352 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    7327             :   { 1352 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    7328             :   { 1352 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    7329             :   { 1357 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7330             :   { 1357 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7331             :   { 1357 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    7332             :   { 1357 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7333             :   { 1357 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7334             :   { 1357 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    7335             :   { 1357 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    7336             :   { 1357 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    7337             :   { 1357 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7338             :   { 1362 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7339             :   { 1362 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7340             :   { 1368 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7341             :   { 1368 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7342             :   { 1374 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7343             :   { 1374 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7344             :   { 1374 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    7345             :   { 1374 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7346             :   { 1374 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7347             :   { 1374 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    7348             :   { 1374 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    7349             :   { 1374 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    7350             :   { 1374 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7351             :   { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
    7352             :   { 1390 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7353             :   { 1390 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
    7354             :   { 1396 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
    7355             :   { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
    7356             :   { 1408 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7357             :   { 1408 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    7358             :   { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
    7359             :   { 1420 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7360             :   { 1420 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7361             :   { 1420 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    7362             :   { 1420 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7363             :   { 1420 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7364             :   { 1420 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    7365             :   { 1420 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    7366             :   { 1420 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    7367             :   { 1420 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7368             :   { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
    7369             :   { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7370             :   { 1454 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    7371             :   { 1454 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    7372             :   { 1463 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7373             :   { 1463 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7374             :   { 1472 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7375             :   { 1472 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7376             :   { 1481 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7377             :   { 1481 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7378             :   { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7379             :   { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7380             :   { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7381             :   { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7382             :   { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, {  }, },
    7383             :   { 1514 /* cqto */, X86::CQO, Convert_NoOperands, 0, {  }, },
    7384             :   { 1525 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    7385             :   { 1525 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    7386             :   { 1525 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
    7387             :   { 1525 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
    7388             :   { 1532 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7389             :   { 1532 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7390             :   { 1539 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7391             :   { 1539 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7392             :   { 1546 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    7393             :   { 1546 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    7394             :   { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, {  }, },
    7395             :   { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7396             :   { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7397             :   { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7398             :   { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7399             :   { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7400             :   { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7401             :   { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7402             :   { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
    7403             :   { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7404             :   { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7405             :   { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
    7406             :   { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7407             :   { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
    7408             :   { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7409             :   { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7410             :   { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7411             :   { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7412             :   { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7413             :   { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7414             :   { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    7415             :   { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7416             :   { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7417             :   { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7418             :   { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7419             :   { 1655 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7420             :   { 1655 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7421             :   { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7422             :   { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7423             :   { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7424             :   { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7425             :   { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7426             :   { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
    7427             :   { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7428             :   { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    7429             :   { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7430             :   { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7431             :   { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
    7432             :   { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7433             :   { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    7434             :   { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7435             :   { 1742 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7436             :   { 1742 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7437             :   { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7438             :   { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7439             :   { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7440             :   { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7441             :   { 1760 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7442             :   { 1760 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7443             :   { 1770 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7444             :   { 1770 /* cvtss2siq */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7445             :   { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7446             :   { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7447             :   { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7448             :   { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
    7449             :   { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7450             :   { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7451             :   { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7452             :   { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    7453             :   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7454             :   { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7455             :   { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7456             :   { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7457             :   { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7458             :   { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7459             :   { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7460             :   { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7461             :   { 1852 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7462             :   { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7463             :   { 1852 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7464             :   { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7465             :   { 1862 /* cvttss2sil */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7466             :   { 1862 /* cvttss2sil */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7467             :   { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7468             :   { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7469             :   { 1893 /* cwtd */, X86::CWD, Convert_NoOperands, 0, {  }, },
    7470             :   { 1898 /* cwtl */, X86::CWDE, Convert_NoOperands, 0, {  }, },
    7471             :   { 1903 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7472             :   { 1907 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7473             :   { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, {  }, },
    7474             :   { 1922 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    7475             :   { 1922 /* decb */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7476             :   { 1927 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
    7477             :   { 1927 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    7478             :   { 1927 /* decl */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7479             :   { 1932 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    7480             :   { 1932 /* decq */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    7481             :   { 1937 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
    7482             :   { 1937 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    7483             :   { 1937 /* decw */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7484             :   { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    7485             :   { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7486             :   { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
    7487             :   { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
    7488             :   { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7489             :   { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7490             :   { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
    7491             :   { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
    7492             :   { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7493             :   { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7494             :   { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7495             :   { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7496             :   { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7497             :   { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    7498             :   { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
    7499             :   { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
    7500             :   { 1973 /* divsd */, X86::DIVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7501             :   { 1973 /* divsd */, X86::DIVSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7502             :   { 1979 /* divss */, X86::DIVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7503             :   { 1979 /* divss */, X86::DIVSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7504             :   { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7505             :   { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7506             :   { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
    7507             :   { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
    7508             :   { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7509             :   { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7510             :   { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7511             :   { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7512             :   { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, {  }, },
    7513             :   { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, {  }, },
    7514             :   { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, 0, {  }, },
    7515             :   { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, {  }, },
    7516             :   { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, 0, {  }, },
    7517             :   { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, 0, {  }, },
    7518             :   { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, 0, {  }, },
    7519             :   { 2042 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
    7520             :   { 2048 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, {  }, },
    7521             :   { 2051 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
    7522             :   { 2051 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
    7523             :   { 2061 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7524             :   { 2061 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
    7525             :   { 2067 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, {  }, },
    7526             :   { 2073 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, {  }, },
    7527             :   { 2078 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
    7528             :   { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7529             :   { 2078 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7530             :   { 2078 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7531             :   { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7532             :   { 2083 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7533             :   { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
    7534             :   { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7535             :   { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7536             :   { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7537             :   { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7538             :   { 2095 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7539             :   { 2101 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7540             :   { 2106 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7541             :   { 2112 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, {  }, },
    7542             :   { 2117 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7543             :   { 2124 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7544             :   { 2132 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7545             :   { 2139 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7546             :   { 2147 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7547             :   { 2156 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7548             :   { 2164 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7549             :   { 2172 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7550             :   { 2179 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, {  }, },
    7551             :   { 2179 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7552             :   { 2184 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, {  }, },
    7553             :   { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
    7554             :   { 2184 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7555             :   { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7556             :   { 2190 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7557             :   { 2196 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, {  }, },
    7558             :   { 2196 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7559             :   { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, {  }, },
    7560             :   { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
    7561             :   { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7562             :   { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7563             :   { 2209 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7564             :   { 2216 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, {  }, },
    7565             :   { 2223 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7566             :   { 2230 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7567             :   { 2236 /* fcos */, X86::COS_F, Convert_NoOperands, 0, {  }, },
    7568             :   { 2241 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, {  }, },
    7569             :   { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7570             :   { 2249 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7571             :   { 2249 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7572             :   { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7573             :   { 2254 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7574             :   { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, 0, {  }, },
    7575             :   { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7576             :   { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7577             :   { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7578             :   { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7579             :   { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7580             :   { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7581             :   { 2266 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7582             :   { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7583             :   { 2272 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7584             :   { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, 0, {  }, },
    7585             :   { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7586             :   { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7587             :   { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7588             :   { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7589             :   { 2286 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7590             :   { 2293 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7591             :   { 2299 /* femms */, X86::FEMMS, Convert_NoOperands, 0, {  }, },
    7592             :   { 2305 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
    7593             :   { 2311 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
    7594             :   { 2324 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7595             :   { 2331 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7596             :   { 2344 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7597             :   { 2358 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7598             :   { 2366 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7599             :   { 2374 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7600             :   { 2387 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7601             :   { 2401 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7602             :   { 2409 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7603             :   { 2417 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7604             :   { 2429 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7605             :   { 2435 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7606             :   { 2442 /* filds */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7607             :   { 2454 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7608             :   { 2461 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7609             :   { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, {  }, },
    7610             :   { 2481 /* fistl */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7611             :   { 2493 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7612             :   { 2500 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7613             :   { 2508 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7614             :   { 2515 /* fists */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7615             :   { 2528 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7616             :   { 2536 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7617             :   { 2545 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7618             :   { 2559 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7619             :   { 2573 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7620             :   { 2581 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7621             :   { 2589 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7622             :   { 2596 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
    7623             :   { 2600 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, {  }, },
    7624             :   { 2605 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7625             :   { 2611 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7626             :   { 2618 /* fldl */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7627             :   { 2623 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, {  }, },
    7628             :   { 2630 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, {  }, },
    7629             :   { 2637 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, {  }, },
    7630             :   { 2644 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, {  }, },
    7631             :   { 2651 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, {  }, },
    7632             :   { 2657 /* flds */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7633             :   { 2662 /* fldt */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7634             :   { 2667 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, {  }, },
    7635             :   { 2672 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
    7636             :   { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7637             :   { 2672 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7638             :   { 2672 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7639             :   { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7640             :   { 2677 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7641             :   { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
    7642             :   { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7643             :   { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7644             :   { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7645             :   { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7646             :   { 2689 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7647             :   { 2695 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, {  }, },
    7648             :   { 2702 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, {  }, },
    7649             :   { 2709 /* fnop */, X86::FNOP, Convert_NoOperands, 0, {  }, },
    7650             :   { 2714 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7651             :   { 2721 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7652             :   { 2728 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7653             :   { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, {  }, },
    7654             :   { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
    7655             :   { 2736 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7656             :   { 2743 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, {  }, },
    7657             :   { 2750 /* fprem */, X86::FPREM, Convert_NoOperands, 0, {  }, },
    7658             :   { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, {  }, },
    7659             :   { 2763 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, {  }, },
    7660             :   { 2769 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, {  }, },
    7661             :   { 2777 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7662             :   { 2784 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, {  }, },
    7663             :   { 2787 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, {  }, },
    7664             :   { 2794 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, {  }, },
    7665             :   { 2799 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, {  }, },
    7666             :   { 2807 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, {  }, },
    7667             :   { 2813 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
    7668             :   { 2817 /* fstl */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7669             :   { 2822 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
    7670             :   { 2827 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7671             :   { 2833 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7672             :   { 2839 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7673             :   { 2845 /* fsts */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7674             :   { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7675             :   { 2850 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7676             :   { 2850 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7677             :   { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7678             :   { 2855 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7679             :   { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, 0, {  }, },
    7680             :   { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7681             :   { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7682             :   { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7683             :   { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7684             :   { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7685             :   { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7686             :   { 2867 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7687             :   { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7688             :   { 2873 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7689             :   { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, 0, {  }, },
    7690             :   { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7691             :   { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7692             :   { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7693             :   { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7694             :   { 2887 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7695             :   { 2894 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7696             :   { 2900 /* ftst */, X86::TST_F, Convert_NoOperands, 0, {  }, },
    7697             :   { 2905 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, {  }, },
    7698             :   { 2905 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
    7699             :   { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, {  }, },
    7700             :   { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
    7701             :   { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7702             :   { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7703             :   { 2918 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, {  }, },
    7704             :   { 2918 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
    7705             :   { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, {  }, },
    7706             :   { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
    7707             :   { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7708             :   { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7709             :   { 2933 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, {  }, },
    7710             :   { 2941 /* fxam */, X86::FXAM, Convert_NoOperands, 0, {  }, },
    7711             :   { 2946 /* fxch */, X86::XCH_F, Convert__regST1, 0, {  }, },
    7712             :   { 2946 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
    7713             :   { 2951 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
    7714             :   { 2959 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    7715             :   { 2969 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
    7716             :   { 2976 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    7717             :   { 2985 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, {  }, },
    7718             :   { 2993 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, {  }, },
    7719             :   { 2999 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, {  }, },
    7720             :   { 3007 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, {  }, },
    7721             :   { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7722             :   { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7723             :   { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7724             :   { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7725             :   { 3045 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7726             :   { 3045 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7727             :   { 3055 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, {  }, },
    7728             :   { 3058 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7729             :   { 3058 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7730             :   { 3065 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7731             :   { 3065 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7732             :   { 3072 /* hlt */, X86::HLT, Convert_NoOperands, 0, {  }, },
    7733             :   { 3076 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7734             :   { 3076 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7735             :   { 3083 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7736             :   { 3083 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7737             :   { 3095 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    7738             :   { 3095 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7739             :   { 3095 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
    7740             :   { 3095 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
    7741             :   { 3101 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7742             :   { 3101 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7743             :   { 3101 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
    7744             :   { 3101 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
    7745             :   { 3107 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7746             :   { 3107 /* idivq */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    7747             :   { 3107 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
    7748             :   { 3107 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
    7749             :   { 3113 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7750             :   { 3113 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7751             :   { 3113 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
    7752             :   { 3113 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
    7753             :   { 3124 /* imulb */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    7754             :   { 3124 /* imulb */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7755             :   { 3130 /* imull */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7756             :   { 3130 /* imull */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7757             :   { 3130 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7758             :   { 3130 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7759             :   { 3130 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    7760             :   { 3130 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7761             :   { 3130 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
    7762             :   { 3130 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
    7763             :   { 3130 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    7764             :   { 3130 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    7765             :   { 3136 /* imulq */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7766             :   { 3136 /* imulq */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    7767             :   { 3136 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7768             :   { 3136 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7769             :   { 3136 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    7770             :   { 3136 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7771             :   { 3136 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
    7772             :   { 3136 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
    7773             :   { 3136 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
    7774             :   { 3136 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
    7775             :   { 3142 /* imulw */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7776             :   { 3142 /* imulw */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7777             :   { 3142 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7778             :   { 3142 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7779             :   { 3142 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    7780             :   { 3142 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7781             :   { 3142 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
    7782             :   { 3142 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
    7783             :   { 3142 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
    7784             :   { 3142 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
    7785             :   { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
    7786             :   { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7787             :   { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
    7788             :   { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
    7789             :   { 3159 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    7790             :   { 3159 /* incb */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7791             :   { 3164 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
    7792             :   { 3164 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    7793             :   { 3164 /* incl */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7794             :   { 3169 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    7795             :   { 3169 /* incq */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    7796             :   { 3174 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7797             :   { 3182 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7798             :   { 3190 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
    7799             :   { 3190 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    7800             :   { 3190 /* incw */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7801             :   { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
    7802             :   { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7803             :   { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
    7804             :   { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
    7805             :   { 3203 /* insb */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
    7806             :   { 3213 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7807             :   { 3213 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    7808             :   { 3222 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7809             :   { 3222 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7810             :   { 3230 /* insl */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
    7811             :   { 3235 /* insw */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
    7812             :   { 3240 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7813             :   { 3244 /* int3 */, X86::INT3, Convert_NoOperands, 0, {  }, },
    7814             :   { 3249 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7815             :   { 3254 /* invd */, X86::INVD, Convert_NoOperands, 0, {  }, },
    7816             :   { 3259 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
    7817             :   { 3259 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
    7818             :   { 3266 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7819             :   { 3273 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
    7820             :   { 3273 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
    7821             :   { 3281 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
    7822             :   { 3281 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
    7823             :   { 3289 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
    7824             :   { 3289 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
    7825             :   { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
    7826             :   { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7827             :   { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
    7828             :   { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
    7829             :   { 3312 /* iretl */, X86::IRET32, Convert_NoOperands, 0, {  }, },
    7830             :   { 3318 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    7831             :   { 3324 /* iretw */, X86::IRET16, Convert_NoOperands, 0, {  }, },
    7832             :   { 3330 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7833             :   { 3333 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7834             :   { 3337 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7835             :   { 3340 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7836             :   { 3344 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
    7837             :   { 3349 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7838             :   { 3352 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7839             :   { 3358 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7840             :   { 3361 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7841             :   { 3365 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7842             :   { 3368 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7843             :   { 3372 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7844             :   { 3372 /* jmp */, X86::JMP16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
    7845             :   { 3372 /* jmp */, X86::JMP32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
    7846             :   { 3372 /* jmp */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    7847             :   { 3372 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7848             :   { 3372 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7849             :   { 3376 /* jmpl */, X86::JMP32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
    7850             :   { 3376 /* jmpl */, X86::JMP32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
    7851             :   { 3376 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7852             :   { 3381 /* jmpq */, X86::JMP64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
    7853             :   { 3381 /* jmpq */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    7854             :   { 3386 /* jmpw */, X86::JMP16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
    7855             :   { 3386 /* jmpw */, X86::JMP16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
    7856             :   { 3386 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7857             :   { 3391 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7858             :   { 3395 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7859             :   { 3399 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7860             :   { 3403 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7861             :   { 3407 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7862             :   { 3410 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7863             :   { 3413 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
    7864             :   { 3419 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7865             :   { 3422 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7866             :   { 3428 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7867             :   { 3434 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7868             :   { 3440 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7869             :   { 3446 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7870             :   { 3452 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7871             :   { 3458 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7872             :   { 3465 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7873             :   { 3472 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7874             :   { 3479 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7875             :   { 3486 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7876             :   { 3492 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7877             :   { 3498 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7878             :   { 3498 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
    7879             :   { 3498 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, 0, { MCK_VK1, MCK_Mem8 }, },
    7880             :   { 3498 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
    7881             :   { 3498 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VK1 }, },
    7882             :   { 3504 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7883             :   { 3504 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
    7884             :   { 3504 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, 0, { MCK_VK1, MCK_Mem32 }, },
    7885             :   { 3504 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
    7886             :   { 3504 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VK1 }, },
    7887             :   { 3510 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7888             :   { 3510 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR64 }, },
    7889             :   { 3510 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, 0, { MCK_VK1, MCK_Mem64 }, },
    7890             :   { 3510 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VK1 }, },
    7891             :   { 3510 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VK1 }, },
    7892             :   { 3516 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7893             :   { 3516 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
    7894             :   { 3516 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, 0, { MCK_VK1, MCK_Mem16 }, },
    7895             :   { 3516 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
    7896             :   { 3516 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VK1 }, },
    7897             :   { 3522 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7898             :   { 3528 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7899             :   { 3534 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7900             :   { 3540 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7901             :   { 3546 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7902             :   { 3551 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7903             :   { 3556 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7904             :   { 3561 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7905             :   { 3570 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7906             :   { 3579 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7907             :   { 3588 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7908             :   { 3597 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7909             :   { 3602 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7910             :   { 3611 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7911             :   { 3620 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7912             :   { 3629 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7913             :   { 3638 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7914             :   { 3647 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7915             :   { 3656 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7916             :   { 3665 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7917             :   { 3674 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7918             :   { 3681 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7919             :   { 3688 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7920             :   { 3695 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
    7921             :   { 3702 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7922             :   { 3711 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7923             :   { 3720 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7924             :   { 3729 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7925             :   { 3736 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7926             :   { 3743 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7927             :   { 3750 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7928             :   { 3757 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7929             :   { 3763 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7930             :   { 3769 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7931             :   { 3775 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7932             :   { 3781 /* lahf */, X86::LAHF, Convert_NoOperands, 0, {  }, },
    7933             :   { 3790 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7934             :   { 3790 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    7935             :   { 3795 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
    7936             :   { 3795 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    7937             :   { 3800 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7938             :   { 3800 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7939             :   { 3805 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
    7940             :   { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
    7941             :   { 3805 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7942             :   { 3805 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7943             :   { 3811 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7944             :   { 3811 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7945             :   { 3818 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7946             :   { 3825 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7947             :   { 3825 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7948             :   { 3832 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7949             :   { 3838 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7950             :   { 3850 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
    7951             :   { 3855 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
    7952             :   { 3864 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
    7953             :   { 3864 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_GR32 }, },
    7954             :   { 3869 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7955             :   { 3874 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7956             :   { 3874 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    7957             :   { 3880 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7958             :   { 3889 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
    7959             :   { 3894 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
    7960             :   { 3899 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, {  }, },
    7961             :   { 3910 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
    7962             :   { 3915 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7963             :   { 3920 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7964             :   { 3936 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7965             :   { 3942 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    7966             :   { 3948 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7967             :   { 3958 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
    7968             :   { 3963 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7969             :   { 3968 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7970             :   { 3984 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7971             :   { 3990 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    7972             :   { 3996 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7973             :   { 4002 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
    7974             :   { 4002 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
    7975             :   { 4002 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7976             :   { 4002 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7977             :   { 4007 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7978             :   { 4007 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7979             :   { 4013 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem }, },
    7980             :   { 4019 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7981             :   { 4019 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7982             :   { 4030 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7983             :   { 4030 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7984             :   { 4036 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7985             :   { 4036 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7986             :   { 4048 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7987             :   { 4048 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7988             :   { 4054 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, {  }, },
    7989             :   { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
    7990             :   { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
    7991             :   { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
    7992             :   { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
    7993             :   { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
    7994             :   { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
    7995             :   { 4076 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
    7996             :   { 4076 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
    7997             :   { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
    7998             :   { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
    7999             :   { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
    8000             :   { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
    8001             :   { 4094 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    8002             :   { 4099 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    8003             :   { 4105 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    8004             :   { 4112 /* lretl */, X86::LRETL, Convert_NoOperands, 0, {  }, },
    8005             :   { 4112 /* lretl */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
    8006             :   { 4118 /* lretq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8007             :   { 4118 /* lretq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
    8008             :   { 4124 /* lretw */, X86::LRETW, Convert_NoOperands, 0, {  }, },
    8009             :   { 4124 /* lretw */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
    8010             :   { 4134 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8011             :   { 4134 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    8012             :   { 4139 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
    8013             :   { 4139 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    8014             :   { 4144 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8015             :   { 4144 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8016             :   { 4153 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
    8017             :   { 4158 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    8018             :   { 4163 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    8019             :   { 4172 /* ltrw */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8020             :   { 4172 /* ltrw */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8021             :   { 4177 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    8022             :   { 4177 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
    8023             :   { 4177 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    8024             :   { 4177 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
    8025             :   { 4184 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    8026             :   { 4184 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
    8027             :   { 4184 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    8028             :   { 4184 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
    8029             :   { 4197 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8030             :   { 4197 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8031             :   { 4204 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8032             :   { 4204 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8033             :   { 4211 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8034             :   { 4211 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8035             :   { 4218 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
    8036             :   { 4218 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
    8037             :   { 4229 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
    8038             :   { 4229 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
    8039             :   { 4238 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8040             :   { 4238 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8041             :   { 4244 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8042             :   { 4244 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8043             :   { 4250 /* maxsd */, X86::MAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8044             :   { 4250 /* maxsd */, X86::MAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8045             :   { 4256 /* maxss */, X86::MAXSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8046             :   { 4256 /* maxss */, X86::MAXSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8047             :   { 4262 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, {  }, },
    8048             :   { 4269 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8049             :   { 4269 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8050             :   { 4275 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8051             :   { 4275 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8052             :   { 4281 /* minsd */, X86::MINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8053             :   { 4281 /* minsd */, X86::MINSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8054             :   { 4287 /* minss */, X86::MINSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8055             :   { 4287 /* minss */, X86::MINSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8056             :   { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, {  }, },
    8057             :   { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
    8058             :   { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
    8059             :   { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, {  }, },
    8060             :   { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
    8061             :   { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
    8062             :   { 4310 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, {  }, },
    8063             :   { 4329 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
    8064             :   { 4329 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
    8065             :   { 4337 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
    8066             :   { 4337 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
    8067             :   { 4345 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
    8068             :   { 4345 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
    8069             :   { 4345 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
    8070             :   { 4353 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
    8071             :   { 4353 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
    8072             :   { 4361 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8073             :   { 4361 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8074             :   { 4361 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8075             :   { 4368 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8076             :   { 4368 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8077             :   { 4368 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8078             :   { 4375 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
    8079             :   { 4375 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
    8080             :   { 4375 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    8081             :   { 4375 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    8082             :   { 4375 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    8083             :   { 4375 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    8084             :   { 4375 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
    8085             :   { 4375 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
    8086             :   { 4375 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    8087             :   { 4386 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8088             :   { 4386 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8089             :   { 4393 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8090             :   { 4393 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8091             :   { 4400 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8092             :   { 4400 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8093             :   { 4407 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR32 }, },
    8094             :   { 4407 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
    8095             :   { 4407 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR64, MCK_Mem32 }, },
    8096             :   { 4407 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    8097             :   { 4407 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    8098             :   { 4407 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
    8099             :   { 4407 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR64 }, },
    8100             :   { 4407 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
    8101             :   { 4407 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
    8102             :   { 4407 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    8103             :   { 4407 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
    8104             :   { 4407 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8105             :   { 4412 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8106             :   { 4412 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8107             :   { 4420 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_1__Mem5125_0, Feature_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
    8108             :   { 4420 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_GR32 }, },
    8109             :   { 4420 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_1__Mem5125_0, Feature_In64BitMode, { MCK_Mem512, MCK_GR64 }, },
    8110             :   { 4430 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8111             :   { 4430 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
    8112             :   { 4438 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    8113             :   { 4446 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8114             :   { 4446 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8115             :   { 4446 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8116             :   { 4453 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8117             :   { 4453 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8118             :   { 4453 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8119             :   { 4460 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8120             :   { 4468 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8121             :   { 4468 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8122             :   { 4475 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8123             :   { 4475 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8124             :   { 4482 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
    8125             :   { 4482 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
    8126             :   { 4482 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
    8127             :   { 4482 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
    8128             :   { 4482 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
    8129             :   { 4482 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
    8130             :   { 4482 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
    8131             :   { 4482 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
    8132             :   { 4482 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8133             :   { 4482 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8134             :   { 4482 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    8135             :   { 4482 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    8136             :   { 4482 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
    8137             :   { 4482 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
    8138             :   { 4482 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8139             :   { 4487 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8140             :   { 4495 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8141             :   { 4495 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8142             :   { 4502 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8143             :   { 4502 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8144             :   { 4509 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
    8145             :   { 4518 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
    8146             :   { 4527 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8147             :   { 4535 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8148             :   { 4551 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8149             :   { 4559 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8150             :   { 4567 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8151             :   { 4575 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8152             :   { 4583 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
    8153             :   { 4590 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8154             :   { 4598 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
    8155             :   { 4606 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
    8156             :   { 4606 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
    8157             :   { 4606 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8158             :   { 4606 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
    8159             :   { 4606 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
    8160             :   { 4606 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
    8161             :   { 4606 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
    8162             :   { 4606 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8163             :   { 4606 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    8164             :   { 4606 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8165             :   { 4606 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
    8166             :   { 4606 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
    8167             :   { 4606 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
    8168             :   { 4606 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
    8169             :   { 4606 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    8170             :   { 4606 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8171             :   { 4606 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8172             :   { 4606 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    8173             :   { 4606 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    8174             :   { 4606 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
    8175             :   { 4606 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
    8176             :   { 4606 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8177             :   { 4606 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8178             :   { 4606 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8179             :   { 4611 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
    8180             :   { 4624 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
    8181             :   { 4630 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    8182             :   { 4630 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
    8183             :   { 4637 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    8184             :   { 4637 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
    8185             :   { 4644 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    8186             :   { 4644 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    8187             :   { 4651 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8188             :   { 4651 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    8189             :   { 4651 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8190             :   { 4657 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8191             :   { 4657 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8192             :   { 4666 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
    8193             :   { 4672 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8194             :   { 4672 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8195             :   { 4681 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR32, MCK_GR64 }, },
    8196             :   { 4681 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, Feature_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
    8197             :   { 4688 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
    8198             :   { 4694 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8199             :   { 4694 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
    8200             :   { 4694 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8201             :   { 4700 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
    8202             :   { 4706 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    8203             :   { 4706 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    8204             :   { 4713 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    8205             :   { 4713 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    8206             :   { 4720 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    8207             :   { 4720 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    8208             :   { 4720 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
    8209             :   { 4720 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    8210             :   { 4720 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    8211             :   { 4720 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    8212             :   { 4720 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    8213             :   { 4733 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8214             :   { 4733 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8215             :   { 4733 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8216             :   { 4740 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8217             :   { 4740 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    8218             :   { 4740 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8219             :   { 4747 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
    8220             :   { 4747 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
    8221             :   { 4747 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
    8222             :   { 4747 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
    8223             :   { 4747 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
    8224             :   { 4747 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8225             :   { 4747 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8226             :   { 4747 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    8227             :   { 4747 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    8228             :   { 4747 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
    8229             :   { 4747 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
    8230             :   { 4747 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
    8231             :   { 4747 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8232             :   { 4752 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    8233             :   { 4752 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
    8234             :   { 4759 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    8235             :   { 4759 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
    8236             :   { 4766 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    8237             :   { 4766 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    8238             :   { 4773 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    8239             :   { 4773 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    8240             :   { 4780 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    8241             :   { 4780 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    8242             :   { 4787 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    8243             :   { 4787 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    8244             :   { 4787 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    8245             :   { 4787 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    8246             :   { 4787 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    8247             :   { 4787 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    8248             :   { 4793 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8249             :   { 4793 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8250             :   { 4805 /* mulb */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8251             :   { 4805 /* mulb */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8252             :   { 4810 /* mull */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8253             :   { 4810 /* mull */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8254             :   { 4815 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8255             :   { 4815 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8256             :   { 4821 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8257             :   { 4821 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8258             :   { 4827 /* mulq */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8259             :   { 4827 /* mulq */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8260             :   { 4832 /* mulsd */, X86::MULSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8261             :   { 4832 /* mulsd */, X86::MULSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8262             :   { 4838 /* mulss */, X86::MULSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8263             :   { 4838 /* mulss */, X86::MULSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8264             :   { 4844 /* mulw */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8265             :   { 4844 /* mulw */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8266             :   { 4854 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8267             :   { 4854 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    8268             :   { 4860 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8269             :   { 4860 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    8270             :   { 4866 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, {  }, },
    8271             :   { 4866 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
    8272             :   { 4866 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX }, },
    8273             :   { 4872 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, {  }, },
    8274             :   { 4872 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
    8275             :   { 4872 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
    8276             :   { 4883 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    8277             :   { 4883 /* negb */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8278             :   { 4888 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    8279             :   { 4888 /* negl */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8280             :   { 4893 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    8281             :   { 4893 /* negq */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8282             :   { 4898 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    8283             :   { 4898 /* negw */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8284             :   { 4903 /* nop */, X86::NOOP, Convert_NoOperands, 0, {  }, },
    8285             :   { 4907 /* nopl */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8286             :   { 4907 /* nopl */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8287             :   { 4912 /* nopq */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8288             :   { 4912 /* nopq */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8289             :   { 4917 /* nopw */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8290             :   { 4917 /* nopw */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8291             :   { 4926 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    8292             :   { 4926 /* notb */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8293             :   { 4931 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    8294             :   { 4931 /* notl */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8295             :   { 4936 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    8296             :   { 4936 /* notq */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8297             :   { 4941 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    8298             :   { 4941 /* notw */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8299             :   { 4949 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    8300             :   { 4949 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    8301             :   { 4949 /* orb */, X86::OR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    8302             :   { 4949 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    8303             :   { 4949 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    8304             :   { 4949 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    8305             :   { 4953 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8306             :   { 4953 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8307             :   { 4953 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    8308             :   { 4953 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    8309             :   { 4953 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    8310             :   { 4953 /* orl */, X86::OR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    8311             :   { 4953 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    8312             :   { 4953 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    8313             :   { 4953 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8314             :   { 4957 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8315             :   { 4957 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8316             :   { 4962 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8317             :   { 4962 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8318             :   { 4967 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8319             :   { 4967 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8320             :   { 4967 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    8321             :   { 4967 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    8322             :   { 4967 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    8323             :   { 4967 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    8324             :   { 4967 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    8325             :   { 4967 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    8326             :   { 4967 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8327             :   { 4971 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8328             :   { 4971 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8329             :   { 4971 /* orw */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    8330             :   { 4971 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    8331             :   { 4971 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    8332             :   { 4971 /* orw */, X86::OR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    8333             :   { 4971 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    8334             :   { 4971 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    8335             :   { 4971 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8336             :   { 4979 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
    8337             :   { 4979 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    8338             :   { 4979 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
    8339             :   { 4979 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
    8340             :   { 4984 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
    8341             :   { 4984 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    8342             :   { 4984 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
    8343             :   { 4984 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
    8344             :   { 4994 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
    8345             :   { 5006 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
    8346             :   { 5012 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
    8347             :   { 5018 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
    8348             :   { 5018 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    8349             :   { 5018 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
    8350             :   { 5018 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
    8351             :   { 5023 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8352             :   { 5023 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8353             :   { 5023 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8354             :   { 5023 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8355             :   { 5029 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8356             :   { 5029 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8357             :   { 5029 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8358             :   { 5029 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8359             :   { 5035 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8360             :   { 5035 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8361             :   { 5035 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8362             :   { 5035 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8363             :   { 5041 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8364             :   { 5041 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8365             :   { 5041 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8366             :   { 5041 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8367             :   { 5050 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8368             :   { 5050 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8369             :   { 5050 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8370             :   { 5050 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8371             :   { 5059 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8372             :   { 5059 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8373             :   { 5068 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8374             :   { 5068 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8375             :   { 5068 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8376             :   { 5068 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8377             :   { 5077 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8378             :   { 5077 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8379             :   { 5077 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8380             :   { 5077 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8381             :   { 5083 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8382             :   { 5083 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8383             :   { 5083 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8384             :   { 5083 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8385             :   { 5089 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8386             :   { 5089 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8387             :   { 5089 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8388             :   { 5089 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8389             :   { 5095 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8390             :   { 5095 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8391             :   { 5095 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8392             :   { 5095 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8393             :   { 5102 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8394             :   { 5102 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8395             :   { 5102 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8396             :   { 5102 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8397             :   { 5109 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8398             :   { 5109 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8399             :   { 5109 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8400             :   { 5109 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8401             :   { 5117 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8402             :   { 5117 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8403             :   { 5117 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8404             :   { 5117 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8405             :   { 5125 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8406             :   { 5125 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8407             :   { 5125 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8408             :   { 5125 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8409             :   { 5131 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
    8410             :   { 5131 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8411             :   { 5131 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8412             :   { 5131 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
    8413             :   { 5139 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8414             :   { 5139 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8415             :   { 5139 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8416             :   { 5139 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8417             :   { 5144 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8418             :   { 5144 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8419             :   { 5144 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8420             :   { 5144 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8421             :   { 5150 /* pause */, X86::PAUSE, Convert_NoOperands, 0, {  }, },
    8422             :   { 5156 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8423             :   { 5156 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8424             :   { 5156 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8425             :   { 5156 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8426             :   { 5162 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8427             :   { 5162 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8428             :   { 5170 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8429             :   { 5170 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8430             :   { 5170 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8431             :   { 5170 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8432             :   { 5176 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8433             :   { 5176 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8434             :   { 5176 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    8435             :   { 5176 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    8436             :   { 5185 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8437             :   { 5185 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8438             :   { 5193 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
    8439             :   { 5193 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32 }, },
    8440             :   { 5206 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
    8441             :   { 5206 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32 }, },
    8442             :   { 5219 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
    8443             :   { 5219 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32 }, },
    8444             :   { 5232 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
    8445             :   { 5232 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8446             :   { 5245 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8447             :   { 5245 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8448             :   { 5255 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8449             :   { 5255 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8450             :   { 5255 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8451             :   { 5255 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8452             :   { 5263 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8453             :   { 5263 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8454             :   { 5263 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8455             :   { 5263 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8456             :   { 5271 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8457             :   { 5271 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8458             :   { 5279 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8459             :   { 5279 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8460             :   { 5279 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8461             :   { 5279 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8462             :   { 5287 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8463             :   { 5287 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8464             :   { 5297 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8465             :   { 5297 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8466             :   { 5307 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8467             :   { 5307 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8468             :   { 5307 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8469             :   { 5307 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8470             :   { 5315 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8471             :   { 5315 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8472             :   { 5315 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8473             :   { 5315 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8474             :   { 5323 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8475             :   { 5323 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8476             :   { 5331 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8477             :   { 5331 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8478             :   { 5331 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8479             :   { 5331 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8480             :   { 5339 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8481             :   { 5339 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8482             :   { 5349 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8483             :   { 5349 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8484             :   { 5359 /* pconfig */, X86::PCONFIG, Convert_NoOperands, 0, {  }, },
    8485             :   { 5372 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8486             :   { 5372 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    8487             :   { 5378 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8488             :   { 5378 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    8489             :   { 5389 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8490             :   { 5389 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    8491             :   { 5395 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8492             :   { 5395 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    8493             :   { 5401 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
    8494             :   { 5401 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
    8495             :   { 5408 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
    8496             :   { 5408 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
    8497             :   { 5415 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
    8498             :   { 5415 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
    8499             :   { 5422 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
    8500             :   { 5422 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
    8501             :   { 5422 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
    8502             :   { 5429 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8503             :   { 5429 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8504             :   { 5435 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8505             :   { 5435 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8506             :   { 5441 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8507             :   { 5441 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8508             :   { 5447 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8509             :   { 5447 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8510             :   { 5453 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8511             :   { 5453 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8512             :   { 5461 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8513             :   { 5461 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8514             :   { 5469 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8515             :   { 5469 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8516             :   { 5477 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8517             :   { 5477 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8518             :   { 5483 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8519             :   { 5483 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8520             :   { 5489 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8521             :   { 5489 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8522             :   { 5495 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8523             :   { 5495 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8524             :   { 5502 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8525             :   { 5502 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8526             :   { 5510 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8527             :   { 5510 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8528             :   { 5516 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8529             :   { 5516 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8530             :   { 5525 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8531             :   { 5525 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8532             :   { 5534 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8533             :   { 5534 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8534             :   { 5543 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8535             :   { 5543 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8536             :   { 5551 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8537             :   { 5551 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8538             :   { 5557 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8539             :   { 5557 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8540             :   { 5564 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8541             :   { 5564 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8542             :   { 5564 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8543             :   { 5564 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8544             :   { 5571 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8545             :   { 5571 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8546             :   { 5571 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8547             :   { 5571 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8548             :   { 5579 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8549             :   { 5579 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8550             :   { 5579 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8551             :   { 5579 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8552             :   { 5586 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8553             :   { 5586 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8554             :   { 5597 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8555             :   { 5597 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8556             :   { 5597 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8557             :   { 5597 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8558             :   { 5604 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8559             :   { 5604 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8560             :   { 5604 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8561             :   { 5604 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8562             :   { 5612 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8563             :   { 5612 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8564             :   { 5612 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8565             :   { 5612 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8566             :   { 5619 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8567             :   { 5619 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8568             :   { 5625 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8569             :   { 5625 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8570             :   { 5631 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
    8571             :   { 5631 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
    8572             :   { 5638 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
    8573             :   { 5638 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    8574             :   { 5645 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
    8575             :   { 5645 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
    8576             :   { 5652 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
    8577             :   { 5652 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
    8578             :   { 5652 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
    8579             :   { 5652 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
    8580             :   { 5659 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8581             :   { 5659 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8582             :   { 5659 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8583             :   { 5659 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8584             :   { 5669 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8585             :   { 5669 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8586             :   { 5669 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8587             :   { 5669 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8588             :   { 5677 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8589             :   { 5677 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8590             :   { 5684 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8591             :   { 5684 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8592             :   { 5691 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8593             :   { 5691 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8594             :   { 5691 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8595             :   { 5691 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8596             :   { 5698 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8597             :   { 5698 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8598             :   { 5698 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8599             :   { 5698 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8600             :   { 5705 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8601             :   { 5705 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8602             :   { 5712 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8603             :   { 5712 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8604             :   { 5719 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8605             :   { 5719 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8606             :   { 5726 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8607             :   { 5726 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8608             :   { 5733 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8609             :   { 5733 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8610             :   { 5733 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8611             :   { 5733 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8612             :   { 5740 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8613             :   { 5740 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8614             :   { 5740 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8615             :   { 5740 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8616             :   { 5747 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8617             :   { 5747 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8618             :   { 5754 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8619             :   { 5754 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8620             :   { 5761 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR64, MCK_GR32orGR64 }, },
    8621             :   { 5761 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
    8622             :   { 5770 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8623             :   { 5770 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8624             :   { 5779 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8625             :   { 5779 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
    8626             :   { 5788 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8627             :   { 5788 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8628             :   { 5797 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8629             :   { 5797 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8630             :   { 5806 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8631             :   { 5806 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8632             :   { 5815 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8633             :   { 5815 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8634             :   { 5824 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8635             :   { 5824 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8636             :   { 5833 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8637             :   { 5833 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
    8638             :   { 5842 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8639             :   { 5842 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8640             :   { 5851 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8641             :   { 5851 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8642             :   { 5860 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8643             :   { 5860 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8644             :   { 5869 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8645             :   { 5869 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8646             :   { 5878 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8647             :   { 5878 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8648             :   { 5885 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8649             :   { 5885 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8650             :   { 5885 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8651             :   { 5885 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8652             :   { 5894 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8653             :   { 5894 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8654             :   { 5902 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8655             :   { 5902 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8656             :   { 5902 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8657             :   { 5902 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8658             :   { 5910 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8659             :   { 5910 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8660             :   { 5910 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8661             :   { 5910 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8662             :   { 5917 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8663             :   { 5917 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8664             :   { 5924 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8665             :   { 5924 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8666             :   { 5924 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8667             :   { 5924 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8668             :   { 5931 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8669             :   { 5931 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8670             :   { 5931 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8671             :   { 5931 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8672             :   { 5943 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8673             :   { 5949 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8674             :   { 5962 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8675             :   { 5962 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8676             :   { 5970 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8677             :   { 5970 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8678             :   { 5978 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8679             :   { 5978 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8680             :   { 5997 /* popfl */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8681             :   { 6003 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8682             :   { 6009 /* popfw */, X86::POPF16, Convert_NoOperands, 0, {  }, },
    8683             :   { 6015 /* popl */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8684             :   { 6015 /* popl */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8685             :   { 6015 /* popl */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
    8686             :   { 6015 /* popl */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
    8687             :   { 6015 /* popl */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8688             :   { 6015 /* popl */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8689             :   { 6015 /* popl */, X86::POP32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8690             :   { 6015 /* popl */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
    8691             :   { 6020 /* popq */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
    8692             :   { 6020 /* popq */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
    8693             :   { 6020 /* popq */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8694             :   { 6020 /* popq */, X86::POP64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8695             :   { 6020 /* popq */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8696             :   { 6025 /* popw */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8697             :   { 6025 /* popw */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8698             :   { 6025 /* popw */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
    8699             :   { 6025 /* popw */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
    8700             :   { 6025 /* popw */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8701             :   { 6025 /* popw */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8702             :   { 6025 /* popw */, X86::POP16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8703             :   { 6025 /* popw */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8704             :   { 6030 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8705             :   { 6030 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8706             :   { 6030 /* por */, X86::PORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8707             :   { 6030 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8708             :   { 6034 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8709             :   { 6043 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8710             :   { 6055 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8711             :   { 6066 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8712             :   { 6077 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8713             :   { 6088 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8714             :   { 6098 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8715             :   { 6110 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8716             :   { 6110 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8717             :   { 6110 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8718             :   { 6110 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8719             :   { 6117 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8720             :   { 6117 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8721             :   { 6117 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8722             :   { 6117 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8723             :   { 6124 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8724             :   { 6124 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8725             :   { 6131 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8726             :   { 6131 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8727             :   { 6139 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8728             :   { 6139 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8729             :   { 6147 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
    8730             :   { 6147 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
    8731             :   { 6154 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8732             :   { 6154 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8733             :   { 6154 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8734             :   { 6154 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8735             :   { 6161 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8736             :   { 6161 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8737             :   { 6161 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8738             :   { 6161 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8739             :   { 6168 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8740             :   { 6168 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8741             :   { 6168 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8742             :   { 6168 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8743             :   { 6175 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8744             :   { 6175 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8745             :   { 6175 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8746             :   { 6175 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8747             :   { 6175 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8748             :   { 6175 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8749             :   { 6181 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8750             :   { 6188 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8751             :   { 6188 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8752             :   { 6188 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8753             :   { 6188 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8754             :   { 6188 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8755             :   { 6188 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8756             :   { 6194 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8757             :   { 6194 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8758             :   { 6194 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8759             :   { 6194 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8760             :   { 6194 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8761             :   { 6194 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8762             :   { 6200 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8763             :   { 6200 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8764             :   { 6200 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8765             :   { 6200 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8766             :   { 6200 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8767             :   { 6200 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8768             :   { 6206 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8769             :   { 6206 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8770             :   { 6206 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8771             :   { 6206 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8772             :   { 6206 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8773             :   { 6206 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8774             :   { 6212 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8775             :   { 6212 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8776             :   { 6212 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8777             :   { 6212 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8778             :   { 6212 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8779             :   { 6212 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8780             :   { 6218 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8781             :   { 6225 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8782             :   { 6225 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8783             :   { 6225 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8784             :   { 6225 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8785             :   { 6225 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8786             :   { 6225 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8787             :   { 6231 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8788             :   { 6231 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8789             :   { 6231 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8790             :   { 6231 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8791             :   { 6231 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8792             :   { 6231 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8793             :   { 6237 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8794             :   { 6237 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8795             :   { 6237 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8796             :   { 6237 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8797             :   { 6243 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8798             :   { 6243 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8799             :   { 6243 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8800             :   { 6243 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8801             :   { 6249 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8802             :   { 6249 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8803             :   { 6249 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8804             :   { 6249 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8805             :   { 6255 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8806             :   { 6255 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8807             :   { 6255 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8808             :   { 6255 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8809             :   { 6262 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8810             :   { 6262 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8811             :   { 6262 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8812             :   { 6262 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8813             :   { 6269 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8814             :   { 6269 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8815             :   { 6269 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8816             :   { 6269 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8817             :   { 6277 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8818             :   { 6277 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8819             :   { 6277 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8820             :   { 6277 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8821             :   { 6285 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8822             :   { 6285 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8823             :   { 6285 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8824             :   { 6285 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8825             :   { 6291 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8826             :   { 6291 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8827             :   { 6298 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8828             :   { 6298 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8829             :   { 6312 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8830             :   { 6312 /* ptwritel */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8831             :   { 6321 /* ptwriteq */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8832             :   { 6321 /* ptwriteq */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8833             :   { 6330 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8834             :   { 6330 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8835             :   { 6330 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8836             :   { 6330 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8837             :   { 6340 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8838             :   { 6340 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8839             :   { 6340 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8840             :   { 6340 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8841             :   { 6350 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8842             :   { 6350 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8843             :   { 6361 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8844             :   { 6361 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8845             :   { 6361 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8846             :   { 6361 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8847             :   { 6371 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8848             :   { 6371 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8849             :   { 6371 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8850             :   { 6371 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
    8851             :   { 6381 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8852             :   { 6381 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8853             :   { 6381 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8854             :   { 6381 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
    8855             :   { 6391 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8856             :   { 6391 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8857             :   { 6402 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8858             :   { 6402 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8859             :   { 6402 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8860             :   { 6402 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
    8861             :   { 6417 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8862             :   { 6424 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8863             :   { 6444 /* pushfl */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8864             :   { 6451 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8865             :   { 6458 /* pushfw */, X86::PUSHF16, Convert_NoOperands, 0, {  }, },
    8866             :   { 6465 /* pushl */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
    8867             :   { 6465 /* pushl */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8868             :   { 6465 /* pushl */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8869             :   { 6465 /* pushl */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
    8870             :   { 6465 /* pushl */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
    8871             :   { 6465 /* pushl */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8872             :   { 6465 /* pushl */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8873             :   { 6465 /* pushl */, X86::PUSH32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8874             :   { 6465 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
    8875             :   { 6465 /* pushl */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    8876             :   { 6465 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
    8877             :   { 6471 /* pushq */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
    8878             :   { 6471 /* pushq */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
    8879             :   { 6471 /* pushq */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8880             :   { 6471 /* pushq */, X86::PUSH64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8881             :   { 6471 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
    8882             :   { 6471 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
    8883             :   { 6471 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8884             :   { 6477 /* pushw */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
    8885             :   { 6477 /* pushw */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8886             :   { 6477 /* pushw */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8887             :   { 6477 /* pushw */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
    8888             :   { 6477 /* pushw */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
    8889             :   { 6477 /* pushw */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8890             :   { 6477 /* pushw */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8891             :   { 6477 /* pushw */, X86::PUSH16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8892             :   { 6477 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
    8893             :   { 6477 /* pushw */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
    8894             :   { 6477 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8895             :   { 6483 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8896             :   { 6483 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8897             :   { 6483 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8898             :   { 6483 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8899             :   { 6492 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    8900             :   { 6492 /* rclb */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8901             :   { 6492 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
    8902             :   { 6492 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8903             :   { 6492 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8904             :   { 6492 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8905             :   { 6497 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    8906             :   { 6497 /* rcll */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8907             :   { 6497 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
    8908             :   { 6497 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8909             :   { 6497 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8910             :   { 6497 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8911             :   { 6502 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    8912             :   { 6502 /* rclq */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8913             :   { 6502 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
    8914             :   { 6502 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
    8915             :   { 6502 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8916             :   { 6502 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8917             :   { 6507 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    8918             :   { 6507 /* rclw */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8919             :   { 6507 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
    8920             :   { 6507 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8921             :   { 6507 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8922             :   { 6507 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8923             :   { 6512 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8924             :   { 6512 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8925             :   { 6518 /* rcpss */, X86::RCPSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8926             :   { 6518 /* rcpss */, X86::RCPSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8927             :   { 6528 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    8928             :   { 6528 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8929             :   { 6528 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
    8930             :   { 6528 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8931             :   { 6528 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8932             :   { 6528 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8933             :   { 6533 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    8934             :   { 6533 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8935             :   { 6533 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
    8936             :   { 6533 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8937             :   { 6533 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8938             :   { 6533 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8939             :   { 6538 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    8940             :   { 6538 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8941             :   { 6538 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
    8942             :   { 6538 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
    8943             :   { 6538 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8944             :   { 6538 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8945             :   { 6543 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    8946             :   { 6543 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8947             :   { 6543 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
    8948             :   { 6543 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8949             :   { 6543 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8950             :   { 6543 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8951             :   { 6557 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
    8952             :   { 6567 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8953             :   { 6586 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
    8954             :   { 6596 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8955             :   { 6606 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, {  }, },
    8956             :   { 6612 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8957             :   { 6612 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8958             :   { 6618 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, {  }, },
    8959             :   { 6625 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, {  }, },
    8960             :   { 6638 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8961             :   { 6646 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8962             :   { 6654 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8963             :   { 6669 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8964             :   { 6677 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8965             :   { 6685 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8966             :   { 6693 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    8967             :   { 6700 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    8968             :   { 6707 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, {  }, },
    8969             :   { 6713 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, {  }, },
    8970             :   { 6720 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, {  }, },
    8971             :   { 6724 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, {  }, },
    8972             :   { 6745 /* retl */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8973             :   { 6745 /* retl */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    8974             :   { 6750 /* retq */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8975             :   { 6750 /* retq */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
    8976             :   { 6755 /* retw */, X86::RETW, Convert_NoOperands, 0, {  }, },
    8977             :   { 6755 /* retw */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
    8978             :   { 6760 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8979             :   { 6770 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    8980             :   { 6770 /* rolb */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8981             :   { 6770 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
    8982             :   { 6770 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8983             :   { 6770 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8984             :   { 6770 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8985             :   { 6775 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    8986             :   { 6775 /* roll */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8987             :   { 6775 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
    8988             :   { 6775 /* roll */, X86::ROL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8989             :   { 6775 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8990             :   { 6775 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8991             :   { 6780 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    8992             :   { 6780 /* rolq */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8993             :   { 6780 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
    8994             :   { 6780 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
    8995             :   { 6780 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8996             :   { 6780 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8997             :   { 6785 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    8998             :   { 6785 /* rolw */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8999             :   { 6785 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
    9000             :   { 6785 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    9001             :   { 6785 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    9002             :   { 6785 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    9003             :   { 6794 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    9004             :   { 6794 /* rorb */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    9005             :   { 6794 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
    9006             :   { 6794 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    9007             :   { 6794 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    9008             :   { 6794 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    9009             :   { 6799 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    9010             :   { 6799 /* rorl */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    9011             :   { 6799 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
    9012             :   { 6799 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    9013             :   { 6799 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    9014             :   { 6799 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    9015             :   { 6804 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    9016             :   { 6804 /* rorq */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    9017             :   { 6804 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
    9018             :   { 6804 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
    9019             :   { 6804 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    9020             :   { 6804 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    9021             :   { 6809 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    9022             :   { 6809 /* rorw */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9023             :   { 6809 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
    9024             :   { 6809 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    9025             :   { 6809 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    9026             :   { 6809 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    9027             :   { 6819 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
    9028             :   { 6819 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
    9029             :   { 6825 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
    9030             :   { 6825 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
    9031             :   { 6831 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    9032             :   { 6831 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    9033             :   { 6839 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    9034             :   { 6839 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    9035             :   { 6847 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    9036             :   { 6847 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
    9037             :   { 6855 /* roundss */, X86::ROUNDSSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    9038             :   { 6855 /* roundss */, X86::ROUNDSSm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    9039             :   { 6863 /* rsm */, X86::RSM, Convert_NoOperands, 0, {  }, },
    9040             :   { 6867 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    9041             :   { 6867 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    9042             :   { 6875 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    9043             :   { 6875 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    9044             :   { 6883 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    9045             :   { 6892 /* sahf */, X86::SAHF, Convert_NoOperands, 0, {  }, },
    9046             :   { 6897 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    9047             :   { 6906 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
    9048             :   { 6906 /* sarb */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    9049             :   { 6906 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
    9050             :   { 6906 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    9051             :   { 6906 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    9052             :   { 6906 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    9053             :   { 6911 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
    9054             :   { 6911 /* sarl */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    9055             :   { 6911 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
    9056             :   { 6911 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    9057             :   { 6911 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    9058             :   { 6911 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    9059             :   { 6916 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
    9060             :   { 6916 /* sarq */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    9061             :   { 6916 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
    9062             :   { 6916 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
    9063             :   { 6916 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    9064             :   { 6916 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    9065             :   { 6921 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
    9066             :   { 6921 /* sarw */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9067             :   { 6921 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
    9068             :   { 6921 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    9069             :   { 6921 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    9070             :   { 6921 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    9071             :   { 6931 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    9072             :   { 6931 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    9073             :   { 6937 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    9074             :   { 6937 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    9075             :   { 6943 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, {  }, },
    9076             :   { 6959 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    9077             :   { 6959 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    9078             :   { 6959 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    9079             :   { 6959 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    9080             :   { 6959 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    9081             :   { 6959 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    9082             :   { 6964 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    9083             :   { 6964 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    9084             :   { 6964 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    9085             :   { 6964 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    9086             :   { 6964 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    9087             :   { 6964 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    9088             :   { 6964 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    9089             :   { 6964 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    9090             :   { 6964 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    9091             :   { 6969 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    9092             :   { 6969 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    9093             :   { 6969 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    9094             :   { 6969 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    9095             :   { 6969 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    9096             :   { 6969 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    9097             :   { 6