LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/X86 - X86GenAsmMatcher.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1299 1698 76.5 %
Date: 2017-09-14 15:23:50 Functions: 10 11 90.9 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Assembly Matcher Source Fragment                                           *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : 
      10             : #ifdef GET_ASSEMBLER_HEADER
      11             : #undef GET_ASSEMBLER_HEADER
      12             :   // This should be included into the middle of the declaration of
      13             :   // your subclasses implementation of MCTargetAsmParser.
      14             :   uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
      15             :   void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
      16             :                        const OperandVector &Operands);
      17             :   void convertToMapAndConstraints(unsigned Kind,
      18             :                            const OperandVector &Operands) override;
      19             :   unsigned MatchInstructionImpl(const OperandVector &Operands,
      20             :                                 MCInst &Inst,
      21             :                                 uint64_t &ErrorInfo, bool matchingInlineAsm,
      22             :                                 unsigned VariantID = 0);
      23             : #endif // GET_ASSEMBLER_HEADER_INFO
      24             : 
      25             : 
      26             : #ifdef GET_OPERAND_DIAGNOSTIC_TYPES
      27             : #undef GET_OPERAND_DIAGNOSTIC_TYPES
      28             : 
      29             : #endif // GET_OPERAND_DIAGNOSTIC_TYPES
      30             : 
      31             : 
      32             : #ifdef GET_REGISTER_MATCHER
      33             : #undef GET_REGISTER_MATCHER
      34             : 
      35             : // Flags for subtarget features that participate in instruction matching.
      36             : enum SubtargetFeatureFlag : uint16_t {
      37             :   Feature_HasAVX512 = (1ULL << 0),
      38             :   Feature_HasCDI = (1ULL << 2),
      39             :   Feature_HasVPOPCNTDQ = (1ULL << 9),
      40             :   Feature_HasPFI = (1ULL << 6),
      41             :   Feature_HasERI = (1ULL << 4),
      42             :   Feature_HasDQI = (1ULL << 3),
      43             :   Feature_HasBWI = (1ULL << 1),
      44             :   Feature_HasVLX = (1ULL << 8),
      45             :   Feature_HasVBMI = (1ULL << 7),
      46             :   Feature_HasIFMA = (1ULL << 5),
      47             :   Feature_Not64BitMode = (1ULL << 14),
      48             :   Feature_In64BitMode = (1ULL << 12),
      49             :   Feature_In16BitMode = (1ULL << 10),
      50             :   Feature_Not16BitMode = (1ULL << 13),
      51             :   Feature_In32BitMode = (1ULL << 11),
      52             :   Feature_None = 0
      53             : };
      54             : 
      55      107862 : static unsigned MatchRegisterName(StringRef Name) {
      56      107862 :   switch (Name.size()) {
      57             :   default: break;
      58        9414 :   case 2:        // 33 strings to match.
      59       18828 :     switch (Name[0]) {
      60             :     default: break;
      61         263 :     case 'a':    // 3 strings to match.
      62         526 :       switch (Name[1]) {
      63             :       default: break;
      64             :       case 'h':  // 1 string to match.
      65             :         return 1;        // "ah"
      66             :       case 'l':  // 1 string to match.
      67             :         return 2;        // "al"
      68             :       case 'x':  // 1 string to match.
      69             :         return 3;        // "ax"
      70             :       }
      71             :       break;
      72         192 :     case 'b':    // 4 strings to match.
      73         384 :       switch (Name[1]) {
      74             :       default: break;
      75             :       case 'h':  // 1 string to match.
      76             :         return 4;        // "bh"
      77             :       case 'l':  // 1 string to match.
      78             :         return 5;        // "bl"
      79             :       case 'p':  // 1 string to match.
      80             :         return 6;        // "bp"
      81             :       case 'x':  // 1 string to match.
      82             :         return 8;        // "bx"
      83             :       }
      84             :       break;
      85          55 :     case 'c':    // 4 strings to match.
      86         110 :       switch (Name[1]) {
      87             :       default: break;
      88             :       case 'h':  // 1 string to match.
      89             :         return 9;        // "ch"
      90             :       case 'l':  // 1 string to match.
      91             :         return 10;       // "cl"
      92             :       case 's':  // 1 string to match.
      93             :         return 11;       // "cs"
      94             :       case 'x':  // 1 string to match.
      95             :         return 12;       // "cx"
      96             :       }
      97             :       break;
      98         224 :     case 'd':    // 5 strings to match.
      99         448 :       switch (Name[1]) {
     100             :       default: break;
     101             :       case 'h':  // 1 string to match.
     102             :         return 13;       // "dh"
     103             :       case 'i':  // 1 string to match.
     104             :         return 14;       // "di"
     105             :       case 'l':  // 1 string to match.
     106             :         return 16;       // "dl"
     107             :       case 's':  // 1 string to match.
     108             :         return 17;       // "ds"
     109             :       case 'x':  // 1 string to match.
     110             :         return 18;       // "dx"
     111             :       }
     112             :       break;
     113          88 :     case 'e':    // 1 string to match.
     114         176 :       if (Name[1] != 's')
     115             :         break;
     116             :       return 28;         // "es"
     117          44 :     case 'f':    // 1 string to match.
     118          88 :       if (Name[1] != 's')
     119             :         break;
     120             :       return 32;         // "fs"
     121          57 :     case 'g':    // 1 string to match.
     122         114 :       if (Name[1] != 's')
     123             :         break;
     124             :       return 33;         // "gs"
     125           0 :     case 'i':    // 1 string to match.
     126           0 :       if (Name[1] != 'p')
     127             :         break;
     128             :       return 34;         // "ip"
     129        7280 :     case 'k':    // 8 strings to match.
     130       14560 :       switch (Name[1]) {
     131             :       default: break;
     132             :       case '0':  // 1 string to match.
     133             :         return 94;       // "k0"
     134             :       case '1':  // 1 string to match.
     135             :         return 95;       // "k1"
     136             :       case '2':  // 1 string to match.
     137             :         return 96;       // "k2"
     138             :       case '3':  // 1 string to match.
     139             :         return 97;       // "k3"
     140             :       case '4':  // 1 string to match.
     141             :         return 98;       // "k4"
     142             :       case '5':  // 1 string to match.
     143             :         return 99;       // "k5"
     144             :       case '6':  // 1 string to match.
     145             :         return 100;      // "k6"
     146             :       case '7':  // 1 string to match.
     147             :         return 101;      // "k7"
     148             :       }
     149             :       break;
     150         407 :     case 'r':    // 2 strings to match.
     151         814 :       switch (Name[1]) {
     152             :       default: break;
     153             :       case '8':  // 1 string to match.
     154             :         return 110;      // "r8"
     155         160 :       case '9':  // 1 string to match.
     156         160 :         return 111;      // "r9"
     157             :       }
     158             :       break;
     159         657 :     case 's':    // 3 strings to match.
     160        1314 :       switch (Name[1]) {
     161             :       default: break;
     162             :       case 'i':  // 1 string to match.
     163             :         return 45;       // "si"
     164             :       case 'p':  // 1 string to match.
     165             :         return 47;       // "sp"
     166             :       case 's':  // 1 string to match.
     167             :         return 49;       // "ss"
     168             :       }
     169             :       break;
     170             :     }
     171             :     break;
     172       36908 :   case 3:        // 72 strings to match.
     173       73816 :     switch (Name[0]) {
     174             :     default: break;
     175           6 :     case 'b':    // 1 string to match.
     176           6 :       if (memcmp(Name.data()+1, "pl", 2) != 0)
     177             :         break;
     178             :       return 7;  // "bpl"
     179          21 :     case 'c':    // 10 strings to match.
     180          42 :       if (Name[1] != 'r')
     181             :         break;
     182          42 :       switch (Name[2]) {
     183             :       default: break;
     184             :       case '0':  // 1 string to match.
     185             :         return 54;       // "cr0"
     186             :       case '1':  // 1 string to match.
     187             :         return 55;       // "cr1"
     188             :       case '2':  // 1 string to match.
     189             :         return 56;       // "cr2"
     190             :       case '3':  // 1 string to match.
     191             :         return 57;       // "cr3"
     192             :       case '4':  // 1 string to match.
     193             :         return 58;       // "cr4"
     194             :       case '5':  // 1 string to match.
     195             :         return 59;       // "cr5"
     196             :       case '6':  // 1 string to match.
     197             :         return 60;       // "cr6"
     198             :       case '7':  // 1 string to match.
     199             :         return 61;       // "cr7"
     200             :       case '8':  // 1 string to match.
     201             :         return 62;       // "cr8"
     202             :       case '9':  // 1 string to match.
     203             :         return 63;       // "cr9"
     204             :       }
     205             :       break;
     206          31 :     case 'd':    // 11 strings to match.
     207          62 :       switch (Name[1]) {
     208             :       default: break;
     209           2 :       case 'i':  // 1 string to match.
     210           4 :         if (Name[2] != 'l')
     211             :           break;
     212             :         return 15;       // "dil"
     213          27 :       case 'r':  // 10 strings to match.
     214          54 :         switch (Name[2]) {
     215             :         default: break;
     216             :         case '0':        // 1 string to match.
     217             :           return 70;     // "dr0"
     218             :         case '1':        // 1 string to match.
     219             :           return 71;     // "dr1"
     220             :         case '2':        // 1 string to match.
     221             :           return 72;     // "dr2"
     222             :         case '3':        // 1 string to match.
     223             :           return 73;     // "dr3"
     224             :         case '4':        // 1 string to match.
     225             :           return 74;     // "dr4"
     226             :         case '5':        // 1 string to match.
     227             :           return 75;     // "dr5"
     228             :         case '6':        // 1 string to match.
     229             :           return 76;     // "dr6"
     230             :         case '7':        // 1 string to match.
     231             :           return 77;     // "dr7"
     232             :         case '8':        // 1 string to match.
     233             :           return 78;     // "dr8"
     234             :         case '9':        // 1 string to match.
     235             :           return 79;     // "dr9"
     236             :         }
     237             :         break;
     238             :       }
     239             :       break;
     240       10751 :     case 'e':    // 10 strings to match.
     241       21502 :       switch (Name[1]) {
     242             :       default: break;
     243        6798 :       case 'a':  // 1 string to match.
     244       13596 :         if (Name[2] != 'x')
     245             :           break;
     246             :         return 19;       // "eax"
     247        1736 :       case 'b':  // 2 strings to match.
     248        3472 :         switch (Name[2]) {
     249             :         default: break;
     250             :         case 'p':        // 1 string to match.
     251             :           return 20;     // "ebp"
     252        1414 :         case 'x':        // 1 string to match.
     253        1414 :           return 21;     // "ebx"
     254             :         }
     255             :         break;
     256        1484 :       case 'c':  // 1 string to match.
     257        2968 :         if (Name[2] != 'x')
     258             :           break;
     259             :         return 22;       // "ecx"
     260         398 :       case 'd':  // 2 strings to match.
     261         796 :         switch (Name[2]) {
     262             :         default: break;
     263             :         case 'i':        // 1 string to match.
     264             :           return 23;     // "edi"
     265         247 :         case 'x':        // 1 string to match.
     266         247 :           return 24;     // "edx"
     267             :         }
     268             :         break;
     269          18 :       case 'i':  // 2 strings to match.
     270          36 :         switch (Name[2]) {
     271             :         default: break;
     272             :         case 'p':        // 1 string to match.
     273             :           return 26;     // "eip"
     274          11 :         case 'z':        // 1 string to match.
     275          11 :           return 27;     // "eiz"
     276             :         }
     277             :         break;
     278         317 :       case 's':  // 2 strings to match.
     279         634 :         switch (Name[2]) {
     280             :         default: break;
     281             :         case 'i':        // 1 string to match.
     282             :           return 29;     // "esi"
     283         147 :         case 'p':        // 1 string to match.
     284         147 :           return 30;     // "esp"
     285             :         }
     286             :         break;
     287             :       }
     288             :       break;
     289          27 :     case 'f':    // 8 strings to match.
     290          54 :       if (Name[1] != 'p')
     291             :         break;
     292           0 :       switch (Name[2]) {
     293             :       default: break;
     294             :       case '0':  // 1 string to match.
     295             :         return 86;       // "fp0"
     296             :       case '1':  // 1 string to match.
     297             :         return 87;       // "fp1"
     298             :       case '2':  // 1 string to match.
     299             :         return 88;       // "fp2"
     300             :       case '3':  // 1 string to match.
     301             :         return 89;       // "fp3"
     302             :       case '4':  // 1 string to match.
     303             :         return 90;       // "fp4"
     304             :       case '5':  // 1 string to match.
     305             :         return 91;       // "fp5"
     306             :       case '6':  // 1 string to match.
     307             :         return 92;       // "fp6"
     308             :       case '7':  // 1 string to match.
     309             :         return 93;       // "fp7"
     310             :       }
     311             :       break;
     312        1284 :     case 'm':    // 8 strings to match.
     313        2568 :       if (Name[1] != 'm')
     314             :         break;
     315        2560 :       switch (Name[2]) {
     316             :       default: break;
     317             :       case '0':  // 1 string to match.
     318             :         return 102;      // "mm0"
     319             :       case '1':  // 1 string to match.
     320             :         return 103;      // "mm1"
     321             :       case '2':  // 1 string to match.
     322             :         return 104;      // "mm2"
     323             :       case '3':  // 1 string to match.
     324             :         return 105;      // "mm3"
     325             :       case '4':  // 1 string to match.
     326             :         return 106;      // "mm4"
     327             :       case '5':  // 1 string to match.
     328             :         return 107;      // "mm5"
     329             :       case '6':  // 1 string to match.
     330             :         return 108;      // "mm6"
     331             :       case '7':  // 1 string to match.
     332             :         return 109;      // "mm7"
     333             :       }
     334             :       break;
     335       24459 :     case 'r':    // 22 strings to match.
     336       48918 :       switch (Name[1]) {
     337             :       default: break;
     338        2595 :       case '1':  // 6 strings to match.
     339        5190 :         switch (Name[2]) {
     340             :         default: break;
     341             :         case '0':        // 1 string to match.
     342             :           return 112;    // "r10"
     343             :         case '1':        // 1 string to match.
     344             :           return 113;    // "r11"
     345             :         case '2':        // 1 string to match.
     346             :           return 114;    // "r12"
     347             :         case '3':        // 1 string to match.
     348             :           return 115;    // "r13"
     349             :         case '4':        // 1 string to match.
     350             :           return 116;    // "r14"
     351             :         case '5':        // 1 string to match.
     352             :           return 117;    // "r15"
     353             :         }
     354             :         break;
     355          15 :       case '8':  // 3 strings to match.
     356          30 :         switch (Name[2]) {
     357             :         default: break;
     358             :         case 'b':        // 1 string to match.
     359             :           return 222;    // "r8b"
     360             :         case 'd':        // 1 string to match.
     361             :           return 230;    // "r8d"
     362             :         case 'w':        // 1 string to match.
     363             :           return 238;    // "r8w"
     364             :         }
     365             :         break;
     366           1 :       case '9':  // 3 strings to match.
     367           2 :         switch (Name[2]) {
     368             :         default: break;
     369             :         case 'b':        // 1 string to match.
     370             :           return 223;    // "r9b"
     371             :         case 'd':        // 1 string to match.
     372             :           return 231;    // "r9d"
     373             :         case 'w':        // 1 string to match.
     374             :           return 239;    // "r9w"
     375             :         }
     376             :         break;
     377        3593 :       case 'a':  // 1 string to match.
     378        7186 :         if (Name[2] != 'x')
     379             :           break;
     380             :         return 35;       // "rax"
     381         424 :       case 'b':  // 2 strings to match.
     382         848 :         switch (Name[2]) {
     383             :         default: break;
     384             :         case 'p':        // 1 string to match.
     385             :           return 36;     // "rbp"
     386         315 :         case 'x':        // 1 string to match.
     387         315 :           return 37;     // "rbx"
     388             :         }
     389             :         break;
     390        4191 :       case 'c':  // 1 string to match.
     391        8382 :         if (Name[2] != 'x')
     392             :           break;
     393             :         return 38;       // "rcx"
     394       13093 :       case 'd':  // 2 strings to match.
     395       26186 :         switch (Name[2]) {
     396             :         default: break;
     397             :         case 'i':        // 1 string to match.
     398             :           return 39;     // "rdi"
     399       12884 :         case 'x':        // 1 string to match.
     400       12884 :           return 40;     // "rdx"
     401             :         }
     402             :         break;
     403         328 :       case 'i':  // 2 strings to match.
     404         656 :         switch (Name[2]) {
     405             :         default: break;
     406             :         case 'p':        // 1 string to match.
     407             :           return 41;     // "rip"
     408           6 :         case 'z':        // 1 string to match.
     409           6 :           return 42;     // "riz"
     410             :         }
     411             :         break;
     412         215 :       case 's':  // 2 strings to match.
     413         430 :         switch (Name[2]) {
     414             :         default: break;
     415             :         case 'i':        // 1 string to match.
     416             :           return 43;     // "rsi"
     417         123 :         case 'p':        // 1 string to match.
     418         123 :           return 44;     // "rsp"
     419             :         }
     420             :         break;
     421             :       }
     422             :       break;
     423          13 :     case 's':    // 2 strings to match.
     424          26 :       switch (Name[1]) {
     425             :       default: break;
     426           0 :       case 'i':  // 1 string to match.
     427           0 :         if (Name[2] != 'l')
     428             :           break;
     429             :         return 46;       // "sil"
     430           0 :       case 'p':  // 1 string to match.
     431           0 :         if (Name[2] != 'l')
     432             :           break;
     433             :         return 48;       // "spl"
     434             :       }
     435             :       break;
     436             :     }
     437             :     break;
     438       16213 :   case 4:        // 65 strings to match.
     439       32426 :     switch (Name[0]) {
     440             :     default: break;
     441          22 :     case 'b':    // 4 strings to match.
     442          22 :       if (memcmp(Name.data()+1, "nd", 2) != 0)
     443             :         break;
     444          40 :       switch (Name[3]) {
     445             :       default: break;
     446             :       case '0':  // 1 string to match.
     447             :         return 50;       // "bnd0"
     448             :       case '1':  // 1 string to match.
     449             :         return 51;       // "bnd1"
     450             :       case '2':  // 1 string to match.
     451             :         return 52;       // "bnd2"
     452             :       case '3':  // 1 string to match.
     453             :         return 53;       // "bnd3"
     454             :       }
     455             :       break;
     456           1 :     case 'c':    // 6 strings to match.
     457           1 :       if (memcmp(Name.data()+1, "r1", 2) != 0)
     458             :         break;
     459           2 :       switch (Name[3]) {
     460             :       default: break;
     461             :       case '0':  // 1 string to match.
     462             :         return 64;       // "cr10"
     463             :       case '1':  // 1 string to match.
     464             :         return 65;       // "cr11"
     465             :       case '2':  // 1 string to match.
     466             :         return 66;       // "cr12"
     467             :       case '3':  // 1 string to match.
     468             :         return 67;       // "cr13"
     469             :       case '4':  // 1 string to match.
     470             :         return 68;       // "cr14"
     471             :       case '5':  // 1 string to match.
     472             :         return 69;       // "cr15"
     473             :       }
     474             :       break;
     475           0 :     case 'd':    // 6 strings to match.
     476           0 :       if (memcmp(Name.data()+1, "r1", 2) != 0)
     477             :         break;
     478           0 :       switch (Name[3]) {
     479             :       default: break;
     480             :       case '0':  // 1 string to match.
     481             :         return 80;       // "dr10"
     482             :       case '1':  // 1 string to match.
     483             :         return 81;       // "dr11"
     484             :       case '2':  // 1 string to match.
     485             :         return 82;       // "dr12"
     486             :       case '3':  // 1 string to match.
     487             :         return 83;       // "dr13"
     488             :       case '4':  // 1 string to match.
     489             :         return 84;       // "dr14"
     490             :       case '5':  // 1 string to match.
     491             :         return 85;       // "dr15"
     492             :       }
     493             :       break;
     494           0 :     case 'f':    // 1 string to match.
     495           0 :       if (memcmp(Name.data()+1, "psw", 3) != 0)
     496             :         break;
     497             :       return 31;         // "fpsw"
     498         299 :     case 'r':    // 18 strings to match.
     499         598 :       if (Name[1] != '1')
     500             :         break;
     501         598 :       switch (Name[2]) {
     502             :       default: break;
     503          25 :       case '0':  // 3 strings to match.
     504          50 :         switch (Name[3]) {
     505             :         default: break;
     506             :         case 'b':        // 1 string to match.
     507             :           return 224;    // "r10b"
     508             :         case 'd':        // 1 string to match.
     509             :           return 232;    // "r10d"
     510             :         case 'w':        // 1 string to match.
     511             :           return 240;    // "r10w"
     512             :         }
     513             :         break;
     514          21 :       case '1':  // 3 strings to match.
     515          42 :         switch (Name[3]) {
     516             :         default: break;
     517             :         case 'b':        // 1 string to match.
     518             :           return 225;    // "r11b"
     519             :         case 'd':        // 1 string to match.
     520             :           return 233;    // "r11d"
     521             :         case 'w':        // 1 string to match.
     522             :           return 241;    // "r11w"
     523             :         }
     524             :         break;
     525          18 :       case '2':  // 3 strings to match.
     526          36 :         switch (Name[3]) {
     527             :         default: break;
     528             :         case 'b':        // 1 string to match.
     529             :           return 226;    // "r12b"
     530             :         case 'd':        // 1 string to match.
     531             :           return 234;    // "r12d"
     532             :         case 'w':        // 1 string to match.
     533             :           return 242;    // "r12w"
     534             :         }
     535             :         break;
     536         215 :       case '3':  // 3 strings to match.
     537         430 :         switch (Name[3]) {
     538             :         default: break;
     539             :         case 'b':        // 1 string to match.
     540             :           return 227;    // "r13b"
     541             :         case 'd':        // 1 string to match.
     542             :           return 235;    // "r13d"
     543             :         case 'w':        // 1 string to match.
     544             :           return 243;    // "r13w"
     545             :         }
     546             :         break;
     547          12 :       case '4':  // 3 strings to match.
     548          24 :         switch (Name[3]) {
     549             :         default: break;
     550             :         case 'b':        // 1 string to match.
     551             :           return 228;    // "r14b"
     552             :         case 'd':        // 1 string to match.
     553             :           return 236;    // "r14d"
     554             :         case 'w':        // 1 string to match.
     555             :           return 244;    // "r14w"
     556             :         }
     557             :         break;
     558           8 :       case '5':  // 3 strings to match.
     559          16 :         switch (Name[3]) {
     560             :         default: break;
     561             :         case 'b':        // 1 string to match.
     562             :           return 229;    // "r15b"
     563             :         case 'd':        // 1 string to match.
     564             :           return 237;    // "r15d"
     565             :         case 'w':        // 1 string to match.
     566             :           return 245;    // "r15w"
     567             :         }
     568             :         break;
     569             :       }
     570             :       break;
     571        8011 :     case 'x':    // 10 strings to match.
     572        8011 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     573             :         break;
     574       16022 :       switch (Name[3]) {
     575             :       default: break;
     576             :       case '0':  // 1 string to match.
     577             :         return 126;      // "xmm0"
     578             :       case '1':  // 1 string to match.
     579             :         return 127;      // "xmm1"
     580             :       case '2':  // 1 string to match.
     581             :         return 128;      // "xmm2"
     582             :       case '3':  // 1 string to match.
     583             :         return 129;      // "xmm3"
     584             :       case '4':  // 1 string to match.
     585             :         return 130;      // "xmm4"
     586             :       case '5':  // 1 string to match.
     587             :         return 131;      // "xmm5"
     588             :       case '6':  // 1 string to match.
     589             :         return 132;      // "xmm6"
     590             :       case '7':  // 1 string to match.
     591             :         return 133;      // "xmm7"
     592             :       case '8':  // 1 string to match.
     593             :         return 134;      // "xmm8"
     594             :       case '9':  // 1 string to match.
     595             :         return 135;      // "xmm9"
     596             :       }
     597             :       break;
     598        1339 :     case 'y':    // 10 strings to match.
     599        1339 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     600             :         break;
     601        2678 :       switch (Name[3]) {
     602             :       default: break;
     603             :       case '0':  // 1 string to match.
     604             :         return 158;      // "ymm0"
     605             :       case '1':  // 1 string to match.
     606             :         return 159;      // "ymm1"
     607             :       case '2':  // 1 string to match.
     608             :         return 160;      // "ymm2"
     609             :       case '3':  // 1 string to match.
     610             :         return 161;      // "ymm3"
     611             :       case '4':  // 1 string to match.
     612             :         return 162;      // "ymm4"
     613             :       case '5':  // 1 string to match.
     614             :         return 163;      // "ymm5"
     615             :       case '6':  // 1 string to match.
     616             :         return 164;      // "ymm6"
     617             :       case '7':  // 1 string to match.
     618             :         return 165;      // "ymm7"
     619             :       case '8':  // 1 string to match.
     620             :         return 166;      // "ymm8"
     621             :       case '9':  // 1 string to match.
     622             :         return 167;      // "ymm9"
     623             :       }
     624             :       break;
     625        6332 :     case 'z':    // 10 strings to match.
     626        6332 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     627             :         break;
     628       12664 :       switch (Name[3]) {
     629             :       default: break;
     630             :       case '0':  // 1 string to match.
     631             :         return 190;      // "zmm0"
     632             :       case '1':  // 1 string to match.
     633             :         return 191;      // "zmm1"
     634             :       case '2':  // 1 string to match.
     635             :         return 192;      // "zmm2"
     636             :       case '3':  // 1 string to match.
     637             :         return 193;      // "zmm3"
     638             :       case '4':  // 1 string to match.
     639             :         return 194;      // "zmm4"
     640             :       case '5':  // 1 string to match.
     641             :         return 195;      // "zmm5"
     642             :       case '6':  // 1 string to match.
     643             :         return 196;      // "zmm6"
     644             :       case '7':  // 1 string to match.
     645             :         return 197;      // "zmm7"
     646             :       case '8':  // 1 string to match.
     647             :         return 198;      // "zmm8"
     648             :       case '9':  // 1 string to match.
     649             :         return 199;      // "zmm9"
     650             :       }
     651             :       break;
     652             :     }
     653             :     break;
     654       44981 :   case 5:        // 75 strings to match.
     655       89962 :     switch (Name[0]) {
     656             :     default: break;
     657           2 :     case 'f':    // 1 string to match.
     658           2 :       if (memcmp(Name.data()+1, "lags", 4) != 0)
     659             :         break;
     660             :       return 25;         // "flags"
     661           0 :     case 's':    // 8 strings to match.
     662           0 :       if (memcmp(Name.data()+1, "t(", 2) != 0)
     663             :         break;
     664           0 :       switch (Name[3]) {
     665             :       default: break;
     666           0 :       case '0':  // 1 string to match.
     667           0 :         if (Name[4] != ')')
     668             :           break;
     669             :         return 118;      // "st(0)"
     670           0 :       case '1':  // 1 string to match.
     671           0 :         if (Name[4] != ')')
     672             :           break;
     673             :         return 119;      // "st(1)"
     674           0 :       case '2':  // 1 string to match.
     675           0 :         if (Name[4] != ')')
     676             :           break;
     677             :         return 120;      // "st(2)"
     678           0 :       case '3':  // 1 string to match.
     679           0 :         if (Name[4] != ')')
     680             :           break;
     681             :         return 121;      // "st(3)"
     682           0 :       case '4':  // 1 string to match.
     683           0 :         if (Name[4] != ')')
     684             :           break;
     685             :         return 122;      // "st(4)"
     686           0 :       case '5':  // 1 string to match.
     687           0 :         if (Name[4] != ')')
     688             :           break;
     689             :         return 123;      // "st(5)"
     690           0 :       case '6':  // 1 string to match.
     691           0 :         if (Name[4] != ')')
     692             :           break;
     693             :         return 124;      // "st(6)"
     694           0 :       case '7':  // 1 string to match.
     695           0 :         if (Name[4] != ')')
     696             :           break;
     697             :         return 125;      // "st(7)"
     698             :       }
     699             :       break;
     700       17645 :     case 'x':    // 22 strings to match.
     701       17645 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     702             :         break;
     703       35290 :       switch (Name[3]) {
     704             :       default: break;
     705        6861 :       case '1':  // 10 strings to match.
     706       13722 :         switch (Name[4]) {
     707             :         default: break;
     708             :         case '0':        // 1 string to match.
     709             :           return 136;    // "xmm10"
     710             :         case '1':        // 1 string to match.
     711             :           return 137;    // "xmm11"
     712             :         case '2':        // 1 string to match.
     713             :           return 138;    // "xmm12"
     714             :         case '3':        // 1 string to match.
     715             :           return 139;    // "xmm13"
     716             :         case '4':        // 1 string to match.
     717             :           return 140;    // "xmm14"
     718             :         case '5':        // 1 string to match.
     719             :           return 141;    // "xmm15"
     720             :         case '6':        // 1 string to match.
     721             :           return 142;    // "xmm16"
     722             :         case '7':        // 1 string to match.
     723             :           return 143;    // "xmm17"
     724             :         case '8':        // 1 string to match.
     725             :           return 144;    // "xmm18"
     726             :         case '9':        // 1 string to match.
     727             :           return 145;    // "xmm19"
     728             :         }
     729             :         break;
     730        9914 :       case '2':  // 10 strings to match.
     731       19828 :         switch (Name[4]) {
     732             :         default: break;
     733             :         case '0':        // 1 string to match.
     734             :           return 146;    // "xmm20"
     735             :         case '1':        // 1 string to match.
     736             :           return 147;    // "xmm21"
     737             :         case '2':        // 1 string to match.
     738             :           return 148;    // "xmm22"
     739             :         case '3':        // 1 string to match.
     740             :           return 149;    // "xmm23"
     741             :         case '4':        // 1 string to match.
     742             :           return 150;    // "xmm24"
     743             :         case '5':        // 1 string to match.
     744             :           return 151;    // "xmm25"
     745             :         case '6':        // 1 string to match.
     746             :           return 152;    // "xmm26"
     747             :         case '7':        // 1 string to match.
     748             :           return 153;    // "xmm27"
     749             :         case '8':        // 1 string to match.
     750             :           return 154;    // "xmm28"
     751             :         case '9':        // 1 string to match.
     752             :           return 155;    // "xmm29"
     753             :         }
     754             :         break;
     755         870 :       case '3':  // 2 strings to match.
     756        1740 :         switch (Name[4]) {
     757             :         default: break;
     758             :         case '0':        // 1 string to match.
     759             :           return 156;    // "xmm30"
     760         233 :         case '1':        // 1 string to match.
     761         233 :           return 157;    // "xmm31"
     762             :         }
     763             :         break;
     764             :       }
     765             :       break;
     766       10566 :     case 'y':    // 22 strings to match.
     767       10566 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     768             :         break;
     769       21132 :       switch (Name[3]) {
     770             :       default: break;
     771        2763 :       case '1':  // 10 strings to match.
     772        5526 :         switch (Name[4]) {
     773             :         default: break;
     774             :         case '0':        // 1 string to match.
     775             :           return 168;    // "ymm10"
     776             :         case '1':        // 1 string to match.
     777             :           return 169;    // "ymm11"
     778             :         case '2':        // 1 string to match.
     779             :           return 170;    // "ymm12"
     780             :         case '3':        // 1 string to match.
     781             :           return 171;    // "ymm13"
     782             :         case '4':        // 1 string to match.
     783             :           return 172;    // "ymm14"
     784             :         case '5':        // 1 string to match.
     785             :           return 173;    // "ymm15"
     786             :         case '6':        // 1 string to match.
     787             :           return 174;    // "ymm16"
     788             :         case '7':        // 1 string to match.
     789             :           return 175;    // "ymm17"
     790             :         case '8':        // 1 string to match.
     791             :           return 176;    // "ymm18"
     792             :         case '9':        // 1 string to match.
     793             :           return 177;    // "ymm19"
     794             :         }
     795             :         break;
     796        7217 :       case '2':  // 10 strings to match.
     797       14434 :         switch (Name[4]) {
     798             :         default: break;
     799             :         case '0':        // 1 string to match.
     800             :           return 178;    // "ymm20"
     801             :         case '1':        // 1 string to match.
     802             :           return 179;    // "ymm21"
     803             :         case '2':        // 1 string to match.
     804             :           return 180;    // "ymm22"
     805             :         case '3':        // 1 string to match.
     806             :           return 181;    // "ymm23"
     807             :         case '4':        // 1 string to match.
     808             :           return 182;    // "ymm24"
     809             :         case '5':        // 1 string to match.
     810             :           return 183;    // "ymm25"
     811             :         case '6':        // 1 string to match.
     812             :           return 184;    // "ymm26"
     813             :         case '7':        // 1 string to match.
     814             :           return 185;    // "ymm27"
     815             :         case '8':        // 1 string to match.
     816             :           return 186;    // "ymm28"
     817             :         case '9':        // 1 string to match.
     818             :           return 187;    // "ymm29"
     819             :         }
     820             :         break;
     821         586 :       case '3':  // 2 strings to match.
     822        1172 :         switch (Name[4]) {
     823             :         default: break;
     824             :         case '0':        // 1 string to match.
     825             :           return 188;    // "ymm30"
     826         138 :         case '1':        // 1 string to match.
     827         138 :           return 189;    // "ymm31"
     828             :         }
     829             :         break;
     830             :       }
     831             :       break;
     832       16709 :     case 'z':    // 22 strings to match.
     833       16709 :       if (memcmp(Name.data()+1, "mm", 2) != 0)
     834             :         break;
     835       33418 :       switch (Name[3]) {
     836             :       default: break;
     837        6877 :       case '1':  // 10 strings to match.
     838       13754 :         switch (Name[4]) {
     839             :         default: break;
     840             :         case '0':        // 1 string to match.
     841             :           return 200;    // "zmm10"
     842             :         case '1':        // 1 string to match.
     843             :           return 201;    // "zmm11"
     844             :         case '2':        // 1 string to match.
     845             :           return 202;    // "zmm12"
     846             :         case '3':        // 1 string to match.
     847             :           return 203;    // "zmm13"
     848             :         case '4':        // 1 string to match.
     849             :           return 204;    // "zmm14"
     850             :         case '5':        // 1 string to match.
     851             :           return 205;    // "zmm15"
     852             :         case '6':        // 1 string to match.
     853             :           return 206;    // "zmm16"
     854             :         case '7':        // 1 string to match.
     855             :           return 207;    // "zmm17"
     856             :         case '8':        // 1 string to match.
     857             :           return 208;    // "zmm18"
     858             :         case '9':        // 1 string to match.
     859             :           return 209;    // "zmm19"
     860             :         }
     861             :         break;
     862        9375 :       case '2':  // 10 strings to match.
     863       18750 :         switch (Name[4]) {
     864             :         default: break;
     865             :         case '0':        // 1 string to match.
     866             :           return 210;    // "zmm20"
     867             :         case '1':        // 1 string to match.
     868             :           return 211;    // "zmm21"
     869             :         case '2':        // 1 string to match.
     870             :           return 212;    // "zmm22"
     871             :         case '3':        // 1 string to match.
     872             :           return 213;    // "zmm23"
     873             :         case '4':        // 1 string to match.
     874             :           return 214;    // "zmm24"
     875             :         case '5':        // 1 string to match.
     876             :           return 215;    // "zmm25"
     877             :         case '6':        // 1 string to match.
     878             :           return 216;    // "zmm26"
     879             :         case '7':        // 1 string to match.
     880             :           return 217;    // "zmm27"
     881             :         case '8':        // 1 string to match.
     882             :           return 218;    // "zmm28"
     883             :         case '9':        // 1 string to match.
     884             :           return 219;    // "zmm29"
     885             :         }
     886             :         break;
     887         457 :       case '3':  // 2 strings to match.
     888         914 :         switch (Name[4]) {
     889             :         default: break;
     890             :         case '0':        // 1 string to match.
     891             :           return 220;    // "zmm30"
     892           1 :         case '1':        // 1 string to match.
     893           1 :           return 221;    // "zmm31"
     894             :         }
     895             :         break;
     896             :       }
     897             :       break;
     898             :     }
     899             :     break;
     900             :   }
     901             :   return 0;
     902             : }
     903             : 
     904             : #endif // GET_REGISTER_MATCHER
     905             : 
     906             : 
     907             : #ifdef GET_SUBTARGET_FEATURE_NAME
     908             : #undef GET_SUBTARGET_FEATURE_NAME
     909             : 
     910             : // User-level names for subtarget features that participate in
     911             : // instruction matching.
     912          21 : static const char *getSubtargetFeatureName(uint64_t Val) {
     913          21 :   switch(Val) {
     914             :   case Feature_HasAVX512: return "AVX-512 ISA";
     915           0 :   case Feature_HasCDI: return "AVX-512 CD ISA";
     916           0 :   case Feature_HasVPOPCNTDQ: return "AVX-512 VPOPCNTDQ ISA";
     917           0 :   case Feature_HasPFI: return "AVX-512 PF ISA";
     918           0 :   case Feature_HasERI: return "AVX-512 ER ISA";
     919           0 :   case Feature_HasDQI: return "AVX-512 DQ ISA";
     920           0 :   case Feature_HasBWI: return "AVX-512 BW ISA";
     921           0 :   case Feature_HasVLX: return "AVX-512 VL ISA";
     922           0 :   case Feature_HasVBMI: return "AVX-512 VBMI ISA";
     923           0 :   case Feature_HasIFMA: return "AVX-512 IFMA ISA";
     924           4 :   case Feature_Not64BitMode: return "Not 64-bit mode";
     925          14 :   case Feature_In64BitMode: return "64-bit mode";
     926           2 :   case Feature_In16BitMode: return "16-bit mode";
     927           1 :   case Feature_Not16BitMode: return "Not 16-bit mode";
     928           0 :   case Feature_In32BitMode: return "32-bit mode";
     929           0 :   default: return "(unknown)";
     930             :   }
     931             : }
     932             : 
     933             : #endif // GET_SUBTARGET_FEATURE_NAME
     934             : 
     935             : 
     936             : #ifdef GET_MATCHER_IMPLEMENTATION
     937             : #undef GET_MATCHER_IMPLEMENTATION
     938             : 
     939       71078 : static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
     940       71078 :   switch (VariantID) {
     941       57463 :     case 0:
     942       57463 :       switch (Mnemonic.size()) {
     943             :       default: break;
     944        7695 :       case 3:    // 6 strings to match.
     945       15390 :         switch (Mnemonic[0]) {
     946             :         default: break;
     947          36 :         case 'c':        // 4 strings to match.
     948          72 :           switch (Mnemonic[1]) {
     949             :           default: break;
     950           1 :           case 'b':      // 1 string to match.
     951           2 :             if (Mnemonic[2] != 'w')
     952             :               break;
     953           1 :             Mnemonic = "cbtw";         // "cbw"
     954           1 :             return;
     955           1 :           case 'd':      // 1 string to match.
     956           2 :             if (Mnemonic[2] != 'q')
     957             :               break;
     958           1 :             Mnemonic = "cltd";         // "cdq"
     959           1 :             return;
     960           1 :           case 'q':      // 1 string to match.
     961           2 :             if (Mnemonic[2] != 'o')
     962             :               break;
     963           1 :             Mnemonic = "cqto";         // "cqo"
     964           1 :             return;
     965           1 :           case 'w':      // 1 string to match.
     966           2 :             if (Mnemonic[2] != 'd')
     967             :               break;
     968           1 :             Mnemonic = "cwtd";         // "cwd"
     969           1 :             return;
     970             :           }
     971             :           break;
     972          49 :         case 'p':        // 1 string to match.
     973          49 :           if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
     974             :             break;
     975          25 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "pop"
     976           3 :             Mnemonic = "popw";
     977          22 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
     978           7 :             Mnemonic = "popl";
     979          15 :           else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
     980          15 :             Mnemonic = "popq";
     981             :           return;
     982         349 :         case 'r':        // 1 string to match.
     983         349 :           if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
     984             :             break;
     985         324 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "ret"
     986           3 :             Mnemonic = "retw";
     987         321 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
     988         123 :             Mnemonic = "retl";
     989         198 :           else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
     990         198 :             Mnemonic = "retq";
     991             :           return;
     992             :         }
     993             :         break;
     994       22965 :       case 4:    // 18 strings to match.
     995       45930 :         switch (Mnemonic[0]) {
     996             :         default: break;
     997         410 :         case 'c':        // 3 strings to match.
     998         820 :           switch (Mnemonic[1]) {
     999             :           default: break;
    1000         242 :           case 'a':      // 1 string to match.
    1001         242 :             if (memcmp(Mnemonic.data()+2, "ll", 2) != 0)
    1002             :               break;
    1003         242 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "call"
    1004           2 :               Mnemonic = "callw";
    1005         240 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1006          76 :               Mnemonic = "calll";
    1007         164 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1008         164 :               Mnemonic = "callq";
    1009             :             return;
    1010           1 :           case 'd':      // 1 string to match.
    1011           1 :             if (memcmp(Mnemonic.data()+2, "qe", 2) != 0)
    1012             :               break;
    1013           1 :             Mnemonic = "cltq";         // "cdqe"
    1014           1 :             return;
    1015           6 :           case 'w':      // 1 string to match.
    1016           6 :             if (memcmp(Mnemonic.data()+2, "de", 2) != 0)
    1017             :               break;
    1018           1 :             Mnemonic = "cwtl";         // "cwde"
    1019           1 :             return;
    1020             :           }
    1021             :           break;
    1022       17744 :         case 'i':        // 1 string to match.
    1023       17744 :           if (memcmp(Mnemonic.data()+1, "ret", 3) != 0)
    1024             :             break;
    1025           3 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "iret"
    1026           1 :             Mnemonic = "iretw";
    1027           2 :           else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
    1028           2 :             Mnemonic = "iretl";
    1029             :           return;
    1030         210 :         case 'l':        // 3 strings to match.
    1031         420 :           switch (Mnemonic[1]) {
    1032             :           default: break;
    1033          13 :           case 'g':      // 1 string to match.
    1034          13 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1035             :               break;
    1036          13 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lgdt"
    1037           4 :               Mnemonic = "lgdtw";
    1038           9 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1039           5 :               Mnemonic = "lgdtl";
    1040           4 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1041           4 :               Mnemonic = "lgdtq";
    1042             :             return;
    1043           3 :           case 'i':      // 1 string to match.
    1044           3 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1045             :               break;
    1046           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lidt"
    1047           1 :               Mnemonic = "lidtw";
    1048           2 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1049           1 :               Mnemonic = "lidtl";
    1050           1 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1051           1 :               Mnemonic = "lidtq";
    1052             :             return;
    1053          10 :           case 'r':      // 1 string to match.
    1054          10 :             if (memcmp(Mnemonic.data()+2, "et", 2) != 0)
    1055             :               break;
    1056          10 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "lret"
    1057           3 :               Mnemonic = "lretw";
    1058           7 :             else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
    1059           7 :               Mnemonic = "lretl";
    1060             :             return;
    1061             :           }
    1062             :           break;
    1063         230 :         case 'p':        // 3 strings to match.
    1064         460 :           switch (Mnemonic[1]) {
    1065             :           default: break;
    1066          81 :           case 'o':      // 2 strings to match.
    1067         162 :             if (Mnemonic[2] != 'p')
    1068             :               break;
    1069         162 :             switch (Mnemonic[3]) {
    1070             :             default: break;
    1071           3 :             case 'a':    // 1 string to match.
    1072           3 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "popa"
    1073           1 :                 Mnemonic = "popaw";
    1074           2 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1075           2 :                 Mnemonic = "popal";
    1076             :               return;
    1077           5 :             case 'f':    // 1 string to match.
    1078           5 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "popf"
    1079           1 :                 Mnemonic = "popfw";
    1080           4 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1081           3 :                 Mnemonic = "popfl";
    1082           1 :               else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1083           1 :                 Mnemonic = "popfq";
    1084             :               return;
    1085             :             }
    1086             :             break;
    1087         101 :           case 'u':      // 1 string to match.
    1088         101 :             if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
    1089             :               break;
    1090         101 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "push"
    1091           6 :               Mnemonic = "pushw";
    1092          95 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1093          17 :               Mnemonic = "pushl";
    1094          78 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1095          78 :               Mnemonic = "pushq";
    1096             :             return;
    1097             :           }
    1098             :           break;
    1099         312 :         case 'r':        // 1 string to match.
    1100         312 :           if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
    1101             :             break;
    1102           6 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "retn"
    1103           2 :             Mnemonic = "retw";
    1104           4 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1105           2 :             Mnemonic = "retl";
    1106           2 :           else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1107           2 :             Mnemonic = "retq";
    1108             :           return;
    1109         603 :         case 's':        // 6 strings to match.
    1110        1206 :           switch (Mnemonic[1]) {
    1111             :           default: break;
    1112          71 :           case 'a':      // 4 strings to match.
    1113         142 :             if (Mnemonic[2] != 'l')
    1114             :               break;
    1115          82 :             switch (Mnemonic[3]) {
    1116             :             default: break;
    1117          12 :             case 'b':    // 1 string to match.
    1118          12 :               Mnemonic = "shlb";       // "salb"
    1119          12 :               return;
    1120          21 :             case 'l':    // 1 string to match.
    1121          21 :               Mnemonic = "shll";       // "sall"
    1122          21 :               return;
    1123           2 :             case 'q':    // 1 string to match.
    1124           2 :               Mnemonic = "shlq";       // "salq"
    1125           2 :               return;
    1126           4 :             case 'w':    // 1 string to match.
    1127           4 :               Mnemonic = "shlw";       // "salw"
    1128           4 :               return;
    1129             :             }
    1130             :             break;
    1131           3 :           case 'g':      // 1 string to match.
    1132           3 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1133             :               break;
    1134           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "sgdt"
    1135           1 :               Mnemonic = "sgdtw";
    1136           2 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1137           1 :               Mnemonic = "sgdtl";
    1138           1 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1139           1 :               Mnemonic = "sgdtq";
    1140             :             return;
    1141           3 :           case 'i':      // 1 string to match.
    1142           3 :             if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
    1143             :               break;
    1144           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "sidt"
    1145           1 :               Mnemonic = "sidtw";
    1146           2 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1147           1 :               Mnemonic = "sidtl";
    1148           1 :             else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1149           1 :               Mnemonic = "sidtq";
    1150             :             return;
    1151             :           }
    1152             :           break;
    1153           4 :         case 'u':        // 1 string to match.
    1154           4 :           if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0)
    1155             :             break;
    1156           2 :           Mnemonic = "ud2";    // "ud2a"
    1157           2 :           return;
    1158             :         }
    1159             :         break;
    1160        3582 :       case 5:    // 9 strings to match.
    1161        7164 :         switch (Mnemonic[0]) {
    1162             :         default: break;
    1163         161 :         case 'f':        // 1 string to match.
    1164         161 :           if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0)
    1165             :             break;
    1166           1 :           Mnemonic = "fildll";         // "fildq"
    1167           1 :           return;
    1168         789 :         case 'p':        // 3 strings to match.
    1169        1578 :           switch (Mnemonic[1]) {
    1170             :           default: break;
    1171          16 :           case 'o':      // 1 string to match.
    1172          16 :             if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0)
    1173             :               break;
    1174           2 :             Mnemonic = "popfl";        // "popfd"
    1175           2 :             return;
    1176         132 :           case 'u':      // 2 strings to match.
    1177         132 :             if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
    1178             :               break;
    1179         264 :             switch (Mnemonic[4]) {
    1180             :             default: break;
    1181           2 :             case 'a':    // 1 string to match.
    1182           2 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "pusha"
    1183           1 :                 Mnemonic = "pushaw";
    1184           1 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1185           1 :                 Mnemonic = "pushal";
    1186             :               return;
    1187           4 :             case 'f':    // 1 string to match.
    1188           4 :               if ((Features & Feature_In16BitMode) == Feature_In16BitMode)   // "pushf"
    1189           1 :                 Mnemonic = "pushfw";
    1190           3 :               else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1191           2 :                 Mnemonic = "pushfl";
    1192           1 :               else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
    1193           1 :                 Mnemonic = "pushfq";
    1194             :               return;
    1195             :             }
    1196             :             break;
    1197             :           }
    1198             :           break;
    1199         289 :         case 's':        // 4 strings to match.
    1200         289 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1201             :             break;
    1202           8 :           switch (Mnemonic[4]) {
    1203             :           default: break;
    1204           1 :           case 'b':      // 1 string to match.
    1205           1 :             Mnemonic = "movsb";        // "smovb"
    1206           1 :             return;
    1207           1 :           case 'l':      // 1 string to match.
    1208           1 :             Mnemonic = "movsl";        // "smovl"
    1209           1 :             return;
    1210           1 :           case 'q':      // 1 string to match.
    1211           1 :             Mnemonic = "movsq";        // "smovq"
    1212           1 :             return;
    1213           1 :           case 'w':      // 1 string to match.
    1214           1 :             Mnemonic = "movsw";        // "smovw"
    1215           1 :             return;
    1216             :           }
    1217             :           break;
    1218         905 :         case 'v':        // 1 string to match.
    1219         905 :           if (memcmp(Mnemonic.data()+1, "errw", 4) != 0)
    1220             :             break;
    1221           2 :           Mnemonic = "verr";   // "verrw"
    1222           2 :           return;
    1223             :         }
    1224             :         break;
    1225        4799 :       case 6:    // 15 strings to match.
    1226        9598 :         switch (Mnemonic[0]) {
    1227             :         default: break;
    1228         110 :         case 'c':        // 6 strings to match.
    1229         110 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1230             :             break;
    1231          46 :           switch (Mnemonic[4]) {
    1232             :           default: break;
    1233           2 :           case 'c':      // 3 strings to match.
    1234           4 :             switch (Mnemonic[5]) {
    1235             :             default: break;
    1236           2 :             case 'l':    // 1 string to match.
    1237           2 :               Mnemonic = "cmovbl";     // "cmovcl"
    1238           2 :               return;
    1239           0 :             case 'q':    // 1 string to match.
    1240           0 :               Mnemonic = "cmovbq";     // "cmovcq"
    1241           0 :               return;
    1242           0 :             case 'w':    // 1 string to match.
    1243           0 :               Mnemonic = "cmovbw";     // "cmovcw"
    1244           0 :               return;
    1245             :             }
    1246             :             break;
    1247           2 :           case 'z':      // 3 strings to match.
    1248           4 :             switch (Mnemonic[5]) {
    1249             :             default: break;
    1250           2 :             case 'l':    // 1 string to match.
    1251           2 :               Mnemonic = "cmovel";     // "cmovzl"
    1252           2 :               return;
    1253           0 :             case 'q':    // 1 string to match.
    1254           0 :               Mnemonic = "cmoveq";     // "cmovzq"
    1255           0 :               return;
    1256           0 :             case 'w':    // 1 string to match.
    1257           0 :               Mnemonic = "cmovew";     // "cmovzw"
    1258           0 :               return;
    1259             :             }
    1260             :             break;
    1261             :           }
    1262             :           break;
    1263         187 :         case 'f':        // 4 strings to match.
    1264         374 :           switch (Mnemonic[1]) {
    1265             :           default: break;
    1266          24 :           case 'c':      // 2 strings to match.
    1267          24 :             if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
    1268             :               break;
    1269          20 :             switch (Mnemonic[5]) {
    1270             :             default: break;
    1271           1 :             case 'a':    // 1 string to match.
    1272           1 :               Mnemonic = "fcmovnbe";   // "fcmova"
    1273           1 :               return;
    1274           0 :             case 'z':    // 1 string to match.
    1275           0 :               Mnemonic = "fcmove";     // "fcmovz"
    1276           0 :               return;
    1277             :             }
    1278             :             break;
    1279          49 :           case 'i':      // 1 string to match.
    1280          49 :             if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0)
    1281             :               break;
    1282           0 :             Mnemonic = "fistpll";      // "fistpq"
    1283           0 :             return;
    1284          12 :           case 'l':      // 1 string to match.
    1285          12 :             if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0)
    1286             :               break;
    1287           2 :             Mnemonic = "fldcw";        // "fldcww"
    1288           2 :             return;
    1289             :           }
    1290             :           break;
    1291          59 :         case 'l':        // 2 strings to match.
    1292          59 :           if (memcmp(Mnemonic.data()+1, "eave", 4) != 0)
    1293             :             break;
    1294           6 :           switch (Mnemonic[5]) {
    1295             :           default: break;
    1296           2 :           case 'l':      // 1 string to match.
    1297           2 :             if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)   // "leavel"
    1298           2 :               Mnemonic = "leave";
    1299             :             return;
    1300           1 :           case 'q':      // 1 string to match.
    1301           1 :             if ((Features & Feature_In64BitMode) == Feature_In64BitMode)     // "leaveq"
    1302           1 :               Mnemonic = "leave";
    1303             :             return;
    1304             :           }
    1305             :           break;
    1306         616 :         case 'p':        // 1 string to match.
    1307         616 :           if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0)
    1308             :             break;
    1309           2 :           Mnemonic = "pushfl";         // "pushfd"
    1310           2 :           return;
    1311         100 :         case 's':        // 1 string to match.
    1312         100 :           if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0)
    1313             :             break;
    1314           3 :           Mnemonic = "sysretl";        // "sysret"
    1315           3 :           return;
    1316          31 :         case 'x':        // 1 string to match.
    1317          31 :           if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0)
    1318             :             break;
    1319           0 :           Mnemonic = "xsave64";        // "xsaveq"
    1320           0 :           return;
    1321             :         }
    1322             :         break;
    1323        4370 :       case 7:    // 34 strings to match.
    1324        8740 :         switch (Mnemonic[0]) {
    1325             :         default: break;
    1326          60 :         case 'c':        // 24 strings to match.
    1327          60 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1328             :             break;
    1329         102 :           switch (Mnemonic[4]) {
    1330             :           default: break;
    1331          41 :           case 'n':      // 18 strings to match.
    1332          82 :             switch (Mnemonic[5]) {
    1333             :             default: break;
    1334           4 :             case 'a':    // 3 strings to match.
    1335           8 :               switch (Mnemonic[6]) {
    1336             :               default: break;
    1337           2 :               case 'l':  // 1 string to match.
    1338           2 :                 Mnemonic = "cmovbel";  // "cmovnal"
    1339           2 :                 return;
    1340           0 :               case 'q':  // 1 string to match.
    1341           0 :                 Mnemonic = "cmovbeq";  // "cmovnaq"
    1342           0 :                 return;
    1343           0 :               case 'w':  // 1 string to match.
    1344           0 :                 Mnemonic = "cmovbew";  // "cmovnaw"
    1345           0 :                 return;
    1346             :               }
    1347             :               break;
    1348           2 :             case 'b':    // 3 strings to match.
    1349           4 :               switch (Mnemonic[6]) {
    1350             :               default: break;
    1351           2 :               case 'l':  // 1 string to match.
    1352           2 :                 Mnemonic = "cmovael";  // "cmovnbl"
    1353           2 :                 return;
    1354           0 :               case 'q':  // 1 string to match.
    1355           0 :                 Mnemonic = "cmovaeq";  // "cmovnbq"
    1356           0 :                 return;
    1357           0 :               case 'w':  // 1 string to match.
    1358           0 :                 Mnemonic = "cmovaew";  // "cmovnbw"
    1359           0 :                 return;
    1360             :               }
    1361             :               break;
    1362           2 :             case 'c':    // 3 strings to match.
    1363           4 :               switch (Mnemonic[6]) {
    1364             :               default: break;
    1365           2 :               case 'l':  // 1 string to match.
    1366           2 :                 Mnemonic = "cmovael";  // "cmovncl"
    1367           2 :                 return;
    1368           0 :               case 'q':  // 1 string to match.
    1369           0 :                 Mnemonic = "cmovaeq";  // "cmovncq"
    1370           0 :                 return;
    1371           0 :               case 'w':  // 1 string to match.
    1372           0 :                 Mnemonic = "cmovaew";  // "cmovncw"
    1373           0 :                 return;
    1374             :               }
    1375             :               break;
    1376           4 :             case 'g':    // 3 strings to match.
    1377           8 :               switch (Mnemonic[6]) {
    1378             :               default: break;
    1379           4 :               case 'l':  // 1 string to match.
    1380           4 :                 Mnemonic = "cmovlel";  // "cmovngl"
    1381           4 :                 return;
    1382           0 :               case 'q':  // 1 string to match.
    1383           0 :                 Mnemonic = "cmovleq";  // "cmovngq"
    1384           0 :                 return;
    1385           0 :               case 'w':  // 1 string to match.
    1386           0 :                 Mnemonic = "cmovlew";  // "cmovngw"
    1387           0 :                 return;
    1388             :               }
    1389             :               break;
    1390          10 :             case 'l':    // 3 strings to match.
    1391          20 :               switch (Mnemonic[6]) {
    1392             :               default: break;
    1393           4 :               case 'l':  // 1 string to match.
    1394           4 :                 Mnemonic = "cmovgel";  // "cmovnll"
    1395           4 :                 return;
    1396           2 :               case 'q':  // 1 string to match.
    1397           2 :                 Mnemonic = "cmovgeq";  // "cmovnlq"
    1398           2 :                 return;
    1399           2 :               case 'w':  // 1 string to match.
    1400           2 :                 Mnemonic = "cmovgew";  // "cmovnlw"
    1401           2 :                 return;
    1402             :               }
    1403             :               break;
    1404           7 :             case 'z':    // 3 strings to match.
    1405          14 :               switch (Mnemonic[6]) {
    1406             :               default: break;
    1407           3 :               case 'l':  // 1 string to match.
    1408           3 :                 Mnemonic = "cmovnel";  // "cmovnzl"
    1409           3 :                 return;
    1410           2 :               case 'q':  // 1 string to match.
    1411           2 :                 Mnemonic = "cmovneq";  // "cmovnzq"
    1412           2 :                 return;
    1413           1 :               case 'w':  // 1 string to match.
    1414           1 :                 Mnemonic = "cmovnew";  // "cmovnzw"
    1415           1 :                 return;
    1416             :               }
    1417             :               break;
    1418             :             }
    1419             :             break;
    1420           0 :           case 'p':      // 6 strings to match.
    1421           0 :             switch (Mnemonic[5]) {
    1422             :             default: break;
    1423           0 :             case 'e':    // 3 strings to match.
    1424           0 :               switch (Mnemonic[6]) {
    1425             :               default: break;
    1426           0 :               case 'l':  // 1 string to match.
    1427           0 :                 Mnemonic = "cmovpl";   // "cmovpel"
    1428           0 :                 return;
    1429           0 :               case 'q':  // 1 string to match.
    1430           0 :                 Mnemonic = "cmovpq";   // "cmovpeq"
    1431           0 :                 return;
    1432           0 :               case 'w':  // 1 string to match.
    1433           0 :                 Mnemonic = "cmovpw";   // "cmovpew"
    1434           0 :                 return;
    1435             :               }
    1436             :               break;
    1437           0 :             case 'o':    // 3 strings to match.
    1438           0 :               switch (Mnemonic[6]) {
    1439             :               default: break;
    1440           0 :               case 'l':  // 1 string to match.
    1441           0 :                 Mnemonic = "cmovnpl";  // "cmovpol"
    1442           0 :                 return;
    1443           0 :               case 'q':  // 1 string to match.
    1444           0 :                 Mnemonic = "cmovnpq";  // "cmovpoq"
    1445           0 :                 return;
    1446           0 :               case 'w':  // 1 string to match.
    1447           0 :                 Mnemonic = "cmovnpw";  // "cmovpow"
    1448           0 :                 return;
    1449             :               }
    1450             :               break;
    1451             :             }
    1452             :             break;
    1453             :           }
    1454             :           break;
    1455          88 :         case 'f':        // 6 strings to match.
    1456         176 :           switch (Mnemonic[1]) {
    1457             :           default: break;
    1458          14 :           case 'c':      // 2 strings to match.
    1459          14 :             if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
    1460             :               break;
    1461          28 :             switch (Mnemonic[5]) {
    1462             :             default: break;
    1463           1 :             case 'a':    // 1 string to match.
    1464           2 :               if (Mnemonic[6] != 'e')
    1465             :                 break;
    1466           1 :               Mnemonic = "fcmovnb";    // "fcmovae"
    1467           1 :               return;
    1468          10 :             case 'n':    // 1 string to match.
    1469          20 :               if (Mnemonic[6] != 'a')
    1470             :                 break;
    1471           1 :               Mnemonic = "fcmovbe";    // "fcmovna"
    1472           1 :               return;
    1473             :             }
    1474             :             break;
    1475          38 :           case 'i':      // 1 string to match.
    1476          38 :             if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0)
    1477             :               break;
    1478           0 :             Mnemonic = "fisttpll";     // "fisttpq"
    1479           0 :             return;
    1480           6 :           case 'n':      // 2 strings to match.
    1481           6 :             if (memcmp(Mnemonic.data()+2, "st", 2) != 0)
    1482             :               break;
    1483          12 :             switch (Mnemonic[4]) {
    1484             :             default: break;
    1485           2 :             case 'c':    // 1 string to match.
    1486           2 :               if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
    1487             :                 break;
    1488           2 :               Mnemonic = "fnstcw";     // "fnstcww"
    1489           2 :               return;
    1490           2 :             case 's':    // 1 string to match.
    1491           2 :               if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
    1492             :                 break;
    1493           2 :               Mnemonic = "fnstsw";     // "fnstsww"
    1494           2 :               return;
    1495             :             }
    1496             :             break;
    1497          11 :           case 'x':      // 1 string to match.
    1498          11 :             if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0)
    1499             :               break;
    1500           1 :             Mnemonic = "fxsave64";     // "fxsaveq"
    1501           1 :             return;
    1502             :           }
    1503             :           break;
    1504          38 :         case 's':        // 1 string to match.
    1505          38 :           if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0)
    1506             :             break;
    1507           3 :           Mnemonic = "sysexitl";       // "sysexit"
    1508           3 :           return;
    1509           8 :         case 'x':        // 3 strings to match.
    1510          16 :           switch (Mnemonic[1]) {
    1511             :           default: break;
    1512           8 :           case 'r':      // 1 string to match.
    1513           8 :             if (memcmp(Mnemonic.data()+2, "storq", 5) != 0)
    1514             :               break;
    1515           0 :             Mnemonic = "xrstor64";     // "xrstorq"
    1516           0 :             return;
    1517           0 :           case 's':      // 2 strings to match.
    1518           0 :             if (memcmp(Mnemonic.data()+2, "ave", 3) != 0)
    1519             :               break;
    1520           0 :             switch (Mnemonic[5]) {
    1521             :             default: break;
    1522           0 :             case 'c':    // 1 string to match.
    1523           0 :               if (Mnemonic[6] != 'q')
    1524             :                 break;
    1525           0 :               Mnemonic = "xsavec64";   // "xsavecq"
    1526           0 :               return;
    1527           0 :             case 's':    // 1 string to match.
    1528           0 :               if (Mnemonic[6] != 'q')
    1529             :                 break;
    1530           0 :               Mnemonic = "xsaves64";   // "xsavesq"
    1531           0 :               return;
    1532             :             }
    1533             :             break;
    1534             :           }
    1535             :           break;
    1536             :         }
    1537             :         break;
    1538        3049 :       case 8:    // 15 strings to match.
    1539        6098 :         switch (Mnemonic[0]) {
    1540             :         default: break;
    1541         179 :         case 'c':        // 12 strings to match.
    1542         179 :           if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
    1543             :             break;
    1544          28 :           switch (Mnemonic[5]) {
    1545             :           default: break;
    1546           8 :           case 'a':      // 3 strings to match.
    1547          16 :             if (Mnemonic[6] != 'e')
    1548             :               break;
    1549          16 :             switch (Mnemonic[7]) {
    1550             :             default: break;
    1551           2 :             case 'l':    // 1 string to match.
    1552           2 :               Mnemonic = "cmovbl";     // "cmovnael"
    1553           2 :               return;
    1554           2 :             case 'q':    // 1 string to match.
    1555           2 :               Mnemonic = "cmovbq";     // "cmovnaeq"
    1556           2 :               return;
    1557           2 :             case 'w':    // 1 string to match.
    1558           2 :               Mnemonic = "cmovbw";     // "cmovnaew"
    1559           2 :               return;
    1560             :             }
    1561             :             break;
    1562           2 :           case 'b':      // 3 strings to match.
    1563           4 :             if (Mnemonic[6] != 'e')
    1564             :               break;
    1565           4 :             switch (Mnemonic[7]) {
    1566             :             default: break;
    1567           2 :             case 'l':    // 1 string to match.
    1568           2 :               Mnemonic = "cmoval";     // "cmovnbel"
    1569           2 :               return;
    1570           0 :             case 'q':    // 1 string to match.
    1571           0 :               Mnemonic = "cmovaq";     // "cmovnbeq"
    1572           0 :               return;
    1573           0 :             case 'w':    // 1 string to match.
    1574           0 :               Mnemonic = "cmovaw";     // "cmovnbew"
    1575           0 :               return;
    1576             :             }
    1577             :             break;
    1578           2 :           case 'g':      // 3 strings to match.
    1579           4 :             if (Mnemonic[6] != 'e')
    1580             :               break;
    1581           4 :             switch (Mnemonic[7]) {
    1582             :             default: break;
    1583           2 :             case 'l':    // 1 string to match.
    1584           2 :               Mnemonic = "cmovll";     // "cmovngel"
    1585           2 :               return;
    1586           0 :             case 'q':    // 1 string to match.
    1587           0 :               Mnemonic = "cmovlq";     // "cmovngeq"
    1588           0 :               return;
    1589           0 :             case 'w':    // 1 string to match.
    1590           0 :               Mnemonic = "cmovlw";     // "cmovngew"
    1591           0 :               return;
    1592             :             }
    1593             :             break;
    1594           2 :           case 'l':      // 3 strings to match.
    1595           4 :             if (Mnemonic[6] != 'e')
    1596             :               break;
    1597           4 :             switch (Mnemonic[7]) {
    1598             :             default: break;
    1599           2 :             case 'l':    // 1 string to match.
    1600           2 :               Mnemonic = "cmovgl";     // "cmovnlel"
    1601           2 :               return;
    1602           0 :             case 'q':    // 1 string to match.
    1603           0 :               Mnemonic = "cmovgq";     // "cmovnleq"
    1604           0 :               return;
    1605           0 :             case 'w':    // 1 string to match.
    1606           0 :               Mnemonic = "cmovgw";     // "cmovnlew"
    1607           0 :               return;
    1608             :             }
    1609             :             break;
    1610             :           }
    1611             :           break;
    1612           6 :         case 'f':        // 2 strings to match.
    1613          12 :           switch (Mnemonic[1]) {
    1614             :           default: break;
    1615           4 :           case 'c':      // 1 string to match.
    1616           4 :             if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0)
    1617             :               break;
    1618           1 :             Mnemonic = "fcmovb";       // "fcmovnae"
    1619           1 :             return;
    1620           2 :           case 'x':      // 1 string to match.
    1621           2 :             if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0)
    1622             :               break;
    1623           1 :             Mnemonic = "fxrstor64";    // "fxrstorq"
    1624           1 :             return;
    1625             :           }
    1626             :           break;
    1627          12 :         case 'x':        // 1 string to match.
    1628          12 :           if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0)
    1629             :             break;
    1630           0 :           Mnemonic = "xrstors64";      // "xrstorsq"
    1631           0 :           return;
    1632             :         }
    1633             :         break;
    1634        3972 :       case 9:    // 1 string to match.
    1635        3972 :         if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0)
    1636             :           break;
    1637           0 :         Mnemonic = "xsaveopt64";       // "xsaveoptq"
    1638           0 :         return;
    1639             :       }
    1640             :     break;
    1641       13615 :     case 1:
    1642       13615 :       switch (Mnemonic.size()) {
    1643             :       default: break;
    1644        2794 :       case 3:    // 1 string to match.
    1645        2794 :         if (memcmp(Mnemonic.data()+0, "sal", 3) != 0)
    1646             :           break;
    1647           1 :         Mnemonic = "shl";      // "sal"
    1648           1 :         return;
    1649         338 :       case 4:    // 2 strings to match.
    1650         676 :         switch (Mnemonic[0]) {
    1651             :         default: break;
    1652          17 :         case 'p':        // 1 string to match.
    1653          17 :           if (memcmp(Mnemonic.data()+1, "opa", 3) != 0)
    1654             :             break;
    1655           3 :           if ((Features & Feature_In16BitMode) == Feature_In16BitMode)       // "popa"
    1656           0 :             Mnemonic = "popaw";
    1657           3 :           else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1658           3 :             Mnemonic = "popal";
    1659             :           return;
    1660           5 :         case 'r':        // 1 string to match.
    1661           5 :           if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
    1662             :             break;
    1663           0 :           Mnemonic = "ret";    // "retn"
    1664           0 :           return;
    1665             :         }
    1666             :         break;
    1667         292 :       case 5:    // 4 strings to match.
    1668         584 :         switch (Mnemonic[0]) {
    1669             :         default: break;
    1670          36 :         case 'c':        // 2 strings to match.
    1671          36 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1672             :             break;
    1673           4 :           switch (Mnemonic[4]) {
    1674             :           default: break;
    1675           1 :           case 'c':      // 1 string to match.
    1676           1 :             Mnemonic = "cmovb";        // "cmovc"
    1677           1 :             return;
    1678           1 :           case 'z':      // 1 string to match.
    1679           1 :             Mnemonic = "cmove";        // "cmovz"
    1680           1 :             return;
    1681             :           }
    1682             :           break;
    1683           6 :         case 'p':        // 2 strings to match.
    1684          12 :           switch (Mnemonic[1]) {
    1685             :           default: break;
    1686           3 :           case 'o':      // 1 string to match.
    1687           3 :             if (memcmp(Mnemonic.data()+2, "pad", 3) != 0)
    1688             :               break;
    1689           3 :             if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)   // "popad"
    1690           3 :               Mnemonic = "popal";
    1691             :             return;
    1692           3 :           case 'u':      // 1 string to match.
    1693           3 :             if (memcmp(Mnemonic.data()+2, "sha", 3) != 0)
    1694             :               break;
    1695           3 :             if ((Features & Feature_In16BitMode) == Feature_In16BitMode)     // "pusha"
    1696           0 :               Mnemonic = "pushaw";
    1697           3 :             else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
    1698           3 :               Mnemonic = "pushal";
    1699             :             return;
    1700             :           }
    1701             :           break;
    1702             :         }
    1703             :         break;
    1704        1949 :       case 6:    // 9 strings to match.
    1705        3898 :         switch (Mnemonic[0]) {
    1706             :         default: break;
    1707          10 :         case 'c':        // 8 strings to match.
    1708          10 :           if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
    1709             :             break;
    1710          16 :           switch (Mnemonic[4]) {
    1711             :           default: break;
    1712           6 :           case 'n':      // 6 strings to match.
    1713          12 :             switch (Mnemonic[5]) {
    1714             :             default: break;
    1715           1 :             case 'a':    // 1 string to match.
    1716           1 :               Mnemonic = "cmovbe";     // "cmovna"
    1717           1 :               return;
    1718           1 :             case 'b':    // 1 string to match.
    1719           1 :               Mnemonic = "cmovae";     // "cmovnb"
    1720           1 :               return;
    1721           1 :             case 'c':    // 1 string to match.
    1722           1 :               Mnemonic = "cmovae";     // "cmovnc"
    1723           1 :               return;
    1724           1 :             case 'g':    // 1 string to match.
    1725           1 :               Mnemonic = "cmovle";     // "cmovng"
    1726           1 :               return;
    1727           1 :             case 'l':    // 1 string to match.
    1728           1 :               Mnemonic = "cmovge";     // "cmovnl"
    1729           1 :               return;
    1730           1 :             case 'z':    // 1 string to match.
    1731           1 :               Mnemonic = "cmovne";     // "cmovnz"
    1732           1 :               return;
    1733             :             }
    1734             :             break;
    1735           2 :           case 'p':      // 2 strings to match.
    1736           4 :             switch (Mnemonic[5]) {
    1737             :             default: break;
    1738           1 :             case 'e':    // 1 string to match.
    1739           1 :               Mnemonic = "cmovp";      // "cmovpe"
    1740           1 :               return;
    1741           1 :             case 'o':    // 1 string to match.
    1742           1 :               Mnemonic = "cmovnp";     // "cmovpo"
    1743           1 :               return;
    1744             :             }
    1745             :             break;
    1746             :           }
    1747             :           break;
    1748           4 :         case 'p':        // 1 string to match.
    1749           4 :           if (memcmp(Mnemonic.data()+1, "ushad", 5) != 0)
    1750             :             break;
    1751           3 :           if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode)     // "pushad"
    1752           3 :             Mnemonic = "pushal";
    1753             :           return;
    1754             :         }
    1755             :         break;
    1756        1426 :       case 7:    // 6 strings to match.
    1757        2852 :         switch (Mnemonic[0]) {
    1758             :         default: break;
    1759           1 :         case 'a':        // 1 string to match.
    1760           1 :           if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0)
    1761             :             break;
    1762           1 :           Mnemonic = "xacquire";       // "acquire"
    1763           1 :           return;
    1764           4 :         case 'c':        // 4 strings to match.
    1765           4 :           if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
    1766             :             break;
    1767           8 :           switch (Mnemonic[5]) {
    1768             :           default: break;
    1769           1 :           case 'a':      // 1 string to match.
    1770           2 :             if (Mnemonic[6] != 'e')
    1771             :               break;
    1772           1 :             Mnemonic = "cmovb";        // "cmovnae"
    1773           1 :             return;
    1774           1 :           case 'b':      // 1 string to match.
    1775           2 :             if (Mnemonic[6] != 'e')
    1776             :               break;
    1777           1 :             Mnemonic = "cmova";        // "cmovnbe"
    1778           1 :             return;
    1779           1 :           case 'g':      // 1 string to match.
    1780           2 :             if (Mnemonic[6] != 'e')
    1781             :               break;
    1782           1 :             Mnemonic = "cmovl";        // "cmovnge"
    1783           1 :             return;
    1784           1 :           case 'l':      // 1 string to match.
    1785           2 :             if (Mnemonic[6] != 'e')
    1786             :               break;
    1787           1 :             Mnemonic = "cmovg";        // "cmovnle"
    1788           1 :             return;
    1789             :           }
    1790             :           break;
    1791           1 :         case 'r':        // 1 string to match.
    1792           1 :           if (memcmp(Mnemonic.data()+1, "elease", 6) != 0)
    1793             :             break;
    1794           1 :           Mnemonic = "xrelease";       // "release"
    1795           1 :           return;
    1796             :         }
    1797             :         break;
    1798             :       }
    1799             :     break;
    1800             :   }
    1801       70183 :   switch (Mnemonic.size()) {
    1802             :   default: break;
    1803         165 :   case 2:        // 2 strings to match.
    1804         330 :     if (Mnemonic[0] != 'j')
    1805             :       break;
    1806         258 :     switch (Mnemonic[1]) {
    1807             :     default: break;
    1808          10 :     case 'c':    // 1 string to match.
    1809          10 :       Mnemonic = "jb";         // "jc"
    1810          10 :       return;
    1811          18 :     case 'z':    // 1 string to match.
    1812          18 :       Mnemonic = "je";         // "jz"
    1813          18 :       return;
    1814             :     }
    1815             :     break;
    1816       10135 :   case 3:        // 8 strings to match.
    1817       20270 :     if (Mnemonic[0] != 'j')
    1818             :       break;
    1819         552 :     switch (Mnemonic[1]) {
    1820             :     default: break;
    1821          67 :     case 'n':    // 6 strings to match.
    1822         134 :       switch (Mnemonic[2]) {
    1823             :       default: break;
    1824           1 :       case 'a':  // 1 string to match.
    1825           1 :         Mnemonic = "jbe";      // "jna"
    1826           1 :         return;
    1827           1 :       case 'b':  // 1 string to match.
    1828           1 :         Mnemonic = "jae";      // "jnb"
    1829           1 :         return;
    1830           1 :       case 'c':  // 1 string to match.
    1831           1 :         Mnemonic = "jae";      // "jnc"
    1832           1 :         return;
    1833           1 :       case 'g':  // 1 string to match.
    1834           1 :         Mnemonic = "jle";      // "jng"
    1835           1 :         return;
    1836           1 :       case 'l':  // 1 string to match.
    1837           1 :         Mnemonic = "jge";      // "jnl"
    1838           1 :         return;
    1839          10 :       case 'z':  // 1 string to match.
    1840          10 :         Mnemonic = "jne";      // "jnz"
    1841          10 :         return;
    1842             :       }
    1843             :       break;
    1844           2 :     case 'p':    // 2 strings to match.
    1845           4 :       switch (Mnemonic[2]) {
    1846             :       default: break;
    1847           1 :       case 'e':  // 1 string to match.
    1848           1 :         Mnemonic = "jp";       // "jpe"
    1849           1 :         return;
    1850           1 :       case 'o':  // 1 string to match.
    1851           1 :         Mnemonic = "jnp";      // "jpo"
    1852           1 :         return;
    1853             :       }
    1854             :       break;
    1855             :     }
    1856             :     break;
    1857       22865 :   case 4:        // 8 strings to match.
    1858       45730 :     switch (Mnemonic[0]) {
    1859             :     default: break;
    1860          43 :     case 'j':    // 4 strings to match.
    1861          86 :       if (Mnemonic[1] != 'n')
    1862             :         break;
    1863           8 :       switch (Mnemonic[2]) {
    1864             :       default: break;
    1865           1 :       case 'a':  // 1 string to match.
    1866           2 :         if (Mnemonic[3] != 'e')
    1867             :           break;
    1868           1 :         Mnemonic = "jb";       // "jnae"
    1869           1 :         return;
    1870           1 :       case 'b':  // 1 string to match.
    1871           2 :         if (Mnemonic[3] != 'e')
    1872             :           break;
    1873           1 :         Mnemonic = "ja";       // "jnbe"
    1874           1 :         return;
    1875           1 :       case 'g':  // 1 string to match.
    1876           2 :         if (Mnemonic[3] != 'e')
    1877             :           break;
    1878           1 :         Mnemonic = "jl";       // "jnge"
    1879           1 :         return;
    1880           1 :       case 'l':  // 1 string to match.
    1881           2 :         if (Mnemonic[3] != 'e')
    1882             :           break;
    1883           1 :         Mnemonic = "jg";       // "jnle"
    1884           1 :         return;
    1885             :       }
    1886             :       break;
    1887         311 :     case 'r':    // 2 strings to match.
    1888         311 :       if (memcmp(Mnemonic.data()+1, "ep", 2) != 0)
    1889             :         break;
    1890           8 :       switch (Mnemonic[3]) {
    1891             :       default: break;
    1892           2 :       case 'e':  // 1 string to match.
    1893           2 :         Mnemonic = "rep";      // "repe"
    1894           2 :         return;
    1895           2 :       case 'z':  // 1 string to match.
    1896           2 :         Mnemonic = "rep";      // "repz"
    1897           2 :         return;
    1898             :       }
    1899             :       break;
    1900         602 :     case 's':    // 2 strings to match.
    1901         602 :       if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
    1902             :         break;
    1903         180 :       switch (Mnemonic[3]) {
    1904             :       default: break;
    1905           6 :       case 'c':  // 1 string to match.
    1906           6 :         Mnemonic = "setb";     // "setc"
    1907           6 :         return;
    1908           2 :       case 'z':  // 1 string to match.
    1909           2 :         Mnemonic = "sete";     // "setz"
    1910           2 :         return;
    1911             :       }
    1912             :       break;
    1913             :     }
    1914             :     break;
    1915        3851 :   case 5:        // 11 strings to match.
    1916        7702 :     switch (Mnemonic[0]) {
    1917             :     default: break;
    1918         195 :     case 'f':    // 1 string to match.
    1919         195 :       if (memcmp(Mnemonic.data()+1, "wait", 4) != 0)
    1920             :         break;
    1921           3 :       Mnemonic = "wait";       // "fwait"
    1922           3 :       return;
    1923         161 :     case 'l':    // 1 string to match.
    1924         161 :       if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0)
    1925             :         break;
    1926          11 :       Mnemonic = "loope";      // "loopz"
    1927          11 :       return;
    1928          56 :     case 'r':    // 1 string to match.
    1929          56 :       if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0)
    1930             :         break;
    1931           2 :       Mnemonic = "repne";      // "repnz"
    1932           2 :       return;
    1933         293 :     case 's':    // 8 strings to match.
    1934         293 :       if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
    1935             :         break;
    1936         212 :       switch (Mnemonic[3]) {
    1937             :       default: break;
    1938          60 :       case 'n':  // 6 strings to match.
    1939         120 :         switch (Mnemonic[4]) {
    1940             :         default: break;
    1941           3 :         case 'a':        // 1 string to match.
    1942           3 :           Mnemonic = "setbe";  // "setna"
    1943           3 :           return;
    1944           3 :         case 'b':        // 1 string to match.
    1945           3 :           Mnemonic = "setae";  // "setnb"
    1946           3 :           return;
    1947           3 :         case 'c':        // 1 string to match.
    1948           3 :           Mnemonic = "setae";  // "setnc"
    1949           3 :           return;
    1950           3 :         case 'g':        // 1 string to match.
    1951           3 :           Mnemonic = "setle";  // "setng"
    1952           3 :           return;
    1953           3 :         case 'l':        // 1 string to match.
    1954           3 :           Mnemonic = "setge";  // "setnl"
    1955           3 :           return;
    1956           2 :         case 'z':        // 1 string to match.
    1957           2 :           Mnemonic = "setne";  // "setnz"
    1958           2 :           return;
    1959             :         }
    1960             :         break;
    1961           6 :       case 'p':  // 2 strings to match.
    1962          12 :         switch (Mnemonic[4]) {
    1963             :         default: break;
    1964           3 :         case 'e':        // 1 string to match.
    1965           3 :           Mnemonic = "setp";   // "setpe"
    1966           3 :           return;
    1967           3 :         case 'o':        // 1 string to match.
    1968           3 :           Mnemonic = "setnp";  // "setpo"
    1969           3 :           return;
    1970             :         }
    1971             :         break;
    1972             :       }
    1973             :       break;
    1974             :     }
    1975             :     break;
    1976        6722 :   case 6:        // 6 strings to match.
    1977       13444 :     switch (Mnemonic[0]) {
    1978             :     default: break;
    1979         227 :     case 'f':    // 1 string to match.
    1980         227 :       if (memcmp(Mnemonic.data()+1, "comip", 5) != 0)
    1981             :         break;
    1982           3 :       Mnemonic = "fcompi";     // "fcomip"
    1983           3 :       return;
    1984          64 :     case 'l':    // 1 string to match.
    1985          64 :       if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0)
    1986             :         break;
    1987          11 :       Mnemonic = "loopne";     // "loopnz"
    1988          11 :       return;
    1989         101 :     case 's':    // 4 strings to match.
    1990         101 :       if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
    1991             :         break;
    1992          28 :       switch (Mnemonic[4]) {
    1993             :       default: break;
    1994           5 :       case 'a':  // 1 string to match.
    1995          10 :         if (Mnemonic[5] != 'e')
    1996             :           break;
    1997           5 :         Mnemonic = "setb";     // "setnae"
    1998           5 :         return;
    1999           3 :       case 'b':  // 1 string to match.
    2000           6 :         if (Mnemonic[5] != 'e')
    2001             :           break;
    2002           3 :         Mnemonic = "seta";     // "setnbe"
    2003           3 :         return;
    2004           3 :       case 'g':  // 1 string to match.
    2005           6 :         if (Mnemonic[5] != 'e')
    2006             :           break;
    2007           3 :         Mnemonic = "setl";     // "setnge"
    2008           3 :         return;
    2009           3 :       case 'l':  // 1 string to match.
    2010           6 :         if (Mnemonic[5] != 'e')
    2011             :           break;
    2012           3 :         Mnemonic = "setg";     // "setnle"
    2013           3 :         return;
    2014             :       }
    2015             :       break;
    2016             :     }
    2017             :     break;
    2018        5756 :   case 7:        // 1 string to match.
    2019        5756 :     if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0)
    2020             :       break;
    2021           3 :     Mnemonic = "fucompi";      // "fucomip"
    2022           3 :     return;
    2023             :   }
    2024             : }
    2025             : 
    2026             : namespace {
    2027             : enum OperatorConversionKind {
    2028             :   CVT_Done,
    2029             :   CVT_Reg,
    2030             :   CVT_Tied,
    2031             :   CVT_imm_95_10,
    2032             :   CVT_95_addImmOperands,
    2033             :   CVT_regAX,
    2034             :   CVT_regEAX,
    2035             :   CVT_regRAX,
    2036             :   CVT_95_Reg,
    2037             :   CVT_95_addMemOperands,
    2038             :   CVT_95_addAbsMemOperands,
    2039             :   CVT_95_addDstIdxOperands,
    2040             :   CVT_95_addSrcIdxOperands,
    2041             :   CVT_95_addGR32orGR64Operands,
    2042             :   CVT_regST1,
    2043             :   CVT_regST0,
    2044             :   CVT_95_addMemOffsOperands,
    2045             :   CVT_imm_95_17,
    2046             :   CVT_imm_95_1,
    2047             :   CVT_imm_95_16,
    2048             :   CVT_imm_95_0,
    2049             :   CVT_95_addAVX512RCOperands,
    2050             :   CVT_NUM_CONVERTERS
    2051             : };
    2052             : 
    2053             : enum InstructionConversionKind {
    2054             :   Convert_NoOperands,
    2055             :   Convert__imm_95_10,
    2056             :   Convert__Imm1_0,
    2057             :   Convert__Imm1_1,
    2058             :   Convert__regAX__Tie0__ImmSExti16i81_1,
    2059             :   Convert__regEAX__Tie0__ImmSExti32i81_1,
    2060             :   Convert__regRAX__Tie0__ImmSExti64i81_1,
    2061             :   Convert__ImmSExti64i321_1,
    2062             :   Convert__Reg1_0__Tie0__Reg1_1,
    2063             :   Convert__Reg1_0__Tie0__ImmSExti16i81_1,
    2064             :   Convert__Reg1_0__Tie0__Imm1_1,
    2065             :   Convert__Reg1_0__Tie0__Mem165_1,
    2066             :   Convert__Reg1_0__Tie0__ImmSExti32i81_1,
    2067             :   Convert__Reg1_0__Tie0__Mem325_1,
    2068             :   Convert__Reg1_0__Tie0__ImmSExti64i81_1,
    2069             :   Convert__Reg1_0__Tie0__ImmSExti64i321_1,
    2070             :   Convert__Reg1_0__Tie0__Mem645_1,
    2071             :   Convert__Reg1_0__Tie0__Mem85_1,
    2072             :   Convert__Mem165_0__Reg1_1,
    2073             :   Convert__Mem165_0__ImmSExti16i81_1,
    2074             :   Convert__Mem165_0__Imm1_1,
    2075             :   Convert__Mem325_0__Reg1_1,
    2076             :   Convert__Mem325_0__ImmSExti32i81_1,
    2077             :   Convert__Mem325_0__Imm1_1,
    2078             :   Convert__Mem645_0__Reg1_1,
    2079             :   Convert__Mem645_0__ImmSExti64i81_1,
    2080             :   Convert__Mem645_0__ImmSExti64i321_1,
    2081             :   Convert__Mem85_0__Reg1_1,
    2082             :   Convert__Mem85_0__Imm1_1,
    2083             :   Convert__Reg1_1__Tie0__Reg1_0,
    2084             :   Convert__Mem85_1__Reg1_0,
    2085             :   Convert__Reg1_1__Tie0__Imm1_0,
    2086             :   Convert__Mem85_1__Imm1_0,
    2087             :   Convert__Reg1_1__Tie0__Mem85_0,
    2088             :   Convert__Mem325_1__Reg1_0,
    2089             :   Convert__regEAX__Tie0__ImmSExti32i81_0,
    2090             :   Convert__Reg1_1__Tie0__ImmSExti32i81_0,
    2091             :   Convert__Mem325_1__ImmSExti32i81_0,
    2092             :   Convert__Mem325_1__Imm1_0,
    2093             :   Convert__Reg1_1__Tie0__Mem325_0,
    2094             :   Convert__Mem645_1__Reg1_0,
    2095             :   Convert__regRAX__Tie0__ImmSExti64i81_0,
    2096             :   Convert__Reg1_1__Tie0__ImmSExti64i81_0,
    2097             :   Convert__Mem645_1__ImmSExti64i81_0,
    2098             :   Convert__ImmSExti64i321_0,
    2099             :   Convert__Reg1_1__Tie0__ImmSExti64i321_0,
    2100             :   Convert__Mem645_1__ImmSExti64i321_0,
    2101             :   Convert__Reg1_1__Tie0__Mem645_0,
    2102             :   Convert__Mem165_1__Reg1_0,
    2103             :   Convert__regAX__Tie0__ImmSExti16i81_0,
    2104             :   Convert__Reg1_1__Tie0__ImmSExti16i81_0,
    2105             :   Convert__Mem165_1__ImmSExti16i81_0,
    2106             :   Convert__Mem165_1__Imm1_0,
    2107             :   Convert__Reg1_1__Tie0__Mem165_0,
    2108             :   Convert__Reg1_0__Tie0__Mem1285_1,
    2109             :   Convert__Reg1_1__Tie0__Mem1285_0,
    2110             :   Convert__Reg1_0__Reg1_1,
    2111             :   Convert__Reg1_0__Mem325_1,
    2112             :   Convert__Reg1_0__Mem645_1,
    2113             :   Convert__Reg1_1__Reg1_0,
    2114             :   Convert__Reg1_1__Mem325_0,
    2115             :   Convert__Reg1_1__Mem645_0,
    2116             :   Convert__Reg1_0__Mem1285_1,
    2117             :   Convert__Reg1_1__Mem1285_0,
    2118             :   Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
    2119             :   Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
    2120             :   Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2121             :   Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2122             :   Convert__Reg1_0__Reg1_1__Reg1_2,
    2123             :   Convert__Reg1_0__Reg1_1__Mem325_2,
    2124             :   Convert__Reg1_0__Reg1_1__Mem645_2,
    2125             :   Convert__Reg1_2__Reg1_1__Reg1_0,
    2126             :   Convert__Reg1_2__Reg1_1__Mem325_0,
    2127             :   Convert__Reg1_2__Reg1_1__Mem645_0,
    2128             :   Convert__Reg1_0__Reg1_1__Imm1_2,
    2129             :   Convert__Reg1_0__Mem325_1__Reg1_2,
    2130             :   Convert__Reg1_0__Mem325_1__Imm1_2,
    2131             :   Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
    2132             :   Convert__Reg1_0__Mem645_1__Reg1_2,
    2133             :   Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
    2134             :   Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
    2135             :   Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
    2136             :   Convert__Reg1_2__Reg1_1__Imm1_0,
    2137             :   Convert__Reg1_2__Mem325_1__Imm1_0,
    2138             :   Convert__Reg1_2__Mem325_1__Reg1_0,
    2139             :   Convert__Reg1_2__Mem645_1__Reg1_0,
    2140             :   Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2,
    2141             :   Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2,
    2142             :   Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0,
    2143             :   Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0,
    2144             :   Convert__Reg1_2__Tie0__Reg1_1,
    2145             :   Convert__Reg1_2__Tie0__Mem1285_1,
    2146             :   Convert__Mem1285_1__Reg1_0,
    2147             :   Convert__Mem1285_0__Reg1_1,
    2148             :   Convert__Reg1_0__Mem165_1,
    2149             :   Convert__Reg1_1__Mem165_0,
    2150             :   Convert__Reg1_0__Tie0,
    2151             :   Convert__Reg1_0__ImmSExti16i81_1,
    2152             :   Convert__Reg1_0__ImmSExti32i81_1,
    2153             :   Convert__Reg1_0__ImmSExti64i81_1,
    2154             :   Convert__Reg1_1__ImmSExti32i81_0,
    2155             :   Convert__Reg1_1__ImmSExti64i81_0,
    2156             :   Convert__Reg1_1__ImmSExti16i81_0,
    2157             :   Convert__Reg1_0,
    2158             :   Convert__AbsMem1_0,
    2159             :   Convert__Mem165_0,
    2160             :   Convert__Mem325_0,
    2161             :   Convert__Mem645_0,
    2162             :   Convert__Mem5_0,
    2163             :   Convert__Mem165_1,
    2164             :   Convert__Mem325_1,
    2165             :   Convert__Mem645_1,
    2166             :   Convert__Imm1_1__Imm1_0,
    2167             :   Convert__Reg1_1,
    2168             :   Convert__Mem85_0,
    2169             :   Convert__Reg1_0__Tie0__Reg1_0,
    2170             :   Convert__regAX__ImmSExti16i81_1,
    2171             :   Convert__regEAX__ImmSExti32i81_1,
    2172             :   Convert__regRAX__ImmSExti64i81_1,
    2173             :   Convert__Reg1_0__Imm1_1,
    2174             :   Convert__Reg1_0__ImmSExti64i321_1,
    2175             :   Convert__Reg1_0__Mem85_1,
    2176             :   Convert__Reg1_3__Tie0__Reg1_2__Imm1_0,
    2177             :   Convert__Reg1_2__Tie0__Reg1_3__Imm1_0,
    2178             :   Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0,
    2179             :   Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0,
    2180             :   Convert__Reg1_2__Tie0__Mem645_3__Imm1_0,
    2181             :   Convert__Reg1_3__Tie0__Mem645_2__Imm1_0,
    2182             :   Convert__Reg1_2__Tie0__Mem325_3__Imm1_0,
    2183             :   Convert__Reg1_3__Tie0__Mem325_2__Imm1_0,
    2184             :   Convert__Reg1_1__Imm1_0,
    2185             :   Convert__Reg1_1__Mem85_0,
    2186             :   Convert__regEAX__ImmSExti32i81_0,
    2187             :   Convert__regRAX__ImmSExti64i81_0,
    2188             :   Convert__Reg1_1__ImmSExti64i321_0,
    2189             :   Convert__DstIdx161_0__SrcIdx162_1,
    2190             :   Convert__DstIdx321_0__SrcIdx322_1,
    2191             :   Convert__DstIdx641_0__SrcIdx642_1,
    2192             :   Convert__DstIdx81_0__SrcIdx82_1,
    2193             :   Convert__DstIdx161_1__SrcIdx162_0,
    2194             :   Convert__DstIdx321_1__SrcIdx322_0,
    2195             :   Convert__DstIdx641_1__SrcIdx642_0,
    2196             :   Convert__DstIdx81_1__SrcIdx82_0,
    2197             :   Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2,
    2198             :   Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0,
    2199             :   Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2,
    2200             :   Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0,
    2201             :   Convert__regAX__ImmSExti16i81_0,
    2202             :   Convert__Mem1285_0,
    2203             :   Convert__Mem85_1,
    2204             :   Convert__Imm1_0__Imm1_1,
    2205             :   Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
    2206             :   Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
    2207             :   Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
    2208             :   Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
    2209             :   Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2,
    2210             :   Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0,
    2211             :   Convert__regST1,
    2212             :   Convert__regST0,
    2213             :   Convert__Mem805_0,
    2214             :   Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
    2215             :   Convert__Reg1_0__Reg1_0__Imm1_1,
    2216             :   Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
    2217             :   Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
    2218             :   Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
    2219             :   Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
    2220             :   Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
    2221             :   Convert__Reg1_0__Mem165_1__Imm1_2,
    2222             :   Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
    2223             :   Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
    2224             :   Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
    2225             :   Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
    2226             :   Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
    2227             :   Convert__Reg1_1__Reg1_1__Imm1_0,
    2228             :   Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
    2229             :   Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
    2230             :   Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
    2231             :   Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
    2232             :   Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
    2233             :   Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
    2234             :   Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
    2235             :   Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
    2236             :   Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
    2237             :   Convert__Reg1_2__Mem165_1__Imm1_0,
    2238             :   Convert__ImmUnsignedi81_1,
    2239             :   Convert__ImmUnsignedi81_0,
    2240             :   Convert__DstIdx161_1,
    2241             :   Convert__DstIdx321_1,
    2242             :   Convert__DstIdx81_1,
    2243             :   Convert__DstIdx161_0,
    2244             :   Convert__DstIdx321_0,
    2245             :   Convert__DstIdx81_0,
    2246             :   Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
    2247             :   Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
    2248             :   Convert__Mem5_1,
    2249             :   Convert__Reg1_0__Mem5_1,
    2250             :   Convert__Reg1_1__Mem5_0,
    2251             :   Convert__SrcIdx162_0,
    2252             :   Convert__SrcIdx322_0,
    2253             :   Convert__SrcIdx642_0,
    2254             :   Convert__SrcIdx82_0,
    2255             :   Convert__SrcIdx82_1,
    2256             :   Convert__SrcIdx162_1,
    2257             :   Convert__SrcIdx322_1,
    2258             :   Convert__SrcIdx642_1,
    2259             :   Convert__MemOffs16_82_1,
    2260             :   Convert__MemOffs32_82_1,
    2261             :   Convert__MemOffs16_162_1,
    2262             :   Convert__MemOffs32_162_1,
    2263             :   Convert__MemOffs16_322_1,
    2264             :   Convert__MemOffs32_322_1,
    2265             :   Convert__MemOffs32_642_1,
    2266             :   Convert__MemOffs16_162_0,
    2267             :   Convert__MemOffs16_322_0,
    2268             :   Convert__MemOffs16_82_0,
    2269             :   Convert__MemOffs32_162_0,
    2270             :   Convert__MemOffs32_322_0,
    2271             :   Convert__MemOffs32_642_0,
    2272             :   Convert__MemOffs32_82_0,
    2273             :   Convert__MemOffs64_82_1,
    2274             :   Convert__MemOffs64_162_1,
    2275             :   Convert__MemOffs64_322_1,
    2276             :   Convert__MemOffs64_642_1,
    2277             :   Convert__MemOffs64_162_0,
    2278             :   Convert__MemOffs64_322_0,
    2279             :   Convert__MemOffs64_642_0,
    2280             :   Convert__MemOffs64_82_0,
    2281             :   Convert__GR32orGR641_1__Reg1_0,
    2282             :   Convert__GR32orGR641_0__Reg1_1,
    2283             :   Convert__Reg1_1__Tie0__Reg1_0__imm_95_17,
    2284             :   Convert__Reg1_0__Tie0__Reg1_1__imm_95_17,
    2285             :   Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17,
    2286             :   Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17,
    2287             :   Convert__Reg1_1__Tie0__Reg1_0__imm_95_1,
    2288             :   Convert__Reg1_0__Tie0__Reg1_1__imm_95_1,
    2289             :   Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1,
    2290             :   Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1,
    2291             :   Convert__Reg1_1__Tie0__Reg1_0__imm_95_16,
    2292             :   Convert__Reg1_0__Tie0__Reg1_1__imm_95_16,
    2293             :   Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16,
    2294             :   Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16,
    2295             :   Convert__Reg1_1__Tie0__Reg1_0__imm_95_0,
    2296             :   Convert__Reg1_0__Tie0__Reg1_1__imm_95_0,
    2297             :   Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0,
    2298             :   Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0,
    2299             :   Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
    2300             :   Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
    2301             :   Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
    2302             :   Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
    2303             :   Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
    2304             :   Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
    2305             :   Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2,
    2306             :   Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2,
    2307             :   Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0,
    2308             :   Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0,
    2309             :   Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2,
    2310             :   Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0,
    2311             :   Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
    2312             :   Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2313             :   Convert__Reg1_0__Tie0__ImmUnsignedi81_1,
    2314             :   Convert__Reg1_1__Tie0__ImmUnsignedi81_0,
    2315             :   Convert__ImmSExti64i81_0,
    2316             :   Convert__ImmSExti16i81_0,
    2317             :   Convert__ImmSExti32i81_0,
    2318             :   Convert__Mem165_0__ImmUnsignedi81_1,
    2319             :   Convert__Mem325_0__ImmUnsignedi81_1,
    2320             :   Convert__Mem645_0__ImmUnsignedi81_1,
    2321             :   Convert__Mem85_0__ImmUnsignedi81_1,
    2322             :   Convert__Reg1_1__Tie0,
    2323             :   Convert__Mem85_1__ImmUnsignedi81_0,
    2324             :   Convert__Mem325_1__ImmUnsignedi81_0,
    2325             :   Convert__Mem645_1__ImmUnsignedi81_0,
    2326             :   Convert__Mem165_1__ImmUnsignedi81_0,
    2327             :   Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
    2328             :   Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2329             :   Convert__DstIdx641_0,
    2330             :   Convert__DstIdx641_1,
    2331             :   Convert__Mem325_2__Reg1_1,
    2332             :   Convert__Mem645_2__Reg1_1,
    2333             :   Convert__Mem165_2__Reg1_1,
    2334             :   Convert__Reg1_0__Reg1_1__Mem1285_2,
    2335             :   Convert__Reg1_0__Reg1_1__Mem2565_2,
    2336             :   Convert__Reg1_0__Reg1_1__Mem5125_2,
    2337             :   Convert__Reg1_2__Reg1_1__Mem1285_0,
    2338             :   Convert__Reg1_2__Reg1_1__Mem2565_0,
    2339             :   Convert__Reg1_2__Reg1_1__Mem5125_0,
    2340             :   Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
    2341             :   Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
    2342             :   Convert__Reg1_3__Reg1_2__Mem645_0,
    2343             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5,
    2344             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5,
    2345             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0,
    2346             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5,
    2347             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5,
    2348             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0,
    2349             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0,
    2350             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0,
    2351             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
    2352             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
    2353             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5,
    2354             :   Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
    2355             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
    2356             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
    2357             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
    2358             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
    2359             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
    2360             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
    2361             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
    2362             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0,
    2363             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
    2364             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
    2365             :   Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
    2366             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
    2367             :   Convert__Reg1_3__Reg1_2__Mem325_0,
    2368             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5,
    2369             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0,
    2370             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
    2371             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
    2372             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0,
    2373             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0,
    2374             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0,
    2375             :   Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0,
    2376             :   Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
    2377             :   Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
    2378             :   Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
    2379             :   Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
    2380             :   Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2381             :   Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2382             :   Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2383             :   Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2384             :   Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
    2385             :   Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2386             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
    2387             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
    2388             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
    2389             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
    2390             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2391             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2392             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2393             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2394             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
    2395             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
    2396             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
    2397             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
    2398             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
    2399             :   Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2400             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2401             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2402             :   Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2403             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2404             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
    2405             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2406             :   Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
    2407             :   Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2408             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
    2409             :   Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2410             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
    2411             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2412             :   Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
    2413             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
    2414             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
    2415             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
    2416             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
    2417             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
    2418             :   Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
    2419             :   Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
    2420             :   Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
    2421             :   Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
    2422             :   Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
    2423             :   Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
    2424             :   Convert__Reg1_1__Tie0__Reg1_3__Reg1_0,
    2425             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4,
    2426             :   Convert__Reg1_0__Tie0__Reg1_2__Mem645_4,
    2427             :   Convert__Reg1_1__Tie0__Reg1_3__Mem645_0,
    2428             :   Convert__Reg1_1__Reg1_3__Reg1_0,
    2429             :   Convert__Reg1_0__Reg1_2__Reg1_5,
    2430             :   Convert__Reg1_0__Reg1_2__Mem645_5,
    2431             :   Convert__Reg1_1__Reg1_3__Mem645_0,
    2432             :   Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4,
    2433             :   Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0,
    2434             :   Convert__Reg1_0__Reg1_2__Mem1285_5,
    2435             :   Convert__Reg1_1__Reg1_3__Mem1285_0,
    2436             :   Convert__Reg1_0__Mem2565_1,
    2437             :   Convert__Reg1_1__Mem2565_0,
    2438             :   Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4,
    2439             :   Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0,
    2440             :   Convert__Reg1_0__Reg1_2__Mem2565_5,
    2441             :   Convert__Reg1_1__Reg1_3__Mem2565_0,
    2442             :   Convert__Reg1_0__Tie0__Reg1_2__Mem325_4,
    2443             :   Convert__Reg1_1__Tie0__Reg1_3__Mem325_0,
    2444             :   Convert__Reg1_0__Reg1_2__Mem325_5,
    2445             :   Convert__Reg1_1__Reg1_3__Mem325_0,
    2446             :   Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0,
    2447             :   Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0,
    2448             :   Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0,
    2449             :   Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0,
    2450             :   Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0,
    2451             :   Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0,
    2452             :   Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0,
    2453             :   Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0,
    2454             :   Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0,
    2455             :   Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0,
    2456             :   Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0,
    2457             :   Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0,
    2458             :   Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0,
    2459             :   Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0,
    2460             :   Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0,
    2461             :   Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0,
    2462             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0,
    2463             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0,
    2464             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0,
    2465             :   Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0,
    2466             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0,
    2467             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0,
    2468             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0,
    2469             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0,
    2470             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0,
    2471             :   Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0,
    2472             :   Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0,
    2473             :   Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0,
    2474             :   Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0,
    2475             :   Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0,
    2476             :   Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
    2477             :   Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2478             :   Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
    2479             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
    2480             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
    2481             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
    2482             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
    2483             :   Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
    2484             :   Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2485             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
    2486             :   Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
    2487             :   Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2488             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
    2489             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2490             :   Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
    2491             :   Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2492             :   Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
    2493             :   Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2494             :   Convert__Reg1_2__Reg1_1,
    2495             :   Convert__Mem2565_1__Reg1_0,
    2496             :   Convert__Mem5125_1__Reg1_0,
    2497             :   Convert__Mem2565_0__Reg1_1,
    2498             :   Convert__Mem5125_0__Reg1_1,
    2499             :   Convert__Mem1285_1__Reg1_3__Reg1_0,
    2500             :   Convert__Mem2565_1__Reg1_3__Reg1_0,
    2501             :   Convert__Mem5125_1__Reg1_3__Reg1_0,
    2502             :   Convert__Mem1285_0__Reg1_2__Reg1_4,
    2503             :   Convert__Mem2565_0__Reg1_2__Reg1_4,
    2504             :   Convert__Mem5125_0__Reg1_2__Reg1_4,
    2505             :   Convert__Reg1_2__Mem325_0,
    2506             :   Convert__Reg1_2__Tie0__Reg1_4__Mem325_0,
    2507             :   Convert__Reg1_2__Reg1_4__Mem325_0,
    2508             :   Convert__Reg1_0__Mem5125_1,
    2509             :   Convert__Reg1_1__Mem5125_0,
    2510             :   Convert__Reg1_0__Reg1_1__AVX512RC1_2,
    2511             :   Convert__Reg1_2__Reg1_1__AVX512RC1_0,
    2512             :   Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4,
    2513             :   Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0,
    2514             :   Convert__Reg1_0__Reg1_2__Mem5125_5,
    2515             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5,
    2516             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0,
    2517             :   Convert__Reg1_1__Reg1_3__Mem5125_0,
    2518             :   Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
    2519             :   Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
    2520             :   Convert__Reg1_2__Mem645_0,
    2521             :   Convert__Reg1_2__Tie0__Reg1_4__Mem645_0,
    2522             :   Convert__Reg1_2__Reg1_4__Mem645_0,
    2523             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1,
    2524             :   Convert__Reg1_2__Reg1_4__Reg1_1,
    2525             :   Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
    2526             :   Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
    2527             :   Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
    2528             :   Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
    2529             :   Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
    2530             :   Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2531             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2532             :   Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2533             :   Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2534             :   Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2535             :   Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2536             :   Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2537             :   Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2538             :   Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2539             :   Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
    2540             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6,
    2541             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0,
    2542             :   Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
    2543             :   Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
    2544             :   Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
    2545             :   Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
    2546             :   Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
    2547             :   Convert__Reg1_3__Reg1_2__Reg1_1,
    2548             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1,
    2549             :   Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
    2550             :   Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
    2551             :   Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
    2552             :   Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
    2553             :   Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
    2554             :   Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2555             :   Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2556             :   Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2557             :   Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2558             :   Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
    2559             :   Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
    2560             :   Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2561             :   Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2562             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
    2563             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
    2564             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
    2565             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
    2566             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
    2567             :   Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
    2568             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
    2569             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
    2570             :   Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
    2571             :   Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2572             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
    2573             :   Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
    2574             :   Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2575             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
    2576             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
    2577             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
    2578             :   Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
    2579             :   Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2580             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
    2581             :   Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
    2582             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
    2583             :   Convert__Reg1_2__Tie0__Reg1_1__Reg1_0,
    2584             :   Convert__Reg1_0__Tie0__Reg1_1__Reg1_2,
    2585             :   Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2,
    2586             :   Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2,
    2587             :   Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2,
    2588             :   Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0,
    2589             :   Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0,
    2590             :   Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0,
    2591             :   Convert__Reg1_0__Tie0__Reg1_1__Mem645_2,
    2592             :   Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3,
    2593             :   Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0,
    2594             :   Convert__Reg1_3__Tie0__Reg1_2__Mem645_0,
    2595             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6,
    2596             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6,
    2597             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6,
    2598             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6,
    2599             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6,
    2600             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
    2601             :   Convert__Reg1_0__Tie0__Reg1_1__Mem325_2,
    2602             :   Convert__Reg1_3__Tie0__Reg1_2__Mem325_0,
    2603             :   Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6,
    2604             :   Convert__Reg1_2__Tie0__Reg1_1__Mem645_0,
    2605             :   Convert__Reg1_2__Tie0__Reg1_1__Mem325_0,
    2606             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
    2607             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
    2608             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
    2609             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
    2610             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
    2611             :   Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
    2612             :   Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
    2613             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
    2614             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
    2615             :   Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
    2616             :   Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
    2617             :   Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
    2618             :   Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
    2619             :   Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
    2620             :   Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
    2621             :   Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
    2622             :   Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
    2623             :   Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
    2624             :   Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
    2625             :   Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
    2626             :   Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
    2627             :   Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
    2628             :   Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
    2629             :   Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2630             :   Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
    2631             :   Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
    2632             :   Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
    2633             :   Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
    2634             :   Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
    2635             :   Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
    2636             :   Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
    2637             :   Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5,
    2638             :   Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0,
    2639             :   Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5,
    2640             :   Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0,
    2641             :   Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1,
    2642             :   Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1,
    2643             :   Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC1285_1__Tie1,
    2644             :   Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC1285_1__Tie1,
    2645             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4,
    2646             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC128X5_4,
    2647             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC256X5_4,
    2648             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0,
    2649             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC128X5_0,
    2650             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC256X5_0,
    2651             :   Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1,
    2652             :   Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1,
    2653             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4,
    2654             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4,
    2655             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0,
    2656             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0,
    2657             :   Convert__Reg1_1__Mem512_RC256X5_3,
    2658             :   Convert__Reg1_2__Mem512_RC256X5_0,
    2659             :   Convert__Reg1_1__Mem512_RC5125_3,
    2660             :   Convert__Reg1_2__Mem512_RC5125_0,
    2661             :   Convert__Reg1_1__Mem256_RC5125_3,
    2662             :   Convert__Reg1_2__Mem256_RC5125_0,
    2663             :   Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC2565_1__Tie1,
    2664             :   Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC2565_1__Tie1,
    2665             :   Convert__Reg1_2__Reg1_0__Tie0__Mem64_RC1285_1__Tie1,
    2666             :   Convert__Reg1_0__Reg1_2__Tie0__Mem64_RC1285_1__Tie1,
    2667             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC256X5_4,
    2668             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem64_RC128X5_4,
    2669             :   Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC5125_4,
    2670             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC256X5_0,
    2671             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC5125_0,
    2672             :   Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem64_RC128X5_0,
    2673             :   Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
    2674             :   Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
    2675             :   Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
    2676             :   Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
    2677             :   Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
    2678             :   Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
    2679             :   Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
    2680             :   Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
    2681             :   Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
    2682             :   Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
    2683             :   Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0,
    2684             :   Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
    2685             :   Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
    2686             :   Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0,
    2687             :   Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
    2688             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
    2689             :   Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
    2690             :   Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
    2691             :   Convert__Mem1285_2__Reg1_1__Reg1_0,
    2692             :   Convert__Mem2565_2__Reg1_1__Reg1_0,
    2693             :   Convert__Mem1285_0__Reg1_1__Reg1_2,
    2694             :   Convert__Mem2565_0__Reg1_1__Reg1_2,
    2695             :   Convert__Reg1_0__Reg1_2__Reg1_4,
    2696             :   Convert__Mem645_1__Reg1_3__Reg1_0,
    2697             :   Convert__Mem645_0__Reg1_2__Reg1_4,
    2698             :   Convert__Mem325_1__Reg1_3__Reg1_0,
    2699             :   Convert__Mem325_0__Reg1_2__Reg1_4,
    2700             :   Convert__Reg1_0__Tie0__Reg1_2__Mem85_4,
    2701             :   Convert__Reg1_1__Tie0__Reg1_3__Mem85_0,
    2702             :   Convert__Reg1_0__Reg1_2__Mem85_5,
    2703             :   Convert__Reg1_1__Reg1_3__Mem85_0,
    2704             :   Convert__Reg1_0__Tie0__Reg1_2__Mem165_4,
    2705             :   Convert__Reg1_1__Tie0__Reg1_3__Mem165_0,
    2706             :   Convert__Reg1_0__Reg1_2__Mem165_5,
    2707             :   Convert__Reg1_1__Reg1_3__Mem165_0,
    2708             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
    2709             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
    2710             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
    2711             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
    2712             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
    2713             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
    2714             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
    2715             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
    2716             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
    2717             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
    2718             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
    2719             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
    2720             :   Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
    2721             :   Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
    2722             :   Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
    2723             :   Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
    2724             :   Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4,
    2725             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4,
    2726             :   Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4,
    2727             :   Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4,
    2728             :   Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4,
    2729             :   Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
    2730             :   Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
    2731             :   Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
    2732             :   Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
    2733             :   Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
    2734             :   Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
    2735             :   Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
    2736             :   Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
    2737             :   Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
    2738             :   Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
    2739             :   Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
    2740             :   Convert__Mem165_1__Reg1_3__Reg1_0,
    2741             :   Convert__Mem165_0__Reg1_2__Reg1_4,
    2742             :   Convert__Reg1_2__Mem1285_1__Reg1_0,
    2743             :   Convert__Reg1_0__Mem1285_1__Reg1_2,
    2744             :   Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0,
    2745             :   Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0,
    2746             :   Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0,
    2747             :   Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4,
    2748             :   Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4,
    2749             :   Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4,
    2750             :   Convert__Reg1_3__Mem256_RC128X5_1__Tie0__Reg1_0,
    2751             :   Convert__Reg1_3__Mem512_RC256X5_1__Tie0__Reg1_0,
    2752             :   Convert__Reg1_2__Mem256_RC128X5_0__Tie0__Reg1_4,
    2753             :   Convert__Reg1_2__Mem512_RC256X5_0__Tie0__Reg1_4,
    2754             :   Convert__Reg1_3__Mem128_RC256X5_1__Tie0__Reg1_0,
    2755             :   Convert__Reg1_3__Mem64_RC128X5_1__Tie0__Reg1_0,
    2756             :   Convert__Reg1_3__Mem256_RC5125_1__Tie0__Reg1_0,
    2757             :   Convert__Reg1_2__Mem128_RC256X5_0__Tie0__Reg1_4,
    2758             :   Convert__Reg1_2__Mem256_RC5125_0__Tie0__Reg1_4,
    2759             :   Convert__Reg1_2__Mem64_RC128X5_0__Tie0__Reg1_4,
    2760             :   Convert__AbsMem161_0,
    2761             :   CVT_NUM_SIGNATURES
    2762             : };
    2763             : 
    2764             : } // end anonymous namespace
    2765             : 
    2766             : static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
    2767             :   // Convert_NoOperands
    2768             :   { CVT_Done },
    2769             :   // Convert__imm_95_10
    2770             :   { CVT_imm_95_10, 0, CVT_Done },
    2771             :   // Convert__Imm1_0
    2772             :   { CVT_95_addImmOperands, 1, CVT_Done },
    2773             :   // Convert__Imm1_1
    2774             :   { CVT_95_addImmOperands, 2, CVT_Done },
    2775             :   // Convert__regAX__Tie0__ImmSExti16i81_1
    2776             :   { CVT_regAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2777             :   // Convert__regEAX__Tie0__ImmSExti32i81_1
    2778             :   { CVT_regEAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2779             :   // Convert__regRAX__Tie0__ImmSExti64i81_1
    2780             :   { CVT_regRAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2781             :   // Convert__ImmSExti64i321_1
    2782             :   { CVT_95_addImmOperands, 2, CVT_Done },
    2783             :   // Convert__Reg1_0__Tie0__Reg1_1
    2784             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done },
    2785             :   // Convert__Reg1_0__Tie0__ImmSExti16i81_1
    2786             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2787             :   // Convert__Reg1_0__Tie0__Imm1_1
    2788             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2789             :   // Convert__Reg1_0__Tie0__Mem165_1
    2790             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
    2791             :   // Convert__Reg1_0__Tie0__ImmSExti32i81_1
    2792             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2793             :   // Convert__Reg1_0__Tie0__Mem325_1
    2794             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
    2795             :   // Convert__Reg1_0__Tie0__ImmSExti64i81_1
    2796             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2797             :   // Convert__Reg1_0__Tie0__ImmSExti64i321_1
    2798             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    2799             :   // Convert__Reg1_0__Tie0__Mem645_1
    2800             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
    2801             :   // Convert__Reg1_0__Tie0__Mem85_1
    2802             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
    2803             :   // Convert__Mem165_0__Reg1_1
    2804             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2805             :   // Convert__Mem165_0__ImmSExti16i81_1
    2806             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2807             :   // Convert__Mem165_0__Imm1_1
    2808             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2809             :   // Convert__Mem325_0__Reg1_1
    2810             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2811             :   // Convert__Mem325_0__ImmSExti32i81_1
    2812             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2813             :   // Convert__Mem325_0__Imm1_1
    2814             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2815             :   // Convert__Mem645_0__Reg1_1
    2816             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2817             :   // Convert__Mem645_0__ImmSExti64i81_1
    2818             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2819             :   // Convert__Mem645_0__ImmSExti64i321_1
    2820             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2821             :   // Convert__Mem85_0__Reg1_1
    2822             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2823             :   // Convert__Mem85_0__Imm1_1
    2824             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2825             :   // Convert__Reg1_1__Tie0__Reg1_0
    2826             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    2827             :   // Convert__Mem85_1__Reg1_0
    2828             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2829             :   // Convert__Reg1_1__Tie0__Imm1_0
    2830             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2831             :   // Convert__Mem85_1__Imm1_0
    2832             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2833             :   // Convert__Reg1_1__Tie0__Mem85_0
    2834             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
    2835             :   // Convert__Mem325_1__Reg1_0
    2836             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2837             :   // Convert__regEAX__Tie0__ImmSExti32i81_0
    2838             :   { CVT_regEAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2839             :   // Convert__Reg1_1__Tie0__ImmSExti32i81_0
    2840             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2841             :   // Convert__Mem325_1__ImmSExti32i81_0
    2842             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2843             :   // Convert__Mem325_1__Imm1_0
    2844             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2845             :   // Convert__Reg1_1__Tie0__Mem325_0
    2846             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
    2847             :   // Convert__Mem645_1__Reg1_0
    2848             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2849             :   // Convert__regRAX__Tie0__ImmSExti64i81_0
    2850             :   { CVT_regRAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2851             :   // Convert__Reg1_1__Tie0__ImmSExti64i81_0
    2852             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2853             :   // Convert__Mem645_1__ImmSExti64i81_0
    2854             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2855             :   // Convert__ImmSExti64i321_0
    2856             :   { CVT_95_addImmOperands, 1, CVT_Done },
    2857             :   // Convert__Reg1_1__Tie0__ImmSExti64i321_0
    2858             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2859             :   // Convert__Mem645_1__ImmSExti64i321_0
    2860             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2861             :   // Convert__Reg1_1__Tie0__Mem645_0
    2862             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
    2863             :   // Convert__Mem165_1__Reg1_0
    2864             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2865             :   // Convert__regAX__Tie0__ImmSExti16i81_0
    2866             :   { CVT_regAX, 0, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2867             :   // Convert__Reg1_1__Tie0__ImmSExti16i81_0
    2868             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    2869             :   // Convert__Mem165_1__ImmSExti16i81_0
    2870             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2871             :   // Convert__Mem165_1__Imm1_0
    2872             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2873             :   // Convert__Reg1_1__Tie0__Mem165_0
    2874             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
    2875             :   // Convert__Reg1_0__Tie0__Mem1285_1
    2876             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
    2877             :   // Convert__Reg1_1__Tie0__Mem1285_0
    2878             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_Done },
    2879             :   // Convert__Reg1_0__Reg1_1
    2880             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
    2881             :   // Convert__Reg1_0__Mem325_1
    2882             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    2883             :   // Convert__Reg1_0__Mem645_1
    2884             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    2885             :   // Convert__Reg1_1__Reg1_0
    2886             :   { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    2887             :   // Convert__Reg1_1__Mem325_0
    2888             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    2889             :   // Convert__Reg1_1__Mem645_0
    2890             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    2891             :   // Convert__Reg1_0__Mem1285_1
    2892             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    2893             :   // Convert__Reg1_1__Mem1285_0
    2894             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    2895             :   // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
    2896             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2897             :   // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
    2898             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2899             :   // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
    2900             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2901             :   // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    2902             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2903             :   // Convert__Reg1_0__Reg1_1__Reg1_2
    2904             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    2905             :   // Convert__Reg1_0__Reg1_1__Mem325_2
    2906             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    2907             :   // Convert__Reg1_0__Reg1_1__Mem645_2
    2908             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    2909             :   // Convert__Reg1_2__Reg1_1__Reg1_0
    2910             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    2911             :   // Convert__Reg1_2__Reg1_1__Mem325_0
    2912             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    2913             :   // Convert__Reg1_2__Reg1_1__Mem645_0
    2914             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    2915             :   // Convert__Reg1_0__Reg1_1__Imm1_2
    2916             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2917             :   // Convert__Reg1_0__Mem325_1__Reg1_2
    2918             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
    2919             :   // Convert__Reg1_0__Mem325_1__Imm1_2
    2920             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2921             :   // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
    2922             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2923             :   // Convert__Reg1_0__Mem645_1__Reg1_2
    2924             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
    2925             :   // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
    2926             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2927             :   // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
    2928             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2929             :   // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
    2930             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2931             :   // Convert__Reg1_2__Reg1_1__Imm1_0
    2932             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2933             :   // Convert__Reg1_2__Mem325_1__Imm1_0
    2934             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2935             :   // Convert__Reg1_2__Mem325_1__Reg1_0
    2936             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2937             :   // Convert__Reg1_2__Mem645_1__Reg1_0
    2938             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2939             :   // Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2
    2940             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2941             :   // Convert__Reg1_0__Tie0__Mem1285_1__ImmUnsignedi81_2
    2942             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    2943             :   // Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0
    2944             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2945             :   // Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0
    2946             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2947             :   // Convert__Reg1_2__Tie0__Reg1_1
    2948             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_Done },
    2949             :   // Convert__Reg1_2__Tie0__Mem1285_1
    2950             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Done },
    2951             :   // Convert__Mem1285_1__Reg1_0
    2952             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    2953             :   // Convert__Mem1285_0__Reg1_1
    2954             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    2955             :   // Convert__Reg1_0__Mem165_1
    2956             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    2957             :   // Convert__Reg1_1__Mem165_0
    2958             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    2959             :   // Convert__Reg1_0__Tie0
    2960             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_Done },
    2961             :   // Convert__Reg1_0__ImmSExti16i81_1
    2962             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2963             :   // Convert__Reg1_0__ImmSExti32i81_1
    2964             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2965             :   // Convert__Reg1_0__ImmSExti64i81_1
    2966             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    2967             :   // Convert__Reg1_1__ImmSExti32i81_0
    2968             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2969             :   // Convert__Reg1_1__ImmSExti64i81_0
    2970             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2971             :   // Convert__Reg1_1__ImmSExti16i81_0
    2972             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2973             :   // Convert__Reg1_0
    2974             :   { CVT_95_Reg, 1, CVT_Done },
    2975             :   // Convert__AbsMem1_0
    2976             :   { CVT_95_addAbsMemOperands, 1, CVT_Done },
    2977             :   // Convert__Mem165_0
    2978             :   { CVT_95_addMemOperands, 1, CVT_Done },
    2979             :   // Convert__Mem325_0
    2980             :   { CVT_95_addMemOperands, 1, CVT_Done },
    2981             :   // Convert__Mem645_0
    2982             :   { CVT_95_addMemOperands, 1, CVT_Done },
    2983             :   // Convert__Mem5_0
    2984             :   { CVT_95_addMemOperands, 1, CVT_Done },
    2985             :   // Convert__Mem165_1
    2986             :   { CVT_95_addMemOperands, 2, CVT_Done },
    2987             :   // Convert__Mem325_1
    2988             :   { CVT_95_addMemOperands, 2, CVT_Done },
    2989             :   // Convert__Mem645_1
    2990             :   { CVT_95_addMemOperands, 2, CVT_Done },
    2991             :   // Convert__Imm1_1__Imm1_0
    2992             :   { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    2993             :   // Convert__Reg1_1
    2994             :   { CVT_95_Reg, 2, CVT_Done },
    2995             :   // Convert__Mem85_0
    2996             :   { CVT_95_addMemOperands, 1, CVT_Done },
    2997             :   // Convert__Reg1_0__Tie0__Reg1_0
    2998             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    2999             :   // Convert__regAX__ImmSExti16i81_1
    3000             :   { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3001             :   // Convert__regEAX__ImmSExti32i81_1
    3002             :   { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3003             :   // Convert__regRAX__ImmSExti64i81_1
    3004             :   { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3005             :   // Convert__Reg1_0__Imm1_1
    3006             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3007             :   // Convert__Reg1_0__ImmSExti64i321_1
    3008             :   { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3009             :   // Convert__Reg1_0__Mem85_1
    3010             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3011             :   // Convert__Reg1_3__Tie0__Reg1_2__Imm1_0
    3012             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3013             :   // Convert__Reg1_2__Tie0__Reg1_3__Imm1_0
    3014             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3015             :   // Convert__Reg1_2__Tie0__Mem1285_3__Imm1_0
    3016             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3017             :   // Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0
    3018             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3019             :   // Convert__Reg1_2__Tie0__Mem645_3__Imm1_0
    3020             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3021             :   // Convert__Reg1_3__Tie0__Mem645_2__Imm1_0
    3022             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3023             :   // Convert__Reg1_2__Tie0__Mem325_3__Imm1_0
    3024             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3025             :   // Convert__Reg1_3__Tie0__Mem325_2__Imm1_0
    3026             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3027             :   // Convert__Reg1_1__Imm1_0
    3028             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3029             :   // Convert__Reg1_1__Mem85_0
    3030             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3031             :   // Convert__regEAX__ImmSExti32i81_0
    3032             :   { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3033             :   // Convert__regRAX__ImmSExti64i81_0
    3034             :   { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3035             :   // Convert__Reg1_1__ImmSExti64i321_0
    3036             :   { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3037             :   // Convert__DstIdx161_0__SrcIdx162_1
    3038             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3039             :   // Convert__DstIdx321_0__SrcIdx322_1
    3040             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3041             :   // Convert__DstIdx641_0__SrcIdx642_1
    3042             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3043             :   // Convert__DstIdx81_0__SrcIdx82_1
    3044             :   { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3045             :   // Convert__DstIdx161_1__SrcIdx162_0
    3046             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3047             :   // Convert__DstIdx321_1__SrcIdx322_0
    3048             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3049             :   // Convert__DstIdx641_1__SrcIdx642_0
    3050             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3051             :   // Convert__DstIdx81_1__SrcIdx82_0
    3052             :   { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3053             :   // Convert__Reg1_0__Tie0__Mem645_1__ImmUnsignedi81_2
    3054             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3055             :   // Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0
    3056             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3057             :   // Convert__Reg1_0__Tie0__Mem325_1__ImmUnsignedi81_2
    3058             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3059             :   // Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0
    3060             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3061             :   // Convert__regAX__ImmSExti16i81_0
    3062             :   { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3063             :   // Convert__Mem1285_0
    3064             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3065             :   // Convert__Mem85_1
    3066             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3067             :   // Convert__Imm1_0__Imm1_1
    3068             :   { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3069             :   // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
    3070             :   { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3071             :   // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
    3072             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3073             :   // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
    3074             :   { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3075             :   // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
    3076             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3077             :   // Convert__Reg1_0__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_2
    3078             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3079             :   // Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0
    3080             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3081             :   // Convert__regST1
    3082             :   { CVT_regST1, 0, CVT_Done },
    3083             :   // Convert__regST0
    3084             :   { CVT_regST0, 0, CVT_Done },
    3085             :   // Convert__Mem805_0
    3086             :   { CVT_95_addMemOperands, 1, CVT_Done },
    3087             :   // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
    3088             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3089             :   // Convert__Reg1_0__Reg1_0__Imm1_1
    3090             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3091             :   // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
    3092             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3093             :   // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
    3094             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3095             :   // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
    3096             :   { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3097             :   // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
    3098             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3099             :   // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
    3100             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3101             :   // Convert__Reg1_0__Mem165_1__Imm1_2
    3102             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3103             :   // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
    3104             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3105             :   // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
    3106             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3107             :   // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
    3108             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3109             :   // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
    3110             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3111             :   // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
    3112             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3113             :   // Convert__Reg1_1__Reg1_1__Imm1_0
    3114             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3115             :   // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
    3116             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3117             :   // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
    3118             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3119             :   // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
    3120             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3121             :   // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
    3122             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3123             :   // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
    3124             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3125             :   // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
    3126             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3127             :   // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
    3128             :   { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3129             :   // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
    3130             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3131             :   // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
    3132             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3133             :   // Convert__Reg1_2__Mem165_1__Imm1_0
    3134             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3135             :   // Convert__ImmUnsignedi81_1
    3136             :   { CVT_95_addImmOperands, 2, CVT_Done },
    3137             :   // Convert__ImmUnsignedi81_0
    3138             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3139             :   // Convert__DstIdx161_1
    3140             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3141             :   // Convert__DstIdx321_1
    3142             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3143             :   // Convert__DstIdx81_1
    3144             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3145             :   // Convert__DstIdx161_0
    3146             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3147             :   // Convert__DstIdx321_0
    3148             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3149             :   // Convert__DstIdx81_0
    3150             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3151             :   // Convert__Reg1_0__Tie0__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
    3152             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3153             :   // Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
    3154             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3155             :   // Convert__Mem5_1
    3156             :   { CVT_95_addMemOperands, 2, CVT_Done },
    3157             :   // Convert__Reg1_0__Mem5_1
    3158             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3159             :   // Convert__Reg1_1__Mem5_0
    3160             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3161             :   // Convert__SrcIdx162_0
    3162             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3163             :   // Convert__SrcIdx322_0
    3164             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3165             :   // Convert__SrcIdx642_0
    3166             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3167             :   // Convert__SrcIdx82_0
    3168             :   { CVT_95_addSrcIdxOperands, 1, CVT_Done },
    3169             :   // Convert__SrcIdx82_1
    3170             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3171             :   // Convert__SrcIdx162_1
    3172             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3173             :   // Convert__SrcIdx322_1
    3174             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3175             :   // Convert__SrcIdx642_1
    3176             :   { CVT_95_addSrcIdxOperands, 2, CVT_Done },
    3177             :   // Convert__MemOffs16_82_1
    3178             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3179             :   // Convert__MemOffs32_82_1
    3180             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3181             :   // Convert__MemOffs16_162_1
    3182             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3183             :   // Convert__MemOffs32_162_1
    3184             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3185             :   // Convert__MemOffs16_322_1
    3186             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3187             :   // Convert__MemOffs32_322_1
    3188             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3189             :   // Convert__MemOffs32_642_1
    3190             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3191             :   // Convert__MemOffs16_162_0
    3192             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3193             :   // Convert__MemOffs16_322_0
    3194             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3195             :   // Convert__MemOffs16_82_0
    3196             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3197             :   // Convert__MemOffs32_162_0
    3198             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3199             :   // Convert__MemOffs32_322_0
    3200             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3201             :   // Convert__MemOffs32_642_0
    3202             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3203             :   // Convert__MemOffs32_82_0
    3204             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3205             :   // Convert__MemOffs64_82_1
    3206             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3207             :   // Convert__MemOffs64_162_1
    3208             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3209             :   // Convert__MemOffs64_322_1
    3210             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3211             :   // Convert__MemOffs64_642_1
    3212             :   { CVT_95_addMemOffsOperands, 2, CVT_Done },
    3213             :   // Convert__MemOffs64_162_0
    3214             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3215             :   // Convert__MemOffs64_322_0
    3216             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3217             :   // Convert__MemOffs64_642_0
    3218             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3219             :   // Convert__MemOffs64_82_0
    3220             :   { CVT_95_addMemOffsOperands, 1, CVT_Done },
    3221             :   // Convert__GR32orGR641_1__Reg1_0
    3222             :   { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
    3223             :   // Convert__GR32orGR641_0__Reg1_1
    3224             :   { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
    3225             :   // Convert__Reg1_1__Tie0__Reg1_0__imm_95_17
    3226             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
    3227             :   // Convert__Reg1_0__Tie0__Reg1_1__imm_95_17
    3228             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
    3229             :   // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_17
    3230             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
    3231             :   // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17
    3232             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
    3233             :   // Convert__Reg1_1__Tie0__Reg1_0__imm_95_1
    3234             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
    3235             :   // Convert__Reg1_0__Tie0__Reg1_1__imm_95_1
    3236             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
    3237             :   // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_1
    3238             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
    3239             :   // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1
    3240             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    3241             :   // Convert__Reg1_1__Tie0__Reg1_0__imm_95_16
    3242             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
    3243             :   // Convert__Reg1_0__Tie0__Reg1_1__imm_95_16
    3244             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
    3245             :   // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_16
    3246             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
    3247             :   // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16
    3248             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
    3249             :   // Convert__Reg1_1__Tie0__Reg1_0__imm_95_0
    3250             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
    3251             :   // Convert__Reg1_0__Tie0__Reg1_1__imm_95_0
    3252             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
    3253             :   // Convert__Reg1_0__Tie0__Mem1285_1__imm_95_0
    3254             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
    3255             :   // Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0
    3256             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    3257             :   // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
    3258             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3259             :   // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
    3260             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3261             :   // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
    3262             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3263             :   // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
    3264             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3265             :   // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
    3266             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3267             :   // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
    3268             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3269             :   // Convert__Reg1_0__Tie0__GR32orGR641_1__ImmUnsignedi81_2
    3270             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3271             :   // Convert__Reg1_0__Tie0__Mem85_1__ImmUnsignedi81_2
    3272             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3273             :   // Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0
    3274             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3275             :   // Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0
    3276             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3277             :   // Convert__Reg1_0__Tie0__Mem165_1__ImmUnsignedi81_2
    3278             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3279             :   // Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0
    3280             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3281             :   // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
    3282             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3283             :   // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3284             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3285             :   // Convert__Reg1_0__Tie0__ImmUnsignedi81_1
    3286             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addImmOperands, 2, CVT_Done },
    3287             :   // Convert__Reg1_1__Tie0__ImmUnsignedi81_0
    3288             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_addImmOperands, 1, CVT_Done },
    3289             :   // Convert__ImmSExti64i81_0
    3290             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3291             :   // Convert__ImmSExti16i81_0
    3292             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3293             :   // Convert__ImmSExti32i81_0
    3294             :   { CVT_95_addImmOperands, 1, CVT_Done },
    3295             :   // Convert__Mem165_0__ImmUnsignedi81_1
    3296             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3297             :   // Convert__Mem325_0__ImmUnsignedi81_1
    3298             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3299             :   // Convert__Mem645_0__ImmUnsignedi81_1
    3300             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3301             :   // Convert__Mem85_0__ImmUnsignedi81_1
    3302             :   { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
    3303             :   // Convert__Reg1_1__Tie0
    3304             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_Done },
    3305             :   // Convert__Mem85_1__ImmUnsignedi81_0
    3306             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3307             :   // Convert__Mem325_1__ImmUnsignedi81_0
    3308             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3309             :   // Convert__Mem645_1__ImmUnsignedi81_0
    3310             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3311             :   // Convert__Mem165_1__ImmUnsignedi81_0
    3312             :   { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3313             :   // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
    3314             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3315             :   // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3316             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3317             :   // Convert__DstIdx641_0
    3318             :   { CVT_95_addDstIdxOperands, 1, CVT_Done },
    3319             :   // Convert__DstIdx641_1
    3320             :   { CVT_95_addDstIdxOperands, 2, CVT_Done },
    3321             :   // Convert__Mem325_2__Reg1_1
    3322             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
    3323             :   // Convert__Mem645_2__Reg1_1
    3324             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
    3325             :   // Convert__Mem165_2__Reg1_1
    3326             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
    3327             :   // Convert__Reg1_0__Reg1_1__Mem1285_2
    3328             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3329             :   // Convert__Reg1_0__Reg1_1__Mem2565_2
    3330             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3331             :   // Convert__Reg1_0__Reg1_1__Mem5125_2
    3332             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3333             :   // Convert__Reg1_2__Reg1_1__Mem1285_0
    3334             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3335             :   // Convert__Reg1_2__Reg1_1__Mem2565_0
    3336             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3337             :   // Convert__Reg1_2__Reg1_1__Mem5125_0
    3338             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3339             :   // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
    3340             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
    3341             :   // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
    3342             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3343             :   // Convert__Reg1_3__Reg1_2__Mem645_0
    3344             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3345             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5
    3346             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
    3347             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5
    3348             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3349             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Reg1_0
    3350             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3351             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5
    3352             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3353             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5
    3354             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3355             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem1285_0
    3356             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3357             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem2565_0
    3358             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3359             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem5125_0
    3360             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3361             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
    3362             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
    3363             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
    3364             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3365             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5
    3366             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3367             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
    3368             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3369             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
    3370             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3371             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
    3372             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3373             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
    3374             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
    3375             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
    3376             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3377             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
    3378             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3379             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
    3380             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3381             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
    3382             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3383             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_0
    3384             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3385             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
    3386             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3387             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
    3388             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
    3389             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
    3390             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3391             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
    3392             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3393             :   // Convert__Reg1_3__Reg1_2__Mem325_0
    3394             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3395             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5
    3396             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3397             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_0
    3398             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3399             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
    3400             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3401             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
    3402             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3403             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem645_0
    3404             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3405             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0
    3406             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3407             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__Mem325_0
    3408             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3409             :   // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0
    3410             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3411             :   // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
    3412             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3413             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
    3414             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3415             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
    3416             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3417             :   // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
    3418             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3419             :   // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3420             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3421             :   // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3422             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3423             :   // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3424             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3425             :   // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3426             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3427             :   // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
    3428             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3429             :   // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3430             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3431             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
    3432             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3433             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
    3434             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3435             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
    3436             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3437             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
    3438             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3439             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3440             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3441             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3442             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3443             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3444             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3445             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3446             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3447             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
    3448             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3449             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
    3450             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3451             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
    3452             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3453             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
    3454             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3455             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
    3456             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3457             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3458             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3459             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3460             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3461             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3462             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3463             :   // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3464             :   { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3465             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3466             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3467             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
    3468             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3469             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3470             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3471             :   // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
    3472             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3473             :   // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3474             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3475             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
    3476             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3477             :   // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3478             :   { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3479             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
    3480             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3481             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3482             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3483             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
    3484             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
    3485             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
    3486             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3487             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
    3488             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3489             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
    3490             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3491             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
    3492             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3493             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
    3494             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
    3495             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
    3496             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3497             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
    3498             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
    3499             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
    3500             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    3501             :   // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
    3502             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3503             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
    3504             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    3505             :   // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
    3506             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3507             :   // Convert__Reg1_1__Tie0__Reg1_3__Reg1_0
    3508             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3509             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4
    3510             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3511             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem645_4
    3512             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3513             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem645_0
    3514             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3515             :   // Convert__Reg1_1__Reg1_3__Reg1_0
    3516             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3517             :   // Convert__Reg1_0__Reg1_2__Reg1_5
    3518             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
    3519             :   // Convert__Reg1_0__Reg1_2__Mem645_5
    3520             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3521             :   // Convert__Reg1_1__Reg1_3__Mem645_0
    3522             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3523             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4
    3524             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3525             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem1285_0
    3526             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3527             :   // Convert__Reg1_0__Reg1_2__Mem1285_5
    3528             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3529             :   // Convert__Reg1_1__Reg1_3__Mem1285_0
    3530             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3531             :   // Convert__Reg1_0__Mem2565_1
    3532             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3533             :   // Convert__Reg1_1__Mem2565_0
    3534             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3535             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4
    3536             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3537             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem2565_0
    3538             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3539             :   // Convert__Reg1_0__Reg1_2__Mem2565_5
    3540             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3541             :   // Convert__Reg1_1__Reg1_3__Mem2565_0
    3542             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3543             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem325_4
    3544             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3545             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem325_0
    3546             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3547             :   // Convert__Reg1_0__Reg1_2__Mem325_5
    3548             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3549             :   // Convert__Reg1_1__Reg1_3__Mem325_0
    3550             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3551             :   // Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0
    3552             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3553             :   // Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0
    3554             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3555             :   // Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0
    3556             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3557             :   // Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0
    3558             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3559             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0
    3560             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3561             :   // Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0
    3562             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3563             :   // Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0
    3564             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3565             :   // Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0
    3566             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3567             :   // Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0
    3568             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3569             :   // Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0
    3570             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3571             :   // Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0
    3572             :   { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
    3573             :   // Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0
    3574             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3575             :   // Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0
    3576             :   { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3577             :   // Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0
    3578             :   { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3579             :   // Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0
    3580             :   { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3581             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0
    3582             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3583             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0
    3584             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3585             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0
    3586             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3587             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0
    3588             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3589             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0
    3590             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3591             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0
    3592             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3593             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0
    3594             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3595             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0
    3596             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3597             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0
    3598             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3599             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0
    3600             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3601             :   // Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0
    3602             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
    3603             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0
    3604             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3605             :   // Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0
    3606             :   { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
    3607             :   // Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0
    3608             :   { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3609             :   // Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0
    3610             :   { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3611             :   // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
    3612             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3613             :   // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3614             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3615             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
    3616             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3617             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
    3618             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3619             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
    3620             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3621             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
    3622             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3623             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
    3624             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3625             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
    3626             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3627             :   // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3628             :   { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3629             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
    3630             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3631             :   // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
    3632             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3633             :   // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3634             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3635             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
    3636             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3637             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3638             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3639             :   // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
    3640             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3641             :   // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3642             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3643             :   // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
    3644             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3645             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3646             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3647             :   // Convert__Reg1_2__Reg1_1
    3648             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3649             :   // Convert__Mem2565_1__Reg1_0
    3650             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3651             :   // Convert__Mem5125_1__Reg1_0
    3652             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3653             :   // Convert__Mem2565_0__Reg1_1
    3654             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    3655             :   // Convert__Mem5125_0__Reg1_1
    3656             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
    3657             :   // Convert__Mem1285_1__Reg1_3__Reg1_0
    3658             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3659             :   // Convert__Mem2565_1__Reg1_3__Reg1_0
    3660             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3661             :   // Convert__Mem5125_1__Reg1_3__Reg1_0
    3662             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    3663             :   // Convert__Mem1285_0__Reg1_2__Reg1_4
    3664             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3665             :   // Convert__Mem2565_0__Reg1_2__Reg1_4
    3666             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3667             :   // Convert__Mem5125_0__Reg1_2__Reg1_4
    3668             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    3669             :   // Convert__Reg1_2__Mem325_0
    3670             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3671             :   // Convert__Reg1_2__Tie0__Reg1_4__Mem325_0
    3672             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3673             :   // Convert__Reg1_2__Reg1_4__Mem325_0
    3674             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3675             :   // Convert__Reg1_0__Mem5125_1
    3676             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
    3677             :   // Convert__Reg1_1__Mem5125_0
    3678             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3679             :   // Convert__Reg1_0__Reg1_1__AVX512RC1_2
    3680             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
    3681             :   // Convert__Reg1_2__Reg1_1__AVX512RC1_0
    3682             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3683             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4
    3684             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    3685             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem5125_0
    3686             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3687             :   // Convert__Reg1_0__Reg1_2__Mem5125_5
    3688             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    3689             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__AVX512RC1_5
    3690             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
    3691             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__AVX512RC1_0
    3692             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3693             :   // Convert__Reg1_1__Reg1_3__Mem5125_0
    3694             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    3695             :   // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
    3696             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
    3697             :   // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
    3698             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3699             :   // Convert__Reg1_2__Mem645_0
    3700             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3701             :   // Convert__Reg1_2__Tie0__Reg1_4__Mem645_0
    3702             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3703             :   // Convert__Reg1_2__Reg1_4__Mem645_0
    3704             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
    3705             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1
    3706             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
    3707             :   // Convert__Reg1_2__Reg1_4__Reg1_1
    3708             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
    3709             :   // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
    3710             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3711             :   // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
    3712             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3713             :   // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
    3714             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3715             :   // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
    3716             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3717             :   // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
    3718             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
    3719             :   // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3720             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3721             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3722             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3723             :   // Convert__Reg1_2__Tie0__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3724             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3725             :   // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3726             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3727             :   // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3728             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3729             :   // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3730             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3731             :   // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3732             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3733             :   // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3734             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3735             :   // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3736             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3737             :   // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
    3738             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3739             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__ImmUnsignedi81_6
    3740             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
    3741             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__ImmUnsignedi81_0
    3742             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3743             :   // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
    3744             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3745             :   // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
    3746             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3747             :   // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
    3748             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3749             :   // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
    3750             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
    3751             :   // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
    3752             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
    3753             :   // Convert__Reg1_3__Reg1_2__Reg1_1
    3754             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3755             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Reg1_1
    3756             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3757             :   // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
    3758             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
    3759             :   // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_3
    3760             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3761             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
    3762             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3763             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
    3764             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3765             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
    3766             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3767             :   // Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__ImmUnsignedi81_0
    3768             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3769             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    3770             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3771             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3772             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3773             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3774             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3775             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_4
    3776             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3777             :   // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__ImmUnsignedi81_4
    3778             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3779             :   // Convert__Reg1_4__Tie0__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3780             :   { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3781             :   // Convert__Reg1_4__Tie0__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3782             :   { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3783             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
    3784             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3785             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
    3786             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3787             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
    3788             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3789             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
    3790             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3791             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
    3792             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
    3793             :   // Convert__Reg1_4__Tie0__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
    3794             :   { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
    3795             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
    3796             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3797             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
    3798             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3799             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_4
    3800             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
    3801             :   // Convert__Reg1_4__Tie0__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3802             :   { CVT_95_Reg, 5, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3803             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
    3804             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
    3805             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2__ImmUnsignedi81_3
    3806             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3807             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3808             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3809             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
    3810             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3811             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
    3812             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3813             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
    3814             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3815             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2__ImmUnsignedi81_3
    3816             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    3817             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3818             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3819             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
    3820             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    3821             :   // Convert__Reg1_3__Tie0__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
    3822             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3823             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
    3824             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    3825             :   // Convert__Reg1_2__Tie0__Reg1_1__Reg1_0
    3826             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    3827             :   // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2
    3828             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    3829             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem1285_2
    3830             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3831             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem2565_2
    3832             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3833             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem5125_2
    3834             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3835             :   // Convert__Reg1_2__Tie0__Reg1_1__Mem1285_0
    3836             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3837             :   // Convert__Reg1_2__Tie0__Reg1_1__Mem2565_0
    3838             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3839             :   // Convert__Reg1_2__Tie0__Reg1_1__Mem5125_0
    3840             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3841             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem645_2
    3842             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3843             :   // Convert__Reg1_0__Tie0__Reg1_1__Reg1_2__AVX512RC1_3
    3844             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
    3845             :   // Convert__Reg1_3__Tie0__Reg1_2__Reg1_1__AVX512RC1_0
    3846             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
    3847             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem645_0
    3848             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3849             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6
    3850             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
    3851             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem1285_6
    3852             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3853             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem2565_6
    3854             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3855             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem5125_6
    3856             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3857             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem645_6
    3858             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3859             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
    3860             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
    3861             :   // Convert__Reg1_0__Tie0__Reg1_1__Mem325_2
    3862             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
    3863             :   // Convert__Reg1_3__Tie0__Reg1_2__Mem325_0
    3864             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3865             :   // Convert__Reg1_0__Tie0__Reg1_2__Reg1_5__Mem325_6
    3866             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
    3867             :   // Convert__Reg1_2__Tie0__Reg1_1__Mem645_0
    3868             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3869             :   // Convert__Reg1_2__Tie0__Reg1_1__Mem325_0
    3870             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3871             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
    3872             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    3873             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
    3874             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    3875             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
    3876             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3877             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
    3878             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3879             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
    3880             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    3881             :   // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
    3882             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    3883             :   // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
    3884             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3885             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
    3886             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3887             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
    3888             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
    3889             :   // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
    3890             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
    3891             :   // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
    3892             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    3893             :   // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
    3894             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
    3895             :   // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
    3896             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3897             :   // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
    3898             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
    3899             :   // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
    3900             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
    3901             :   // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
    3902             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3903             :   // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
    3904             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3905             :   // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
    3906             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3907             :   // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
    3908             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3909             :   // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
    3910             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    3911             :   // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
    3912             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3913             :   // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
    3914             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3915             :   // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
    3916             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3917             :   // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    3918             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3919             :   // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
    3920             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3921             :   // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
    3922             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3923             :   // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
    3924             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3925             :   // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
    3926             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
    3927             :   // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
    3928             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    3929             :   // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
    3930             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3931             :   // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
    3932             :   { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3933             :   // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5
    3934             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3935             :   // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0
    3936             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3937             :   // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5
    3938             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    3939             :   // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0
    3940             :   { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    3941             :   // Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC1285_1__Tie1
    3942             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3943             :   // Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC1285_1__Tie1
    3944             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3945             :   // Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC1285_1__Tie1
    3946             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3947             :   // Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC1285_1__Tie1
    3948             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3949             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC128X5_4
    3950             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3951             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC128X5_4
    3952             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3953             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC256X5_4
    3954             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3955             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC128X5_0
    3956             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    3957             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC128X5_0
    3958             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    3959             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC256X5_0
    3960             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    3961             :   // Convert__Reg1_2__Reg1_0__Tie0__Mem256_RC2565_1__Tie1
    3962             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3963             :   // Convert__Reg1_0__Reg1_2__Tie0__Mem256_RC2565_1__Tie1
    3964             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3965             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC256X5_4
    3966             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3967             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem512_RC5125_4
    3968             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3969             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC256X5_0
    3970             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    3971             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem512_RC5125_0
    3972             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    3973             :   // Convert__Reg1_1__Mem512_RC256X5_3
    3974             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
    3975             :   // Convert__Reg1_2__Mem512_RC256X5_0
    3976             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3977             :   // Convert__Reg1_1__Mem512_RC5125_3
    3978             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
    3979             :   // Convert__Reg1_2__Mem512_RC5125_0
    3980             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3981             :   // Convert__Reg1_1__Mem256_RC5125_3
    3982             :   { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
    3983             :   // Convert__Reg1_2__Mem256_RC5125_0
    3984             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
    3985             :   // Convert__Reg1_2__Reg1_0__Tie0__Mem128_RC2565_1__Tie1
    3986             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3987             :   // Convert__Reg1_0__Reg1_2__Tie0__Mem128_RC2565_1__Tie1
    3988             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3989             :   // Convert__Reg1_2__Reg1_0__Tie0__Mem64_RC1285_1__Tie1
    3990             :   { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3991             :   // Convert__Reg1_0__Reg1_2__Tie0__Mem64_RC1285_1__Tie1
    3992             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_addMemOperands, 2, CVT_Tied, 1, CVT_Done },
    3993             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem128_RC256X5_4
    3994             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3995             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem64_RC128X5_4
    3996             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3997             :   // Convert__Reg1_0__Reg1_2__Tie0__Tie1__Mem256_RC5125_4
    3998             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 5, CVT_Done },
    3999             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem128_RC256X5_0
    4000             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    4001             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem256_RC5125_0
    4002             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    4003             :   // Convert__Reg1_1__Reg1_3__Tie0__Tie1__Mem64_RC128X5_0
    4004             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, 0, CVT_Tied, 1, CVT_95_addMemOperands, 1, CVT_Done },
    4005             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
    4006             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4007             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
    4008             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4009             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
    4010             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
    4011             :   // Convert__Reg1_2__Tie0__Reg1_4__Mem1285_1__ImmUnsignedi81_0
    4012             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4013             :   // Convert__Reg1_2__Tie0__Reg1_4__Mem2565_1__ImmUnsignedi81_0
    4014             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4015             :   // Convert__Reg1_2__Tie0__Reg1_4__Mem5125_1__ImmUnsignedi81_0
    4016             :   { CVT_95_Reg, 3, CVT_Tied, 0, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4017             :   // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
    4018             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    4019             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem645_4__ImmUnsignedi81_6
    4020             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    4021             :   // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
    4022             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    4023             :   // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
    4024             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
    4025             :   // Convert__Reg1_3__Tie0__Reg1_5__Mem645_1__ImmUnsignedi81_0
    4026             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4027             :   // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
    4028             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    4029             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem325_4__ImmUnsignedi81_6
    4030             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
    4031             :   // Convert__Reg1_3__Tie0__Reg1_5__Mem325_1__ImmUnsignedi81_0
    4032             :   { CVT_95_Reg, 4, CVT_Tied, 0, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4033             :   // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
    4034             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
    4035             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
    4036             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    4037             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
    4038             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
    4039             :   // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
    4040             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
    4041             :   // Convert__Mem1285_2__Reg1_1__Reg1_0
    4042             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    4043             :   // Convert__Mem2565_2__Reg1_1__Reg1_0
    4044             :   { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
    4045             :   // Convert__Mem1285_0__Reg1_1__Reg1_2
    4046             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    4047             :   // Convert__Mem2565_0__Reg1_1__Reg1_2
    4048             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
    4049             :   // Convert__Reg1_0__Reg1_2__Reg1_4
    4050             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4051             :   // Convert__Mem645_1__Reg1_3__Reg1_0
    4052             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    4053             :   // Convert__Mem645_0__Reg1_2__Reg1_4
    4054             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4055             :   // Convert__Mem325_1__Reg1_3__Reg1_0
    4056             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    4057             :   // Convert__Mem325_0__Reg1_2__Reg1_4
    4058             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4059             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem85_4
    4060             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    4061             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem85_0
    4062             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4063             :   // Convert__Reg1_0__Reg1_2__Mem85_5
    4064             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    4065             :   // Convert__Reg1_1__Reg1_3__Mem85_0
    4066             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4067             :   // Convert__Reg1_0__Tie0__Reg1_2__Mem165_4
    4068             :   { CVT_95_Reg, 1, CVT_Tied, 0, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
    4069             :   // Convert__Reg1_1__Tie0__Reg1_3__Mem165_0
    4070             :   { CVT_95_Reg, 2, CVT_Tied, 0, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4071             :   // Convert__Reg1_0__Reg1_2__Mem165_5
    4072             :   { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
    4073             :   // Convert__Reg1_1__Reg1_3__Mem165_0
    4074             :   { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
    4075             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
    4076             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
    4077             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
    4078             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
    4079             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
    4080             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
    4081             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
    4082             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
    4083             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
    4084             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
    4085             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
    4086             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
    4087             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
    4088             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
    4089             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
    4090             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
    4091             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
    4092             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
    4093             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
    4094             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
    4095             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
    4096             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
    4097             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
    4098             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
    4099             :   // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
    4100             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
    4101             :   // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
    4102             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
    4103             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
    4104             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
    4105             :   // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
    4106             :   { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
    4107             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4
    4108             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4109             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4
    4110             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4111             :   // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4
    4112             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4113             :   // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4
    4114             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4115             :   // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4
    4116             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
    4117             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
    4118             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4119             :   // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0
    4120             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4121             :   // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0
    4122             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4123             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
    4124             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4125             :   // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
    4126             :   { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4127             :   // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
    4128             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    4129             :   // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
    4130             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    4131             :   // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
    4132             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4133             :   // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
    4134             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4135             :   // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
    4136             :   { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
    4137             :   // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
    4138             :   { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
    4139             :   // Convert__Mem165_1__Reg1_3__Reg1_0
    4140             :   { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
    4141             :   // Convert__Mem165_0__Reg1_2__Reg1_4
    4142             :   { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
    4143             :   // Convert__Reg1_2__Mem1285_1__Reg1_0
    4144             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
    4145             :   // Convert__Reg1_0__Mem1285_1__Reg1_2
    4146             :   { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
    4147             :   // Convert__Reg1_3__Mem128_RC128X5_1__Tie0__Reg1_0
    4148             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4149             :   // Convert__Reg1_3__Mem256_RC256X5_1__Tie0__Reg1_0
    4150             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4151             :   // Convert__Reg1_3__Mem512_RC5125_1__Tie0__Reg1_0
    4152             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4153             :   // Convert__Reg1_2__Mem128_RC128X5_0__Tie0__Reg1_4
    4154             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4155             :   // Convert__Reg1_2__Mem256_RC256X5_0__Tie0__Reg1_4
    4156             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4157             :   // Convert__Reg1_2__Mem512_RC5125_0__Tie0__Reg1_4
    4158             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4159             :   // Convert__Reg1_3__Mem256_RC128X5_1__Tie0__Reg1_0
    4160             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4161             :   // Convert__Reg1_3__Mem512_RC256X5_1__Tie0__Reg1_0
    4162             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4163             :   // Convert__Reg1_2__Mem256_RC128X5_0__Tie0__Reg1_4
    4164             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4165             :   // Convert__Reg1_2__Mem512_RC256X5_0__Tie0__Reg1_4
    4166             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4167             :   // Convert__Reg1_3__Mem128_RC256X5_1__Tie0__Reg1_0
    4168             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4169             :   // Convert__Reg1_3__Mem64_RC128X5_1__Tie0__Reg1_0
    4170             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4171             :   // Convert__Reg1_3__Mem256_RC5125_1__Tie0__Reg1_0
    4172             :   { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, 0, CVT_95_Reg, 1, CVT_Done },
    4173             :   // Convert__Reg1_2__Mem128_RC256X5_0__Tie0__Reg1_4
    4174             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4175             :   // Convert__Reg1_2__Mem256_RC5125_0__Tie0__Reg1_4
    4176             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4177             :   // Convert__Reg1_2__Mem64_RC128X5_0__Tie0__Reg1_4
    4178             :   { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, 0, CVT_95_Reg, 5, CVT_Done },
    4179             :   // Convert__AbsMem161_0
    4180             :   { CVT_95_addAbsMemOperands, 1, CVT_Done },
    4181             : };
    4182             : 
    4183       48493 : void X86AsmParser::
    4184             : convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
    4185             :                 const OperandVector &Operands) {
    4186             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    4187       48493 :   const uint8_t *Converter = ConversionTable[Kind];
    4188             :   unsigned OpIdx;
    4189       96986 :   Inst.setOpcode(Opcode);
    4190      179216 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    4191      130723 :     OpIdx = *(p + 1);
    4192      130723 :     switch (*p) {
    4193           0 :     default: llvm_unreachable("invalid conversion entry!");
    4194           0 :     case CVT_Reg:
    4195           0 :       static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
    4196             :       break;
    4197       15393 :     case CVT_Tied:
    4198       15393 :       Inst.addOperand(Inst.getOperand(OpIdx));
    4199             :       break;
    4200           4 :     case CVT_imm_95_10:
    4201           8 :       Inst.addOperand(MCOperand::createImm(10));
    4202             :       break;
    4203        7890 :     case CVT_95_addImmOperands:
    4204       23670 :       static_cast<X86Operand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
    4205             :       break;
    4206          15 :     case CVT_regAX:
    4207          30 :       Inst.addOperand(MCOperand::createReg(X86::AX));
    4208             :       break;
    4209          75 :     case CVT_regEAX:
    4210         150 :       Inst.addOperand(MCOperand::createReg(X86::EAX));
    4211             :       break;
    4212          18 :     case CVT_regRAX:
    4213          36 :       Inst.addOperand(MCOperand::createReg(X86::RAX));
    4214             :       break;
    4215       77573 :     case CVT_95_Reg:
    4216      232719 :       static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
    4217             :       break;
    4218       26850 :     case CVT_95_addMemOperands:
    4219       80550 :       static_cast<X86Operand&>(*Operands[OpIdx]).addMemOperands(Inst, 5);
    4220             :       break;
    4221         771 :     case CVT_95_addAbsMemOperands:
    4222        2313 :       static_cast<X86Operand&>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1);
    4223             :       break;
    4224         184 :     case CVT_95_addDstIdxOperands:
    4225         552 :       static_cast<X86Operand&>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1);
    4226             :       break;
    4227         199 :     case CVT_95_addSrcIdxOperands:
    4228         597 :       static_cast<X86Operand&>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2);
    4229             :       break;
    4230          88 :     case CVT_95_addGR32orGR64Operands:
    4231         264 :       static_cast<X86Operand&>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1);
    4232             :       break;
    4233          43 :     case CVT_regST1:
    4234          86 :       Inst.addOperand(MCOperand::createReg(X86::ST1));
    4235             :       break;
    4236          12 :     case CVT_regST0:
    4237          24 :       Inst.addOperand(MCOperand::createReg(X86::ST0));
    4238             :       break;
    4239          59 :     case CVT_95_addMemOffsOperands:
    4240         177 :       static_cast<X86Operand&>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2);
    4241             :       break;
    4242           5 :     case CVT_imm_95_17:
    4243          10 :       Inst.addOperand(MCOperand::createImm(17));
    4244             :       break;
    4245           4 :     case CVT_imm_95_1:
    4246           8 :       Inst.addOperand(MCOperand::createImm(1));
    4247             :       break;
    4248           5 :     case CVT_imm_95_16:
    4249          10 :       Inst.addOperand(MCOperand::createImm(16));
    4250             :       break;
    4251           4 :     case CVT_imm_95_0:
    4252           8 :       Inst.addOperand(MCOperand::createImm(0));
    4253             :       break;
    4254        1531 :     case CVT_95_addAVX512RCOperands:
    4255        4593 :       static_cast<X86Operand&>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1);
    4256             :       break;
    4257             :     }
    4258             :   }
    4259       48493 : }
    4260             : 
    4261         430 : void X86AsmParser::
    4262             : convertToMapAndConstraints(unsigned Kind,
    4263             :                            const OperandVector &Operands) {
    4264             :   assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
    4265         430 :   unsigned NumMCOperands = 0;
    4266         430 :   const uint8_t *Converter = ConversionTable[Kind];
    4267        1164 :   for (const uint8_t *p = Converter; *p; p+= 2) {
    4268         734 :     switch (*p) {
    4269           0 :     default: llvm_unreachable("invalid conversion entry!");
    4270           0 :     case CVT_Reg:
    4271           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4272           0 :       Operands[*(p + 1)]->setConstraint("r");
    4273           0 :       ++NumMCOperands;
    4274           0 :       break;
    4275           8 :     case CVT_Tied:
    4276           8 :       ++NumMCOperands;
    4277           8 :       break;
    4278           0 :     case CVT_imm_95_10:
    4279           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4280           0 :       Operands[*(p + 1)]->setConstraint("");
    4281           0 :       ++NumMCOperands;
    4282           0 :       break;
    4283         107 :     case CVT_95_addImmOperands:
    4284         428 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4285         428 :       Operands[*(p + 1)]->setConstraint("m");
    4286         107 :       NumMCOperands += 1;
    4287         107 :       break;
    4288           0 :     case CVT_regAX:
    4289           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4290           0 :       Operands[*(p + 1)]->setConstraint("m");
    4291           0 :       ++NumMCOperands;
    4292           0 :       break;
    4293           0 :     case CVT_regEAX:
    4294           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4295           0 :       Operands[*(p + 1)]->setConstraint("m");
    4296           0 :       ++NumMCOperands;
    4297           0 :       break;
    4298           0 :     case CVT_regRAX:
    4299           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4300           0 :       Operands[*(p + 1)]->setConstraint("m");
    4301           0 :       ++NumMCOperands;
    4302           0 :       break;
    4303         368 :     case CVT_95_Reg:
    4304        1472 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4305        1472 :       Operands[*(p + 1)]->setConstraint("r");
    4306         368 :       NumMCOperands += 1;
    4307         368 :       break;
    4308         241 :     case CVT_95_addMemOperands:
    4309         964 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4310         964 :       Operands[*(p + 1)]->setConstraint("m");
    4311         241 :       NumMCOperands += 5;
    4312         241 :       break;
    4313           8 :     case CVT_95_addAbsMemOperands:
    4314          32 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4315          32 :       Operands[*(p + 1)]->setConstraint("m");
    4316           8 :       NumMCOperands += 1;
    4317           8 :       break;
    4318           0 :     case CVT_95_addDstIdxOperands:
    4319           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4320           0 :       Operands[*(p + 1)]->setConstraint("m");
    4321           0 :       NumMCOperands += 1;
    4322           0 :       break;
    4323           0 :     case CVT_95_addSrcIdxOperands:
    4324           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4325           0 :       Operands[*(p + 1)]->setConstraint("m");
    4326           0 :       NumMCOperands += 2;
    4327           0 :       break;
    4328           0 :     case CVT_95_addGR32orGR64Operands:
    4329           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4330           0 :       Operands[*(p + 1)]->setConstraint("m");
    4331           0 :       NumMCOperands += 1;
    4332           0 :       break;
    4333           0 :     case CVT_regST1:
    4334           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4335           0 :       Operands[*(p + 1)]->setConstraint("m");
    4336           0 :       ++NumMCOperands;
    4337           0 :       break;
    4338           0 :     case CVT_regST0:
    4339           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4340           0 :       Operands[*(p + 1)]->setConstraint("m");
    4341           0 :       ++NumMCOperands;
    4342           0 :       break;
    4343           2 :     case CVT_95_addMemOffsOperands:
    4344           8 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4345           8 :       Operands[*(p + 1)]->setConstraint("m");
    4346           2 :       NumMCOperands += 2;
    4347           2 :       break;
    4348           0 :     case CVT_imm_95_17:
    4349           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4350           0 :       Operands[*(p + 1)]->setConstraint("");
    4351           0 :       ++NumMCOperands;
    4352           0 :       break;
    4353           0 :     case CVT_imm_95_1:
    4354           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4355           0 :       Operands[*(p + 1)]->setConstraint("");
    4356           0 :       ++NumMCOperands;
    4357           0 :       break;
    4358           0 :     case CVT_imm_95_16:
    4359           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4360           0 :       Operands[*(p + 1)]->setConstraint("");
    4361           0 :       ++NumMCOperands;
    4362           0 :       break;
    4363           0 :     case CVT_imm_95_0:
    4364           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4365           0 :       Operands[*(p + 1)]->setConstraint("");
    4366           0 :       ++NumMCOperands;
    4367           0 :       break;
    4368           0 :     case CVT_95_addAVX512RCOperands:
    4369           0 :       Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
    4370           0 :       Operands[*(p + 1)]->setConstraint("m");
    4371           0 :       NumMCOperands += 1;
    4372           0 :       break;
    4373             :     }
    4374             :   }
    4375         430 : }
    4376             : 
    4377             : namespace {
    4378             : 
    4379             : /// MatchClassKind - The kinds of classes which participate in
    4380             : /// instruction matching.
    4381             : enum MatchClassKind {
    4382             :   InvalidMatchClass = 0,
    4383             :   OptionalMatchClass = 1,
    4384             :   MCK__STAR_, // '*'
    4385             :   MCK_b, // 'b'
    4386             :   MCK_d, // 'd'
    4387             :   MCK_pd, // 'pd'
    4388             :   MCK_ps, // 'ps'
    4389             :   MCK_q, // 'q'
    4390             :   MCK_sae, // 'sae'
    4391             :   MCK_sd, // 'sd'
    4392             :   MCK_ss, // 'ss'
    4393             :   MCK_ub, // 'ub'
    4394             :   MCK_ud, // 'ud'
    4395             :   MCK_uq, // 'uq'
    4396             :   MCK_uw, // 'uw'
    4397             :   MCK_w, // 'w'
    4398             :   MCK__123_, // '{'
    4399             :   MCK__123_1to16_125_, // '{1to16}'
    4400             :   MCK__123_1to2_125_, // '{1to2}'
    4401             :   MCK__123_1to4_125_, // '{1to4}'
    4402             :   MCK__123_1to8_125_, // '{1to8}'
    4403             :   MCK__123_sae_125_, // '{sae}'
    4404             :   MCK__123_z_125_, // '{z}'
    4405             :   MCK__125_, // '}'
    4406             :   MCK_Reg64, // derived register class
    4407             :   MCK_Reg66, // derived register class
    4408             :   MCK_AL, // register class 'AL'
    4409             :   MCK_AX, // register class 'AX'
    4410             :   MCK_CCR, // register class 'CCR'
    4411             :   MCK_CL, // register class 'CL'
    4412             :   MCK_CS, // register class 'CS'
    4413             :   MCK_DS, // register class 'DS'
    4414             :   MCK_DX, // register class 'DX'
    4415             :   MCK_EAX, // register class 'EAX'
    4416             :   MCK_EBX, // register class 'EBX'
    4417             :   MCK_ECX, // register class 'ECX'
    4418             :   MCK_EDX, // register class 'EDX'
    4419             :   MCK_ES, // register class 'ES'
    4420             :   MCK_FPCCR, // register class 'FPCCR'
    4421             :   MCK_FS, // register class 'FS'
    4422             :   MCK_GS, // register class 'GS'
    4423             :   MCK_RAX, // register class 'RAX'
    4424             :   MCK_RBX, // register class 'RBX'
    4425             :   MCK_RCX, // register class 'RCX'
    4426             :   MCK_RDX, // register class 'RDX'
    4427             :   MCK_SS, // register class 'SS'
    4428             :   MCK_ST0, // register class 'ST0'
    4429             :   MCK_XMM0, // register class 'XMM0'
    4430             :   MCK_Reg24, // derived register class
    4431             :   MCK_Reg52, // derived register class
    4432             :   MCK_Reg65, // derived register class
    4433             :   MCK_GR32_AD, // register class 'GR32_AD'
    4434             :   MCK_GR64_AD, // register class 'GR64_AD'
    4435             :   MCK_Reg25, // derived register class
    4436             :   MCK_Reg34, // derived register class
    4437             :   MCK_Reg53, // derived register class
    4438             :   MCK_GR32_TC, // register class 'GR32_TC'
    4439             :   MCK_Reg50, // derived register class
    4440             :   MCK_Reg58, // derived register class
    4441             :   MCK_BNDR, // register class 'BNDR'
    4442             :   MCK_GR16_ABCD, // register class 'GR16_ABCD'
    4443             :   MCK_GR32_ABCD, // register class 'GR32_ABCD'
    4444             :   MCK_GR64_ABCD, // register class 'GR64_ABCD'
    4445             :   MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
    4446             :   MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
    4447             :   MCK_Reg42, // derived register class
    4448             :   MCK_Reg61, // derived register class
    4449             :   MCK_Reg26, // derived register class
    4450             :   MCK_Reg45, // derived register class
    4451             :   MCK_Reg48, // derived register class
    4452             :   MCK_Reg54, // derived register class
    4453             :   MCK_Reg60, // derived register class
    4454             :   MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
    4455             :   MCK_Reg27, // derived register class
    4456             :   MCK_Reg46, // derived register class
    4457             :   MCK_Reg49, // derived register class
    4458             :   MCK_Reg55, // derived register class
    4459             :   MCK_Reg59, // derived register class
    4460             :   MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
    4461             :   MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
    4462             :   MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
    4463             :   MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM'
    4464             :   MCK_Reg37, // derived register class
    4465             :   MCK_Reg43, // derived register class
    4466             :   MCK_Reg78, // derived register class
    4467             :   MCK_Reg81, // derived register class
    4468             :   MCK_DEBUG_REG, // register class 'DEBUG_REG'
    4469             :   MCK_GR16_NOREX, // register class 'GR16_NOREX'
    4470             :   MCK_GR32_NOREX, // register class 'GR32_NOREX'
    4471             :   MCK_GR64_TCW64, // register class 'GR64_TCW64'
    4472             :   MCK_GR8_NOREX, // register class 'GR8_NOREX'
    4473             :   MCK_RST, // register class 'RST'
    4474             :   MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64'
    4475             :   MCK_VR128H, // register class 'VR128H'
    4476             :   MCK_VR128L, // register class 'VR128L'
    4477             :   MCK_VR256H, // register class 'VR256H'
    4478             :   MCK_VR256L, // register class 'VR256L'
    4479             :   MCK_VR64, // register class 'VR64'
    4480             :   MCK_Reg21, // derived register class
    4481             :   MCK_GR64_NOREX, // register class 'GR64_NOREX'
    4482             :   MCK_GR64_TC, // register class 'GR64_TC'
    4483             :   MCK_Reg29, // derived register class
    4484             :   MCK_Reg57, // derived register class
    4485             :   MCK_Reg56, // derived register class
    4486             :   MCK_GR32_NOAX, // register class 'GR32_NOAX'
    4487             :   MCK_GR32_NOSP, // register class 'GR32_NOSP'
    4488             :   MCK_GR64_NOSP, // register class 'GR64_NOSP'
    4489             :   MCK_Reg38, // derived register class
    4490             :   MCK_Reg79, // derived register class
    4491             :   MCK_CONTROL_REG, // register class 'CONTROL_REG'
    4492             :   MCK_FR32, // register class 'FR32,FR64,FR128,VR128'
    4493             :   MCK_GR16, // register class 'GR16'
    4494             :   MCK_GR32, // register class 'GR32'
    4495             :   MCK_VR256, // register class 'VR256'
    4496             :   MCK_Reg18, // derived register class
    4497             :   MCK_GR64, // register class 'GR64'
    4498             :   MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS'
    4499             :   MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP'
    4500             :   MCK_GR8, // register class 'GR8'
    4501             :   MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
    4502             :   MCK_VR256X, // register class 'VR256X'
    4503             :   MCK_VR512, // register class 'VR512'
    4504             :   MCK_AVX512RC, // user defined class 'AVX512RCOperand'
    4505             :   MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
    4506             :   MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
    4507             :   MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
    4508             :   MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
    4509             :   MCK_Imm, // user defined class 'ImmAsmOperand'
    4510             :   MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
    4511             :   MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
    4512             :   MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
    4513             :   MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
    4514             :   MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
    4515             :   MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
    4516             :   MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
    4517             :   MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
    4518             :   MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
    4519             :   MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
    4520             :   MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
    4521             :   MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
    4522             :   MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
    4523             :   MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
    4524             :   MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
    4525             :   MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
    4526             :   MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
    4527             :   MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
    4528             :   MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
    4529             :   MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
    4530             :   MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
    4531             :   MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
    4532             :   MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
    4533             :   MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
    4534             :   MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand'
    4535             :   MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand'
    4536             :   MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand'
    4537             :   MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand'
    4538             :   MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
    4539             :   MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
    4540             :   MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand'
    4541             :   MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand'
    4542             :   MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand'
    4543             :   MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand'
    4544             :   MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand'
    4545             :   MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
    4546             :   MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
    4547             :   MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand'
    4548             :   MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand'
    4549             :   MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
    4550             :   MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand'
    4551             :   MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand'
    4552             :   MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
    4553             :   MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
    4554             :   MCK_Mem, // user defined class 'X86MemAsmOperand'
    4555             :   NumMatchClassKinds
    4556             : };
    4557             : 
    4558             : }
    4559             : 
    4560       73334 : static MatchClassKind matchTokenString(StringRef Name) {
    4561       73334 :   switch (Name.size()) {
    4562             :   default: break;
    4563       27888 :   case 1:        // 7 strings to match.
    4564       55776 :     switch (Name[0]) {
    4565             :     default: break;
    4566             :     case '*':    // 1 string to match.
    4567             :       return MCK__STAR_;         // "*"
    4568         510 :     case 'b':    // 1 string to match.
    4569         510 :       return MCK_b;      // "b"
    4570        1975 :     case 'd':    // 1 string to match.
    4571        1975 :       return MCK_d;      // "d"
    4572        2340 :     case 'q':    // 1 string to match.
    4573        2340 :       return MCK_q;      // "q"
    4574        2310 :     case 'w':    // 1 string to match.
    4575        2310 :       return MCK_w;      // "w"
    4576       12425 :     case '{':    // 1 string to match.
    4577       12425 :       return MCK__123_;  // "{"
    4578        7991 :     case '}':    // 1 string to match.
    4579        7991 :       return MCK__125_;  // "}"
    4580             :     }
    4581             :     break;
    4582       19411 :   case 2:        // 8 strings to match.
    4583       38822 :     switch (Name[0]) {
    4584             :     default: break;
    4585        4233 :     case 'p':    // 2 strings to match.
    4586        8466 :       switch (Name[1]) {
    4587             :       default: break;
    4588             :       case 'd':  // 1 string to match.
    4589             :         return MCK_pd;   // "pd"
    4590        2688 :       case 's':  // 1 string to match.
    4591        2688 :         return MCK_ps;   // "ps"
    4592             :       }
    4593             :       break;
    4594        3866 :     case 's':    // 2 strings to match.
    4595        7732 :       switch (Name[1]) {
    4596             :       default: break;
    4597             :       case 'd':  // 1 string to match.
    4598             :         return MCK_sd;   // "sd"
    4599        2101 :       case 's':  // 1 string to match.
    4600        2101 :         return MCK_ss;   // "ss"
    4601             :       }
    4602             :       break;
    4603       11312 :     case 'u':    // 4 strings to match.
    4604       22624 :       switch (Name[1]) {
    4605             :       default: break;
    4606             :       case 'b':  // 1 string to match.
    4607             :         return MCK_ub;   // "ub"
    4608             :       case 'd':  // 1 string to match.
    4609             :         return MCK_ud;   // "ud"
    4610             :       case 'q':  // 1 string to match.
    4611             :         return MCK_uq;   // "uq"
    4612             :       case 'w':  // 1 string to match.
    4613             :         return MCK_uw;   // "uw"
    4614             :       }
    4615             :       break;
    4616             :     }
    4617             :     break;
    4618        3458 :   case 3:        // 2 strings to match.
    4619        6916 :     switch (Name[0]) {
    4620             :     default: break;
    4621           0 :     case 's':    // 1 string to match.
    4622           0 :       if (memcmp(Name.data()+1, "ae", 2) != 0)
    4623             :         break;
    4624             :       return MCK_sae;    // "sae"
    4625        3458 :     case '{':    // 1 string to match.
    4626        3458 :       if (memcmp(Name.data()+1, "z}", 2) != 0)
    4627             :         break;
    4628             :       return MCK__123_z_125_;    // "{z}"
    4629             :     }
    4630             :     break;
    4631         844 :   case 5:        // 1 string to match.
    4632         844 :     if (memcmp(Name.data()+0, "{sae}", 5) != 0)
    4633             :       break;
    4634             :     return MCK__123_sae_125_;    // "{sae}"
    4635       18084 :   case 6:        // 3 strings to match.
    4636       18084 :     if (memcmp(Name.data()+0, "{1to", 4) != 0)
    4637             :       break;
    4638       36168 :     switch (Name[4]) {
    4639             :     default: break;
    4640        2708 :     case '2':    // 1 string to match.
    4641        5416 :       if (Name[5] != '}')
    4642             :         break;
    4643             :       return MCK__123_1to2_125_;         // "{1to2}"
    4644        6400 :     case '4':    // 1 string to match.
    4645       12800 :       if (Name[5] != '}')
    4646             :         break;
    4647             :       return MCK__123_1to4_125_;         // "{1to4}"
    4648        8976 :     case '8':    // 1 string to match.
    4649       17952 :       if (Name[5] != '}')
    4650             :         break;
    4651             :       return MCK__123_1to8_125_;         // "{1to8}"
    4652             :     }
    4653             :     break;
    4654        3649 :   case 7:        // 1 string to match.
    4655        3649 :     if (memcmp(Name.data()+0, "{1to16}", 7) != 0)
    4656             :       break;
    4657             :     return MCK__123_1to16_125_;  // "{1to16}"
    4658             :   }
    4659             :   return InvalidMatchClass;
    4660             : }
    4661             : 
    4662             : /// isSubclass - Compute whether \p A is a subclass of \p B.
    4663      872214 : static bool isSubclass(MatchClassKind A, MatchClassKind B) {
    4664      872214 :   if (A == B)
    4665             :     return true;
    4666             : 
    4667      769498 :   switch (A) {
    4668             :   default:
    4669             :     return false;
    4670             : 
    4671         205 :   case MCK_Reg64:
    4672             :     switch (B) {
    4673             :     default: return false;
    4674             :     case MCK_Reg65: return true;
    4675             :     case MCK_Reg54: return true;
    4676             :     case MCK_Reg55: return true;
    4677             :     case MCK_GR64_NOREX_NOSP: return true;
    4678             :     case MCK_Reg37: return true;
    4679             :     case MCK_Reg21: return true;
    4680             :     case MCK_GR64_NOREX: return true;
    4681             :     case MCK_Reg57: return true;
    4682             :     case MCK_Reg56: return true;
    4683             :     case MCK_GR64_NOSP: return true;
    4684             :     case MCK_Reg38: return true;
    4685             :     case MCK_Reg18: return true;
    4686             :     case MCK_GR64: return true;
    4687             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4688             :     }
    4689             : 
    4690           0 :   case MCK_Reg66:
    4691             :     switch (B) {
    4692             :     default: return false;
    4693             :     case MCK_Reg65: return true;
    4694             :     case MCK_Reg50: return true;
    4695             :     case MCK_Reg45: return true;
    4696             :     case MCK_Reg49: return true;
    4697             :     case MCK_GR64_TCW64: return true;
    4698             :     case MCK_GR64_NOREX: return true;
    4699             :     case MCK_GR64_TC: return true;
    4700             :     case MCK_GR64: return true;
    4701             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4702             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4703             :     }
    4704             : 
    4705        6055 :   case MCK_AL:
    4706        6055 :     switch (B) {
    4707             :     default: return false;
    4708           0 :     case MCK_GR8_ABCD_L: return true;
    4709           0 :     case MCK_GR8_NOREX: return true;
    4710         115 :     case MCK_GR8: return true;
    4711             :     }
    4712             : 
    4713        6395 :   case MCK_AX:
    4714        6395 :     switch (B) {
    4715             :     default: return false;
    4716           0 :     case MCK_GR16_ABCD: return true;
    4717           0 :     case MCK_GR16_NOREX: return true;
    4718         110 :     case MCK_GR16: return true;
    4719             :     }
    4720             : 
    4721         453 :   case MCK_CL:
    4722         453 :     switch (B) {
    4723             :     default: return false;
    4724           0 :     case MCK_GR8_ABCD_L: return true;
    4725           0 :     case MCK_GR8_NOREX: return true;
    4726           5 :     case MCK_GR8: return true;
    4727             :     }
    4728             : 
    4729         564 :   case MCK_CS:
    4730         564 :     return B == MCK_SEGMENT_REG;
    4731             : 
    4732         512 :   case MCK_DS:
    4733         512 :     return B == MCK_SEGMENT_REG;
    4734             : 
    4735         118 :   case MCK_DX:
    4736         118 :     switch (B) {
    4737             :     default: return false;
    4738           0 :     case MCK_GR16_ABCD: return true;
    4739           0 :     case MCK_GR16_NOREX: return true;
    4740          18 :     case MCK_GR16: return true;
    4741             :     }
    4742             : 
    4743       98280 :   case MCK_EAX:
    4744             :     switch (B) {
    4745             :     default: return false;
    4746             :     case MCK_GR32_AD: return true;
    4747             :     case MCK_GR32_TC: return true;
    4748             :     case MCK_GR32_ABCD: return true;
    4749             :     case MCK_GR32_NOREX_NOSP: return true;
    4750             :     case MCK_GR32_NOREX: return true;
    4751             :     case MCK_Reg21: return true;
    4752             :     case MCK_GR32_NOSP: return true;
    4753             :     case MCK_GR32: return true;
    4754             :     case MCK_Reg18: return true;
    4755             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4756             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4757             :     }
    4758             : 
    4759        1267 :   case MCK_EBX:
    4760             :     switch (B) {
    4761             :     default: return false;
    4762             :     case MCK_Reg25: return true;
    4763             :     case MCK_GR32_ABCD: return true;
    4764             :     case MCK_Reg26: return true;
    4765             :     case MCK_Reg27: return true;
    4766             :     case MCK_GR32_NOREX_NOSP: return true;
    4767             :     case MCK_GR32_NOREX: return true;
    4768             :     case MCK_Reg21: return true;
    4769             :     case MCK_Reg29: return true;
    4770             :     case MCK_GR32_NOAX: return true;
    4771             :     case MCK_GR32_NOSP: return true;
    4772             :     case MCK_GR32: return true;
    4773             :     case MCK_Reg18: return true;
    4774             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4775             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4776             :     }
    4777             : 
    4778        3340 :   case MCK_ECX:
    4779             :     switch (B) {
    4780             :     default: return false;
    4781             :     case MCK_Reg24: return true;
    4782             :     case MCK_Reg25: return true;
    4783             :     case MCK_GR32_TC: return true;
    4784             :     case MCK_GR32_ABCD: return true;
    4785             :     case MCK_Reg26: return true;
    4786             :     case MCK_Reg27: return true;
    4787             :     case MCK_GR32_NOREX_NOSP: return true;
    4788             :     case MCK_GR32_NOREX: return true;
    4789             :     case MCK_Reg21: return true;
    4790             :     case MCK_Reg29: return true;
    4791             :     case MCK_GR32_NOAX: return true;
    4792             :     case MCK_GR32_NOSP: return true;
    4793             :     case MCK_GR32: return true;
    4794             :     case MCK_Reg18: return true;
    4795             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4796             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4797             :     }
    4798             : 
    4799        1798 :   case MCK_EDX:
    4800             :     switch (B) {
    4801             :     default: return false;
    4802             :     case MCK_Reg24: return true;
    4803             :     case MCK_GR32_AD: return true;
    4804             :     case MCK_Reg25: return true;
    4805             :     case MCK_GR32_TC: return true;
    4806             :     case MCK_GR32_ABCD: return true;
    4807             :     case MCK_Reg26: return true;
    4808             :     case MCK_Reg27: return true;
    4809             :     case MCK_GR32_NOREX_NOSP: return true;
    4810             :     case MCK_GR32_NOREX: return true;
    4811             :     case MCK_Reg21: return true;
    4812             :     case MCK_Reg29: return true;
    4813             :     case MCK_GR32_NOAX: return true;
    4814             :     case MCK_GR32_NOSP: return true;
    4815             :     case MCK_GR32: return true;
    4816             :     case MCK_Reg18: return true;
    4817             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4818             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4819             :     }
    4820             : 
    4821         512 :   case MCK_ES:
    4822         512 :     return B == MCK_SEGMENT_REG;
    4823             : 
    4824         714 :   case MCK_FS:
    4825         714 :     return B == MCK_SEGMENT_REG;
    4826             : 
    4827         716 :   case MCK_GS:
    4828         716 :     return B == MCK_SEGMENT_REG;
    4829             : 
    4830        7385 :   case MCK_RAX:
    4831             :     switch (B) {
    4832             :     default: return false;
    4833             :     case MCK_GR64_AD: return true;
    4834             :     case MCK_Reg34: return true;
    4835             :     case MCK_Reg50: return true;
    4836             :     case MCK_GR64_ABCD: return true;
    4837             :     case MCK_Reg42: return true;
    4838             :     case MCK_Reg45: return true;
    4839             :     case MCK_Reg48: return true;
    4840             :     case MCK_Reg46: return true;
    4841             :     case MCK_Reg49: return true;
    4842             :     case MCK_GR64_NOREX_NOSP: return true;
    4843             :     case MCK_Reg37: return true;
    4844             :     case MCK_Reg43: return true;
    4845             :     case MCK_GR64_TCW64: return true;
    4846             :     case MCK_GR64_NOREX: return true;
    4847             :     case MCK_GR64_TC: return true;
    4848             :     case MCK_GR64_NOSP: return true;
    4849             :     case MCK_Reg38: return true;
    4850             :     case MCK_GR64: return true;
    4851             :     }
    4852             : 
    4853        1530 :   case MCK_RBX:
    4854             :     switch (B) {
    4855             :     default: return false;
    4856             :     case MCK_Reg53: return true;
    4857             :     case MCK_GR64_ABCD: return true;
    4858             :     case MCK_Reg54: return true;
    4859             :     case MCK_Reg55: return true;
    4860             :     case MCK_GR64_NOREX_NOSP: return true;
    4861             :     case MCK_Reg37: return true;
    4862             :     case MCK_GR64_NOREX: return true;
    4863             :     case MCK_Reg57: return true;
    4864             :     case MCK_Reg56: return true;
    4865             :     case MCK_GR64_NOSP: return true;
    4866             :     case MCK_Reg38: return true;
    4867             :     case MCK_GR64: return true;
    4868             :     }
    4869             : 
    4870         273 :   case MCK_RCX:
    4871             :     switch (B) {
    4872             :     default: return false;
    4873             :     case MCK_Reg52: return true;
    4874             :     case MCK_Reg34: return true;
    4875             :     case MCK_Reg53: return true;
    4876             :     case MCK_Reg50: return true;
    4877             :     case MCK_Reg58: return true;
    4878             :     case MCK_GR64_ABCD: return true;
    4879             :     case MCK_Reg42: return true;
    4880             :     case MCK_Reg61: return true;
    4881             :     case MCK_Reg45: return true;
    4882             :     case MCK_Reg48: return true;
    4883             :     case MCK_Reg54: return true;
    4884             :     case MCK_Reg60: return true;
    4885             :     case MCK_Reg46: return true;
    4886             :     case MCK_Reg49: return true;
    4887             :     case MCK_Reg55: return true;
    4888             :     case MCK_Reg59: return true;
    4889             :     case MCK_GR64_NOREX_NOSP: return true;
    4890             :     case MCK_Reg37: return true;
    4891             :     case MCK_Reg43: return true;
    4892             :     case MCK_GR64_TCW64: return true;
    4893             :     case MCK_GR64_NOREX: return true;
    4894             :     case MCK_GR64_TC: return true;
    4895             :     case MCK_Reg57: return true;
    4896             :     case MCK_Reg56: return true;
    4897             :     case MCK_GR64_NOSP: return true;
    4898             :     case MCK_Reg38: return true;
    4899             :     case MCK_GR64: return true;
    4900             :     }
    4901             : 
    4902        1011 :   case MCK_RDX:
    4903             :     switch (B) {
    4904             :     default: return false;
    4905             :     case MCK_Reg52: return true;
    4906             :     case MCK_GR64_AD: return true;
    4907             :     case MCK_Reg34: return true;
    4908             :     case MCK_Reg53: return true;
    4909             :     case MCK_Reg50: return true;
    4910             :     case MCK_Reg58: return true;
    4911             :     case MCK_GR64_ABCD: return true;
    4912             :     case MCK_Reg42: return true;
    4913             :     case MCK_Reg61: return true;
    4914             :     case MCK_Reg45: return true;
    4915             :     case MCK_Reg48: return true;
    4916             :     case MCK_Reg54: return true;
    4917             :     case MCK_Reg60: return true;
    4918             :     case MCK_Reg46: return true;
    4919             :     case MCK_Reg49: return true;
    4920             :     case MCK_Reg55: return true;
    4921             :     case MCK_Reg59: return true;
    4922             :     case MCK_GR64_NOREX_NOSP: return true;
    4923             :     case MCK_Reg37: return true;
    4924             :     case MCK_Reg43: return true;
    4925             :     case MCK_GR64_TCW64: return true;
    4926             :     case MCK_GR64_NOREX: return true;
    4927             :     case MCK_GR64_TC: return true;
    4928             :     case MCK_Reg57: return true;
    4929             :     case MCK_Reg56: return true;
    4930             :     case MCK_GR64_NOSP: return true;
    4931             :     case MCK_Reg38: return true;
    4932             :     case MCK_GR64: return true;
    4933             :     }
    4934             : 
    4935         524 :   case MCK_SS:
    4936         524 :     return B == MCK_SEGMENT_REG;
    4937             : 
    4938         190 :   case MCK_ST0:
    4939         190 :     return B == MCK_RST;
    4940             : 
    4941         738 :   case MCK_XMM0:
    4942         738 :     switch (B) {
    4943             :     default: return false;
    4944           4 :     case MCK_VR128L: return true;
    4945         564 :     case MCK_FR32: return true;
    4946          56 :     case MCK_FR32X: return true;
    4947             :     }
    4948             : 
    4949           0 :   case MCK_Reg24:
    4950             :     switch (B) {
    4951             :     default: return false;
    4952             :     case MCK_Reg25: return true;
    4953             :     case MCK_GR32_TC: return true;
    4954             :     case MCK_GR32_ABCD: return true;
    4955             :     case MCK_Reg26: return true;
    4956             :     case MCK_Reg27: return true;
    4957             :     case MCK_GR32_NOREX_NOSP: return true;
    4958             :     case MCK_GR32_NOREX: return true;
    4959             :     case MCK_Reg21: return true;
    4960             :     case MCK_Reg29: return true;
    4961             :     case MCK_GR32_NOAX: return true;
    4962             :     case MCK_GR32_NOSP: return true;
    4963             :     case MCK_GR32: return true;
    4964             :     case MCK_Reg18: return true;
    4965             :     case MCK_LOW32_ADDR_ACCESS: return true;
    4966             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    4967             :     }
    4968             : 
    4969           0 :   case MCK_Reg52:
    4970             :     switch (B) {
    4971             :     default: return false;
    4972             :     case MCK_Reg34: return true;
    4973             :     case MCK_Reg53: return true;
    4974             :     case MCK_Reg50: return true;
    4975             :     case MCK_Reg58: return true;
    4976             :     case MCK_GR64_ABCD: return true;
    4977             :     case MCK_Reg42: return true;
    4978             :     case MCK_Reg61: return true;
    4979             :     case MCK_Reg45: return true;
    4980             :     case MCK_Reg48: return true;
    4981             :     case MCK_Reg54: return true;
    4982             :     case MCK_Reg60: return true;
    4983             :     case MCK_Reg46: return true;
    4984             :     case MCK_Reg49: return true;
    4985             :     case MCK_Reg55: return true;
    4986             :     case MCK_Reg59: return true;
    4987             :     case MCK_GR64_NOREX_NOSP: return true;
    4988             :     case MCK_Reg37: return true;
    4989             :     case MCK_Reg43: return true;
    4990             :     case MCK_GR64_TCW64: return true;
    4991             :     case MCK_GR64_NOREX: return true;
    4992             :     case MCK_GR64_TC: return true;
    4993             :     case MCK_Reg57: return true;
    4994             :     case MCK_Reg56: return true;
    4995             :     case MCK_GR64_NOSP: return true;
    4996             :     case MCK_Reg38: return true;
    4997             :     case MCK_GR64: return true;
    4998             :     }
    4999             : 
    5000           0 :   case MCK_Reg65:
    5001             :     switch (B) {
    5002             :     default: return false;
    5003             :     case MCK_GR64_NOREX: return true;
    5004             :     case MCK_GR64: return true;
    5005             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5006             :     }
    5007             : 
    5008           0 :   case MCK_GR32_AD:
    5009             :     switch (B) {
    5010             :     default: return false;
    5011             :     case MCK_GR32_TC: return true;
    5012             :     case MCK_GR32_ABCD: return true;
    5013             :     case MCK_GR32_NOREX_NOSP: return true;
    5014             :     case MCK_GR32_NOREX: return true;
    5015             :     case MCK_Reg21: return true;
    5016             :     case MCK_GR32_NOSP: return true;
    5017             :     case MCK_GR32: return true;
    5018             :     case MCK_Reg18: return true;
    5019             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5020             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5021             :     }
    5022             : 
    5023           0 :   case MCK_GR64_AD:
    5024             :     switch (B) {
    5025             :     default: return false;
    5026             :     case MCK_Reg34: return true;
    5027             :     case MCK_Reg50: return true;
    5028             :     case MCK_GR64_ABCD: return true;
    5029             :     case MCK_Reg42: return true;
    5030             :     case MCK_Reg45: return true;
    5031             :     case MCK_Reg48: return true;
    5032             :     case MCK_Reg46: return true;
    5033             :     case MCK_Reg49: return true;
    5034             :     case MCK_GR64_NOREX_NOSP: return true;
    5035             :     case MCK_Reg37: return true;
    5036             :     case MCK_Reg43: return true;
    5037             :     case MCK_GR64_TCW64: return true;
    5038             :     case MCK_GR64_NOREX: return true;
    5039             :     case MCK_GR64_TC: return true;
    5040             :     case MCK_GR64_NOSP: return true;
    5041             :     case MCK_Reg38: return true;
    5042             :     case MCK_GR64: return true;
    5043             :     }
    5044             : 
    5045           0 :   case MCK_Reg25:
    5046             :     switch (B) {
    5047             :     default: return false;
    5048             :     case MCK_GR32_ABCD: return true;
    5049             :     case MCK_Reg26: return true;
    5050             :     case MCK_Reg27: return true;
    5051             :     case MCK_GR32_NOREX_NOSP: return true;
    5052             :     case MCK_GR32_NOREX: return true;
    5053             :     case MCK_Reg21: return true;
    5054             :     case MCK_Reg29: return true;
    5055             :     case MCK_GR32_NOAX: return true;
    5056             :     case MCK_GR32_NOSP: return true;
    5057             :     case MCK_GR32: return true;
    5058             :     case MCK_Reg18: return true;
    5059             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5060             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5061             :     }
    5062             : 
    5063           0 :   case MCK_Reg34:
    5064             :     switch (B) {
    5065             :     default: return false;
    5066             :     case MCK_Reg50: return true;
    5067             :     case MCK_GR64_ABCD: return true;
    5068             :     case MCK_Reg42: return true;
    5069             :     case MCK_Reg45: return true;
    5070             :     case MCK_Reg48: return true;
    5071             :     case MCK_Reg46: return true;
    5072             :     case MCK_Reg49: return true;
    5073             :     case MCK_GR64_NOREX_NOSP: return true;
    5074             :     case MCK_Reg37: return true;
    5075             :     case MCK_Reg43: return true;
    5076             :     case MCK_GR64_TCW64: return true;
    5077             :     case MCK_GR64_NOREX: return true;
    5078             :     case MCK_GR64_TC: return true;
    5079             :     case MCK_GR64_NOSP: return true;
    5080             :     case MCK_Reg38: return true;
    5081             :     case MCK_GR64: return true;
    5082             :     }
    5083             : 
    5084           0 :   case MCK_Reg53:
    5085             :     switch (B) {
    5086             :     default: return false;
    5087             :     case MCK_GR64_ABCD: return true;
    5088             :     case MCK_Reg54: return true;
    5089             :     case MCK_Reg55: return true;
    5090             :     case MCK_GR64_NOREX_NOSP: return true;
    5091             :     case MCK_Reg37: return true;
    5092             :     case MCK_GR64_NOREX: return true;
    5093             :     case MCK_Reg57: return true;
    5094             :     case MCK_Reg56: return true;
    5095             :     case MCK_GR64_NOSP: return true;
    5096             :     case MCK_Reg38: return true;
    5097             :     case MCK_GR64: return true;
    5098             :     }
    5099             : 
    5100           0 :   case MCK_GR32_TC:
    5101             :     switch (B) {
    5102             :     default: return false;
    5103             :     case MCK_GR32_ABCD: return true;
    5104             :     case MCK_GR32_NOREX_NOSP: return true;
    5105             :     case MCK_GR32_NOREX: return true;
    5106             :     case MCK_Reg21: return true;
    5107             :     case MCK_GR32_NOSP: return true;
    5108             :     case MCK_GR32: return true;
    5109             :     case MCK_Reg18: return true;
    5110             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5111             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5112             :     }
    5113             : 
    5114           0 :   case MCK_Reg50:
    5115             :     switch (B) {
    5116             :     default: return false;
    5117             :     case MCK_Reg45: return true;
    5118             :     case MCK_Reg49: return true;
    5119             :     case MCK_GR64_TCW64: return true;
    5120             :     case MCK_GR64_NOREX: return true;
    5121             :     case MCK_GR64_TC: return true;
    5122             :     case MCK_GR64: return true;
    5123             :     }
    5124             : 
    5125         542 :   case MCK_Reg58:
    5126             :     switch (B) {
    5127             :     default: return false;
    5128             :     case MCK_Reg42: return true;
    5129             :     case MCK_Reg45: return true;
    5130             :     case MCK_Reg54: return true;
    5131             :     case MCK_Reg55: return true;
    5132             :     case MCK_Reg59: return true;
    5133             :     case MCK_GR64_NOREX_NOSP: return true;
    5134             :     case MCK_Reg37: return true;
    5135             :     case MCK_Reg43: return true;
    5136             :     case MCK_GR64_NOREX: return true;
    5137             :     case MCK_GR64_TC: return true;
    5138             :     case MCK_Reg57: return true;
    5139             :     case MCK_Reg56: return true;
    5140             :     case MCK_GR64_NOSP: return true;
    5141             :     case MCK_Reg38: return true;
    5142             :     case MCK_GR64: return true;
    5143             :     }
    5144             : 
    5145         554 :   case MCK_GR16_ABCD:
    5146         554 :     switch (B) {
    5147             :     default: return false;
    5148           0 :     case MCK_GR16_NOREX: return true;
    5149         128 :     case MCK_GR16: return true;
    5150             :     }
    5151             : 
    5152           0 :   case MCK_GR32_ABCD:
    5153             :     switch (B) {
    5154             :     default: return false;
    5155             :     case MCK_GR32_NOREX_NOSP: return true;
    5156             :     case MCK_GR32_NOREX: return true;
    5157             :     case MCK_Reg21: return true;
    5158             :     case MCK_GR32_NOSP: return true;
    5159             :     case MCK_GR32: return true;
    5160             :     case MCK_Reg18: return true;
    5161             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5162             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5163             :     }
    5164             : 
    5165           0 :   case MCK_GR64_ABCD:
    5166             :     switch (B) {
    5167             :     default: return false;
    5168             :     case MCK_GR64_NOREX_NOSP: return true;
    5169             :     case MCK_Reg37: return true;
    5170             :     case MCK_GR64_NOREX: return true;
    5171             :     case MCK_GR64_NOSP: return true;
    5172             :     case MCK_Reg38: return true;
    5173             :     case MCK_GR64: return true;
    5174             :     }
    5175             : 
    5176          39 :   case MCK_GR8_ABCD_H:
    5177          39 :     switch (B) {
    5178             :     default: return false;
    5179           0 :     case MCK_GR8_NOREX: return true;
    5180           8 :     case MCK_GR8: return true;
    5181             :     }
    5182             : 
    5183         135 :   case MCK_GR8_ABCD_L:
    5184         135 :     switch (B) {
    5185             :     default: return false;
    5186           0 :     case MCK_GR8_NOREX: return true;
    5187          83 :     case MCK_GR8: return true;
    5188             :     }
    5189             : 
    5190           0 :   case MCK_Reg42:
    5191             :     switch (B) {
    5192             :     default: return false;
    5193             :     case MCK_Reg45: return true;
    5194             :     case MCK_GR64_NOREX_NOSP: return true;
    5195             :     case MCK_Reg37: return true;
    5196             :     case MCK_Reg43: return true;
    5197             :     case MCK_GR64_NOREX: return true;
    5198             :     case MCK_GR64_TC: return true;
    5199             :     case MCK_GR64_NOSP: return true;
    5200             :     case MCK_Reg38: return true;
    5201             :     case MCK_GR64: return true;
    5202             :     }
    5203             : 
    5204        1332 :   case MCK_Reg61:
    5205             :     switch (B) {
    5206             :     default: return false;
    5207             :     case MCK_Reg48: return true;
    5208             :     case MCK_Reg60: return true;
    5209             :     case MCK_Reg46: return true;
    5210             :     case MCK_Reg49: return true;
    5211             :     case MCK_Reg59: return true;
    5212             :     case MCK_Reg43: return true;
    5213             :     case MCK_GR64_TCW64: return true;
    5214             :     case MCK_GR64_TC: return true;
    5215             :     case MCK_Reg57: return true;
    5216             :     case MCK_Reg56: return true;
    5217             :     case MCK_GR64_NOSP: return true;
    5218             :     case MCK_Reg38: return true;
    5219             :     case MCK_GR64: return true;
    5220             :     }
    5221             : 
    5222        1716 :   case MCK_Reg26:
    5223             :     switch (B) {
    5224             :     default: return false;
    5225             :     case MCK_Reg27: return true;
    5226             :     case MCK_GR32_NOREX_NOSP: return true;
    5227             :     case MCK_GR32_NOREX: return true;
    5228             :     case MCK_Reg21: return true;
    5229             :     case MCK_Reg29: return true;
    5230             :     case MCK_GR32_NOAX: return true;
    5231             :     case MCK_GR32_NOSP: return true;
    5232             :     case MCK_GR32: return true;
    5233             :     case MCK_Reg18: return true;
    5234             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5235             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5236             :     }
    5237             : 
    5238           0 :   case MCK_Reg45:
    5239             :     switch (B) {
    5240             :     default: return false;
    5241             :     case MCK_GR64_NOREX: return true;
    5242             :     case MCK_GR64_TC: return true;
    5243             :     case MCK_GR64: return true;
    5244             :     }
    5245             : 
    5246           0 :   case MCK_Reg48:
    5247             :     switch (B) {
    5248             :     default: return false;
    5249             :     case MCK_Reg46: return true;
    5250             :     case MCK_Reg49: return true;
    5251             :     case MCK_Reg43: return true;
    5252             :     case MCK_GR64_TCW64: return true;
    5253             :     case MCK_GR64_TC: return true;
    5254             :     case MCK_GR64_NOSP: return true;
    5255             :     case MCK_Reg38: return true;
    5256             :     case MCK_GR64: return true;
    5257             :     }
    5258             : 
    5259           0 :   case MCK_Reg54:
    5260             :     switch (B) {
    5261             :     default: return false;
    5262             :     case MCK_Reg55: return true;
    5263             :     case MCK_GR64_NOREX_NOSP: return true;
    5264             :     case MCK_Reg37: return true;
    5265             :     case MCK_GR64_NOREX: return true;
    5266             :     case MCK_Reg57: return true;
    5267             :     case MCK_Reg56: return true;
    5268             :     case MCK_GR64_NOSP: return true;
    5269             :     case MCK_Reg38: return true;
    5270             :     case MCK_GR64: return true;
    5271             :     }
    5272             : 
    5273          58 :   case MCK_Reg60:
    5274             :     switch (B) {
    5275             :     default: return false;
    5276             :     case MCK_Reg46: return true;
    5277             :     case MCK_GR64_TCW64: return true;
    5278             :     case MCK_Reg57: return true;
    5279             :     case MCK_Reg56: return true;
    5280             :     case MCK_GR64_NOSP: return true;
    5281             :     case MCK_Reg38: return true;
    5282             :     case MCK_GR64: return true;
    5283             :     }
    5284             : 
    5285         297 :   case MCK_Reg27:
    5286             :     switch (B) {
    5287             :     default: return false;
    5288             :     case MCK_GR32_NOREX: return true;
    5289             :     case MCK_Reg21: return true;
    5290             :     case MCK_GR32_NOAX: return true;
    5291             :     case MCK_GR32: return true;
    5292             :     case MCK_Reg18: return true;
    5293             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5294             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5295             :     }
    5296             : 
    5297           0 :   case MCK_Reg46:
    5298             :     switch (B) {
    5299             :     default: return false;
    5300             :     case MCK_GR64_TCW64: return true;
    5301             :     case MCK_GR64_NOSP: return true;
    5302             :     case MCK_Reg38: return true;
    5303             :     case MCK_GR64: return true;
    5304             :     }
    5305             : 
    5306           0 :   case MCK_Reg49:
    5307           0 :     switch (B) {
    5308             :     default: return false;
    5309           0 :     case MCK_GR64_TCW64: return true;
    5310           0 :     case MCK_GR64_TC: return true;
    5311           0 :     case MCK_GR64: return true;
    5312             :     }
    5313             : 
    5314         476 :   case MCK_Reg55:
    5315             :     switch (B) {
    5316             :     default: return false;
    5317             :     case MCK_Reg37: return true;
    5318             :     case MCK_GR64_NOREX: return true;
    5319             :     case MCK_Reg56: return true;
    5320             :     case MCK_Reg38: return true;
    5321             :     case MCK_GR64: return true;
    5322             :     }
    5323             : 
    5324           0 :   case MCK_Reg59:
    5325             :     switch (B) {
    5326             :     default: return false;
    5327             :     case MCK_Reg43: return true;
    5328             :     case MCK_GR64_TC: return true;
    5329             :     case MCK_Reg57: return true;
    5330             :     case MCK_Reg56: return true;
    5331             :     case MCK_GR64_NOSP: return true;
    5332             :     case MCK_Reg38: return true;
    5333             :     case MCK_GR64: return true;
    5334             :     }
    5335             : 
    5336           0 :   case MCK_GR32_NOREX_NOSP:
    5337             :     switch (B) {
    5338             :     default: return false;
    5339             :     case MCK_GR32_NOREX: return true;
    5340             :     case MCK_Reg21: return true;
    5341             :     case MCK_GR32_NOSP: return true;
    5342             :     case MCK_GR32: return true;
    5343             :     case MCK_Reg18: return true;
    5344             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5345             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5346             :     }
    5347             : 
    5348           0 :   case MCK_GR64_NOREX_NOSP:
    5349             :     switch (B) {
    5350             :     default: return false;
    5351             :     case MCK_Reg37: return true;
    5352             :     case MCK_GR64_NOREX: return true;
    5353             :     case MCK_GR64_NOSP: return true;
    5354             :     case MCK_Reg38: return true;
    5355             :     case MCK_GR64: return true;
    5356             :     }
    5357             : 
    5358        5800 :   case MCK_VK16WM:
    5359        5800 :     return B == MCK_VK1;
    5360             : 
    5361           0 :   case MCK_Reg37:
    5362             :     switch (B) {
    5363             :     default: return false;
    5364             :     case MCK_GR64_NOREX: return true;
    5365             :     case MCK_Reg38: return true;
    5366             :     case MCK_GR64: return true;
    5367             :     }
    5368             : 
    5369           0 :   case MCK_Reg43:
    5370             :     switch (B) {
    5371             :     default: return false;
    5372             :     case MCK_GR64_TC: return true;
    5373             :     case MCK_GR64_NOSP: return true;
    5374             :     case MCK_Reg38: return true;
    5375             :     case MCK_GR64: return true;
    5376             :     }
    5377             : 
    5378       29437 :   case MCK_Reg78:
    5379       29437 :     switch (B) {
    5380             :     default: return false;
    5381           0 :     case MCK_Reg79: return true;
    5382       10968 :     case MCK_VR512: return true;
    5383             :     }
    5384             : 
    5385       25077 :   case MCK_Reg81:
    5386       25077 :     switch (B) {
    5387             :     default: return false;
    5388           0 :     case MCK_Reg79: return true;
    5389        9437 :     case MCK_VR512: return true;
    5390             :     }
    5391             : 
    5392           4 :   case MCK_GR16_NOREX:
    5393           4 :     return B == MCK_GR16;
    5394             : 
    5395           0 :   case MCK_GR32_NOREX:
    5396             :     switch (B) {
    5397             :     default: return false;
    5398             :     case MCK_Reg21: return true;
    5399             :     case MCK_GR32: return true;
    5400             :     case MCK_Reg18: return true;
    5401             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5402             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5403             :     }
    5404             : 
    5405           0 :   case MCK_GR64_TCW64:
    5406           0 :     return B == MCK_GR64;
    5407             : 
    5408           0 :   case MCK_GR8_NOREX:
    5409           0 :     return B == MCK_GR8;
    5410             : 
    5411        7739 :   case MCK_VR128H:
    5412        7739 :     switch (B) {
    5413             :     default: return false;
    5414        3249 :     case MCK_FR32: return true;
    5415        3606 :     case MCK_FR32X: return true;
    5416             :     }
    5417             : 
    5418       12745 :   case MCK_VR128L:
    5419       12745 :     switch (B) {
    5420             :     default: return false;
    5421        6904 :     case MCK_FR32: return true;
    5422        3436 :     case MCK_FR32X: return true;
    5423             :     }
    5424             : 
    5425        1899 :   case MCK_VR256H:
    5426        1899 :     switch (B) {
    5427             :     default: return false;
    5428         632 :     case MCK_VR256: return true;
    5429         226 :     case MCK_VR256X: return true;
    5430             :     }
    5431             : 
    5432        3127 :   case MCK_VR256L:
    5433        3127 :     switch (B) {
    5434             :     default: return false;
    5435        1156 :     case MCK_VR256: return true;
    5436         344 :     case MCK_VR256X: return true;
    5437             :     }
    5438             : 
    5439           0 :   case MCK_Reg21:
    5440           0 :     switch (B) {
    5441             :     default: return false;
    5442           0 :     case MCK_Reg18: return true;
    5443           0 :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5444             :     }
    5445             : 
    5446           0 :   case MCK_GR64_NOREX:
    5447           0 :     return B == MCK_GR64;
    5448             : 
    5449           0 :   case MCK_GR64_TC:
    5450           0 :     return B == MCK_GR64;
    5451             : 
    5452        1040 :   case MCK_Reg29:
    5453             :     switch (B) {
    5454             :     default: return false;
    5455             :     case MCK_GR32_NOAX: return true;
    5456             :     case MCK_GR32_NOSP: return true;
    5457             :     case MCK_GR32: return true;
    5458             :     case MCK_Reg18: return true;
    5459             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5460             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5461             :     }
    5462             : 
    5463         259 :   case MCK_Reg57:
    5464             :     switch (B) {
    5465             :     default: return false;
    5466             :     case MCK_Reg56: return true;
    5467             :     case MCK_GR64_NOSP: return true;
    5468             :     case MCK_Reg38: return true;
    5469             :     case MCK_GR64: return true;
    5470             :     }
    5471             : 
    5472           0 :   case MCK_Reg56:
    5473           0 :     switch (B) {
    5474             :     default: return false;
    5475           0 :     case MCK_Reg38: return true;
    5476           0 :     case MCK_GR64: return true;
    5477             :     }
    5478             : 
    5479          68 :   case MCK_GR32_NOAX:
    5480             :     switch (B) {
    5481             :     default: return false;
    5482             :     case MCK_GR32: return true;
    5483             :     case MCK_Reg18: return true;
    5484             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5485             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5486             :     }
    5487             : 
    5488           0 :   case MCK_GR32_NOSP:
    5489             :     switch (B) {
    5490             :     default: return false;
    5491             :     case MCK_GR32: return true;
    5492             :     case MCK_Reg18: return true;
    5493             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5494             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5495             :     }
    5496             : 
    5497           0 :   case MCK_GR64_NOSP:
    5498           0 :     switch (B) {
    5499             :     default: return false;
    5500           0 :     case MCK_Reg38: return true;
    5501           0 :     case MCK_GR64: return true;
    5502             :     }
    5503             : 
    5504           0 :   case MCK_Reg38:
    5505           0 :     return B == MCK_GR64;
    5506             : 
    5507           0 :   case MCK_Reg79:
    5508           0 :     return B == MCK_VR512;
    5509             : 
    5510       36048 :   case MCK_FR32:
    5511       36048 :     return B == MCK_FR32X;
    5512             : 
    5513       16987 :   case MCK_GR32:
    5514             :     switch (B) {
    5515             :     default: return false;
    5516             :     case MCK_Reg18: return true;
    5517             :     case MCK_LOW32_ADDR_ACCESS: return true;
    5518             :     case MCK_LOW32_ADDR_ACCESS_RBP: return true;
    5519             :     }
    5520             : 
    5521       22303 :   case MCK_VR256:
    5522       22303 :     return B == MCK_VR256X;
    5523             : 
    5524           0 :   case MCK_Reg18:
    5525           0 :     return B == MCK_LOW32_ADDR_ACCESS_RBP;
    5526             : 
    5527           0 :   case MCK_LOW32_ADDR_ACCESS:
    5528           0 :     return B == MCK_LOW32_ADDR_ACCESS_RBP;
    5529             : 
    5530         267 :   case MCK_ImmSExti64i8:
    5531             :     switch (B) {
    5532             :     default: return false;
    5533             :     case MCK_ImmSExti16i8: return true;
    5534             :     case MCK_ImmSExti32i8: return true;
    5535             :     case MCK_ImmSExti64i32: return true;
    5536             :     case MCK_Imm: return true;
    5537             :     }
    5538             : 
    5539         446 :   case MCK_ImmSExti16i8:
    5540         446 :     switch (B) {
    5541             :     default: return false;
    5542           0 :     case MCK_ImmSExti64i32: return true;
    5543           0 :     case MCK_Imm: return true;
    5544             :     }
    5545             : 
    5546         761 :   case MCK_ImmSExti32i8:
    5547         761 :     return B == MCK_Imm;
    5548             : 
    5549         750 :   case MCK_ImmSExti64i32:
    5550         750 :     return B == MCK_Imm;
    5551             : 
    5552           1 :   case MCK_AbsMem16:
    5553           1 :     switch (B) {
    5554             :     default: return false;
    5555           0 :     case MCK_AbsMem: return true;
    5556           0 :     case MCK_Mem: return true;
    5557             :     }
    5558             : 
    5559          29 :   case MCK_DstIdx16:
    5560          29 :     switch (B) {
    5561             :     default: return false;
    5562           0 :     case MCK_Mem16: return true;
    5563           0 :     case MCK_Mem: return true;
    5564             :     }
    5565             : 
    5566          36 :   case MCK_DstIdx32:
    5567          36 :     switch (B) {
    5568             :     default: return false;
    5569           0 :     case MCK_Mem32: return true;
    5570           0 :     case MCK_Mem: return true;
    5571             :     }
    5572             : 
    5573          17 :   case MCK_DstIdx64:
    5574          17 :     switch (B) {
    5575             :     default: return false;
    5576           0 :     case MCK_Mem64: return true;
    5577           0 :     case MCK_Mem: return true;
    5578             :     }
    5579             : 
    5580          35 :   case MCK_DstIdx8:
    5581          35 :     switch (B) {
    5582             :     default: return false;
    5583           0 :     case MCK_Mem8: return true;
    5584           0 :     case MCK_Mem: return true;
    5585             :     }
    5586             : 
    5587        2096 :   case MCK_MemOffs16_16:
    5588        2096 :     switch (B) {
    5589             :     default: return false;
    5590           0 :     case MCK_Mem16: return true;
    5591           0 :     case MCK_Mem: return true;
    5592             :     }
    5593             : 
    5594        3441 :   case MCK_MemOffs16_32:
    5595        3441 :     switch (B) {
    5596             :     default: return false;
    5597           0 :     case MCK_Mem32: return true;
    5598           0 :     case MCK_Mem: return true;
    5599             :     }
    5600             : 
    5601        2110 :   case MCK_MemOffs16_8:
    5602        2110 :     switch (B) {
    5603             :     default: return false;
    5604           0 :     case MCK_Mem8: return true;
    5605           0 :     case MCK_Mem: return true;
    5606             :     }
    5607             : 
    5608        2092 :   case MCK_MemOffs32_16:
    5609        2092 :     switch (B) {
    5610             :     default: return false;
    5611           0 :     case MCK_Mem16: return true;
    5612           0 :     case MCK_Mem: return true;
    5613             :     }
    5614             : 
    5615        3383 :   case MCK_MemOffs32_32:
    5616        3383 :     switch (B) {
    5617             :     default: return false;
    5618           0 :     case MCK_Mem32: return true;
    5619           0 :     case MCK_Mem: return true;
    5620             :     }
    5621             : 
    5622        2145 :   case MCK_MemOffs32_64:
    5623        2145 :     switch (B) {
    5624             :     default: return false;
    5625           0 :     case MCK_Mem64: return true;
    5626           0 :     case MCK_Mem: return true;
    5627             :     }
    5628             : 
    5629        2107 :   case MCK_MemOffs32_8:
    5630        2107 :     switch (B) {
    5631             :     default: return false;
    5632           0 :     case MCK_Mem8: return true;
    5633           0 :     case MCK_Mem: return true;
    5634             :     }
    5635             : 
    5636           4 :   case MCK_MemOffs64_16:
    5637           4 :     switch (B) {
    5638             :     default: return false;
    5639           0 :     case MCK_Mem16: return true;
    5640           0 :     case MCK_Mem: return true;
    5641             :     }
    5642             : 
    5643           4 :   case MCK_MemOffs64_32:
    5644           4 :     switch (B) {
    5645             :     default: return false;
    5646           0 :     case MCK_Mem32: return true;
    5647           0 :     case MCK_Mem: return true;
    5648             :     }
    5649             : 
    5650           0 :   case MCK_MemOffs64_64:
    5651           0 :     switch (B) {
    5652             :     default: return false;
    5653           0 :     case MCK_Mem64: return true;
    5654           0 :     case MCK_Mem: return true;
    5655             :     }
    5656             : 
    5657           4 :   case MCK_MemOffs64_8:
    5658           4 :     switch (B) {
    5659             :     default: return false;
    5660           0 :     case MCK_Mem8: return true;
    5661           0 :     case MCK_Mem: return true;
    5662             :     }
    5663             : 
    5664           8 :   case MCK_SrcIdx16:
    5665           8 :     switch (B) {
    5666             :     default: return false;
    5667           0 :     case MCK_Mem16: return true;
    5668           0 :     case MCK_Mem: return true;
    5669             :     }
    5670             : 
    5671          19 :   case MCK_SrcIdx32:
    5672          19 :     switch (B) {
    5673             :     default: return false;
    5674           0 :     case MCK_Mem32: return true;
    5675           0 :     case MCK_Mem: return true;
    5676             :     }
    5677             : 
    5678           0 :   case MCK_SrcIdx64:
    5679           0 :     switch (B) {
    5680             :     default: return false;
    5681           0 :     case MCK_Mem64: return true;
    5682           0 :     case MCK_Mem: return true;
    5683             :     }
    5684             : 
    5685          35 :   case MCK_SrcIdx8:
    5686          35 :     switch (B) {
    5687             :     default: return false;
    5688           0 :     case MCK_Mem8: return true;
    5689           0 :     case MCK_Mem: return true;
    5690             :     }
    5691             : 
    5692         170 :   case MCK_AbsMem:
    5693         170 :     return B == MCK_Mem;
    5694             : 
    5695        6379 :   case MCK_Mem128:
    5696        6379 :     return B == MCK_Mem;
    5697             : 
    5698           0 :   case MCK_Mem128_RC128:
    5699           0 :     return B == MCK_Mem;
    5700             : 
    5701         126 :   case MCK_Mem128_RC128X:
    5702         126 :     return B == MCK_Mem;
    5703             : 
    5704           4 :   case MCK_Mem128_RC256:
    5705           4 :     return B == MCK_Mem;
    5706             : 
    5707          68 :   case MCK_Mem128_RC256X:
    5708          68 :     return B == MCK_Mem;
    5709             : 
    5710       11488 :   case MCK_Mem16:
    5711       11488 :     return B == MCK_Mem;
    5712             : 
    5713        5274 :   case MCK_Mem256:
    5714        5274 :     return B == MCK_Mem;
    5715             : 
    5716           0 :   case MCK_Mem256_RC128:
    5717           0 :     return B == MCK_Mem;
    5718             : 
    5719          22 :   case MCK_Mem256_RC128X:
    5720          22 :     return B == MCK_Mem;
    5721             : 
    5722           0 :   case MCK_Mem256_RC256:
    5723           0 :     return B == MCK_Mem;
    5724             : 
    5725          44 :   case MCK_Mem256_RC256X:
    5726          44 :     return B == MCK_Mem;
    5727             : 
    5728          22 :   case MCK_Mem256_RC512:
    5729          22 :     return B == MCK_Mem;
    5730             : 
    5731       13412 :   case MCK_Mem32:
    5732       13412 :     return B == MCK_Mem;
    5733             : 
    5734        6009 :   case MCK_Mem512:
    5735        6009 :     return B == MCK_Mem;
    5736             : 
    5737           0 :   case MCK_Mem512_RC256X:
    5738           0 :     return B == MCK_Mem;
    5739             : 
    5740           0 :   case MCK_Mem512_RC512:
    5741           0 :     return B == MCK_Mem;
    5742             : 
    5743       14741 :   case MCK_Mem64:
    5744       14741 :     return B == MCK_Mem;
    5745             : 
    5746           0 :   case MCK_Mem64_RC128:
    5747           0 :     return B == MCK_Mem;
    5748             : 
    5749           0 :   case MCK_Mem64_RC128X:
    5750           0 :     return B == MCK_Mem;
    5751             : 
    5752           5 :   case MCK_Mem80:
    5753           5 :     return B == MCK_Mem;
    5754             : 
    5755        8833 :   case MCK_Mem8:
    5756        8833 :     return B == MCK_Mem;
    5757             :   }
    5758             : }
    5759             : 
    5760      730030 : static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
    5761      730030 :   X86Operand &Operand = (X86Operand&)GOp;
    5762      730030 :   if (Kind == InvalidMatchClass)
    5763             :     return MCTargetAsmParser::Match_InvalidOperand;
    5764             : 
    5765      723651 :   if (Operand.isToken())
    5766      146668 :     return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
    5767             :              MCTargetAsmParser::Match_Success :
    5768             :              MCTargetAsmParser::Match_InvalidOperand;
    5769             : 
    5770      650317 :   switch (Kind) {
    5771             :   default: break;
    5772             :   // 'AVX512RC' class
    5773        3068 :   case MCK_AVX512RC:
    5774        3068 :     if (Operand.isAVX512RC())
    5775             :       return MCTargetAsmParser::Match_Success;
    5776             :     break;
    5777             :   // 'ImmSExti64i8' class
    5778         764 :   case MCK_ImmSExti64i8:
    5779         397 :     if (Operand.isImmSExti64i8())
    5780             :       return MCTargetAsmParser::Match_Success;
    5781             :     break;
    5782             :   // 'ImmSExti16i8' class
    5783         843 :   case MCK_ImmSExti16i8:
    5784         843 :     if (Operand.isImmSExti16i8())
    5785             :       return MCTargetAsmParser::Match_Success;
    5786             :     break;
    5787             :   // 'ImmSExti32i8' class
    5788        1372 :   case MCK_ImmSExti32i8:
    5789        1372 :     if (Operand.isImmSExti32i8())
    5790             :       return MCTargetAsmParser::Match_Success;
    5791             :     break;
    5792             :   // 'ImmSExti64i32' class
    5793        1137 :   case MCK_ImmSExti64i32:
    5794         303 :     if (Operand.isImmSExti64i32())
    5795             :       return MCTargetAsmParser::Match_Success;
    5796             :     break;
    5797             :   // 'Imm' class
    5798       33029 :   case MCK_Imm:
    5799       33029 :     if (Operand.isImm())
    5800             :       return MCTargetAsmParser::Match_Success;
    5801             :     break;
    5802             :   // 'ImmUnsignedi8' class
    5803       25203 :   case MCK_ImmUnsignedi8:
    5804       25203 :     if (Operand.isImmUnsignedi8())
    5805             :       return MCTargetAsmParser::Match_Success;
    5806             :     break;
    5807             :   // 'GR32orGR64' class
    5808         158 :   case MCK_GR32orGR64:
    5809         158 :     if (Operand.isGR32orGR64())
    5810             :       return MCTargetAsmParser::Match_Success;
    5811             :     break;
    5812             :   // 'AbsMem16' class
    5813           1 :   case MCK_AbsMem16:
    5814             :     if (Operand.isAbsMem16())
    5815             :       return MCTargetAsmParser::Match_Success;
    5816             :     break;
    5817             :   // 'DstIdx16' class
    5818          96 :   case MCK_DstIdx16:
    5819          96 :     if (Operand.isDstIdx16())
    5820             :       return MCTargetAsmParser::Match_Success;
    5821             :     break;
    5822             :   // 'DstIdx32' class
    5823         104 :   case MCK_DstIdx32:
    5824         104 :     if (Operand.isDstIdx32())
    5825             :       return MCTargetAsmParser::Match_Success;
    5826             :     break;
    5827             :   // 'DstIdx64' class
    5828          51 :   case MCK_DstIdx64:
    5829          51 :     if (Operand.isDstIdx64())
    5830             :       return MCTargetAsmParser::Match_Success;
    5831             :     break;
    5832             :   // 'DstIdx8' class
    5833         102 :   case MCK_DstIdx8:
    5834         102 :     if (Operand.isDstIdx8())
    5835             :       return MCTargetAsmParser::Match_Success;
    5836             :     break;
    5837             :   // 'MemOffs16_16' class
    5838        2097 :   case MCK_MemOffs16_16:
    5839        2097 :     if (Operand.isMemOffs16_16())
    5840             :       return MCTargetAsmParser::Match_Success;
    5841             :     break;
    5842             :   // 'MemOffs16_32' class
    5843        3443 :   case MCK_MemOffs16_32:
    5844        3443 :     if (Operand.isMemOffs16_32())
    5845             :       return MCTargetAsmParser::Match_Success;
    5846             :     break;
    5847             :   // 'MemOffs16_8' class
    5848        2111 :   case MCK_MemOffs16_8:
    5849        2111 :     if (Operand.isMemOffs16_8())
    5850             :       return MCTargetAsmParser::Match_Success;
    5851             :     break;
    5852             :   // 'MemOffs32_16' class
    5853        2096 :   case MCK_MemOffs32_16:
    5854        2096 :     if (Operand.isMemOffs32_16())
    5855             :       return MCTargetAsmParser::Match_Success;
    5856             :     break;
    5857             :   // 'MemOffs32_32' class
    5858        3441 :   case MCK_MemOffs32_32:
    5859        3441 :     if (Operand.isMemOffs32_32())
    5860             :       return MCTargetAsmParser::Match_Success;
    5861             :     break;
    5862             :   // 'MemOffs32_64' class
    5863        2155 :   case MCK_MemOffs32_64:
    5864        2155 :     if (Operand.isMemOffs32_64())
    5865             :       return MCTargetAsmParser::Match_Success;
    5866             :     break;
    5867             :   // 'MemOffs32_8' class
    5868        2110 :   case MCK_MemOffs32_8:
    5869        2110 :     if (Operand.isMemOffs32_8())
    5870             :       return MCTargetAsmParser::Match_Success;
    5871             :     break;
    5872             :   // 'MemOffs64_16' class
    5873           8 :   case MCK_MemOffs64_16:
    5874           8 :     if (Operand.isMemOffs64_16())
    5875             :       return MCTargetAsmParser::Match_Success;
    5876             :     break;
    5877             :   // 'MemOffs64_32' class
    5878           8 :   case MCK_MemOffs64_32:
    5879           8 :     if (Operand.isMemOffs64_32())
    5880             :       return MCTargetAsmParser::Match_Success;
    5881             :     break;
    5882             :   // 'MemOffs64_64' class
    5883           4 :   case MCK_MemOffs64_64:
    5884           4 :     if (Operand.isMemOffs64_64())
    5885             :       return MCTargetAsmParser::Match_Success;
    5886             :     break;
    5887             :   // 'MemOffs64_8' class
    5888           8 :   case MCK_MemOffs64_8:
    5889           8 :     if (Operand.isMemOffs64_8())
    5890             :       return MCTargetAsmParser::Match_Success;
    5891             :     break;
    5892             :   // 'SrcIdx16' class
    5893         107 :   case MCK_SrcIdx16:
    5894         107 :     if (Operand.isSrcIdx16())
    5895             :       return MCTargetAsmParser::Match_Success;
    5896             :     break;
    5897             :   // 'SrcIdx32' class
    5898         115 :   case MCK_SrcIdx32:
    5899         115 :     if (Operand.isSrcIdx32())
    5900             :       return MCTargetAsmParser::Match_Success;
    5901             :     break;
    5902             :   // 'SrcIdx64' class
    5903          45 :   case MCK_SrcIdx64:
    5904          45 :     if (Operand.isSrcIdx64())
    5905             :       return MCTargetAsmParser::Match_Success;
    5906             :     break;
    5907             :   // 'SrcIdx8' class
    5908         146 :   case MCK_SrcIdx8:
    5909         146 :     if (Operand.isSrcIdx8())
    5910             :       return MCTargetAsmParser::Match_Success;
    5911             :     break;
    5912             :   // 'AbsMem' class
    5913         884 :   case MCK_AbsMem:
    5914             :     if (Operand.isAbsMem())
    5915             :       return MCTargetAsmParser::Match_Success;
    5916             :     break;
    5917             :   // 'Mem128' class
    5918       26422 :   case MCK_Mem128:
    5919       26422 :     if (Operand.isMem128())
    5920             :       return MCTargetAsmParser::Match_Success;
    5921             :     break;
    5922             :   // 'Mem128_RC128' class
    5923          13 :   case MCK_Mem128_RC128:
    5924             :     if (Operand.isMem128_RC128())
    5925             :       return MCTargetAsmParser::Match_Success;
    5926             :     break;
    5927             :   // 'Mem128_RC128X' class
    5928         270 :   case MCK_Mem128_RC128X:
    5929             :     if (Operand.isMem128_RC128X())
    5930             :       return MCTargetAsmParser::Match_Success;
    5931             :     break;
    5932             :   // 'Mem128_RC256' class
    5933           8 :   case MCK_Mem128_RC256:
    5934             :     if (Operand.isMem128_RC256())
    5935             :       return MCTargetAsmParser::Match_Success;
    5936             :     break;
    5937             :   // 'Mem128_RC256X' class
    5938         114 :   case MCK_Mem128_RC256X:
    5939             :     if (Operand.isMem128_RC256X())
    5940             :       return MCTargetAsmParser::Match_Success;
    5941             :     break;
    5942             :   // 'Mem16' class
    5943       12663 :   case MCK_Mem16:
    5944       12663 :     if (Operand.isMem16())
    5945             :       return MCTargetAsmParser::Match_Success;
    5946             :     break;
    5947             :   // 'Mem256' class
    5948       17908 :   case MCK_Mem256:
    5949       17908 :     if (Operand.isMem256())
    5950             :       return MCTargetAsmParser::Match_Success;
    5951             :     break;
    5952             :   // 'Mem256_RC128' class
    5953           4 :   case MCK_Mem256_RC128:
    5954             :     if (Operand.isMem256_RC128())
    5955             :       return MCTargetAsmParser::Match_Success;
    5956             :     break;
    5957             :   // 'Mem256_RC128X' class
    5958          68 :   case MCK_Mem256_RC128X:
    5959             :     if (Operand.isMem256_RC128X())
    5960             :       return MCTargetAsmParser::Match_Success;
    5961             :     break;
    5962             :   // 'Mem256_RC256' class
    5963           8 :   case MCK_Mem256_RC256:
    5964             :     if (Operand.isMem256_RC256())
    5965             :       return MCTargetAsmParser::Match_Success;
    5966             :     break;
    5967             :   // 'Mem256_RC256X' class
    5968         136 :   case MCK_Mem256_RC256X:
    5969             :     if (Operand.isMem256_RC256X())
    5970             :       return MCTargetAsmParser::Match_Success;
    5971             :     break;
    5972             :   // 'Mem256_RC512' class
    5973          64 :   case MCK_Mem256_RC512:
    5974             :     if (Operand.isMem256_RC512())
    5975             :       return MCTargetAsmParser::Match_Success;
    5976             :     break;
    5977             :   // 'Mem32' class
    5978       21680 :   case MCK_Mem32:
    5979       21680 :     if (Operand.isMem32())
    5980             :       return MCTargetAsmParser::Match_Success;
    5981             :     break;
    5982             :   // 'Mem512' class
    5983       13782 :   case MCK_Mem512:
    5984       13782 :     if (Operand.isMem512())
    5985             :       return MCTargetAsmParser::Match_Success;
    5986             :     break;
    5987             :   // 'Mem512_RC256X' class
    5988          42 :   case MCK_Mem512_RC256X:
    5989             :     if (Operand.isMem512_RC256X())
    5990             :       return MCTargetAsmParser::Match_Success;
    5991             :     break;
    5992             :   // 'Mem512_RC512' class
    5993          84 :   case MCK_Mem512_RC512:
    5994             :     if (Operand.isMem512_RC512())
    5995             :       return MCTargetAsmParser::Match_Success;
    5996             :     break;
    5997             :   // 'Mem64' class
    5998       23839 :   case MCK_Mem64:
    5999       23839 :     if (Operand.isMem64())
    6000             :       return MCTargetAsmParser::Match_Success;
    6001             :     break;
    6002             :   // 'Mem64_RC128' class
    6003           4 :   case MCK_Mem64_RC128:
    6004             :     if (Operand.isMem64_RC128())
    6005             :       return MCTargetAsmParser::Match_Success;
    6006             :     break;
    6007             :   // 'Mem64_RC128X' class
    6008          46 :   case MCK_Mem64_RC128X:
    6009             :     if (Operand.isMem64_RC128X())
    6010             :       return MCTargetAsmParser::Match_Success;
    6011             :     break;
    6012             :   // 'Mem80' class
    6013          42 :   case MCK_Mem80:
    6014          42 :     if (Operand.isMem80())
    6015             :       return MCTargetAsmParser::Match_Success;
    6016             :     break;
    6017             :   // 'Mem8' class
    6018        9897 :   case MCK_Mem8:
    6019        9897 :     if (Operand.isMem8())
    6020             :       return MCTargetAsmParser::Match_Success;
    6021             :     break;
    6022             :   // 'Mem' class
    6023         552 :   case MCK_Mem:
    6024         552 :     if (Operand.isMem())
    6025             :       return MCTargetAsmParser::Match_Success;
    6026             :     break;
    6027             :   } // end switch (Kind)
    6028             : 
    6029      531733 :   if (Operand.isReg()) {
    6030             :     MatchClassKind OpKind;
    6031      355130 :     switch (Operand.getReg()) {
    6032             :     default: OpKind = InvalidMatchClass; break;
    6033             :     case X86::AL: OpKind = MCK_AL; break;
    6034             :     case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
    6035             :     case X86::CL: OpKind = MCK_CL; break;
    6036             :     case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
    6037             :     case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
    6038             :     case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
    6039             :     case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
    6040             :     case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
    6041             :     case X86::SIL: OpKind = MCK_GR8; break;
    6042             :     case X86::DIL: OpKind = MCK_GR8; break;
    6043             :     case X86::BPL: OpKind = MCK_GR8; break;
    6044             :     case X86::SPL: OpKind = MCK_GR8; break;
    6045             :     case X86::R8B: OpKind = MCK_GR8; break;
    6046             :     case X86::R9B: OpKind = MCK_GR8; break;
    6047             :     case X86::R10B: OpKind = MCK_GR8; break;
    6048             :     case X86::R11B: OpKind = MCK_GR8; break;
    6049             :     case X86::R12B: OpKind = MCK_GR8; break;
    6050             :     case X86::R13B: OpKind = MCK_GR8; break;
    6051             :     case X86::R14B: OpKind = MCK_GR8; break;
    6052             :     case X86::R15B: OpKind = MCK_GR8; break;
    6053             :     case X86::AX: OpKind = MCK_AX; break;
    6054             :     case X86::DX: OpKind = MCK_DX; break;
    6055             :     case X86::CX: OpKind = MCK_GR16_ABCD; break;
    6056             :     case X86::BX: OpKind = MCK_GR16_ABCD; break;
    6057             :     case X86::SI: OpKind = MCK_GR16_NOREX; break;
    6058             :     case X86::DI: OpKind = MCK_GR16_NOREX; break;
    6059             :     case X86::BP: OpKind = MCK_GR16_NOREX; break;
    6060             :     case X86::SP: OpKind = MCK_GR16_NOREX; break;
    6061             :     case X86::R8W: OpKind = MCK_GR16; break;
    6062             :     case X86::R9W: OpKind = MCK_GR16; break;
    6063             :     case X86::R10W: OpKind = MCK_GR16; break;
    6064             :     case X86::R11W: OpKind = MCK_GR16; break;
    6065             :     case X86::R12W: OpKind = MCK_GR16; break;
    6066             :     case X86::R13W: OpKind = MCK_GR16; break;
    6067             :     case X86::R14W: OpKind = MCK_GR16; break;
    6068             :     case X86::R15W: OpKind = MCK_GR16; break;
    6069             :     case X86::EAX: OpKind = MCK_EAX; break;
    6070             :     case X86::EDX: OpKind = MCK_EDX; break;
    6071             :     case X86::ECX: OpKind = MCK_ECX; break;
    6072             :     case X86::EBX: OpKind = MCK_EBX; break;
    6073             :     case X86::ESI: OpKind = MCK_Reg26; break;
    6074             :     case X86::EDI: OpKind = MCK_Reg26; break;
    6075             :     case X86::EBP: OpKind = MCK_Reg26; break;
    6076             :     case X86::ESP: OpKind = MCK_Reg27; break;
    6077             :     case X86::R8D: OpKind = MCK_Reg29; break;
    6078             :     case X86::R9D: OpKind = MCK_Reg29; break;
    6079             :     case X86::R10D: OpKind = MCK_Reg29; break;
    6080             :     case X86::R11D: OpKind = MCK_Reg29; break;
    6081             :     case X86::R12D: OpKind = MCK_Reg29; break;
    6082             :     case X86::R13D: OpKind = MCK_Reg29; break;
    6083             :     case X86::R14D: OpKind = MCK_Reg29; break;
    6084             :     case X86::R15D: OpKind = MCK_Reg29; break;
    6085             :     case X86::RAX: OpKind = MCK_RAX; break;
    6086             :     case X86::RDX: OpKind = MCK_RDX; break;
    6087             :     case X86::RCX: OpKind = MCK_RCX; break;
    6088             :     case X86::RBX: OpKind = MCK_RBX; break;
    6089             :     case X86::RSI: OpKind = MCK_Reg58; break;
    6090             :     case X86::RDI: OpKind = MCK_Reg58; break;
    6091             :     case X86::RBP: OpKind = MCK_Reg64; break;
    6092             :     case X86::RSP: OpKind = MCK_Reg55; break;
    6093             :     case X86::R8: OpKind = MCK_Reg61; break;
    6094             :     case X86::R9: OpKind = MCK_Reg61; break;
    6095             :     case X86::R10: OpKind = MCK_Reg60; break;
    6096             :     case X86::R11: OpKind = MCK_Reg61; break;
    6097             :     case X86::R12: OpKind = MCK_Reg57; break;
    6098             :     case X86::R13: OpKind = MCK_Reg57; break;
    6099             :     case X86::R14: OpKind = MCK_Reg57; break;
    6100             :     case X86::R15: OpKind = MCK_Reg57; break;
    6101             :     case X86::RIP: OpKind = MCK_Reg66; break;
    6102             :     case X86::MM0: OpKind = MCK_VR64; break;
    6103             :     case X86::MM1: OpKind = MCK_VR64; break;
    6104             :     case X86::MM2: OpKind = MCK_VR64; break;
    6105             :     case X86::MM3: OpKind = MCK_VR64; break;
    6106             :     case X86::MM4: OpKind = MCK_VR64; break;
    6107             :     case X86::MM5: OpKind = MCK_VR64; break;
    6108             :     case X86::MM6: OpKind = MCK_VR64; break;
    6109             :     case X86::MM7: OpKind = MCK_VR64; break;
    6110             :     case X86::FP0: OpKind = MCK_RFP32; break;
    6111             :     case X86::FP1: OpKind = MCK_RFP32; break;
    6112             :     case X86::FP2: OpKind = MCK_RFP32; break;
    6113             :     case X86::FP3: OpKind = MCK_RFP32; break;
    6114             :     case X86::FP4: OpKind = MCK_RFP32; break;
    6115             :     case X86::FP5: OpKind = MCK_RFP32; break;
    6116             :     case X86::FP6: OpKind = MCK_RFP32; break;
    6117             :     case X86::XMM0: OpKind = MCK_XMM0; break;
    6118             :     case X86::XMM1: OpKind = MCK_VR128L; break;
    6119             :     case X86::XMM2: OpKind = MCK_VR128L; break;
    6120             :     case X86::XMM3: OpKind = MCK_VR128L; break;
    6121             :     case X86::XMM4: OpKind = MCK_VR128L; break;
    6122             :     case X86::XMM5: OpKind = MCK_VR128L; break;
    6123             :     case X86::XMM6: OpKind = MCK_VR128L; break;
    6124             :     case X86::XMM7: OpKind = MCK_VR128L; break;
    6125             :     case X86::XMM8: OpKind = MCK_VR128H; break;
    6126             :     case X86::XMM9: OpKind = MCK_VR128H; break;
    6127             :     case X86::XMM10: OpKind = MCK_VR128H; break;
    6128             :     case X86::XMM11: OpKind = MCK_VR128H; break;
    6129             :     case X86::XMM12: OpKind = MCK_VR128H; break;
    6130             :     case X86::XMM13: OpKind = MCK_VR128H; break;
    6131             :     case X86::XMM14: OpKind = MCK_VR128H; break;
    6132             :     case X86::XMM15: OpKind = MCK_VR128H; break;
    6133             :     case X86::XMM16: OpKind = MCK_FR32X; break;
    6134             :     case X86::XMM17: OpKind = MCK_FR32X; break;
    6135             :     case X86::XMM18: OpKind = MCK_FR32X; break;
    6136             :     case X86::XMM19: OpKind = MCK_FR32X; break;
    6137             :     case X86::XMM20: OpKind = MCK_FR32X; break;
    6138             :     case X86::XMM21: OpKind = MCK_FR32X; break;
    6139             :     case X86::XMM22: OpKind = MCK_FR32X; break;
    6140             :     case X86::XMM23: OpKind = MCK_FR32X; break;
    6141             :     case X86::XMM24: OpKind = MCK_FR32X; break;
    6142             :     case X86::XMM25: OpKind = MCK_FR32X; break;
    6143             :     case X86::XMM26: OpKind = MCK_FR32X; break;
    6144             :     case X86::XMM27: OpKind = MCK_FR32X; break;
    6145             :     case X86::XMM28: OpKind = MCK_FR32X; break;
    6146             :     case X86::XMM29: OpKind = MCK_FR32X; break;
    6147             :     case X86::XMM30: OpKind = MCK_FR32X; break;
    6148             :     case X86::XMM31: OpKind = MCK_FR32X; break;
    6149             :     case X86::YMM0: OpKind = MCK_VR256L; break;
    6150             :     case X86::YMM1: OpKind = MCK_VR256L; break;
    6151             :     case X86::YMM2: OpKind = MCK_VR256L; break;
    6152             :     case X86::YMM3: OpKind = MCK_VR256L; break;
    6153             :     case X86::YMM4: OpKind = MCK_VR256L; break;
    6154             :     case X86::YMM5: OpKind = MCK_VR256L; break;
    6155             :     case X86::YMM6: OpKind = MCK_VR256L; break;
    6156             :     case X86::YMM7: OpKind = MCK_VR256L; break;
    6157             :     case X86::YMM8: OpKind = MCK_VR256H; break;
    6158             :     case X86::YMM9: OpKind = MCK_VR256H; break;
    6159             :     case X86::YMM10: OpKind = MCK_VR256H; break;
    6160             :     case X86::YMM11: OpKind = MCK_VR256H; break;
    6161             :     case X86::YMM12: OpKind = MCK_VR256H; break;
    6162             :     case X86::YMM13: OpKind = MCK_VR256H; break;
    6163             :     case X86::YMM14: OpKind = MCK_VR256H; break;
    6164             :     case X86::YMM15: OpKind = MCK_VR256H; break;
    6165             :     case X86::YMM16: OpKind = MCK_VR256X; break;
    6166             :     case X86::YMM17: OpKind = MCK_VR256X; break;
    6167             :     case X86::YMM18: OpKind = MCK_VR256X; break;
    6168             :     case X86::YMM19: OpKind = MCK_VR256X; break;
    6169             :     case X86::YMM20: OpKind = MCK_VR256X; break;
    6170             :     case X86::YMM21: OpKind = MCK_VR256X; break;
    6171             :     case X86::YMM22: OpKind = MCK_VR256X; break;
    6172             :     case X86::YMM23: OpKind = MCK_VR256X; break;
    6173             :     case X86::YMM24: OpKind = MCK_VR256X; break;
    6174             :     case X86::YMM25: OpKind = MCK_VR256X; break;
    6175             :     case X86::YMM26: OpKind = MCK_VR256X; break;
    6176             :     case X86::YMM27: OpKind = MCK_VR256X; break;
    6177             :     case X86::YMM28: OpKind = MCK_VR256X; break;
    6178             :     case X86::YMM29: OpKind = MCK_VR256X; break;
    6179             :     case X86::YMM30: OpKind = MCK_VR256X; break;
    6180             :     case X86::YMM31: OpKind = MCK_VR256X; break;
    6181             :     case X86::ZMM0: OpKind = MCK_Reg78; break;
    6182             :     case X86::ZMM1: OpKind = MCK_Reg78; break;
    6183             :     case X86::ZMM2: OpKind = MCK_Reg78; break;
    6184             :     case X86::ZMM3: OpKind = MCK_Reg78; break;
    6185             :     case X86::ZMM4: OpKind = MCK_Reg78; break;
    6186             :     case X86::ZMM5: OpKind = MCK_Reg78; break;
    6187             :     case X86::ZMM6: OpKind = MCK_Reg78; break;
    6188             :     case X86::ZMM7: OpKind = MCK_Reg78; break;
    6189             :     case X86::ZMM8: OpKind = MCK_Reg81; break;
    6190             :     case X86::ZMM9: OpKind = MCK_Reg81; break;
    6191             :     case X86::ZMM10: OpKind = MCK_Reg81; break;
    6192             :     case X86::ZMM11: OpKind = MCK_Reg81; break;
    6193             :     case X86::ZMM12: OpKind = MCK_Reg81; break;
    6194             :     case X86::ZMM13: OpKind = MCK_Reg81; break;
    6195             :     case X86::ZMM14: OpKind = MCK_Reg81; break;
    6196             :     case X86::ZMM15: OpKind = MCK_Reg81; break;
    6197             :     case X86::ZMM16: OpKind = MCK_VR512; break;
    6198             :     case X86::ZMM17: OpKind = MCK_VR512; break;
    6199             :     case X86::ZMM18: OpKind = MCK_VR512; break;
    6200             :     case X86::ZMM19: OpKind = MCK_VR512; break;
    6201             :     case X86::ZMM20: OpKind = MCK_VR512; break;
    6202             :     case X86::ZMM21: OpKind = MCK_VR512; break;
    6203             :     case X86::ZMM22: OpKind = MCK_VR512; break;
    6204             :     case X86::ZMM23: OpKind = MCK_VR512; break;
    6205             :     case X86::ZMM24: OpKind = MCK_VR512; break;
    6206             :     case X86::ZMM25: OpKind = MCK_VR512; break;
    6207             :     case X86::ZMM26: OpKind = MCK_VR512; break;
    6208             :     case X86::ZMM27: OpKind = MCK_VR512; break;
    6209             :     case X86::ZMM28: OpKind = MCK_VR512; break;
    6210             :     case X86::ZMM29: OpKind = MCK_VR512; break;
    6211             :     case X86::ZMM30: OpKind = MCK_VR512; break;
    6212             :     case X86::ZMM31: OpKind = MCK_VR512; break;
    6213             :     case X86::K0: OpKind = MCK_VK1; break;
    6214             :     case X86::K1: OpKind = MCK_VK16WM; break;
    6215             :     case X86::K2: OpKind = MCK_VK16WM; break;
    6216             :     case X86::K3: OpKind = MCK_VK16WM; break;
    6217             :     case X86::K4: OpKind = MCK_VK16WM; break;
    6218             :     case X86::K5: OpKind = MCK_VK16WM; break;
    6219             :     case X86::K6: OpKind = MCK_VK16WM; break;
    6220             :     case X86::K7: OpKind = MCK_VK16WM; break;
    6221             :     case X86::ST0: OpKind = MCK_ST0; break;
    6222             :     case X86::ST1: OpKind = MCK_RST; break;
    6223             :     case X86::ST2: OpKind = MCK_RST; break;
    6224             :     case X86::ST3: OpKind = MCK_RST; break;
    6225             :     case X86::ST4: OpKind = MCK_RST; break;
    6226             :     case X86::ST5: OpKind = MCK_RST; break;
    6227             :     case X86::ST6: OpKind = MCK_RST; break;
    6228             :     case X86::ST7: OpKind = MCK_RST; break;
    6229             :     case X86::FPSW: OpKind = MCK_FPCCR; break;
    6230             :     case X86::EFLAGS: OpKind = MCK_CCR; break;
    6231             :     case X86::CS: OpKind = MCK_CS; break;
    6232             :     case X86::DS: OpKind = MCK_DS; break;
    6233             :     case X86::SS: OpKind = MCK_SS; break;
    6234             :     case X86::ES: OpKind = MCK_ES; break;
    6235             :     case X86::FS: OpKind = MCK_FS; break;
    6236             :     case X86::GS: OpKind = MCK_GS; break;
    6237             :     case X86::DR0: OpKind = MCK_DEBUG_REG; break;
    6238             :     case X86::DR1: OpKind = MCK_DEBUG_REG; break;
    6239             :     case X86::DR2: OpKind = MCK_DEBUG_REG; break;
    6240             :     case X86::DR3: OpKind = MCK_DEBUG_REG; break;
    6241             :     case X86::DR4: OpKind = MCK_DEBUG_REG; break;
    6242             :     case X86::DR5: OpKind = MCK_DEBUG_REG; break;
    6243             :     case X86::DR6: OpKind = MCK_DEBUG_REG; break;
    6244             :     case X86::DR7: OpKind = MCK_DEBUG_REG; break;
    6245             :     case X86::CR0: OpKind = MCK_CONTROL_REG; break;
    6246             :     case X86::CR1: OpKind = MCK_CONTROL_REG; break;
    6247             :     case X86::CR2: OpKind = MCK_CONTROL_REG; break;
    6248             :     case X86::CR3: OpKind = MCK_CONTROL_REG; break;
    6249             :     case X86::CR4: OpKind = MCK_CONTROL_REG; break;
    6250             :     case X86::CR5: OpKind = MCK_CONTROL_REG; break;
    6251             :     case X86::CR6: OpKind = MCK_CONTROL_REG; break;
    6252             :     case X86::CR7: OpKind = MCK_CONTROL_REG; break;
    6253             :     case X86::CR8: OpKind = MCK_CONTROL_REG; break;
    6254             :     case X86::CR9: OpKind = MCK_CONTROL_REG; break;
    6255             :     case X86::CR10: OpKind = MCK_CONTROL_REG; break;
    6256             :     case X86::CR11: OpKind = MCK_CONTROL_REG; break;
    6257             :     case X86::CR12: OpKind = MCK_CONTROL_REG; break;
    6258             :     case X86::CR13: OpKind = MCK_CONTROL_REG; break;
    6259             :     case X86::CR14: OpKind = MCK_CONTROL_REG; break;
    6260             :     case X86::CR15: OpKind = MCK_CONTROL_REG; break;
    6261             :     case X86::BND0: OpKind = MCK_BNDR; break;
    6262             :     case X86::BND1: OpKind = MCK_BNDR; break;
    6263             :     case X86::BND2: OpKind = MCK_BNDR; break;
    6264             :     case X86::BND3: OpKind = MCK_BNDR; break;
    6265             :     }
    6266      355130 :     return isSubclass(OpKind, Kind) ? MCTargetAsmParser::Match_Success :
    6267             :                                       MCTargetAsmParser::Match_InvalidOperand;
    6268             :   }
    6269             : 
    6270             :   return MCTargetAsmParser::Match_InvalidOperand;
    6271             : }
    6272             : 
    6273        4139 : uint64_t X86AsmParser::
    6274             : ComputeAvailableFeatures(const FeatureBitset& FB) const {
    6275        4139 :   uint64_t Features = 0;
    6276        8278 :   if ((FB[X86::FeatureAVX512]))
    6277         695 :     Features |= Feature_HasAVX512;
    6278        8278 :   if ((FB[X86::FeatureCDI]))
    6279         479 :     Features |= Feature_HasCDI;
    6280        8278 :   if ((FB[X86::FeatureVPOPCNTDQ]))
    6281           1 :     Features |= Feature_HasVPOPCNTDQ;
    6282        8278 :   if ((FB[X86::FeaturePFI]))
    6283          19 :     Features |= Feature_HasPFI;
    6284        8278 :   if ((FB[X86::FeatureERI]))
    6285          19 :     Features |= Feature_HasERI;
    6286        8278 :   if ((FB[X86::FeatureDQI]))
    6287         619 :     Features |= Feature_HasDQI;
    6288        8278 :   if ((FB[X86::FeatureBWI]))
    6289         463 :     Features |= Feature_HasBWI;
    6290        8278 :   if ((FB[X86::FeatureVLX]))
    6291         393 :     Features |= Feature_HasVLX;
    6292        8278 :   if ((FB[X86::FeatureVBMI]))
    6293         449 :     Features |= Feature_HasVBMI;
    6294        8278 :   if ((FB[X86::FeatureIFMA]))
    6295           2 :     Features |= Feature_HasIFMA;
    6296        8278 :   if ((!FB[X86::Mode64Bit]))
    6297         905 :     Features |= Feature_Not64BitMode;
    6298        8278 :   if ((FB[X86::Mode64Bit]))
    6299        3234 :     Features |= Feature_In64BitMode;
    6300        8278 :   if ((FB[X86::Mode16Bit]))
    6301          44 :     Features |= Feature_In16BitMode;
    6302        8278 :   if ((!FB[X86::Mode16Bit]))
    6303        4095 :     Features |= Feature_Not16BitMode;
    6304        8278 :   if ((FB[X86::Mode32Bit]))
    6305         861 :     Features |= Feature_In32BitMode;
    6306        4139 :   return Features;
    6307             : }
    6308             : 
    6309             : static const char *const MnemonicTable =
    6310             :     "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
    6311             :     "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
    6312             :     "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005"
    6313             :     "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge"
    6314             :     "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005"
    6315             :     "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
    6316             :     "extrq\007blcfill\004blci\005blcic\006blcmsk\004blcs\007blendpd\007blend"
    6317             :     "ps\010blendvpd\010blendvps\007blsfill\004blsi\005blsic\005blsil\005blsi"
    6318             :     "q\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl\005"
    6319             :     "bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003bsf\004"
    6320             :     "bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006bswapl\006"
    6321             :     "bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003btr\004btr"
    6322             :     "l\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzhi\005bzhi"
    6323             :     "l\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003cdq\004"
    6324             :     "cdqe\004clac\003clc\003cld\007clflush\nclflushopt\004clgi\003cli\004clr"
    6325             :     "b\004clrl\004clrq\004clrw\004cltd\004cltq\004clts\004clwb\006clzero\003"
    6326             :     "cmc\005cmova\006cmovae\007cmovael\007cmovaeq\007cmovaew\006cmoval\006cm"
    6327             :     "ovaq\006cmovaw\005cmovb\006cmovbe\007cmovbel\007cmovbeq\007cmovbew\006c"
    6328             :     "movbl\006cmovbq\006cmovbw\005cmove\006cmovel\006cmoveq\006cmovew\005cmo"
    6329             :     "vg\006cmovge\007cmovgel\007cmovgeq\007cmovgew\006cmovgl\006cmovgq\006cm"
    6330             :     "ovgw\005cmovl\006cmovle\007cmovlel\007cmovleq\007cmovlew\006cmovll\006c"
    6331             :     "movlq\006cmovlw\006cmovne\007cmovnel\007cmovneq\007cmovnew\006cmovno\007"
    6332             :     "cmovnol\007cmovnoq\007cmovnow\006cmovnp\007cmovnpl\007cmovnpq\007cmovnp"
    6333             :     "w\006cmovns\007cmovnsl\007cmovnsq\007cmovnsw\005cmovo\006cmovol\006cmov"
    6334             :     "oq\006cmovow\005cmovp\006cmovpl\006cmovpq\006cmovpw\005cmovs\006cmovsl\006"
    6335             :     "cmovsq\006cmovsw\003cmp\004cmpb\004cmpl\005cmppd\005cmpps\004cmpq\004cm"
    6336             :     "ps\005cmpsb\005cmpsd\005cmpsl\005cmpsq\005cmpss\005cmpsw\004cmpw\007cmp"
    6337             :     "xchg\ncmpxchg16b\tcmpxchg8b\010cmpxchgb\010cmpxchgl\010cmpxchgq\010cmpx"
    6338             :     "chgw\006comisd\006comiss\005cpuid\003cqo\004cqto\005crc32\006crc32b\006"
    6339             :     "crc32l\006crc32q\006crc32w\002cs\010cvtdq2pd\010cvtdq2ps\010cvtpd2dq\010"
    6340             :     "cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010cvtpi2ps\010cvtps2dq\010cvtps2pd\010"
    6341             :     "cvtps2pi\010cvtsd2si\tcvtsd2sil\tcvtsd2siq\010cvtsd2ss\010cvtsi2sd\tcvt"
    6342             :     "si2sdl\tcvtsi2sdq\010cvtsi2ss\tcvtsi2ssl\tcvtsi2ssq\010cvtss2sd\010cvts"
    6343             :     "s2si\tcvtss2sil\tcvtss2siq\tcvttpd2dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\t"
    6344             :     "cvttsd2si\ncvttsd2sil\ncvttsd2siq\tcvttss2si\ncvttss2sil\ncvttss2siq\003"
    6345             :     "cwd\004cwde\004cwtd\004cwtl\003daa\003das\006data16\006data32\003dec\004"
    6346             :     "decb\004decl\004decq\004decw\003div\004divb\004divl\005divpd\005divps\004"
    6347             :     "divq\005divsd\005divss\004divw\004dppd\004dpps\002ds\004emms\005encls\005"
    6348             :     "enclu\005enter\002es\textractps\005extrq\005f2xm1\004fabs\004fadd\005fa"
    6349             :     "ddl\005faddp\005fadds\004fbld\005fbstp\004fchs\006fcmovb\007fcmovbe\006"
    6350             :     "fcmove\007fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006fcmovu\004fcom\005"
    6351             :     "fcomi\005fcoml\005fcomp\006fcompi\006fcompl\006fcompp\006fcomps\005fcom"
    6352             :     "s\004fcos\007fdecstp\004fdiv\005fdivl\005fdivp\005fdivr\006fdivrl\006fd"
    6353             :     "ivrp\006fdivrs\005fdivs\005femms\005ffree\006ffreep\005fiadd\006fiaddl\006"
    6354             :     "fiadds\005ficom\006ficoml\006ficomp\007ficompl\007ficomps\006ficoms\005"
    6355             :     "fidiv\006fidivl\006fidivr\007fidivrl\007fidivrs\006fidivs\004fild\005fi"
    6356             :     "ldl\006fildll\005filds\005fimul\006fimull\006fimuls\007fincstp\004fist\005"
    6357             :     "fistl\005fistp\006fistpl\007fistpll\006fistps\005fists\006fisttp\007fis"
    6358             :     "ttpl\010fisttpll\007fisttps\005fisub\006fisubl\006fisubr\007fisubrl\007"
    6359             :     "fisubrs\006fisubs\003fld\004fld1\005fldcw\006fldenv\004fldl\006fldl2e\006"
    6360             :     "fldl2t\006fldlg2\006fldln2\005fldpi\004flds\004fldt\004fldz\004fmul\005"
    6361             :     "fmull\005fmulp\005fmuls\006fnclex\006fninit\004fnop\006fnsave\006fnstcw"
    6362             :     "\007fnstenv\006fnstsw\006fpatan\005fprem\006fprem1\005fptan\007frndint\006"
    6363             :     "frstor\002fs\006fscale\004fsin\007fsincos\005fsqrt\003fst\004fstl\004fs"
    6364             :     "tp\005fstpl\005fstps\005fstpt\004fsts\004fsub\005fsubl\005fsubp\005fsub"
    6365             :     "r\006fsubrl\006fsubrp\006fsubrs\005fsubs\004ftst\005fucom\006fucomi\006"
    6366             :     "fucomp\007fucompi\007fucompp\004fxam\004fxch\007fxrstor\tfxrstor64\006f"
    6367             :     "xsave\010fxsave64\007fxtract\005fyl2x\007fyl2xp1\006getsec\002gs\006had"
    6368             :     "dpd\006haddps\003hlt\006hsubpd\006hsubps\004idiv\005idivb\005idivl\005i"
    6369             :     "divq\005idivw\004imul\005imulb\005imull\005imulq\005imulw\002in\003inb\003"
    6370             :     "inc\004incb\004incl\004incq\004incw\003inl\003ins\004insb\004insd\010in"
    6371             :     "sertps\007insertq\004insl\004insw\003int\004int3\004into\004invd\006inv"
    6372             :     "ept\006invlpg\007invlpga\007invpcid\007invvpid\003inw\004iret\005iretd\005"
    6373             :     "iretl\005iretq\005iretw\002ja\003jae\002jb\003jbe\004jcxz\002je\005jecx"
    6374             :     "z\002jg\003jge\002jl\003jle\003jmp\004jmpl\004jmpq\004jmpw\003jne\003jn"
    6375             :     "o\003jnp\003jns\002jo\002jp\005jrcxz\002js\005kaddb\005kaddd\005kaddq\005"
    6376             :     "kaddw\005kandb\005kandd\006kandnb\006kandnd\006kandnq\006kandnw\005kand"
    6377             :     "q\005kandw\005kmovb\005kmovd\005kmovq\005kmovw\005knotb\005knotd\005kno"
    6378             :     "tq\005knotw\004korb\004kord\004korq\010kortestb\010kortestd\010kortestq"
    6379             :     "\010kortestw\004korw\010kshiftlb\010kshiftld\010kshiftlq\010kshiftlw\010"
    6380             :     "kshiftrb\010kshiftrd\010kshiftrq\010kshiftrw\006ktestb\006ktestd\006kte"
    6381             :     "stq\006ktestw\010kunpckbw\010kunpckdq\010kunpckwd\006kxnorb\006kxnord\006"
    6382             :     "kxnorq\006kxnorw\005kxorb\005kxord\005kxorq\005kxorw\004lahf\003lar\004"
    6383             :     "larl\004larq\004larw\005lcall\006lcalll\006lcallq\006lcallw\005lddqu\007"
    6384             :     "ldmxcsr\003lds\004ldsl\004ldsw\003lea\004leal\004leaq\005leave\004leaw\003"
    6385             :     "les\004lesl\004lesw\006lfence\003lfs\004lfsl\004lfsq\004lfsw\004lgdt\005"
    6386             :     "lgdtl\005lgdtq\005lgdtw\003lgs\004lgsl\004lgsq\004lgsw\004lidt\005lidtl"
    6387             :     "\005lidtq\005lidtw\004ljmp\005ljmpl\005ljmpq\005ljmpw\004lldt\005lldtw\006"
    6388             :     "llwpcb\004lmsw\005lmsww\004lock\004lods\005lodsb\005lodsd\005lodsl\005l"
    6389             :     "odsq\005lodsw\004loop\005loope\006loopne\005lretl\005lretq\005lretw\003"
    6390             :     "lsl\004lsll\004lslq\004lslw\003lss\004lssl\004lssq\004lssw\003ltr\004lt"
    6391             :     "rw\006lwpins\006lwpval\005lzcnt\006lzcntl\006lzcntq\006lzcntw\nmaskmovd"
    6392             :     "qu\010maskmovq\005maxpd\005maxps\005maxsd\005maxss\006mfence\005minpd\005"
    6393             :     "minps\005minsd\005minss\007monitor\010monitorx\007montmul\003mov\006mov"
    6394             :     "abs\007movabsb\007movabsl\007movabsq\007movabsw\006movapd\006movaps\004"
    6395             :     "movb\005movbe\006movbel\006movbeq\006movbew\004movd\007movddup\007movdq"
    6396             :     "2q\006movdqa\006movdqu\007movhlps\006movhpd\006movhps\004movl\007movlhp"
    6397             :     "s\006movlpd\006movlps\010movmskpd\010movmskps\007movntdq\010movntdqa\006"
    6398             :     "movnti\007movntil\007movntiq\007movntpd\007movntps\006movntq\007movntsd"
    6399             :     "\007movntss\004movq\007movq2dq\004movs\005movsb\006movsbl\006movsbq\006"
    6400             :     "movsbw\005movsd\010movshdup\005movsl\010movsldup\006movslq\005movsq\005"
    6401             :     "movss\005movsw\006movswl\006movswq\005movsx\006movsxd\006movupd\006movu"
    6402             :     "ps\004movw\006movzbl\006movzbq\006movzbw\006movzwl\006movzwq\005movzx\007"
    6403             :     "mpsadbw\003mul\004mulb\004mull\005mulpd\005mulps\004mulq\005mulsd\005mu"
    6404             :     "lss\004mulw\004mulx\005mulxl\005mulxq\005mwait\006mwaitx\003neg\004negb"
    6405             :     "\004negl\004negq\004negw\003nop\004nopl\004nopq\004nopw\003not\004notb\004"
    6406             :     "notl\004notq\004notw\002or\003orb\003orl\004orpd\004orps\003orq\003orw\003"
    6407             :     "out\004outb\004outl\004outs\005outsb\005outsd\005outsl\005outsw\004outw"
    6408             :     "\005pabsb\005pabsd\005pabsw\010packssdw\010packsswb\010packusdw\010pack"
    6409             :     "uswb\005paddb\005paddd\005paddq\006paddsb\006paddsw\007paddusb\007paddu"
    6410             :     "sw\005paddw\007palignr\004pand\005pandn\005pause\005pavgb\007pavgusb\005"
    6411             :     "pavgw\010pblendvb\007pblendw\014pclmulhqhqdq\014pclmulhqlqdq\014pclmull"
    6412             :     "qhqdq\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007pcmpeqd\007pcmpeqq\007pc"
    6413             :     "mpeqw\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpgtd\007pcmpgtq\007pcmpgtw"
    6414             :     "\tpcmpistri\tpcmpistrm\004pdep\005pdepl\005pdepq\004pext\005pextl\005pe"
    6415             :     "xtq\006pextrb\006pextrd\006pextrq\006pextrw\005pf2id\005pf2iw\005pfacc\005"
    6416             :     "pfadd\007pfcmpeq\007pfcmpge\007pfcmpgt\005pfmax\005pfmin\005pfmul\006pf"
    6417             :     "nacc\007pfpnacc\005pfrcp\010pfrcpit1\010pfrcpit2\010pfrsqit1\007pfrsqrt"
    6418             :     "\005pfsub\006pfsubr\006phaddd\007phaddsw\006phaddw\nphminposuw\006phsub"
    6419             :     "d\007phsubsw\006phsubw\005pi2fd\005pi2fw\006pinsrb\006pinsrd\006pinsrq\006"
    6420             :     "pinsrw\tpmaddubsw\007pmaddwd\006pmaxsb\006pmaxsd\006pmaxsw\006pmaxub\006"
    6421             :     "pmaxud\006pmaxuw\006pminsb\006pminsd\006pminsw\006pminub\006pminud\006p"
    6422             :     "minuw\010pmovmskb\010pmovsxbd\010pmovsxbq\010pmovsxbw\010pmovsxdq\010pm"
    6423             :     "ovsxwd\010pmovsxwq\010pmovzxbd\010pmovzxbq\010pmovzxbw\010pmovzxdq\010p"
    6424             :     "movzxwd\010pmovzxwq\006pmuldq\010pmulhrsw\007pmulhrw\007pmulhuw\006pmul"
    6425             :     "hw\006pmulld\006pmullw\007pmuludq\003pop\005popal\005popaw\006popcnt\007"
    6426             :     "popcntl\007popcntq\007popcntw\004popf\005popfd\005popfl\005popfq\005pop"
    6427             :     "fw\004popl\004popq\004popw\003por\010prefetch\013prefetchnta\nprefetcht"
    6428             :     "0\nprefetcht1\nprefetcht2\tprefetchw\006psadbw\006pshufb\006pshufd\007p"
    6429             :     "shufhw\007pshuflw\006pshufw\006psignb\006psignd\006psignw\005pslld\006p"
    6430             :     "slldq\005psllq\005psllw\005psrad\005psraw\005psrld\006psrldq\005psrlq\005"
    6431             :     "psrlw\005psubb\005psubd\005psubq\006psubsb\006psubsw\007psubusb\007psub"
    6432             :     "usw\005psubw\006pswapd\005ptest\tpunpckhbw\tpunpckhdq\npunpckhqdq\tpunp"
    6433             :     "ckhwd\tpunpcklbw\tpunpckldq\npunpcklqdq\tpunpcklwd\004push\006pushal\006"
    6434             :     "pushaw\005pushf\006pushfd\006pushfl\006pushfq\006pushfw\005pushl\005pus"
    6435             :     "hq\005pushw\004pxor\003rcl\004rclb\004rcll\004rclq\004rclw\005rcpps\005"
    6436             :     "rcpss\003rcr\004rcrb\004rcrl\004rcrq\004rcrw\010rdfsbase\trdfsbasel\trd"
    6437             :     "fsbaseq\010rdgsbase\trdgsbasel\trdgsbaseq\005rdmsr\006rdpkru\005rdpmc\006"
    6438             :     "rdrand\007rdrandl\007rdrandq\007rdrandw\006rdseed\007rdseedl\007rdseedq"
    6439             :     "\007rdseedw\005rdtsc\006rdtscp\003rep\005repne\003ret\004retf\005retfq\004"
    6440             :     "retl\004retq\004retw\005rex64\003rol\004rolb\004roll\004rolq\004rolw\003"
    6441             :     "ror\004rorb\004rorl\004rorq\004rorw\004rorx\005rorxl\005rorxq\007roundp"
    6442             :     "d\007roundps\007roundsd\007roundss\003rsm\007rsqrtps\007rsqrtss\004sahf"
    6443             :     "\004salc\003sar\004sarb\004sarl\004sarq\004sarw\004sarx\005sarxl\005sar"
    6444             :     "xq\003sbb\004sbbb\004sbbl\004sbbq\004sbbw\004scas\005scasb\005scasd\005"
    6445             :     "scasl\005scasq\005scasw\004seta\005setae\004setb\005setbe\004sete\004se"
    6446             :     "tg\005setge\004setl\005setle\005setne\005setno\005setnp\005setns\004set"
    6447             :     "o\004setp\004sets\006sfence\004sgdt\005sgdtl\005sgdtq\005sgdtw\010sha1m"
    6448             :     "sg1\010sha1msg2\tsha1nexte\tsha1rnds4\nsha256msg1\nsha256msg2\013sha256"
    6449             :     "rnds2\003shl\004shlb\004shld\005shldl\005shldq\005shldw\004shll\004shlq"
    6450             :     "\004shlw\004shlx\005shlxl\005shlxq\003shr\004shrb\004shrd\005shrdl\005s"
    6451             :     "hrdq\005shrdw\004shrl\004shrq\004shrw\004shrx\005shrxl\005shrxq\006shuf"
    6452             :     "pd\006shufps\004sidt\005sidtl\005sidtq\005sidtw\006skinit\004sldt\005sl"
    6453             :     "dtl\005sldtq\005sldtw\006slwpcb\004smsw\005smswl\005smswq\005smsww\006s"
    6454             :     "qrtpd\006sqrtps\006sqrtsd\006sqrtss\002ss\004stac\003stc\003std\004stgi"
    6455             :     "\003sti\007stmxcsr\004stos\005stosb\005stosd\005stosl\005stosq\005stosw"
    6456             :     "\003str\004strl\004strq\004strw\003sub\004subb\004subl\005subpd\005subp"
    6457             :     "s\004subq\005subsd\005subss\004subw\006swapgs\007syscall\010sysenter\007"
    6458             :     "sysexit\010sysexitl\010sysexitq\006sysret\007sysretl\007sysretq\006t1ms"
    6459             :     "kc\004test\005testb\005testl\005testq\005testw\005tzcnt\006tzcntl\006tz"
    6460             :     "cntq\006tzcntw\005tzmsk\007ucomisd\007ucomiss\003ud2\004ud2b\010unpckhp"
    6461             :     "d\010unpckhps\010unpcklpd\010unpcklps\006vaddpd\006vaddps\006vaddsd\006"
    6462             :     "vaddss\tvaddsubpd\tvaddsubps\007vaesdec\013vaesdeclast\007vaesenc\013va"
    6463             :     "esenclast\007vaesimc\020vaeskeygenassist\007valignd\007valignq\007vandn"
    6464             :     "pd\007vandnps\006vandpd\006vandps\tvblendmpd\tvblendmps\010vblendpd\010"
    6465             :     "vblendps\tvblendvpd\tvblendvps\016vbroadcastf128\017vbroadcastf32x2\017"
    6466             :     "vbroadcastf32x4\017vbroadcastf32x8\017vbroadcastf64x2\017vbroadcastf64x"
    6467             :     "4\016vbroadcasti128\017vbroadcasti32x2\017vbroadcasti32x4\017vbroadcast"
    6468             :     "i32x8\017vbroadcasti64x2\017vbroadcasti64x4\014vbroadcastsd\014vbroadca"
    6469             :     "stss\004vcmp\006vcmppd\006vcmpps\006vcmpsd\006vcmpss\007vcomisd\007vcom"
    6470             :     "iss\013vcompresspd\013vcompressps\tvcvtdq2pd\tvcvtdq2ps\tvcvtpd2dq\nvcv"
    6471             :     "tpd2dqx\nvcvtpd2dqy\tvcvtpd2ps\nvcvtpd2psx\nvcvtpd2psy\tvcvtpd2qq\nvcvt"
    6472             :     "pd2udq\013vcvtpd2udqx\013vcvtpd2udqy\nvcvtpd2uqq\tvcvtph2ps\tvcvtps2dq\t"
    6473             :     "vcvtps2pd\tvcvtps2ph\tvcvtps2qq\nvcvtps2udq\nvcvtps2uqq\tvcvtqq2pd\tvcv"
    6474             :     "tqq2ps\nvcvtqq2psx\nvcvtqq2psy\tvcvtsd2si\nvcvtsd2sil\nvcvtsd2siq\tvcvt"
    6475             :     "sd2ss\nvcvtsd2usi\tvcvtsi2sd\nvcvtsi2sdl\nvcvtsi2sdq\tvcvtsi2ss\nvcvtsi"
    6476             :     "2ssl\nvcvtsi2ssq\tvcvtss2sd\tvcvtss2si\nvcvtss2sil\nvcvtss2siq\nvcvtss2"
    6477             :     "usi\nvcvttpd2dq\013vcvttpd2dqx\013vcvttpd2dqy\nvcvttpd2qq\013vcvttpd2ud"
    6478             :     "q\014vcvttpd2udqx\014vcvttpd2udqy\013vcvttpd2uqq\nvcvttps2dq\nvcvttps2q"
    6479             :     "q\013vcvttps2udq\013vcvttps2uqq\nvcvttsd2si\013vcvttsd2sil\013vcvttsd2s"
    6480             :     "iq\013vcvttsd2usi\014vcvttsd2usil\014vcvttsd2usiq\nvcvttss2si\013vcvtts"
    6481             :     "s2sil\013vcvttss2siq\013vcvttss2usi\014vcvttss2usil\014vcvttss2usiq\nvc"
    6482             :     "vtudq2pd\nvcvtudq2ps\nvcvtuqq2pd\nvcvtuqq2ps\013vcvtuqq2psx\013vcvtuqq2"
    6483             :     "psy\nvcvtusi2sd\013vcvtusi2sdl\013vcvtusi2sdq\nvcvtusi2ss\013vcvtusi2ss"
    6484             :     "l\013vcvtusi2ssq\tvdbpsadbw\006vdivpd\006vdivps\006vdivsd\006vdivss\005"
    6485             :     "vdppd\005vdpps\004verr\004verw\007vexp2pd\007vexp2ps\tvexpandpd\tvexpan"
    6486             :     "dps\014vextractf128\015vextractf32x4\015vextractf32x8\015vextractf64x2\015"
    6487             :     "vextractf64x4\014vextracti128\015vextracti32x4\015vextracti32x8\015vext"
    6488             :     "racti64x2\015vextracti64x4\nvextractps\013vfixupimmpd\013vfixupimmps\013"
    6489             :     "vfixupimmsd\013vfixupimmss\013vfmadd132pd\013vfmadd132ps\013vfmadd132sd"
    6490             :     "\013vfmadd132ss\013vfmadd213pd\013vfmadd213ps\013vfmadd213sd\013vfmadd2"
    6491             :     "13ss\013vfmadd231pd\013vfmadd231ps\013vfmadd231sd\013vfmadd231ss\010vfm"
    6492             :     "addpd\010vfmaddps\010vfmaddsd\010vfmaddss\016vfmaddsub132pd\016vfmaddsu"
    6493             :     "b132ps\016vfmaddsub213pd\016vfmaddsub213ps\016vfmaddsub231pd\016vfmadds"
    6494             :     "ub231ps\013vfmaddsubpd\013vfmaddsubps\013vfmsub132pd\013vfmsub132ps\013"
    6495             :     "vfmsub132sd\013vfmsub132ss\013vfmsub213pd\013vfmsub213ps\013vfmsub213sd"
    6496             :     "\013vfmsub213ss\013vfmsub231pd\013vfmsub231ps\013vfmsub231sd\013vfmsub2"
    6497             :     "31ss\016vfmsubadd132pd\016vfmsubadd132ps\016vfmsubadd213pd\016vfmsubadd"
    6498             :     "213ps\016vfmsubadd231pd\016vfmsubadd231ps\013vfmsubaddpd\013vfmsubaddps"
    6499             :     "\010vfmsubpd\010vfmsubps\010vfmsubsd\010vfmsubss\014vfnmadd132pd\014vfn"
    6500             :     "madd132ps\014vfnmadd132sd\014vfnmadd132ss\014vfnmadd213pd\014vfnmadd213"
    6501             :     "ps\014vfnmadd213sd\014vfnmadd213ss\014vfnmadd231pd\014vfnmadd231ps\014v"
    6502             :     "fnmadd231sd\014vfnmadd231ss\tvfnmaddpd\tvfnmaddps\tvfnmaddsd\tvfnmaddss"
    6503             :     "\014vfnmsub132pd\014vfnmsub132ps\014vfnmsub132sd\014vfnmsub132ss\014vfn"
    6504             :     "msub213pd\014vfnmsub213ps\014vfnmsub213sd\014vfnmsub213ss\014vfnmsub231"
    6505             :     "pd\014vfnmsub231ps\014vfnmsub231sd\014vfnmsub231ss\tvfnmsubpd\tvfnmsubp"
    6506             :     "s\tvfnmsubsd\tvfnmsubss\nvfpclasspd\013vfpclasspdq\013vfpclasspdx\013vf"
    6507             :     "pclasspdy\013vfpclasspdz\nvfpclassps\013vfpclasspsl\013vfpclasspsx\013v"
    6508             :     "fpclasspsy\013vfpclasspsz\nvfpclasssd\nvfpclassss\007vfrczpd\007vfrczps"
    6509             :     "\007vfrczsd\007vfrczss\nvgatherdpd\nvgatherdps\015vgatherpf0dpd\015vgat"
    6510             :     "herpf0dps\015vgatherpf0qpd\015vgatherpf0qps\015vgatherpf1dpd\015vgather"
    6511             :     "pf1dps\015vgatherpf1qpd\015vgatherpf1qps\nvgatherqpd\nvgatherqps\tvgete"
    6512             :     "xppd\tvgetexpps\tvgetexpsd\tvgetexpss\nvgetmantpd\nvgetmantps\nvgetmant"
    6513             :     "sd\nvgetmantss\007vhaddpd\007vhaddps\007vhsubpd\007vhsubps\013vinsertf1"
    6514             :     "28\014vinsertf32x4\014vinsertf32x8\014vinsertf64x2\014vinsertf64x4\013v"
    6515             :     "inserti128\014vinserti32x4\014vinserti32x8\014vinserti64x2\014vinserti6"
    6516             :     "4x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nvmaskmovpd\nvmaskm"
    6517             :     "ovps\006vmaxpd\006vmaxps\006vmaxsd\006vmaxss\006vmcall\007vmclear\006vm"
    6518             :     "func\006vminpd\006vminps\006vminsd\006vminss\010vmlaunch\006vmload\007v"
    6519             :     "mmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005vmovd\010vmovddup"
    6520             :     "\007vmovdqa\tvmovdqa32\013vmovdqa32.s\tvmovdqa64\013vmovdqa64.s\007vmov"
    6521             :     "dqu\tvmovdqu16\013vmovdqu16.s\tvmovdqu32\013vmovdqu32.s\tvmovdqu64\013v"
    6522             :     "movdqu64.s\010vmovdqu8\nvmovdqu8.s\010vmovhlps\007vmovhpd\007vmovhps\010"
    6523             :     "vmovlhps\007vmovlpd\007vmovlps\tvmovmskpd\tvmovmskps\010vmovntdq\tvmovn"
    6524             :     "tdqa\010vmovntpd\010vmovntps\005vmovq\007vmovq.s\006vmovsd\010vmovsd.s\t"
    6525             :     "vmovshdup\tvmovsldup\006vmovss\010vmovss.s\007vmovupd\tvmovupd.s\007vmo"
    6526             :     "vups\tvmovups.s\010vmpsadbw\007vmptrld\007vmptrst\006vmread\007vmreadl\007"
    6527             :     "vmreadq\010vmresume\005vmrun\006vmsave\006vmulpd\006vmulps\006vmulsd\006"
    6528             :     "vmulss\007vmwrite\010vmwritel\010vmwriteq\006vmxoff\005vmxon\005vorpd\005"
    6529             :     "vorps\006vpabsb\006vpabsd\006vpabsq\006vpabsw\tvpackssdw\tvpacksswb\tvp"
    6530             :     "ackusdw\tvpackuswb\006vpaddb\006vpaddd\006vpaddq\007vpaddsb\007vpaddsw\010"
    6531             :     "vpaddusb\010vpaddusw\006vpaddw\010vpalignr\005vpand\006vpandd\006vpandn"
    6532             :     "\007vpandnd\007vpandnq\006vpandq\006vpavgb\006vpavgw\010vpblendd\tvpble"
    6533             :     "ndmb\tvpblendmd\tvpblendmq\tvpblendmw\tvpblendvb\010vpblendw\014vpbroad"
    6534             :     "castb\014vpbroadcastd\017vpbroadcastmb2q\017vpbroadcastmw2d\014vpbroadc"
    6535             :     "astq\014vpbroadcastw\015vpclmulhqhqdq\015vpclmulhqlqdq\015vpclmullqhqdq"
    6536             :     "\015vpclmullqlqdq\nvpclmulqdq\006vpcmov\005vpcmp\006vpcmpb\006vpcmpd\010"
    6537             :     "vpcmpeqb\010vpcmpeqd\010vpcmpeqq\010vpcmpeqw\nvpcmpestri\nvpcmpestrm\010"
    6538             :     "vpcmpgtb\010vpcmpgtd\010vpcmpgtq\010vpcmpgtw\nvpcmpistri\nvpcmpistrm\006"
    6539             :     "vpcmpq\007vpcmpub\007vpcmpud\007vpcmpuq\007vpcmpuw\006vpcmpw\005vpcom\006"
    6540             :     "vpcomb\006vpcomd\013vpcompressd\013vpcompressq\006vpcomq\007vpcomub\007"
    6541             :     "vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vpconflictd\013vpconflictq\n"
    6542             :     "vperm2f128\nvperm2i128\006vpermb\006vpermd\010vpermi2b\010vpermi2d\tvpe"
    6543             :     "rmi2pd\tvpermi2ps\010vpermi2q\010vpermi2w\nvpermil2pd\nvpermil2ps\tvper"
    6544             :     "milpd\tvpermilps\007vpermpd\007vpermps\006vpermq\010vpermt2b\010vpermt2"
    6545             :     "d\tvpermt2pd\tvpermt2ps\010vpermt2q\010vpermt2w\006vpermw\tvpexpandd\tv"
    6546             :     "pexpandq\007vpextrb\007vpextrd\007vpextrq\007vpextrw\tvpextrw.s\nvpgath"
    6547             :     "erdd\nvpgatherdq\nvpgatherqd\nvpgatherqq\010vphaddbd\010vphaddbq\010vph"
    6548             :     "addbw\007vphaddd\010vphadddq\010vphaddsw\tvphaddubd\tvphaddubq\tvphaddu"
    6549             :     "bw\tvphaddudq\tvphadduwd\tvphadduwq\007vphaddw\010vphaddwd\010vphaddwq\013"
    6550             :     "vphminposuw\010vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007vphsubw\010"
    6551             :     "vphsubwd\007vpinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplzcntd\010vpl"
    6552             :     "zcntq\010vpmacsdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssdqh\nvpmacss"
    6553             :     "dql\tvpmacsswd\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcsswd\tvpmadcsw"
    6554             :     "d\013vpmadd52huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpmaskmovd\nvp"
    6555             :     "maskmovq\007vpmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpmaxub\007vpma"
    6556             :     "xud\007vpmaxuq\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007vpminsw\007"
    6557             :     "vpminub\007vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmovd2m\007vpm"
    6558             :     "ovdb\007vpmovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmovm2w\tvpmovm"
    6559             :     "skb\010vpmovq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb\010vpmovsd"
    6560             :     "w\010vpmovsqb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd\tvpmovsxbq"
    6561             :     "\tvpmovsxbw\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpmovusdw\tvpm"
    6562             :     "ovusqb\tvpmovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmovwb\tvpmovzx"
    6563             :     "bd\tvpmovzxbq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007vpmuldq\tv"
    6564             :     "pmulhrsw\010vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmullw\016vpm"
    6565             :     "ultishiftqb\010vpmuludq\010vpopcntd\010vpopcntq\004vpor\005vpord\005vpo"
    6566             :     "rq\006vpperm\006vprold\006vprolq\007vprolvd\007vprolvq\006vprord\006vpr"
    6567             :     "orq\007vprorvd\007vprorvq\006vprotb\006vprotd\006vprotq\006vprotw\007vp"
    6568             :     "sadbw\013vpscatterdd\013vpscatterdq\013vpscatterqd\013vpscatterqq\006vp"
    6569             :     "shab\006vpshad\006vpshaq\006vpshaw\006vpshlb\006vpshld\006vpshlq\006vps"
    6570             :     "hlw\007vpshufb\007vpshufd\010vpshufhw\010vpshuflw\007vpsignb\007vpsignd"
    6571             :     "\007vpsignw\006vpslld\007vpslldq\006vpsllq\007vpsllvd\007vpsllvq\007vps"
    6572             :     "llvw\006vpsllw\006vpsrad\006vpsraq\007vpsravd\007vpsravq\007vpsravw\006"
    6573             :     "vpsraw\006vpsrld\007vpsrldq\006vpsrlq\007vpsrlvd\007vpsrlvq\007vpsrlvw\006"
    6574             :     "vpsrlw\006vpsubb\006vpsubd\006vpsubq\007vpsubsb\007vpsubsw\010vpsubusb\010"
    6575             :     "vpsubusw\006vpsubw\nvpternlogd\nvpternlogq\006vptest\010vptestmb\010vpt"
    6576             :     "estmd\010vptestmq\010vptestmw\tvptestnmb\tvptestnmd\tvptestnmq\tvptestn"
    6577             :     "mw\nvpunpckhbw\nvpunpckhdq\013vpunpckhqdq\nvpunpckhwd\nvpunpcklbw\nvpun"
    6578             :     "pckldq\013vpunpcklqdq\nvpunpcklwd\005vpxor\006vpxord\006vpxorq\010vrang"
    6579             :     "epd\010vrangeps\010vrangesd\010vrangess\010vrcp14pd\010vrcp14ps\010vrcp"
    6580             :     "14sd\010vrcp14ss\010vrcp28pd\010vrcp28ps\010vrcp28sd\010vrcp28ss\006vrc"
    6581             :     "pps\006vrcpss\tvreducepd\tvreduceps\tvreducesd\tvreducess\013vrndscalep"
    6582             :     "d\013vrndscaleps\013vrndscalesd\013vrndscaless\010vroundpd\010vroundps\010"
    6583             :     "vroundsd\010vroundss\nvrsqrt14pd\nvrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nv"
    6584             :     "rsqrt28pd\nvrsqrt28ps\nvrsqrt28sd\nvrsqrt28ss\010vrsqrtps\010vrsqrtss\t"
    6585             :     "vscalefpd\tvscalefps\tvscalefsd\tvscalefss\013vscatterdpd\013vscatterdp"
    6586             :     "s\016vscatterpf0dpd\016vscatterpf0dps\016vscatterpf0qpd\016vscatterpf0q"
    6587             :     "ps\016vscatterpf1dpd\016vscatterpf1dps\016vscatterpf1qpd\016vscatterpf1"
    6588             :     "qps\013vscatterqpd\013vscatterqps\nvshuff32x4\nvshuff64x2\nvshufi32x4\n"
    6589             :     "vshufi64x2\007vshufpd\007vshufps\007vsqrtpd\007vsqrtps\007vsqrtsd\007vs"
    6590             :     "qrtss\010vstmxcsr\006vsubpd\006vsubps\006vsubsd\006vsubss\007vtestpd\007"
    6591             :     "vtestps\010vucomisd\010vucomiss\tvunpckhpd\tvunpckhps\tvunpcklpd\tvunpc"
    6592             :     "klps\006vxorpd\006vxorps\010vzeroall\nvzeroupper\004wait\006wbinvd\010w"
    6593             :     "rfsbase\twrfsbasel\twrfsbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrms"
    6594             :     "r\006wrpkru\006xabort\010xacquire\004xadd\005xaddb\005xaddl\005xaddq\005"
    6595             :     "xaddw\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xchgw\txcryptcbc\t"
    6596             :     "xcryptcfb\txcryptctr\txcryptecb\txcryptofb\004xend\006xgetbv\005xlatb\003"
    6597             :     "xor\004xorb\004xorl\005xorpd\005xorps\004xorq\004xorw\010xrelease\006xr"
    6598             :     "stor\010xrstor64\007xrstors\txrstors64\005xsave\007xsave64\006xsavec\010"
    6599             :     "xsavec64\010xsaveopt\nxsaveopt64\006xsaves\010xsaves64\006xsetbv\005xsh"
    6600             :     "a1\007xsha256\006xstore\txstorerng\005xtest";
    6601             : 
    6602             : namespace {
    6603             :   struct MatchEntry {
    6604             :     uint16_t Mnemonic;
    6605             :     uint16_t Opcode;
    6606             :     uint16_t ConvertFn;
    6607             :     uint16_t RequiredFeatures;
    6608             :     uint8_t Classes[9];
    6609             :     StringRef getMnemonic() const {
    6610     1696789 :       return StringRef(MnemonicTable + Mnemonic + 1,
    6611     1696789 :                        MnemonicTable[Mnemonic]);
    6612             :     }
    6613             :   };
    6614             : 
    6615             :   // Predicate for searching for an opcode.
    6616             :   struct LessOpcode {
    6617             :     bool operator()(const MatchEntry &LHS, StringRef RHS) {
    6618     1955082 :       return LHS.getMnemonic() < RHS;
    6619             :     }
    6620             :     bool operator()(StringRef LHS, const MatchEntry &RHS) {
    6621     1438496 :       return LHS < RHS.getMnemonic();
    6622             :     }
    6623             :     bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
    6624             :       return LHS.getMnemonic() < RHS.getMnemonic();
    6625             :     }
    6626             :   };
    6627             : } // end anonymous namespace.
    6628             : 
    6629             : static const MatchEntry MatchTable0[] = {
    6630             :   { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    6631             :   { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
    6632             :   { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    6633             :   { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, {  }, },
    6634             :   { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    6635             :   { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    6636             :   { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    6637             :   { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    6638             :   { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    6639             :   { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    6640             :   { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    6641             :   { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    6642             :   { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6643             :   { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6644             :   { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    6645             :   { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6646             :   { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6647             :   { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    6648             :   { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    6649             :   { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    6650             :   { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6651             :   { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6652             :   { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6653             :   { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    6654             :   { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6655             :   { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6656             :   { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    6657             :   { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    6658             :   { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    6659             :   { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6660             :   { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6661             :   { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6662             :   { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    6663             :   { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6664             :   { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6665             :   { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    6666             :   { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    6667             :   { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    6668             :   { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6669             :   { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6670             :   { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6671             :   { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6672             :   { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6673             :   { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    6674             :   { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    6675             :   { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    6676             :   { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    6677             :   { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    6678             :   { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    6679             :   { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6680             :   { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6681             :   { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    6682             :   { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6683             :   { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6684             :   { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    6685             :   { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    6686             :   { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    6687             :   { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6688             :   { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6689             :   { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6690             :   { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6691             :   { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6692             :   { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6693             :   { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6694             :   { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    6695             :   { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6696             :   { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6697             :   { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    6698             :   { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    6699             :   { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    6700             :   { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6701             :   { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6702             :   { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    6703             :   { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6704             :   { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    6705             :   { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6706             :   { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6707             :   { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6708             :   { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6709             :   { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6710             :   { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6711             :   { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    6712             :   { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6713             :   { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6714             :   { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    6715             :   { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    6716             :   { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    6717             :   { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6718             :   { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6719             :   { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6720             :   { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6721             :   { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6722             :   { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6723             :   { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6724             :   { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6725             :   { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6726             :   { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6727             :   { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6728             :   { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6729             :   { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6730             :   { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6731             :   { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6732             :   { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    6733             :   { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    6734             :   { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    6735             :   { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    6736             :   { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    6737             :   { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    6738             :   { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    6739             :   { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    6740             :   { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6741             :   { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6742             :   { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    6743             :   { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6744             :   { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6745             :   { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    6746             :   { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    6747             :   { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    6748             :   { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6749             :   { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    6750             :   { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    6751             :   { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6752             :   { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6753             :   { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6754             :   { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6755             :   { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    6756             :   { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    6757             :   { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6758             :   { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6759             :   { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6760             :   { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6761             :   { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6762             :   { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6763             :   { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    6764             :   { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6765             :   { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6766             :   { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    6767             :   { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    6768             :   { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    6769             :   { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6770             :   { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6771             :   { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6772             :   { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    6773             :   { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6774             :   { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6775             :   { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    6776             :   { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    6777             :   { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    6778             :   { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6779             :   { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
    6780             :   { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
    6781             :   { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
    6782             :   { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
    6783             :   { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    6784             :   { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    6785             :   { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    6786             :   { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    6787             :   { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    6788             :   { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    6789             :   { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6790             :   { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6791             :   { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6792             :   { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6793             :   { 299 /* blci */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6794             :   { 299 /* blci */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6795             :   { 299 /* blci */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6796             :   { 299 /* blci */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6797             :   { 304 /* blcic */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6798             :   { 304 /* blcic */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6799             :   { 304 /* blcic */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6800             :   { 304 /* blcic */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6801             :   { 310 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6802             :   { 310 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6803             :   { 310 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6804             :   { 310 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6805             :   { 317 /* blcs */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6806             :   { 317 /* blcs */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6807             :   { 317 /* blcs */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6808             :   { 317 /* blcs */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6809             :   { 322 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    6810             :   { 322 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    6811             :   { 330 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    6812             :   { 330 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    6813             :   { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6814             :   { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6815             :   { 338 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    6816             :   { 338 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    6817             :   { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    6818             :   { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    6819             :   { 347 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    6820             :   { 347 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    6821             :   { 356 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6822             :   { 356 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6823             :   { 356 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6824             :   { 356 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6825             :   { 369 /* blsic */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6826             :   { 369 /* blsic */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6827             :   { 369 /* blsic */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6828             :   { 369 /* blsic */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6829             :   { 375 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6830             :   { 375 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6831             :   { 381 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6832             :   { 381 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6833             :   { 394 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6834             :   { 394 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6835             :   { 402 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6836             :   { 402 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6837             :   { 415 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6838             :   { 415 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6839             :   { 421 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6840             :   { 421 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6841             :   { 427 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
    6842             :   { 427 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
    6843             :   { 427 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
    6844             :   { 427 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
    6845             :   { 433 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
    6846             :   { 433 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
    6847             :   { 433 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
    6848             :   { 433 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
    6849             :   { 439 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
    6850             :   { 439 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
    6851             :   { 439 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
    6852             :   { 439 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
    6853             :   { 445 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_BNDR }, },
    6854             :   { 452 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_BNDR }, },
    6855             :   { 452 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_BNDR }, },
    6856             :   { 458 /* bndmov */, X86::BNDMOVMRrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
    6857             :   { 458 /* bndmov */, X86::BNDMOVRMrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
    6858             :   { 458 /* bndmov */, X86::BNDMOVMR64mr, Convert__Mem1285_1__Reg1_0, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
    6859             :   { 458 /* bndmov */, X86::BNDMOVMR32mr, Convert__Mem645_1__Reg1_0, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
    6860             :   { 458 /* bndmov */, X86::BNDMOVRM64rm, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
    6861             :   { 458 /* bndmov */, X86::BNDMOVRM32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
    6862             :   { 465 /* bndstx */, X86::BNDSTXmr, Convert__Mem645_1__Reg1_0, 0, { MCK_BNDR, MCK_Mem64 }, },
    6863             :   { 472 /* bound */, X86::BOUNDS16rm, Convert__Reg1_1__Mem165_0, Feature_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
    6864             :   { 472 /* bound */, X86::BOUNDS32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
    6865             :   { 482 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6866             :   { 482 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6867             :   { 487 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6868             :   { 487 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6869             :   { 492 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6870             :   { 492 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6871             :   { 501 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6872             :   { 501 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6873             :   { 506 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6874             :   { 506 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6875             :   { 511 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6876             :   { 511 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6877             :   { 522 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    6878             :   { 529 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    6879             :   { 536 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6880             :   { 539 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6881             :   { 543 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6882             :   { 543 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6883             :   { 543 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6884             :   { 543 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6885             :   { 548 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6886             :   { 548 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6887             :   { 548 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6888             :   { 548 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6889             :   { 553 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6890             :   { 553 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6891             :   { 553 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6892             :   { 553 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6893             :   { 558 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6894             :   { 558 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6895             :   { 558 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6896             :   { 558 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6897             :   { 562 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6898             :   { 562 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6899             :   { 562 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6900             :   { 562 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6901             :   { 566 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6902             :   { 570 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6903             :   { 570 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6904             :   { 570 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6905             :   { 570 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6906             :   { 575 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6907             :   { 575 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6908             :   { 575 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6909             :   { 575 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6910             :   { 580 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6911             :   { 580 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6912             :   { 580 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6913             :   { 580 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6914             :   { 585 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6915             :   { 589 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6916             :   { 589 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    6917             :   { 589 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    6918             :   { 589 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    6919             :   { 594 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6920             :   { 594 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    6921             :   { 594 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    6922             :   { 594 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    6923             :   { 599 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6924             :   { 599 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6925             :   { 599 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6926             :   { 599 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6927             :   { 604 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6928             :   { 604 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    6929             :   { 604 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    6930             :   { 604 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    6931             :   { 613 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    6932             :   { 613 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    6933             :   { 619 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    6934             :   { 619 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    6935             :   { 625 /* call */, X86::CALL16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
    6936             :   { 625 /* call */, X86::CALL32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
    6937             :   { 625 /* call */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    6938             :   { 625 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    6939             :   { 625 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    6940             :   { 630 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
    6941             :   { 630 /* calll */, X86::CALL32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
    6942             :   { 630 /* calll */, X86::CALL32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
    6943             :   { 630 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    6944             :   { 636 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
    6945             :   { 636 /* callq */, X86::CALL64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
    6946             :   { 636 /* callq */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    6947             :   { 642 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    6948             :   { 642 /* callw */, X86::CALL16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
    6949             :   { 642 /* callw */, X86::CALL16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
    6950             :   { 642 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    6951             :   { 648 /* cbtw */, X86::CBW, Convert_NoOperands, 0, {  }, },
    6952             :   { 666 /* clac */, X86::CLAC, Convert_NoOperands, 0, {  }, },
    6953             :   { 671 /* clc */, X86::CLC, Convert_NoOperands, 0, {  }, },
    6954             :   { 675 /* cld */, X86::CLD, Convert_NoOperands, 0, {  }, },
    6955             :   { 679 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    6956             :   { 687 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    6957             :   { 698 /* clgi */, X86::CLGI, Convert_NoOperands, 0, {  }, },
    6958             :   { 703 /* cli */, X86::CLI, Convert_NoOperands, 0, {  }, },
    6959             :   { 707 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR8 }, },
    6960             :   { 712 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR32 }, },
    6961             :   { 717 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR64 }, },
    6962             :   { 722 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0__Reg1_0, 0, { MCK_GR16 }, },
    6963             :   { 727 /* cltd */, X86::CDQ, Convert_NoOperands, 0, {  }, },
    6964             :   { 732 /* cltq */, X86::CDQE, Convert_NoOperands, 0, {  }, },
    6965             :   { 737 /* clts */, X86::CLTS, Convert_NoOperands, 0, {  }, },
    6966             :   { 742 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    6967             :   { 747 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, {  }, },
    6968             :   { 747 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
    6969             :   { 747 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
    6970             :   { 754 /* cmc */, X86::CMC, Convert_NoOperands, 0, {  }, },
    6971             :   { 771 /* cmovael */, X86::CMOVAE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6972             :   { 771 /* cmovael */, X86::CMOVAE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6973             :   { 779 /* cmovaeq */, X86::CMOVAE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6974             :   { 779 /* cmovaeq */, X86::CMOVAE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6975             :   { 787 /* cmovaew */, X86::CMOVAE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6976             :   { 787 /* cmovaew */, X86::CMOVAE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6977             :   { 795 /* cmoval */, X86::CMOVA32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6978             :   { 795 /* cmoval */, X86::CMOVA32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6979             :   { 802 /* cmovaq */, X86::CMOVA64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6980             :   { 802 /* cmovaq */, X86::CMOVA64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6981             :   { 809 /* cmovaw */, X86::CMOVA16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6982             :   { 809 /* cmovaw */, X86::CMOVA16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6983             :   { 829 /* cmovbel */, X86::CMOVBE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6984             :   { 829 /* cmovbel */, X86::CMOVBE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6985             :   { 837 /* cmovbeq */, X86::CMOVBE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6986             :   { 837 /* cmovbeq */, X86::CMOVBE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6987             :   { 845 /* cmovbew */, X86::CMOVBE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6988             :   { 845 /* cmovbew */, X86::CMOVBE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6989             :   { 853 /* cmovbl */, X86::CMOVB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6990             :   { 853 /* cmovbl */, X86::CMOVB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6991             :   { 860 /* cmovbq */, X86::CMOVB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6992             :   { 860 /* cmovbq */, X86::CMOVB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6993             :   { 867 /* cmovbw */, X86::CMOVB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    6994             :   { 867 /* cmovbw */, X86::CMOVB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    6995             :   { 880 /* cmovel */, X86::CMOVE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    6996             :   { 880 /* cmovel */, X86::CMOVE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    6997             :   { 887 /* cmoveq */, X86::CMOVE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    6998             :   { 887 /* cmoveq */, X86::CMOVE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    6999             :   { 894 /* cmovew */, X86::CMOVE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7000             :   { 894 /* cmovew */, X86::CMOVE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7001             :   { 914 /* cmovgel */, X86::CMOVGE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7002             :   { 914 /* cmovgel */, X86::CMOVGE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7003             :   { 922 /* cmovgeq */, X86::CMOVGE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7004             :   { 922 /* cmovgeq */, X86::CMOVGE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7005             :   { 930 /* cmovgew */, X86::CMOVGE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7006             :   { 930 /* cmovgew */, X86::CMOVGE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7007             :   { 938 /* cmovgl */, X86::CMOVG32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7008             :   { 938 /* cmovgl */, X86::CMOVG32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7009             :   { 945 /* cmovgq */, X86::CMOVG64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7010             :   { 945 /* cmovgq */, X86::CMOVG64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7011             :   { 952 /* cmovgw */, X86::CMOVG16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7012             :   { 952 /* cmovgw */, X86::CMOVG16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7013             :   { 972 /* cmovlel */, X86::CMOVLE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7014             :   { 972 /* cmovlel */, X86::CMOVLE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7015             :   { 980 /* cmovleq */, X86::CMOVLE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7016             :   { 980 /* cmovleq */, X86::CMOVLE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7017             :   { 988 /* cmovlew */, X86::CMOVLE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7018             :   { 988 /* cmovlew */, X86::CMOVLE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7019             :   { 996 /* cmovll */, X86::CMOVL32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7020             :   { 996 /* cmovll */, X86::CMOVL32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7021             :   { 1003 /* cmovlq */, X86::CMOVL64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7022             :   { 1003 /* cmovlq */, X86::CMOVL64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7023             :   { 1010 /* cmovlw */, X86::CMOVL16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7024             :   { 1010 /* cmovlw */, X86::CMOVL16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7025             :   { 1024 /* cmovnel */, X86::CMOVNE32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7026             :   { 1024 /* cmovnel */, X86::CMOVNE32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7027             :   { 1032 /* cmovneq */, X86::CMOVNE64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7028             :   { 1032 /* cmovneq */, X86::CMOVNE64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7029             :   { 1040 /* cmovnew */, X86::CMOVNE16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7030             :   { 1040 /* cmovnew */, X86::CMOVNE16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7031             :   { 1055 /* cmovnol */, X86::CMOVNO32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7032             :   { 1055 /* cmovnol */, X86::CMOVNO32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7033             :   { 1063 /* cmovnoq */, X86::CMOVNO64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7034             :   { 1063 /* cmovnoq */, X86::CMOVNO64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7035             :   { 1071 /* cmovnow */, X86::CMOVNO16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7036             :   { 1071 /* cmovnow */, X86::CMOVNO16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7037             :   { 1086 /* cmovnpl */, X86::CMOVNP32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7038             :   { 1086 /* cmovnpl */, X86::CMOVNP32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7039             :   { 1094 /* cmovnpq */, X86::CMOVNP64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7040             :   { 1094 /* cmovnpq */, X86::CMOVNP64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7041             :   { 1102 /* cmovnpw */, X86::CMOVNP16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7042             :   { 1102 /* cmovnpw */, X86::CMOVNP16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7043             :   { 1117 /* cmovnsl */, X86::CMOVNS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7044             :   { 1117 /* cmovnsl */, X86::CMOVNS32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7045             :   { 1125 /* cmovnsq */, X86::CMOVNS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7046             :   { 1125 /* cmovnsq */, X86::CMOVNS64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7047             :   { 1133 /* cmovnsw */, X86::CMOVNS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7048             :   { 1133 /* cmovnsw */, X86::CMOVNS16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7049             :   { 1147 /* cmovol */, X86::CMOVO32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7050             :   { 1147 /* cmovol */, X86::CMOVO32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7051             :   { 1154 /* cmovoq */, X86::CMOVO64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7052             :   { 1154 /* cmovoq */, X86::CMOVO64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7053             :   { 1161 /* cmovow */, X86::CMOVO16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7054             :   { 1161 /* cmovow */, X86::CMOVO16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7055             :   { 1174 /* cmovpl */, X86::CMOVP32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7056             :   { 1174 /* cmovpl */, X86::CMOVP32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7057             :   { 1181 /* cmovpq */, X86::CMOVP64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7058             :   { 1181 /* cmovpq */, X86::CMOVP64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7059             :   { 1188 /* cmovpw */, X86::CMOVP16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7060             :   { 1188 /* cmovpw */, X86::CMOVP16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7061             :   { 1201 /* cmovsl */, X86::CMOVS32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7062             :   { 1201 /* cmovsl */, X86::CMOVS32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7063             :   { 1208 /* cmovsq */, X86::CMOVS64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7064             :   { 1208 /* cmovsq */, X86::CMOVS64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7065             :   { 1215 /* cmovsw */, X86::CMOVS16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7066             :   { 1215 /* cmovsw */, X86::CMOVS16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7067             :   { 1222 /* cmp */, X86::CMPPDrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
    7068             :   { 1222 /* cmp */, X86::CMPPDrmi, Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32 }, },
    7069             :   { 1222 /* cmp */, X86::CMPPSrri, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
    7070             :   { 1222 /* cmp */, X86::CMPPSrmi, Convert__Reg1_3__Tie0__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32 }, },
    7071             :   { 1222 /* cmp */, X86::CMPSDrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
    7072             :   { 1222 /* cmp */, X86::CMPSDrm, Convert__Reg1_3__Tie0__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32 }, },
    7073             :   { 1222 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
    7074             :   { 1222 /* cmp */, X86::CMPSSrm, Convert__Reg1_3__Tie0__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32 }, },
    7075             :   { 1226 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    7076             :   { 1226 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    7077             :   { 1226 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    7078             :   { 1226 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    7079             :   { 1226 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    7080             :   { 1226 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    7081             :   { 1231 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7082             :   { 1231 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7083             :   { 1231 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    7084             :   { 1231 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7085             :   { 1231 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    7086             :   { 1231 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    7087             :   { 1231 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    7088             :   { 1231 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    7089             :   { 1231 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7090             :   { 1236 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7091             :   { 1236 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7092             :   { 1242 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7093             :   { 1242 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7094             :   { 1248 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7095             :   { 1248 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7096             :   { 1248 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    7097             :   { 1248 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7098             :   { 1248 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    7099             :   { 1248 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    7100             :   { 1248 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    7101             :   { 1248 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    7102             :   { 1248 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7103             :   { 1253 /* cmps */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
    7104             :   { 1253 /* cmps */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
    7105             :   { 1253 /* cmps */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
    7106             :   { 1253 /* cmps */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
    7107             :   { 1258 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
    7108             :   { 1264 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7109             :   { 1264 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
    7110             :   { 1270 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
    7111             :   { 1276 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, 0, { MCK_DstIdx64, MCK_SrcIdx64 }, },
    7112             :   { 1282 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7113             :   { 1282 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    7114             :   { 1288 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
    7115             :   { 1294 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7116             :   { 1294 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7117             :   { 1294 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    7118             :   { 1294 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7119             :   { 1294 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    7120             :   { 1294 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    7121             :   { 1294 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    7122             :   { 1294 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    7123             :   { 1294 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7124             :   { 1307 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, 0, { MCK_Mem128 }, },
    7125             :   { 1318 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7126             :   { 1328 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    7127             :   { 1328 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    7128             :   { 1337 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7129             :   { 1337 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7130             :   { 1346 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7131             :   { 1346 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7132             :   { 1355 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7133             :   { 1355 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7134             :   { 1364 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7135             :   { 1364 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7136             :   { 1371 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7137             :   { 1371 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7138             :   { 1378 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, {  }, },
    7139             :   { 1388 /* cqto */, X86::CQO, Convert_NoOperands, 0, {  }, },
    7140             :   { 1399 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    7141             :   { 1399 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    7142             :   { 1399 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
    7143             :   { 1399 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
    7144             :   { 1406 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7145             :   { 1406 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7146             :   { 1413 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7147             :   { 1413 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7148             :   { 1420 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    7149             :   { 1420 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    7150             :   { 1427 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, {  }, },
    7151             :   { 1430 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7152             :   { 1430 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7153             :   { 1439 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7154             :   { 1439 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7155             :   { 1448 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7156             :   { 1448 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7157             :   { 1457 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7158             :   { 1457 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
    7159             :   { 1466 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7160             :   { 1466 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7161             :   { 1475 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
    7162             :   { 1475 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7163             :   { 1484 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
    7164             :   { 1484 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7165             :   { 1493 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7166             :   { 1493 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7167             :   { 1502 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7168             :   { 1502 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7169             :   { 1511 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7170             :   { 1511 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    7171             :   { 1520 /* cvtsd2si */, X86::CVTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7172             :   { 1520 /* cvtsd2si */, X86::CVTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7173             :   { 1520 /* cvtsd2si */, X86::CVTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7174             :   { 1520 /* cvtsd2si */, X86::CVTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7175             :   { 1529 /* cvtsd2sil */, X86::CVTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7176             :   { 1529 /* cvtsd2sil */, X86::CVTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7177             :   { 1539 /* cvtsd2siq */, X86::CVTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7178             :   { 1539 /* cvtsd2siq */, X86::CVTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7179             :   { 1549 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7180             :   { 1549 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7181             :   { 1558 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7182             :   { 1567 /* cvtsi2sdl */, X86::CVTSI2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
    7183             :   { 1567 /* cvtsi2sdl */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7184             :   { 1577 /* cvtsi2sdq */, X86::CVTSI2SD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    7185             :   { 1577 /* cvtsi2sdq */, X86::CVTSI2SD64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7186             :   { 1587 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7187             :   { 1596 /* cvtsi2ssl */, X86::CVTSI2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
    7188             :   { 1596 /* cvtsi2ssl */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7189             :   { 1606 /* cvtsi2ssq */, X86::CVTSI2SS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    7190             :   { 1606 /* cvtsi2ssq */, X86::CVTSI2SS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7191             :   { 1616 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7192             :   { 1616 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7193             :   { 1625 /* cvtss2si */, X86::CVTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7194             :   { 1625 /* cvtss2si */, X86::CVTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7195             :   { 1625 /* cvtss2si */, X86::CVTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7196             :   { 1625 /* cvtss2si */, X86::CVTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7197             :   { 1634 /* cvtss2sil */, X86::CVTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7198             :   { 1634 /* cvtss2sil */, X86::CVTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7199             :   { 1644 /* cvtss2siq */, X86::CVTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7200             :   { 1644 /* cvtss2siq */, X86::CVTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7201             :   { 1654 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7202             :   { 1654 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7203             :   { 1664 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7204             :   { 1664 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
    7205             :   { 1674 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7206             :   { 1674 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7207             :   { 1684 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7208             :   { 1684 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    7209             :   { 1694 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7210             :   { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7211             :   { 1694 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7212             :   { 1694 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7213             :   { 1704 /* cvttsd2sil */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7214             :   { 1704 /* cvttsd2sil */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
    7215             :   { 1715 /* cvttsd2siq */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7216             :   { 1715 /* cvttsd2siq */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7217             :   { 1726 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7218             :   { 1726 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7219             :   { 1726 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7220             :   { 1726 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7221             :   { 1736 /* cvttss2sil */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7222             :   { 1736 /* cvttss2sil */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7223             :   { 1747 /* cvttss2siq */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7224             :   { 1747 /* cvttss2siq */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
    7225             :   { 1767 /* cwtd */, X86::CWD, Convert_NoOperands, 0, {  }, },
    7226             :   { 1772 /* cwtl */, X86::CWDE, Convert_NoOperands, 0, {  }, },
    7227             :   { 1777 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7228             :   { 1781 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7229             :   { 1785 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, Feature_Not16BitMode, {  }, },
    7230             :   { 1792 /* data32 */, X86::DATA32_PREFIX, Convert_NoOperands, Feature_In16BitMode, {  }, },
    7231             :   { 1803 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    7232             :   { 1803 /* decb */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7233             :   { 1808 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
    7234             :   { 1808 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    7235             :   { 1808 /* decl */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7236             :   { 1813 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    7237             :   { 1813 /* decq */, X86::DEC64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7238             :   { 1818 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
    7239             :   { 1818 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    7240             :   { 1818 /* decw */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7241             :   { 1827 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    7242             :   { 1827 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7243             :   { 1827 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
    7244             :   { 1827 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
    7245             :   { 1832 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7246             :   { 1832 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7247             :   { 1832 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
    7248             :   { 1832 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
    7249             :   { 1837 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7250             :   { 1837 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7251             :   { 1843 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7252             :   { 1843 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7253             :   { 1849 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7254             :   { 1849 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7255             :   { 1849 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
    7256             :   { 1849 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
    7257             :   { 1854 /* divsd */, X86::DIVSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7258             :   { 1854 /* divsd */, X86::DIVSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7259             :   { 1860 /* divss */, X86::DIVSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7260             :   { 1860 /* divss */, X86::DIVSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7261             :   { 1866 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7262             :   { 1866 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7263             :   { 1866 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
    7264             :   { 1866 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
    7265             :   { 1871 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7266             :   { 1871 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7267             :   { 1876 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7268             :   { 1876 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    7269             :   { 1881 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, {  }, },
    7270             :   { 1884 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, {  }, },
    7271             :   { 1889 /* encls */, X86::ENCLS, Convert_NoOperands, 0, {  }, },
    7272             :   { 1895 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, {  }, },
    7273             :   { 1901 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
    7274             :   { 1907 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, {  }, },
    7275             :   { 1910 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
    7276             :   { 1910 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
    7277             :   { 1920 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7278             :   { 1920 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
    7279             :   { 1926 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, {  }, },
    7280             :   { 1932 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, {  }, },
    7281             :   { 1937 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
    7282             :   { 1937 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7283             :   { 1937 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7284             :   { 1937 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7285             :   { 1937 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7286             :   { 1942 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7287             :   { 1948 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, {  }, },
    7288             :   { 1948 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7289             :   { 1948 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7290             :   { 1948 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7291             :   { 1948 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7292             :   { 1954 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7293             :   { 1960 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7294             :   { 1965 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7295             :   { 1971 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, {  }, },
    7296             :   { 1976 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7297             :   { 1983 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7298             :   { 1991 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7299             :   { 1998 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7300             :   { 2006 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7301             :   { 2015 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7302             :   { 2023 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7303             :   { 2031 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7304             :   { 2038 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, {  }, },
    7305             :   { 2038 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7306             :   { 2043 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, {  }, },
    7307             :   { 2043 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
    7308             :   { 2043 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7309             :   { 2043 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7310             :   { 2049 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7311             :   { 2055 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, {  }, },
    7312             :   { 2055 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7313             :   { 2061 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, {  }, },
    7314             :   { 2061 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
    7315             :   { 2061 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7316             :   { 2061 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7317             :   { 2068 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7318             :   { 2075 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, {  }, },
    7319             :   { 2082 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7320             :   { 2089 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7321             :   { 2095 /* fcos */, X86::COS_F, Convert_NoOperands, 0, {  }, },
    7322             :   { 2100 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, {  }, },
    7323             :   { 2108 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7324             :   { 2108 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7325             :   { 2108 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7326             :   { 2108 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7327             :   { 2113 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7328             :   { 2119 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, 0, {  }, },
    7329             :   { 2119 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7330             :   { 2119 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7331             :   { 2119 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7332             :   { 2119 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7333             :   { 2125 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7334             :   { 2125 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7335             :   { 2125 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7336             :   { 2125 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7337             :   { 2131 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7338             :   { 2138 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, 0, {  }, },
    7339             :   { 2138 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7340             :   { 2138 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7341             :   { 2138 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7342             :   { 2138 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7343             :   { 2145 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7344             :   { 2152 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7345             :   { 2158 /* femms */, X86::FEMMS, Convert_NoOperands, 0, {  }, },
    7346             :   { 2164 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
    7347             :   { 2170 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
    7348             :   { 2183 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7349             :   { 2190 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7350             :   { 2203 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7351             :   { 2217 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7352             :   { 2225 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7353             :   { 2233 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7354             :   { 2246 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7355             :   { 2260 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7356             :   { 2268 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7357             :   { 2276 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7358             :   { 2288 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7359             :   { 2294 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7360             :   { 2301 /* filds */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7361             :   { 2313 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7362             :   { 2320 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7363             :   { 2327 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, {  }, },
    7364             :   { 2340 /* fistl */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7365             :   { 2352 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7366             :   { 2359 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7367             :   { 2367 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7368             :   { 2374 /* fists */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7369             :   { 2387 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7370             :   { 2395 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7371             :   { 2404 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7372             :   { 2418 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7373             :   { 2432 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7374             :   { 2440 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7375             :   { 2448 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7376             :   { 2455 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
    7377             :   { 2459 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, {  }, },
    7378             :   { 2464 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7379             :   { 2470 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7380             :   { 2477 /* fldl */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7381             :   { 2482 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, {  }, },
    7382             :   { 2489 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, {  }, },
    7383             :   { 2496 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, {  }, },
    7384             :   { 2503 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, {  }, },
    7385             :   { 2510 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, {  }, },
    7386             :   { 2516 /* flds */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7387             :   { 2521 /* fldt */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7388             :   { 2526 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, {  }, },
    7389             :   { 2531 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
    7390             :   { 2531 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7391             :   { 2531 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7392             :   { 2531 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7393             :   { 2531 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7394             :   { 2536 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7395             :   { 2542 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, {  }, },
    7396             :   { 2542 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7397             :   { 2542 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7398             :   { 2542 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7399             :   { 2542 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7400             :   { 2548 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7401             :   { 2554 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, {  }, },
    7402             :   { 2561 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, {  }, },
    7403             :   { 2568 /* fnop */, X86::FNOP, Convert_NoOperands, 0, {  }, },
    7404             :   { 2573 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7405             :   { 2580 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7406             :   { 2587 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7407             :   { 2595 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, {  }, },
    7408             :   { 2595 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AL }, },
    7409             :   { 2595 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
    7410             :   { 2595 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_EAX }, },
    7411             :   { 2595 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7412             :   { 2602 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, {  }, },
    7413             :   { 2609 /* fprem */, X86::FPREM, Convert_NoOperands, 0, {  }, },
    7414             :   { 2615 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, {  }, },
    7415             :   { 2622 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, {  }, },
    7416             :   { 2628 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, {  }, },
    7417             :   { 2636 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7418             :   { 2643 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, {  }, },
    7419             :   { 2646 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, {  }, },
    7420             :   { 2653 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, {  }, },
    7421             :   { 2658 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, {  }, },
    7422             :   { 2666 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, {  }, },
    7423             :   { 2672 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
    7424             :   { 2676 /* fstl */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7425             :   { 2681 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
    7426             :   { 2686 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7427             :   { 2692 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7428             :   { 2698 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
    7429             :   { 2704 /* fsts */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7430             :   { 2709 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7431             :   { 2709 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7432             :   { 2709 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7433             :   { 2709 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7434             :   { 2714 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7435             :   { 2720 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, 0, {  }, },
    7436             :   { 2720 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7437             :   { 2720 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7438             :   { 2720 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7439             :   { 2720 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7440             :   { 2726 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
    7441             :   { 2726 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7442             :   { 2726 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7443             :   { 2726 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7444             :   { 2732 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7445             :   { 2739 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, 0, {  }, },
    7446             :   { 2739 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
    7447             :   { 2739 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7448             :   { 2739 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
    7449             :   { 2739 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7450             :   { 2746 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7451             :   { 2753 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7452             :   { 2759 /* ftst */, X86::TST_F, Convert_NoOperands, 0, {  }, },
    7453             :   { 2764 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, {  }, },
    7454             :   { 2764 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
    7455             :   { 2770 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, {  }, },
    7456             :   { 2770 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
    7457             :   { 2770 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7458             :   { 2770 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7459             :   { 2777 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, {  }, },
    7460             :   { 2777 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
    7461             :   { 2784 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, {  }, },
    7462             :   { 2784 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
    7463             :   { 2784 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
    7464             :   { 2784 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
    7465             :   { 2792 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, {  }, },
    7466             :   { 2800 /* fxam */, X86::FXAM, Convert_NoOperands, 0, {  }, },
    7467             :   { 2805 /* fxch */, X86::XCH_F, Convert__regST1, 0, {  }, },
    7468             :   { 2805 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
    7469             :   { 2810 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
    7470             :   { 2818 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, 0, { MCK_Mem }, },
    7471             :   { 2828 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
    7472             :   { 2835 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, 0, { MCK_Mem }, },
    7473             :   { 2844 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, {  }, },
    7474             :   { 2852 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, {  }, },
    7475             :   { 2858 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, {  }, },
    7476             :   { 2866 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, {  }, },
    7477             :   { 2873 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, {  }, },
    7478             :   { 2876 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7479             :   { 2876 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7480             :   { 2883 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7481             :   { 2883 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7482             :   { 2890 /* hlt */, X86::HLT, Convert_NoOperands, 0, {  }, },
    7483             :   { 2894 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7484             :   { 2894 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7485             :   { 2901 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7486             :   { 2901 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7487             :   { 2913 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    7488             :   { 2913 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7489             :   { 2913 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
    7490             :   { 2913 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
    7491             :   { 2919 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7492             :   { 2919 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7493             :   { 2919 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
    7494             :   { 2919 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
    7495             :   { 2925 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7496             :   { 2925 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7497             :   { 2925 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
    7498             :   { 2925 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
    7499             :   { 2931 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7500             :   { 2931 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7501             :   { 2931 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
    7502             :   { 2931 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
    7503             :   { 2942 /* imulb */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    7504             :   { 2942 /* imulb */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7505             :   { 2948 /* imull */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7506             :   { 2948 /* imull */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7507             :   { 2948 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7508             :   { 2948 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    7509             :   { 2948 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    7510             :   { 2948 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7511             :   { 2948 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
    7512             :   { 2948 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
    7513             :   { 2948 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    7514             :   { 2948 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    7515             :   { 2954 /* imulq */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7516             :   { 2954 /* imulq */, X86::IMUL64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7517             :   { 2954 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7518             :   { 2954 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    7519             :   { 2954 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    7520             :   { 2954 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7521             :   { 2954 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
    7522             :   { 2954 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
    7523             :   { 2954 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
    7524             :   { 2954 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
    7525             :   { 2960 /* imulw */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7526             :   { 2960 /* imulw */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7527             :   { 2960 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7528             :   { 2960 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    7529             :   { 2960 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    7530             :   { 2960 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7531             :   { 2960 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
    7532             :   { 2960 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
    7533             :   { 2960 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
    7534             :   { 2960 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
    7535             :   { 2969 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
    7536             :   { 2969 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7537             :   { 2969 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
    7538             :   { 2969 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
    7539             :   { 2977 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    7540             :   { 2977 /* incb */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7541             :   { 2982 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR32 }, },
    7542             :   { 2982 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    7543             :   { 2982 /* incl */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7544             :   { 2987 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    7545             :   { 2987 /* incq */, X86::INC64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    7546             :   { 2992 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0, Feature_Not64BitMode, { MCK_GR16 }, },
    7547             :   { 2992 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    7548             :   { 2992 /* incw */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7549             :   { 2997 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
    7550             :   { 2997 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7551             :   { 2997 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
    7552             :   { 2997 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
    7553             :   { 3001 /* ins */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
    7554             :   { 3001 /* ins */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
    7555             :   { 3001 /* ins */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
    7556             :   { 3005 /* insb */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
    7557             :   { 3015 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7558             :   { 3015 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    7559             :   { 3024 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7560             :   { 3024 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    7561             :   { 3032 /* insl */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
    7562             :   { 3037 /* insw */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
    7563             :   { 3042 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7564             :   { 3046 /* int3 */, X86::INT3, Convert_NoOperands, 0, {  }, },
    7565             :   { 3051 /* into */, X86::INTO, Convert_NoOperands, 0, {  }, },
    7566             :   { 3056 /* invd */, X86::INVD, Convert_NoOperands, 0, {  }, },
    7567             :   { 3061 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
    7568             :   { 3061 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
    7569             :   { 3068 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    7570             :   { 3075 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
    7571             :   { 3075 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_ECX, MCK_RAX }, },
    7572             :   { 3083 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
    7573             :   { 3083 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
    7574             :   { 3091 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
    7575             :   { 3091 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
    7576             :   { 3099 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
    7577             :   { 3099 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    7578             :   { 3099 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
    7579             :   { 3099 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
    7580             :   { 3114 /* iretl */, X86::IRET32, Convert_NoOperands, 0, {  }, },
    7581             :   { 3120 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    7582             :   { 3126 /* iretw */, X86::IRET16, Convert_NoOperands, 0, {  }, },
    7583             :   { 3132 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7584             :   { 3135 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7585             :   { 3139 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7586             :   { 3142 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7587             :   { 3146 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
    7588             :   { 3151 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7589             :   { 3154 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7590             :   { 3160 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7591             :   { 3163 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7592             :   { 3167 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7593             :   { 3170 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7594             :   { 3174 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7595             :   { 3174 /* jmp */, X86::JMP16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
    7596             :   { 3174 /* jmp */, X86::JMP32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
    7597             :   { 3174 /* jmp */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    7598             :   { 3174 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7599             :   { 3174 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7600             :   { 3178 /* jmpl */, X86::JMP32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
    7601             :   { 3178 /* jmpl */, X86::JMP32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
    7602             :   { 3178 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7603             :   { 3183 /* jmpq */, X86::JMP64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
    7604             :   { 3183 /* jmpq */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
    7605             :   { 3188 /* jmpw */, X86::JMP16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
    7606             :   { 3188 /* jmpw */, X86::JMP16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
    7607             :   { 3188 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7608             :   { 3193 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7609             :   { 3197 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7610             :   { 3201 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7611             :   { 3205 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7612             :   { 3209 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7613             :   { 3212 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7614             :   { 3215 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
    7615             :   { 3221 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7616             :   { 3224 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7617             :   { 3230 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7618             :   { 3236 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7619             :   { 3242 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7620             :   { 3248 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7621             :   { 3254 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7622             :   { 3260 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7623             :   { 3267 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7624             :   { 3274 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7625             :   { 3281 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7626             :   { 3288 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7627             :   { 3294 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7628             :   { 3300 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
    7629             :   { 3300 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_GR32 }, },
    7630             :   { 3300 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_Mem8 }, },
    7631             :   { 3300 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_GR32, MCK_VK1 }, },
    7632             :   { 3300 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, Feature_HasDQI, { MCK_Mem8, MCK_VK1 }, },
    7633             :   { 3306 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7634             :   { 3306 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_GR32 }, },
    7635             :   { 3306 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_Mem32 }, },
    7636             :   { 3306 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR32, MCK_VK1 }, },
    7637             :   { 3306 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, Feature_HasBWI, { MCK_Mem32, MCK_VK1 }, },
    7638             :   { 3312 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7639             :   { 3312 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_GR64 }, },
    7640             :   { 3312 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_Mem64 }, },
    7641             :   { 3312 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_GR64, MCK_VK1 }, },
    7642             :   { 3312 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, Feature_HasBWI, { MCK_Mem64, MCK_VK1 }, },
    7643             :   { 3318 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
    7644             :   { 3318 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_GR32 }, },
    7645             :   { 3318 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_Mem16 }, },
    7646             :   { 3318 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_GR32, MCK_VK1 }, },
    7647             :   { 3318 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, Feature_HasAVX512, { MCK_Mem16, MCK_VK1 }, },
    7648             :   { 3324 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
    7649             :   { 3330 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7650             :   { 3336 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7651             :   { 3342 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
    7652             :   { 3348 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7653             :   { 3353 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7654             :   { 3358 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7655             :   { 3363 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
    7656             :   { 3372 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7657             :   { 3381 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7658             :   { 3390 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1 }, },
    7659             :   { 3399 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7660             :   { 3404 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7661             :   { 3413 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7662             :   { 3422 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7663             :   { 3431 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7664             :   { 3440 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasDQI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7665             :   { 3449 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7666             :   { 3458 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasBWI, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7667             :   { 3467 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, Feature_HasAVX512, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
    7668             :   { 3476 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
    7669             :   { 3483 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7670             :   { 3490 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1 }, },
    7671             :   { 3497 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1 }, },
    7672             :   { 3504 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7673             :   { 3513 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7674             :   { 3522 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7675             :   { 3531 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7676             :   { 3538 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7677             :   { 3545 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7678             :   { 3552 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7679             :   { 3559 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasDQI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7680             :   { 3565 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7681             :   { 3571 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasBWI, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7682             :   { 3577 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, Feature_HasAVX512, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
    7683             :   { 3583 /* lahf */, X86::LAHF, Convert_NoOperands, 0, {  }, },
    7684             :   { 3592 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7685             :   { 3592 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    7686             :   { 3597 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
    7687             :   { 3597 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    7688             :   { 3602 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7689             :   { 3602 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7690             :   { 3607 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
    7691             :   { 3607 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
    7692             :   { 3607 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7693             :   { 3607 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7694             :   { 3613 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7695             :   { 3613 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7696             :   { 3620 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7697             :   { 3627 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7698             :   { 3627 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7699             :   { 3634 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7700             :   { 3640 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    7701             :   { 3652 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
    7702             :   { 3657 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
    7703             :   { 3666 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
    7704             :   { 3666 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_GR32 }, },
    7705             :   { 3671 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7706             :   { 3676 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    7707             :   { 3676 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    7708             :   { 3682 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7709             :   { 3691 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
    7710             :   { 3696 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
    7711             :   { 3701 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, {  }, },
    7712             :   { 3712 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
    7713             :   { 3717 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7714             :   { 3722 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7715             :   { 3732 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7716             :   { 3738 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    7717             :   { 3744 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7718             :   { 3754 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
    7719             :   { 3759 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7720             :   { 3764 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7721             :   { 3774 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7722             :   { 3780 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    7723             :   { 3786 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    7724             :   { 3792 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
    7725             :   { 3792 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
    7726             :   { 3792 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
    7727             :   { 3792 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
    7728             :   { 3797 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7729             :   { 3797 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7730             :   { 3803 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7731             :   { 3809 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
    7732             :   { 3809 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
    7733             :   { 3820 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7734             :   { 3820 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7735             :   { 3826 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
    7736             :   { 3826 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
    7737             :   { 3838 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7738             :   { 3838 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7739             :   { 3844 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, {  }, },
    7740             :   { 3849 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
    7741             :   { 3849 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
    7742             :   { 3849 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
    7743             :   { 3849 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
    7744             :   { 3849 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
    7745             :   { 3849 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
    7746             :   { 3849 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
    7747             :   { 3849 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
    7748             :   { 3854 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
    7749             :   { 3854 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
    7750             :   { 3866 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
    7751             :   { 3866 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
    7752             :   { 3872 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
    7753             :   { 3872 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_RAX }, },
    7754             :   { 3878 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
    7755             :   { 3878 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
    7756             :   { 3884 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7757             :   { 3889 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7758             :   { 3895 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
    7759             :   { 3902 /* lretl */, X86::LRETL, Convert_NoOperands, 0, {  }, },
    7760             :   { 3902 /* lretl */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
    7761             :   { 3908 /* lretq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
    7762             :   { 3908 /* lretq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
    7763             :   { 3914 /* lretw */, X86::LRETW, Convert_NoOperands, 0, {  }, },
    7764             :   { 3914 /* lretw */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
    7765             :   { 3924 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7766             :   { 3924 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7767             :   { 3929 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7768             :   { 3929 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7769             :   { 3934 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7770             :   { 3934 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7771             :   { 3943 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
    7772             :   { 3948 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
    7773             :   { 3953 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
    7774             :   { 3962 /* ltrw */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    7775             :   { 3962 /* ltrw */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    7776             :   { 3967 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    7777             :   { 3967 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
    7778             :   { 3967 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    7779             :   { 3967 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
    7780             :   { 3974 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
    7781             :   { 3974 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
    7782             :   { 3974 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
    7783             :   { 3974 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
    7784             :   { 3987 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7785             :   { 3987 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7786             :   { 3994 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7787             :   { 3994 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7788             :   { 4001 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7789             :   { 4001 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7790             :   { 4008 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
    7791             :   { 4008 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
    7792             :   { 4019 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
    7793             :   { 4019 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
    7794             :   { 4028 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7795             :   { 4028 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7796             :   { 4034 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7797             :   { 4034 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7798             :   { 4040 /* maxsd */, X86::MAXSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7799             :   { 4040 /* maxsd */, X86::MAXSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7800             :   { 4046 /* maxss */, X86::MAXSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7801             :   { 4046 /* maxss */, X86::MAXSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7802             :   { 4052 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, {  }, },
    7803             :   { 4059 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7804             :   { 4059 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7805             :   { 4065 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7806             :   { 4065 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7807             :   { 4071 /* minsd */, X86::MINSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7808             :   { 4071 /* minsd */, X86::MINSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7809             :   { 4077 /* minss */, X86::MINSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7810             :   { 4077 /* minss */, X86::MINSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7811             :   { 4083 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, {  }, },
    7812             :   { 4083 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
    7813             :   { 4083 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
    7814             :   { 4091 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, {  }, },
    7815             :   { 4091 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
    7816             :   { 4091 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
    7817             :   { 4100 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, {  }, },
    7818             :   { 4108 /* mov */, X86::MOV32ms, Convert__Mem325_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem32 }, },
    7819             :   { 4108 /* mov */, X86::MOV32sm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_SEGMENT_REG }, },
    7820             :   { 4119 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
    7821             :   { 4119 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
    7822             :   { 4127 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
    7823             :   { 4127 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
    7824             :   { 4135 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
    7825             :   { 4135 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
    7826             :   { 4135 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
    7827             :   { 4143 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
    7828             :   { 4143 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
    7829             :   { 4151 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7830             :   { 4151 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7831             :   { 4151 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7832             :   { 4158 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7833             :   { 4158 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7834             :   { 4158 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7835             :   { 4165 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
    7836             :   { 4165 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
    7837             :   { 4165 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    7838             :   { 4165 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    7839             :   { 4165 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    7840             :   { 4165 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    7841             :   { 4165 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
    7842             :   { 4165 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
    7843             :   { 4165 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    7844             :   { 4176 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7845             :   { 4176 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7846             :   { 4183 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7847             :   { 4183 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7848             :   { 4190 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7849             :   { 4190 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7850             :   { 4197 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR32 }, },
    7851             :   { 4197 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
    7852             :   { 4197 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR64, MCK_Mem32 }, },
    7853             :   { 4197 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
    7854             :   { 4197 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7855             :   { 4197 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
    7856             :   { 4197 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR64 }, },
    7857             :   { 4197 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
    7858             :   { 4197 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
    7859             :   { 4197 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    7860             :   { 4197 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
    7861             :   { 4197 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7862             :   { 4202 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7863             :   { 4202 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7864             :   { 4210 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
    7865             :   { 4218 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7866             :   { 4218 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7867             :   { 4218 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7868             :   { 4225 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7869             :   { 4225 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7870             :   { 4225 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7871             :   { 4232 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7872             :   { 4240 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7873             :   { 4240 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7874             :   { 4247 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7875             :   { 4247 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7876             :   { 4254 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
    7877             :   { 4254 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
    7878             :   { 4254 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
    7879             :   { 4254 /* movl */, X86::MOV32ms, Convert__Mem325_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem32 }, },
    7880             :   { 4254 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
    7881             :   { 4254 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
    7882             :   { 4254 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
    7883             :   { 4254 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
    7884             :   { 4254 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
    7885             :   { 4254 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    7886             :   { 4254 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7887             :   { 4254 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    7888             :   { 4254 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    7889             :   { 4254 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
    7890             :   { 4254 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
    7891             :   { 4254 /* movl */, X86::MOV32sm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_SEGMENT_REG }, },
    7892             :   { 4254 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    7893             :   { 4259 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7894             :   { 4267 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7895             :   { 4267 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7896             :   { 4274 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7897             :   { 4274 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7898             :   { 4281 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
    7899             :   { 4290 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
    7900             :   { 4299 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7901             :   { 4307 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7902             :   { 4323 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    7903             :   { 4331 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7904             :   { 4339 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7905             :   { 4347 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7906             :   { 4355 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
    7907             :   { 4362 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7908             :   { 4370 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
    7909             :   { 4378 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
    7910             :   { 4378 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
    7911             :   { 4378 /* movq */, X86::MOV64ms, Convert__Mem645_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem64 }, },
    7912             :   { 4378 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
    7913             :   { 4378 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    7914             :   { 4378 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
    7915             :   { 4378 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
    7916             :   { 4378 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
    7917             :   { 4378 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7918             :   { 4378 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
    7919             :   { 4378 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7920             :   { 4378 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
    7921             :   { 4378 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
    7922             :   { 4378 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
    7923             :   { 4378 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
    7924             :   { 4378 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
    7925             :   { 4378 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    7926             :   { 4378 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    7927             :   { 4378 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    7928             :   { 4378 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    7929             :   { 4378 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
    7930             :   { 4378 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
    7931             :   { 4378 /* movq */, X86::MOV64sm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_SEGMENT_REG }, },
    7932             :   { 4378 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    7933             :   { 4378 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7934             :   { 4378 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    7935             :   { 4383 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
    7936             :   { 4391 /* movs */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
    7937             :   { 4391 /* movs */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
    7938             :   { 4391 /* movs */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
    7939             :   { 4391 /* movs */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
    7940             :   { 4396 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
    7941             :   { 4402 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    7942             :   { 4402 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
    7943             :   { 4409 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    7944             :   { 4409 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
    7945             :   { 4416 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    7946             :   { 4416 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    7947             :   { 4423 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7948             :   { 4423 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
    7949             :   { 4423 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    7950             :   { 4429 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7951             :   { 4429 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7952             :   { 4438 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
    7953             :   { 4444 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7954             :   { 4444 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7955             :   { 4453 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR32, MCK_GR64 }, },
    7956             :   { 4453 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, Feature_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
    7957             :   { 4460 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, 0, { MCK_SrcIdx64, MCK_DstIdx64 }, },
    7958             :   { 4466 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7959             :   { 4466 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
    7960             :   { 4466 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    7961             :   { 4472 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
    7962             :   { 4478 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    7963             :   { 4478 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    7964             :   { 4485 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    7965             :   { 4485 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    7966             :   { 4492 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    7967             :   { 4492 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    7968             :   { 4492 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
    7969             :   { 4492 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    7970             :   { 4492 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    7971             :   { 4492 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    7972             :   { 4492 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    7973             :   { 4505 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7974             :   { 4505 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7975             :   { 4505 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7976             :   { 4512 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    7977             :   { 4512 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
    7978             :   { 4512 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    7979             :   { 4519 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
    7980             :   { 4519 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
    7981             :   { 4519 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
    7982             :   { 4519 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
    7983             :   { 4519 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
    7984             :   { 4519 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    7985             :   { 4519 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    7986             :   { 4519 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    7987             :   { 4519 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    7988             :   { 4519 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
    7989             :   { 4519 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
    7990             :   { 4519 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
    7991             :   { 4519 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    7992             :   { 4524 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    7993             :   { 4524 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
    7994             :   { 4531 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    7995             :   { 4531 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
    7996             :   { 4538 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    7997             :   { 4538 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    7998             :   { 4545 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    7999             :   { 4545 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
    8000             :   { 4552 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    8001             :   { 4552 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
    8002             :   { 4559 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
    8003             :   { 4559 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
    8004             :   { 4559 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
    8005             :   { 4559 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
    8006             :   { 4559 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
    8007             :   { 4559 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
    8008             :   { 4565 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8009             :   { 4565 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8010             :   { 4577 /* mulb */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8011             :   { 4577 /* mulb */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8012             :   { 4582 /* mull */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8013             :   { 4582 /* mull */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8014             :   { 4587 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8015             :   { 4587 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8016             :   { 4593 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8017             :   { 4593 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8018             :   { 4599 /* mulq */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8019             :   { 4599 /* mulq */, X86::MUL64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8020             :   { 4604 /* mulsd */, X86::MULSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8021             :   { 4604 /* mulsd */, X86::MULSDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8022             :   { 4610 /* mulss */, X86::MULSSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8023             :   { 4610 /* mulss */, X86::MULSSrm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8024             :   { 4616 /* mulw */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8025             :   { 4616 /* mulw */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8026             :   { 4626 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8027             :   { 4626 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    8028             :   { 4632 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8029             :   { 4632 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    8030             :   { 4638 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, {  }, },
    8031             :   { 4638 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
    8032             :   { 4638 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX }, },
    8033             :   { 4644 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, {  }, },
    8034             :   { 4644 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
    8035             :   { 4644 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
    8036             :   { 4655 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8037             :   { 4655 /* negb */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8038             :   { 4660 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8039             :   { 4660 /* negl */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8040             :   { 4665 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8041             :   { 4665 /* negq */, X86::NEG64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8042             :   { 4670 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8043             :   { 4670 /* negw */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8044             :   { 4675 /* nop */, X86::NOOP, Convert_NoOperands, 0, {  }, },
    8045             :   { 4679 /* nopl */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8046             :   { 4679 /* nopl */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8047             :   { 4684 /* nopq */, X86::NOOPQr, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8048             :   { 4684 /* nopq */, X86::NOOPQ, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8049             :   { 4689 /* nopw */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8050             :   { 4689 /* nopw */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8051             :   { 4698 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8052             :   { 4698 /* notb */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8053             :   { 4703 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8054             :   { 4703 /* notl */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8055             :   { 4708 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8056             :   { 4708 /* notq */, X86::NOT64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8057             :   { 4713 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8058             :   { 4713 /* notw */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8059             :   { 4721 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    8060             :   { 4721 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    8061             :   { 4721 /* orb */, X86::OR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    8062             :   { 4721 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    8063             :   { 4721 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    8064             :   { 4721 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    8065             :   { 4725 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8066             :   { 4725 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8067             :   { 4725 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    8068             :   { 4725 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    8069             :   { 4725 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    8070             :   { 4725 /* orl */, X86::OR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    8071             :   { 4725 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    8072             :   { 4725 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    8073             :   { 4725 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8074             :   { 4729 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8075             :   { 4729 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8076             :   { 4734 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8077             :   { 4734 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8078             :   { 4739 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8079             :   { 4739 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8080             :   { 4739 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    8081             :   { 4739 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    8082             :   { 4739 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    8083             :   { 4739 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    8084             :   { 4739 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    8085             :   { 4739 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    8086             :   { 4739 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8087             :   { 4743 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8088             :   { 4743 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8089             :   { 4743 /* orw */, X86::OR16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    8090             :   { 4743 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    8091             :   { 4743 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    8092             :   { 4743 /* orw */, X86::OR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    8093             :   { 4743 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    8094             :   { 4743 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    8095             :   { 4743 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8096             :   { 4751 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
    8097             :   { 4751 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    8098             :   { 4751 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
    8099             :   { 4751 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
    8100             :   { 4756 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
    8101             :   { 4756 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    8102             :   { 4756 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
    8103             :   { 4756 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
    8104             :   { 4761 /* outs */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
    8105             :   { 4761 /* outs */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
    8106             :   { 4761 /* outs */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
    8107             :   { 4766 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
    8108             :   { 4778 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
    8109             :   { 4784 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
    8110             :   { 4790 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
    8111             :   { 4790 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
    8112             :   { 4790 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
    8113             :   { 4790 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
    8114             :   { 4795 /* pabsb */, X86::MMX_PABSBrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8115             :   { 4795 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8116             :   { 4795 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8117             :   { 4795 /* pabsb */, X86::MMX_PABSBrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8118             :   { 4801 /* pabsd */, X86::MMX_PABSDrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8119             :   { 4801 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8120             :   { 4801 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8121             :   { 4801 /* pabsd */, X86::MMX_PABSDrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8122             :   { 4807 /* pabsw */, X86::MMX_PABSWrr64, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8123             :   { 4807 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8124             :   { 4807 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8125             :   { 4807 /* pabsw */, X86::MMX_PABSWrm64, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8126             :   { 4813 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8127             :   { 4813 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8128             :   { 4813 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8129             :   { 4813 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8130             :   { 4822 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8131             :   { 4822 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8132             :   { 4822 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8133             :   { 4822 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8134             :   { 4831 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8135             :   { 4831 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8136             :   { 4840 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8137             :   { 4840 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8138             :   { 4840 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8139             :   { 4840 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8140             :   { 4849 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8141             :   { 4849 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8142             :   { 4849 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8143             :   { 4849 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8144             :   { 4855 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8145             :   { 4855 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8146             :   { 4855 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8147             :   { 4855 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8148             :   { 4861 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8149             :   { 4861 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8150             :   { 4861 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8151             :   { 4861 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8152             :   { 4867 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8153             :   { 4867 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8154             :   { 4867 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8155             :   { 4867 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8156             :   { 4874 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8157             :   { 4874 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8158             :   { 4874 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8159             :   { 4874 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8160             :   { 4881 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8161             :   { 4881 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8162             :   { 4881 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8163             :   { 4881 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8164             :   { 4889 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8165             :   { 4889 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8166             :   { 4889 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8167             :   { 4889 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8168             :   { 4897 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8169             :   { 4897 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8170             :   { 4897 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8171             :   { 4897 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8172             :   { 4903 /* palignr */, X86::MMX_PALIGNR64irr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
    8173             :   { 4903 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8174             :   { 4903 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8175             :   { 4903 /* palignr */, X86::MMX_PALIGNR64irm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
    8176             :   { 4911 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8177             :   { 4911 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8178             :   { 4911 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8179             :   { 4911 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8180             :   { 4916 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8181             :   { 4916 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8182             :   { 4916 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8183             :   { 4916 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8184             :   { 4922 /* pause */, X86::PAUSE, Convert_NoOperands, 0, {  }, },
    8185             :   { 4928 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8186             :   { 4928 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8187             :   { 4928 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8188             :   { 4928 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8189             :   { 4934 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8190             :   { 4934 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8191             :   { 4942 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8192             :   { 4942 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8193             :   { 4942 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8194             :   { 4942 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8195             :   { 4948 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8196             :   { 4948 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8197             :   { 4948 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    8198             :   { 4948 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    8199             :   { 4957 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8200             :   { 4957 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8201             :   { 4965 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
    8202             :   { 4965 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32 }, },
    8203             :   { 4978 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
    8204             :   { 4978 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32 }, },
    8205             :   { 4991 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
    8206             :   { 4991 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32 }, },
    8207             :   { 5004 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
    8208             :   { 5004 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8209             :   { 5017 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8210             :   { 5017 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8211             :   { 5027 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8212             :   { 5027 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8213             :   { 5027 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8214             :   { 5027 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8215             :   { 5035 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8216             :   { 5035 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8217             :   { 5035 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8218             :   { 5035 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8219             :   { 5043 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8220             :   { 5043 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8221             :   { 5051 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8222             :   { 5051 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8223             :   { 5051 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8224             :   { 5051 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8225             :   { 5059 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8226             :   { 5059 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8227             :   { 5069 /* pcmpestrm */, X86::PCMPESTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8228             :   { 5069 /* pcmpestrm */, X86::PCMPESTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8229             :   { 5079 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8230             :   { 5079 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8231             :   { 5079 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8232             :   { 5079 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8233             :   { 5087 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8234             :   { 5087 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8235             :   { 5087 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8236             :   { 5087 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8237             :   { 5095 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8238             :   { 5095 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8239             :   { 5103 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8240             :   { 5103 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8241             :   { 5103 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8242             :   { 5103 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8243             :   { 5111 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8244             :   { 5111 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8245             :   { 5121 /* pcmpistrm */, X86::PCMPISTRM128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8246             :   { 5121 /* pcmpistrm */, X86::PCMPISTRM128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8247             :   { 5136 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8248             :   { 5136 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    8249             :   { 5142 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8250             :   { 5142 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    8251             :   { 5153 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8252             :   { 5153 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
    8253             :   { 5159 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8254             :   { 5159 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
    8255             :   { 5165 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
    8256             :   { 5165 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
    8257             :   { 5172 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
    8258             :   { 5172 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
    8259             :   { 5179 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
    8260             :   { 5179 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
    8261             :   { 5186 /* pextrw */, X86::MMX_PEXTRWirri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
    8262             :   { 5186 /* pextrw */, X86::PEXTRWri, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
    8263             :   { 5186 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
    8264             :   { 5193 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8265             :   { 5193 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8266             :   { 5199 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8267             :   { 5199 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8268             :   { 5205 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8269             :   { 5205 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8270             :   { 5211 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8271             :   { 5211 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8272             :   { 5217 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8273             :   { 5217 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8274             :   { 5225 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8275             :   { 5225 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8276             :   { 5233 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8277             :   { 5233 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8278             :   { 5241 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8279             :   { 5241 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8280             :   { 5247 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8281             :   { 5247 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8282             :   { 5253 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8283             :   { 5253 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8284             :   { 5259 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8285             :   { 5259 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8286             :   { 5266 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8287             :   { 5266 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8288             :   { 5274 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8289             :   { 5274 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8290             :   { 5280 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8291             :   { 5280 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8292             :   { 5289 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8293             :   { 5289 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8294             :   { 5298 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8295             :   { 5298 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8296             :   { 5307 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8297             :   { 5307 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8298             :   { 5315 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8299             :   { 5315 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8300             :   { 5321 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8301             :   { 5321 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8302             :   { 5328 /* phaddd */, X86::MMX_PHADDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8303             :   { 5328 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8304             :   { 5328 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8305             :   { 5328 /* phaddd */, X86::MMX_PHADDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8306             :   { 5335 /* phaddsw */, X86::MMX_PHADDSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8307             :   { 5335 /* phaddsw */, X86::PHADDSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8308             :   { 5335 /* phaddsw */, X86::PHADDSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8309             :   { 5335 /* phaddsw */, X86::MMX_PHADDSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8310             :   { 5343 /* phaddw */, X86::MMX_PHADDWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8311             :   { 5343 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8312             :   { 5343 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8313             :   { 5343 /* phaddw */, X86::MMX_PHADDWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8314             :   { 5350 /* phminposuw */, X86::PHMINPOSUWrr128, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8315             :   { 5350 /* phminposuw */, X86::PHMINPOSUWrm128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8316             :   { 5361 /* phsubd */, X86::MMX_PHSUBDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8317             :   { 5361 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8318             :   { 5361 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8319             :   { 5361 /* phsubd */, X86::MMX_PHSUBDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8320             :   { 5368 /* phsubsw */, X86::MMX_PHSUBSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8321             :   { 5368 /* phsubsw */, X86::PHSUBSWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8322             :   { 5368 /* phsubsw */, X86::PHSUBSWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8323             :   { 5368 /* phsubsw */, X86::MMX_PHSUBSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8324             :   { 5376 /* phsubw */, X86::MMX_PHSUBWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8325             :   { 5376 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8326             :   { 5376 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8327             :   { 5376 /* phsubw */, X86::MMX_PHSUBWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8328             :   { 5383 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8329             :   { 5383 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8330             :   { 5389 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8331             :   { 5389 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8332             :   { 5395 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
    8333             :   { 5395 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
    8334             :   { 5402 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
    8335             :   { 5402 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    8336             :   { 5409 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
    8337             :   { 5409 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
    8338             :   { 5416 /* pinsrw */, X86::MMX_PINSRWirri, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
    8339             :   { 5416 /* pinsrw */, X86::PINSRWrri, Convert__Reg1_2__Tie0__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
    8340             :   { 5416 /* pinsrw */, X86::MMX_PINSRWirmi, Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
    8341             :   { 5416 /* pinsrw */, X86::PINSRWrmi, Convert__Reg1_2__Tie0__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
    8342             :   { 5423 /* pmaddubsw */, X86::MMX_PMADDUBSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8343             :   { 5423 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8344             :   { 5423 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8345             :   { 5423 /* pmaddubsw */, X86::MMX_PMADDUBSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8346             :   { 5433 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8347             :   { 5433 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8348             :   { 5433 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8349             :   { 5433 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8350             :   { 5441 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8351             :   { 5441 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8352             :   { 5448 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8353             :   { 5448 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8354             :   { 5455 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8355             :   { 5455 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8356             :   { 5455 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8357             :   { 5455 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8358             :   { 5462 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8359             :   { 5462 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8360             :   { 5462 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8361             :   { 5462 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8362             :   { 5469 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8363             :   { 5469 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8364             :   { 5476 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8365             :   { 5476 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8366             :   { 5483 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8367             :   { 5483 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8368             :   { 5490 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8369             :   { 5490 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8370             :   { 5497 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8371             :   { 5497 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8372             :   { 5497 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8373             :   { 5497 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8374             :   { 5504 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8375             :   { 5504 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8376             :   { 5504 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8377             :   { 5504 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8378             :   { 5511 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8379             :   { 5511 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8380             :   { 5518 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8381             :   { 5518 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8382             :   { 5525 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR64, MCK_GR32orGR64 }, },
    8383             :   { 5525 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
    8384             :   { 5534 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8385             :   { 5534 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8386             :   { 5543 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8387             :   { 5543 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
    8388             :   { 5552 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8389             :   { 5552 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8390             :   { 5561 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8391             :   { 5561 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8392             :   { 5570 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8393             :   { 5570 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8394             :   { 5579 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8395             :   { 5579 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8396             :   { 5588 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8397             :   { 5588 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8398             :   { 5597 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8399             :   { 5597 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
    8400             :   { 5606 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8401             :   { 5606 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8402             :   { 5615 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8403             :   { 5615 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8404             :   { 5624 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8405             :   { 5624 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    8406             :   { 5633 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8407             :   { 5633 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8408             :   { 5642 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8409             :   { 5642 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8410             :   { 5649 /* pmulhrsw */, X86::MMX_PMULHRSWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8411             :   { 5649 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8412             :   { 5649 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8413             :   { 5649 /* pmulhrsw */, X86::MMX_PMULHRSWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8414             :   { 5658 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8415             :   { 5658 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8416             :   { 5666 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8417             :   { 5666 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8418             :   { 5666 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8419             :   { 5666 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8420             :   { 5674 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8421             :   { 5674 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8422             :   { 5674 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8423             :   { 5674 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8424             :   { 5681 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8425             :   { 5681 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8426             :   { 5688 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8427             :   { 5688 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8428             :   { 5688 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8429             :   { 5688 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8430             :   { 5695 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8431             :   { 5695 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8432             :   { 5695 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8433             :   { 5695 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8434             :   { 5707 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8435             :   { 5713 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8436             :   { 5726 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8437             :   { 5726 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8438             :   { 5734 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8439             :   { 5734 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8440             :   { 5742 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8441             :   { 5742 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8442             :   { 5761 /* popfl */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8443             :   { 5767 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8444             :   { 5773 /* popfw */, X86::POPF16, Convert_NoOperands, 0, {  }, },
    8445             :   { 5779 /* popl */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8446             :   { 5779 /* popl */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8447             :   { 5779 /* popl */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
    8448             :   { 5779 /* popl */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
    8449             :   { 5779 /* popl */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8450             :   { 5779 /* popl */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8451             :   { 5779 /* popl */, X86::POP32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8452             :   { 5779 /* popl */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
    8453             :   { 5784 /* popq */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
    8454             :   { 5784 /* popq */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
    8455             :   { 5784 /* popq */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8456             :   { 5784 /* popq */, X86::POP64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8457             :   { 5784 /* popq */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8458             :   { 5789 /* popw */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8459             :   { 5789 /* popw */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8460             :   { 5789 /* popw */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
    8461             :   { 5789 /* popw */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
    8462             :   { 5789 /* popw */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8463             :   { 5789 /* popw */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8464             :   { 5789 /* popw */, X86::POP16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8465             :   { 5789 /* popw */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8466             :   { 5794 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8467             :   { 5794 /* por */, X86::PORrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8468             :   { 5794 /* por */, X86::PORrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8469             :   { 5794 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8470             :   { 5798 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8471             :   { 5807 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8472             :   { 5819 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8473             :   { 5830 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8474             :   { 5841 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8475             :   { 5852 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8476             :   { 5862 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8477             :   { 5862 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8478             :   { 5862 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8479             :   { 5862 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8480             :   { 5869 /* pshufb */, X86::MMX_PSHUFBrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8481             :   { 5869 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8482             :   { 5869 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8483             :   { 5869 /* pshufb */, X86::MMX_PSHUFBrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8484             :   { 5876 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8485             :   { 5876 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8486             :   { 5883 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8487             :   { 5883 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8488             :   { 5891 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8489             :   { 5891 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8490             :   { 5899 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
    8491             :   { 5899 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
    8492             :   { 5906 /* psignb */, X86::MMX_PSIGNBrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8493             :   { 5906 /* psignb */, X86::PSIGNBrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8494             :   { 5906 /* psignb */, X86::PSIGNBrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8495             :   { 5906 /* psignb */, X86::MMX_PSIGNBrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8496             :   { 5913 /* psignd */, X86::MMX_PSIGNDrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8497             :   { 5913 /* psignd */, X86::PSIGNDrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8498             :   { 5913 /* psignd */, X86::PSIGNDrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8499             :   { 5913 /* psignd */, X86::MMX_PSIGNDrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8500             :   { 5920 /* psignw */, X86::MMX_PSIGNWrr64, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8501             :   { 5920 /* psignw */, X86::PSIGNWrr128, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8502             :   { 5920 /* psignw */, X86::PSIGNWrm128, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8503             :   { 5920 /* psignw */, X86::MMX_PSIGNWrm64, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8504             :   { 5927 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8505             :   { 5927 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8506             :   { 5927 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8507             :   { 5927 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8508             :   { 5927 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8509             :   { 5927 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8510             :   { 5933 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8511             :   { 5940 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8512             :   { 5940 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8513             :   { 5940 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8514             :   { 5940 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8515             :   { 5940 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8516             :   { 5940 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8517             :   { 5946 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8518             :   { 5946 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8519             :   { 5946 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8520             :   { 5946 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8521             :   { 5946 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8522             :   { 5946 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8523             :   { 5952 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8524             :   { 5952 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8525             :   { 5952 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8526             :   { 5952 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8527             :   { 5952 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8528             :   { 5952 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8529             :   { 5958 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8530             :   { 5958 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8531             :   { 5958 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8532             :   { 5958 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8533             :   { 5958 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8534             :   { 5958 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8535             :   { 5964 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8536             :   { 5964 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8537             :   { 5964 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8538             :   { 5964 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8539             :   { 5964 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8540             :   { 5964 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8541             :   { 5970 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8542             :   { 5977 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8543             :   { 5977 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8544             :   { 5977 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8545             :   { 5977 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8546             :   { 5977 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8547             :   { 5977 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8548             :   { 5983 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8549             :   { 5983 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8550             :   { 5983 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
    8551             :   { 5983 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
    8552             :   { 5983 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8553             :   { 5983 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8554             :   { 5989 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8555             :   { 5989 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8556             :   { 5989 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8557             :   { 5989 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8558             :   { 5995 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8559             :   { 5995 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8560             :   { 5995 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8561             :   { 5995 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8562             :   { 6001 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8563             :   { 6001 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8564             :   { 6001 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8565             :   { 6001 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8566             :   { 6007 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8567             :   { 6007 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8568             :   { 6007 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8569             :   { 6007 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8570             :   { 6014 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8571             :   { 6014 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8572             :   { 6014 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8573             :   { 6014 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8574             :   { 6021 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8575             :   { 6021 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8576             :   { 6021 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8577             :   { 6021 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8578             :   { 6029 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8579             :   { 6029 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8580             :   { 6029 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8581             :   { 6029 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8582             :   { 6037 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8583             :   { 6037 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8584             :   { 6037 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8585             :   { 6037 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8586             :   { 6043 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8587             :   { 6043 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8588             :   { 6050 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8589             :   { 6050 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8590             :   { 6056 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8591             :   { 6056 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8592             :   { 6056 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8593             :   { 6056 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8594             :   { 6066 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8595             :   { 6066 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8596             :   { 6066 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8597             :   { 6066 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8598             :   { 6076 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8599             :   { 6076 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8600             :   { 6087 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8601             :   { 6087 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8602             :   { 6087 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8603             :   { 6087 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8604             :   { 6097 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8605             :   { 6097 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8606             :   { 6097 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8607             :   { 6097 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8608             :   { 6107 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8609             :   { 6107 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8610             :   { 6107 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8611             :   { 6107 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8612             :   { 6117 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8613             :   { 6117 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8614             :   { 6128 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8615             :   { 6128 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8616             :   { 6128 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8617             :   { 6128 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8618             :   { 6143 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8619             :   { 6150 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8620             :   { 6170 /* pushfl */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8621             :   { 6177 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8622             :   { 6184 /* pushfw */, X86::PUSHF16, Convert_NoOperands, 0, {  }, },
    8623             :   { 6191 /* pushl */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
    8624             :   { 6191 /* pushl */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8625             :   { 6191 /* pushl */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8626             :   { 6191 /* pushl */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
    8627             :   { 6191 /* pushl */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
    8628             :   { 6191 /* pushl */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8629             :   { 6191 /* pushl */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8630             :   { 6191 /* pushl */, X86::PUSH32rmr, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
    8631             :   { 6191 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
    8632             :   { 6191 /* pushl */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    8633             :   { 6191 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
    8634             :   { 6197 /* pushq */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
    8635             :   { 6197 /* pushq */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
    8636             :   { 6197 /* pushq */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8637             :   { 6197 /* pushq */, X86::PUSH64rmr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8638             :   { 6197 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
    8639             :   { 6197 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
    8640             :   { 6197 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
    8641             :   { 6203 /* pushw */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
    8642             :   { 6203 /* pushw */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
    8643             :   { 6203 /* pushw */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
    8644             :   { 6203 /* pushw */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
    8645             :   { 6203 /* pushw */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
    8646             :   { 6203 /* pushw */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
    8647             :   { 6203 /* pushw */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8648             :   { 6203 /* pushw */, X86::PUSH16rmr, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8649             :   { 6203 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
    8650             :   { 6203 /* pushw */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
    8651             :   { 6203 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8652             :   { 6209 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
    8653             :   { 6209 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8654             :   { 6209 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8655             :   { 6209 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
    8656             :   { 6218 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8657             :   { 6218 /* rclb */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8658             :   { 6218 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8659             :   { 6218 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8660             :   { 6218 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8661             :   { 6218 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8662             :   { 6223 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8663             :   { 6223 /* rcll */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8664             :   { 6223 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    8665             :   { 6223 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8666             :   { 6223 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8667             :   { 6223 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8668             :   { 6228 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8669             :   { 6228 /* rclq */, X86::RCL64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8670             :   { 6228 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    8671             :   { 6228 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    8672             :   { 6228 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8673             :   { 6228 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8674             :   { 6233 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8675             :   { 6233 /* rclw */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8676             :   { 6233 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    8677             :   { 6233 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8678             :   { 6233 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8679             :   { 6233 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8680             :   { 6238 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8681             :   { 6238 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8682             :   { 6244 /* rcpss */, X86::RCPSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8683             :   { 6244 /* rcpss */, X86::RCPSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8684             :   { 6254 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8685             :   { 6254 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8686             :   { 6254 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8687             :   { 6254 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8688             :   { 6254 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8689             :   { 6254 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8690             :   { 6259 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8691             :   { 6259 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8692             :   { 6259 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    8693             :   { 6259 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8694             :   { 6259 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8695             :   { 6259 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8696             :   { 6264 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8697             :   { 6264 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8698             :   { 6264 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    8699             :   { 6264 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    8700             :   { 6264 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8701             :   { 6264 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8702             :   { 6269 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8703             :   { 6269 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8704             :   { 6269 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    8705             :   { 6269 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8706             :   { 6269 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8707             :   { 6269 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8708             :   { 6283 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
    8709             :   { 6293 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8710             :   { 6312 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
    8711             :   { 6322 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
    8712             :   { 6332 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, {  }, },
    8713             :   { 6338 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, {  }, },
    8714             :   { 6345 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, {  }, },
    8715             :   { 6358 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8716             :   { 6366 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8717             :   { 6374 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8718             :   { 6389 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    8719             :   { 6397 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    8720             :   { 6405 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    8721             :   { 6413 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, {  }, },
    8722             :   { 6419 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, {  }, },
    8723             :   { 6426 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, {  }, },
    8724             :   { 6430 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, {  }, },
    8725             :   { 6451 /* retl */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8726             :   { 6451 /* retl */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
    8727             :   { 6456 /* retq */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8728             :   { 6456 /* retq */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
    8729             :   { 6461 /* retw */, X86::RETW, Convert_NoOperands, 0, {  }, },
    8730             :   { 6461 /* retw */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
    8731             :   { 6466 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, {  }, },
    8732             :   { 6476 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8733             :   { 6476 /* rolb */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8734             :   { 6476 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8735             :   { 6476 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8736             :   { 6476 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8737             :   { 6476 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8738             :   { 6481 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8739             :   { 6481 /* roll */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8740             :   { 6481 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    8741             :   { 6481 /* roll */, X86::ROL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8742             :   { 6481 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8743             :   { 6481 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8744             :   { 6486 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8745             :   { 6486 /* rolq */, X86::ROL64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8746             :   { 6486 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    8747             :   { 6486 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    8748             :   { 6486 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8749             :   { 6486 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8750             :   { 6491 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8751             :   { 6491 /* rolw */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8752             :   { 6491 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    8753             :   { 6491 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8754             :   { 6491 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8755             :   { 6491 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8756             :   { 6500 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8757             :   { 6500 /* rorb */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8758             :   { 6500 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8759             :   { 6500 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8760             :   { 6500 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8761             :   { 6500 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8762             :   { 6505 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8763             :   { 6505 /* rorl */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8764             :   { 6505 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    8765             :   { 6505 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8766             :   { 6505 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8767             :   { 6505 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8768             :   { 6510 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8769             :   { 6510 /* rorq */, X86::ROR64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8770             :   { 6510 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    8771             :   { 6510 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    8772             :   { 6510 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8773             :   { 6510 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8774             :   { 6515 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8775             :   { 6515 /* rorw */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8776             :   { 6515 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    8777             :   { 6515 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8778             :   { 6515 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8779             :   { 6515 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8780             :   { 6525 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
    8781             :   { 6525 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
    8782             :   { 6531 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
    8783             :   { 6531 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
    8784             :   { 6537 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8785             :   { 6537 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8786             :   { 6545 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8787             :   { 6545 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8788             :   { 6553 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8789             :   { 6553 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
    8790             :   { 6561 /* roundss */, X86::ROUNDSSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8791             :   { 6561 /* roundss */, X86::ROUNDSSm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
    8792             :   { 6569 /* rsm */, X86::RSM, Convert_NoOperands, 0, {  }, },
    8793             :   { 6573 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8794             :   { 6573 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8795             :   { 6581 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8796             :   { 6581 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    8797             :   { 6589 /* sahf */, X86::SAHF, Convert_NoOperands, 0, {  }, },
    8798             :   { 6594 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, {  }, },
    8799             :   { 6603 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8800             :   { 6603 /* sarb */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8801             :   { 6603 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8802             :   { 6603 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8803             :   { 6603 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8804             :   { 6603 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8805             :   { 6608 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8806             :   { 6608 /* sarl */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8807             :   { 6608 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    8808             :   { 6608 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8809             :   { 6608 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8810             :   { 6608 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8811             :   { 6613 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8812             :   { 6613 /* sarq */, X86::SAR64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8813             :   { 6613 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    8814             :   { 6613 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    8815             :   { 6613 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8816             :   { 6613 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8817             :   { 6618 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8818             :   { 6618 /* sarw */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8819             :   { 6618 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    8820             :   { 6618 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8821             :   { 6618 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8822             :   { 6618 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8823             :   { 6628 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8824             :   { 6628 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    8825             :   { 6634 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8826             :   { 6634 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    8827             :   { 6644 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
    8828             :   { 6644 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
    8829             :   { 6644 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
    8830             :   { 6644 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
    8831             :   { 6644 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
    8832             :   { 6644 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
    8833             :   { 6649 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8834             :   { 6649 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8835             :   { 6649 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
    8836             :   { 6649 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
    8837             :   { 6649 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
    8838             :   { 6649 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
    8839             :   { 6649 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
    8840             :   { 6649 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
    8841             :   { 6649 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
    8842             :   { 6654 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8843             :   { 6654 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8844             :   { 6654 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
    8845             :   { 6654 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
    8846             :   { 6654 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64 }, },
    8847             :   { 6654 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
    8848             :   { 6654 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
    8849             :   { 6654 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64 }, },
    8850             :   { 6654 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
    8851             :   { 6659 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8852             :   { 6659 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8853             :   { 6659 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
    8854             :   { 6659 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
    8855             :   { 6659 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
    8856             :   { 6659 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
    8857             :   { 6659 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
    8858             :   { 6659 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
    8859             :   { 6659 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
    8860             :   { 6664 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
    8861             :   { 6664 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
    8862             :   { 6664 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
    8863             :   { 6664 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
    8864             :   { 6664 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
    8865             :   { 6664 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
    8866             :   { 6664 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
    8867             :   { 6664 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
    8868             :   { 6669 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
    8869             :   { 6669 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
    8870             :   { 6681 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
    8871             :   { 6681 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
    8872             :   { 6687 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
    8873             :   { 6687 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, 0, { MCK_DstIdx64, MCK_RAX }, },
    8874             :   { 6693 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
    8875             :   { 6693 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
    8876             :   { 6699 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8877             :   { 6699 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8878             :   { 6704 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8879             :   { 6704 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8880             :   { 6710 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8881             :   { 6710 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8882             :   { 6715 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8883             :   { 6715 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8884             :   { 6721 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8885             :   { 6721 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8886             :   { 6726 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8887             :   { 6726 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8888             :   { 6731 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8889             :   { 6731 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8890             :   { 6737 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8891             :   { 6737 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8892             :   { 6742 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8893             :   { 6742 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8894             :   { 6748 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8895             :   { 6748 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8896             :   { 6754 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8897             :   { 6754 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8898             :   { 6760 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8899             :   { 6760 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8900             :   { 6766 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8901             :   { 6766 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8902             :   { 6772 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8903             :   { 6772 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8904             :   { 6777 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8905             :   { 6777 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8906             :   { 6782 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
    8907             :   { 6782 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8908             :   { 6787 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, {  }, },
    8909             :   { 6799 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    8910             :   { 6805 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    8911             :   { 6811 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    8912             :   { 6817 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8913             :   { 6817 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8914             :   { 6826 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8915             :   { 6826 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8916             :   { 6835 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8917             :   { 6835 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8918             :   { 6845 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    8919             :   { 6845 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    8920             :   { 6855 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8921             :   { 6855 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8922             :   { 6866 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8923             :   { 6866 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8924             :   { 6877 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    8925             :   { 6877 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    8926             :   { 6877 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
    8927             :   { 6877 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
    8928             :   { 6893 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8929             :   { 6893 /* shlb */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8930             :   { 6893 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8931             :   { 6893 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8932             :   { 6893 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8933             :   { 6893 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8934             :   { 6903 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8935             :   { 6903 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8936             :   { 6903 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
    8937             :   { 6903 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
    8938             :   { 6903 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
    8939             :   { 6903 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
    8940             :   { 6909 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8941             :   { 6909 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8942             :   { 6909 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
    8943             :   { 6909 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
    8944             :   { 6909 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
    8945             :   { 6909 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
    8946             :   { 6915 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8947             :   { 6915 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8948             :   { 6915 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
    8949             :   { 6915 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
    8950             :   { 6915 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
    8951             :   { 6915 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
    8952             :   { 6921 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8953             :   { 6921 /* shll */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    8954             :   { 6921 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    8955             :   { 6921 /* shll */, X86::SHL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    8956             :   { 6921 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    8957             :   { 6921 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    8958             :   { 6926 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    8959             :   { 6926 /* shlq */, X86::SHL64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    8960             :   { 6926 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    8961             :   { 6926 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    8962             :   { 6926 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    8963             :   { 6926 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    8964             :   { 6931 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    8965             :   { 6931 /* shlw */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    8966             :   { 6931 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    8967             :   { 6931 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    8968             :   { 6931 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    8969             :   { 6931 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    8970             :   { 6941 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    8971             :   { 6941 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    8972             :   { 6947 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    8973             :   { 6947 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    8974             :   { 6957 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0, 0, { MCK_GR8 }, },
    8975             :   { 6957 /* shrb */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
    8976             :   { 6957 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR8 }, },
    8977             :   { 6957 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
    8978             :   { 6957 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
    8979             :   { 6957 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
    8980             :   { 6967 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
    8981             :   { 6967 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
    8982             :   { 6967 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
    8983             :   { 6967 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
    8984             :   { 6967 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
    8985             :   { 6967 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
    8986             :   { 6973 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
    8987             :   { 6973 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
    8988             :   { 6973 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
    8989             :   { 6973 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
    8990             :   { 6973 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
    8991             :   { 6973 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
    8992             :   { 6979 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
    8993             :   { 6979 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
    8994             :   { 6979 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
    8995             :   { 6979 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
    8996             :   { 6979 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
    8997             :   { 6979 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
    8998             :   { 6985 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0, 0, { MCK_GR32 }, },
    8999             :   { 6985 /* shrl */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    9000             :   { 6985 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR32 }, },
    9001             :   { 6985 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
    9002             :   { 6985 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
    9003             :   { 6985 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
    9004             :   { 6990 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0, 0, { MCK_GR64 }, },
    9005             :   { 6990 /* shrq */, X86::SHR64m1, Convert__Mem645_0, 0, { MCK_Mem64 }, },
    9006             :   { 6990 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR64 }, },
    9007             :   { 6990 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, 0, { MCK_CL, MCK_Mem64 }, },
    9008             :   { 6990 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
    9009             :   { 6990 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
    9010             :   { 6995 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0, 0, { MCK_GR16 }, },
    9011             :   { 6995 /* shrw */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9012             :   { 6995 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0, 0, { MCK_CL, MCK_GR16 }, },
    9013             :   { 6995 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
    9014             :   { 6995 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
    9015             :   { 6995 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
    9016             :   { 7005 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
    9017             :   { 7005 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
    9018             :   { 7011 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
    9019             :   { 7011 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
    9020             :   { 7017 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    9021             :   { 7017 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    9022             :   { 7024 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
    9023             :   { 7024 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
    9024             :   { 7036 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    9025             :   { 7042 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
    9026             :   { 7048 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
    9027             :   { 7054 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
    9028             :   { 7061 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9029             :   { 7066 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    9030             :   { 7072 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    9031             :   { 7072 /* sldtq */, X86::SLDT64m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9032             :   { 7078 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    9033             :   { 7078 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9034             :   { 7084 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
    9035             :   { 7084 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
    9036             :   { 7096 /* smswl */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
    9037             :   { 7102 /* smswq */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
    9038             :   { 7108 /* smsww */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
    9039             :   { 7108 /* smsww */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
    9040             :   { 7114 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    9041             :   { 7114 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    9042             :   { 7121 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    9043             :   { 7121 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
    9044             :   { 7128 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    9045             :   { 7128 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
    9046             :   { 7135 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
    9047             :   { 7135 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
    9048             :   { 7142 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, {  }, },
    9049             :   { 7145 /* stac */, X86::STAC, Convert_NoOperands, 0, {  }, },
    9050             :   { 7150 /* stc */, X86::STC, Convert_NoOperands, 0, {  }, },
    9051             :   { 7154 /* std */, X86::STD, Convert_NoOperands, 0, {  }, },
    9052             :   { 7158 /* stgi */, X86::STGI, Convert_NoOperands, 0, {  }, },
    9053             :   { 7163 /* sti */, X86::STI, Convert_NoOperands, 0, {  }, },
    9054             :   { 7167 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
    9055             :   { 7175 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
    9056             :   { 7175 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
    9057             :   { 7175 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
    9058             :   { 7175 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
    9059             :   { 7175 /* stos */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
    9060             :   { 7175 /* stos */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
    9061             :   { 7175 /* stos */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
    9062             :   { 7175 /* stos */, X86::STOSQ, Conve