Line data Source code
1 : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2 : |* *|
3 : |* Assembly Matcher Source Fragment *|
4 : |* *|
5 : |* Automatically generated file, do not edit! *|
6 : |* *|
7 : \*===----------------------------------------------------------------------===*/
8 :
9 :
10 : #ifdef GET_ASSEMBLER_HEADER
11 : #undef GET_ASSEMBLER_HEADER
12 : // This should be included into the middle of the declaration of
13 : // your subclasses implementation of MCTargetAsmParser.
14 : uint64_t ComputeAvailableFeatures(const FeatureBitset& FB) const;
15 : void convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
16 : const OperandVector &Operands);
17 : void convertToMapAndConstraints(unsigned Kind,
18 : const OperandVector &Operands) override;
19 : unsigned MatchInstructionImpl(const OperandVector &Operands,
20 : MCInst &Inst,
21 : uint64_t &ErrorInfo,
22 : bool matchingInlineAsm,
23 : unsigned VariantID = 0);
24 : #endif // GET_ASSEMBLER_HEADER_INFO
25 :
26 :
27 : #ifdef GET_OPERAND_DIAGNOSTIC_TYPES
28 : #undef GET_OPERAND_DIAGNOSTIC_TYPES
29 :
30 : #endif // GET_OPERAND_DIAGNOSTIC_TYPES
31 :
32 :
33 : #ifdef GET_REGISTER_MATCHER
34 : #undef GET_REGISTER_MATCHER
35 :
36 : // Flags for subtarget features that participate in instruction matching.
37 : enum SubtargetFeatureFlag : uint8_t {
38 : Feature_Not64BitMode = (1ULL << 4),
39 : Feature_In64BitMode = (1ULL << 2),
40 : Feature_In16BitMode = (1ULL << 0),
41 : Feature_Not16BitMode = (1ULL << 3),
42 : Feature_In32BitMode = (1ULL << 1),
43 : Feature_None = 0
44 : };
45 :
46 314605 : static unsigned MatchRegisterName(StringRef Name) {
47 314605 : switch (Name.size()) {
48 : default: break;
49 35648 : case 2: // 33 strings to match.
50 : switch (Name[0]) {
51 : default: break;
52 1343 : case 'a': // 3 strings to match.
53 : switch (Name[1]) {
54 : default: break;
55 : case 'h': // 1 string to match.
56 : return 1; // "ah"
57 : case 'l': // 1 string to match.
58 : return 2; // "al"
59 : case 'x': // 1 string to match.
60 : return 3; // "ax"
61 : }
62 : break;
63 322 : case 'b': // 4 strings to match.
64 : switch (Name[1]) {
65 : default: break;
66 : case 'h': // 1 string to match.
67 : return 4; // "bh"
68 : case 'l': // 1 string to match.
69 : return 5; // "bl"
70 : case 'p': // 1 string to match.
71 : return 6; // "bp"
72 : case 'x': // 1 string to match.
73 : return 9; // "bx"
74 : }
75 : break;
76 2320 : case 'c': // 4 strings to match.
77 : switch (Name[1]) {
78 : default: break;
79 : case 'h': // 1 string to match.
80 : return 10; // "ch"
81 : case 'l': // 1 string to match.
82 : return 11; // "cl"
83 : case 's': // 1 string to match.
84 : return 12; // "cs"
85 : case 'x': // 1 string to match.
86 : return 13; // "cx"
87 : }
88 : break;
89 3536 : case 'd': // 5 strings to match.
90 : switch (Name[1]) {
91 : default: break;
92 : case 'h': // 1 string to match.
93 : return 15; // "dh"
94 : case 'i': // 1 string to match.
95 : return 16; // "di"
96 : case 'l': // 1 string to match.
97 : return 19; // "dl"
98 : case 's': // 1 string to match.
99 : return 20; // "ds"
100 : case 'x': // 1 string to match.
101 : return 21; // "dx"
102 : }
103 : break;
104 360 : case 'e': // 1 string to match.
105 360 : if (Name[1] != 's')
106 : break;
107 : return 31; // "es"
108 101 : case 'f': // 1 string to match.
109 101 : if (Name[1] != 's')
110 : break;
111 : return 35; // "fs"
112 180 : case 'g': // 1 string to match.
113 180 : if (Name[1] != 's')
114 : break;
115 : return 36; // "gs"
116 0 : case 'i': // 1 string to match.
117 0 : if (Name[1] != 'p')
118 : break;
119 : return 46; // "ip"
120 20771 : case 'k': // 8 strings to match.
121 : switch (Name[1]) {
122 : default: break;
123 : case '0': // 1 string to match.
124 : return 109; // "k0"
125 : case '1': // 1 string to match.
126 : return 110; // "k1"
127 : case '2': // 1 string to match.
128 : return 111; // "k2"
129 : case '3': // 1 string to match.
130 : return 112; // "k3"
131 : case '4': // 1 string to match.
132 : return 113; // "k4"
133 : case '5': // 1 string to match.
134 : return 114; // "k5"
135 : case '6': // 1 string to match.
136 : return 115; // "k6"
137 : case '7': // 1 string to match.
138 : return 116; // "k7"
139 : }
140 : break;
141 610 : case 'r': // 2 strings to match.
142 : switch (Name[1]) {
143 : default: break;
144 : case '8': // 1 string to match.
145 : return 125; // "r8"
146 256 : case '9': // 1 string to match.
147 256 : return 126; // "r9"
148 : }
149 : break;
150 4820 : case 's': // 3 strings to match.
151 : switch (Name[1]) {
152 : default: break;
153 : case 'i': // 1 string to match.
154 : return 57; // "si"
155 : case 'p': // 1 string to match.
156 : return 60; // "sp"
157 : case 's': // 1 string to match.
158 : return 63; // "ss"
159 : }
160 : break;
161 : }
162 : break;
163 122592 : case 3: // 73 strings to match.
164 : switch (Name[0]) {
165 : default: break;
166 : case 'b': // 1 string to match.
167 6 : if (memcmp(Name.data()+1, "pl", 2) != 0)
168 : break;
169 : return 8; // "bpl"
170 21 : case 'c': // 10 strings to match.
171 21 : if (Name[1] != 'r')
172 : break;
173 : switch (Name[2]) {
174 : default: break;
175 : case '0': // 1 string to match.
176 : return 69; // "cr0"
177 : case '1': // 1 string to match.
178 : return 70; // "cr1"
179 : case '2': // 1 string to match.
180 : return 71; // "cr2"
181 : case '3': // 1 string to match.
182 : return 72; // "cr3"
183 : case '4': // 1 string to match.
184 : return 73; // "cr4"
185 : case '5': // 1 string to match.
186 : return 74; // "cr5"
187 : case '6': // 1 string to match.
188 : return 75; // "cr6"
189 : case '7': // 1 string to match.
190 : return 76; // "cr7"
191 : case '8': // 1 string to match.
192 : return 77; // "cr8"
193 : case '9': // 1 string to match.
194 : return 78; // "cr9"
195 : }
196 : break;
197 1549 : case 'd': // 11 strings to match.
198 : switch (Name[1]) {
199 : default: break;
200 1520 : case 'i': // 1 string to match.
201 1520 : if (Name[2] != 'l')
202 : break;
203 : return 18; // "dil"
204 27 : case 'r': // 10 strings to match.
205 : switch (Name[2]) {
206 : default: break;
207 : case '0': // 1 string to match.
208 : return 85; // "dr0"
209 : case '1': // 1 string to match.
210 : return 86; // "dr1"
211 : case '2': // 1 string to match.
212 : return 87; // "dr2"
213 : case '3': // 1 string to match.
214 : return 88; // "dr3"
215 : case '4': // 1 string to match.
216 : return 89; // "dr4"
217 : case '5': // 1 string to match.
218 : return 90; // "dr5"
219 : case '6': // 1 string to match.
220 : return 91; // "dr6"
221 : case '7': // 1 string to match.
222 : return 92; // "dr7"
223 : case '8': // 1 string to match.
224 : return 93; // "dr8"
225 : case '9': // 1 string to match.
226 : return 94; // "dr9"
227 : }
228 : break;
229 : }
230 : break;
231 38146 : case 'e': // 10 strings to match.
232 : switch (Name[1]) {
233 : default: break;
234 15785 : case 'a': // 1 string to match.
235 15785 : if (Name[2] != 'x')
236 : break;
237 : return 22; // "eax"
238 2545 : case 'b': // 2 strings to match.
239 : switch (Name[2]) {
240 : default: break;
241 : case 'p': // 1 string to match.
242 : return 23; // "ebp"
243 2184 : case 'x': // 1 string to match.
244 2184 : return 24; // "ebx"
245 : }
246 : break;
247 3258 : case 'c': // 1 string to match.
248 3258 : if (Name[2] != 'x')
249 : break;
250 : return 25; // "ecx"
251 14891 : case 'd': // 2 strings to match.
252 : switch (Name[2]) {
253 : default: break;
254 : case 'i': // 1 string to match.
255 : return 26; // "edi"
256 11573 : case 'x': // 1 string to match.
257 11573 : return 27; // "edx"
258 : }
259 : break;
260 26 : case 'i': // 2 strings to match.
261 : switch (Name[2]) {
262 : default: break;
263 : case 'p': // 1 string to match.
264 : return 29; // "eip"
265 13 : case 'z': // 1 string to match.
266 13 : return 30; // "eiz"
267 : }
268 : break;
269 1641 : case 's': // 2 strings to match.
270 : switch (Name[2]) {
271 : default: break;
272 : case 'i': // 1 string to match.
273 : return 32; // "esi"
274 197 : case 'p': // 1 string to match.
275 197 : return 33; // "esp"
276 : }
277 : break;
278 : }
279 : break;
280 27 : case 'f': // 8 strings to match.
281 27 : if (Name[1] != 'p')
282 : break;
283 : switch (Name[2]) {
284 : default: break;
285 : case '0': // 1 string to match.
286 : return 101; // "fp0"
287 : case '1': // 1 string to match.
288 : return 102; // "fp1"
289 : case '2': // 1 string to match.
290 : return 103; // "fp2"
291 : case '3': // 1 string to match.
292 : return 104; // "fp3"
293 : case '4': // 1 string to match.
294 : return 105; // "fp4"
295 : case '5': // 1 string to match.
296 : return 106; // "fp5"
297 : case '6': // 1 string to match.
298 : return 107; // "fp6"
299 : case '7': // 1 string to match.
300 : return 108; // "fp7"
301 : }
302 : break;
303 4906 : case 'm': // 8 strings to match.
304 4906 : if (Name[1] != 'm')
305 : break;
306 : switch (Name[2]) {
307 : default: break;
308 : case '0': // 1 string to match.
309 : return 117; // "mm0"
310 : case '1': // 1 string to match.
311 : return 118; // "mm1"
312 : case '2': // 1 string to match.
313 : return 119; // "mm2"
314 : case '3': // 1 string to match.
315 : return 120; // "mm3"
316 : case '4': // 1 string to match.
317 : return 121; // "mm4"
318 : case '5': // 1 string to match.
319 : return 122; // "mm5"
320 : case '6': // 1 string to match.
321 : return 123; // "mm6"
322 : case '7': // 1 string to match.
323 : return 124; // "mm7"
324 : }
325 : break;
326 77117 : case 'r': // 22 strings to match.
327 : switch (Name[1]) {
328 : default: break;
329 3886 : case '1': // 6 strings to match.
330 : switch (Name[2]) {
331 : default: break;
332 : case '0': // 1 string to match.
333 : return 127; // "r10"
334 : case '1': // 1 string to match.
335 : return 128; // "r11"
336 : case '2': // 1 string to match.
337 : return 129; // "r12"
338 : case '3': // 1 string to match.
339 : return 130; // "r13"
340 : case '4': // 1 string to match.
341 : return 131; // "r14"
342 : case '5': // 1 string to match.
343 : return 132; // "r15"
344 : }
345 : break;
346 12 : case '8': // 3 strings to match.
347 : switch (Name[2]) {
348 : default: break;
349 : case 'b': // 1 string to match.
350 : return 237; // "r8b"
351 : case 'd': // 1 string to match.
352 : return 253; // "r8d"
353 : case 'w': // 1 string to match.
354 : return 261; // "r8w"
355 : }
356 : break;
357 1 : case '9': // 3 strings to match.
358 : switch (Name[2]) {
359 : default: break;
360 : case 'b': // 1 string to match.
361 : return 238; // "r9b"
362 : case 'd': // 1 string to match.
363 : return 254; // "r9d"
364 : case 'w': // 1 string to match.
365 : return 262; // "r9w"
366 : }
367 : break;
368 25478 : case 'a': // 1 string to match.
369 25478 : if (Name[2] != 'x')
370 : break;
371 : return 47; // "rax"
372 1727 : case 'b': // 2 strings to match.
373 : switch (Name[2]) {
374 : default: break;
375 : case 'p': // 1 string to match.
376 : return 48; // "rbp"
377 1197 : case 'x': // 1 string to match.
378 1197 : return 49; // "rbx"
379 : }
380 : break;
381 6773 : case 'c': // 1 string to match.
382 6773 : if (Name[2] != 'x')
383 : break;
384 : return 50; // "rcx"
385 34699 : case 'd': // 2 strings to match.
386 : switch (Name[2]) {
387 : default: break;
388 : case 'i': // 1 string to match.
389 : return 51; // "rdi"
390 29774 : case 'x': // 1 string to match.
391 29774 : return 52; // "rdx"
392 : }
393 : break;
394 374 : case 'i': // 2 strings to match.
395 : switch (Name[2]) {
396 : default: break;
397 : case 'p': // 1 string to match.
398 : return 53; // "rip"
399 8 : case 'z': // 1 string to match.
400 8 : return 54; // "riz"
401 : }
402 : break;
403 4163 : case 's': // 2 strings to match.
404 : switch (Name[2]) {
405 : default: break;
406 : case 'i': // 1 string to match.
407 : return 55; // "rsi"
408 901 : case 'p': // 1 string to match.
409 901 : return 56; // "rsp"
410 : }
411 : break;
412 : }
413 : break;
414 226 : case 's': // 3 strings to match.
415 : switch (Name[1]) {
416 : default: break;
417 213 : case 'i': // 1 string to match.
418 213 : if (Name[2] != 'l')
419 : break;
420 : return 59; // "sil"
421 0 : case 'p': // 1 string to match.
422 0 : if (Name[2] != 'l')
423 : break;
424 : return 62; // "spl"
425 0 : case 's': // 1 string to match.
426 0 : if (Name[2] != 'p')
427 : break;
428 : return 64; // "ssp"
429 : }
430 : break;
431 : }
432 : break;
433 87687 : case 4: // 65 strings to match.
434 : switch (Name[0]) {
435 : default: break;
436 : case 'b': // 4 strings to match.
437 26 : if (memcmp(Name.data()+1, "nd", 2) != 0)
438 : break;
439 : switch (Name[3]) {
440 : default: break;
441 : case '0': // 1 string to match.
442 : return 65; // "bnd0"
443 : case '1': // 1 string to match.
444 : return 66; // "bnd1"
445 : case '2': // 1 string to match.
446 : return 67; // "bnd2"
447 : case '3': // 1 string to match.
448 : return 68; // "bnd3"
449 : }
450 : break;
451 : case 'c': // 6 strings to match.
452 1 : if (memcmp(Name.data()+1, "r1", 2) != 0)
453 : break;
454 : switch (Name[3]) {
455 : default: break;
456 : case '0': // 1 string to match.
457 : return 79; // "cr10"
458 : case '1': // 1 string to match.
459 : return 80; // "cr11"
460 : case '2': // 1 string to match.
461 : return 81; // "cr12"
462 : case '3': // 1 string to match.
463 : return 82; // "cr13"
464 : case '4': // 1 string to match.
465 : return 83; // "cr14"
466 : case '5': // 1 string to match.
467 : return 84; // "cr15"
468 : }
469 : break;
470 : case 'd': // 6 strings to match.
471 3 : if (memcmp(Name.data()+1, "r1", 2) != 0)
472 : break;
473 : switch (Name[3]) {
474 : default: break;
475 : case '0': // 1 string to match.
476 : return 95; // "dr10"
477 : case '1': // 1 string to match.
478 : return 96; // "dr11"
479 : case '2': // 1 string to match.
480 : return 97; // "dr12"
481 : case '3': // 1 string to match.
482 : return 98; // "dr13"
483 : case '4': // 1 string to match.
484 : return 99; // "dr14"
485 : case '5': // 1 string to match.
486 : return 100; // "dr15"
487 : }
488 : break;
489 : case 'f': // 1 string to match.
490 0 : if (memcmp(Name.data()+1, "psw", 3) != 0)
491 : break;
492 : return 34; // "fpsw"
493 1173 : case 'r': // 18 strings to match.
494 1173 : if (Name[1] != '1')
495 : break;
496 : switch (Name[2]) {
497 : default: break;
498 25 : case '0': // 3 strings to match.
499 : switch (Name[3]) {
500 : default: break;
501 : case 'b': // 1 string to match.
502 : return 239; // "r10b"
503 : case 'd': // 1 string to match.
504 : return 255; // "r10d"
505 : case 'w': // 1 string to match.
506 : return 263; // "r10w"
507 : }
508 : break;
509 31 : case '1': // 3 strings to match.
510 : switch (Name[3]) {
511 : default: break;
512 : case 'b': // 1 string to match.
513 : return 240; // "r11b"
514 : case 'd': // 1 string to match.
515 : return 256; // "r11d"
516 : case 'w': // 1 string to match.
517 : return 264; // "r11w"
518 : }
519 : break;
520 18 : case '2': // 3 strings to match.
521 : switch (Name[3]) {
522 : default: break;
523 : case 'b': // 1 string to match.
524 : return 241; // "r12b"
525 : case 'd': // 1 string to match.
526 : return 257; // "r12d"
527 : case 'w': // 1 string to match.
528 : return 265; // "r12w"
529 : }
530 : break;
531 693 : case '3': // 3 strings to match.
532 : switch (Name[3]) {
533 : default: break;
534 : case 'b': // 1 string to match.
535 : return 242; // "r13b"
536 : case 'd': // 1 string to match.
537 : return 258; // "r13d"
538 : case 'w': // 1 string to match.
539 : return 266; // "r13w"
540 : }
541 : break;
542 396 : case '4': // 3 strings to match.
543 : switch (Name[3]) {
544 : default: break;
545 : case 'b': // 1 string to match.
546 : return 243; // "r14b"
547 : case 'd': // 1 string to match.
548 : return 259; // "r14d"
549 : case 'w': // 1 string to match.
550 : return 267; // "r14w"
551 : }
552 : break;
553 10 : case '5': // 3 strings to match.
554 : switch (Name[3]) {
555 : default: break;
556 : case 'b': // 1 string to match.
557 : return 244; // "r15b"
558 : case 'd': // 1 string to match.
559 : return 260; // "r15d"
560 : case 'w': // 1 string to match.
561 : return 268; // "r15w"
562 : }
563 : break;
564 : }
565 : break;
566 : case 'x': // 10 strings to match.
567 42062 : if (memcmp(Name.data()+1, "mm", 2) != 0)
568 : break;
569 : switch (Name[3]) {
570 : default: break;
571 : case '0': // 1 string to match.
572 : return 141; // "xmm0"
573 : case '1': // 1 string to match.
574 : return 142; // "xmm1"
575 : case '2': // 1 string to match.
576 : return 143; // "xmm2"
577 : case '3': // 1 string to match.
578 : return 144; // "xmm3"
579 : case '4': // 1 string to match.
580 : return 145; // "xmm4"
581 : case '5': // 1 string to match.
582 : return 146; // "xmm5"
583 : case '6': // 1 string to match.
584 : return 147; // "xmm6"
585 : case '7': // 1 string to match.
586 : return 148; // "xmm7"
587 : case '8': // 1 string to match.
588 : return 149; // "xmm8"
589 : case '9': // 1 string to match.
590 : return 150; // "xmm9"
591 : }
592 : break;
593 : case 'y': // 10 strings to match.
594 21859 : if (memcmp(Name.data()+1, "mm", 2) != 0)
595 : break;
596 : switch (Name[3]) {
597 : default: break;
598 : case '0': // 1 string to match.
599 : return 173; // "ymm0"
600 : case '1': // 1 string to match.
601 : return 174; // "ymm1"
602 : case '2': // 1 string to match.
603 : return 175; // "ymm2"
604 : case '3': // 1 string to match.
605 : return 176; // "ymm3"
606 : case '4': // 1 string to match.
607 : return 177; // "ymm4"
608 : case '5': // 1 string to match.
609 : return 178; // "ymm5"
610 : case '6': // 1 string to match.
611 : return 179; // "ymm6"
612 : case '7': // 1 string to match.
613 : return 180; // "ymm7"
614 : case '8': // 1 string to match.
615 : return 181; // "ymm8"
616 : case '9': // 1 string to match.
617 : return 182; // "ymm9"
618 : }
619 : break;
620 : case 'z': // 10 strings to match.
621 22320 : if (memcmp(Name.data()+1, "mm", 2) != 0)
622 : break;
623 : switch (Name[3]) {
624 : default: break;
625 : case '0': // 1 string to match.
626 : return 205; // "zmm0"
627 : case '1': // 1 string to match.
628 : return 206; // "zmm1"
629 : case '2': // 1 string to match.
630 : return 207; // "zmm2"
631 : case '3': // 1 string to match.
632 : return 208; // "zmm3"
633 : case '4': // 1 string to match.
634 : return 209; // "zmm4"
635 : case '5': // 1 string to match.
636 : return 210; // "zmm5"
637 : case '6': // 1 string to match.
638 : return 211; // "zmm6"
639 : case '7': // 1 string to match.
640 : return 212; // "zmm7"
641 : case '8': // 1 string to match.
642 : return 213; // "zmm8"
643 : case '9': // 1 string to match.
644 : return 214; // "zmm9"
645 : }
646 : break;
647 : }
648 : break;
649 68282 : case 5: // 75 strings to match.
650 : switch (Name[0]) {
651 : default: break;
652 : case 'f': // 1 string to match.
653 2 : if (memcmp(Name.data()+1, "lags", 4) != 0)
654 : break;
655 : return 28; // "flags"
656 : case 's': // 8 strings to match.
657 0 : if (memcmp(Name.data()+1, "t(", 2) != 0)
658 : break;
659 : switch (Name[3]) {
660 : default: break;
661 0 : case '0': // 1 string to match.
662 0 : if (Name[4] != ')')
663 : break;
664 : return 133; // "st(0)"
665 0 : case '1': // 1 string to match.
666 0 : if (Name[4] != ')')
667 : break;
668 : return 134; // "st(1)"
669 0 : case '2': // 1 string to match.
670 0 : if (Name[4] != ')')
671 : break;
672 : return 135; // "st(2)"
673 0 : case '3': // 1 string to match.
674 0 : if (Name[4] != ')')
675 : break;
676 : return 136; // "st(3)"
677 0 : case '4': // 1 string to match.
678 0 : if (Name[4] != ')')
679 : break;
680 : return 137; // "st(4)"
681 0 : case '5': // 1 string to match.
682 0 : if (Name[4] != ')')
683 : break;
684 : return 138; // "st(5)"
685 0 : case '6': // 1 string to match.
686 0 : if (Name[4] != ')')
687 : break;
688 : return 139; // "st(6)"
689 0 : case '7': // 1 string to match.
690 0 : if (Name[4] != ')')
691 : break;
692 : return 140; // "st(7)"
693 : }
694 : break;
695 : case 'x': // 22 strings to match.
696 23135 : if (memcmp(Name.data()+1, "mm", 2) != 0)
697 : break;
698 : switch (Name[3]) {
699 : default: break;
700 11702 : case '1': // 10 strings to match.
701 : switch (Name[4]) {
702 : default: break;
703 : case '0': // 1 string to match.
704 : return 151; // "xmm10"
705 : case '1': // 1 string to match.
706 : return 152; // "xmm11"
707 : case '2': // 1 string to match.
708 : return 153; // "xmm12"
709 : case '3': // 1 string to match.
710 : return 154; // "xmm13"
711 : case '4': // 1 string to match.
712 : return 155; // "xmm14"
713 : case '5': // 1 string to match.
714 : return 156; // "xmm15"
715 : case '6': // 1 string to match.
716 : return 157; // "xmm16"
717 : case '7': // 1 string to match.
718 : return 158; // "xmm17"
719 : case '8': // 1 string to match.
720 : return 159; // "xmm18"
721 : case '9': // 1 string to match.
722 : return 160; // "xmm19"
723 : }
724 : break;
725 10562 : case '2': // 10 strings to match.
726 : switch (Name[4]) {
727 : default: break;
728 : case '0': // 1 string to match.
729 : return 161; // "xmm20"
730 : case '1': // 1 string to match.
731 : return 162; // "xmm21"
732 : case '2': // 1 string to match.
733 : return 163; // "xmm22"
734 : case '3': // 1 string to match.
735 : return 164; // "xmm23"
736 : case '4': // 1 string to match.
737 : return 165; // "xmm24"
738 : case '5': // 1 string to match.
739 : return 166; // "xmm25"
740 : case '6': // 1 string to match.
741 : return 167; // "xmm26"
742 : case '7': // 1 string to match.
743 : return 168; // "xmm27"
744 : case '8': // 1 string to match.
745 : return 169; // "xmm28"
746 : case '9': // 1 string to match.
747 : return 170; // "xmm29"
748 : }
749 : break;
750 871 : case '3': // 2 strings to match.
751 : switch (Name[4]) {
752 : default: break;
753 : case '0': // 1 string to match.
754 : return 171; // "xmm30"
755 234 : case '1': // 1 string to match.
756 234 : return 172; // "xmm31"
757 : }
758 : break;
759 : }
760 : break;
761 : case 'y': // 22 strings to match.
762 11806 : if (memcmp(Name.data()+1, "mm", 2) != 0)
763 : break;
764 : switch (Name[3]) {
765 : default: break;
766 3038 : case '1': // 10 strings to match.
767 : switch (Name[4]) {
768 : default: break;
769 : case '0': // 1 string to match.
770 : return 183; // "ymm10"
771 : case '1': // 1 string to match.
772 : return 184; // "ymm11"
773 : case '2': // 1 string to match.
774 : return 185; // "ymm12"
775 : case '3': // 1 string to match.
776 : return 186; // "ymm13"
777 : case '4': // 1 string to match.
778 : return 187; // "ymm14"
779 : case '5': // 1 string to match.
780 : return 188; // "ymm15"
781 : case '6': // 1 string to match.
782 : return 189; // "ymm16"
783 : case '7': // 1 string to match.
784 : return 190; // "ymm17"
785 : case '8': // 1 string to match.
786 : return 191; // "ymm18"
787 : case '9': // 1 string to match.
788 : return 192; // "ymm19"
789 : }
790 : break;
791 8182 : case '2': // 10 strings to match.
792 : switch (Name[4]) {
793 : default: break;
794 : case '0': // 1 string to match.
795 : return 193; // "ymm20"
796 : case '1': // 1 string to match.
797 : return 194; // "ymm21"
798 : case '2': // 1 string to match.
799 : return 195; // "ymm22"
800 : case '3': // 1 string to match.
801 : return 196; // "ymm23"
802 : case '4': // 1 string to match.
803 : return 197; // "ymm24"
804 : case '5': // 1 string to match.
805 : return 198; // "ymm25"
806 : case '6': // 1 string to match.
807 : return 199; // "ymm26"
808 : case '7': // 1 string to match.
809 : return 200; // "ymm27"
810 : case '8': // 1 string to match.
811 : return 201; // "ymm28"
812 : case '9': // 1 string to match.
813 : return 202; // "ymm29"
814 : }
815 : break;
816 586 : case '3': // 2 strings to match.
817 : switch (Name[4]) {
818 : default: break;
819 : case '0': // 1 string to match.
820 : return 203; // "ymm30"
821 138 : case '1': // 1 string to match.
822 138 : return 204; // "ymm31"
823 : }
824 : break;
825 : }
826 : break;
827 : case 'z': // 22 strings to match.
828 33280 : if (memcmp(Name.data()+1, "mm", 2) != 0)
829 : break;
830 : switch (Name[3]) {
831 : default: break;
832 22909 : case '1': // 10 strings to match.
833 : switch (Name[4]) {
834 : default: break;
835 : case '0': // 1 string to match.
836 : return 215; // "zmm10"
837 : case '1': // 1 string to match.
838 : return 216; // "zmm11"
839 : case '2': // 1 string to match.
840 : return 217; // "zmm12"
841 : case '3': // 1 string to match.
842 : return 218; // "zmm13"
843 : case '4': // 1 string to match.
844 : return 219; // "zmm14"
845 : case '5': // 1 string to match.
846 : return 220; // "zmm15"
847 : case '6': // 1 string to match.
848 : return 221; // "zmm16"
849 : case '7': // 1 string to match.
850 : return 222; // "zmm17"
851 : case '8': // 1 string to match.
852 : return 223; // "zmm18"
853 : case '9': // 1 string to match.
854 : return 224; // "zmm19"
855 : }
856 : break;
857 9914 : case '2': // 10 strings to match.
858 : switch (Name[4]) {
859 : default: break;
860 : case '0': // 1 string to match.
861 : return 225; // "zmm20"
862 : case '1': // 1 string to match.
863 : return 226; // "zmm21"
864 : case '2': // 1 string to match.
865 : return 227; // "zmm22"
866 : case '3': // 1 string to match.
867 : return 228; // "zmm23"
868 : case '4': // 1 string to match.
869 : return 229; // "zmm24"
870 : case '5': // 1 string to match.
871 : return 230; // "zmm25"
872 : case '6': // 1 string to match.
873 : return 231; // "zmm26"
874 : case '7': // 1 string to match.
875 : return 232; // "zmm27"
876 : case '8': // 1 string to match.
877 : return 233; // "zmm28"
878 : case '9': // 1 string to match.
879 : return 234; // "zmm29"
880 : }
881 : break;
882 457 : case '3': // 2 strings to match.
883 : switch (Name[4]) {
884 : default: break;
885 : case '0': // 1 string to match.
886 : return 235; // "zmm30"
887 1 : case '1': // 1 string to match.
888 1 : return 236; // "zmm31"
889 : }
890 : break;
891 : }
892 : break;
893 : }
894 : break;
895 : case 7: // 1 string to match.
896 10 : if (memcmp(Name.data()+0, "dirflag", 7) != 0)
897 : break;
898 : return 14; // "dirflag"
899 : }
900 : return 0;
901 : }
902 :
903 : #endif // GET_REGISTER_MATCHER
904 :
905 :
906 : #ifdef GET_SUBTARGET_FEATURE_NAME
907 : #undef GET_SUBTARGET_FEATURE_NAME
908 :
909 : // User-level names for subtarget features that participate in
910 : // instruction matching.
911 : static const char *getSubtargetFeatureName(uint64_t Val) {
912 20 : switch(Val) {
913 : case Feature_Not64BitMode: return "Not 64-bit mode";
914 15 : case Feature_In64BitMode: return "64-bit mode";
915 0 : case Feature_In16BitMode: return "16-bit mode";
916 0 : case Feature_Not16BitMode: return "Not 16-bit mode";
917 0 : case Feature_In32BitMode: return "32-bit mode";
918 0 : default: return "(unknown)";
919 : }
920 : }
921 :
922 : #endif // GET_SUBTARGET_FEATURE_NAME
923 :
924 :
925 : #ifdef GET_MATCHER_IMPLEMENTATION
926 : #undef GET_MATCHER_IMPLEMENTATION
927 :
928 166907 : static void applyMnemonicAliases(StringRef &Mnemonic, uint64_t Features, unsigned VariantID) {
929 166907 : switch (VariantID) {
930 : case 0:
931 : switch (Mnemonic.size()) {
932 : default: break;
933 11870 : case 3: // 6 strings to match.
934 11870 : switch (Mnemonic[0]) {
935 : default: break;
936 206 : case 'c': // 4 strings to match.
937 : switch (Mnemonic[1]) {
938 : default: break;
939 22 : case 'b': // 1 string to match.
940 22 : if (Mnemonic[2] != 'w')
941 : break;
942 22 : Mnemonic = "cbtw"; // "cbw"
943 22 : return;
944 22 : case 'd': // 1 string to match.
945 22 : if (Mnemonic[2] != 'q')
946 : break;
947 22 : Mnemonic = "cltd"; // "cdq"
948 22 : return;
949 22 : case 'q': // 1 string to match.
950 22 : if (Mnemonic[2] != 'o')
951 : break;
952 22 : Mnemonic = "cqto"; // "cqo"
953 22 : return;
954 22 : case 'w': // 1 string to match.
955 22 : if (Mnemonic[2] != 'd')
956 : break;
957 22 : Mnemonic = "cwtd"; // "cwd"
958 22 : return;
959 : }
960 : break;
961 : case 'p': // 1 string to match.
962 180 : if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
963 : break;
964 102 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pop"
965 3 : Mnemonic = "popw";
966 99 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
967 62 : Mnemonic = "popl";
968 37 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
969 37 : Mnemonic = "popq";
970 : return;
971 : case 'r': // 1 string to match.
972 519 : if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
973 : break;
974 505 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "ret"
975 3 : Mnemonic = "retw";
976 502 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
977 161 : Mnemonic = "retl";
978 341 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
979 341 : Mnemonic = "retq";
980 : return;
981 : }
982 : break;
983 46070 : case 4: // 18 strings to match.
984 46070 : switch (Mnemonic[0]) {
985 : default: break;
986 1297 : case 'c': // 3 strings to match.
987 : switch (Mnemonic[1]) {
988 : default: break;
989 : case 'a': // 1 string to match.
990 267 : if (memcmp(Mnemonic.data()+2, "ll", 2) != 0)
991 : break;
992 267 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "call"
993 2 : Mnemonic = "callw";
994 265 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
995 85 : Mnemonic = "calll";
996 180 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
997 180 : Mnemonic = "callq";
998 : return;
999 : case 'd': // 1 string to match.
1000 22 : if (memcmp(Mnemonic.data()+2, "qe", 2) != 0)
1001 : break;
1002 22 : Mnemonic = "cltq"; // "cdqe"
1003 22 : return;
1004 : case 'w': // 1 string to match.
1005 33 : if (memcmp(Mnemonic.data()+2, "de", 2) != 0)
1006 : break;
1007 22 : Mnemonic = "cwtl"; // "cwde"
1008 22 : return;
1009 : }
1010 : break;
1011 : case 'i': // 1 string to match.
1012 18235 : if (memcmp(Mnemonic.data()+1, "ret", 3) != 0)
1013 : break;
1014 3 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "iret"
1015 1 : Mnemonic = "iretw";
1016 2 : else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
1017 2 : Mnemonic = "iretl";
1018 : return;
1019 5822 : case 'l': // 3 strings to match.
1020 : switch (Mnemonic[1]) {
1021 : default: break;
1022 : case 'g': // 1 string to match.
1023 13 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1024 : break;
1025 13 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lgdt"
1026 4 : Mnemonic = "lgdtw";
1027 9 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1028 5 : Mnemonic = "lgdtl";
1029 4 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1030 4 : Mnemonic = "lgdtq";
1031 : return;
1032 : case 'i': // 1 string to match.
1033 3 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1034 : break;
1035 3 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lidt"
1036 1 : Mnemonic = "lidtw";
1037 2 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1038 1 : Mnemonic = "lidtl";
1039 1 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1040 1 : Mnemonic = "lidtq";
1041 : return;
1042 : case 'r': // 1 string to match.
1043 54 : if (memcmp(Mnemonic.data()+2, "et", 2) != 0)
1044 : break;
1045 54 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lret"
1046 3 : Mnemonic = "lretw";
1047 51 : else if ((Features & Feature_Not16BitMode) == Feature_Not16BitMode)
1048 51 : Mnemonic = "lretl";
1049 : return;
1050 : }
1051 : break;
1052 715 : case 'p': // 3 strings to match.
1053 : switch (Mnemonic[1]) {
1054 : default: break;
1055 310 : case 'o': // 2 strings to match.
1056 310 : if (Mnemonic[2] != 'p')
1057 : break;
1058 : switch (Mnemonic[3]) {
1059 : default: break;
1060 14 : case 'a': // 1 string to match.
1061 14 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "popa"
1062 1 : Mnemonic = "popaw";
1063 13 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1064 13 : Mnemonic = "popal";
1065 : return;
1066 27 : case 'f': // 1 string to match.
1067 27 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "popf"
1068 1 : Mnemonic = "popfw";
1069 26 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1070 14 : Mnemonic = "popfl";
1071 12 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1072 12 : Mnemonic = "popfq";
1073 : return;
1074 : }
1075 : break;
1076 : case 'u': // 1 string to match.
1077 196 : if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1078 : break;
1079 196 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "push"
1080 6 : Mnemonic = "pushw";
1081 190 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1082 83 : Mnemonic = "pushl";
1083 107 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1084 107 : Mnemonic = "pushq";
1085 : return;
1086 : }
1087 : break;
1088 : case 'r': // 1 string to match.
1089 3125 : if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1090 : break;
1091 6 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "retn"
1092 2 : Mnemonic = "retw";
1093 4 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1094 2 : Mnemonic = "retl";
1095 2 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1096 2 : Mnemonic = "retq";
1097 : return;
1098 4725 : case 's': // 6 strings to match.
1099 : switch (Mnemonic[1]) {
1100 : default: break;
1101 779 : case 'a': // 4 strings to match.
1102 779 : if (Mnemonic[2] != 'l')
1103 : break;
1104 : switch (Mnemonic[3]) {
1105 : default: break;
1106 : case 'b': // 1 string to match.
1107 12 : Mnemonic = "shlb"; // "salb"
1108 12 : return;
1109 : case 'l': // 1 string to match.
1110 21 : Mnemonic = "shll"; // "sall"
1111 21 : return;
1112 : case 'q': // 1 string to match.
1113 2 : Mnemonic = "shlq"; // "salq"
1114 2 : return;
1115 : case 'w': // 1 string to match.
1116 4 : Mnemonic = "shlw"; // "salw"
1117 4 : return;
1118 : }
1119 : break;
1120 : case 'g': // 1 string to match.
1121 3 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1122 : break;
1123 3 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "sgdt"
1124 1 : Mnemonic = "sgdtw";
1125 2 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1126 1 : Mnemonic = "sgdtl";
1127 1 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1128 1 : Mnemonic = "sgdtq";
1129 : return;
1130 : case 'i': // 1 string to match.
1131 3 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1132 : break;
1133 3 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "sidt"
1134 1 : Mnemonic = "sidtw";
1135 2 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1136 1 : Mnemonic = "sidtl";
1137 1 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1138 1 : Mnemonic = "sidtq";
1139 : return;
1140 : }
1141 : break;
1142 : case 'u': // 1 string to match.
1143 4 : if (memcmp(Mnemonic.data()+1, "d2a", 3) != 0)
1144 : break;
1145 2 : Mnemonic = "ud2"; // "ud2a"
1146 2 : return;
1147 : }
1148 : break;
1149 15387 : case 5: // 9 strings to match.
1150 15387 : switch (Mnemonic[0]) {
1151 : default: break;
1152 : case 'f': // 1 string to match.
1153 1350 : if (memcmp(Mnemonic.data()+1, "ildq", 4) != 0)
1154 : break;
1155 1 : Mnemonic = "fildll"; // "fildq"
1156 1 : return;
1157 2768 : case 'p': // 3 strings to match.
1158 : switch (Mnemonic[1]) {
1159 : default: break;
1160 : case 'o': // 1 string to match.
1161 27 : if (memcmp(Mnemonic.data()+2, "pfd", 3) != 0)
1162 : break;
1163 2 : Mnemonic = "popfl"; // "popfd"
1164 2 : return;
1165 : case 'u': // 2 strings to match.
1166 461 : if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1167 : break;
1168 : switch (Mnemonic[4]) {
1169 : default: break;
1170 13 : case 'a': // 1 string to match.
1171 13 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pusha"
1172 1 : Mnemonic = "pushaw";
1173 12 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1174 12 : Mnemonic = "pushal";
1175 : return;
1176 26 : case 'f': // 1 string to match.
1177 26 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pushf"
1178 1 : Mnemonic = "pushfw";
1179 25 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1180 13 : Mnemonic = "pushfl";
1181 12 : else if ((Features & Feature_In64BitMode) == Feature_In64BitMode)
1182 12 : Mnemonic = "pushfq";
1183 : return;
1184 : }
1185 : break;
1186 : }
1187 : break;
1188 : case 's': // 4 strings to match.
1189 2712 : if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1190 : break;
1191 : switch (Mnemonic[4]) {
1192 : default: break;
1193 : case 'b': // 1 string to match.
1194 1 : Mnemonic = "movsb"; // "smovb"
1195 1 : return;
1196 : case 'l': // 1 string to match.
1197 1 : Mnemonic = "movsl"; // "smovl"
1198 1 : return;
1199 : case 'q': // 1 string to match.
1200 1 : Mnemonic = "movsq"; // "smovq"
1201 1 : return;
1202 : case 'w': // 1 string to match.
1203 1 : Mnemonic = "movsw"; // "smovw"
1204 1 : return;
1205 : }
1206 : break;
1207 : case 'v': // 1 string to match.
1208 1742 : if (memcmp(Mnemonic.data()+1, "errw", 4) != 0)
1209 : break;
1210 2 : Mnemonic = "verr"; // "verrw"
1211 2 : return;
1212 : }
1213 : break;
1214 18854 : case 6: // 15 strings to match.
1215 18854 : switch (Mnemonic[0]) {
1216 : default: break;
1217 : case 'c': // 6 strings to match.
1218 1399 : if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1219 : break;
1220 : switch (Mnemonic[4]) {
1221 : default: break;
1222 68 : case 'c': // 3 strings to match.
1223 : switch (Mnemonic[5]) {
1224 : default: break;
1225 : case 'l': // 1 string to match.
1226 24 : Mnemonic = "cmovbl"; // "cmovcl"
1227 24 : return;
1228 : case 'q': // 1 string to match.
1229 22 : Mnemonic = "cmovbq"; // "cmovcq"
1230 22 : return;
1231 : case 'w': // 1 string to match.
1232 22 : Mnemonic = "cmovbw"; // "cmovcw"
1233 22 : return;
1234 : }
1235 : break;
1236 68 : case 'z': // 3 strings to match.
1237 : switch (Mnemonic[5]) {
1238 : default: break;
1239 : case 'l': // 1 string to match.
1240 24 : Mnemonic = "cmovel"; // "cmovzl"
1241 24 : return;
1242 : case 'q': // 1 string to match.
1243 22 : Mnemonic = "cmoveq"; // "cmovzq"
1244 22 : return;
1245 : case 'w': // 1 string to match.
1246 22 : Mnemonic = "cmovew"; // "cmovzw"
1247 22 : return;
1248 : }
1249 : break;
1250 : }
1251 : break;
1252 1566 : case 'f': // 4 strings to match.
1253 : switch (Mnemonic[1]) {
1254 : default: break;
1255 : case 'c': // 2 strings to match.
1256 205 : if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1257 : break;
1258 : switch (Mnemonic[5]) {
1259 : default: break;
1260 : case 'a': // 1 string to match.
1261 1 : Mnemonic = "fcmovnbe"; // "fcmova"
1262 1 : return;
1263 : case 'z': // 1 string to match.
1264 0 : Mnemonic = "fcmove"; // "fcmovz"
1265 0 : return;
1266 : }
1267 : break;
1268 : case 'i': // 1 string to match.
1269 478 : if (memcmp(Mnemonic.data()+2, "stpq", 4) != 0)
1270 : break;
1271 0 : Mnemonic = "fistpll"; // "fistpq"
1272 0 : return;
1273 : case 'l': // 1 string to match.
1274 137 : if (memcmp(Mnemonic.data()+2, "dcww", 4) != 0)
1275 : break;
1276 2 : Mnemonic = "fldcw"; // "fldcww"
1277 2 : return;
1278 : }
1279 : break;
1280 : case 'l': // 2 strings to match.
1281 171 : if (memcmp(Mnemonic.data()+1, "eave", 4) != 0)
1282 : break;
1283 : switch (Mnemonic[5]) {
1284 : default: break;
1285 2 : case 'l': // 1 string to match.
1286 2 : if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode) // "leavel"
1287 2 : Mnemonic = "leave";
1288 : return;
1289 3 : case 'q': // 1 string to match.
1290 3 : if ((Features & Feature_In64BitMode) == Feature_In64BitMode) // "leaveq"
1291 3 : Mnemonic = "leave";
1292 : return;
1293 : }
1294 : break;
1295 : case 'p': // 1 string to match.
1296 1976 : if (memcmp(Mnemonic.data()+1, "ushfd", 5) != 0)
1297 : break;
1298 2 : Mnemonic = "pushfl"; // "pushfd"
1299 2 : return;
1300 : case 's': // 1 string to match.
1301 286 : if (memcmp(Mnemonic.data()+1, "ysret", 5) != 0)
1302 : break;
1303 3 : Mnemonic = "sysretl"; // "sysret"
1304 3 : return;
1305 : case 'x': // 1 string to match.
1306 73 : if (memcmp(Mnemonic.data()+1, "saveq", 5) != 0)
1307 : break;
1308 0 : Mnemonic = "xsave64"; // "xsaveq"
1309 0 : return;
1310 : }
1311 : break;
1312 16979 : case 7: // 34 strings to match.
1313 16979 : switch (Mnemonic[0]) {
1314 : default: break;
1315 : case 'c': // 24 strings to match.
1316 1638 : if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1317 : break;
1318 : switch (Mnemonic[4]) {
1319 : default: break;
1320 949 : case 'n': // 18 strings to match.
1321 : switch (Mnemonic[5]) {
1322 : default: break;
1323 70 : case 'a': // 3 strings to match.
1324 : switch (Mnemonic[6]) {
1325 : default: break;
1326 : case 'l': // 1 string to match.
1327 24 : Mnemonic = "cmovbel"; // "cmovnal"
1328 24 : return;
1329 : case 'q': // 1 string to match.
1330 22 : Mnemonic = "cmovbeq"; // "cmovnaq"
1331 22 : return;
1332 : case 'w': // 1 string to match.
1333 22 : Mnemonic = "cmovbew"; // "cmovnaw"
1334 22 : return;
1335 : }
1336 : break;
1337 68 : case 'b': // 3 strings to match.
1338 : switch (Mnemonic[6]) {
1339 : default: break;
1340 : case 'l': // 1 string to match.
1341 24 : Mnemonic = "cmovael"; // "cmovnbl"
1342 24 : return;
1343 : case 'q': // 1 string to match.
1344 22 : Mnemonic = "cmovaeq"; // "cmovnbq"
1345 22 : return;
1346 : case 'w': // 1 string to match.
1347 22 : Mnemonic = "cmovaew"; // "cmovnbw"
1348 22 : return;
1349 : }
1350 : break;
1351 68 : case 'c': // 3 strings to match.
1352 : switch (Mnemonic[6]) {
1353 : default: break;
1354 : case 'l': // 1 string to match.
1355 24 : Mnemonic = "cmovael"; // "cmovncl"
1356 24 : return;
1357 : case 'q': // 1 string to match.
1358 22 : Mnemonic = "cmovaeq"; // "cmovncq"
1359 22 : return;
1360 : case 'w': // 1 string to match.
1361 22 : Mnemonic = "cmovaew"; // "cmovncw"
1362 22 : return;
1363 : }
1364 : break;
1365 70 : case 'g': // 3 strings to match.
1366 : switch (Mnemonic[6]) {
1367 : default: break;
1368 : case 'l': // 1 string to match.
1369 26 : Mnemonic = "cmovlel"; // "cmovngl"
1370 26 : return;
1371 : case 'q': // 1 string to match.
1372 22 : Mnemonic = "cmovleq"; // "cmovngq"
1373 22 : return;
1374 : case 'w': // 1 string to match.
1375 22 : Mnemonic = "cmovlew"; // "cmovngw"
1376 22 : return;
1377 : }
1378 : break;
1379 76 : case 'l': // 3 strings to match.
1380 : switch (Mnemonic[6]) {
1381 : default: break;
1382 : case 'l': // 1 string to match.
1383 26 : Mnemonic = "cmovgel"; // "cmovnll"
1384 26 : return;
1385 : case 'q': // 1 string to match.
1386 24 : Mnemonic = "cmovgeq"; // "cmovnlq"
1387 24 : return;
1388 : case 'w': // 1 string to match.
1389 24 : Mnemonic = "cmovgew"; // "cmovnlw"
1390 24 : return;
1391 : }
1392 : break;
1393 73 : case 'z': // 3 strings to match.
1394 : switch (Mnemonic[6]) {
1395 : default: break;
1396 : case 'l': // 1 string to match.
1397 25 : Mnemonic = "cmovnel"; // "cmovnzl"
1398 25 : return;
1399 : case 'q': // 1 string to match.
1400 24 : Mnemonic = "cmovneq"; // "cmovnzq"
1401 24 : return;
1402 : case 'w': // 1 string to match.
1403 23 : Mnemonic = "cmovnew"; // "cmovnzw"
1404 23 : return;
1405 : }
1406 : break;
1407 : }
1408 : break;
1409 132 : case 'p': // 6 strings to match.
1410 : switch (Mnemonic[5]) {
1411 : default: break;
1412 66 : case 'e': // 3 strings to match.
1413 : switch (Mnemonic[6]) {
1414 : default: break;
1415 : case 'l': // 1 string to match.
1416 22 : Mnemonic = "cmovpl"; // "cmovpel"
1417 22 : return;
1418 : case 'q': // 1 string to match.
1419 22 : Mnemonic = "cmovpq"; // "cmovpeq"
1420 22 : return;
1421 : case 'w': // 1 string to match.
1422 22 : Mnemonic = "cmovpw"; // "cmovpew"
1423 22 : return;
1424 : }
1425 : break;
1426 66 : case 'o': // 3 strings to match.
1427 : switch (Mnemonic[6]) {
1428 : default: break;
1429 : case 'l': // 1 string to match.
1430 22 : Mnemonic = "cmovnpl"; // "cmovpol"
1431 22 : return;
1432 : case 'q': // 1 string to match.
1433 22 : Mnemonic = "cmovnpq"; // "cmovpoq"
1434 22 : return;
1435 : case 'w': // 1 string to match.
1436 22 : Mnemonic = "cmovnpw"; // "cmovpow"
1437 22 : return;
1438 : }
1439 : break;
1440 : }
1441 : break;
1442 : }
1443 : break;
1444 714 : case 'f': // 6 strings to match.
1445 : switch (Mnemonic[1]) {
1446 : default: break;
1447 : case 'c': // 2 strings to match.
1448 106 : if (memcmp(Mnemonic.data()+2, "mov", 3) != 0)
1449 : break;
1450 : switch (Mnemonic[5]) {
1451 : default: break;
1452 1 : case 'a': // 1 string to match.
1453 1 : if (Mnemonic[6] != 'e')
1454 : break;
1455 1 : Mnemonic = "fcmovnb"; // "fcmovae"
1456 1 : return;
1457 79 : case 'n': // 1 string to match.
1458 79 : if (Mnemonic[6] != 'a')
1459 : break;
1460 1 : Mnemonic = "fcmovbe"; // "fcmovna"
1461 1 : return;
1462 : }
1463 : break;
1464 : case 'i': // 1 string to match.
1465 334 : if (memcmp(Mnemonic.data()+2, "sttpq", 5) != 0)
1466 : break;
1467 0 : Mnemonic = "fisttpll"; // "fisttpq"
1468 0 : return;
1469 : case 'n': // 2 strings to match.
1470 50 : if (memcmp(Mnemonic.data()+2, "st", 2) != 0)
1471 : break;
1472 : switch (Mnemonic[4]) {
1473 : default: break;
1474 : case 'c': // 1 string to match.
1475 2 : if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1476 : break;
1477 2 : Mnemonic = "fnstcw"; // "fnstcww"
1478 2 : return;
1479 : case 's': // 1 string to match.
1480 2 : if (memcmp(Mnemonic.data()+5, "ww", 2) != 0)
1481 : break;
1482 2 : Mnemonic = "fnstsw"; // "fnstsww"
1483 2 : return;
1484 : }
1485 : break;
1486 : case 'x': // 1 string to match.
1487 67 : if (memcmp(Mnemonic.data()+2, "saveq", 5) != 0)
1488 : break;
1489 1 : Mnemonic = "fxsave64"; // "fxsaveq"
1490 1 : return;
1491 : }
1492 : break;
1493 : case 's': // 1 string to match.
1494 53 : if (memcmp(Mnemonic.data()+1, "ysexit", 6) != 0)
1495 : break;
1496 3 : Mnemonic = "sysexitl"; // "sysexit"
1497 3 : return;
1498 26 : case 'x': // 3 strings to match.
1499 : switch (Mnemonic[1]) {
1500 : default: break;
1501 : case 'r': // 1 string to match.
1502 20 : if (memcmp(Mnemonic.data()+2, "storq", 5) != 0)
1503 : break;
1504 0 : Mnemonic = "xrstor64"; // "xrstorq"
1505 0 : return;
1506 : case 's': // 2 strings to match.
1507 6 : if (memcmp(Mnemonic.data()+2, "ave", 3) != 0)
1508 : break;
1509 : switch (Mnemonic[5]) {
1510 : default: break;
1511 0 : case 'c': // 1 string to match.
1512 0 : if (Mnemonic[6] != 'q')
1513 : break;
1514 0 : Mnemonic = "xsavec64"; // "xsavecq"
1515 0 : return;
1516 0 : case 's': // 1 string to match.
1517 0 : if (Mnemonic[6] != 'q')
1518 : break;
1519 0 : Mnemonic = "xsaves64"; // "xsavesq"
1520 0 : return;
1521 : }
1522 : break;
1523 : }
1524 : break;
1525 : }
1526 : break;
1527 9659 : case 8: // 15 strings to match.
1528 9659 : switch (Mnemonic[0]) {
1529 : default: break;
1530 : case 'c': // 12 strings to match.
1531 1058 : if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1532 : break;
1533 : switch (Mnemonic[5]) {
1534 : default: break;
1535 74 : case 'a': // 3 strings to match.
1536 74 : if (Mnemonic[6] != 'e')
1537 : break;
1538 : switch (Mnemonic[7]) {
1539 : default: break;
1540 : case 'l': // 1 string to match.
1541 24 : Mnemonic = "cmovbl"; // "cmovnael"
1542 24 : return;
1543 : case 'q': // 1 string to match.
1544 24 : Mnemonic = "cmovbq"; // "cmovnaeq"
1545 24 : return;
1546 : case 'w': // 1 string to match.
1547 24 : Mnemonic = "cmovbw"; // "cmovnaew"
1548 24 : return;
1549 : }
1550 : break;
1551 68 : case 'b': // 3 strings to match.
1552 68 : if (Mnemonic[6] != 'e')
1553 : break;
1554 : switch (Mnemonic[7]) {
1555 : default: break;
1556 : case 'l': // 1 string to match.
1557 24 : Mnemonic = "cmoval"; // "cmovnbel"
1558 24 : return;
1559 : case 'q': // 1 string to match.
1560 22 : Mnemonic = "cmovaq"; // "cmovnbeq"
1561 22 : return;
1562 : case 'w': // 1 string to match.
1563 22 : Mnemonic = "cmovaw"; // "cmovnbew"
1564 22 : return;
1565 : }
1566 : break;
1567 68 : case 'g': // 3 strings to match.
1568 68 : if (Mnemonic[6] != 'e')
1569 : break;
1570 : switch (Mnemonic[7]) {
1571 : default: break;
1572 : case 'l': // 1 string to match.
1573 24 : Mnemonic = "cmovll"; // "cmovngel"
1574 24 : return;
1575 : case 'q': // 1 string to match.
1576 22 : Mnemonic = "cmovlq"; // "cmovngeq"
1577 22 : return;
1578 : case 'w': // 1 string to match.
1579 22 : Mnemonic = "cmovlw"; // "cmovngew"
1580 22 : return;
1581 : }
1582 : break;
1583 68 : case 'l': // 3 strings to match.
1584 68 : if (Mnemonic[6] != 'e')
1585 : break;
1586 : switch (Mnemonic[7]) {
1587 : default: break;
1588 : case 'l': // 1 string to match.
1589 24 : Mnemonic = "cmovgl"; // "cmovnlel"
1590 24 : return;
1591 : case 'q': // 1 string to match.
1592 22 : Mnemonic = "cmovgq"; // "cmovnleq"
1593 22 : return;
1594 : case 'w': // 1 string to match.
1595 22 : Mnemonic = "cmovgw"; // "cmovnlew"
1596 22 : return;
1597 : }
1598 : break;
1599 : }
1600 : break;
1601 56 : case 'f': // 2 strings to match.
1602 : switch (Mnemonic[1]) {
1603 : default: break;
1604 : case 'c': // 1 string to match.
1605 27 : if (memcmp(Mnemonic.data()+2, "movnae", 6) != 0)
1606 : break;
1607 1 : Mnemonic = "fcmovb"; // "fcmovnae"
1608 1 : return;
1609 : case 'x': // 1 string to match.
1610 8 : if (memcmp(Mnemonic.data()+2, "rstorq", 6) != 0)
1611 : break;
1612 1 : Mnemonic = "fxrstor64"; // "fxrstorq"
1613 1 : return;
1614 : }
1615 : break;
1616 : case 'x': // 1 string to match.
1617 42 : if (memcmp(Mnemonic.data()+1, "rstorsq", 7) != 0)
1618 : break;
1619 0 : Mnemonic = "xrstors64"; // "xrstorsq"
1620 0 : return;
1621 : }
1622 : break;
1623 : case 9: // 1 string to match.
1624 12124 : if (memcmp(Mnemonic.data()+0, "xsaveoptq", 9) != 0)
1625 : break;
1626 0 : Mnemonic = "xsaveopt64"; // "xsaveoptq"
1627 0 : return;
1628 : }
1629 : break;
1630 : case 1:
1631 : switch (Mnemonic.size()) {
1632 : default: break;
1633 : case 3: // 1 string to match.
1634 2969 : if (memcmp(Mnemonic.data()+0, "sal", 3) != 0)
1635 : break;
1636 1 : Mnemonic = "shl"; // "sal"
1637 1 : return;
1638 401 : case 4: // 7 strings to match.
1639 401 : switch (Mnemonic[0]) {
1640 : default: break;
1641 41 : case 'l': // 2 strings to match.
1642 : switch (Mnemonic[1]) {
1643 : default: break;
1644 : case 'g': // 1 string to match.
1645 16 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1646 : break;
1647 16 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lgdt"
1648 8 : Mnemonic = "lgdtw";
1649 8 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1650 8 : Mnemonic = "lgdtd";
1651 : return;
1652 : case 'i': // 1 string to match.
1653 16 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1654 : break;
1655 16 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "lidt"
1656 8 : Mnemonic = "lidtw";
1657 8 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1658 8 : Mnemonic = "lidtd";
1659 : return;
1660 : }
1661 : break;
1662 : case 'p': // 2 strings to match.
1663 18 : if (memcmp(Mnemonic.data()+1, "op", 2) != 0)
1664 : break;
1665 : switch (Mnemonic[3]) {
1666 : default: break;
1667 3 : case 'a': // 1 string to match.
1668 3 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "popa"
1669 0 : Mnemonic = "popaw";
1670 3 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1671 3 : Mnemonic = "popal";
1672 : return;
1673 1 : case 'f': // 1 string to match.
1674 1 : if ((Features & Feature_In64BitMode) == Feature_In64BitMode) // "popf"
1675 1 : Mnemonic = "popfq";
1676 : return;
1677 : }
1678 : break;
1679 : case 'r': // 1 string to match.
1680 3 : if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
1681 : break;
1682 0 : Mnemonic = "ret"; // "retn"
1683 0 : return;
1684 76 : case 's': // 2 strings to match.
1685 : switch (Mnemonic[1]) {
1686 : default: break;
1687 : case 'g': // 1 string to match.
1688 16 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1689 : break;
1690 16 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "sgdt"
1691 8 : Mnemonic = "sgdtw";
1692 8 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1693 8 : Mnemonic = "sgdtd";
1694 : return;
1695 : case 'i': // 1 string to match.
1696 17 : if (memcmp(Mnemonic.data()+2, "dt", 2) != 0)
1697 : break;
1698 17 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "sidt"
1699 8 : Mnemonic = "sidtw";
1700 9 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1701 8 : Mnemonic = "sidtd";
1702 : return;
1703 : }
1704 : break;
1705 : }
1706 : break;
1707 296 : case 5: // 5 strings to match.
1708 296 : switch (Mnemonic[0]) {
1709 : default: break;
1710 : case 'c': // 2 strings to match.
1711 36 : if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1712 : break;
1713 : switch (Mnemonic[4]) {
1714 : default: break;
1715 : case 'c': // 1 string to match.
1716 1 : Mnemonic = "cmovb"; // "cmovc"
1717 1 : return;
1718 : case 'z': // 1 string to match.
1719 1 : Mnemonic = "cmove"; // "cmovz"
1720 1 : return;
1721 : }
1722 : break;
1723 8 : case 'p': // 3 strings to match.
1724 : switch (Mnemonic[1]) {
1725 : default: break;
1726 : case 'o': // 1 string to match.
1727 4 : if (memcmp(Mnemonic.data()+2, "pad", 3) != 0)
1728 : break;
1729 3 : if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode) // "popad"
1730 3 : Mnemonic = "popal";
1731 : return;
1732 : case 'u': // 2 strings to match.
1733 4 : if (memcmp(Mnemonic.data()+2, "sh", 2) != 0)
1734 : break;
1735 : switch (Mnemonic[4]) {
1736 : default: break;
1737 3 : case 'a': // 1 string to match.
1738 3 : if ((Features & Feature_In16BitMode) == Feature_In16BitMode) // "pusha"
1739 0 : Mnemonic = "pushaw";
1740 3 : else if ((Features & Feature_In32BitMode) == Feature_In32BitMode)
1741 3 : Mnemonic = "pushal";
1742 : return;
1743 1 : case 'f': // 1 string to match.
1744 1 : if ((Features & Feature_In64BitMode) == Feature_In64BitMode) // "pushf"
1745 1 : Mnemonic = "pushfq";
1746 : return;
1747 : }
1748 : break;
1749 : }
1750 : break;
1751 : }
1752 : break;
1753 1948 : case 6: // 9 strings to match.
1754 1948 : switch (Mnemonic[0]) {
1755 : default: break;
1756 : case 'c': // 8 strings to match.
1757 10 : if (memcmp(Mnemonic.data()+1, "mov", 3) != 0)
1758 : break;
1759 : switch (Mnemonic[4]) {
1760 : default: break;
1761 6 : case 'n': // 6 strings to match.
1762 : switch (Mnemonic[5]) {
1763 : default: break;
1764 : case 'a': // 1 string to match.
1765 1 : Mnemonic = "cmovbe"; // "cmovna"
1766 1 : return;
1767 : case 'b': // 1 string to match.
1768 1 : Mnemonic = "cmovae"; // "cmovnb"
1769 1 : return;
1770 : case 'c': // 1 string to match.
1771 1 : Mnemonic = "cmovae"; // "cmovnc"
1772 1 : return;
1773 : case 'g': // 1 string to match.
1774 1 : Mnemonic = "cmovle"; // "cmovng"
1775 1 : return;
1776 : case 'l': // 1 string to match.
1777 1 : Mnemonic = "cmovge"; // "cmovnl"
1778 1 : return;
1779 : case 'z': // 1 string to match.
1780 1 : Mnemonic = "cmovne"; // "cmovnz"
1781 1 : return;
1782 : }
1783 : break;
1784 2 : case 'p': // 2 strings to match.
1785 : switch (Mnemonic[5]) {
1786 : default: break;
1787 : case 'e': // 1 string to match.
1788 1 : Mnemonic = "cmovp"; // "cmovpe"
1789 1 : return;
1790 : case 'o': // 1 string to match.
1791 1 : Mnemonic = "cmovnp"; // "cmovpo"
1792 1 : return;
1793 : }
1794 : break;
1795 : }
1796 : break;
1797 : case 'p': // 1 string to match.
1798 4 : if (memcmp(Mnemonic.data()+1, "ushad", 5) != 0)
1799 : break;
1800 3 : if ((Features & Feature_Not64BitMode) == Feature_Not64BitMode) // "pushad"
1801 3 : Mnemonic = "pushal";
1802 : return;
1803 : }
1804 : break;
1805 1428 : case 7: // 6 strings to match.
1806 1428 : switch (Mnemonic[0]) {
1807 : default: break;
1808 : case 'a': // 1 string to match.
1809 1 : if (memcmp(Mnemonic.data()+1, "cquire", 6) != 0)
1810 : break;
1811 1 : Mnemonic = "xacquire"; // "acquire"
1812 1 : return;
1813 : case 'c': // 4 strings to match.
1814 4 : if (memcmp(Mnemonic.data()+1, "movn", 4) != 0)
1815 : break;
1816 : switch (Mnemonic[5]) {
1817 : default: break;
1818 1 : case 'a': // 1 string to match.
1819 1 : if (Mnemonic[6] != 'e')
1820 : break;
1821 1 : Mnemonic = "cmovb"; // "cmovnae"
1822 1 : return;
1823 1 : case 'b': // 1 string to match.
1824 1 : if (Mnemonic[6] != 'e')
1825 : break;
1826 1 : Mnemonic = "cmova"; // "cmovnbe"
1827 1 : return;
1828 1 : case 'g': // 1 string to match.
1829 1 : if (Mnemonic[6] != 'e')
1830 : break;
1831 1 : Mnemonic = "cmovl"; // "cmovnge"
1832 1 : return;
1833 1 : case 'l': // 1 string to match.
1834 1 : if (Mnemonic[6] != 'e')
1835 : break;
1836 1 : Mnemonic = "cmovg"; // "cmovnle"
1837 1 : return;
1838 : }
1839 : break;
1840 : case 'r': // 1 string to match.
1841 1 : if (memcmp(Mnemonic.data()+1, "elease", 6) != 0)
1842 : break;
1843 1 : Mnemonic = "xrelease"; // "release"
1844 1 : return;
1845 : }
1846 : break;
1847 : }
1848 : break;
1849 : }
1850 164405 : switch (Mnemonic.size()) {
1851 : default: break;
1852 278 : case 2: // 2 strings to match.
1853 556 : if (Mnemonic[0] != 'j')
1854 : break;
1855 : switch (Mnemonic[1]) {
1856 : default: break;
1857 : case 'c': // 1 string to match.
1858 21 : Mnemonic = "jb"; // "jc"
1859 21 : return;
1860 : case 'z': // 1 string to match.
1861 29 : Mnemonic = "je"; // "jz"
1862 29 : return;
1863 : }
1864 : break;
1865 14143 : case 3: // 8 strings to match.
1866 28286 : if (Mnemonic[0] != 'j')
1867 : break;
1868 : switch (Mnemonic[1]) {
1869 : default: break;
1870 187 : case 'n': // 6 strings to match.
1871 : switch (Mnemonic[2]) {
1872 : default: break;
1873 : case 'a': // 1 string to match.
1874 12 : Mnemonic = "jbe"; // "jna"
1875 12 : return;
1876 : case 'b': // 1 string to match.
1877 12 : Mnemonic = "jae"; // "jnb"
1878 12 : return;
1879 : case 'c': // 1 string to match.
1880 12 : Mnemonic = "jae"; // "jnc"
1881 12 : return;
1882 : case 'g': // 1 string to match.
1883 12 : Mnemonic = "jle"; // "jng"
1884 12 : return;
1885 : case 'l': // 1 string to match.
1886 12 : Mnemonic = "jge"; // "jnl"
1887 12 : return;
1888 : case 'z': // 1 string to match.
1889 21 : Mnemonic = "jne"; // "jnz"
1890 21 : return;
1891 : }
1892 : break;
1893 24 : case 'p': // 2 strings to match.
1894 : switch (Mnemonic[2]) {
1895 : default: break;
1896 : case 'e': // 1 string to match.
1897 12 : Mnemonic = "jp"; // "jpe"
1898 12 : return;
1899 : case 'o': // 1 string to match.
1900 12 : Mnemonic = "jnp"; // "jpo"
1901 12 : return;
1902 : }
1903 : break;
1904 : }
1905 : break;
1906 45728 : case 4: // 8 strings to match.
1907 45728 : switch (Mnemonic[0]) {
1908 : default: break;
1909 107 : case 'j': // 4 strings to match.
1910 107 : if (Mnemonic[1] != 'n')
1911 : break;
1912 : switch (Mnemonic[2]) {
1913 : default: break;
1914 12 : case 'a': // 1 string to match.
1915 12 : if (Mnemonic[3] != 'e')
1916 : break;
1917 12 : Mnemonic = "jb"; // "jnae"
1918 12 : return;
1919 12 : case 'b': // 1 string to match.
1920 12 : if (Mnemonic[3] != 'e')
1921 : break;
1922 12 : Mnemonic = "ja"; // "jnbe"
1923 12 : return;
1924 12 : case 'g': // 1 string to match.
1925 12 : if (Mnemonic[3] != 'e')
1926 : break;
1927 12 : Mnemonic = "jl"; // "jnge"
1928 12 : return;
1929 12 : case 'l': // 1 string to match.
1930 12 : if (Mnemonic[3] != 'e')
1931 : break;
1932 12 : Mnemonic = "jg"; // "jnle"
1933 12 : return;
1934 : }
1935 : break;
1936 : case 'r': // 2 strings to match.
1937 3122 : if (memcmp(Mnemonic.data()+1, "ep", 2) != 0)
1938 : break;
1939 : switch (Mnemonic[3]) {
1940 : default: break;
1941 : case 'e': // 1 string to match.
1942 1 : Mnemonic = "rep"; // "repe"
1943 1 : return;
1944 : case 'z': // 1 string to match.
1945 1 : Mnemonic = "rep"; // "repz"
1946 1 : return;
1947 : }
1948 : break;
1949 : case 's': // 2 strings to match.
1950 4723 : if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1951 : break;
1952 : switch (Mnemonic[3]) {
1953 : default: break;
1954 : case 'c': // 1 string to match.
1955 6 : Mnemonic = "setb"; // "setc"
1956 6 : return;
1957 : case 'z': // 1 string to match.
1958 44 : Mnemonic = "sete"; // "setz"
1959 44 : return;
1960 : }
1961 : break;
1962 : }
1963 : break;
1964 15626 : case 5: // 11 strings to match.
1965 15626 : switch (Mnemonic[0]) {
1966 : default: break;
1967 : case 'f': // 1 string to match.
1968 1384 : if (memcmp(Mnemonic.data()+1, "wait", 4) != 0)
1969 : break;
1970 24 : Mnemonic = "wait"; // "fwait"
1971 24 : return;
1972 : case 'l': // 1 string to match.
1973 375 : if (memcmp(Mnemonic.data()+1, "oopz", 4) != 0)
1974 : break;
1975 11 : Mnemonic = "loope"; // "loopz"
1976 11 : return;
1977 : case 'r': // 1 string to match.
1978 256 : if (memcmp(Mnemonic.data()+1, "epnz", 4) != 0)
1979 : break;
1980 1 : Mnemonic = "repne"; // "repnz"
1981 1 : return;
1982 : case 's': // 8 strings to match.
1983 2716 : if (memcmp(Mnemonic.data()+1, "et", 2) != 0)
1984 : break;
1985 : switch (Mnemonic[3]) {
1986 : default: break;
1987 404 : case 'n': // 6 strings to match.
1988 : switch (Mnemonic[4]) {
1989 : default: break;
1990 : case 'a': // 1 string to match.
1991 23 : Mnemonic = "setbe"; // "setna"
1992 23 : return;
1993 : case 'b': // 1 string to match.
1994 45 : Mnemonic = "setae"; // "setnb"
1995 45 : return;
1996 : case 'c': // 1 string to match.
1997 3 : Mnemonic = "setae"; // "setnc"
1998 3 : return;
1999 : case 'g': // 1 string to match.
2000 23 : Mnemonic = "setle"; // "setng"
2001 23 : return;
2002 : case 'l': // 1 string to match.
2003 45 : Mnemonic = "setge"; // "setnl"
2004 45 : return;
2005 : case 'z': // 1 string to match.
2006 44 : Mnemonic = "setne"; // "setnz"
2007 44 : return;
2008 : }
2009 : break;
2010 6 : case 'p': // 2 strings to match.
2011 : switch (Mnemonic[4]) {
2012 : default: break;
2013 : case 'e': // 1 string to match.
2014 3 : Mnemonic = "setp"; // "setpe"
2015 3 : return;
2016 : case 'o': // 1 string to match.
2017 3 : Mnemonic = "setnp"; // "setpo"
2018 3 : return;
2019 : }
2020 : break;
2021 : }
2022 : break;
2023 : }
2024 : break;
2025 20642 : case 6: // 6 strings to match.
2026 20642 : switch (Mnemonic[0]) {
2027 : default: break;
2028 : case 'f': // 1 string to match.
2029 1604 : if (memcmp(Mnemonic.data()+1, "comip", 5) != 0)
2030 : break;
2031 14 : Mnemonic = "fcompi"; // "fcomip"
2032 14 : return;
2033 : case 'l': // 1 string to match.
2034 174 : if (memcmp(Mnemonic.data()+1, "oopnz", 5) != 0)
2035 : break;
2036 11 : Mnemonic = "loopne"; // "loopnz"
2037 11 : return;
2038 : case 's': // 4 strings to match.
2039 288 : if (memcmp(Mnemonic.data()+1, "etn", 3) != 0)
2040 : break;
2041 : switch (Mnemonic[4]) {
2042 : default: break;
2043 5 : case 'a': // 1 string to match.
2044 5 : if (Mnemonic[5] != 'e')
2045 : break;
2046 5 : Mnemonic = "setb"; // "setnae"
2047 5 : return;
2048 25 : case 'b': // 1 string to match.
2049 25 : if (Mnemonic[5] != 'e')
2050 : break;
2051 25 : Mnemonic = "seta"; // "setnbe"
2052 25 : return;
2053 3 : case 'g': // 1 string to match.
2054 3 : if (Mnemonic[5] != 'e')
2055 : break;
2056 3 : Mnemonic = "setl"; // "setnge"
2057 3 : return;
2058 25 : case 'l': // 1 string to match.
2059 25 : if (Mnemonic[5] != 'e')
2060 : break;
2061 25 : Mnemonic = "setg"; // "setnle"
2062 25 : return;
2063 : }
2064 : break;
2065 : }
2066 : break;
2067 : case 7: // 1 string to match.
2068 17839 : if (memcmp(Mnemonic.data()+0, "fucomip", 7) != 0)
2069 : break;
2070 14 : Mnemonic = "fucompi"; // "fucomip"
2071 14 : return;
2072 : }
2073 : }
2074 :
2075 : enum {
2076 : Tie0_1_1,
2077 : Tie0_2_2,
2078 : Tie0_3_3,
2079 : Tie0_4_4,
2080 : Tie1_1_1,
2081 : Tie1_2_2,
2082 : Tie1_3_3,
2083 : Tie1_4_4,
2084 : };
2085 :
2086 : static const uint8_t TiedAsmOperandTable[][3] = {
2087 : /* Tie0_1_1 */ { 0, 1, 1 },
2088 : /* Tie0_2_2 */ { 0, 2, 2 },
2089 : /* Tie0_3_3 */ { 0, 3, 3 },
2090 : /* Tie0_4_4 */ { 0, 4, 4 },
2091 : /* Tie1_1_1 */ { 1, 1, 1 },
2092 : /* Tie1_2_2 */ { 1, 2, 2 },
2093 : /* Tie1_3_3 */ { 1, 3, 3 },
2094 : /* Tie1_4_4 */ { 1, 4, 4 },
2095 : };
2096 :
2097 : namespace {
2098 : enum OperatorConversionKind {
2099 : CVT_Done,
2100 : CVT_Reg,
2101 : CVT_Tied,
2102 : CVT_imm_95_10,
2103 : CVT_95_addImmOperands,
2104 : CVT_regAX,
2105 : CVT_regEAX,
2106 : CVT_regRAX,
2107 : CVT_95_Reg,
2108 : CVT_95_addMemOperands,
2109 : CVT_95_addAbsMemOperands,
2110 : CVT_95_addDstIdxOperands,
2111 : CVT_95_addSrcIdxOperands,
2112 : CVT_95_addGR32orGR64Operands,
2113 : CVT_regST1,
2114 : CVT_regST0,
2115 : CVT_95_addMemOffsOperands,
2116 : CVT_imm_95_17,
2117 : CVT_imm_95_1,
2118 : CVT_imm_95_16,
2119 : CVT_imm_95_0,
2120 : CVT_95_addAVX512RCOperands,
2121 : CVT_NUM_CONVERTERS
2122 : };
2123 :
2124 : enum InstructionConversionKind {
2125 : Convert_NoOperands,
2126 : Convert__imm_95_10,
2127 : Convert__Imm1_0,
2128 : Convert__Imm1_1,
2129 : Convert__regAX__Tie0_1_1__ImmSExti16i81_1,
2130 : Convert__regEAX__Tie0_1_1__ImmSExti32i81_1,
2131 : Convert__regRAX__Tie0_1_1__ImmSExti64i81_1,
2132 : Convert__ImmSExti64i321_1,
2133 : Convert__Reg1_0__Tie0_1_1__Reg1_1,
2134 : Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1,
2135 : Convert__Reg1_0__Tie0_1_1__Imm1_1,
2136 : Convert__Reg1_0__Tie0_1_1__Mem165_1,
2137 : Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1,
2138 : Convert__Reg1_0__Tie0_1_1__Mem325_1,
2139 : Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1,
2140 : Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1,
2141 : Convert__Reg1_0__Tie0_1_1__Mem645_1,
2142 : Convert__Reg1_0__Tie0_1_1__Mem85_1,
2143 : Convert__Mem165_0__Reg1_1,
2144 : Convert__Mem165_0__ImmSExti16i81_1,
2145 : Convert__Mem165_0__Imm1_1,
2146 : Convert__Mem325_0__Reg1_1,
2147 : Convert__Mem325_0__ImmSExti32i81_1,
2148 : Convert__Mem325_0__Imm1_1,
2149 : Convert__Mem645_0__Reg1_1,
2150 : Convert__Mem645_0__ImmSExti64i81_1,
2151 : Convert__Mem645_0__ImmSExti64i321_1,
2152 : Convert__Mem85_0__Reg1_1,
2153 : Convert__Mem85_0__Imm1_1,
2154 : Convert__Reg1_1__Tie0_2_2__Reg1_0,
2155 : Convert__Mem85_1__Reg1_0,
2156 : Convert__Reg1_1__Tie0_2_2__Imm1_0,
2157 : Convert__Mem85_1__Imm1_0,
2158 : Convert__Reg1_1__Tie0_2_2__Mem85_0,
2159 : Convert__Mem325_1__Reg1_0,
2160 : Convert__regEAX__Tie0_1_1__ImmSExti32i81_0,
2161 : Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0,
2162 : Convert__Mem325_1__ImmSExti32i81_0,
2163 : Convert__Mem325_1__Imm1_0,
2164 : Convert__Reg1_1__Tie0_2_2__Mem325_0,
2165 : Convert__Mem645_1__Reg1_0,
2166 : Convert__regRAX__Tie0_1_1__ImmSExti64i81_0,
2167 : Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0,
2168 : Convert__Mem645_1__ImmSExti64i81_0,
2169 : Convert__ImmSExti64i321_0,
2170 : Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0,
2171 : Convert__Mem645_1__ImmSExti64i321_0,
2172 : Convert__Reg1_1__Tie0_2_2__Mem645_0,
2173 : Convert__Mem165_1__Reg1_0,
2174 : Convert__regAX__Tie0_1_1__ImmSExti16i81_0,
2175 : Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0,
2176 : Convert__Mem165_1__ImmSExti16i81_0,
2177 : Convert__Mem165_1__Imm1_0,
2178 : Convert__Reg1_1__Tie0_2_2__Mem165_0,
2179 : Convert__Reg1_1__Tie0_1_1__Reg1_0,
2180 : Convert__Reg1_1__Tie0_1_1__Mem325_0,
2181 : Convert__Reg1_1__Tie0_1_1__Mem645_0,
2182 : Convert__Reg1_0__Tie0_1_1__Mem1285_1,
2183 : Convert__Reg1_1__Tie0_1_1__Mem1285_0,
2184 : Convert__Reg1_1__Reg1_0,
2185 : Convert__Reg1_0__Reg1_1,
2186 : Convert__Reg1_0__Mem1285_1,
2187 : Convert__Reg1_1__Mem1285_0,
2188 : Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2,
2189 : Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2,
2190 : Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2191 : Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2192 : Convert__Reg1_0__Reg1_1__Reg1_2,
2193 : Convert__Reg1_0__Reg1_1__Mem325_2,
2194 : Convert__Reg1_0__Reg1_1__Mem645_2,
2195 : Convert__Reg1_2__Reg1_1__Reg1_0,
2196 : Convert__Reg1_2__Reg1_1__Mem325_0,
2197 : Convert__Reg1_2__Reg1_1__Mem645_0,
2198 : Convert__Reg1_0__Reg1_1__Imm1_2,
2199 : Convert__Reg1_0__Mem325_1__Reg1_2,
2200 : Convert__Reg1_0__Mem325_1__Imm1_2,
2201 : Convert__Reg1_0__Reg1_1__ImmSExti64i321_2,
2202 : Convert__Reg1_0__Mem645_1__Reg1_2,
2203 : Convert__Reg1_0__Mem645_1__ImmSExti64i321_2,
2204 : Convert__Reg1_2__Mem325_1__Reg1_0,
2205 : Convert__Reg1_2__Reg1_1__Imm1_0,
2206 : Convert__Reg1_2__Mem325_1__Imm1_0,
2207 : Convert__Reg1_2__Mem645_1__Reg1_0,
2208 : Convert__Reg1_2__Reg1_1__ImmSExti64i321_0,
2209 : Convert__Reg1_2__Mem645_1__ImmSExti64i321_0,
2210 : Convert__Reg1_0__Mem325_1,
2211 : Convert__Reg1_0__Mem645_1,
2212 : Convert__Reg1_1__Mem325_0,
2213 : Convert__Reg1_1__Mem645_0,
2214 : Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2,
2215 : Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2,
2216 : Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0,
2217 : Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0,
2218 : Convert__Reg1_1__Tie0_2_2__Mem1285_0,
2219 : Convert__Reg1_2__Tie0_1_1__Reg1_1,
2220 : Convert__Reg1_2__Tie0_1_1__Mem1285_1,
2221 : Convert__Reg1_0__Mem5_1,
2222 : Convert__Reg1_1__Mem5_0,
2223 : Convert__Mem1285_1__Reg1_0,
2224 : Convert__Mem1285_0__Reg1_1,
2225 : Convert__Mem5_1__Reg1_0,
2226 : Convert__Mem5_0__Reg1_1,
2227 : Convert__Reg1_0__Mem165_1,
2228 : Convert__Reg1_1__Mem165_0,
2229 : Convert__Reg1_0__Tie0_1_1,
2230 : Convert__Reg1_0__ImmSExti16i81_1,
2231 : Convert__Reg1_0__ImmSExti32i81_1,
2232 : Convert__Reg1_0__ImmSExti64i81_1,
2233 : Convert__Reg1_1__ImmSExti32i81_0,
2234 : Convert__Reg1_1__ImmSExti64i81_0,
2235 : Convert__Reg1_1__ImmSExti16i81_0,
2236 : Convert__Reg1_0,
2237 : Convert__AbsMem1_0,
2238 : Convert__Mem165_0,
2239 : Convert__Mem325_0,
2240 : Convert__Mem645_0,
2241 : Convert__Mem5_0,
2242 : Convert__Imm1_1__Imm1_0,
2243 : Convert__Reg1_1,
2244 : Convert__Mem325_1,
2245 : Convert__Mem645_1,
2246 : Convert__Mem165_1,
2247 : Convert__Mem85_0,
2248 : Convert__Reg1_0__Tie0_1_1__Reg1_0,
2249 : Convert__Reg1_1__Tie0_1_1__Mem165_0,
2250 : Convert__regAX__ImmSExti16i81_1,
2251 : Convert__regEAX__ImmSExti32i81_1,
2252 : Convert__regRAX__ImmSExti64i81_1,
2253 : Convert__Reg1_0__Imm1_1,
2254 : Convert__Reg1_0__ImmSExti64i321_1,
2255 : Convert__Reg1_0__Mem85_1,
2256 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0,
2257 : Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0,
2258 : Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0,
2259 : Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0,
2260 : Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0,
2261 : Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0,
2262 : Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0,
2263 : Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0,
2264 : Convert__Reg1_1__Imm1_0,
2265 : Convert__Reg1_1__Mem85_0,
2266 : Convert__regEAX__ImmSExti32i81_0,
2267 : Convert__regRAX__ImmSExti64i81_0,
2268 : Convert__Reg1_1__ImmSExti64i321_0,
2269 : Convert__DstIdx161_1__SrcIdx162_0,
2270 : Convert__DstIdx321_1__SrcIdx322_0,
2271 : Convert__DstIdx641_1__SrcIdx642_0,
2272 : Convert__DstIdx81_1__SrcIdx82_0,
2273 : Convert__DstIdx81_0__SrcIdx82_1,
2274 : Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2,
2275 : Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0,
2276 : Convert__DstIdx321_0__SrcIdx322_1,
2277 : Convert__DstIdx641_0__SrcIdx642_1,
2278 : Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2,
2279 : Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0,
2280 : Convert__DstIdx161_0__SrcIdx162_1,
2281 : Convert__regAX__ImmSExti16i81_0,
2282 : Convert__Mem1285_0,
2283 : Convert__Mem85_1,
2284 : Convert__Imm1_0__Imm1_1,
2285 : Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0,
2286 : Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0,
2287 : Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2,
2288 : Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2,
2289 : Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2,
2290 : Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0,
2291 : Convert__regST1,
2292 : Convert__regST0,
2293 : Convert__Mem805_0,
2294 : Convert__Reg1_0__Reg1_0__ImmSExti16i81_1,
2295 : Convert__Reg1_0__Reg1_0__Imm1_1,
2296 : Convert__Reg1_0__Reg1_0__ImmSExti32i81_1,
2297 : Convert__Reg1_0__Reg1_0__ImmSExti64i81_1,
2298 : Convert__Reg1_0__Reg1_0__ImmSExti64i321_1,
2299 : Convert__Reg1_0__Reg1_1__ImmSExti16i81_2,
2300 : Convert__Reg1_0__Mem165_1__ImmSExti16i81_2,
2301 : Convert__Reg1_0__Mem165_1__Imm1_2,
2302 : Convert__Reg1_0__Reg1_1__ImmSExti32i81_2,
2303 : Convert__Reg1_0__Mem325_1__ImmSExti32i81_2,
2304 : Convert__Reg1_0__Reg1_1__ImmSExti64i81_2,
2305 : Convert__Reg1_0__Mem645_1__ImmSExti64i81_2,
2306 : Convert__Reg1_1__Reg1_1__ImmSExti32i81_0,
2307 : Convert__Reg1_1__Reg1_1__Imm1_0,
2308 : Convert__Reg1_2__Reg1_1__ImmSExti32i81_0,
2309 : Convert__Reg1_2__Mem325_1__ImmSExti32i81_0,
2310 : Convert__Reg1_1__Reg1_1__ImmSExti64i81_0,
2311 : Convert__Reg1_1__Reg1_1__ImmSExti64i321_0,
2312 : Convert__Reg1_2__Reg1_1__ImmSExti64i81_0,
2313 : Convert__Reg1_2__Mem645_1__ImmSExti64i81_0,
2314 : Convert__Reg1_1__Reg1_1__ImmSExti16i81_0,
2315 : Convert__Reg1_2__Reg1_1__ImmSExti16i81_0,
2316 : Convert__Reg1_2__Mem165_1__ImmSExti16i81_0,
2317 : Convert__Reg1_2__Mem165_1__Imm1_0,
2318 : Convert__ImmUnsignedi81_1,
2319 : Convert__ImmUnsignedi81_0,
2320 : Convert__DstIdx161_0,
2321 : Convert__DstIdx321_0,
2322 : Convert__DstIdx81_0,
2323 : Convert__DstIdx81_1,
2324 : Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3,
2325 : Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0,
2326 : Convert__DstIdx321_1,
2327 : Convert__DstIdx161_1,
2328 : Convert__Mem5_1,
2329 : Convert__SrcIdx162_0,
2330 : Convert__SrcIdx322_0,
2331 : Convert__SrcIdx642_0,
2332 : Convert__SrcIdx82_0,
2333 : Convert__SrcIdx82_1,
2334 : Convert__SrcIdx162_1,
2335 : Convert__SrcIdx322_1,
2336 : Convert__SrcIdx642_1,
2337 : Convert__MemOffs16_82_1,
2338 : Convert__MemOffs32_82_1,
2339 : Convert__MemOffs16_162_1,
2340 : Convert__MemOffs32_162_1,
2341 : Convert__MemOffs16_322_1,
2342 : Convert__MemOffs32_322_1,
2343 : Convert__MemOffs32_642_1,
2344 : Convert__MemOffs16_162_0,
2345 : Convert__MemOffs16_322_0,
2346 : Convert__MemOffs16_82_0,
2347 : Convert__MemOffs32_162_0,
2348 : Convert__MemOffs32_322_0,
2349 : Convert__MemOffs32_642_0,
2350 : Convert__MemOffs32_82_0,
2351 : Convert__MemOffs64_82_1,
2352 : Convert__MemOffs64_162_1,
2353 : Convert__MemOffs64_322_1,
2354 : Convert__MemOffs64_642_1,
2355 : Convert__MemOffs64_162_0,
2356 : Convert__MemOffs64_322_0,
2357 : Convert__MemOffs64_642_0,
2358 : Convert__MemOffs64_82_0,
2359 : Convert__Reg1_0__Mem5125_1,
2360 : Convert__Reg1_1__Mem5125_0,
2361 : Convert__GR32orGR641_1__Reg1_0,
2362 : Convert__GR32orGR641_0__Reg1_1,
2363 : Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17,
2364 : Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17,
2365 : Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17,
2366 : Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17,
2367 : Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1,
2368 : Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1,
2369 : Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1,
2370 : Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1,
2371 : Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16,
2372 : Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16,
2373 : Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16,
2374 : Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16,
2375 : Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0,
2376 : Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0,
2377 : Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0,
2378 : Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0,
2379 : Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0,
2380 : Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2,
2381 : Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0,
2382 : Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2,
2383 : Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0,
2384 : Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2,
2385 : Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2,
2386 : Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2,
2387 : Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0,
2388 : Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0,
2389 : Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2,
2390 : Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0,
2391 : Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2,
2392 : Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2393 : Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1,
2394 : Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0,
2395 : Convert__ImmSExti64i81_0,
2396 : Convert__ImmSExti16i81_0,
2397 : Convert__ImmSExti32i81_0,
2398 : Convert__Mem165_0__ImmUnsignedi81_1,
2399 : Convert__Mem325_0__ImmUnsignedi81_1,
2400 : Convert__Mem645_0__ImmUnsignedi81_1,
2401 : Convert__Mem85_0__ImmUnsignedi81_1,
2402 : Convert__Reg1_1__Tie0_1_1,
2403 : Convert__Mem85_1__ImmUnsignedi81_0,
2404 : Convert__Mem325_1__ImmUnsignedi81_0,
2405 : Convert__Mem645_1__ImmUnsignedi81_0,
2406 : Convert__Mem165_1__ImmUnsignedi81_0,
2407 : Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2,
2408 : Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2409 : Convert__DstIdx641_0,
2410 : Convert__DstIdx641_1,
2411 : Convert__Mem325_2__Reg1_1,
2412 : Convert__Mem645_2__Reg1_1,
2413 : Convert__Mem165_2__Reg1_1,
2414 : Convert__GR32orGR641_0,
2415 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2,
2416 : Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0,
2417 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5,
2418 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0,
2419 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6,
2420 : Convert__Reg1_0__Reg1_1__Mem1285_2,
2421 : Convert__Reg1_0__Reg1_1__Mem2565_2,
2422 : Convert__Reg1_0__Reg1_1__Mem5125_2,
2423 : Convert__Reg1_2__Reg1_1__Mem1285_0,
2424 : Convert__Reg1_2__Reg1_1__Mem2565_0,
2425 : Convert__Reg1_2__Reg1_1__Mem5125_0,
2426 : Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3,
2427 : Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0,
2428 : Convert__Reg1_3__Reg1_2__Mem645_0,
2429 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5,
2430 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0,
2431 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5,
2432 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5,
2433 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0,
2434 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0,
2435 : Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6,
2436 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6,
2437 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5,
2438 : Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0,
2439 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6,
2440 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6,
2441 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6,
2442 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2443 : Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0,
2444 : Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0,
2445 : Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0,
2446 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0,
2447 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6,
2448 : Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2449 : Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0,
2450 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0,
2451 : Convert__Reg1_3__Reg1_2__Mem325_0,
2452 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5,
2453 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0,
2454 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6,
2455 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0,
2456 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0,
2457 : Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0,
2458 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0,
2459 : Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0,
2460 : Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2461 : Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2462 : Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2463 : Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2464 : Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2465 : Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2466 : Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2467 : Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2468 : Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2469 : Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2470 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2471 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2472 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2473 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2474 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2475 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2476 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2477 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2478 : Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2479 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2480 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2481 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2482 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2483 : Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2484 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2485 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2486 : Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2487 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2488 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2489 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2490 : Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2491 : Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2492 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2493 : Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2494 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2495 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2496 : Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5,
2497 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5,
2498 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5,
2499 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5,
2500 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5,
2501 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5,
2502 : Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0,
2503 : Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3,
2504 : Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3,
2505 : Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0,
2506 : Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3,
2507 : Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0,
2508 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0,
2509 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4,
2510 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4,
2511 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0,
2512 : Convert__Reg1_1__Reg1_3__Reg1_0,
2513 : Convert__Reg1_0__Reg1_2__Reg1_5,
2514 : Convert__Reg1_0__Reg1_2__Mem645_5,
2515 : Convert__Reg1_1__Reg1_3__Mem645_0,
2516 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4,
2517 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0,
2518 : Convert__Reg1_0__Reg1_2__Mem1285_5,
2519 : Convert__Reg1_1__Reg1_3__Mem1285_0,
2520 : Convert__Reg1_0__Mem2565_1,
2521 : Convert__Reg1_1__Mem2565_0,
2522 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4,
2523 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0,
2524 : Convert__Reg1_0__Reg1_2__Mem2565_5,
2525 : Convert__Reg1_1__Reg1_3__Mem2565_0,
2526 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4,
2527 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0,
2528 : Convert__Reg1_0__Reg1_2__Mem325_5,
2529 : Convert__Reg1_1__Reg1_3__Mem325_0,
2530 : Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0,
2531 : Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0,
2532 : Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0,
2533 : Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0,
2534 : Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0,
2535 : Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0,
2536 : Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0,
2537 : Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0,
2538 : Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0,
2539 : Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0,
2540 : Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0,
2541 : Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0,
2542 : Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0,
2543 : Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0,
2544 : Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0,
2545 : Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0,
2546 : Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0,
2547 : Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0,
2548 : Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0,
2549 : Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0,
2550 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0,
2551 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0,
2552 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0,
2553 : Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0,
2554 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0,
2555 : Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0,
2556 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0,
2557 : Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0,
2558 : Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0,
2559 : Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0,
2560 : Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2561 : Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2562 : Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6,
2563 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6,
2564 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6,
2565 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6,
2566 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7,
2567 : Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2568 : Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2569 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7,
2570 : Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2571 : Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2572 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2573 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2574 : Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2575 : Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2576 : Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2577 : Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2578 : Convert__Reg1_2__Reg1_1,
2579 : Convert__Mem2565_1__Reg1_0,
2580 : Convert__Mem5125_1__Reg1_0,
2581 : Convert__Mem2565_0__Reg1_1,
2582 : Convert__Mem5125_0__Reg1_1,
2583 : Convert__Mem1285_1__Reg1_3__Reg1_0,
2584 : Convert__Mem2565_1__Reg1_3__Reg1_0,
2585 : Convert__Mem5125_1__Reg1_3__Reg1_0,
2586 : Convert__Mem1285_0__Reg1_2__Reg1_4,
2587 : Convert__Mem2565_0__Reg1_2__Reg1_4,
2588 : Convert__Mem5125_0__Reg1_2__Reg1_4,
2589 : Convert__Reg1_2__Mem325_0,
2590 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0,
2591 : Convert__Reg1_2__Reg1_4__Mem325_0,
2592 : Convert__Reg1_0__Reg1_1__AVX512RC1_2,
2593 : Convert__Reg1_2__Reg1_1__AVX512RC1_0,
2594 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4,
2595 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0,
2596 : Convert__Reg1_0__Reg1_2__Mem5125_5,
2597 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5,
2598 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0,
2599 : Convert__Reg1_1__Reg1_3__Mem5125_0,
2600 : Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6,
2601 : Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0,
2602 : Convert__Reg1_2__Mem645_0,
2603 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0,
2604 : Convert__Reg1_2__Reg1_4__Mem645_0,
2605 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1,
2606 : Convert__Reg1_2__Reg1_4__Reg1_1,
2607 : Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2608 : Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2609 : Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2,
2610 : Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2,
2611 : Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3,
2612 : Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2613 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2614 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2615 : Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2616 : Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2617 : Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2618 : Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2619 : Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2620 : Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2621 : Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6,
2622 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6,
2623 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2624 : Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0,
2625 : Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7,
2626 : Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0,
2627 : Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2,
2628 : Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1,
2629 : Convert__Reg1_3__Reg1_2__Reg1_1,
2630 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1,
2631 : Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1,
2632 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3,
2633 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3,
2634 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3,
2635 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3,
2636 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2637 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2638 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2639 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2640 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4,
2641 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4,
2642 : Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2643 : Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2644 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7,
2645 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7,
2646 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7,
2647 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7,
2648 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7,
2649 : Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0,
2650 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8,
2651 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2652 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4,
2653 : Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2654 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8,
2655 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3,
2656 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2657 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6,
2658 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0,
2659 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2660 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3,
2661 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2662 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6,
2663 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0,
2664 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2665 : Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0,
2666 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2,
2667 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2,
2668 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2,
2669 : Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0,
2670 : Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0,
2671 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2,
2672 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3,
2673 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0,
2674 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0,
2675 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6,
2676 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6,
2677 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6,
2678 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6,
2679 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7,
2680 : Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2,
2681 : Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0,
2682 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6,
2683 : Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0,
2684 : Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0,
2685 : Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3,
2686 : Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3,
2687 : Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0,
2688 : Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0,
2689 : Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3,
2690 : Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3,
2691 : Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0,
2692 : Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0,
2693 : Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3,
2694 : Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3,
2695 : Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0,
2696 : Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0,
2697 : Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2,
2698 : Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2,
2699 : Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3,
2700 : Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5,
2701 : Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2702 : Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2703 : Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2704 : Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2705 : Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0,
2706 : Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2707 : Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2708 : Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2709 : Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2710 : Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0,
2711 : Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2712 : Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3,
2713 : Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2714 : Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0,
2715 : Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2716 : Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5,
2717 : Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0,
2718 : Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5,
2719 : Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0,
2720 : Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1,
2721 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3,
2722 : Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1,
2723 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3,
2724 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4,
2725 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4,
2726 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4,
2727 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0,
2728 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0,
2729 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0,
2730 : Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1,
2731 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3,
2732 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4,
2733 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4,
2734 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0,
2735 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0,
2736 : Convert__Reg1_1__Mem512_RC256X5_3,
2737 : Convert__Reg1_2__Mem512_RC256X5_0,
2738 : Convert__Reg1_1__Mem512_RC5125_3,
2739 : Convert__Reg1_2__Mem512_RC5125_0,
2740 : Convert__Reg1_1__Mem256_RC5125_3,
2741 : Convert__Reg1_2__Mem256_RC5125_0,
2742 : Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1,
2743 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3,
2744 : Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1,
2745 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3,
2746 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4,
2747 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4,
2748 : Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4,
2749 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0,
2750 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0,
2751 : Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0,
2752 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5,
2753 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5,
2754 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5,
2755 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0,
2756 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0,
2757 : Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0,
2758 : Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6,
2759 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6,
2760 : Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6,
2761 : Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6,
2762 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0,
2763 : Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7,
2764 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6,
2765 : Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0,
2766 : Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7,
2767 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7,
2768 : Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8,
2769 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7,
2770 : Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4,
2771 : Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2772 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7,
2773 : Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2774 : Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8,
2775 : Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0,
2776 : Convert__Mem1285_2__Reg1_1__Reg1_0,
2777 : Convert__Mem2565_2__Reg1_1__Reg1_0,
2778 : Convert__Mem1285_0__Reg1_1__Reg1_2,
2779 : Convert__Mem2565_0__Reg1_1__Reg1_2,
2780 : Convert__Reg1_0__Reg1_2__Reg1_4,
2781 : Convert__Mem645_1__Reg1_3__Reg1_0,
2782 : Convert__Mem645_0__Reg1_2__Reg1_4,
2783 : Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0,
2784 : Convert__Mem325_1__Reg1_3__Reg1_0,
2785 : Convert__Mem325_0__Reg1_2__Reg1_4,
2786 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4,
2787 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0,
2788 : Convert__Reg1_0__Reg1_2__Mem85_5,
2789 : Convert__Reg1_1__Reg1_3__Mem85_0,
2790 : Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4,
2791 : Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0,
2792 : Convert__Reg1_0__Reg1_2__Mem165_5,
2793 : Convert__Reg1_1__Reg1_3__Mem165_0,
2794 : Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17,
2795 : Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17,
2796 : Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17,
2797 : Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17,
2798 : Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17,
2799 : Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17,
2800 : Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17,
2801 : Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17,
2802 : Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1,
2803 : Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1,
2804 : Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1,
2805 : Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1,
2806 : Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1,
2807 : Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1,
2808 : Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1,
2809 : Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1,
2810 : Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16,
2811 : Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16,
2812 : Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16,
2813 : Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16,
2814 : Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16,
2815 : Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16,
2816 : Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16,
2817 : Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16,
2818 : Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0,
2819 : Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0,
2820 : Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0,
2821 : Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0,
2822 : Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0,
2823 : Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0,
2824 : Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0,
2825 : Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0,
2826 : Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4,
2827 : Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4,
2828 : Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4,
2829 : Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4,
2830 : Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4,
2831 : Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0,
2832 : Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0,
2833 : Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0,
2834 : Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0,
2835 : Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0,
2836 : Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3,
2837 : Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3,
2838 : Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0,
2839 : Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0,
2840 : Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3,
2841 : Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0,
2842 : Convert__Mem165_1__Reg1_3__Reg1_0,
2843 : Convert__Mem165_0__Reg1_2__Reg1_4,
2844 : Convert__Reg1_2__Mem1285_1__Reg1_0,
2845 : Convert__Reg1_0__Mem1285_1__Reg1_2,
2846 : Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0,
2847 : Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0,
2848 : Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0,
2849 : Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4,
2850 : Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4,
2851 : Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4,
2852 : Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0,
2853 : Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0,
2854 : Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4,
2855 : Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4,
2856 : Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0,
2857 : Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0,
2858 : Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0,
2859 : Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4,
2860 : Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4,
2861 : Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4,
2862 : Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2,
2863 : Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1,
2864 : Convert__AbsMem161_0,
2865 : Convert__Reg1_1__Tie0_2_2,
2866 : Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1,
2867 : CVT_NUM_SIGNATURES
2868 : };
2869 :
2870 : } // end anonymous namespace
2871 :
2872 : static const uint8_t ConversionTable[CVT_NUM_SIGNATURES][13] = {
2873 : // Convert_NoOperands
2874 : { CVT_Done },
2875 : // Convert__imm_95_10
2876 : { CVT_imm_95_10, 0, CVT_Done },
2877 : // Convert__Imm1_0
2878 : { CVT_95_addImmOperands, 1, CVT_Done },
2879 : // Convert__Imm1_1
2880 : { CVT_95_addImmOperands, 2, CVT_Done },
2881 : // Convert__regAX__Tie0_1_1__ImmSExti16i81_1
2882 : { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2883 : // Convert__regEAX__Tie0_1_1__ImmSExti32i81_1
2884 : { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2885 : // Convert__regRAX__Tie0_1_1__ImmSExti64i81_1
2886 : { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2887 : // Convert__ImmSExti64i321_1
2888 : { CVT_95_addImmOperands, 2, CVT_Done },
2889 : // Convert__Reg1_0__Tie0_1_1__Reg1_1
2890 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
2891 : // Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1
2892 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2893 : // Convert__Reg1_0__Tie0_1_1__Imm1_1
2894 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2895 : // Convert__Reg1_0__Tie0_1_1__Mem165_1
2896 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2897 : // Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1
2898 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2899 : // Convert__Reg1_0__Tie0_1_1__Mem325_1
2900 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2901 : // Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1
2902 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2903 : // Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1
2904 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
2905 : // Convert__Reg1_0__Tie0_1_1__Mem645_1
2906 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2907 : // Convert__Reg1_0__Tie0_1_1__Mem85_1
2908 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2909 : // Convert__Mem165_0__Reg1_1
2910 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2911 : // Convert__Mem165_0__ImmSExti16i81_1
2912 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2913 : // Convert__Mem165_0__Imm1_1
2914 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2915 : // Convert__Mem325_0__Reg1_1
2916 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2917 : // Convert__Mem325_0__ImmSExti32i81_1
2918 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2919 : // Convert__Mem325_0__Imm1_1
2920 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2921 : // Convert__Mem645_0__Reg1_1
2922 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2923 : // Convert__Mem645_0__ImmSExti64i81_1
2924 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2925 : // Convert__Mem645_0__ImmSExti64i321_1
2926 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2927 : // Convert__Mem85_0__Reg1_1
2928 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
2929 : // Convert__Mem85_0__Imm1_1
2930 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
2931 : // Convert__Reg1_1__Tie0_2_2__Reg1_0
2932 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_Done },
2933 : // Convert__Mem85_1__Reg1_0
2934 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2935 : // Convert__Reg1_1__Tie0_2_2__Imm1_0
2936 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2937 : // Convert__Mem85_1__Imm1_0
2938 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2939 : // Convert__Reg1_1__Tie0_2_2__Mem85_0
2940 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2941 : // Convert__Mem325_1__Reg1_0
2942 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2943 : // Convert__regEAX__Tie0_1_1__ImmSExti32i81_0
2944 : { CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
2945 : // Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0
2946 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2947 : // Convert__Mem325_1__ImmSExti32i81_0
2948 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2949 : // Convert__Mem325_1__Imm1_0
2950 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2951 : // Convert__Reg1_1__Tie0_2_2__Mem325_0
2952 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2953 : // Convert__Mem645_1__Reg1_0
2954 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2955 : // Convert__regRAX__Tie0_1_1__ImmSExti64i81_0
2956 : { CVT_regRAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
2957 : // Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0
2958 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2959 : // Convert__Mem645_1__ImmSExti64i81_0
2960 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2961 : // Convert__ImmSExti64i321_0
2962 : { CVT_95_addImmOperands, 1, CVT_Done },
2963 : // Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0
2964 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2965 : // Convert__Mem645_1__ImmSExti64i321_0
2966 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2967 : // Convert__Reg1_1__Tie0_2_2__Mem645_0
2968 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2969 : // Convert__Mem165_1__Reg1_0
2970 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
2971 : // Convert__regAX__Tie0_1_1__ImmSExti16i81_0
2972 : { CVT_regAX, 0, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
2973 : // Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0
2974 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addImmOperands, 1, CVT_Done },
2975 : // Convert__Mem165_1__ImmSExti16i81_0
2976 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2977 : // Convert__Mem165_1__Imm1_0
2978 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
2979 : // Convert__Reg1_1__Tie0_2_2__Mem165_0
2980 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
2981 : // Convert__Reg1_1__Tie0_1_1__Reg1_0
2982 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
2983 : // Convert__Reg1_1__Tie0_1_1__Mem325_0
2984 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
2985 : // Convert__Reg1_1__Tie0_1_1__Mem645_0
2986 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
2987 : // Convert__Reg1_0__Tie0_1_1__Mem1285_1
2988 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
2989 : // Convert__Reg1_1__Tie0_1_1__Mem1285_0
2990 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
2991 : // Convert__Reg1_1__Reg1_0
2992 : { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
2993 : // Convert__Reg1_0__Reg1_1
2994 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Done },
2995 : // Convert__Reg1_0__Mem1285_1
2996 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
2997 : // Convert__Reg1_1__Mem1285_0
2998 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
2999 : // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2
3000 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3001 : // Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2
3002 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3003 : // Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0
3004 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3005 : // Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3006 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3007 : // Convert__Reg1_0__Reg1_1__Reg1_2
3008 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3009 : // Convert__Reg1_0__Reg1_1__Mem325_2
3010 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3011 : // Convert__Reg1_0__Reg1_1__Mem645_2
3012 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3013 : // Convert__Reg1_2__Reg1_1__Reg1_0
3014 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3015 : // Convert__Reg1_2__Reg1_1__Mem325_0
3016 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3017 : // Convert__Reg1_2__Reg1_1__Mem645_0
3018 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3019 : // Convert__Reg1_0__Reg1_1__Imm1_2
3020 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3021 : // Convert__Reg1_0__Mem325_1__Reg1_2
3022 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
3023 : // Convert__Reg1_0__Mem325_1__Imm1_2
3024 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3025 : // Convert__Reg1_0__Reg1_1__ImmSExti64i321_2
3026 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3027 : // Convert__Reg1_0__Mem645_1__Reg1_2
3028 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
3029 : // Convert__Reg1_0__Mem645_1__ImmSExti64i321_2
3030 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3031 : // Convert__Reg1_2__Mem325_1__Reg1_0
3032 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3033 : // Convert__Reg1_2__Reg1_1__Imm1_0
3034 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3035 : // Convert__Reg1_2__Mem325_1__Imm1_0
3036 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3037 : // Convert__Reg1_2__Mem645_1__Reg1_0
3038 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3039 : // Convert__Reg1_2__Reg1_1__ImmSExti64i321_0
3040 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3041 : // Convert__Reg1_2__Mem645_1__ImmSExti64i321_0
3042 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3043 : // Convert__Reg1_0__Mem325_1
3044 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3045 : // Convert__Reg1_0__Mem645_1
3046 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3047 : // Convert__Reg1_1__Mem325_0
3048 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3049 : // Convert__Reg1_1__Mem645_0
3050 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3051 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2
3052 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3053 : // Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2
3054 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3055 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0
3056 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3057 : // Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0
3058 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3059 : // Convert__Reg1_1__Tie0_2_2__Mem1285_0
3060 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_Done },
3061 : // Convert__Reg1_2__Tie0_1_1__Reg1_1
3062 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_Done },
3063 : // Convert__Reg1_2__Tie0_1_1__Mem1285_1
3064 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Done },
3065 : // Convert__Reg1_0__Mem5_1
3066 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3067 : // Convert__Reg1_1__Mem5_0
3068 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3069 : // Convert__Mem1285_1__Reg1_0
3070 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3071 : // Convert__Mem1285_0__Reg1_1
3072 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3073 : // Convert__Mem5_1__Reg1_0
3074 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3075 : // Convert__Mem5_0__Reg1_1
3076 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3077 : // Convert__Reg1_0__Mem165_1
3078 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3079 : // Convert__Reg1_1__Mem165_0
3080 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3081 : // Convert__Reg1_0__Tie0_1_1
3082 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_Done },
3083 : // Convert__Reg1_0__ImmSExti16i81_1
3084 : { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3085 : // Convert__Reg1_0__ImmSExti32i81_1
3086 : { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3087 : // Convert__Reg1_0__ImmSExti64i81_1
3088 : { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3089 : // Convert__Reg1_1__ImmSExti32i81_0
3090 : { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3091 : // Convert__Reg1_1__ImmSExti64i81_0
3092 : { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3093 : // Convert__Reg1_1__ImmSExti16i81_0
3094 : { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3095 : // Convert__Reg1_0
3096 : { CVT_95_Reg, 1, CVT_Done },
3097 : // Convert__AbsMem1_0
3098 : { CVT_95_addAbsMemOperands, 1, CVT_Done },
3099 : // Convert__Mem165_0
3100 : { CVT_95_addMemOperands, 1, CVT_Done },
3101 : // Convert__Mem325_0
3102 : { CVT_95_addMemOperands, 1, CVT_Done },
3103 : // Convert__Mem645_0
3104 : { CVT_95_addMemOperands, 1, CVT_Done },
3105 : // Convert__Mem5_0
3106 : { CVT_95_addMemOperands, 1, CVT_Done },
3107 : // Convert__Imm1_1__Imm1_0
3108 : { CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3109 : // Convert__Reg1_1
3110 : { CVT_95_Reg, 2, CVT_Done },
3111 : // Convert__Mem325_1
3112 : { CVT_95_addMemOperands, 2, CVT_Done },
3113 : // Convert__Mem645_1
3114 : { CVT_95_addMemOperands, 2, CVT_Done },
3115 : // Convert__Mem165_1
3116 : { CVT_95_addMemOperands, 2, CVT_Done },
3117 : // Convert__Mem85_0
3118 : { CVT_95_addMemOperands, 1, CVT_Done },
3119 : // Convert__Reg1_0__Tie0_1_1__Reg1_0
3120 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 1, CVT_Done },
3121 : // Convert__Reg1_1__Tie0_1_1__Mem165_0
3122 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 1, CVT_Done },
3123 : // Convert__regAX__ImmSExti16i81_1
3124 : { CVT_regAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3125 : // Convert__regEAX__ImmSExti32i81_1
3126 : { CVT_regEAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3127 : // Convert__regRAX__ImmSExti64i81_1
3128 : { CVT_regRAX, 0, CVT_95_addImmOperands, 2, CVT_Done },
3129 : // Convert__Reg1_0__Imm1_1
3130 : { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3131 : // Convert__Reg1_0__ImmSExti64i321_1
3132 : { CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3133 : // Convert__Reg1_0__Mem85_1
3134 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3135 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0
3136 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3137 : // Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0
3138 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3139 : // Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0
3140 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3141 : // Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0
3142 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3143 : // Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0
3144 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3145 : // Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0
3146 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3147 : // Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0
3148 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 1, CVT_Done },
3149 : // Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0
3150 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3151 : // Convert__Reg1_1__Imm1_0
3152 : { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3153 : // Convert__Reg1_1__Mem85_0
3154 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3155 : // Convert__regEAX__ImmSExti32i81_0
3156 : { CVT_regEAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3157 : // Convert__regRAX__ImmSExti64i81_0
3158 : { CVT_regRAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3159 : // Convert__Reg1_1__ImmSExti64i321_0
3160 : { CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3161 : // Convert__DstIdx161_1__SrcIdx162_0
3162 : { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3163 : // Convert__DstIdx321_1__SrcIdx322_0
3164 : { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3165 : // Convert__DstIdx641_1__SrcIdx642_0
3166 : { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3167 : // Convert__DstIdx81_1__SrcIdx82_0
3168 : { CVT_95_addDstIdxOperands, 2, CVT_95_addSrcIdxOperands, 1, CVT_Done },
3169 : // Convert__DstIdx81_0__SrcIdx82_1
3170 : { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3171 : // Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2
3172 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3173 : // Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0
3174 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3175 : // Convert__DstIdx321_0__SrcIdx322_1
3176 : { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3177 : // Convert__DstIdx641_0__SrcIdx642_1
3178 : { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3179 : // Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2
3180 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3181 : // Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0
3182 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3183 : // Convert__DstIdx161_0__SrcIdx162_1
3184 : { CVT_95_addDstIdxOperands, 1, CVT_95_addSrcIdxOperands, 2, CVT_Done },
3185 : // Convert__regAX__ImmSExti16i81_0
3186 : { CVT_regAX, 0, CVT_95_addImmOperands, 1, CVT_Done },
3187 : // Convert__Mem1285_0
3188 : { CVT_95_addMemOperands, 1, CVT_Done },
3189 : // Convert__Mem85_1
3190 : { CVT_95_addMemOperands, 2, CVT_Done },
3191 : // Convert__Imm1_0__Imm1_1
3192 : { CVT_95_addImmOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3193 : // Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0
3194 : { CVT_95_addGR32orGR64Operands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3195 : // Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0
3196 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3197 : // Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2
3198 : { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3199 : // Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2
3200 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3201 : // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2
3202 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3203 : // Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0
3204 : { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3205 : // Convert__regST1
3206 : { CVT_regST1, 0, CVT_Done },
3207 : // Convert__regST0
3208 : { CVT_regST0, 0, CVT_Done },
3209 : // Convert__Mem805_0
3210 : { CVT_95_addMemOperands, 1, CVT_Done },
3211 : // Convert__Reg1_0__Reg1_0__ImmSExti16i81_1
3212 : { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3213 : // Convert__Reg1_0__Reg1_0__Imm1_1
3214 : { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3215 : // Convert__Reg1_0__Reg1_0__ImmSExti32i81_1
3216 : { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3217 : // Convert__Reg1_0__Reg1_0__ImmSExti64i81_1
3218 : { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3219 : // Convert__Reg1_0__Reg1_0__ImmSExti64i321_1
3220 : { CVT_95_Reg, 1, CVT_95_Reg, 1, CVT_95_addImmOperands, 2, CVT_Done },
3221 : // Convert__Reg1_0__Reg1_1__ImmSExti16i81_2
3222 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3223 : // Convert__Reg1_0__Mem165_1__ImmSExti16i81_2
3224 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3225 : // Convert__Reg1_0__Mem165_1__Imm1_2
3226 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3227 : // Convert__Reg1_0__Reg1_1__ImmSExti32i81_2
3228 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3229 : // Convert__Reg1_0__Mem325_1__ImmSExti32i81_2
3230 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3231 : // Convert__Reg1_0__Reg1_1__ImmSExti64i81_2
3232 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3233 : // Convert__Reg1_0__Mem645_1__ImmSExti64i81_2
3234 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3235 : // Convert__Reg1_1__Reg1_1__ImmSExti32i81_0
3236 : { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3237 : // Convert__Reg1_1__Reg1_1__Imm1_0
3238 : { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3239 : // Convert__Reg1_2__Reg1_1__ImmSExti32i81_0
3240 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3241 : // Convert__Reg1_2__Mem325_1__ImmSExti32i81_0
3242 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3243 : // Convert__Reg1_1__Reg1_1__ImmSExti64i81_0
3244 : { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3245 : // Convert__Reg1_1__Reg1_1__ImmSExti64i321_0
3246 : { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3247 : // Convert__Reg1_2__Reg1_1__ImmSExti64i81_0
3248 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3249 : // Convert__Reg1_2__Mem645_1__ImmSExti64i81_0
3250 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3251 : // Convert__Reg1_1__Reg1_1__ImmSExti16i81_0
3252 : { CVT_95_Reg, 2, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3253 : // Convert__Reg1_2__Reg1_1__ImmSExti16i81_0
3254 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3255 : // Convert__Reg1_2__Mem165_1__ImmSExti16i81_0
3256 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3257 : // Convert__Reg1_2__Mem165_1__Imm1_0
3258 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3259 : // Convert__ImmUnsignedi81_1
3260 : { CVT_95_addImmOperands, 2, CVT_Done },
3261 : // Convert__ImmUnsignedi81_0
3262 : { CVT_95_addImmOperands, 1, CVT_Done },
3263 : // Convert__DstIdx161_0
3264 : { CVT_95_addDstIdxOperands, 1, CVT_Done },
3265 : // Convert__DstIdx321_0
3266 : { CVT_95_addDstIdxOperands, 1, CVT_Done },
3267 : // Convert__DstIdx81_0
3268 : { CVT_95_addDstIdxOperands, 1, CVT_Done },
3269 : // Convert__DstIdx81_1
3270 : { CVT_95_addDstIdxOperands, 2, CVT_Done },
3271 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3
3272 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3273 : // Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0
3274 : { CVT_95_Reg, 4, CVT_Tied, Tie0_4_4, CVT_95_Reg, 3, CVT_95_addImmOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3275 : // Convert__DstIdx321_1
3276 : { CVT_95_addDstIdxOperands, 2, CVT_Done },
3277 : // Convert__DstIdx161_1
3278 : { CVT_95_addDstIdxOperands, 2, CVT_Done },
3279 : // Convert__Mem5_1
3280 : { CVT_95_addMemOperands, 2, CVT_Done },
3281 : // Convert__SrcIdx162_0
3282 : { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3283 : // Convert__SrcIdx322_0
3284 : { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3285 : // Convert__SrcIdx642_0
3286 : { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3287 : // Convert__SrcIdx82_0
3288 : { CVT_95_addSrcIdxOperands, 1, CVT_Done },
3289 : // Convert__SrcIdx82_1
3290 : { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3291 : // Convert__SrcIdx162_1
3292 : { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3293 : // Convert__SrcIdx322_1
3294 : { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3295 : // Convert__SrcIdx642_1
3296 : { CVT_95_addSrcIdxOperands, 2, CVT_Done },
3297 : // Convert__MemOffs16_82_1
3298 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3299 : // Convert__MemOffs32_82_1
3300 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3301 : // Convert__MemOffs16_162_1
3302 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3303 : // Convert__MemOffs32_162_1
3304 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3305 : // Convert__MemOffs16_322_1
3306 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3307 : // Convert__MemOffs32_322_1
3308 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3309 : // Convert__MemOffs32_642_1
3310 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3311 : // Convert__MemOffs16_162_0
3312 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3313 : // Convert__MemOffs16_322_0
3314 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3315 : // Convert__MemOffs16_82_0
3316 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3317 : // Convert__MemOffs32_162_0
3318 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3319 : // Convert__MemOffs32_322_0
3320 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3321 : // Convert__MemOffs32_642_0
3322 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3323 : // Convert__MemOffs32_82_0
3324 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3325 : // Convert__MemOffs64_82_1
3326 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3327 : // Convert__MemOffs64_162_1
3328 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3329 : // Convert__MemOffs64_322_1
3330 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3331 : // Convert__MemOffs64_642_1
3332 : { CVT_95_addMemOffsOperands, 2, CVT_Done },
3333 : // Convert__MemOffs64_162_0
3334 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3335 : // Convert__MemOffs64_322_0
3336 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3337 : // Convert__MemOffs64_642_0
3338 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3339 : // Convert__MemOffs64_82_0
3340 : { CVT_95_addMemOffsOperands, 1, CVT_Done },
3341 : // Convert__Reg1_0__Mem5125_1
3342 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3343 : // Convert__Reg1_1__Mem5125_0
3344 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3345 : // Convert__GR32orGR641_1__Reg1_0
3346 : { CVT_95_addGR32orGR64Operands, 2, CVT_95_Reg, 1, CVT_Done },
3347 : // Convert__GR32orGR641_0__Reg1_1
3348 : { CVT_95_addGR32orGR64Operands, 1, CVT_95_Reg, 2, CVT_Done },
3349 : // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17
3350 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
3351 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17
3352 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_17, 0, CVT_Done },
3353 : // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17
3354 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_17, 0, CVT_Done },
3355 : // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17
3356 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
3357 : // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1
3358 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
3359 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1
3360 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_1, 0, CVT_Done },
3361 : // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1
3362 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_1, 0, CVT_Done },
3363 : // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1
3364 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
3365 : // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16
3366 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
3367 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16
3368 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_16, 0, CVT_Done },
3369 : // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16
3370 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_16, 0, CVT_Done },
3371 : // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16
3372 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
3373 : // Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0
3374 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
3375 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0
3376 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_imm_95_0, 0, CVT_Done },
3377 : // Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0
3378 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_imm_95_0, 0, CVT_Done },
3379 : // Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0
3380 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
3381 : // Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0
3382 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3383 : // Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2
3384 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3385 : // Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0
3386 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3387 : // Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2
3388 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3389 : // Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0
3390 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3391 : // Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2
3392 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3393 : // Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2
3394 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3395 : // Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2
3396 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3397 : // Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0
3398 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3399 : // Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0
3400 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3401 : // Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2
3402 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3403 : // Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0
3404 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3405 : // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2
3406 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3407 : // Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0
3408 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3409 : // Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1
3410 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 2, CVT_Done },
3411 : // Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0
3412 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_addImmOperands, 1, CVT_Done },
3413 : // Convert__ImmSExti64i81_0
3414 : { CVT_95_addImmOperands, 1, CVT_Done },
3415 : // Convert__ImmSExti16i81_0
3416 : { CVT_95_addImmOperands, 1, CVT_Done },
3417 : // Convert__ImmSExti32i81_0
3418 : { CVT_95_addImmOperands, 1, CVT_Done },
3419 : // Convert__Mem165_0__ImmUnsignedi81_1
3420 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3421 : // Convert__Mem325_0__ImmUnsignedi81_1
3422 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3423 : // Convert__Mem645_0__ImmUnsignedi81_1
3424 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3425 : // Convert__Mem85_0__ImmUnsignedi81_1
3426 : { CVT_95_addMemOperands, 1, CVT_95_addImmOperands, 2, CVT_Done },
3427 : // Convert__Reg1_1__Tie0_1_1
3428 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Done },
3429 : // Convert__Mem85_1__ImmUnsignedi81_0
3430 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3431 : // Convert__Mem325_1__ImmUnsignedi81_0
3432 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3433 : // Convert__Mem645_1__ImmUnsignedi81_0
3434 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3435 : // Convert__Mem165_1__ImmUnsignedi81_0
3436 : { CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3437 : // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2
3438 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
3439 : // Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0
3440 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3441 : // Convert__DstIdx641_0
3442 : { CVT_95_addDstIdxOperands, 1, CVT_Done },
3443 : // Convert__DstIdx641_1
3444 : { CVT_95_addDstIdxOperands, 2, CVT_Done },
3445 : // Convert__Mem325_2__Reg1_1
3446 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3447 : // Convert__Mem645_2__Reg1_1
3448 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3449 : // Convert__Mem165_2__Reg1_1
3450 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_Done },
3451 : // Convert__GR32orGR641_0
3452 : { CVT_95_addGR32orGR64Operands, 1, CVT_Done },
3453 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2
3454 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3455 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0
3456 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3457 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5
3458 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3459 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0
3460 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3461 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6
3462 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3463 : // Convert__Reg1_0__Reg1_1__Mem1285_2
3464 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3465 : // Convert__Reg1_0__Reg1_1__Mem2565_2
3466 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3467 : // Convert__Reg1_0__Reg1_1__Mem5125_2
3468 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3469 : // Convert__Reg1_2__Reg1_1__Mem1285_0
3470 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3471 : // Convert__Reg1_2__Reg1_1__Mem2565_0
3472 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3473 : // Convert__Reg1_2__Reg1_1__Mem5125_0
3474 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3475 : // Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3
3476 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
3477 : // Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0
3478 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3479 : // Convert__Reg1_3__Reg1_2__Mem645_0
3480 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3481 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5
3482 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
3483 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0
3484 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3485 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5
3486 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3487 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5
3488 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3489 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0
3490 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3491 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0
3492 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3493 : // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6
3494 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3495 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6
3496 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3497 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5
3498 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3499 : // Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0
3500 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3501 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6
3502 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3503 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6
3504 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3505 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6
3506 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
3507 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
3508 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3509 : // Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0
3510 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3511 : // Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0
3512 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3513 : // Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0
3514 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3515 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0
3516 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3517 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6
3518 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3519 : // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
3520 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
3521 : // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0
3522 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3523 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0
3524 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3525 : // Convert__Reg1_3__Reg1_2__Mem325_0
3526 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3527 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5
3528 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3529 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0
3530 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3531 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6
3532 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3533 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0
3534 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3535 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0
3536 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3537 : // Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0
3538 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3539 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0
3540 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3541 : // Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0
3542 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3543 : // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3
3544 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
3545 : // Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3
3546 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3547 : // Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3
3548 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3549 : // Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3
3550 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3551 : // Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
3552 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3553 : // Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3554 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3555 : // Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3556 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3557 : // Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3558 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3559 : // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4
3560 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3561 : // Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0
3562 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3563 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
3564 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3565 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
3566 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3567 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
3568 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3569 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
3570 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3571 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
3572 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3573 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3574 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3575 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3576 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3577 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3578 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3579 : // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
3580 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
3581 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
3582 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3583 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
3584 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3585 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
3586 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3587 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
3588 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3589 : // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0
3590 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3591 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3592 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3593 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3594 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3595 : // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
3596 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3597 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3598 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3599 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
3600 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3601 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0
3602 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3603 : // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4
3604 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3605 : // Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0
3606 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3607 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
3608 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3609 : // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
3610 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3611 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
3612 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3613 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0
3614 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3615 : // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5
3616 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_Done },
3617 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5
3618 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3619 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5
3620 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3621 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5
3622 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3623 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5
3624 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3625 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5
3626 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_Done },
3627 : // Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0
3628 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3629 : // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3
3630 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_Done },
3631 : // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3
3632 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3633 : // Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0
3634 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3635 : // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3
3636 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
3637 : // Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0
3638 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3639 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0
3640 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3641 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4
3642 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3643 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4
3644 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3645 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0
3646 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3647 : // Convert__Reg1_1__Reg1_3__Reg1_0
3648 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3649 : // Convert__Reg1_0__Reg1_2__Reg1_5
3650 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_Done },
3651 : // Convert__Reg1_0__Reg1_2__Mem645_5
3652 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3653 : // Convert__Reg1_1__Reg1_3__Mem645_0
3654 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3655 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4
3656 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3657 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0
3658 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3659 : // Convert__Reg1_0__Reg1_2__Mem1285_5
3660 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3661 : // Convert__Reg1_1__Reg1_3__Mem1285_0
3662 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3663 : // Convert__Reg1_0__Mem2565_1
3664 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_Done },
3665 : // Convert__Reg1_1__Mem2565_0
3666 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3667 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4
3668 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3669 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0
3670 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3671 : // Convert__Reg1_0__Reg1_2__Mem2565_5
3672 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3673 : // Convert__Reg1_1__Reg1_3__Mem2565_0
3674 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3675 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4
3676 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3677 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0
3678 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3679 : // Convert__Reg1_0__Reg1_2__Mem325_5
3680 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3681 : // Convert__Reg1_1__Reg1_3__Mem325_0
3682 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3683 : // Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0
3684 : { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_Reg, 5, CVT_95_addImmOperands, 1, CVT_Done },
3685 : // Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0
3686 : { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3687 : // Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0
3688 : { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3689 : // Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0
3690 : { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3691 : // Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0
3692 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3693 : // Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0
3694 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3695 : // Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0
3696 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3697 : // Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0
3698 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3699 : // Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0
3700 : { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3701 : // Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0
3702 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3703 : // Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0
3704 : { CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 1, CVT_Done },
3705 : // Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0
3706 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3707 : // Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0
3708 : { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3709 : // Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0
3710 : { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3711 : // Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0
3712 : { CVT_95_Reg, 6, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3713 : // Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0
3714 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 8, CVT_95_addImmOperands, 1, CVT_Done },
3715 : // Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0
3716 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3717 : // Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0
3718 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3719 : // Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0
3720 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3721 : // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0
3722 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3723 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0
3724 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3725 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0
3726 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3727 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0
3728 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3729 : // Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0
3730 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3731 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0
3732 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3733 : // Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0
3734 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_addMemOperands, 8, CVT_95_addImmOperands, 1, CVT_Done },
3735 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0
3736 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3737 : // Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0
3738 : { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addImmOperands, 1, CVT_Done },
3739 : // Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0
3740 : { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3741 : // Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0
3742 : { CVT_95_Reg, 6, CVT_95_Reg, 8, CVT_95_Reg, 5, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 1, CVT_Done },
3743 : // Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4
3744 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
3745 : // Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0
3746 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3747 : // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6
3748 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3749 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6
3750 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3751 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6
3752 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3753 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6
3754 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3755 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7
3756 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3757 : // Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
3758 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3759 : // Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
3760 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3761 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7
3762 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
3763 : // Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3
3764 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3765 : // Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0
3766 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3767 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
3768 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3769 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
3770 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3771 : // Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3
3772 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3773 : // Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0
3774 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3775 : // Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
3776 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3777 : // Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
3778 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3779 : // Convert__Reg1_2__Reg1_1
3780 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3781 : // Convert__Mem2565_1__Reg1_0
3782 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3783 : // Convert__Mem5125_1__Reg1_0
3784 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
3785 : // Convert__Mem2565_0__Reg1_1
3786 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3787 : // Convert__Mem5125_0__Reg1_1
3788 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_Done },
3789 : // Convert__Mem1285_1__Reg1_3__Reg1_0
3790 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3791 : // Convert__Mem2565_1__Reg1_3__Reg1_0
3792 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3793 : // Convert__Mem5125_1__Reg1_3__Reg1_0
3794 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
3795 : // Convert__Mem1285_0__Reg1_2__Reg1_4
3796 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3797 : // Convert__Mem2565_0__Reg1_2__Reg1_4
3798 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3799 : // Convert__Mem5125_0__Reg1_2__Reg1_4
3800 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
3801 : // Convert__Reg1_2__Mem325_0
3802 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3803 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0
3804 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3805 : // Convert__Reg1_2__Reg1_4__Mem325_0
3806 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3807 : // Convert__Reg1_0__Reg1_1__AVX512RC1_2
3808 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 3, CVT_Done },
3809 : // Convert__Reg1_2__Reg1_1__AVX512RC1_0
3810 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3811 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4
3812 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
3813 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0
3814 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3815 : // Convert__Reg1_0__Reg1_2__Mem5125_5
3816 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
3817 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5
3818 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addAVX512RCOperands, 6, CVT_Done },
3819 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0
3820 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3821 : // Convert__Reg1_1__Reg1_3__Mem5125_0
3822 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
3823 : // Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6
3824 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addAVX512RCOperands, 7, CVT_Done },
3825 : // Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0
3826 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3827 : // Convert__Reg1_2__Mem645_0
3828 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3829 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0
3830 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3831 : // Convert__Reg1_2__Reg1_4__Mem645_0
3832 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 1, CVT_Done },
3833 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1
3834 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
3835 : // Convert__Reg1_2__Reg1_4__Reg1_1
3836 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_Done },
3837 : // Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0
3838 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3839 : // Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0
3840 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3841 : // Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2
3842 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3843 : // Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2
3844 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 3, CVT_Done },
3845 : // Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3
3846 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addImmOperands, 4, CVT_Done },
3847 : // Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0
3848 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3849 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5
3850 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3851 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0
3852 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3853 : // Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3854 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3855 : // Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3856 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3857 : // Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3858 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3859 : // Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3860 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3861 : // Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3862 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3863 : // Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
3864 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
3865 : // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6
3866 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 7, CVT_Done },
3867 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6
3868 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 7, CVT_Done },
3869 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0
3870 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3871 : // Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0
3872 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3873 : // Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7
3874 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3875 : // Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0
3876 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3877 : // Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2
3878 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addAVX512RCOperands, 3, CVT_Done },
3879 : // Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1
3880 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_95_addAVX512RCOperands, 2, CVT_Done },
3881 : // Convert__Reg1_3__Reg1_2__Reg1_1
3882 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3883 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1
3884 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3885 : // Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1
3886 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_Done },
3887 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3
3888 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 4, CVT_Done },
3889 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3
3890 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3891 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3
3892 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3893 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3
3894 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3895 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0
3896 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
3897 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0
3898 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3899 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0
3900 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3901 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0
3902 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3903 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4
3904 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3905 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4
3906 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addImmOperands, 5, CVT_Done },
3907 : // Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0
3908 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3909 : // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0
3910 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3911 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7
3912 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 8, CVT_Done },
3913 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7
3914 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3915 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7
3916 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3917 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7
3918 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3919 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7
3920 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_Reg, 6, CVT_95_addImmOperands, 8, CVT_Done },
3921 : // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0
3922 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addImmOperands, 1, CVT_Done },
3923 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8
3924 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3925 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
3926 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
3927 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4
3928 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
3929 : // Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0
3930 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3931 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8
3932 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
3933 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3
3934 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3935 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0
3936 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3937 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6
3938 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3939 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0
3940 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3941 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
3942 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3943 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3
3944 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
3945 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0
3946 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3947 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6
3948 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
3949 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0
3950 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
3951 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
3952 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
3953 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0
3954 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
3955 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2
3956 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
3957 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2
3958 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3959 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2
3960 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3961 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0
3962 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3963 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0
3964 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3965 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2
3966 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3967 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3
3968 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addAVX512RCOperands, 4, CVT_Done },
3969 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0
3970 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addAVX512RCOperands, 1, CVT_Done },
3971 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0
3972 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3973 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6
3974 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_Done },
3975 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6
3976 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3977 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6
3978 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3979 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6
3980 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3981 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7
3982 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addAVX512RCOperands, 8, CVT_Done },
3983 : // Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2
3984 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_Done },
3985 : // Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0
3986 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
3987 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6
3988 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_Done },
3989 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0
3990 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3991 : // Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0
3992 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3993 : // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3
3994 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3995 : // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3
3996 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
3997 : // Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0
3998 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
3999 : // Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0
4000 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4001 : // Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3
4002 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4003 : // Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3
4004 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4005 : // Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0
4006 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4007 : // Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0
4008 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4009 : // Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3
4010 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_Done },
4011 : // Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3
4012 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_Done },
4013 : // Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0
4014 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4015 : // Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0
4016 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_Done },
4017 : // Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2
4018 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4019 : // Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2
4020 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 3, CVT_Done },
4021 : // Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3
4022 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
4023 : // Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5
4024 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addImmOperands, 6, CVT_Done },
4025 : // Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4026 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4027 : // Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4028 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4029 : // Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4030 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4031 : // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6
4032 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4033 : // Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0
4034 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4035 : // Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0
4036 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4037 : // Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4038 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4039 : // Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4040 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4041 : // Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4042 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4043 : // Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0
4044 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4045 : // Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4046 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4047 : // Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3
4048 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 4, CVT_Done },
4049 : // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6
4050 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4051 : // Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0
4052 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4053 : // Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0
4054 : { CVT_95_Reg, 4, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4055 : // Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5
4056 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4057 : // Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0
4058 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4059 : // Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5
4060 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4061 : // Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0
4062 : { CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4063 : // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1
4064 : { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4065 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3
4066 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4067 : // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1
4068 : { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4069 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3
4070 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4071 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4
4072 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4073 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4
4074 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4075 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4
4076 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4077 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0
4078 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4079 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0
4080 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4081 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0
4082 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4083 : // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1
4084 : { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4085 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3
4086 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4087 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4
4088 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4089 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4
4090 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4091 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0
4092 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4093 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0
4094 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4095 : // Convert__Reg1_1__Mem512_RC256X5_3
4096 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4097 : // Convert__Reg1_2__Mem512_RC256X5_0
4098 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4099 : // Convert__Reg1_1__Mem512_RC5125_3
4100 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4101 : // Convert__Reg1_2__Mem512_RC5125_0
4102 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4103 : // Convert__Reg1_1__Mem256_RC5125_3
4104 : { CVT_95_Reg, 2, CVT_95_addMemOperands, 4, CVT_Done },
4105 : // Convert__Reg1_2__Mem256_RC5125_0
4106 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Done },
4107 : // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1
4108 : { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4109 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3
4110 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4111 : // Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1
4112 : { CVT_95_Reg, 3, CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_1_1, CVT_Done },
4113 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3
4114 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_addMemOperands, 2, CVT_Tied, Tie1_3_3, CVT_Done },
4115 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4
4116 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4117 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4
4118 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4119 : // Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4
4120 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_3_3, CVT_95_addMemOperands, 5, CVT_Done },
4121 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0
4122 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4123 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0
4124 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4125 : // Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0
4126 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_4_4, CVT_95_addMemOperands, 1, CVT_Done },
4127 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5
4128 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4129 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5
4130 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4131 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5
4132 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 6, CVT_Done },
4133 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0
4134 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4135 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0
4136 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4137 : // Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0
4138 : { CVT_95_Reg, 3, CVT_Tied, Tie0_1_1, CVT_95_Reg, 5, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4139 : // Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6
4140 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4141 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6
4142 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4143 : // Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6
4144 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4145 : // Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6
4146 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 7, CVT_Done },
4147 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0
4148 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4149 : // Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7
4150 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4151 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6
4152 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_95_addImmOperands, 7, CVT_Done },
4153 : // Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0
4154 : { CVT_95_Reg, 4, CVT_Tied, Tie0_1_1, CVT_95_Reg, 6, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4155 : // Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7
4156 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4157 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7
4158 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4159 : // Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8
4160 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_Reg, 7, CVT_95_addImmOperands, 9, CVT_Done },
4161 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7
4162 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 8, CVT_Done },
4163 : // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4
4164 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 5, CVT_Done },
4165 : // Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0
4166 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4167 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7
4168 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_95_addMemOperands, 6, CVT_95_addImmOperands, 8, CVT_Done },
4169 : // Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4170 : { CVT_95_Reg, 5, CVT_Tied, Tie0_1_1, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4171 : // Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8
4172 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 6, CVT_95_addMemOperands, 7, CVT_95_addImmOperands, 9, CVT_Done },
4173 : // Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0
4174 : { CVT_95_Reg, 5, CVT_95_Reg, 7, CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4175 : // Convert__Mem1285_2__Reg1_1__Reg1_0
4176 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4177 : // Convert__Mem2565_2__Reg1_1__Reg1_0
4178 : { CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4179 : // Convert__Mem1285_0__Reg1_1__Reg1_2
4180 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4181 : // Convert__Mem2565_0__Reg1_1__Reg1_2
4182 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_Done },
4183 : // Convert__Reg1_0__Reg1_2__Reg1_4
4184 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4185 : // Convert__Mem645_1__Reg1_3__Reg1_0
4186 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4187 : // Convert__Mem645_0__Reg1_2__Reg1_4
4188 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4189 : // Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0
4190 : { CVT_95_Reg, 3, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Done },
4191 : // Convert__Mem325_1__Reg1_3__Reg1_0
4192 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4193 : // Convert__Mem325_0__Reg1_2__Reg1_4
4194 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4195 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4
4196 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4197 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0
4198 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4199 : // Convert__Reg1_0__Reg1_2__Mem85_5
4200 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4201 : // Convert__Reg1_1__Reg1_3__Mem85_0
4202 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4203 : // Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4
4204 : { CVT_95_Reg, 1, CVT_Tied, Tie0_1_1, CVT_95_Reg, 3, CVT_95_addMemOperands, 5, CVT_Done },
4205 : // Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0
4206 : { CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4207 : // Convert__Reg1_0__Reg1_2__Mem165_5
4208 : { CVT_95_Reg, 1, CVT_95_Reg, 3, CVT_95_addMemOperands, 6, CVT_Done },
4209 : // Convert__Reg1_1__Reg1_3__Mem165_0
4210 : { CVT_95_Reg, 2, CVT_95_Reg, 4, CVT_95_addMemOperands, 1, CVT_Done },
4211 : // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17
4212 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_17, 0, CVT_Done },
4213 : // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17
4214 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_17, 0, CVT_Done },
4215 : // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17
4216 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4217 : // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17
4218 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4219 : // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17
4220 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_17, 0, CVT_Done },
4221 : // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17
4222 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4223 : // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17
4224 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4225 : // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17
4226 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_17, 0, CVT_Done },
4227 : // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1
4228 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_1, 0, CVT_Done },
4229 : // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1
4230 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_1, 0, CVT_Done },
4231 : // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1
4232 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4233 : // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1
4234 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4235 : // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1
4236 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_1, 0, CVT_Done },
4237 : // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1
4238 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4239 : // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1
4240 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4241 : // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1
4242 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_1, 0, CVT_Done },
4243 : // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16
4244 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_16, 0, CVT_Done },
4245 : // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16
4246 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_16, 0, CVT_Done },
4247 : // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16
4248 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4249 : // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16
4250 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4251 : // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16
4252 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_16, 0, CVT_Done },
4253 : // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16
4254 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4255 : // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16
4256 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4257 : // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16
4258 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_16, 0, CVT_Done },
4259 : // Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0
4260 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_imm_95_0, 0, CVT_Done },
4261 : // Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0
4262 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_imm_95_0, 0, CVT_Done },
4263 : // Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0
4264 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4265 : // Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0
4266 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4267 : // Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0
4268 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_imm_95_0, 0, CVT_Done },
4269 : // Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0
4270 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4271 : // Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0
4272 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4273 : // Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0
4274 : { CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addMemOperands, 1, CVT_imm_95_0, 0, CVT_Done },
4275 : // Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4
4276 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4277 : // Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4
4278 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4279 : // Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4
4280 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4281 : // Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4
4282 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_Reg, 3, CVT_95_addMemOperands, 4, CVT_95_addImmOperands, 5, CVT_Done },
4283 : // Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4
4284 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_Reg, 4, CVT_95_addImmOperands, 5, CVT_Done },
4285 : // Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0
4286 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4287 : // Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0
4288 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4289 : // Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0
4290 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_addMemOperands, 3, CVT_95_Reg, 2, CVT_95_addImmOperands, 1, CVT_Done },
4291 : // Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0
4292 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4293 : // Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0
4294 : { CVT_95_Reg, 5, CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4295 : // Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3
4296 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addGR32orGR64Operands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4297 : // Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3
4298 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4299 : // Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0
4300 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addGR32orGR64Operands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4301 : // Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0
4302 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4303 : // Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3
4304 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_95_addMemOperands, 3, CVT_95_addImmOperands, 4, CVT_Done },
4305 : // Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0
4306 : { CVT_95_Reg, 4, CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_addImmOperands, 1, CVT_Done },
4307 : // Convert__Mem165_1__Reg1_3__Reg1_0
4308 : { CVT_95_addMemOperands, 2, CVT_95_Reg, 4, CVT_95_Reg, 1, CVT_Done },
4309 : // Convert__Mem165_0__Reg1_2__Reg1_4
4310 : { CVT_95_addMemOperands, 1, CVT_95_Reg, 3, CVT_95_Reg, 5, CVT_Done },
4311 : // Convert__Reg1_2__Mem1285_1__Reg1_0
4312 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 2, CVT_95_Reg, 1, CVT_Done },
4313 : // Convert__Reg1_0__Mem1285_1__Reg1_2
4314 : { CVT_95_Reg, 1, CVT_95_addMemOperands, 2, CVT_95_Reg, 3, CVT_Done },
4315 : // Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0
4316 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4317 : // Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0
4318 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4319 : // Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0
4320 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4321 : // Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4
4322 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4323 : // Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4
4324 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4325 : // Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4
4326 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4327 : // Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0
4328 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4329 : // Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0
4330 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4331 : // Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4
4332 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4333 : // Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4
4334 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4335 : // Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0
4336 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4337 : // Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0
4338 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4339 : // Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0
4340 : { CVT_95_Reg, 4, CVT_95_addMemOperands, 2, CVT_Tied, Tie0_4_4, CVT_95_Reg, 1, CVT_Done },
4341 : // Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4
4342 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4343 : // Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4
4344 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4345 : // Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4
4346 : { CVT_95_Reg, 3, CVT_95_addMemOperands, 1, CVT_Tied, Tie0_3_3, CVT_95_Reg, 5, CVT_Done },
4347 : // Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2
4348 : { CVT_95_Reg, 1, CVT_95_Reg, 2, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_2_2, CVT_Done },
4349 : // Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1
4350 : { CVT_95_Reg, 2, CVT_95_Reg, 1, CVT_Tied, Tie0_2_2, CVT_Tied, Tie1_1_1, CVT_Done },
4351 : // Convert__AbsMem161_0
4352 : { CVT_95_addAbsMemOperands, 1, CVT_Done },
4353 : // Convert__Reg1_1__Tie0_2_2
4354 : { CVT_95_Reg, 2, CVT_Tied, Tie0_2_2, CVT_Done },
4355 : // Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1
4356 : { CVT_regEAX, 0, CVT_regEAX, 0, CVT_Tied, Tie0_1_1, CVT_Tied, Tie1_1_1, CVT_Done },
4357 : };
4358 :
4359 0 : void X86AsmParser::
4360 : convertToMCInst(unsigned Kind, MCInst &Inst, unsigned Opcode,
4361 : const OperandVector &Operands) {
4362 : assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
4363 0 : const uint8_t *Converter = ConversionTable[Kind];
4364 : unsigned OpIdx;
4365 : Inst.setOpcode(Opcode);
4366 0 : for (const uint8_t *p = Converter; *p; p+= 2) {
4367 0 : OpIdx = *(p + 1);
4368 0 : switch (*p) {
4369 0 : default: llvm_unreachable("invalid conversion entry!");
4370 0 : case CVT_Reg:
4371 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
4372 : break;
4373 0 : case CVT_Tied: {
4374 : assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
4375 : std::begin(TiedAsmOperandTable)) &&
4376 : "Tied operand not found");
4377 0 : unsigned TiedResOpnd = TiedAsmOperandTable[OpIdx][0];
4378 0 : if (TiedResOpnd != (uint8_t) -1)
4379 : Inst.addOperand(Inst.getOperand(TiedResOpnd));
4380 : break;
4381 : }
4382 : case CVT_imm_95_10:
4383 0 : Inst.addOperand(MCOperand::createImm(10));
4384 0 : break;
4385 0 : case CVT_95_addImmOperands:
4386 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addImmOperands(Inst, 1);
4387 : break;
4388 : case CVT_regAX:
4389 0 : Inst.addOperand(MCOperand::createReg(X86::AX));
4390 0 : break;
4391 : case CVT_regEAX:
4392 0 : Inst.addOperand(MCOperand::createReg(X86::EAX));
4393 0 : break;
4394 : case CVT_regRAX:
4395 0 : Inst.addOperand(MCOperand::createReg(X86::RAX));
4396 0 : break;
4397 0 : case CVT_95_Reg:
4398 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addRegOperands(Inst, 1);
4399 : break;
4400 0 : case CVT_95_addMemOperands:
4401 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addMemOperands(Inst, 5);
4402 0 : break;
4403 0 : case CVT_95_addAbsMemOperands:
4404 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addAbsMemOperands(Inst, 1);
4405 0 : break;
4406 0 : case CVT_95_addDstIdxOperands:
4407 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addDstIdxOperands(Inst, 1);
4408 : break;
4409 0 : case CVT_95_addSrcIdxOperands:
4410 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addSrcIdxOperands(Inst, 2);
4411 0 : break;
4412 0 : case CVT_95_addGR32orGR64Operands:
4413 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addGR32orGR64Operands(Inst, 1);
4414 0 : break;
4415 : case CVT_regST1:
4416 0 : Inst.addOperand(MCOperand::createReg(X86::ST1));
4417 0 : break;
4418 : case CVT_regST0:
4419 0 : Inst.addOperand(MCOperand::createReg(X86::ST0));
4420 0 : break;
4421 0 : case CVT_95_addMemOffsOperands:
4422 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addMemOffsOperands(Inst, 2);
4423 0 : break;
4424 : case CVT_imm_95_17:
4425 0 : Inst.addOperand(MCOperand::createImm(17));
4426 0 : break;
4427 : case CVT_imm_95_1:
4428 0 : Inst.addOperand(MCOperand::createImm(1));
4429 0 : break;
4430 : case CVT_imm_95_16:
4431 0 : Inst.addOperand(MCOperand::createImm(16));
4432 0 : break;
4433 : case CVT_imm_95_0:
4434 0 : Inst.addOperand(MCOperand::createImm(0));
4435 0 : break;
4436 0 : case CVT_95_addAVX512RCOperands:
4437 0 : static_cast<X86Operand&>(*Operands[OpIdx]).addAVX512RCOperands(Inst, 1);
4438 : break;
4439 : }
4440 : }
4441 0 : }
4442 :
4443 436 : void X86AsmParser::
4444 : convertToMapAndConstraints(unsigned Kind,
4445 : const OperandVector &Operands) {
4446 : assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
4447 : unsigned NumMCOperands = 0;
4448 436 : const uint8_t *Converter = ConversionTable[Kind];
4449 1186 : for (const uint8_t *p = Converter; *p; p+= 2) {
4450 750 : switch (*p) {
4451 0 : default: llvm_unreachable("invalid conversion entry!");
4452 0 : case CVT_Reg:
4453 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4454 0 : Operands[*(p + 1)]->setConstraint("r");
4455 0 : ++NumMCOperands;
4456 0 : break;
4457 11 : case CVT_Tied:
4458 11 : ++NumMCOperands;
4459 11 : break;
4460 0 : case CVT_imm_95_10:
4461 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4462 0 : Operands[*(p + 1)]->setConstraint("");
4463 0 : ++NumMCOperands;
4464 0 : break;
4465 113 : case CVT_95_addImmOperands:
4466 113 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4467 226 : Operands[*(p + 1)]->setConstraint("m");
4468 113 : NumMCOperands += 1;
4469 113 : break;
4470 0 : case CVT_regAX:
4471 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4472 0 : Operands[*(p + 1)]->setConstraint("m");
4473 0 : ++NumMCOperands;
4474 0 : break;
4475 0 : case CVT_regEAX:
4476 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4477 0 : Operands[*(p + 1)]->setConstraint("m");
4478 0 : ++NumMCOperands;
4479 0 : break;
4480 0 : case CVT_regRAX:
4481 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4482 0 : Operands[*(p + 1)]->setConstraint("m");
4483 0 : ++NumMCOperands;
4484 0 : break;
4485 378 : case CVT_95_Reg:
4486 378 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4487 756 : Operands[*(p + 1)]->setConstraint("r");
4488 378 : NumMCOperands += 1;
4489 378 : break;
4490 239 : case CVT_95_addMemOperands:
4491 239 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4492 478 : Operands[*(p + 1)]->setConstraint("m");
4493 239 : NumMCOperands += 5;
4494 239 : break;
4495 8 : case CVT_95_addAbsMemOperands:
4496 8 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4497 16 : Operands[*(p + 1)]->setConstraint("m");
4498 8 : NumMCOperands += 1;
4499 8 : break;
4500 0 : case CVT_95_addDstIdxOperands:
4501 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4502 0 : Operands[*(p + 1)]->setConstraint("m");
4503 0 : NumMCOperands += 1;
4504 0 : break;
4505 0 : case CVT_95_addSrcIdxOperands:
4506 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4507 0 : Operands[*(p + 1)]->setConstraint("m");
4508 0 : NumMCOperands += 2;
4509 0 : break;
4510 0 : case CVT_95_addGR32orGR64Operands:
4511 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4512 0 : Operands[*(p + 1)]->setConstraint("m");
4513 0 : NumMCOperands += 1;
4514 0 : break;
4515 0 : case CVT_regST1:
4516 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4517 0 : Operands[*(p + 1)]->setConstraint("m");
4518 0 : ++NumMCOperands;
4519 0 : break;
4520 0 : case CVT_regST0:
4521 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4522 0 : Operands[*(p + 1)]->setConstraint("m");
4523 0 : ++NumMCOperands;
4524 0 : break;
4525 1 : case CVT_95_addMemOffsOperands:
4526 1 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4527 2 : Operands[*(p + 1)]->setConstraint("m");
4528 1 : NumMCOperands += 2;
4529 1 : break;
4530 0 : case CVT_imm_95_17:
4531 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4532 0 : Operands[*(p + 1)]->setConstraint("");
4533 0 : ++NumMCOperands;
4534 0 : break;
4535 0 : case CVT_imm_95_1:
4536 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4537 0 : Operands[*(p + 1)]->setConstraint("");
4538 0 : ++NumMCOperands;
4539 0 : break;
4540 0 : case CVT_imm_95_16:
4541 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4542 0 : Operands[*(p + 1)]->setConstraint("");
4543 0 : ++NumMCOperands;
4544 0 : break;
4545 0 : case CVT_imm_95_0:
4546 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4547 0 : Operands[*(p + 1)]->setConstraint("");
4548 0 : ++NumMCOperands;
4549 0 : break;
4550 0 : case CVT_95_addAVX512RCOperands:
4551 0 : Operands[*(p + 1)]->setMCOperandNum(NumMCOperands);
4552 0 : Operands[*(p + 1)]->setConstraint("m");
4553 0 : NumMCOperands += 1;
4554 0 : break;
4555 : }
4556 : }
4557 436 : }
4558 :
4559 : namespace {
4560 :
4561 : /// MatchClassKind - The kinds of classes which participate in
4562 : /// instruction matching.
4563 : enum MatchClassKind {
4564 : InvalidMatchClass = 0,
4565 : OptionalMatchClass = 1,
4566 : MCK__STAR_, // '*'
4567 : MCK_b, // 'b'
4568 : MCK_d, // 'd'
4569 : MCK_pd, // 'pd'
4570 : MCK_ps, // 'ps'
4571 : MCK_q, // 'q'
4572 : MCK_sd, // 'sd'
4573 : MCK_ss, // 'ss'
4574 : MCK_ub, // 'ub'
4575 : MCK_ud, // 'ud'
4576 : MCK_uq, // 'uq'
4577 : MCK_uw, // 'uw'
4578 : MCK_w, // 'w'
4579 : MCK__123_, // '{'
4580 : MCK__123_1to16_125_, // '{1to16}'
4581 : MCK__123_1to2_125_, // '{1to2}'
4582 : MCK__123_1to4_125_, // '{1to4}'
4583 : MCK__123_1to8_125_, // '{1to8}'
4584 : MCK__123_sae_125_, // '{sae}'
4585 : MCK__123_z_125_, // '{z}'
4586 : MCK__125_, // '}'
4587 : MCK_LAST_TOKEN = MCK__125_,
4588 : MCK_Reg31, // derived register class
4589 : MCK_Reg33, // derived register class
4590 : MCK_Reg35, // derived register class
4591 : MCK_Reg62, // derived register class
4592 : MCK_Reg64, // derived register class
4593 : MCK_Reg66, // derived register class
4594 : MCK_Reg69, // derived register class
4595 : MCK_AL, // register class 'AL'
4596 : MCK_AX, // register class 'AX'
4597 : MCK_CCR, // register class 'CCR'
4598 : MCK_CL, // register class 'CL'
4599 : MCK_CS, // register class 'CS'
4600 : MCK_DFCCR, // register class 'DFCCR'
4601 : MCK_DS, // register class 'DS'
4602 : MCK_DX, // register class 'DX'
4603 : MCK_EAX, // register class 'EAX'
4604 : MCK_EBX, // register class 'EBX'
4605 : MCK_ECX, // register class 'ECX'
4606 : MCK_EDX, // register class 'EDX'
4607 : MCK_ES, // register class 'ES'
4608 : MCK_FPCCR, // register class 'FPCCR'
4609 : MCK_FS, // register class 'FS'
4610 : MCK_GS, // register class 'GS'
4611 : MCK_RAX, // register class 'RAX'
4612 : MCK_RBX, // register class 'RBX'
4613 : MCK_RCX, // register class 'RCX'
4614 : MCK_RDX, // register class 'RDX'
4615 : MCK_SS, // register class 'SS'
4616 : MCK_ST0, // register class 'ST0'
4617 : MCK_XMM0, // register class 'XMM0'
4618 : MCK_Reg57, // derived register class
4619 : MCK_Reg59, // derived register class
4620 : MCK_Reg61, // derived register class
4621 : MCK_Reg63, // derived register class
4622 : MCK_Reg65, // derived register class
4623 : MCK_Reg67, // derived register class
4624 : MCK_Reg68, // derived register class
4625 : MCK_GR32_AD, // register class 'GR32_AD'
4626 : MCK_GR32_BPSP, // register class 'GR32_BPSP'
4627 : MCK_GR32_BSI, // register class 'GR32_BSI'
4628 : MCK_GR32_CB, // register class 'GR32_CB'
4629 : MCK_GR32_DC, // register class 'GR32_DC'
4630 : MCK_GR32_DIBP, // register class 'GR32_DIBP'
4631 : MCK_GR32_SIDI, // register class 'GR32_SIDI'
4632 : MCK_GR64_AD, // register class 'GR64_AD'
4633 : MCK_Reg39, // derived register class
4634 : MCK_GR32_TC, // register class 'GR32_TC'
4635 : MCK_Reg55, // derived register class
4636 : MCK_BNDR, // register class 'BNDR'
4637 : MCK_GR16_ABCD, // register class 'GR16_ABCD'
4638 : MCK_GR32_ABCD, // register class 'GR32_ABCD'
4639 : MCK_GR64_ABCD, // register class 'GR64_ABCD'
4640 : MCK_GR8_ABCD_H, // register class 'GR8_ABCD_H'
4641 : MCK_GR8_ABCD_L, // register class 'GR8_ABCD_L'
4642 : MCK_Reg47, // derived register class
4643 : MCK_Reg50, // derived register class
4644 : MCK_Reg53, // derived register class
4645 : MCK_SEGMENT_REG, // register class 'SEGMENT_REG'
4646 : MCK_Reg51, // derived register class
4647 : MCK_Reg54, // derived register class
4648 : MCK_GR32_NOREX_NOSP, // register class 'GR32_NOREX_NOSP'
4649 : MCK_GR64_NOREX_NOSP, // register class 'GR64_NOREX_NOSP'
4650 : MCK_RFP32, // register class 'RFP32,RFP64,RFP80'
4651 : MCK_VK16WM, // register class 'VK16WM,VK1WM,VK2WM,VK4WM,VK8WM,VK32WM,VK64WM'
4652 : MCK_Reg42, // derived register class
4653 : MCK_Reg48, // derived register class
4654 : MCK_Reg81, // derived register class
4655 : MCK_Reg84, // derived register class
4656 : MCK_GR16_NOREX, // register class 'GR16_NOREX'
4657 : MCK_GR32_NOREX, // register class 'GR32_NOREX'
4658 : MCK_GR64_TCW64, // register class 'GR64_TCW64'
4659 : MCK_GR8_NOREX, // register class 'GR8_NOREX'
4660 : MCK_RST, // register class 'RST'
4661 : MCK_VK1, // register class 'VK1,VK16,VK2,VK4,VK8,VK32,VK64'
4662 : MCK_VR128H, // register class 'VR128H'
4663 : MCK_VR128L, // register class 'VR128L'
4664 : MCK_VR256H, // register class 'VR256H'
4665 : MCK_VR256L, // register class 'VR256L'
4666 : MCK_VR64, // register class 'VR64'
4667 : MCK_Reg23, // derived register class
4668 : MCK_GR64_NOREX, // register class 'GR64_NOREX'
4669 : MCK_GR64_TC, // register class 'GR64_TC'
4670 : MCK_GRH8, // register class 'GRH8'
4671 : MCK_GR32_NOSP, // register class 'GR32_NOSP'
4672 : MCK_GR64_NOSP, // register class 'GR64_NOSP'
4673 : MCK_Reg43, // derived register class
4674 : MCK_Reg82, // derived register class
4675 : MCK_CONTROL_REG, // register class 'CONTROL_REG'
4676 : MCK_DEBUG_REG, // register class 'DEBUG_REG'
4677 : MCK_FR32, // register class 'FR32,FR64,VR128'
4678 : MCK_GR16, // register class 'GR16'
4679 : MCK_GR32, // register class 'GR32'
4680 : MCK_VR256, // register class 'VR256'
4681 : MCK_Reg20, // derived register class
4682 : MCK_GR64, // register class 'GR64'
4683 : MCK_GRH16, // register class 'GRH16'
4684 : MCK_LOW32_ADDR_ACCESS, // register class 'LOW32_ADDR_ACCESS'
4685 : MCK_LOW32_ADDR_ACCESS_RBP, // register class 'LOW32_ADDR_ACCESS_RBP'
4686 : MCK_GR8, // register class 'GR8'
4687 : MCK_FR32X, // register class 'FR32X,FR64X,VR128X'
4688 : MCK_VR256X, // register class 'VR256X'
4689 : MCK_VR512, // register class 'VR512'
4690 : MCK_LAST_REGISTER = MCK_VR512,
4691 : MCK_AVX512RC, // user defined class 'AVX512RCOperand'
4692 : MCK_ImmSExti64i8, // user defined class 'ImmSExti64i8AsmOperand'
4693 : MCK_ImmSExti16i8, // user defined class 'ImmSExti16i8AsmOperand'
4694 : MCK_ImmSExti32i8, // user defined class 'ImmSExti32i8AsmOperand'
4695 : MCK_ImmSExti64i32, // user defined class 'ImmSExti64i32AsmOperand'
4696 : MCK_Imm, // user defined class 'ImmAsmOperand'
4697 : MCK_ImmUnsignedi8, // user defined class 'ImmUnsignedi8AsmOperand'
4698 : MCK_GR32orGR64, // user defined class 'X86GR32orGR64AsmOperand'
4699 : MCK_AbsMem16, // user defined class 'X86AbsMem16AsmOperand'
4700 : MCK_DstIdx16, // user defined class 'X86DstIdx16Operand'
4701 : MCK_DstIdx32, // user defined class 'X86DstIdx32Operand'
4702 : MCK_DstIdx64, // user defined class 'X86DstIdx64Operand'
4703 : MCK_DstIdx8, // user defined class 'X86DstIdx8Operand'
4704 : MCK_MemOffs16_16, // user defined class 'X86MemOffs16_16AsmOperand'
4705 : MCK_MemOffs16_32, // user defined class 'X86MemOffs16_32AsmOperand'
4706 : MCK_MemOffs16_8, // user defined class 'X86MemOffs16_8AsmOperand'
4707 : MCK_MemOffs32_16, // user defined class 'X86MemOffs32_16AsmOperand'
4708 : MCK_MemOffs32_32, // user defined class 'X86MemOffs32_32AsmOperand'
4709 : MCK_MemOffs32_64, // user defined class 'X86MemOffs32_64AsmOperand'
4710 : MCK_MemOffs32_8, // user defined class 'X86MemOffs32_8AsmOperand'
4711 : MCK_MemOffs64_16, // user defined class 'X86MemOffs64_16AsmOperand'
4712 : MCK_MemOffs64_32, // user defined class 'X86MemOffs64_32AsmOperand'
4713 : MCK_MemOffs64_64, // user defined class 'X86MemOffs64_64AsmOperand'
4714 : MCK_MemOffs64_8, // user defined class 'X86MemOffs64_8AsmOperand'
4715 : MCK_SrcIdx16, // user defined class 'X86SrcIdx16Operand'
4716 : MCK_SrcIdx32, // user defined class 'X86SrcIdx32Operand'
4717 : MCK_SrcIdx64, // user defined class 'X86SrcIdx64Operand'
4718 : MCK_SrcIdx8, // user defined class 'X86SrcIdx8Operand'
4719 : MCK_AbsMem, // user defined class 'X86AbsMemAsmOperand'
4720 : MCK_Mem128, // user defined class 'X86Mem128AsmOperand'
4721 : MCK_Mem128_RC128, // user defined class 'X86Mem128_RC128Operand'
4722 : MCK_Mem128_RC128X, // user defined class 'X86Mem128_RC128XOperand'
4723 : MCK_Mem128_RC256, // user defined class 'X86Mem128_RC256Operand'
4724 : MCK_Mem128_RC256X, // user defined class 'X86Mem128_RC256XOperand'
4725 : MCK_Mem16, // user defined class 'X86Mem16AsmOperand'
4726 : MCK_Mem256, // user defined class 'X86Mem256AsmOperand'
4727 : MCK_Mem256_RC128, // user defined class 'X86Mem256_RC128Operand'
4728 : MCK_Mem256_RC128X, // user defined class 'X86Mem256_RC128XOperand'
4729 : MCK_Mem256_RC256, // user defined class 'X86Mem256_RC256Operand'
4730 : MCK_Mem256_RC256X, // user defined class 'X86Mem256_RC256XOperand'
4731 : MCK_Mem256_RC512, // user defined class 'X86Mem256_RC512Operand'
4732 : MCK_Mem32, // user defined class 'X86Mem32AsmOperand'
4733 : MCK_Mem512, // user defined class 'X86Mem512AsmOperand'
4734 : MCK_Mem512_RC256X, // user defined class 'X86Mem512_RC256XOperand'
4735 : MCK_Mem512_RC512, // user defined class 'X86Mem512_RC512Operand'
4736 : MCK_Mem64, // user defined class 'X86Mem64AsmOperand'
4737 : MCK_Mem64_RC128, // user defined class 'X86Mem64_RC128Operand'
4738 : MCK_Mem64_RC128X, // user defined class 'X86Mem64_RC128XOperand'
4739 : MCK_Mem80, // user defined class 'X86Mem80AsmOperand'
4740 : MCK_Mem8, // user defined class 'X86Mem8AsmOperand'
4741 : MCK_Mem, // user defined class 'X86MemAsmOperand'
4742 : NumMatchClassKinds
4743 : };
4744 :
4745 : }
4746 :
4747 0 : static unsigned getDiagKindFromRegisterClass(MatchClassKind RegisterClass) {
4748 0 : return MCTargetAsmParser::Match_InvalidOperand;
4749 : }
4750 :
4751 140215 : static MatchClassKind matchTokenString(StringRef Name) {
4752 140215 : switch (Name.size()) {
4753 : default: break;
4754 60081 : case 1: // 7 strings to match.
4755 : switch (Name[0]) {
4756 : default: break;
4757 : case '*': // 1 string to match.
4758 : return MCK__STAR_; // "*"
4759 510 : case 'b': // 1 string to match.
4760 510 : return MCK_b; // "b"
4761 1975 : case 'd': // 1 string to match.
4762 1975 : return MCK_d; // "d"
4763 2340 : case 'q': // 1 string to match.
4764 2340 : return MCK_q; // "q"
4765 2310 : case 'w': // 1 string to match.
4766 2310 : return MCK_w; // "w"
4767 26318 : case '{': // 1 string to match.
4768 26318 : return MCK__123_; // "{"
4769 26318 : case '}': // 1 string to match.
4770 26318 : return MCK__125_; // "}"
4771 : }
4772 : break;
4773 33359 : case 2: // 8 strings to match.
4774 : switch (Name[0]) {
4775 : default: break;
4776 9439 : case 'p': // 2 strings to match.
4777 : switch (Name[1]) {
4778 : default: break;
4779 : case 'd': // 1 string to match.
4780 : return MCK_pd; // "pd"
4781 5645 : case 's': // 1 string to match.
4782 5645 : return MCK_ps; // "ps"
4783 : }
4784 : break;
4785 4904 : case 's': // 2 strings to match.
4786 : switch (Name[1]) {
4787 : default: break;
4788 : case 'd': // 1 string to match.
4789 : return MCK_sd; // "sd"
4790 2662 : case 's': // 1 string to match.
4791 2662 : return MCK_ss; // "ss"
4792 : }
4793 : break;
4794 19016 : case 'u': // 4 strings to match.
4795 : switch (Name[1]) {
4796 : default: break;
4797 : case 'b': // 1 string to match.
4798 : return MCK_ub; // "ub"
4799 : case 'd': // 1 string to match.
4800 : return MCK_ud; // "ud"
4801 : case 'q': // 1 string to match.
4802 : return MCK_uq; // "uq"
4803 : case 'w': // 1 string to match.
4804 : return MCK_uw; // "uw"
4805 : }
4806 : break;
4807 : }
4808 : break;
4809 : case 3: // 1 string to match.
4810 7664 : if (memcmp(Name.data()+0, "{z}", 3) != 0)
4811 : break;
4812 : return MCK__123_z_125_; // "{z}"
4813 : case 5: // 1 string to match.
4814 508 : if (memcmp(Name.data()+0, "{sae}", 5) != 0)
4815 : break;
4816 : return MCK__123_sae_125_; // "{sae}"
4817 : case 6: // 3 strings to match.
4818 25421 : if (memcmp(Name.data()+0, "{1to", 4) != 0)
4819 : break;
4820 : switch (Name[4]) {
4821 : default: break;
4822 590 : case '2': // 1 string to match.
4823 590 : if (Name[5] != '}')
4824 : break;
4825 : return MCK__123_1to2_125_; // "{1to2}"
4826 2187 : case '4': // 1 string to match.
4827 2187 : if (Name[5] != '}')
4828 : break;
4829 : return MCK__123_1to4_125_; // "{1to4}"
4830 22644 : case '8': // 1 string to match.
4831 22644 : if (Name[5] != '}')
4832 : break;
4833 : return MCK__123_1to8_125_; // "{1to8}"
4834 : }
4835 : break;
4836 : case 7: // 1 string to match.
4837 13182 : if (memcmp(Name.data()+0, "{1to16}", 7) != 0)
4838 : break;
4839 : return MCK__123_1to16_125_; // "{1to16}"
4840 : }
4841 : return InvalidMatchClass;
4842 : }
4843 :
4844 : /// isSubclass - Compute whether \p A is a subclass of \p B.
4845 1745714 : static bool isSubclass(MatchClassKind A, MatchClassKind B) {
4846 1745714 : if (A == B)
4847 : return true;
4848 :
4849 1516943 : switch (A) {
4850 : default:
4851 : return false;
4852 :
4853 3100 : case MCK_Reg31:
4854 : switch (B) {
4855 : default: return false;
4856 : case MCK_GR32_BSI: return true;
4857 : case MCK_GR32_SIDI: return true;
4858 : case MCK_GR32_NOREX_NOSP: return true;
4859 : case MCK_GR32_NOREX: return true;
4860 : case MCK_Reg23: return true;
4861 : case MCK_GR32_NOSP: return true;
4862 : case MCK_GR32: return true;
4863 : case MCK_Reg20: return true;
4864 : case MCK_LOW32_ADDR_ACCESS: return true;
4865 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4866 : }
4867 :
4868 5042 : case MCK_Reg33:
4869 : switch (B) {
4870 : default: return false;
4871 : case MCK_GR32_DIBP: return true;
4872 : case MCK_GR32_SIDI: return true;
4873 : case MCK_GR32_NOREX_NOSP: return true;
4874 : case MCK_GR32_NOREX: return true;
4875 : case MCK_Reg23: return true;
4876 : case MCK_GR32_NOSP: return true;
4877 : case MCK_GR32: return true;
4878 : case MCK_Reg20: return true;
4879 : case MCK_LOW32_ADDR_ACCESS: return true;
4880 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4881 : }
4882 :
4883 1038 : case MCK_Reg35:
4884 : switch (B) {
4885 : default: return false;
4886 : case MCK_GR32_BPSP: return true;
4887 : case MCK_GR32_DIBP: return true;
4888 : case MCK_GR32_NOREX_NOSP: return true;
4889 : case MCK_GR32_NOREX: return true;
4890 : case MCK_Reg23: return true;
4891 : case MCK_GR32_NOSP: return true;
4892 : case MCK_GR32: return true;
4893 : case MCK_Reg20: return true;
4894 : case MCK_LOW32_ADDR_ACCESS: return true;
4895 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4896 : }
4897 :
4898 2631 : case MCK_Reg62:
4899 : switch (B) {
4900 : default: return false;
4901 : case MCK_Reg61: return true;
4902 : case MCK_Reg63: return true;
4903 : case MCK_Reg47: return true;
4904 : case MCK_Reg50: return true;
4905 : case MCK_GR64_NOREX_NOSP: return true;
4906 : case MCK_Reg42: return true;
4907 : case MCK_Reg48: return true;
4908 : case MCK_GR64_NOREX: return true;
4909 : case MCK_GR64_TC: return true;
4910 : case MCK_GR64_NOSP: return true;
4911 : case MCK_Reg43: return true;
4912 : case MCK_GR64: return true;
4913 : }
4914 :
4915 4293 : case MCK_Reg64:
4916 : switch (B) {
4917 : default: return false;
4918 : case MCK_Reg63: return true;
4919 : case MCK_Reg65: return true;
4920 : case MCK_Reg47: return true;
4921 : case MCK_Reg50: return true;
4922 : case MCK_GR64_NOREX_NOSP: return true;
4923 : case MCK_Reg42: return true;
4924 : case MCK_Reg48: return true;
4925 : case MCK_GR64_NOREX: return true;
4926 : case MCK_GR64_TC: return true;
4927 : case MCK_GR64_NOSP: return true;
4928 : case MCK_Reg43: return true;
4929 : case MCK_GR64: return true;
4930 : }
4931 :
4932 1022 : case MCK_Reg66:
4933 : switch (B) {
4934 : default: return false;
4935 : case MCK_Reg65: return true;
4936 : case MCK_Reg67: return true;
4937 : case MCK_Reg68: return true;
4938 : case MCK_GR64_NOREX_NOSP: return true;
4939 : case MCK_Reg42: return true;
4940 : case MCK_Reg23: return true;
4941 : case MCK_GR64_NOREX: return true;
4942 : case MCK_GR64_NOSP: return true;
4943 : case MCK_Reg43: return true;
4944 : case MCK_Reg20: return true;
4945 : case MCK_GR64: return true;
4946 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4947 : }
4948 :
4949 0 : case MCK_Reg69:
4950 : switch (B) {
4951 : default: return false;
4952 : case MCK_Reg68: return true;
4953 : case MCK_Reg55: return true;
4954 : case MCK_Reg50: return true;
4955 : case MCK_Reg54: return true;
4956 : case MCK_GR64_TCW64: return true;
4957 : case MCK_GR64_NOREX: return true;
4958 : case MCK_GR64_TC: return true;
4959 : case MCK_GR64: return true;
4960 : case MCK_LOW32_ADDR_ACCESS: return true;
4961 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
4962 : }
4963 :
4964 7254 : case MCK_AL:
4965 7254 : switch (B) {
4966 : default: return false;
4967 0 : case MCK_GR8_ABCD_L: return true;
4968 0 : case MCK_GR8_NOREX: return true;
4969 367 : case MCK_GR8: return true;
4970 : }
4971 :
4972 8741 : case MCK_AX:
4973 8741 : switch (B) {
4974 : default: return false;
4975 0 : case MCK_GR16_ABCD: return true;
4976 0 : case MCK_GR16_NOREX: return true;
4977 366 : case MCK_GR16: return true;
4978 : }
4979 :
4980 8317 : case MCK_CL:
4981 8317 : switch (B) {
4982 : default: return false;
4983 0 : case MCK_GR8_ABCD_L: return true;
4984 0 : case MCK_GR8_NOREX: return true;
4985 444 : case MCK_GR8: return true;
4986 : }
4987 :
4988 926 : case MCK_CS:
4989 926 : return B == MCK_SEGMENT_REG;
4990 :
4991 915 : case MCK_DS:
4992 915 : return B == MCK_SEGMENT_REG;
4993 :
4994 651 : case MCK_DX:
4995 651 : switch (B) {
4996 : default: return false;
4997 0 : case MCK_GR16_ABCD: return true;
4998 0 : case MCK_GR16_NOREX: return true;
4999 123 : case MCK_GR16: return true;
5000 : }
5001 :
5002 98830 : case MCK_EAX:
5003 : switch (B) {
5004 : default: return false;
5005 : case MCK_GR32_AD: return true;
5006 : case MCK_GR32_TC: return true;
5007 : case MCK_GR32_ABCD: return true;
5008 : case MCK_GR32_NOREX_NOSP: return true;
5009 : case MCK_GR32_NOREX: return true;
5010 : case MCK_Reg23: return true;
5011 : case MCK_GR32_NOSP: return true;
5012 : case MCK_GR32: return true;
5013 : case MCK_Reg20: return true;
5014 : case MCK_LOW32_ADDR_ACCESS: return true;
5015 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5016 : }
5017 :
5018 2210 : case MCK_EBX:
5019 : switch (B) {
5020 : default: return false;
5021 : case MCK_GR32_BSI: return true;
5022 : case MCK_GR32_CB: return true;
5023 : case MCK_GR32_ABCD: return true;
5024 : case MCK_GR32_NOREX_NOSP: return true;
5025 : case MCK_GR32_NOREX: return true;
5026 : case MCK_Reg23: return true;
5027 : case MCK_GR32_NOSP: return true;
5028 : case MCK_GR32: return true;
5029 : case MCK_Reg20: return true;
5030 : case MCK_LOW32_ADDR_ACCESS: return true;
5031 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5032 : }
5033 :
5034 6283 : case MCK_ECX:
5035 : switch (B) {
5036 : default: return false;
5037 : case MCK_GR32_CB: return true;
5038 : case MCK_GR32_DC: return true;
5039 : case MCK_GR32_TC: return true;
5040 : case MCK_GR32_ABCD: return true;
5041 : case MCK_GR32_NOREX_NOSP: return true;
5042 : case MCK_GR32_NOREX: return true;
5043 : case MCK_Reg23: return true;
5044 : case MCK_GR32_NOSP: return true;
5045 : case MCK_GR32: return true;
5046 : case MCK_Reg20: return true;
5047 : case MCK_LOW32_ADDR_ACCESS: return true;
5048 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5049 : }
5050 :
5051 2475 : case MCK_EDX:
5052 : switch (B) {
5053 : default: return false;
5054 : case MCK_GR32_AD: return true;
5055 : case MCK_GR32_DC: return true;
5056 : case MCK_GR32_TC: return true;
5057 : case MCK_GR32_ABCD: return true;
5058 : case MCK_GR32_NOREX_NOSP: return true;
5059 : case MCK_GR32_NOREX: return true;
5060 : case MCK_Reg23: return true;
5061 : case MCK_GR32_NOSP: return true;
5062 : case MCK_GR32: return true;
5063 : case MCK_Reg20: return true;
5064 : case MCK_LOW32_ADDR_ACCESS: return true;
5065 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5066 : }
5067 :
5068 983 : case MCK_ES:
5069 983 : return B == MCK_SEGMENT_REG;
5070 :
5071 1365 : case MCK_FS:
5072 1365 : return B == MCK_SEGMENT_REG;
5073 :
5074 1423 : case MCK_GS:
5075 1423 : return B == MCK_SEGMENT_REG;
5076 :
5077 10580 : case MCK_RAX:
5078 : switch (B) {
5079 : default: return false;
5080 : case MCK_GR64_AD: return true;
5081 : case MCK_Reg39: return true;
5082 : case MCK_Reg55: return true;
5083 : case MCK_GR64_ABCD: return true;
5084 : case MCK_Reg47: return true;
5085 : case MCK_Reg50: return true;
5086 : case MCK_Reg53: return true;
5087 : case MCK_Reg51: return true;
5088 : case MCK_Reg54: return true;
5089 : case MCK_GR64_NOREX_NOSP: return true;
5090 : case MCK_Reg42: return true;
5091 : case MCK_Reg48: return true;
5092 : case MCK_GR64_TCW64: return true;
5093 : case MCK_GR64_NOREX: return true;
5094 : case MCK_GR64_TC: return true;
5095 : case MCK_GR64_NOSP: return true;
5096 : case MCK_Reg43: return true;
5097 : case MCK_GR64: return true;
5098 : }
5099 :
5100 1717 : case MCK_RBX:
5101 : switch (B) {
5102 : default: return false;
5103 : case MCK_Reg59: return true;
5104 : case MCK_Reg61: return true;
5105 : case MCK_GR64_ABCD: return true;
5106 : case MCK_GR64_NOREX_NOSP: return true;
5107 : case MCK_Reg42: return true;
5108 : case MCK_GR64_NOREX: return true;
5109 : case MCK_GR64_NOSP: return true;
5110 : case MCK_Reg43: return true;
5111 : case MCK_GR64: return true;
5112 : }
5113 :
5114 3383 : case MCK_RCX:
5115 : switch (B) {
5116 : default: return false;
5117 : case MCK_Reg57: return true;
5118 : case MCK_Reg59: return true;
5119 : case MCK_Reg39: return true;
5120 : case MCK_Reg55: return true;
5121 : case MCK_GR64_ABCD: return true;
5122 : case MCK_Reg47: return true;
5123 : case MCK_Reg50: return true;
5124 : case MCK_Reg53: return true;
5125 : case MCK_Reg51: return true;
5126 : case MCK_Reg54: return true;
5127 : case MCK_GR64_NOREX_NOSP: return true;
5128 : case MCK_Reg42: return true;
5129 : case MCK_Reg48: return true;
5130 : case MCK_GR64_TCW64: return true;
5131 : case MCK_GR64_NOREX: return true;
5132 : case MCK_GR64_TC: return true;
5133 : case MCK_GR64_NOSP: return true;
5134 : case MCK_Reg43: return true;
5135 : case MCK_GR64: return true;
5136 : }
5137 :
5138 1537 : case MCK_RDX:
5139 : switch (B) {
5140 : default: return false;
5141 : case MCK_Reg57: return true;
5142 : case MCK_GR64_AD: return true;
5143 : case MCK_Reg39: return true;
5144 : case MCK_Reg55: return true;
5145 : case MCK_GR64_ABCD: return true;
5146 : case MCK_Reg47: return true;
5147 : case MCK_Reg50: return true;
5148 : case MCK_Reg53: return true;
5149 : case MCK_Reg51: return true;
5150 : case MCK_Reg54: return true;
5151 : case MCK_GR64_NOREX_NOSP: return true;
5152 : case MCK_Reg42: return true;
5153 : case MCK_Reg48: return true;
5154 : case MCK_GR64_TCW64: return true;
5155 : case MCK_GR64_NOREX: return true;
5156 : case MCK_GR64_TC: return true;
5157 : case MCK_GR64_NOSP: return true;
5158 : case MCK_Reg43: return true;
5159 : case MCK_GR64: return true;
5160 : }
5161 :
5162 927 : case MCK_SS:
5163 927 : return B == MCK_SEGMENT_REG;
5164 :
5165 814 : case MCK_ST0:
5166 814 : return B == MCK_RST;
5167 :
5168 11319 : case MCK_XMM0:
5169 : switch (B) {
5170 : default: return false;
5171 : case MCK_VR128L: return true;
5172 : case MCK_FR32: return true;
5173 : case MCK_FR32X: return true;
5174 : }
5175 :
5176 0 : case MCK_Reg57:
5177 : switch (B) {
5178 : default: return false;
5179 : case MCK_Reg39: return true;
5180 : case MCK_Reg55: return true;
5181 : case MCK_GR64_ABCD: return true;
5182 : case MCK_Reg47: return true;
5183 : case MCK_Reg50: return true;
5184 : case MCK_Reg53: return true;
5185 : case MCK_Reg51: return true;
5186 : case MCK_Reg54: return true;
5187 : case MCK_GR64_NOREX_NOSP: return true;
5188 : case MCK_Reg42: return true;
5189 : case MCK_Reg48: return true;
5190 : case MCK_GR64_TCW64: return true;
5191 : case MCK_GR64_NOREX: return true;
5192 : case MCK_GR64_TC: return true;
5193 : case MCK_GR64_NOSP: return true;
5194 : case MCK_Reg43: return true;
5195 : case MCK_GR64: return true;
5196 : }
5197 :
5198 0 : case MCK_Reg59:
5199 : switch (B) {
5200 : default: return false;
5201 : case MCK_GR64_ABCD: return true;
5202 : case MCK_GR64_NOREX_NOSP: return true;
5203 : case MCK_Reg42: return true;
5204 : case MCK_GR64_NOREX: return true;
5205 : case MCK_GR64_NOSP: return true;
5206 : case MCK_Reg43: return true;
5207 : case MCK_GR64: return true;
5208 : }
5209 :
5210 0 : case MCK_Reg61:
5211 : switch (B) {
5212 : default: return false;
5213 : case MCK_GR64_NOREX_NOSP: return true;
5214 : case MCK_Reg42: return true;
5215 : case MCK_GR64_NOREX: return true;
5216 : case MCK_GR64_NOSP: return true;
5217 : case MCK_Reg43: return true;
5218 : case MCK_GR64: return true;
5219 : }
5220 :
5221 0 : case MCK_Reg63:
5222 : switch (B) {
5223 : default: return false;
5224 : case MCK_Reg47: return true;
5225 : case MCK_Reg50: return true;
5226 : case MCK_GR64_NOREX_NOSP: return true;
5227 : case MCK_Reg42: return true;
5228 : case MCK_Reg48: return true;
5229 : case MCK_GR64_NOREX: return true;
5230 : case MCK_GR64_TC: return true;
5231 : case MCK_GR64_NOSP: return true;
5232 : case MCK_Reg43: return true;
5233 : case MCK_GR64: return true;
5234 : }
5235 :
5236 0 : case MCK_Reg65:
5237 : switch (B) {
5238 : default: return false;
5239 : case MCK_GR64_NOREX_NOSP: return true;
5240 : case MCK_Reg42: return true;
5241 : case MCK_GR64_NOREX: return true;
5242 : case MCK_GR64_NOSP: return true;
5243 : case MCK_Reg43: return true;
5244 : case MCK_GR64: return true;
5245 : }
5246 :
5247 1716 : case MCK_Reg67:
5248 : switch (B) {
5249 : default: return false;
5250 : case MCK_Reg42: return true;
5251 : case MCK_GR64_NOREX: return true;
5252 : case MCK_Reg43: return true;
5253 : case MCK_GR64: return true;
5254 : }
5255 :
5256 0 : case MCK_Reg68:
5257 : switch (B) {
5258 : default: return false;
5259 : case MCK_GR64_NOREX: return true;
5260 : case MCK_GR64: return true;
5261 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5262 : }
5263 :
5264 0 : case MCK_GR32_AD:
5265 : switch (B) {
5266 : default: return false;
5267 : case MCK_GR32_TC: return true;
5268 : case MCK_GR32_ABCD: return true;
5269 : case MCK_GR32_NOREX_NOSP: return true;
5270 : case MCK_GR32_NOREX: return true;
5271 : case MCK_Reg23: return true;
5272 : case MCK_GR32_NOSP: return true;
5273 : case MCK_GR32: return true;
5274 : case MCK_Reg20: return true;
5275 : case MCK_LOW32_ADDR_ACCESS: return true;
5276 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5277 : }
5278 :
5279 347 : case MCK_GR32_BPSP:
5280 : switch (B) {
5281 : default: return false;
5282 : case MCK_GR32_NOREX: return true;
5283 : case MCK_Reg23: return true;
5284 : case MCK_GR32: return true;
5285 : case MCK_Reg20: return true;
5286 : case MCK_LOW32_ADDR_ACCESS: return true;
5287 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5288 : }
5289 :
5290 0 : case MCK_GR32_BSI:
5291 : switch (B) {
5292 : default: return false;
5293 : case MCK_GR32_NOREX_NOSP: return true;
5294 : case MCK_GR32_NOREX: return true;
5295 : case MCK_Reg23: return true;
5296 : case MCK_GR32_NOSP: return true;
5297 : case MCK_GR32: return true;
5298 : case MCK_Reg20: return true;
5299 : case MCK_LOW32_ADDR_ACCESS: return true;
5300 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5301 : }
5302 :
5303 0 : case MCK_GR32_CB:
5304 : switch (B) {
5305 : default: return false;
5306 : case MCK_GR32_ABCD: return true;
5307 : case MCK_GR32_NOREX_NOSP: return true;
5308 : case MCK_GR32_NOREX: return true;
5309 : case MCK_Reg23: return true;
5310 : case MCK_GR32_NOSP: return true;
5311 : case MCK_GR32: return true;
5312 : case MCK_Reg20: return true;
5313 : case MCK_LOW32_ADDR_ACCESS: return true;
5314 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5315 : }
5316 :
5317 0 : case MCK_GR32_DC:
5318 : switch (B) {
5319 : default: return false;
5320 : case MCK_GR32_TC: return true;
5321 : case MCK_GR32_ABCD: return true;
5322 : case MCK_GR32_NOREX_NOSP: return true;
5323 : case MCK_GR32_NOREX: return true;
5324 : case MCK_Reg23: return true;
5325 : case MCK_GR32_NOSP: return true;
5326 : case MCK_GR32: return true;
5327 : case MCK_Reg20: return true;
5328 : case MCK_LOW32_ADDR_ACCESS: return true;
5329 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5330 : }
5331 :
5332 0 : case MCK_GR32_DIBP:
5333 : switch (B) {
5334 : default: return false;
5335 : case MCK_GR32_NOREX_NOSP: return true;
5336 : case MCK_GR32_NOREX: return true;
5337 : case MCK_Reg23: return true;
5338 : case MCK_GR32_NOSP: return true;
5339 : case MCK_GR32: return true;
5340 : case MCK_Reg20: return true;
5341 : case MCK_LOW32_ADDR_ACCESS: return true;
5342 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5343 : }
5344 :
5345 0 : case MCK_GR32_SIDI:
5346 : switch (B) {
5347 : default: return false;
5348 : case MCK_GR32_NOREX_NOSP: return true;
5349 : case MCK_GR32_NOREX: return true;
5350 : case MCK_Reg23: return true;
5351 : case MCK_GR32_NOSP: return true;
5352 : case MCK_GR32: return true;
5353 : case MCK_Reg20: return true;
5354 : case MCK_LOW32_ADDR_ACCESS: return true;
5355 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5356 : }
5357 :
5358 0 : case MCK_GR64_AD:
5359 : switch (B) {
5360 : default: return false;
5361 : case MCK_Reg39: return true;
5362 : case MCK_Reg55: return true;
5363 : case MCK_GR64_ABCD: return true;
5364 : case MCK_Reg47: return true;
5365 : case MCK_Reg50: return true;
5366 : case MCK_Reg53: return true;
5367 : case MCK_Reg51: return true;
5368 : case MCK_Reg54: return true;
5369 : case MCK_GR64_NOREX_NOSP: return true;
5370 : case MCK_Reg42: return true;
5371 : case MCK_Reg48: return true;
5372 : case MCK_GR64_TCW64: return true;
5373 : case MCK_GR64_NOREX: return true;
5374 : case MCK_GR64_TC: return true;
5375 : case MCK_GR64_NOSP: return true;
5376 : case MCK_Reg43: return true;
5377 : case MCK_GR64: return true;
5378 : }
5379 :
5380 0 : case MCK_Reg39:
5381 : switch (B) {
5382 : default: return false;
5383 : case MCK_Reg55: return true;
5384 : case MCK_GR64_ABCD: return true;
5385 : case MCK_Reg47: return true;
5386 : case MCK_Reg50: return true;
5387 : case MCK_Reg53: return true;
5388 : case MCK_Reg51: return true;
5389 : case MCK_Reg54: return true;
5390 : case MCK_GR64_NOREX_NOSP: return true;
5391 : case MCK_Reg42: return true;
5392 : case MCK_Reg48: return true;
5393 : case MCK_GR64_TCW64: return true;
5394 : case MCK_GR64_NOREX: return true;
5395 : case MCK_GR64_TC: return true;
5396 : case MCK_GR64_NOSP: return true;
5397 : case MCK_Reg43: return true;
5398 : case MCK_GR64: return true;
5399 : }
5400 :
5401 0 : case MCK_GR32_TC:
5402 : switch (B) {
5403 : default: return false;
5404 : case MCK_GR32_ABCD: return true;
5405 : case MCK_GR32_NOREX_NOSP: return true;
5406 : case MCK_GR32_NOREX: return true;
5407 : case MCK_Reg23: return true;
5408 : case MCK_GR32_NOSP: return true;
5409 : case MCK_GR32: return true;
5410 : case MCK_Reg20: return true;
5411 : case MCK_LOW32_ADDR_ACCESS: return true;
5412 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5413 : }
5414 :
5415 0 : case MCK_Reg55:
5416 : switch (B) {
5417 : default: return false;
5418 : case MCK_Reg50: return true;
5419 : case MCK_Reg54: return true;
5420 : case MCK_GR64_TCW64: return true;
5421 : case MCK_GR64_NOREX: return true;
5422 : case MCK_GR64_TC: return true;
5423 : case MCK_GR64: return true;
5424 : }
5425 :
5426 2851 : case MCK_GR16_ABCD:
5427 2851 : switch (B) {
5428 : default: return false;
5429 0 : case MCK_GR16_NOREX: return true;
5430 806 : case MCK_GR16: return true;
5431 : }
5432 :
5433 0 : case MCK_GR32_ABCD:
5434 : switch (B) {
5435 : default: return false;
5436 : case MCK_GR32_NOREX_NOSP: return true;
5437 : case MCK_GR32_NOREX: return true;
5438 : case MCK_Reg23: return true;
5439 : case MCK_GR32_NOSP: return true;
5440 : case MCK_GR32: return true;
5441 : case MCK_Reg20: return true;
5442 : case MCK_LOW32_ADDR_ACCESS: return true;
5443 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5444 : }
5445 :
5446 0 : case MCK_GR64_ABCD:
5447 : switch (B) {
5448 : default: return false;
5449 : case MCK_GR64_NOREX_NOSP: return true;
5450 : case MCK_Reg42: return true;
5451 : case MCK_GR64_NOREX: return true;
5452 : case MCK_GR64_NOSP: return true;
5453 : case MCK_Reg43: return true;
5454 : case MCK_GR64: return true;
5455 : }
5456 :
5457 40 : case MCK_GR8_ABCD_H:
5458 40 : switch (B) {
5459 : default: return false;
5460 0 : case MCK_GR8_NOREX: return true;
5461 9 : case MCK_GR8: return true;
5462 : }
5463 :
5464 286 : case MCK_GR8_ABCD_L:
5465 286 : switch (B) {
5466 : default: return false;
5467 0 : case MCK_GR8_NOREX: return true;
5468 234 : case MCK_GR8: return true;
5469 : }
5470 :
5471 0 : case MCK_Reg47:
5472 : switch (B) {
5473 : default: return false;
5474 : case MCK_Reg50: return true;
5475 : case MCK_GR64_NOREX_NOSP: return true;
5476 : case MCK_Reg42: return true;
5477 : case MCK_Reg48: return true;
5478 : case MCK_GR64_NOREX: return true;
5479 : case MCK_GR64_TC: return true;
5480 : case MCK_GR64_NOSP: return true;
5481 : case MCK_Reg43: return true;
5482 : case MCK_GR64: return true;
5483 : }
5484 :
5485 0 : case MCK_Reg50:
5486 : switch (B) {
5487 : default: return false;
5488 : case MCK_GR64_NOREX: return true;
5489 : case MCK_GR64_TC: return true;
5490 : case MCK_GR64: return true;
5491 : }
5492 :
5493 1130 : case MCK_Reg53:
5494 : switch (B) {
5495 : default: return false;
5496 : case MCK_Reg51: return true;
5497 : case MCK_Reg54: return true;
5498 : case MCK_Reg48: return true;
5499 : case MCK_GR64_TCW64: return true;
5500 : case MCK_GR64_TC: return true;
5501 : case MCK_GR64_NOSP: return true;
5502 : case MCK_Reg43: return true;
5503 : case MCK_GR64: return true;
5504 : }
5505 :
5506 74 : case MCK_Reg51:
5507 : switch (B) {
5508 : default: return false;
5509 : case MCK_GR64_TCW64: return true;
5510 : case MCK_GR64_NOSP: return true;
5511 : case MCK_Reg43: return true;
5512 : case MCK_GR64: return true;
5513 : }
5514 :
5515 0 : case MCK_Reg54:
5516 : switch (B) {
5517 : default: return false;
5518 : case MCK_GR64_TCW64: return true;
5519 : case MCK_GR64_TC: return true;
5520 : case MCK_GR64: return true;
5521 : }
5522 :
5523 0 : case MCK_GR32_NOREX_NOSP:
5524 : switch (B) {
5525 : default: return false;
5526 : case MCK_GR32_NOREX: return true;
5527 : case MCK_Reg23: return true;
5528 : case MCK_GR32_NOSP: return true;
5529 : case MCK_GR32: return true;
5530 : case MCK_Reg20: return true;
5531 : case MCK_LOW32_ADDR_ACCESS: return true;
5532 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5533 : }
5534 :
5535 0 : case MCK_GR64_NOREX_NOSP:
5536 : switch (B) {
5537 : default: return false;
5538 : case MCK_Reg42: return true;
5539 : case MCK_GR64_NOREX: return true;
5540 : case MCK_GR64_NOSP: return true;
5541 : case MCK_Reg43: return true;
5542 : case MCK_GR64: return true;
5543 : }
5544 :
5545 6814 : case MCK_VK16WM:
5546 6814 : return B == MCK_VK1;
5547 :
5548 0 : case MCK_Reg42:
5549 : switch (B) {
5550 : default: return false;
5551 : case MCK_GR64_NOREX: return true;
5552 : case MCK_Reg43: return true;
5553 : case MCK_GR64: return true;
5554 : }
5555 :
5556 0 : case MCK_Reg48:
5557 : switch (B) {
5558 : default: return false;
5559 : case MCK_GR64_TC: return true;
5560 : case MCK_GR64_NOSP: return true;
5561 : case MCK_Reg43: return true;
5562 : case MCK_GR64: return true;
5563 : }
5564 :
5565 97185 : case MCK_Reg81:
5566 97185 : switch (B) {
5567 : default: return false;
5568 0 : case MCK_Reg82: return true;
5569 42635 : case MCK_VR512: return true;
5570 : }
5571 :
5572 25101 : case MCK_Reg84:
5573 25101 : switch (B) {
5574 : default: return false;
5575 0 : case MCK_Reg82: return true;
5576 9449 : case MCK_VR512: return true;
5577 : }
5578 :
5579 6098 : case MCK_GR16_NOREX:
5580 6098 : return B == MCK_GR16;
5581 :
5582 0 : case MCK_GR32_NOREX:
5583 : switch (B) {
5584 : default: return false;
5585 : case MCK_Reg23: return true;
5586 : case MCK_GR32: return true;
5587 : case MCK_Reg20: return true;
5588 : case MCK_LOW32_ADDR_ACCESS: return true;
5589 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5590 : }
5591 :
5592 0 : case MCK_GR64_TCW64:
5593 0 : return B == MCK_GR64;
5594 :
5595 0 : case MCK_GR8_NOREX:
5596 0 : return B == MCK_GR8;
5597 :
5598 14421 : case MCK_VR128H:
5599 14421 : switch (B) {
5600 : default: return false;
5601 7958 : case MCK_FR32: return true;
5602 3846 : case MCK_FR32X: return true;
5603 : }
5604 :
5605 42027 : case MCK_VR128L:
5606 42027 : switch (B) {
5607 : default: return false;
5608 32241 : case MCK_FR32: return true;
5609 4979 : case MCK_FR32X: return true;
5610 : }
5611 :
5612 8962 : case MCK_VR256H:
5613 8962 : switch (B) {
5614 : default: return false;
5615 3973 : case MCK_VR256: return true;
5616 227 : case MCK_VR256X: return true;
5617 : }
5618 :
5619 34353 : case MCK_VR256L:
5620 34353 : switch (B) {
5621 : default: return false;
5622 17789 : case MCK_VR256: return true;
5623 1937 : case MCK_VR256X: return true;
5624 : }
5625 :
5626 0 : case MCK_Reg23:
5627 0 : switch (B) {
5628 : default: return false;
5629 0 : case MCK_Reg20: return true;
5630 0 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5631 : }
5632 :
5633 0 : case MCK_GR64_NOREX:
5634 0 : return B == MCK_GR64;
5635 :
5636 0 : case MCK_GR64_TC:
5637 0 : return B == MCK_GR64;
5638 :
5639 1402 : case MCK_GR32_NOSP:
5640 : switch (B) {
5641 : default: return false;
5642 : case MCK_GR32: return true;
5643 : case MCK_Reg20: return true;
5644 : case MCK_LOW32_ADDR_ACCESS: return true;
5645 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5646 : }
5647 :
5648 692 : case MCK_GR64_NOSP:
5649 692 : switch (B) {
5650 : default: return false;
5651 0 : case MCK_Reg43: return true;
5652 424 : case MCK_GR64: return true;
5653 : }
5654 :
5655 0 : case MCK_Reg43:
5656 0 : return B == MCK_GR64;
5657 :
5658 0 : case MCK_Reg82:
5659 0 : return B == MCK_VR512;
5660 :
5661 90998 : case MCK_FR32:
5662 90998 : return B == MCK_FR32X;
5663 :
5664 29940 : case MCK_GR32:
5665 : switch (B) {
5666 : default: return false;
5667 : case MCK_Reg20: return true;
5668 : case MCK_LOW32_ADDR_ACCESS: return true;
5669 : case MCK_LOW32_ADDR_ACCESS_RBP: return true;
5670 : }
5671 :
5672 53420 : case MCK_VR256:
5673 53420 : return B == MCK_VR256X;
5674 :
5675 0 : case MCK_Reg20:
5676 0 : return B == MCK_LOW32_ADDR_ACCESS_RBP;
5677 :
5678 0 : case MCK_LOW32_ADDR_ACCESS:
5679 0 : return B == MCK_LOW32_ADDR_ACCESS_RBP;
5680 :
5681 2848 : case MCK_ImmSExti64i8:
5682 : switch (B) {
5683 : default: return false;
5684 : case MCK_ImmSExti16i8: return true;
5685 : case MCK_ImmSExti32i8: return true;
5686 : case MCK_ImmSExti64i32: return true;
5687 : case MCK_Imm: return true;
5688 : }
5689 :
5690 3143 : case MCK_ImmSExti16i8:
5691 3143 : switch (B) {
5692 : default: return false;
5693 0 : case MCK_ImmSExti64i32: return true;
5694 0 : case MCK_Imm: return true;
5695 : }
5696 :
5697 3246 : case MCK_ImmSExti32i8:
5698 3246 : return B == MCK_Imm;
5699 :
5700 1855 : case MCK_ImmSExti64i32:
5701 1855 : return B == MCK_Imm;
5702 :
5703 2 : case MCK_AbsMem16:
5704 2 : switch (B) {
5705 : default: return false;
5706 0 : case MCK_AbsMem: return true;
5707 0 : case MCK_Mem: return true;
5708 : }
5709 :
5710 20 : case MCK_DstIdx16:
5711 20 : switch (B) {
5712 : default: return false;
5713 0 : case MCK_Mem16: return true;
5714 0 : case MCK_Mem: return true;
5715 : }
5716 :
5717 27 : case MCK_DstIdx32:
5718 27 : switch (B) {
5719 : default: return false;
5720 0 : case MCK_Mem32: return true;
5721 0 : case MCK_Mem: return true;
5722 : }
5723 :
5724 2 : case MCK_DstIdx64:
5725 2 : switch (B) {
5726 : default: return false;
5727 0 : case MCK_Mem64: return true;
5728 0 : case MCK_Mem: return true;
5729 : }
5730 :
5731 26 : case MCK_DstIdx8:
5732 26 : switch (B) {
5733 : default: return false;
5734 0 : case MCK_Mem8: return true;
5735 0 : case MCK_Mem: return true;
5736 : }
5737 :
5738 2198 : case MCK_MemOffs16_16:
5739 2198 : switch (B) {
5740 : default: return false;
5741 0 : case MCK_Mem16: return true;
5742 0 : case MCK_Mem: return true;
5743 : }
5744 :
5745 3584 : case MCK_MemOffs16_32:
5746 3584 : switch (B) {
5747 : default: return false;
5748 0 : case MCK_Mem32: return true;
5749 0 : case MCK_Mem: return true;
5750 : }
5751 :
5752 2205 : case MCK_MemOffs16_8:
5753 2205 : switch (B) {
5754 : default: return false;
5755 0 : case MCK_Mem8: return true;
5756 0 : case MCK_Mem: return true;
5757 : }
5758 :
5759 2193 : case MCK_MemOffs32_16:
5760 2193 : switch (B) {
5761 : default: return false;
5762 0 : case MCK_Mem16: return true;
5763 0 : case MCK_Mem: return true;
5764 : }
5765 :
5766 3523 : case MCK_MemOffs32_32:
5767 3523 : switch (B) {
5768 : default: return false;
5769 0 : case MCK_Mem32: return true;
5770 0 : case MCK_Mem: return true;
5771 : }
5772 :
5773 2296 : case MCK_MemOffs32_64:
5774 2296 : switch (B) {
5775 : default: return false;
5776 0 : case MCK_Mem64: return true;
5777 0 : case MCK_Mem: return true;
5778 : }
5779 :
5780 2200 : case MCK_MemOffs32_8:
5781 2200 : switch (B) {
5782 : default: return false;
5783 0 : case MCK_Mem8: return true;
5784 0 : case MCK_Mem: return true;
5785 : }
5786 :
5787 4 : case MCK_MemOffs64_16:
5788 4 : switch (B) {
5789 : default: return false;
5790 0 : case MCK_Mem16: return true;
5791 0 : case MCK_Mem: return true;
5792 : }
5793 :
5794 4 : case MCK_MemOffs64_32:
5795 4 : switch (B) {
5796 : default: return false;
5797 0 : case MCK_Mem32: return true;
5798 0 : case MCK_Mem: return true;
5799 : }
5800 :
5801 0 : case MCK_MemOffs64_64:
5802 0 : switch (B) {
5803 : default: return false;
5804 0 : case MCK_Mem64: return true;
5805 0 : case MCK_Mem: return true;
5806 : }
5807 :
5808 4 : case MCK_MemOffs64_8:
5809 4 : switch (B) {
5810 : default: return false;
5811 0 : case MCK_Mem8: return true;
5812 0 : case MCK_Mem: return true;
5813 : }
5814 :
5815 8 : case MCK_SrcIdx16:
5816 8 : switch (B) {
5817 : default: return false;
5818 0 : case MCK_Mem16: return true;
5819 0 : case MCK_Mem: return true;
5820 : }
5821 :
5822 19 : case MCK_SrcIdx32:
5823 19 : switch (B) {
5824 : default: return false;
5825 0 : case MCK_Mem32: return true;
5826 0 : case MCK_Mem: return true;
5827 : }
5828 :
5829 0 : case MCK_SrcIdx64:
5830 0 : switch (B) {
5831 : default: return false;
5832 0 : case MCK_Mem64: return true;
5833 0 : case MCK_Mem: return true;
5834 : }
5835 :
5836 35 : case MCK_SrcIdx8:
5837 35 : switch (B) {
5838 : default: return false;
5839 0 : case MCK_Mem8: return true;
5840 0 : case MCK_Mem: return true;
5841 : }
5842 :
5843 200 : case MCK_AbsMem:
5844 200 : return B == MCK_Mem;
5845 :
5846 15766 : case MCK_Mem128:
5847 15766 : return B == MCK_Mem;
5848 :
5849 0 : case MCK_Mem128_RC128:
5850 0 : return B == MCK_Mem;
5851 :
5852 164 : case MCK_Mem128_RC128X:
5853 164 : return B == MCK_Mem;
5854 :
5855 16 : case MCK_Mem128_RC256:
5856 16 : return B == MCK_Mem;
5857 :
5858 81 : case MCK_Mem128_RC256X:
5859 81 : return B == MCK_Mem;
5860 :
5861 13138 : case MCK_Mem16:
5862 13138 : return B == MCK_Mem;
5863 :
5864 11903 : case MCK_Mem256:
5865 11903 : return B == MCK_Mem;
5866 :
5867 14 : case MCK_Mem256_RC128:
5868 14 : return B == MCK_Mem;
5869 :
5870 35 : case MCK_Mem256_RC128X:
5871 35 : return B == MCK_Mem;
5872 :
5873 0 : case MCK_Mem256_RC256:
5874 0 : return B == MCK_Mem;
5875 :
5876 69 : case MCK_Mem256_RC256X:
5877 69 : return B == MCK_Mem;
5878 :
5879 22 : case MCK_Mem256_RC512:
5880 22 : return B == MCK_Mem;
5881 :
5882 14701 : case MCK_Mem32:
5883 14701 : return B == MCK_Mem;
5884 :
5885 10855 : case MCK_Mem512:
5886 10855 : return B == MCK_Mem;
5887 :
5888 0 : case MCK_Mem512_RC256X:
5889 0 : return B == MCK_Mem;
5890 :
5891 0 : case MCK_Mem512_RC512:
5892 0 : return B == MCK_Mem;
5893 :
5894 18518 : case MCK_Mem64:
5895 18518 : return B == MCK_Mem;
5896 :
5897 0 : case MCK_Mem64_RC128:
5898 0 : return B == MCK_Mem;
5899 :
5900 0 : case MCK_Mem64_RC128X:
5901 0 : return B == MCK_Mem;
5902 :
5903 5 : case MCK_Mem80:
5904 5 : return B == MCK_Mem;
5905 :
5906 10108 : case MCK_Mem8:
5907 10108 : return B == MCK_Mem;
5908 : }
5909 : }
5910 :
5911 1773655 : static unsigned validateOperandClass(MCParsedAsmOperand &GOp, MatchClassKind Kind) {
5912 : X86Operand &Operand = (X86Operand&)GOp;
5913 1773655 : if (Kind == InvalidMatchClass)
5914 : return MCTargetAsmParser::Match_InvalidOperand;
5915 :
5916 1747417 : if (Operand.isToken() && Kind <= MCK_LAST_TOKEN)
5917 280430 : return isSubclass(matchTokenString(Operand.getToken()), Kind) ?
5918 : MCTargetAsmParser::Match_Success :
5919 : MCTargetAsmParser::Match_InvalidOperand;
5920 :
5921 1607202 : switch (Kind) {
5922 : default: break;
5923 : // 'AVX512RC' class
5924 12100 : case MCK_AVX512RC: {
5925 : DiagnosticPredicate DP(Operand.isAVX512RC());
5926 12100 : if (DP.isMatch())
5927 : return MCTargetAsmParser::Match_Success;
5928 : break;
5929 : }
5930 : // 'ImmSExti64i8' class
5931 : case MCK_ImmSExti64i8: {
5932 : DiagnosticPredicate DP(Operand.isImmSExti64i8());
5933 4764 : if (DP.isMatch())
5934 : return MCTargetAsmParser::Match_Success;
5935 : break;
5936 : }
5937 : // 'ImmSExti16i8' class
5938 : case MCK_ImmSExti16i8: {
5939 : DiagnosticPredicate DP(Operand.isImmSExti16i8());
5940 5015 : if (DP.isMatch())
5941 : return MCTargetAsmParser::Match_Success;
5942 : break;
5943 : }
5944 : // 'ImmSExti32i8' class
5945 : case MCK_ImmSExti32i8: {
5946 : DiagnosticPredicate DP(Operand.isImmSExti32i8());
5947 5412 : if (DP.isMatch())
5948 : return MCTargetAsmParser::Match_Success;
5949 : break;
5950 : }
5951 : // 'ImmSExti64i32' class
5952 : case MCK_ImmSExti64i32: {
5953 : DiagnosticPredicate DP(Operand.isImmSExti64i32());
5954 3678 : if (DP.isMatch())
5955 : return MCTargetAsmParser::Match_Success;
5956 : break;
5957 : }
5958 : // 'Imm' class
5959 : case MCK_Imm: {
5960 : DiagnosticPredicate DP(Operand.isImm());
5961 55232 : if (DP.isMatch())
5962 : return MCTargetAsmParser::Match_Success;
5963 : break;
5964 : }
5965 : // 'ImmUnsignedi8' class
5966 : case MCK_ImmUnsignedi8: {
5967 : DiagnosticPredicate DP(Operand.isImmUnsignedi8());
5968 101162 : if (DP.isMatch())
5969 : return MCTargetAsmParser::Match_Success;
5970 : break;
5971 : }
5972 : // 'GR32orGR64' class
5973 623 : case MCK_GR32orGR64: {
5974 623 : DiagnosticPredicate DP(Operand.isGR32orGR64());
5975 623 : if (DP.isMatch())
5976 : return MCTargetAsmParser::Match_Success;
5977 : break;
5978 : }
5979 : // 'AbsMem16' class
5980 : case MCK_AbsMem16: {
5981 : DiagnosticPredicate DP(Operand.isAbsMem16());
5982 2 : if (DP.isMatch())
5983 : return MCTargetAsmParser::Match_Success;
5984 : break;
5985 : }
5986 : // 'DstIdx16' class
5987 237 : case MCK_DstIdx16: {
5988 237 : DiagnosticPredicate DP(Operand.isDstIdx16());
5989 237 : if (DP.isMatch())
5990 : return MCTargetAsmParser::Match_Success;
5991 : break;
5992 : }
5993 : // 'DstIdx32' class
5994 247 : case MCK_DstIdx32: {
5995 247 : DiagnosticPredicate DP(Operand.isDstIdx32());
5996 247 : if (DP.isMatch())
5997 : return MCTargetAsmParser::Match_Success;
5998 : break;
5999 : }
6000 : // 'DstIdx64' class
6001 125 : case MCK_DstIdx64: {
6002 125 : DiagnosticPredicate DP(Operand.isDstIdx64());
6003 125 : if (DP.isMatch())
6004 : return MCTargetAsmParser::Match_Success;
6005 : break;
6006 : }
6007 : // 'DstIdx8' class
6008 246 : case MCK_DstIdx8: {
6009 246 : DiagnosticPredicate DP(Operand.isDstIdx8());
6010 246 : if (DP.isMatch())
6011 : return MCTargetAsmParser::Match_Success;
6012 : break;
6013 : }
6014 : // 'MemOffs16_16' class
6015 2199 : case MCK_MemOffs16_16: {
6016 2199 : DiagnosticPredicate DP(Operand.isMemOffs16_16());
6017 2199 : if (DP.isMatch())
6018 : return MCTargetAsmParser::Match_Success;
6019 : break;
6020 : }
6021 : // 'MemOffs16_32' class
6022 3586 : case MCK_MemOffs16_32: {
6023 3586 : DiagnosticPredicate DP(Operand.isMemOffs16_32());
6024 3586 : if (DP.isMatch())
6025 : return MCTargetAsmParser::Match_Success;
6026 : break;
6027 : }
6028 : // 'MemOffs16_8' class
6029 2206 : case MCK_MemOffs16_8: {
6030 2206 : DiagnosticPredicate DP(Operand.isMemOffs16_8());
6031 2206 : if (DP.isMatch())
6032 : return MCTargetAsmParser::Match_Success;
6033 : break;
6034 : }
6035 : // 'MemOffs32_16' class
6036 2198 : case MCK_MemOffs32_16: {
6037 2198 : DiagnosticPredicate DP(Operand.isMemOffs32_16());
6038 2198 : if (DP.isMatch())
6039 : return MCTargetAsmParser::Match_Success;
6040 : break;
6041 : }
6042 : // 'MemOffs32_32' class
6043 3584 : case MCK_MemOffs32_32: {
6044 3584 : DiagnosticPredicate DP(Operand.isMemOffs32_32());
6045 3584 : if (DP.isMatch())
6046 : return MCTargetAsmParser::Match_Success;
6047 : break;
6048 : }
6049 : // 'MemOffs32_64' class
6050 2307 : case MCK_MemOffs32_64: {
6051 2307 : DiagnosticPredicate DP(Operand.isMemOffs32_64());
6052 2307 : if (DP.isMatch())
6053 : return MCTargetAsmParser::Match_Success;
6054 : break;
6055 : }
6056 : // 'MemOffs32_8' class
6057 2205 : case MCK_MemOffs32_8: {
6058 2205 : DiagnosticPredicate DP(Operand.isMemOffs32_8());
6059 2205 : if (DP.isMatch())
6060 : return MCTargetAsmParser::Match_Success;
6061 : break;
6062 : }
6063 : // 'MemOffs64_16' class
6064 8 : case MCK_MemOffs64_16: {
6065 8 : DiagnosticPredicate DP(Operand.isMemOffs64_16());
6066 8 : if (DP.isMatch())
6067 : return MCTargetAsmParser::Match_Success;
6068 : break;
6069 : }
6070 : // 'MemOffs64_32' class
6071 8 : case MCK_MemOffs64_32: {
6072 8 : DiagnosticPredicate DP(Operand.isMemOffs64_32());
6073 8 : if (DP.isMatch())
6074 : return MCTargetAsmParser::Match_Success;
6075 : break;
6076 : }
6077 : // 'MemOffs64_64' class
6078 4 : case MCK_MemOffs64_64: {
6079 4 : DiagnosticPredicate DP(Operand.isMemOffs64_64());
6080 4 : if (DP.isMatch())
6081 : return MCTargetAsmParser::Match_Success;
6082 : break;
6083 : }
6084 : // 'MemOffs64_8' class
6085 8 : case MCK_MemOffs64_8: {
6086 8 : DiagnosticPredicate DP(Operand.isMemOffs64_8());
6087 8 : if (DP.isMatch())
6088 : return MCTargetAsmParser::Match_Success;
6089 : break;
6090 : }
6091 : // 'SrcIdx16' class
6092 213 : case MCK_SrcIdx16: {
6093 213 : DiagnosticPredicate DP(Operand.isSrcIdx16());
6094 213 : if (DP.isMatch())
6095 : return MCTargetAsmParser::Match_Success;
6096 : break;
6097 : }
6098 : // 'SrcIdx32' class
6099 223 : case MCK_SrcIdx32: {
6100 223 : DiagnosticPredicate DP(Operand.isSrcIdx32());
6101 223 : if (DP.isMatch())
6102 : return MCTargetAsmParser::Match_Success;
6103 : break;
6104 : }
6105 : // 'SrcIdx64' class
6106 96 : case MCK_SrcIdx64: {
6107 96 : DiagnosticPredicate DP(Operand.isSrcIdx64());
6108 96 : if (DP.isMatch())
6109 : return MCTargetAsmParser::Match_Success;
6110 : break;
6111 : }
6112 : // 'SrcIdx8' class
6113 255 : case MCK_SrcIdx8: {
6114 255 : DiagnosticPredicate DP(Operand.isSrcIdx8());
6115 255 : if (DP.isMatch())
6116 : return MCTargetAsmParser::Match_Success;
6117 : break;
6118 : }
6119 : // 'AbsMem' class
6120 : case MCK_AbsMem: {
6121 : DiagnosticPredicate DP(Operand.isAbsMem());
6122 1606 : if (DP.isMatch())
6123 : return MCTargetAsmParser::Match_Success;
6124 : break;
6125 : }
6126 : // 'Mem128' class
6127 95248 : case MCK_Mem128: {
6128 : DiagnosticPredicate DP(Operand.isMem128());
6129 95248 : if (DP.isMatch())
6130 : return MCTargetAsmParser::Match_Success;
6131 : break;
6132 : }
6133 : // 'Mem128_RC128' class
6134 : case MCK_Mem128_RC128: {
6135 : DiagnosticPredicate DP(Operand.isMem128_RC128());
6136 50 : if (DP.isMatch())
6137 : return MCTargetAsmParser::Match_Success;
6138 : break;
6139 : }
6140 : // 'Mem128_RC128X' class
6141 : case MCK_Mem128_RC128X: {
6142 : DiagnosticPredicate DP(Operand.isMem128_RC128X());
6143 308 : if (DP.isMatch())
6144 : return MCTargetAsmParser::Match_Success;
6145 : break;
6146 : }
6147 : // 'Mem128_RC256' class
6148 : case MCK_Mem128_RC256: {
6149 : DiagnosticPredicate DP(Operand.isMem128_RC256());
6150 26 : if (DP.isMatch())
6151 : return MCTargetAsmParser::Match_Success;
6152 : break;
6153 : }
6154 : // 'Mem128_RC256X' class
6155 : case MCK_Mem128_RC256X: {
6156 : DiagnosticPredicate DP(Operand.isMem128_RC256X());
6157 127 : if (DP.isMatch())
6158 : return MCTargetAsmParser::Match_Success;
6159 : break;
6160 : }
6161 : // 'Mem16' class
6162 18707 : case MCK_Mem16: {
6163 : DiagnosticPredicate DP(Operand.isMem16());
6164 18707 : if (DP.isMatch())
6165 : return MCTargetAsmParser::Match_Success;
6166 : break;
6167 : }
6168 : // 'Mem256' class
6169 67846 : case MCK_Mem256: {
6170 : DiagnosticPredicate DP(Operand.isMem256());
6171 67846 : if (DP.isMatch())
6172 : return MCTargetAsmParser::Match_Success;
6173 : break;
6174 : }
6175 : // 'Mem256_RC128' class
6176 : case MCK_Mem256_RC128: {
6177 : DiagnosticPredicate DP(Operand.isMem256_RC128());
6178 32 : if (DP.isMatch())
6179 : return MCTargetAsmParser::Match_Success;
6180 : break;
6181 : }
6182 : // 'Mem256_RC128X' class
6183 : case MCK_Mem256_RC128X: {
6184 : DiagnosticPredicate DP(Operand.isMem256_RC128X());
6185 81 : if (DP.isMatch())
6186 : return MCTargetAsmParser::Match_Success;
6187 : break;
6188 : }
6189 : // 'Mem256_RC256' class
6190 : case MCK_Mem256_RC256: {
6191 : DiagnosticPredicate DP(Operand.isMem256_RC256());
6192 38 : if (DP.isMatch())
6193 : return MCTargetAsmParser::Match_Success;
6194 : break;
6195 : }
6196 : // 'Mem256_RC256X' class
6197 : case MCK_Mem256_RC256X: {
6198 : DiagnosticPredicate DP(Operand.isMem256_RC256X());
6199 161 : if (DP.isMatch())
6200 : return MCTargetAsmParser::Match_Success;
6201 : break;
6202 : }
6203 : // 'Mem256_RC512' class
6204 : case MCK_Mem256_RC512: {
6205 : DiagnosticPredicate DP(Operand.isMem256_RC512());
6206 89 : if (DP.isMatch())
6207 : return MCTargetAsmParser::Match_Success;
6208 : break;
6209 : }
6210 : // 'Mem32' class
6211 52938 : case MCK_Mem32: {
6212 : DiagnosticPredicate DP(Operand.isMem32());
6213 52938 : if (DP.isMatch())
6214 : return MCTargetAsmParser::Match_Success;
6215 : break;
6216 : }
6217 : // 'Mem512' class
6218 47099 : case MCK_Mem512: {
6219 : DiagnosticPredicate DP(Operand.isMem512());
6220 47099 : if (DP.isMatch())
6221 : return MCTargetAsmParser::Match_Success;
6222 : break;
6223 : }
6224 : // 'Mem512_RC256X' class
6225 : case MCK_Mem512_RC256X: {
6226 : DiagnosticPredicate DP(Operand.isMem512_RC256X());
6227 67 : if (DP.isMatch())
6228 : return MCTargetAsmParser::Match_Success;
6229 : break;
6230 : }
6231 : // 'Mem512_RC512' class
6232 : case MCK_Mem512_RC512: {
6233 : DiagnosticPredicate DP(Operand.isMem512_RC512());
6234 133 : if (DP.isMatch())
6235 : return MCTargetAsmParser::Match_Success;
6236 : break;
6237 : }
6238 : // 'Mem64' class
6239 60586 : case MCK_Mem64: {
6240 : DiagnosticPredicate DP(Operand.isMem64());
6241 60586 : if (DP.isMatch())
6242 : return MCTargetAsmParser::Match_Success;
6243 : break;
6244 : }
6245 : // 'Mem64_RC128' class
6246 : case MCK_Mem64_RC128: {
6247 : DiagnosticPredicate DP(Operand.isMem64_RC128());
6248 16 : if (DP.isMatch())
6249 : return MCTargetAsmParser::Match_Success;
6250 : break;
6251 : }
6252 : // 'Mem64_RC128X' class
6253 : case MCK_Mem64_RC128X: {
6254 : DiagnosticPredicate DP(Operand.isMem64_RC128X());
6255 46 : if (DP.isMatch())
6256 : return MCTargetAsmParser::Match_Success;
6257 : break;
6258 : }
6259 : // 'Mem80' class
6260 174 : case MCK_Mem80: {
6261 : DiagnosticPredicate DP(Operand.isMem80());
6262 174 : if (DP.isMatch())
6263 : return MCTargetAsmParser::Match_Success;
6264 : break;
6265 : }
6266 : // 'Mem8' class
6267 14256 : case MCK_Mem8: {
6268 : DiagnosticPredicate DP(Operand.isMem8());
6269 14256 : if (DP.isMatch())
6270 : return MCTargetAsmParser::Match_Success;
6271 : break;
6272 : }
6273 : // 'Mem' class
6274 : case MCK_Mem: {
6275 : DiagnosticPredicate DP(Operand.isMem());
6276 6482 : if (DP.isMatch())
6277 : return MCTargetAsmParser::Match_Success;
6278 : break;
6279 : }
6280 : } // end switch (Kind)
6281 :
6282 1191866 : if (Operand.isReg()) {
6283 : MatchClassKind OpKind;
6284 : switch (Operand.getReg()) {
6285 : default: OpKind = InvalidMatchClass; break;
6286 : case X86::AL: OpKind = MCK_AL; break;
6287 : case X86::DL: OpKind = MCK_GR8_ABCD_L; break;
6288 : case X86::CL: OpKind = MCK_CL; break;
6289 : case X86::BL: OpKind = MCK_GR8_ABCD_L; break;
6290 : case X86::AH: OpKind = MCK_GR8_ABCD_H; break;
6291 : case X86::DH: OpKind = MCK_GR8_ABCD_H; break;
6292 : case X86::CH: OpKind = MCK_GR8_ABCD_H; break;
6293 : case X86::BH: OpKind = MCK_GR8_ABCD_H; break;
6294 : case X86::SIL: OpKind = MCK_GR8; break;
6295 : case X86::DIL: OpKind = MCK_GR8; break;
6296 : case X86::BPL: OpKind = MCK_GR8; break;
6297 : case X86::SPL: OpKind = MCK_GR8; break;
6298 : case X86::R8B: OpKind = MCK_GR8; break;
6299 : case X86::R9B: OpKind = MCK_GR8; break;
6300 : case X86::R10B: OpKind = MCK_GR8; break;
6301 : case X86::R11B: OpKind = MCK_GR8; break;
6302 : case X86::R12B: OpKind = MCK_GR8; break;
6303 : case X86::R13B: OpKind = MCK_GR8; break;
6304 : case X86::R14B: OpKind = MCK_GR8; break;
6305 : case X86::R15B: OpKind = MCK_GR8; break;
6306 : case X86::SIH: OpKind = MCK_GRH8; break;
6307 : case X86::DIH: OpKind = MCK_GRH8; break;
6308 : case X86::BPH: OpKind = MCK_GRH8; break;
6309 : case X86::SPH: OpKind = MCK_GRH8; break;
6310 : case X86::R8BH: OpKind = MCK_GRH8; break;
6311 : case X86::R9BH: OpKind = MCK_GRH8; break;
6312 : case X86::R10BH: OpKind = MCK_GRH8; break;
6313 : case X86::R11BH: OpKind = MCK_GRH8; break;
6314 : case X86::R12BH: OpKind = MCK_GRH8; break;
6315 : case X86::R13BH: OpKind = MCK_GRH8; break;
6316 : case X86::R14BH: OpKind = MCK_GRH8; break;
6317 : case X86::R15BH: OpKind = MCK_GRH8; break;
6318 : case X86::HAX: OpKind = MCK_GRH16; break;
6319 : case X86::HDX: OpKind = MCK_GRH16; break;
6320 : case X86::HCX: OpKind = MCK_GRH16; break;
6321 : case X86::HBX: OpKind = MCK_GRH16; break;
6322 : case X86::HSI: OpKind = MCK_GRH16; break;
6323 : case X86::HDI: OpKind = MCK_GRH16; break;
6324 : case X86::HBP: OpKind = MCK_GRH16; break;
6325 : case X86::HSP: OpKind = MCK_GRH16; break;
6326 : case X86::HIP: OpKind = MCK_GRH16; break;
6327 : case X86::R8WH: OpKind = MCK_GRH16; break;
6328 : case X86::R9WH: OpKind = MCK_GRH16; break;
6329 : case X86::R10WH: OpKind = MCK_GRH16; break;
6330 : case X86::R11WH: OpKind = MCK_GRH16; break;
6331 : case X86::R12WH: OpKind = MCK_GRH16; break;
6332 : case X86::R13WH: OpKind = MCK_GRH16; break;
6333 : case X86::R14WH: OpKind = MCK_GRH16; break;
6334 : case X86::R15WH: OpKind = MCK_GRH16; break;
6335 : case X86::AX: OpKind = MCK_AX; break;
6336 : case X86::DX: OpKind = MCK_DX; break;
6337 : case X86::CX: OpKind = MCK_GR16_ABCD; break;
6338 : case X86::BX: OpKind = MCK_GR16_ABCD; break;
6339 : case X86::SI: OpKind = MCK_GR16_NOREX; break;
6340 : case X86::DI: OpKind = MCK_GR16_NOREX; break;
6341 : case X86::BP: OpKind = MCK_GR16_NOREX; break;
6342 : case X86::SP: OpKind = MCK_GR16_NOREX; break;
6343 : case X86::R8W: OpKind = MCK_GR16; break;
6344 : case X86::R9W: OpKind = MCK_GR16; break;
6345 : case X86::R10W: OpKind = MCK_GR16; break;
6346 : case X86::R11W: OpKind = MCK_GR16; break;
6347 : case X86::R12W: OpKind = MCK_GR16; break;
6348 : case X86::R13W: OpKind = MCK_GR16; break;
6349 : case X86::R14W: OpKind = MCK_GR16; break;
6350 : case X86::R15W: OpKind = MCK_GR16; break;
6351 : case X86::EAX: OpKind = MCK_EAX; break;
6352 : case X86::EDX: OpKind = MCK_EDX; break;
6353 : case X86::ECX: OpKind = MCK_ECX; break;
6354 : case X86::EBX: OpKind = MCK_EBX; break;
6355 : case X86::ESI: OpKind = MCK_Reg31; break;
6356 : case X86::EDI: OpKind = MCK_Reg33; break;
6357 : case X86::EBP: OpKind = MCK_Reg35; break;
6358 : case X86::ESP: OpKind = MCK_GR32_BPSP; break;
6359 : case X86::R8D: OpKind = MCK_GR32_NOSP; break;
6360 : case X86::R9D: OpKind = MCK_GR32_NOSP; break;
6361 : case X86::R10D: OpKind = MCK_GR32_NOSP; break;
6362 : case X86::R11D: OpKind = MCK_GR32_NOSP; break;
6363 : case X86::R12D: OpKind = MCK_GR32_NOSP; break;
6364 : case X86::R13D: OpKind = MCK_GR32_NOSP; break;
6365 : case X86::R14D: OpKind = MCK_GR32_NOSP; break;
6366 : case X86::R15D: OpKind = MCK_GR32_NOSP; break;
6367 : case X86::RAX: OpKind = MCK_RAX; break;
6368 : case X86::RDX: OpKind = MCK_RDX; break;
6369 : case X86::RCX: OpKind = MCK_RCX; break;
6370 : case X86::RBX: OpKind = MCK_RBX; break;
6371 : case X86::RSI: OpKind = MCK_Reg62; break;
6372 : case X86::RDI: OpKind = MCK_Reg64; break;
6373 : case X86::RBP: OpKind = MCK_Reg66; break;
6374 : case X86::RSP: OpKind = MCK_Reg67; break;
6375 : case X86::R8: OpKind = MCK_Reg53; break;
6376 : case X86::R9: OpKind = MCK_Reg53; break;
6377 : case X86::R10: OpKind = MCK_Reg51; break;
6378 : case X86::R11: OpKind = MCK_Reg53; break;
6379 : case X86::R12: OpKind = MCK_GR64_NOSP; break;
6380 : case X86::R13: OpKind = MCK_GR64_NOSP; break;
6381 : case X86::R14: OpKind = MCK_GR64_NOSP; break;
6382 : case X86::R15: OpKind = MCK_GR64_NOSP; break;
6383 : case X86::RIP: OpKind = MCK_Reg69; break;
6384 : case X86::MM0: OpKind = MCK_VR64; break;
6385 : case X86::MM1: OpKind = MCK_VR64; break;
6386 : case X86::MM2: OpKind = MCK_VR64; break;
6387 : case X86::MM3: OpKind = MCK_VR64; break;
6388 : case X86::MM4: OpKind = MCK_VR64; break;
6389 : case X86::MM5: OpKind = MCK_VR64; break;
6390 : case X86::MM6: OpKind = MCK_VR64; break;
6391 : case X86::MM7: OpKind = MCK_VR64; break;
6392 : case X86::FP0: OpKind = MCK_RFP32; break;
6393 : case X86::FP1: OpKind = MCK_RFP32; break;
6394 : case X86::FP2: OpKind = MCK_RFP32; break;
6395 : case X86::FP3: OpKind = MCK_RFP32; break;
6396 : case X86::FP4: OpKind = MCK_RFP32; break;
6397 : case X86::FP5: OpKind = MCK_RFP32; break;
6398 : case X86::FP6: OpKind = MCK_RFP32; break;
6399 : case X86::XMM0: OpKind = MCK_XMM0; break;
6400 : case X86::XMM1: OpKind = MCK_VR128L; break;
6401 : case X86::XMM2: OpKind = MCK_VR128L; break;
6402 : case X86::XMM3: OpKind = MCK_VR128L; break;
6403 : case X86::XMM4: OpKind = MCK_VR128L; break;
6404 : case X86::XMM5: OpKind = MCK_VR128L; break;
6405 : case X86::XMM6: OpKind = MCK_VR128L; break;
6406 : case X86::XMM7: OpKind = MCK_VR128L; break;
6407 : case X86::XMM8: OpKind = MCK_VR128H; break;
6408 : case X86::XMM9: OpKind = MCK_VR128H; break;
6409 : case X86::XMM10: OpKind = MCK_VR128H; break;
6410 : case X86::XMM11: OpKind = MCK_VR128H; break;
6411 : case X86::XMM12: OpKind = MCK_VR128H; break;
6412 : case X86::XMM13: OpKind = MCK_VR128H; break;
6413 : case X86::XMM14: OpKind = MCK_VR128H; break;
6414 : case X86::XMM15: OpKind = MCK_VR128H; break;
6415 : case X86::XMM16: OpKind = MCK_FR32X; break;
6416 : case X86::XMM17: OpKind = MCK_FR32X; break;
6417 : case X86::XMM18: OpKind = MCK_FR32X; break;
6418 : case X86::XMM19: OpKind = MCK_FR32X; break;
6419 : case X86::XMM20: OpKind = MCK_FR32X; break;
6420 : case X86::XMM21: OpKind = MCK_FR32X; break;
6421 : case X86::XMM22: OpKind = MCK_FR32X; break;
6422 : case X86::XMM23: OpKind = MCK_FR32X; break;
6423 : case X86::XMM24: OpKind = MCK_FR32X; break;
6424 : case X86::XMM25: OpKind = MCK_FR32X; break;
6425 : case X86::XMM26: OpKind = MCK_FR32X; break;
6426 : case X86::XMM27: OpKind = MCK_FR32X; break;
6427 : case X86::XMM28: OpKind = MCK_FR32X; break;
6428 : case X86::XMM29: OpKind = MCK_FR32X; break;
6429 : case X86::XMM30: OpKind = MCK_FR32X; break;
6430 : case X86::XMM31: OpKind = MCK_FR32X; break;
6431 : case X86::YMM0: OpKind = MCK_VR256L; break;
6432 : case X86::YMM1: OpKind = MCK_VR256L; break;
6433 : case X86::YMM2: OpKind = MCK_VR256L; break;
6434 : case X86::YMM3: OpKind = MCK_VR256L; break;
6435 : case X86::YMM4: OpKind = MCK_VR256L; break;
6436 : case X86::YMM5: OpKind = MCK_VR256L; break;
6437 : case X86::YMM6: OpKind = MCK_VR256L; break;
6438 : case X86::YMM7: OpKind = MCK_VR256L; break;
6439 : case X86::YMM8: OpKind = MCK_VR256H; break;
6440 : case X86::YMM9: OpKind = MCK_VR256H; break;
6441 : case X86::YMM10: OpKind = MCK_VR256H; break;
6442 : case X86::YMM11: OpKind = MCK_VR256H; break;
6443 : case X86::YMM12: OpKind = MCK_VR256H; break;
6444 : case X86::YMM13: OpKind = MCK_VR256H; break;
6445 : case X86::YMM14: OpKind = MCK_VR256H; break;
6446 : case X86::YMM15: OpKind = MCK_VR256H; break;
6447 : case X86::YMM16: OpKind = MCK_VR256X; break;
6448 : case X86::YMM17: OpKind = MCK_VR256X; break;
6449 : case X86::YMM18: OpKind = MCK_VR256X; break;
6450 : case X86::YMM19: OpKind = MCK_VR256X; break;
6451 : case X86::YMM20: OpKind = MCK_VR256X; break;
6452 : case X86::YMM21: OpKind = MCK_VR256X; break;
6453 : case X86::YMM22: OpKind = MCK_VR256X; break;
6454 : case X86::YMM23: OpKind = MCK_VR256X; break;
6455 : case X86::YMM24: OpKind = MCK_VR256X; break;
6456 : case X86::YMM25: OpKind = MCK_VR256X; break;
6457 : case X86::YMM26: OpKind = MCK_VR256X; break;
6458 : case X86::YMM27: OpKind = MCK_VR256X; break;
6459 : case X86::YMM28: OpKind = MCK_VR256X; break;
6460 : case X86::YMM29: OpKind = MCK_VR256X; break;
6461 : case X86::YMM30: OpKind = MCK_VR256X; break;
6462 : case X86::YMM31: OpKind = MCK_VR256X; break;
6463 : case X86::ZMM0: OpKind = MCK_Reg81; break;
6464 : case X86::ZMM1: OpKind = MCK_Reg81; break;
6465 : case X86::ZMM2: OpKind = MCK_Reg81; break;
6466 : case X86::ZMM3: OpKind = MCK_Reg81; break;
6467 : case X86::ZMM4: OpKind = MCK_Reg81; break;
6468 : case X86::ZMM5: OpKind = MCK_Reg81; break;
6469 : case X86::ZMM6: OpKind = MCK_Reg81; break;
6470 : case X86::ZMM7: OpKind = MCK_Reg81; break;
6471 : case X86::ZMM8: OpKind = MCK_Reg84; break;
6472 : case X86::ZMM9: OpKind = MCK_Reg84; break;
6473 : case X86::ZMM10: OpKind = MCK_Reg84; break;
6474 : case X86::ZMM11: OpKind = MCK_Reg84; break;
6475 : case X86::ZMM12: OpKind = MCK_Reg84; break;
6476 : case X86::ZMM13: OpKind = MCK_Reg84; break;
6477 : case X86::ZMM14: OpKind = MCK_Reg84; break;
6478 : case X86::ZMM15: OpKind = MCK_Reg84; break;
6479 : case X86::ZMM16: OpKind = MCK_VR512; break;
6480 : case X86::ZMM17: OpKind = MCK_VR512; break;
6481 : case X86::ZMM18: OpKind = MCK_VR512; break;
6482 : case X86::ZMM19: OpKind = MCK_VR512; break;
6483 : case X86::ZMM20: OpKind = MCK_VR512; break;
6484 : case X86::ZMM21: OpKind = MCK_VR512; break;
6485 : case X86::ZMM22: OpKind = MCK_VR512; break;
6486 : case X86::ZMM23: OpKind = MCK_VR512; break;
6487 : case X86::ZMM24: OpKind = MCK_VR512; break;
6488 : case X86::ZMM25: OpKind = MCK_VR512; break;
6489 : case X86::ZMM26: OpKind = MCK_VR512; break;
6490 : case X86::ZMM27: OpKind = MCK_VR512; break;
6491 : case X86::ZMM28: OpKind = MCK_VR512; break;
6492 : case X86::ZMM29: OpKind = MCK_VR512; break;
6493 : case X86::ZMM30: OpKind = MCK_VR512; break;
6494 : case X86::ZMM31: OpKind = MCK_VR512; break;
6495 : case X86::K0: OpKind = MCK_VK1; break;
6496 : case X86::K1: OpKind = MCK_VK16WM; break;
6497 : case X86::K2: OpKind = MCK_VK16WM; break;
6498 : case X86::K3: OpKind = MCK_VK16WM; break;
6499 : case X86::K4: OpKind = MCK_VK16WM; break;
6500 : case X86::K5: OpKind = MCK_VK16WM; break;
6501 : case X86::K6: OpKind = MCK_VK16WM; break;
6502 : case X86::K7: OpKind = MCK_VK16WM; break;
6503 : case X86::ST0: OpKind = MCK_ST0; break;
6504 : case X86::ST1: OpKind = MCK_RST; break;
6505 : case X86::ST2: OpKind = MCK_RST; break;
6506 : case X86::ST3: OpKind = MCK_RST; break;
6507 : case X86::ST4: OpKind = MCK_RST; break;
6508 : case X86::ST5: OpKind = MCK_RST; break;
6509 : case X86::ST6: OpKind = MCK_RST; break;
6510 : case X86::ST7: OpKind = MCK_RST; break;
6511 : case X86::FPSW: OpKind = MCK_FPCCR; break;
6512 : case X86::EFLAGS: OpKind = MCK_CCR; break;
6513 : case X86::DF: OpKind = MCK_DFCCR; break;
6514 : case X86::CS: OpKind = MCK_CS; break;
6515 : case X86::DS: OpKind = MCK_DS; break;
6516 : case X86::SS: OpKind = MCK_SS; break;
6517 : case X86::ES: OpKind = MCK_ES; break;
6518 : case X86::FS: OpKind = MCK_FS; break;
6519 : case X86::GS: OpKind = MCK_GS; break;
6520 : case X86::DR0: OpKind = MCK_DEBUG_REG; break;
6521 : case X86::DR1: OpKind = MCK_DEBUG_REG; break;
6522 : case X86::DR2: OpKind = MCK_DEBUG_REG; break;
6523 : case X86::DR3: OpKind = MCK_DEBUG_REG; break;
6524 : case X86::DR4: OpKind = MCK_DEBUG_REG; break;
6525 : case X86::DR5: OpKind = MCK_DEBUG_REG; break;
6526 : case X86::DR6: OpKind = MCK_DEBUG_REG; break;
6527 : case X86::DR7: OpKind = MCK_DEBUG_REG; break;
6528 : case X86::DR8: OpKind = MCK_DEBUG_REG; break;
6529 : case X86::DR9: OpKind = MCK_DEBUG_REG; break;
6530 : case X86::DR10: OpKind = MCK_DEBUG_REG; break;
6531 : case X86::DR11: OpKind = MCK_DEBUG_REG; break;
6532 : case X86::DR12: OpKind = MCK_DEBUG_REG; break;
6533 : case X86::DR13: OpKind = MCK_DEBUG_REG; break;
6534 : case X86::DR14: OpKind = MCK_DEBUG_REG; break;
6535 : case X86::DR15: OpKind = MCK_DEBUG_REG; break;
6536 : case X86::CR0: OpKind = MCK_CONTROL_REG; break;
6537 : case X86::CR1: OpKind = MCK_CONTROL_REG; break;
6538 : case X86::CR2: OpKind = MCK_CONTROL_REG; break;
6539 : case X86::CR3: OpKind = MCK_CONTROL_REG; break;
6540 : case X86::CR4: OpKind = MCK_CONTROL_REG; break;
6541 : case X86::CR5: OpKind = MCK_CONTROL_REG; break;
6542 : case X86::CR6: OpKind = MCK_CONTROL_REG; break;
6543 : case X86::CR7: OpKind = MCK_CONTROL_REG; break;
6544 : case X86::CR8: OpKind = MCK_CONTROL_REG; break;
6545 : case X86::CR9: OpKind = MCK_CONTROL_REG; break;
6546 : case X86::CR10: OpKind = MCK_CONTROL_REG; break;
6547 : case X86::CR11: OpKind = MCK_CONTROL_REG; break;
6548 : case X86::CR12: OpKind = MCK_CONTROL_REG; break;
6549 : case X86::CR13: OpKind = MCK_CONTROL_REG; break;
6550 : case X86::CR14: OpKind = MCK_CONTROL_REG; break;
6551 : case X86::CR15: OpKind = MCK_CONTROL_REG; break;
6552 : case X86::BND0: OpKind = MCK_BNDR; break;
6553 : case X86::BND1: OpKind = MCK_BNDR; break;
6554 : case X86::BND2: OpKind = MCK_BNDR; break;
6555 : case X86::BND3: OpKind = MCK_BNDR; break;
6556 : }
6557 659510 : return isSubclass(OpKind, Kind) ? (unsigned)MCTargetAsmParser::Match_Success :
6558 : getDiagKindFromRegisterClass(Kind);
6559 : }
6560 :
6561 : if (Kind > MCK_LAST_TOKEN && Kind <= MCK_LAST_REGISTER)
6562 : return getDiagKindFromRegisterClass(Kind);
6563 :
6564 : return MCTargetAsmParser::Match_InvalidOperand;
6565 : }
6566 :
6567 : #ifndef NDEBUG
6568 : const char *getMatchClassName(MatchClassKind Kind) {
6569 : switch (Kind) {
6570 : case InvalidMatchClass: return "InvalidMatchClass";
6571 : case OptionalMatchClass: return "OptionalMatchClass";
6572 : case MCK__STAR_: return "MCK__STAR_";
6573 : case MCK_b: return "MCK_b";
6574 : case MCK_d: return "MCK_d";
6575 : case MCK_pd: return "MCK_pd";
6576 : case MCK_ps: return "MCK_ps";
6577 : case MCK_q: return "MCK_q";
6578 : case MCK_sd: return "MCK_sd";
6579 : case MCK_ss: return "MCK_ss";
6580 : case MCK_ub: return "MCK_ub";
6581 : case MCK_ud: return "MCK_ud";
6582 : case MCK_uq: return "MCK_uq";
6583 : case MCK_uw: return "MCK_uw";
6584 : case MCK_w: return "MCK_w";
6585 : case MCK__123_: return "MCK__123_";
6586 : case MCK__123_1to16_125_: return "MCK__123_1to16_125_";
6587 : case MCK__123_1to2_125_: return "MCK__123_1to2_125_";
6588 : case MCK__123_1to4_125_: return "MCK__123_1to4_125_";
6589 : case MCK__123_1to8_125_: return "MCK__123_1to8_125_";
6590 : case MCK__123_sae_125_: return "MCK__123_sae_125_";
6591 : case MCK__123_z_125_: return "MCK__123_z_125_";
6592 : case MCK__125_: return "MCK__125_";
6593 : case MCK_Reg31: return "MCK_Reg31";
6594 : case MCK_Reg33: return "MCK_Reg33";
6595 : case MCK_Reg35: return "MCK_Reg35";
6596 : case MCK_Reg62: return "MCK_Reg62";
6597 : case MCK_Reg64: return "MCK_Reg64";
6598 : case MCK_Reg66: return "MCK_Reg66";
6599 : case MCK_Reg69: return "MCK_Reg69";
6600 : case MCK_AL: return "MCK_AL";
6601 : case MCK_AX: return "MCK_AX";
6602 : case MCK_CCR: return "MCK_CCR";
6603 : case MCK_CL: return "MCK_CL";
6604 : case MCK_CS: return "MCK_CS";
6605 : case MCK_DFCCR: return "MCK_DFCCR";
6606 : case MCK_DS: return "MCK_DS";
6607 : case MCK_DX: return "MCK_DX";
6608 : case MCK_EAX: return "MCK_EAX";
6609 : case MCK_EBX: return "MCK_EBX";
6610 : case MCK_ECX: return "MCK_ECX";
6611 : case MCK_EDX: return "MCK_EDX";
6612 : case MCK_ES: return "MCK_ES";
6613 : case MCK_FPCCR: return "MCK_FPCCR";
6614 : case MCK_FS: return "MCK_FS";
6615 : case MCK_GS: return "MCK_GS";
6616 : case MCK_RAX: return "MCK_RAX";
6617 : case MCK_RBX: return "MCK_RBX";
6618 : case MCK_RCX: return "MCK_RCX";
6619 : case MCK_RDX: return "MCK_RDX";
6620 : case MCK_SS: return "MCK_SS";
6621 : case MCK_ST0: return "MCK_ST0";
6622 : case MCK_XMM0: return "MCK_XMM0";
6623 : case MCK_Reg57: return "MCK_Reg57";
6624 : case MCK_Reg59: return "MCK_Reg59";
6625 : case MCK_Reg61: return "MCK_Reg61";
6626 : case MCK_Reg63: return "MCK_Reg63";
6627 : case MCK_Reg65: return "MCK_Reg65";
6628 : case MCK_Reg67: return "MCK_Reg67";
6629 : case MCK_Reg68: return "MCK_Reg68";
6630 : case MCK_GR32_AD: return "MCK_GR32_AD";
6631 : case MCK_GR32_BPSP: return "MCK_GR32_BPSP";
6632 : case MCK_GR32_BSI: return "MCK_GR32_BSI";
6633 : case MCK_GR32_CB: return "MCK_GR32_CB";
6634 : case MCK_GR32_DC: return "MCK_GR32_DC";
6635 : case MCK_GR32_DIBP: return "MCK_GR32_DIBP";
6636 : case MCK_GR32_SIDI: return "MCK_GR32_SIDI";
6637 : case MCK_GR64_AD: return "MCK_GR64_AD";
6638 : case MCK_Reg39: return "MCK_Reg39";
6639 : case MCK_GR32_TC: return "MCK_GR32_TC";
6640 : case MCK_Reg55: return "MCK_Reg55";
6641 : case MCK_BNDR: return "MCK_BNDR";
6642 : case MCK_GR16_ABCD: return "MCK_GR16_ABCD";
6643 : case MCK_GR32_ABCD: return "MCK_GR32_ABCD";
6644 : case MCK_GR64_ABCD: return "MCK_GR64_ABCD";
6645 : case MCK_GR8_ABCD_H: return "MCK_GR8_ABCD_H";
6646 : case MCK_GR8_ABCD_L: return "MCK_GR8_ABCD_L";
6647 : case MCK_Reg47: return "MCK_Reg47";
6648 : case MCK_Reg50: return "MCK_Reg50";
6649 : case MCK_Reg53: return "MCK_Reg53";
6650 : case MCK_SEGMENT_REG: return "MCK_SEGMENT_REG";
6651 : case MCK_Reg51: return "MCK_Reg51";
6652 : case MCK_Reg54: return "MCK_Reg54";
6653 : case MCK_GR32_NOREX_NOSP: return "MCK_GR32_NOREX_NOSP";
6654 : case MCK_GR64_NOREX_NOSP: return "MCK_GR64_NOREX_NOSP";
6655 : case MCK_RFP32: return "MCK_RFP32";
6656 : case MCK_VK16WM: return "MCK_VK16WM";
6657 : case MCK_Reg42: return "MCK_Reg42";
6658 : case MCK_Reg48: return "MCK_Reg48";
6659 : case MCK_Reg81: return "MCK_Reg81";
6660 : case MCK_Reg84: return "MCK_Reg84";
6661 : case MCK_GR16_NOREX: return "MCK_GR16_NOREX";
6662 : case MCK_GR32_NOREX: return "MCK_GR32_NOREX";
6663 : case MCK_GR64_TCW64: return "MCK_GR64_TCW64";
6664 : case MCK_GR8_NOREX: return "MCK_GR8_NOREX";
6665 : case MCK_RST: return "MCK_RST";
6666 : case MCK_VK1: return "MCK_VK1";
6667 : case MCK_VR128H: return "MCK_VR128H";
6668 : case MCK_VR128L: return "MCK_VR128L";
6669 : case MCK_VR256H: return "MCK_VR256H";
6670 : case MCK_VR256L: return "MCK_VR256L";
6671 : case MCK_VR64: return "MCK_VR64";
6672 : case MCK_Reg23: return "MCK_Reg23";
6673 : case MCK_GR64_NOREX: return "MCK_GR64_NOREX";
6674 : case MCK_GR64_TC: return "MCK_GR64_TC";
6675 : case MCK_GRH8: return "MCK_GRH8";
6676 : case MCK_GR32_NOSP: return "MCK_GR32_NOSP";
6677 : case MCK_GR64_NOSP: return "MCK_GR64_NOSP";
6678 : case MCK_Reg43: return "MCK_Reg43";
6679 : case MCK_Reg82: return "MCK_Reg82";
6680 : case MCK_CONTROL_REG: return "MCK_CONTROL_REG";
6681 : case MCK_DEBUG_REG: return "MCK_DEBUG_REG";
6682 : case MCK_FR32: return "MCK_FR32";
6683 : case MCK_GR16: return "MCK_GR16";
6684 : case MCK_GR32: return "MCK_GR32";
6685 : case MCK_VR256: return "MCK_VR256";
6686 : case MCK_Reg20: return "MCK_Reg20";
6687 : case MCK_GR64: return "MCK_GR64";
6688 : case MCK_GRH16: return "MCK_GRH16";
6689 : case MCK_LOW32_ADDR_ACCESS: return "MCK_LOW32_ADDR_ACCESS";
6690 : case MCK_LOW32_ADDR_ACCESS_RBP: return "MCK_LOW32_ADDR_ACCESS_RBP";
6691 : case MCK_GR8: return "MCK_GR8";
6692 : case MCK_FR32X: return "MCK_FR32X";
6693 : case MCK_VR256X: return "MCK_VR256X";
6694 : case MCK_VR512: return "MCK_VR512";
6695 : case MCK_AVX512RC: return "MCK_AVX512RC";
6696 : case MCK_ImmSExti64i8: return "MCK_ImmSExti64i8";
6697 : case MCK_ImmSExti16i8: return "MCK_ImmSExti16i8";
6698 : case MCK_ImmSExti32i8: return "MCK_ImmSExti32i8";
6699 : case MCK_ImmSExti64i32: return "MCK_ImmSExti64i32";
6700 : case MCK_Imm: return "MCK_Imm";
6701 : case MCK_ImmUnsignedi8: return "MCK_ImmUnsignedi8";
6702 : case MCK_GR32orGR64: return "MCK_GR32orGR64";
6703 : case MCK_AbsMem16: return "MCK_AbsMem16";
6704 : case MCK_DstIdx16: return "MCK_DstIdx16";
6705 : case MCK_DstIdx32: return "MCK_DstIdx32";
6706 : case MCK_DstIdx64: return "MCK_DstIdx64";
6707 : case MCK_DstIdx8: return "MCK_DstIdx8";
6708 : case MCK_MemOffs16_16: return "MCK_MemOffs16_16";
6709 : case MCK_MemOffs16_32: return "MCK_MemOffs16_32";
6710 : case MCK_MemOffs16_8: return "MCK_MemOffs16_8";
6711 : case MCK_MemOffs32_16: return "MCK_MemOffs32_16";
6712 : case MCK_MemOffs32_32: return "MCK_MemOffs32_32";
6713 : case MCK_MemOffs32_64: return "MCK_MemOffs32_64";
6714 : case MCK_MemOffs32_8: return "MCK_MemOffs32_8";
6715 : case MCK_MemOffs64_16: return "MCK_MemOffs64_16";
6716 : case MCK_MemOffs64_32: return "MCK_MemOffs64_32";
6717 : case MCK_MemOffs64_64: return "MCK_MemOffs64_64";
6718 : case MCK_MemOffs64_8: return "MCK_MemOffs64_8";
6719 : case MCK_SrcIdx16: return "MCK_SrcIdx16";
6720 : case MCK_SrcIdx32: return "MCK_SrcIdx32";
6721 : case MCK_SrcIdx64: return "MCK_SrcIdx64";
6722 : case MCK_SrcIdx8: return "MCK_SrcIdx8";
6723 : case MCK_AbsMem: return "MCK_AbsMem";
6724 : case MCK_Mem128: return "MCK_Mem128";
6725 : case MCK_Mem128_RC128: return "MCK_Mem128_RC128";
6726 : case MCK_Mem128_RC128X: return "MCK_Mem128_RC128X";
6727 : case MCK_Mem128_RC256: return "MCK_Mem128_RC256";
6728 : case MCK_Mem128_RC256X: return "MCK_Mem128_RC256X";
6729 : case MCK_Mem16: return "MCK_Mem16";
6730 : case MCK_Mem256: return "MCK_Mem256";
6731 : case MCK_Mem256_RC128: return "MCK_Mem256_RC128";
6732 : case MCK_Mem256_RC128X: return "MCK_Mem256_RC128X";
6733 : case MCK_Mem256_RC256: return "MCK_Mem256_RC256";
6734 : case MCK_Mem256_RC256X: return "MCK_Mem256_RC256X";
6735 : case MCK_Mem256_RC512: return "MCK_Mem256_RC512";
6736 : case MCK_Mem32: return "MCK_Mem32";
6737 : case MCK_Mem512: return "MCK_Mem512";
6738 : case MCK_Mem512_RC256X: return "MCK_Mem512_RC256X";
6739 : case MCK_Mem512_RC512: return "MCK_Mem512_RC512";
6740 : case MCK_Mem64: return "MCK_Mem64";
6741 : case MCK_Mem64_RC128: return "MCK_Mem64_RC128";
6742 : case MCK_Mem64_RC128X: return "MCK_Mem64_RC128X";
6743 : case MCK_Mem80: return "MCK_Mem80";
6744 : case MCK_Mem8: return "MCK_Mem8";
6745 : case MCK_Mem: return "MCK_Mem";
6746 : case NumMatchClassKinds: return "NumMatchClassKinds";
6747 : }
6748 : llvm_unreachable("unhandled MatchClassKind!");
6749 : }
6750 :
6751 : #endif // NDEBUG
6752 0 : uint64_t X86AsmParser::
6753 : ComputeAvailableFeatures(const FeatureBitset& FB) const {
6754 : uint64_t Features = 0;
6755 0 : if ((!FB[X86::Mode64Bit]))
6756 : Features |= Feature_Not64BitMode;
6757 0 : if ((FB[X86::Mode64Bit]))
6758 0 : Features |= Feature_In64BitMode;
6759 0 : if ((FB[X86::Mode16Bit]))
6760 0 : Features |= Feature_In16BitMode;
6761 0 : if ((!FB[X86::Mode16Bit]))
6762 0 : Features |= Feature_Not16BitMode;
6763 0 : if ((FB[X86::Mode32Bit]))
6764 0 : Features |= Feature_In32BitMode;
6765 0 : return Features;
6766 : }
6767 :
6768 133299 : static bool checkAsmTiedOperandConstraints(const X86AsmParser&AsmParser,
6769 : unsigned Kind,
6770 : const OperandVector &Operands,
6771 : uint64_t &ErrorInfo) {
6772 : assert(Kind < CVT_NUM_SIGNATURES && "Invalid signature!");
6773 133299 : const uint8_t *Converter = ConversionTable[Kind];
6774 499964 : for (const uint8_t *p = Converter; *p; p+= 2) {
6775 366665 : switch (*p) {
6776 45339 : case CVT_Tied: {
6777 45339 : unsigned OpIdx = *(p+1);
6778 : assert(OpIdx < (size_t)(std::end(TiedAsmOperandTable) -
6779 : std::begin(TiedAsmOperandTable)) &&
6780 : "Tied operand not found");
6781 45339 : unsigned OpndNum1 = TiedAsmOperandTable[OpIdx][1];
6782 45339 : unsigned OpndNum2 = TiedAsmOperandTable[OpIdx][2];
6783 45339 : if (OpndNum1 != OpndNum2) {
6784 0 : auto &SrcOp1 = Operands[OpndNum1];
6785 0 : auto &SrcOp2 = Operands[OpndNum2];
6786 0 : if (SrcOp1->isReg() && SrcOp2->isReg()) {
6787 0 : if (!AsmParser.regsEqual(*SrcOp1, *SrcOp2)) {
6788 0 : ErrorInfo = OpndNum2;
6789 0 : return false;
6790 : }
6791 : }
6792 : }
6793 : break;
6794 : }
6795 : default:
6796 : break;
6797 : }
6798 : }
6799 : return true;
6800 : }
6801 :
6802 : static const char *const MnemonicTable =
6803 : "\003aaa\003aad\003aam\003aas\003adc\004adcb\004adcl\004adcq\004adcw\004"
6804 : "adcx\005adcxl\005adcxq\003add\004addb\004addl\005addpd\005addps\004addq"
6805 : "\005addsd\005addss\010addsubpd\010addsubps\004addw\004adox\005adoxl\005"
6806 : "adoxq\006aesdec\naesdeclast\006aesenc\naesenclast\006aesimc\017aeskeyge"
6807 : "nassist\003and\004andb\004andl\004andn\005andnl\006andnpd\006andnps\005"
6808 : "andnq\005andpd\005andps\004andq\004andw\004arpl\005bextr\006bextrl\006b"
6809 : "extrq\007blcfill\010blcfilll\010blcfillq\004blci\005blcic\006blcicl\006"
6810 : "blcicq\005blcil\005blciq\006blcmsk\007blcmskl\007blcmskq\004blcs\005blc"
6811 : "sl\005blcsq\007blendpd\007blendps\010blendvpd\010blendvps\007blsfill\010"
6812 : "blsfilll\010blsfillq\004blsi\005blsic\006blsicl\006blsicq\005blsil\005b"
6813 : "lsiq\006blsmsk\007blsmskl\007blsmskq\004blsr\005blsrl\005blsrq\005bndcl"
6814 : "\005bndcn\005bndcu\006bndldx\005bndmk\006bndmov\006bndstx\005bound\003b"
6815 : "sf\004bsfl\004bsfq\004bsfw\003bsr\004bsrl\004bsrq\004bsrw\005bswap\006b"
6816 : "swapl\006bswapq\002bt\003btc\004btcl\004btcq\004btcw\003btl\003btq\003b"
6817 : "tr\004btrl\004btrq\004btrw\003bts\004btsl\004btsq\004btsw\003btw\004bzh"
6818 : "i\005bzhil\005bzhiq\004call\005calll\005callq\005callw\004cbtw\003cbw\003"
6819 : "cdq\004cdqe\004clac\003clc\003cld\010cldemote\007clflush\nclflushopt\004"
6820 : "clgi\003cli\003clr\004clrb\004clrl\004clrq\010clrssbsy\004clrw\004cltd\004"
6821 : "cltq\004clts\004clwb\006clzero\003cmc\005cmova\006cmovae\007cmovael\007"
6822 : "cmovaeq\007cmovaew\006cmoval\006cmovaq\006cmovaw\005cmovb\006cmovbe\007"
6823 : "cmovbel\007cmovbeq\007cmovbew\006cmovbl\006cmovbq\006cmovbw\005cmove\006"
6824 : "cmovel\006cmoveq\006cmovew\005cmovg\006cmovge\007cmovgel\007cmovgeq\007"
6825 : "cmovgew\006cmovgl\006cmovgq\006cmovgw\005cmovl\006cmovle\007cmovlel\007"
6826 : "cmovleq\007cmovlew\006cmovll\006cmovlq\006cmovlw\006cmovne\007cmovnel\007"
6827 : "cmovneq\007cmovnew\006cmovno\007cmovnol\007cmovnoq\007cmovnow\006cmovnp"
6828 : "\007cmovnpl\007cmovnpq\007cmovnpw\006cmovns\007cmovnsl\007cmovnsq\007cm"
6829 : "ovnsw\005cmovo\006cmovol\006cmovoq\006cmovow\005cmovp\006cmovpl\006cmov"
6830 : "pq\006cmovpw\005cmovs\006cmovsl\006cmovsq\006cmovsw\003cmp\004cmpb\004c"
6831 : "mpl\005cmppd\005cmpps\004cmpq\004cmps\005cmpsb\005cmpsd\005cmpsl\005cmp"
6832 : "sq\005cmpss\005cmpsw\004cmpw\007cmpxchg\ncmpxchg16b\tcmpxchg8b\010cmpxc"
6833 : "hgb\010cmpxchgl\010cmpxchgq\010cmpxchgw\006comisd\006comiss\005cpuid\003"
6834 : "cqo\004cqto\005crc32\006crc32b\006crc32l\006crc32q\006crc32w\002cs\010c"
6835 : "vtdq2pd\010cvtdq2ps\010cvtpd2dq\010cvtpd2pi\010cvtpd2ps\010cvtpi2pd\010"
6836 : "cvtpi2ps\010cvtps2dq\010cvtps2pd\010cvtps2pi\010cvtsd2si\tcvtsd2sil\tcv"
6837 : "tsd2siq\010cvtsd2ss\010cvtsi2sd\tcvtsi2sdl\tcvtsi2sdq\010cvtsi2ss\tcvts"
6838 : "i2ssl\tcvtsi2ssq\010cvtss2sd\010cvtss2si\tcvtss2sil\tcvtss2siq\tcvttpd2"
6839 : "dq\tcvttpd2pi\tcvttps2dq\tcvttps2pi\tcvttsd2si\ncvttsd2sil\ncvttsd2siq\t"
6840 : "cvttss2si\ncvttss2sil\ncvttss2siq\003cwd\004cwde\004cwtd\004cwtl\003daa"
6841 : "\003das\006data16\003dec\004decb\004decl\004decq\004decw\003div\004divb"
6842 : "\004divl\005divpd\005divps\004divq\005divsd\005divss\004divw\004dppd\004"
6843 : "dpps\002ds\004emms\005encls\005enclu\005enclv\007endbr32\007endbr64\005"
6844 : "enter\002es\textractps\005extrq\005f2xm1\004fabs\004fadd\005faddl\005fa"
6845 : "ddp\005fadds\004fbld\005fbstp\004fchs\006fcmovb\007fcmovbe\006fcmove\007"
6846 : "fcmovnb\010fcmovnbe\007fcmovne\007fcmovnu\006fcmovu\004fcom\005fcomi\005"
6847 : "fcoml\005fcomp\006fcompi\006fcompl\006fcompp\006fcomps\005fcoms\004fcos"
6848 : "\007fdecstp\004fdiv\005fdivl\005fdivp\005fdivr\006fdivrl\006fdivrp\006f"
6849 : "divrs\005fdivs\005femms\005ffree\006ffreep\005fiadd\006fiaddl\006fiadds"
6850 : "\005ficom\006ficoml\006ficomp\007ficompl\007ficomps\006ficoms\005fidiv\006"
6851 : "fidivl\006fidivr\007fidivrl\007fidivrs\006fidivs\004fild\005fildl\006fi"
6852 : "ldll\005filds\005fimul\006fimull\006fimuls\007fincstp\004fist\005fistl\005"
6853 : "fistp\006fistpl\007fistpll\006fistps\005fists\006fisttp\007fisttpl\010f"
6854 : "isttpll\007fisttps\005fisub\006fisubl\006fisubr\007fisubrl\007fisubrs\006"
6855 : "fisubs\003fld\004fld1\005fldcw\006fldenv\004fldl\006fldl2e\006fldl2t\006"
6856 : "fldlg2\006fldln2\005fldpi\004flds\004fldt\004fldz\004fmul\005fmull\005f"
6857 : "mulp\005fmuls\006fnclex\006fninit\004fnop\006fnsave\006fnstcw\007fnsten"
6858 : "v\006fnstsw\006fpatan\005fprem\006fprem1\005fptan\007frndint\006frstor\002"
6859 : "fs\006fscale\004fsin\007fsincos\005fsqrt\003fst\004fstl\004fstp\005fstp"
6860 : "l\005fstps\005fstpt\004fsts\004fsub\005fsubl\005fsubp\005fsubr\006fsubr"
6861 : "l\006fsubrp\006fsubrs\005fsubs\004ftst\005fucom\006fucomi\006fucomp\007"
6862 : "fucompi\007fucompp\004fxam\004fxch\007fxrstor\tfxrstor64\006fxsave\010f"
6863 : "xsave64\007fxtract\005fyl2x\007fyl2xp1\006getsec\020gf2p8affineinvqb\015"
6864 : "gf2p8affineqb\tgf2p8mulb\002gs\006haddpd\006haddps\003hlt\006hsubpd\006"
6865 : "hsubps\004idiv\005idivb\005idivl\005idivq\005idivw\004imul\005imulb\005"
6866 : "imull\005imulq\005imulw\002in\003inb\003inc\004incb\004incl\004incq\007"
6867 : "incsspd\007incsspq\004incw\003inl\003ins\004insb\004insd\010insertps\007"
6868 : "insertq\004insl\004insw\003int\004int3\004into\004invd\006invept\006inv"
6869 : "lpg\007invlpga\007invpcid\007invvpid\003inw\004iret\005iretd\005iretl\005"
6870 : "iretq\005iretw\002ja\003jae\002jb\003jbe\004jcxz\002je\005jecxz\002jg\003"
6871 : "jge\002jl\003jle\003jmp\004jmpl\004jmpq\004jmpw\003jne\003jno\003jnp\003"
6872 : "jns\002jo\002jp\005jrcxz\002js\005kaddb\005kaddd\005kaddq\005kaddw\005k"
6873 : "andb\005kandd\006kandnb\006kandnd\006kandnq\006kandnw\005kandq\005kandw"
6874 : "\005kmovb\005kmovd\005kmovq\005kmovw\005knotb\005knotd\005knotq\005knot"
6875 : "w\004korb\004kord\004korq\010kortestb\010kortestd\010kortestq\010kortes"
6876 : "tw\004korw\010kshiftlb\010kshiftld\010kshiftlq\010kshiftlw\010kshiftrb\010"
6877 : "kshiftrd\010kshiftrq\010kshiftrw\006ktestb\006ktestd\006ktestq\006ktest"
6878 : "w\010kunpckbw\010kunpckdq\010kunpckwd\006kxnorb\006kxnord\006kxnorq\006"
6879 : "kxnorw\005kxorb\005kxord\005kxorq\005kxorw\004lahf\003lar\004larl\004la"
6880 : "rq\004larw\005lcall\006lcalll\006lcallq\006lcallw\005lddqu\007ldmxcsr\003"
6881 : "lds\004ldsl\004ldsw\003lea\004leal\004leaq\005leave\004leaw\003les\004l"
6882 : "esl\004lesw\006lfence\003lfs\004lfsl\004lfsq\004lfsw\004lgdt\005lgdtd\005"
6883 : "lgdtl\005lgdtq\005lgdtw\003lgs\004lgsl\004lgsq\004lgsw\004lidt\005lidtd"
6884 : "\005lidtl\005lidtq\005lidtw\004ljmp\005ljmpl\005ljmpq\005ljmpw\004lldt\005"
6885 : "lldtw\006llwpcb\004lmsw\005lmsww\004lock\004lods\005lodsb\005lodsd\005l"
6886 : "odsl\005lodsq\005lodsw\004loop\005loope\006loopne\005lretl\005lretq\005"
6887 : "lretw\003lsl\004lsll\004lslq\004lslw\003lss\004lssl\004lssq\004lssw\003"
6888 : "ltr\004ltrw\006lwpins\006lwpval\005lzcnt\006lzcntl\006lzcntq\006lzcntw\n"
6889 : "maskmovdqu\010maskmovq\005maxpd\005maxps\005maxsd\005maxss\006mfence\005"
6890 : "minpd\005minps\005minsd\005minss\007monitor\010monitorx\007montmul\003m"
6891 : "ov\005mov.s\006movabs\007movabsb\007movabsl\007movabsq\007movabsw\006mo"
6892 : "vapd\010movapd.s\006movaps\010movaps.s\004movb\006movb.s\005movbe\006mo"
6893 : "vbel\006movbeq\006movbew\004movd\007movddup\tmovdir64b\007movdiri\007mo"
6894 : "vdq2q\006movdqa\010movdqa.s\006movdqu\010movdqu.s\007movhlps\006movhpd\006"
6895 : "movhps\004movl\006movl.s\007movlhps\006movlpd\006movlps\010movmskpd\010"
6896 : "movmskps\007movntdq\010movntdqa\006movnti\007movntil\007movntiq\007movn"
6897 : "tpd\007movntps\006movntq\007movntsd\007movntss\004movq\006movq.s\007mov"
6898 : "q2dq\004movs\005movsb\006movsbl\006movsbq\006movsbw\005movsd\007movsd.s"
6899 : "\010movshdup\005movsl\010movsldup\006movslq\005movsq\005movss\007movss."
6900 : "s\005movsw\006movswl\006movswq\005movsx\006movsxd\006movupd\010movupd.s"
6901 : "\006movups\010movups.s\004movw\006movw.s\006movzbl\006movzbq\006movzbw\006"
6902 : "movzwl\006movzwq\005movzx\007mpsadbw\003mul\004mulb\004mull\005mulpd\005"
6903 : "mulps\004mulq\005mulsd\005mulss\004mulw\004mulx\005mulxl\005mulxq\005mw"
6904 : "ait\006mwaitx\003neg\004negb\004negl\004negq\004negw\003nop\004nopl\004"
6905 : "nopq\004nopw\003not\004notb\004notl\004notq\004notw\002or\003orb\003orl"
6906 : "\004orpd\004orps\003orq\003orw\003out\004outb\004outl\004outs\005outsb\005"
6907 : "outsd\005outsl\005outsw\004outw\005pabsb\005pabsd\005pabsw\010packssdw\010"
6908 : "packsswb\010packusdw\010packuswb\005paddb\005paddd\005paddq\006paddsb\006"
6909 : "paddsw\007paddusb\007paddusw\005paddw\007palignr\004pand\005pandn\005pa"
6910 : "use\005pavgb\007pavgusb\005pavgw\010pblendvb\007pblendw\014pclmulhqhqdq"
6911 : "\014pclmulhqlqdq\014pclmullqhqdq\014pclmullqlqdq\tpclmulqdq\007pcmpeqb\007"
6912 : "pcmpeqd\007pcmpeqq\007pcmpeqw\tpcmpestri\tpcmpestrm\007pcmpgtb\007pcmpg"
6913 : "td\007pcmpgtq\007pcmpgtw\tpcmpistri\tpcmpistrm\007pconfig\004pdep\005pd"
6914 : "epl\005pdepq\004pext\005pextl\005pextq\006pextrb\006pextrd\006pextrq\006"
6915 : "pextrw\005pf2id\005pf2iw\005pfacc\005pfadd\007pfcmpeq\007pfcmpge\007pfc"
6916 : "mpgt\005pfmax\005pfmin\005pfmul\006pfnacc\007pfpnacc\005pfrcp\010pfrcpi"
6917 : "t1\010pfrcpit2\010pfrsqit1\007pfrsqrt\005pfsub\006pfsubr\006phaddd\007p"
6918 : "haddsw\006phaddw\nphminposuw\006phsubd\007phsubsw\006phsubw\005pi2fd\005"
6919 : "pi2fw\006pinsrb\006pinsrd\006pinsrq\006pinsrw\tpmaddubsw\007pmaddwd\006"
6920 : "pmaxsb\006pmaxsd\006pmaxsw\006pmaxub\006pmaxud\006pmaxuw\006pminsb\006p"
6921 : "minsd\006pminsw\006pminub\006pminud\006pminuw\010pmovmskb\010pmovsxbd\010"
6922 : "pmovsxbq\010pmovsxbw\010pmovsxdq\010pmovsxwd\010pmovsxwq\010pmovzxbd\010"
6923 : "pmovzxbq\010pmovzxbw\010pmovzxdq\010pmovzxwd\010pmovzxwq\006pmuldq\010p"
6924 : "mulhrsw\007pmulhrw\007pmulhuw\006pmulhw\006pmulld\006pmullw\007pmuludq\003"
6925 : "pop\005popal\005popaw\006popcnt\007popcntl\007popcntq\007popcntw\004pop"
6926 : "f\005popfd\005popfl\005popfq\005popfw\004popl\004popq\004popw\003por\010"
6927 : "prefetch\013prefetchnta\nprefetcht0\nprefetcht1\nprefetcht2\tprefetchw\013"
6928 : "prefetchwt1\006psadbw\006pshufb\006pshufd\007pshufhw\007pshuflw\006pshu"
6929 : "fw\006psignb\006psignd\006psignw\005pslld\006pslldq\005psllq\005psllw\005"
6930 : "psrad\005psraw\005psrld\006psrldq\005psrlq\005psrlw\005psubb\005psubd\005"
6931 : "psubq\006psubsb\006psubsw\007psubusb\007psubusw\005psubw\006pswapd\005p"
6932 : "test\007ptwrite\010ptwritel\010ptwriteq\tpunpckhbw\tpunpckhdq\npunpckhq"
6933 : "dq\tpunpckhwd\tpunpcklbw\tpunpckldq\npunpcklqdq\tpunpcklwd\004push\006p"
6934 : "ushal\006pushaw\005pushf\006pushfd\006pushfl\006pushfq\006pushfw\005pus"
6935 : "hl\005pushq\005pushw\004pxor\003rcl\004rclb\004rcll\004rclq\004rclw\005"
6936 : "rcpps\005rcpss\003rcr\004rcrb\004rcrl\004rcrq\004rcrw\010rdfsbase\trdfs"
6937 : "basel\trdfsbaseq\010rdgsbase\trdgsbasel\trdgsbaseq\005rdmsr\005rdpid\006"
6938 : "rdpkru\005rdpmc\006rdrand\007rdrandl\007rdrandq\007rdrandw\006rdseed\007"
6939 : "rdseedl\007rdseedq\007rdseedw\006rdsspd\006rdsspq\005rdtsc\006rdtscp\003"
6940 : "rep\005repne\003ret\004retf\005retfq\004retl\004retq\004retw\005rex64\003"
6941 : "rol\004rolb\004roll\004rolq\004rolw\003ror\004rorb\004rorl\004rorq\004r"
6942 : "orw\004rorx\005rorxl\005rorxq\007roundpd\007roundps\007roundsd\007round"
6943 : "ss\003rsm\007rsqrtps\007rsqrtss\010rstorssp\004sahf\004salc\003sar\004s"
6944 : "arb\004sarl\004sarq\004sarw\004sarx\005sarxl\005sarxq\013saveprevssp\003"
6945 : "sbb\004sbbb\004sbbl\004sbbq\004sbbw\004scas\005scasb\005scasd\005scasl\005"
6946 : "scasq\005scasw\004seta\005setae\004setb\005setbe\004sete\004setg\005set"
6947 : "ge\004setl\005setle\005setne\005setno\005setnp\005setns\004seto\004setp"
6948 : "\004sets\010setssbsy\006sfence\004sgdt\005sgdtd\005sgdtl\005sgdtq\005sg"
6949 : "dtw\010sha1msg1\010sha1msg2\tsha1nexte\tsha1rnds4\nsha256msg1\nsha256ms"
6950 : "g2\013sha256rnds2\003shl\004shlb\004shld\005shldl\005shldq\005shldw\004"
6951 : "shll\004shlq\004shlw\004shlx\005shlxl\005shlxq\003shr\004shrb\004shrd\005"
6952 : "shrdl\005shrdq\005shrdw\004shrl\004shrq\004shrw\004shrx\005shrxl\005shr"
6953 : "xq\006shufpd\006shufps\004sidt\005sidtd\005sidtl\005sidtq\005sidtw\006s"
6954 : "kinit\004sldt\005sldtl\005sldtq\005sldtw\006slwpcb\004smsw\005smswl\005"
6955 : "smswq\005smsww\006sqrtpd\006sqrtps\006sqrtsd\006sqrtss\002ss\004stac\003"
6956 : "stc\003std\004stgi\003sti\007stmxcsr\004stos\005stosb\005stosd\005stosl"
6957 : "\005stosq\005stosw\003str\004strl\004strq\004strw\003sub\004subb\004sub"
6958 : "l\005subpd\005subps\004subq\005subsd\005subss\004subw\006swapgs\007sysc"
6959 : "all\010sysenter\007sysexit\010sysexitl\010sysexitq\006sysret\007sysretl"
6960 : "\007sysretq\006t1mskc\007t1mskcl\007t1mskcq\004test\005testb\005testl\005"
6961 : "testq\005testw\006tpause\005tzcnt\006tzcntl\006tzcntq\006tzcntw\005tzms"
6962 : "k\006tzmskl\006tzmskq\007ucomisd\007ucomiss\003ud2\004ud2b\010umonitor\006"
6963 : "umwait\010unpckhpd\010unpckhps\010unpcklpd\010unpcklps\tv4fmaddps\tv4fm"
6964 : "addss\nv4fnmaddps\nv4fnmaddss\006vaddpd\006vaddps\006vaddsd\006vaddss\t"
6965 : "vaddsubpd\tvaddsubps\007vaesdec\013vaesdeclast\007vaesenc\013vaesenclas"
6966 : "t\007vaesimc\020vaeskeygenassist\007valignd\007valignq\007vandnpd\007va"
6967 : "ndnps\006vandpd\006vandps\tvblendmpd\tvblendmps\010vblendpd\010vblendps"
6968 : "\tvblendvpd\tvblendvps\016vbroadcastf128\017vbroadcastf32x2\017vbroadca"
6969 : "stf32x4\017vbroadcastf32x8\017vbroadcastf64x2\017vbroadcastf64x4\016vbr"
6970 : "oadcasti128\017vbroadcasti32x2\017vbroadcasti32x4\017vbroadcasti32x8\017"
6971 : "vbroadcasti64x2\017vbroadcasti64x4\014vbroadcastsd\014vbroadcastss\004v"
6972 : "cmp\006vcmppd\006vcmpps\006vcmpsd\006vcmpss\007vcomisd\007vcomiss\013vc"
6973 : "ompresspd\013vcompressps\tvcvtdq2pd\tvcvtdq2ps\tvcvtpd2dq\nvcvtpd2dqx\n"
6974 : "vcvtpd2dqy\tvcvtpd2ps\nvcvtpd2psx\nvcvtpd2psy\tvcvtpd2qq\nvcvtpd2udq\013"
6975 : "vcvtpd2udqx\013vcvtpd2udqy\nvcvtpd2uqq\tvcvtph2ps\tvcvtps2dq\tvcvtps2pd"
6976 : "\tvcvtps2ph\tvcvtps2qq\nvcvtps2udq\nvcvtps2uqq\tvcvtqq2pd\tvcvtqq2ps\nv"
6977 : "cvtqq2psx\nvcvtqq2psy\tvcvtsd2si\nvcvtsd2sil\nvcvtsd2siq\tvcvtsd2ss\nvc"
6978 : "vtsd2usi\013vcvtsd2usil\013vcvtsd2usiq\tvcvtsi2sd\nvcvtsi2sdl\nvcvtsi2s"
6979 : "dq\tvcvtsi2ss\nvcvtsi2ssl\nvcvtsi2ssq\tvcvtss2sd\tvcvtss2si\nvcvtss2sil"
6980 : "\nvcvtss2siq\nvcvtss2usi\013vcvtss2usil\013vcvtss2usiq\nvcvttpd2dq\013v"
6981 : "cvttpd2dqx\013vcvttpd2dqy\nvcvttpd2qq\013vcvttpd2udq\014vcvttpd2udqx\014"
6982 : "vcvttpd2udqy\013vcvttpd2uqq\nvcvttps2dq\nvcvttps2qq\013vcvttps2udq\013v"
6983 : "cvttps2uqq\nvcvttsd2si\013vcvttsd2sil\013vcvttsd2siq\013vcvttsd2usi\014"
6984 : "vcvttsd2usil\014vcvttsd2usiq\nvcvttss2si\013vcvttss2sil\013vcvttss2siq\013"
6985 : "vcvttss2usi\014vcvttss2usil\014vcvttss2usiq\nvcvtudq2pd\nvcvtudq2ps\nvc"
6986 : "vtuqq2pd\nvcvtuqq2ps\013vcvtuqq2psx\013vcvtuqq2psy\nvcvtusi2sd\013vcvtu"
6987 : "si2sdl\013vcvtusi2sdq\nvcvtusi2ss\013vcvtusi2ssl\013vcvtusi2ssq\tvdbpsa"
6988 : "dbw\006vdivpd\006vdivps\006vdivsd\006vdivss\005vdppd\005vdpps\004verr\004"
6989 : "verw\007vexp2pd\007vexp2ps\tvexpandpd\tvexpandps\014vextractf128\015vex"
6990 : "tractf32x4\015vextractf32x8\015vextractf64x2\015vextractf64x4\014vextra"
6991 : "cti128\015vextracti32x4\015vextracti32x8\015vextracti64x2\015vextracti6"
6992 : "4x4\nvextractps\013vfixupimmpd\013vfixupimmps\013vfixupimmsd\013vfixupi"
6993 : "mmss\013vfmadd132pd\013vfmadd132ps\013vfmadd132sd\013vfmadd132ss\013vfm"
6994 : "add213pd\013vfmadd213ps\013vfmadd213sd\013vfmadd213ss\013vfmadd231pd\013"
6995 : "vfmadd231ps\013vfmadd231sd\013vfmadd231ss\010vfmaddpd\010vfmaddps\010vf"
6996 : "maddsd\010vfmaddss\016vfmaddsub132pd\016vfmaddsub132ps\016vfmaddsub213p"
6997 : "d\016vfmaddsub213ps\016vfmaddsub231pd\016vfmaddsub231ps\013vfmaddsubpd\013"
6998 : "vfmaddsubps\013vfmsub132pd\013vfmsub132ps\013vfmsub132sd\013vfmsub132ss"
6999 : "\013vfmsub213pd\013vfmsub213ps\013vfmsub213sd\013vfmsub213ss\013vfmsub2"
7000 : "31pd\013vfmsub231ps\013vfmsub231sd\013vfmsub231ss\016vfmsubadd132pd\016"
7001 : "vfmsubadd132ps\016vfmsubadd213pd\016vfmsubadd213ps\016vfmsubadd231pd\016"
7002 : "vfmsubadd231ps\013vfmsubaddpd\013vfmsubaddps\010vfmsubpd\010vfmsubps\010"
7003 : "vfmsubsd\010vfmsubss\014vfnmadd132pd\014vfnmadd132ps\014vfnmadd132sd\014"
7004 : "vfnmadd132ss\014vfnmadd213pd\014vfnmadd213ps\014vfnmadd213sd\014vfnmadd"
7005 : "213ss\014vfnmadd231pd\014vfnmadd231ps\014vfnmadd231sd\014vfnmadd231ss\t"
7006 : "vfnmaddpd\tvfnmaddps\tvfnmaddsd\tvfnmaddss\014vfnmsub132pd\014vfnmsub13"
7007 : "2ps\014vfnmsub132sd\014vfnmsub132ss\014vfnmsub213pd\014vfnmsub213ps\014"
7008 : "vfnmsub213sd\014vfnmsub213ss\014vfnmsub231pd\014vfnmsub231ps\014vfnmsub"
7009 : "231sd\014vfnmsub231ss\tvfnmsubpd\tvfnmsubps\tvfnmsubsd\tvfnmsubss\nvfpc"
7010 : "lasspd\013vfpclasspdq\013vfpclasspdx\013vfpclasspdy\013vfpclasspdz\nvfp"
7011 : "classps\013vfpclasspsl\013vfpclasspsx\013vfpclasspsy\013vfpclasspsz\nvf"
7012 : "pclasssd\nvfpclassss\007vfrczpd\007vfrczps\007vfrczsd\007vfrczss\nvgath"
7013 : "erdpd\nvgatherdps\015vgatherpf0dpd\015vgatherpf0dps\015vgatherpf0qpd\015"
7014 : "vgatherpf0qps\015vgatherpf1dpd\015vgatherpf1dps\015vgatherpf1qpd\015vga"
7015 : "therpf1qps\nvgatherqpd\nvgatherqps\tvgetexppd\tvgetexpps\tvgetexpsd\tvg"
7016 : "etexpss\nvgetmantpd\nvgetmantps\nvgetmantsd\nvgetmantss\021vgf2p8affine"
7017 : "invqb\016vgf2p8affineqb\nvgf2p8mulb\007vhaddpd\007vhaddps\007vhsubpd\007"
7018 : "vhsubps\013vinsertf128\014vinsertf32x4\014vinsertf32x8\014vinsertf64x2\014"
7019 : "vinsertf64x4\013vinserti128\014vinserti32x4\014vinserti32x8\014vinserti"
7020 : "64x2\014vinserti64x4\tvinsertps\006vlddqu\010vldmxcsr\013vmaskmovdqu\nv"
7021 : "maskmovpd\nvmaskmovps\006vmaxpd\006vmaxps\006vmaxsd\006vmaxss\006vmcall"
7022 : "\007vmclear\006vmfunc\006vminpd\006vminps\006vminsd\006vminss\010vmlaun"
7023 : "ch\006vmload\007vmmcall\007vmovapd\tvmovapd.s\007vmovaps\tvmovaps.s\005"
7024 : "vmovd\010vmovddup\007vmovdqa\tvmovdqa.s\tvmovdqa32\013vmovdqa32.s\tvmov"
7025 : "dqa64\013vmovdqa64.s\007vmovdqu\tvmovdqu.s\tvmovdqu16\013vmovdqu16.s\tv"
7026 : "movdqu32\013vmovdqu32.s\tvmovdqu64\013vmovdqu64.s\010vmovdqu8\nvmovdqu8"
7027 : ".s\010vmovhlps\007vmovhpd\007vmovhps\010vmovlhps\007vmovlpd\007vmovlps\t"
7028 : "vmovmskpd\tvmovmskps\010vmovntdq\tvmovntdqa\010vmovntpd\010vmovntps\005"
7029 : "vmovq\007vmovq.s\006vmovsd\010vmovsd.s\tvmovshdup\tvmovsldup\006vmovss\010"
7030 : "vmovss.s\007vmovupd\tvmovupd.s\007vmovups\tvmovups.s\010vmpsadbw\007vmp"
7031 : "trld\007vmptrst\006vmread\007vmreadl\007vmreadq\010vmresume\005vmrun\006"
7032 : "vmsave\006vmulpd\006vmulps\006vmulsd\006vmulss\007vmwrite\010vmwritel\010"
7033 : "vmwriteq\006vmxoff\005vmxon\005vorpd\005vorps\tvp4dpwssd\nvp4dpwssds\006"
7034 : "vpabsb\006vpabsd\006vpabsq\006vpabsw\tvpackssdw\tvpacksswb\tvpackusdw\t"
7035 : "vpackuswb\006vpaddb\006vpaddd\006vpaddq\007vpaddsb\007vpaddsw\010vpaddu"
7036 : "sb\010vpaddusw\006vpaddw\010vpalignr\005vpand\006vpandd\006vpandn\007vp"
7037 : "andnd\007vpandnq\006vpandq\006vpavgb\006vpavgw\010vpblendd\tvpblendmb\t"
7038 : "vpblendmd\tvpblendmq\tvpblendmw\tvpblendvb\010vpblendw\014vpbroadcastb\014"
7039 : "vpbroadcastd\017vpbroadcastmb2q\017vpbroadcastmw2d\014vpbroadcastq\014v"
7040 : "pbroadcastw\015vpclmulhqhqdq\015vpclmulhqlqdq\015vpclmullqhqdq\015vpclm"
7041 : "ullqlqdq\nvpclmulqdq\006vpcmov\005vpcmp\006vpcmpb\006vpcmpd\010vpcmpeqb"
7042 : "\010vpcmpeqd\010vpcmpeqq\010vpcmpeqw\nvpcmpestri\nvpcmpestrm\010vpcmpgt"
7043 : "b\010vpcmpgtd\010vpcmpgtq\010vpcmpgtw\nvpcmpistri\nvpcmpistrm\006vpcmpq"
7044 : "\007vpcmpub\007vpcmpud\007vpcmpuq\007vpcmpuw\006vpcmpw\005vpcom\006vpco"
7045 : "mb\006vpcomd\013vpcompressb\013vpcompressd\013vpcompressq\013vpcompress"
7046 : "w\006vpcomq\007vpcomub\007vpcomud\007vpcomuq\007vpcomuw\006vpcomw\013vp"
7047 : "conflictd\013vpconflictq\010vpdpbusd\tvpdpbusds\010vpdpwssd\tvpdpwssds\n"
7048 : "vperm2f128\nvperm2i128\006vpermb\006vpermd\010vpermi2b\010vpermi2d\tvpe"
7049 : "rmi2pd\tvpermi2ps\010vpermi2q\010vpermi2w\nvpermil2pd\nvpermil2ps\tvper"
7050 : "milpd\tvpermilps\007vpermpd\007vpermps\006vpermq\010vpermt2b\010vpermt2"
7051 : "d\tvpermt2pd\tvpermt2ps\010vpermt2q\010vpermt2w\006vpermw\tvpexpandb\tv"
7052 : "pexpandd\tvpexpandq\tvpexpandw\007vpextrb\007vpextrd\007vpextrq\007vpex"
7053 : "trw\nvpgatherdd\nvpgatherdq\nvpgatherqd\nvpgatherqq\010vphaddbd\010vpha"
7054 : "ddbq\010vphaddbw\007vphaddd\010vphadddq\010vphaddsw\tvphaddubd\tvphaddu"
7055 : "bq\tvphaddubw\tvphaddudq\tvphadduwd\tvphadduwq\007vphaddw\010vphaddwd\010"
7056 : "vphaddwq\013vphminposuw\010vphsubbw\007vphsubd\010vphsubdq\010vphsubsw\007"
7057 : "vphsubw\010vphsubwd\007vpinsrb\007vpinsrd\007vpinsrq\007vpinsrw\010vplz"
7058 : "cntd\010vplzcntq\010vpmacsdd\tvpmacsdqh\tvpmacsdql\tvpmacssdd\nvpmacssd"
7059 : "qh\nvpmacssdql\tvpmacsswd\tvpmacssww\010vpmacswd\010vpmacsww\nvpmadcssw"
7060 : "d\tvpmadcswd\013vpmadd52huq\013vpmadd52luq\nvpmaddubsw\010vpmaddwd\nvpm"
7061 : "askmovd\nvpmaskmovq\007vpmaxsb\007vpmaxsd\007vpmaxsq\007vpmaxsw\007vpma"
7062 : "xub\007vpmaxud\007vpmaxuq\007vpmaxuw\007vpminsb\007vpminsd\007vpminsq\007"
7063 : "vpminsw\007vpminub\007vpminud\007vpminuq\007vpminuw\010vpmovb2m\010vpmo"
7064 : "vd2m\007vpmovdb\007vpmovdw\010vpmovm2b\010vpmovm2d\010vpmovm2q\010vpmov"
7065 : "m2w\tvpmovmskb\010vpmovq2m\007vpmovqb\007vpmovqd\007vpmovqw\010vpmovsdb"
7066 : "\010vpmovsdw\010vpmovsqb\010vpmovsqd\010vpmovsqw\010vpmovswb\tvpmovsxbd"
7067 : "\tvpmovsxbq\tvpmovsxbw\tvpmovsxdq\tvpmovsxwd\tvpmovsxwq\tvpmovusdb\tvpm"
7068 : "ovusdw\tvpmovusqb\tvpmovusqd\tvpmovusqw\tvpmovuswb\010vpmovw2m\007vpmov"
7069 : "wb\tvpmovzxbd\tvpmovzxbq\tvpmovzxbw\tvpmovzxdq\tvpmovzxwd\tvpmovzxwq\007"
7070 : "vpmuldq\tvpmulhrsw\010vpmulhuw\007vpmulhw\007vpmulld\007vpmullq\007vpmu"
7071 : "llw\016vpmultishiftqb\010vpmuludq\010vpopcntb\010vpopcntd\010vpopcntq\010"
7072 : "vpopcntw\004vpor\005vpord\005vporq\006vpperm\006vprold\006vprolq\007vpr"
7073 : "olvd\007vprolvq\006vprord\006vprorq\007vprorvd\007vprorvq\006vprotb\006"
7074 : "vprotd\006vprotq\006vprotw\007vpsadbw\013vpscatterdd\013vpscatterdq\013"
7075 : "vpscatterqd\013vpscatterqq\006vpshab\006vpshad\006vpshaq\006vpshaw\006v"
7076 : "pshlb\006vpshld\007vpshldd\007vpshldq\010vpshldvd\010vpshldvq\010vpshld"
7077 : "vw\007vpshldw\006vpshlq\006vpshlw\007vpshrdd\007vpshrdq\010vpshrdvd\010"
7078 : "vpshrdvq\010vpshrdvw\007vpshrdw\007vpshufb\014vpshufbitqmb\007vpshufd\010"
7079 : "vpshufhw\010vpshuflw\007vpsignb\007vpsignd\007vpsignw\006vpslld\007vpsl"
7080 : "ldq\006vpsllq\007vpsllvd\007vpsllvq\007vpsllvw\006vpsllw\006vpsrad\006v"
7081 : "psraq\007vpsravd\007vpsravq\007vpsravw\006vpsraw\006vpsrld\007vpsrldq\006"
7082 : "vpsrlq\007vpsrlvd\007vpsrlvq\007vpsrlvw\006vpsrlw\006vpsubb\006vpsubd\006"
7083 : "vpsubq\007vpsubsb\007vpsubsw\010vpsubusb\010vpsubusw\006vpsubw\nvpternl"
7084 : "ogd\nvpternlogq\006vptest\010vptestmb\010vptestmd\010vptestmq\010vptest"
7085 : "mw\tvptestnmb\tvptestnmd\tvptestnmq\tvptestnmw\nvpunpckhbw\nvpunpckhdq\013"
7086 : "vpunpckhqdq\nvpunpckhwd\nvpunpcklbw\nvpunpckldq\013vpunpcklqdq\nvpunpck"
7087 : "lwd\005vpxor\006vpxord\006vpxorq\010vrangepd\010vrangeps\010vrangesd\010"
7088 : "vrangess\010vrcp14pd\010vrcp14ps\010vrcp14sd\010vrcp14ss\010vrcp28pd\010"
7089 : "vrcp28ps\010vrcp28sd\010vrcp28ss\006vrcpps\006vrcpss\tvreducepd\tvreduc"
7090 : "eps\tvreducesd\tvreducess\013vrndscalepd\013vrndscaleps\013vrndscalesd\013"
7091 : "vrndscaless\010vroundpd\010vroundps\010vroundsd\010vroundss\nvrsqrt14pd"
7092 : "\nvrsqrt14ps\nvrsqrt14sd\nvrsqrt14ss\nvrsqrt28pd\nvrsqrt28ps\nvrsqrt28s"
7093 : "d\nvrsqrt28ss\010vrsqrtps\010vrsqrtss\tvscalefpd\tvscalefps\tvscalefsd\t"
7094 : "vscalefss\013vscatterdpd\013vscatterdps\016vscatterpf0dpd\016vscatterpf"
7095 : "0dps\016vscatterpf0qpd\016vscatterpf0qps\016vscatterpf1dpd\016vscatterp"
7096 : "f1dps\016vscatterpf1qpd\016vscatterpf1qps\013vscatterqpd\013vscatterqps"
7097 : "\nvshuff32x4\nvshuff64x2\nvshufi32x4\nvshufi64x2\007vshufpd\007vshufps\007"
7098 : "vsqrtpd\007vsqrtps\007vsqrtsd\007vsqrtss\010vstmxcsr\006vsubpd\006vsubp"
7099 : "s\006vsubsd\006vsubss\007vtestpd\007vtestps\010vucomisd\010vucomiss\tvu"
7100 : "npckhpd\tvunpckhps\tvunpcklpd\tvunpcklps\006vxorpd\006vxorps\010vzeroal"
7101 : "l\nvzeroupper\004wait\006wbinvd\010wbnoinvd\010wrfsbase\twrfsbasel\twrf"
7102 : "sbaseq\010wrgsbase\twrgsbasel\twrgsbaseq\005wrmsr\006wrpkru\005wrssd\005"
7103 : "wrssq\006wrussd\006wrussq\006xabort\010xacquire\004xadd\005xaddb\005xad"
7104 : "dl\005xaddq\005xaddw\006xbegin\004xchg\005xchgb\005xchgl\005xchgq\005xc"
7105 : "hgw\txcryptcbc\txcryptcfb\txcryptctr\txcryptecb\txcryptofb\004xend\006x"
7106 : "getbv\005xlatb\003xor\004xorb\004xorl\005xorpd\005xorps\004xorq\004xorw"
7107 : "\010xrelease\006xrstor\010xrstor64\007xrstors\txrstors64\005xsave\007xs"
7108 : "ave64\006xsavec\010xsavec64\010xsaveopt\nxsaveopt64\006xsaves\010xsaves"
7109 : "64\006xsetbv\005xsha1\007xsha256\006xstore\txstorerng\005xtest";
7110 :
7111 : namespace {
7112 : struct MatchEntry {
7113 : uint16_t Mnemonic;
7114 : uint16_t Opcode;
7115 : uint16_t ConvertFn;
7116 : uint8_t RequiredFeatures;
7117 : uint8_t Classes[9];
7118 0 : StringRef getMnemonic() const {
7119 0 : return StringRef(MnemonicTable + Mnemonic + 1,
7120 0 : MnemonicTable[Mnemonic]);
7121 : }
7122 : };
7123 :
7124 : // Predicate for searching for an opcode.
7125 : struct LessOpcode {
7126 0 : bool operator()(const MatchEntry &LHS, StringRef RHS) {
7127 0 : return LHS.getMnemonic() < RHS;
7128 : }
7129 0 : bool operator()(StringRef LHS, const MatchEntry &RHS) {
7130 0 : return LHS < RHS.getMnemonic();
7131 : }
7132 : bool operator()(const MatchEntry &LHS, const MatchEntry &RHS) {
7133 : return LHS.getMnemonic() < RHS.getMnemonic();
7134 : }
7135 : };
7136 : } // end anonymous namespace.
7137 :
7138 : static const MatchEntry MatchTable0[] = {
7139 : { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
7140 : { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
7141 : { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
7142 : { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
7143 : { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
7144 : { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
7145 : { 20 /* adcb */, X86::ADC8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7146 : { 20 /* adcb */, X86::ADC8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7147 : { 20 /* adcb */, X86::ADC8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7148 : { 20 /* adcb */, X86::ADC8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7149 : { 20 /* adcb */, X86::ADC8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7150 : { 20 /* adcb */, X86::ADC8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7151 : { 25 /* adcl */, X86::ADC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7152 : { 25 /* adcl */, X86::ADC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7153 : { 25 /* adcl */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7154 : { 25 /* adcl */, X86::ADC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7155 : { 25 /* adcl */, X86::ADC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7156 : { 25 /* adcl */, X86::ADC32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7157 : { 25 /* adcl */, X86::ADC32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7158 : { 25 /* adcl */, X86::ADC32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7159 : { 25 /* adcl */, X86::ADC32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7160 : { 30 /* adcq */, X86::ADC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7161 : { 30 /* adcq */, X86::ADC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7162 : { 30 /* adcq */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7163 : { 30 /* adcq */, X86::ADC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7164 : { 30 /* adcq */, X86::ADC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7165 : { 30 /* adcq */, X86::ADC64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7166 : { 30 /* adcq */, X86::ADC64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7167 : { 30 /* adcq */, X86::ADC64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7168 : { 30 /* adcq */, X86::ADC64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7169 : { 35 /* adcw */, X86::ADC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7170 : { 35 /* adcw */, X86::ADC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7171 : { 35 /* adcw */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7172 : { 35 /* adcw */, X86::ADC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7173 : { 35 /* adcw */, X86::ADC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7174 : { 35 /* adcw */, X86::ADC16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7175 : { 35 /* adcw */, X86::ADC16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7176 : { 35 /* adcw */, X86::ADC16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7177 : { 35 /* adcw */, X86::ADC16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7178 : { 45 /* adcxl */, X86::ADCX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7179 : { 45 /* adcxl */, X86::ADCX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7180 : { 51 /* adcxq */, X86::ADCX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7181 : { 51 /* adcxq */, X86::ADCX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7182 : { 61 /* addb */, X86::ADD8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7183 : { 61 /* addb */, X86::ADD8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7184 : { 61 /* addb */, X86::ADD8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7185 : { 61 /* addb */, X86::ADD8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7186 : { 61 /* addb */, X86::ADD8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7187 : { 61 /* addb */, X86::ADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7188 : { 66 /* addl */, X86::ADD32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7189 : { 66 /* addl */, X86::ADD32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7190 : { 66 /* addl */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7191 : { 66 /* addl */, X86::ADD32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7192 : { 66 /* addl */, X86::ADD32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7193 : { 66 /* addl */, X86::ADD32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7194 : { 66 /* addl */, X86::ADD32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7195 : { 66 /* addl */, X86::ADD32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7196 : { 66 /* addl */, X86::ADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7197 : { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7198 : { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7199 : { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7200 : { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7201 : { 83 /* addq */, X86::ADD64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7202 : { 83 /* addq */, X86::ADD64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7203 : { 83 /* addq */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7204 : { 83 /* addq */, X86::ADD64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7205 : { 83 /* addq */, X86::ADD64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7206 : { 83 /* addq */, X86::ADD64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7207 : { 83 /* addq */, X86::ADD64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7208 : { 83 /* addq */, X86::ADD64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7209 : { 83 /* addq */, X86::ADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7210 : { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7211 : { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7212 : { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7213 : { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7214 : { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7215 : { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7216 : { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7217 : { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7218 : { 118 /* addw */, X86::ADD16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7219 : { 118 /* addw */, X86::ADD16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7220 : { 118 /* addw */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7221 : { 118 /* addw */, X86::ADD16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7222 : { 118 /* addw */, X86::ADD16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7223 : { 118 /* addw */, X86::ADD16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7224 : { 118 /* addw */, X86::ADD16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7225 : { 118 /* addw */, X86::ADD16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7226 : { 118 /* addw */, X86::ADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7227 : { 128 /* adoxl */, X86::ADOX32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7228 : { 128 /* adoxl */, X86::ADOX32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7229 : { 134 /* adoxq */, X86::ADOX64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7230 : { 134 /* adoxq */, X86::ADOX64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7231 : { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7232 : { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7233 : { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7234 : { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7235 : { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7236 : { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7237 : { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7238 : { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7239 : { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7240 : { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7241 : { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7242 : { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7243 : { 203 /* andb */, X86::AND8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7244 : { 203 /* andb */, X86::AND8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7245 : { 203 /* andb */, X86::AND8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7246 : { 203 /* andb */, X86::AND8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7247 : { 203 /* andb */, X86::AND8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7248 : { 203 /* andb */, X86::AND8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7249 : { 208 /* andl */, X86::AND32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7250 : { 208 /* andl */, X86::AND32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7251 : { 208 /* andl */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7252 : { 208 /* andl */, X86::AND32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7253 : { 208 /* andl */, X86::AND32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7254 : { 208 /* andl */, X86::AND32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7255 : { 208 /* andl */, X86::AND32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7256 : { 208 /* andl */, X86::AND32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7257 : { 208 /* andl */, X86::AND32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7258 : { 218 /* andnl */, X86::ANDN32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7259 : { 218 /* andnl */, X86::ANDN32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
7260 : { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7261 : { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7262 : { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7263 : { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7264 : { 238 /* andnq */, X86::ANDN64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7265 : { 238 /* andnq */, X86::ANDN64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
7266 : { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7267 : { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7268 : { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7269 : { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7270 : { 256 /* andq */, X86::AND64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7271 : { 256 /* andq */, X86::AND64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7272 : { 256 /* andq */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7273 : { 256 /* andq */, X86::AND64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7274 : { 256 /* andq */, X86::AND64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7275 : { 256 /* andq */, X86::AND64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7276 : { 256 /* andq */, X86::AND64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7277 : { 256 /* andq */, X86::AND64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7278 : { 256 /* andq */, X86::AND64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7279 : { 261 /* andw */, X86::AND16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7280 : { 261 /* andw */, X86::AND16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7281 : { 261 /* andw */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7282 : { 261 /* andw */, X86::AND16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7283 : { 261 /* andw */, X86::AND16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7284 : { 261 /* andw */, X86::AND16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7285 : { 261 /* andw */, X86::AND16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7286 : { 261 /* andw */, X86::AND16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7287 : { 261 /* andw */, X86::AND16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7288 : { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
7289 : { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_1__Reg1_0, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
7290 : { 277 /* bextrl */, X86::BEXTR32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7291 : { 277 /* bextrl */, X86::BEXTR32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
7292 : { 277 /* bextrl */, X86::BEXTRI32ri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
7293 : { 277 /* bextrl */, X86::BEXTRI32mi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
7294 : { 284 /* bextrq */, X86::BEXTR64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7295 : { 284 /* bextrq */, X86::BEXTR64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
7296 : { 284 /* bextrq */, X86::BEXTRI64ri, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
7297 : { 284 /* bextrq */, X86::BEXTRI64mi, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
7298 : { 299 /* blcfilll */, X86::BLCFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7299 : { 299 /* blcfilll */, X86::BLCFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7300 : { 308 /* blcfillq */, X86::BLCFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7301 : { 308 /* blcfillq */, X86::BLCFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7302 : { 328 /* blcicl */, X86::BLCIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7303 : { 328 /* blcicl */, X86::BLCIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7304 : { 335 /* blcicq */, X86::BLCIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7305 : { 335 /* blcicq */, X86::BLCIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7306 : { 342 /* blcil */, X86::BLCI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7307 : { 342 /* blcil */, X86::BLCI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7308 : { 348 /* blciq */, X86::BLCI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7309 : { 348 /* blciq */, X86::BLCI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7310 : { 361 /* blcmskl */, X86::BLCMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7311 : { 361 /* blcmskl */, X86::BLCMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7312 : { 369 /* blcmskq */, X86::BLCMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7313 : { 369 /* blcmskq */, X86::BLCMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7314 : { 382 /* blcsl */, X86::BLCS32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7315 : { 382 /* blcsl */, X86::BLCS32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7316 : { 388 /* blcsq */, X86::BLCS64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7317 : { 388 /* blcsq */, X86::BLCS64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7318 : { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7319 : { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7320 : { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7321 : { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7322 : { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7323 : { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7324 : { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
7325 : { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
7326 : { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7327 : { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7328 : { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
7329 : { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
7330 : { 436 /* blsfilll */, X86::BLSFILL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7331 : { 436 /* blsfilll */, X86::BLSFILL32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7332 : { 445 /* blsfillq */, X86::BLSFILL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7333 : { 445 /* blsfillq */, X86::BLSFILL64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7334 : { 465 /* blsicl */, X86::BLSIC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7335 : { 465 /* blsicl */, X86::BLSIC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7336 : { 472 /* blsicq */, X86::BLSIC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7337 : { 472 /* blsicq */, X86::BLSIC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7338 : { 479 /* blsil */, X86::BLSI32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7339 : { 479 /* blsil */, X86::BLSI32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7340 : { 485 /* blsiq */, X86::BLSI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7341 : { 485 /* blsiq */, X86::BLSI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7342 : { 498 /* blsmskl */, X86::BLSMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7343 : { 498 /* blsmskl */, X86::BLSMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7344 : { 506 /* blsmskq */, X86::BLSMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7345 : { 506 /* blsmskq */, X86::BLSMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7346 : { 519 /* blsrl */, X86::BLSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7347 : { 519 /* blsrl */, X86::BLSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7348 : { 525 /* blsrq */, X86::BLSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7349 : { 525 /* blsrq */, X86::BLSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7350 : { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7351 : { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7352 : { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7353 : { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7354 : { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7355 : { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7356 : { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7357 : { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7358 : { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_BNDR }, },
7359 : { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_BNDR }, },
7360 : { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7361 : { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7362 : { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_BNDR }, },
7363 : { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_BNDR }, },
7364 : { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_BNDR }, },
7365 : { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_1__Reg1_0, 0, { MCK_BNDR, MCK_BNDR }, },
7366 : { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_1__Reg1_0, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
7367 : { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_1__Reg1_0, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
7368 : { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
7369 : { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_1__Mem645_0, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
7370 : { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_1__Reg1_0, 0, { MCK_BNDR, MCK_Mem }, },
7371 : { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
7372 : { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
7373 : { 586 /* bsfl */, X86::BSF32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7374 : { 586 /* bsfl */, X86::BSF32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7375 : { 591 /* bsfq */, X86::BSF64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7376 : { 591 /* bsfq */, X86::BSF64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7377 : { 596 /* bsfw */, X86::BSF16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7378 : { 596 /* bsfw */, X86::BSF16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7379 : { 605 /* bsrl */, X86::BSR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7380 : { 605 /* bsrl */, X86::BSR32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7381 : { 610 /* bsrq */, X86::BSR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7382 : { 610 /* bsrq */, X86::BSR64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7383 : { 615 /* bsrw */, X86::BSR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7384 : { 615 /* bsrw */, X86::BSR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7385 : { 626 /* bswapl */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
7386 : { 633 /* bswapq */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
7387 : { 640 /* bt */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7388 : { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7389 : { 647 /* btcl */, X86::BTC32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7390 : { 647 /* btcl */, X86::BTC32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7391 : { 647 /* btcl */, X86::BTC32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7392 : { 647 /* btcl */, X86::BTC32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7393 : { 652 /* btcq */, X86::BTC64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7394 : { 652 /* btcq */, X86::BTC64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7395 : { 652 /* btcq */, X86::BTC64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7396 : { 652 /* btcq */, X86::BTC64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7397 : { 657 /* btcw */, X86::BTC16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7398 : { 657 /* btcw */, X86::BTC16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7399 : { 657 /* btcw */, X86::BTC16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7400 : { 657 /* btcw */, X86::BTC16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7401 : { 662 /* btl */, X86::BT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7402 : { 662 /* btl */, X86::BT32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7403 : { 662 /* btl */, X86::BT32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7404 : { 662 /* btl */, X86::BT32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7405 : { 666 /* btq */, X86::BT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7406 : { 666 /* btq */, X86::BT64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7407 : { 666 /* btq */, X86::BT64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7408 : { 666 /* btq */, X86::BT64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7409 : { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7410 : { 674 /* btrl */, X86::BTR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7411 : { 674 /* btrl */, X86::BTR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7412 : { 674 /* btrl */, X86::BTR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7413 : { 674 /* btrl */, X86::BTR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7414 : { 679 /* btrq */, X86::BTR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7415 : { 679 /* btrq */, X86::BTR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7416 : { 679 /* btrq */, X86::BTR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7417 : { 679 /* btrq */, X86::BTR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7418 : { 684 /* btrw */, X86::BTR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7419 : { 684 /* btrw */, X86::BTR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7420 : { 684 /* btrw */, X86::BTR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7421 : { 684 /* btrw */, X86::BTR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7422 : { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7423 : { 693 /* btsl */, X86::BTS32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7424 : { 693 /* btsl */, X86::BTS32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7425 : { 693 /* btsl */, X86::BTS32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7426 : { 693 /* btsl */, X86::BTS32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7427 : { 698 /* btsq */, X86::BTS64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7428 : { 698 /* btsq */, X86::BTS64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7429 : { 698 /* btsq */, X86::BTS64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7430 : { 698 /* btsq */, X86::BTS64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7431 : { 703 /* btsw */, X86::BTS16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7432 : { 703 /* btsw */, X86::BTS16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7433 : { 703 /* btsw */, X86::BTS16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7434 : { 703 /* btsw */, X86::BTS16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7435 : { 708 /* btw */, X86::BT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7436 : { 708 /* btw */, X86::BT16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7437 : { 708 /* btw */, X86::BT16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7438 : { 708 /* btw */, X86::BT16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7439 : { 717 /* bzhil */, X86::BZHI32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
7440 : { 717 /* bzhil */, X86::BZHI32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
7441 : { 723 /* bzhiq */, X86::BZHI64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
7442 : { 723 /* bzhiq */, X86::BZHI64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
7443 : { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
7444 : { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
7445 : { 734 /* calll */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
7446 : { 734 /* calll */, X86::CALL32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
7447 : { 734 /* calll */, X86::CALL32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
7448 : { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7449 : { 740 /* callq */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
7450 : { 740 /* callq */, X86::CALL64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
7451 : { 740 /* callq */, X86::CALL64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
7452 : { 746 /* callw */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
7453 : { 746 /* callw */, X86::CALL16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
7454 : { 746 /* callw */, X86::CALL16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
7455 : { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
7456 : { 752 /* cbtw */, X86::CBW, Convert_NoOperands, 0, { }, },
7457 : { 770 /* clac */, X86::CLAC, Convert_NoOperands, 0, { }, },
7458 : { 775 /* clc */, X86::CLC, Convert_NoOperands, 0, { }, },
7459 : { 779 /* cld */, X86::CLD, Convert_NoOperands, 0, { }, },
7460 : { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7461 : { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7462 : { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7463 : { 811 /* clgi */, X86::CLGI, Convert_NoOperands, 0, { }, },
7464 : { 816 /* cli */, X86::CLI, Convert_NoOperands, 0, { }, },
7465 : { 824 /* clrb */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR8 }, },
7466 : { 829 /* clrl */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR32 }, },
7467 : { 834 /* clrq */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR64 }, },
7468 : { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7469 : { 848 /* clrw */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR16 }, },
7470 : { 853 /* cltd */, X86::CDQ, Convert_NoOperands, 0, { }, },
7471 : { 858 /* cltq */, X86::CDQE, Convert_NoOperands, 0, { }, },
7472 : { 863 /* clts */, X86::CLTS, Convert_NoOperands, 0, { }, },
7473 : { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7474 : { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, { }, },
7475 : { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
7476 : { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
7477 : { 880 /* cmc */, X86::CMC, Convert_NoOperands, 0, { }, },
7478 : { 897 /* cmovael */, X86::CMOVAE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7479 : { 897 /* cmovael */, X86::CMOVAE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7480 : { 905 /* cmovaeq */, X86::CMOVAE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7481 : { 905 /* cmovaeq */, X86::CMOVAE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7482 : { 913 /* cmovaew */, X86::CMOVAE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7483 : { 913 /* cmovaew */, X86::CMOVAE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7484 : { 921 /* cmoval */, X86::CMOVA32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7485 : { 921 /* cmoval */, X86::CMOVA32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7486 : { 928 /* cmovaq */, X86::CMOVA64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7487 : { 928 /* cmovaq */, X86::CMOVA64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7488 : { 935 /* cmovaw */, X86::CMOVA16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7489 : { 935 /* cmovaw */, X86::CMOVA16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7490 : { 955 /* cmovbel */, X86::CMOVBE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7491 : { 955 /* cmovbel */, X86::CMOVBE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7492 : { 963 /* cmovbeq */, X86::CMOVBE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7493 : { 963 /* cmovbeq */, X86::CMOVBE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7494 : { 971 /* cmovbew */, X86::CMOVBE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7495 : { 971 /* cmovbew */, X86::CMOVBE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7496 : { 979 /* cmovbl */, X86::CMOVB32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7497 : { 979 /* cmovbl */, X86::CMOVB32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7498 : { 986 /* cmovbq */, X86::CMOVB64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7499 : { 986 /* cmovbq */, X86::CMOVB64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7500 : { 993 /* cmovbw */, X86::CMOVB16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7501 : { 993 /* cmovbw */, X86::CMOVB16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7502 : { 1006 /* cmovel */, X86::CMOVE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7503 : { 1006 /* cmovel */, X86::CMOVE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7504 : { 1013 /* cmoveq */, X86::CMOVE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7505 : { 1013 /* cmoveq */, X86::CMOVE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7506 : { 1020 /* cmovew */, X86::CMOVE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7507 : { 1020 /* cmovew */, X86::CMOVE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7508 : { 1040 /* cmovgel */, X86::CMOVGE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7509 : { 1040 /* cmovgel */, X86::CMOVGE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7510 : { 1048 /* cmovgeq */, X86::CMOVGE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7511 : { 1048 /* cmovgeq */, X86::CMOVGE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7512 : { 1056 /* cmovgew */, X86::CMOVGE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7513 : { 1056 /* cmovgew */, X86::CMOVGE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7514 : { 1064 /* cmovgl */, X86::CMOVG32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7515 : { 1064 /* cmovgl */, X86::CMOVG32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7516 : { 1071 /* cmovgq */, X86::CMOVG64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7517 : { 1071 /* cmovgq */, X86::CMOVG64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7518 : { 1078 /* cmovgw */, X86::CMOVG16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7519 : { 1078 /* cmovgw */, X86::CMOVG16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7520 : { 1098 /* cmovlel */, X86::CMOVLE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7521 : { 1098 /* cmovlel */, X86::CMOVLE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7522 : { 1106 /* cmovleq */, X86::CMOVLE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7523 : { 1106 /* cmovleq */, X86::CMOVLE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7524 : { 1114 /* cmovlew */, X86::CMOVLE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7525 : { 1114 /* cmovlew */, X86::CMOVLE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7526 : { 1122 /* cmovll */, X86::CMOVL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7527 : { 1122 /* cmovll */, X86::CMOVL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7528 : { 1129 /* cmovlq */, X86::CMOVL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7529 : { 1129 /* cmovlq */, X86::CMOVL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7530 : { 1136 /* cmovlw */, X86::CMOVL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7531 : { 1136 /* cmovlw */, X86::CMOVL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7532 : { 1150 /* cmovnel */, X86::CMOVNE32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7533 : { 1150 /* cmovnel */, X86::CMOVNE32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7534 : { 1158 /* cmovneq */, X86::CMOVNE64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7535 : { 1158 /* cmovneq */, X86::CMOVNE64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7536 : { 1166 /* cmovnew */, X86::CMOVNE16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7537 : { 1166 /* cmovnew */, X86::CMOVNE16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7538 : { 1181 /* cmovnol */, X86::CMOVNO32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7539 : { 1181 /* cmovnol */, X86::CMOVNO32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7540 : { 1189 /* cmovnoq */, X86::CMOVNO64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7541 : { 1189 /* cmovnoq */, X86::CMOVNO64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7542 : { 1197 /* cmovnow */, X86::CMOVNO16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7543 : { 1197 /* cmovnow */, X86::CMOVNO16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7544 : { 1212 /* cmovnpl */, X86::CMOVNP32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7545 : { 1212 /* cmovnpl */, X86::CMOVNP32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7546 : { 1220 /* cmovnpq */, X86::CMOVNP64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7547 : { 1220 /* cmovnpq */, X86::CMOVNP64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7548 : { 1228 /* cmovnpw */, X86::CMOVNP16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7549 : { 1228 /* cmovnpw */, X86::CMOVNP16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7550 : { 1243 /* cmovnsl */, X86::CMOVNS32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7551 : { 1243 /* cmovnsl */, X86::CMOVNS32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7552 : { 1251 /* cmovnsq */, X86::CMOVNS64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7553 : { 1251 /* cmovnsq */, X86::CMOVNS64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7554 : { 1259 /* cmovnsw */, X86::CMOVNS16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7555 : { 1259 /* cmovnsw */, X86::CMOVNS16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7556 : { 1273 /* cmovol */, X86::CMOVO32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7557 : { 1273 /* cmovol */, X86::CMOVO32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7558 : { 1280 /* cmovoq */, X86::CMOVO64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7559 : { 1280 /* cmovoq */, X86::CMOVO64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7560 : { 1287 /* cmovow */, X86::CMOVO16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7561 : { 1287 /* cmovow */, X86::CMOVO16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7562 : { 1300 /* cmovpl */, X86::CMOVP32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7563 : { 1300 /* cmovpl */, X86::CMOVP32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7564 : { 1307 /* cmovpq */, X86::CMOVP64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7565 : { 1307 /* cmovpq */, X86::CMOVP64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7566 : { 1314 /* cmovpw */, X86::CMOVP16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7567 : { 1314 /* cmovpw */, X86::CMOVP16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7568 : { 1327 /* cmovsl */, X86::CMOVS32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7569 : { 1327 /* cmovsl */, X86::CMOVS32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7570 : { 1334 /* cmovsq */, X86::CMOVS64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7571 : { 1334 /* cmovsq */, X86::CMOVS64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7572 : { 1341 /* cmovsw */, X86::CMOVS16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7573 : { 1341 /* cmovsw */, X86::CMOVS16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7574 : { 1348 /* cmp */, X86::CMPPDrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
7575 : { 1348 /* cmp */, X86::CMPPDrmi, Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32 }, },
7576 : { 1348 /* cmp */, X86::CMPPSrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
7577 : { 1348 /* cmp */, X86::CMPPSrmi, Convert__Reg1_3__Tie0_1_1__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32 }, },
7578 : { 1348 /* cmp */, X86::CMPSDrr, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
7579 : { 1348 /* cmp */, X86::CMPSDrm, Convert__Reg1_3__Tie0_1_1__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32 }, },
7580 : { 1348 /* cmp */, X86::CMPSSrr, Convert__Reg1_3__Tie0_1_1__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
7581 : { 1348 /* cmp */, X86::CMPSSrm, Convert__Reg1_3__Tie0_1_1__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32 }, },
7582 : { 1352 /* cmpb */, X86::CMP8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7583 : { 1352 /* cmpb */, X86::CMP8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7584 : { 1352 /* cmpb */, X86::CMP8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
7585 : { 1352 /* cmpb */, X86::CMP8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
7586 : { 1352 /* cmpb */, X86::CMP8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
7587 : { 1352 /* cmpb */, X86::CMP8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
7588 : { 1357 /* cmpl */, X86::CMP32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7589 : { 1357 /* cmpl */, X86::CMP32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7590 : { 1357 /* cmpl */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
7591 : { 1357 /* cmpl */, X86::CMP32ri8, Convert__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
7592 : { 1357 /* cmpl */, X86::CMP32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
7593 : { 1357 /* cmpl */, X86::CMP32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
7594 : { 1357 /* cmpl */, X86::CMP32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
7595 : { 1357 /* cmpl */, X86::CMP32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
7596 : { 1357 /* cmpl */, X86::CMP32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7597 : { 1362 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7598 : { 1362 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7599 : { 1368 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7600 : { 1368 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7601 : { 1374 /* cmpq */, X86::CMP64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7602 : { 1374 /* cmpq */, X86::CMP64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7603 : { 1374 /* cmpq */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
7604 : { 1374 /* cmpq */, X86::CMP64ri8, Convert__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
7605 : { 1374 /* cmpq */, X86::CMP64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
7606 : { 1374 /* cmpq */, X86::CMP64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
7607 : { 1374 /* cmpq */, X86::CMP64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
7608 : { 1374 /* cmpq */, X86::CMP64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
7609 : { 1374 /* cmpq */, X86::CMP64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7610 : { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
7611 : { 1390 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7612 : { 1390 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
7613 : { 1396 /* cmpsl */, X86::CMPSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
7614 : { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
7615 : { 1408 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7616 : { 1408 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
7617 : { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
7618 : { 1420 /* cmpw */, X86::CMP16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7619 : { 1420 /* cmpw */, X86::CMP16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7620 : { 1420 /* cmpw */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
7621 : { 1420 /* cmpw */, X86::CMP16ri8, Convert__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
7622 : { 1420 /* cmpw */, X86::CMP16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
7623 : { 1420 /* cmpw */, X86::CMP16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
7624 : { 1420 /* cmpw */, X86::CMP16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
7625 : { 1420 /* cmpw */, X86::CMP16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
7626 : { 1420 /* cmpw */, X86::CMP16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
7627 : { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
7628 : { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7629 : { 1454 /* cmpxchgb */, X86::CMPXCHG8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
7630 : { 1454 /* cmpxchgb */, X86::CMPXCHG8rm, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
7631 : { 1463 /* cmpxchgl */, X86::CMPXCHG32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7632 : { 1463 /* cmpxchgl */, X86::CMPXCHG32rm, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
7633 : { 1472 /* cmpxchgq */, X86::CMPXCHG64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7634 : { 1472 /* cmpxchgq */, X86::CMPXCHG64rm, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
7635 : { 1481 /* cmpxchgw */, X86::CMPXCHG16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
7636 : { 1481 /* cmpxchgw */, X86::CMPXCHG16rm, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
7637 : { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7638 : { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7639 : { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7640 : { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7641 : { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, { }, },
7642 : { 1514 /* cqto */, X86::CQO, Convert_NoOperands, 0, { }, },
7643 : { 1525 /* crc32b */, X86::CRC32r32r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
7644 : { 1525 /* crc32b */, X86::CRC32r64r8, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
7645 : { 1525 /* crc32b */, X86::CRC32r32m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
7646 : { 1525 /* crc32b */, X86::CRC32r64m8, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
7647 : { 1532 /* crc32l */, X86::CRC32r32r32, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
7648 : { 1532 /* crc32l */, X86::CRC32r32m32, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7649 : { 1539 /* crc32q */, X86::CRC32r64r64, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
7650 : { 1539 /* crc32q */, X86::CRC32r64m64, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7651 : { 1546 /* crc32w */, X86::CRC32r32r16, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
7652 : { 1546 /* crc32w */, X86::CRC32r32m16, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
7653 : { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, { }, },
7654 : { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7655 : { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7656 : { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7657 : { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7658 : { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7659 : { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7660 : { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7661 : { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
7662 : { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7663 : { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7664 : { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
7665 : { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7666 : { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
7667 : { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7668 : { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7669 : { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7670 : { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7671 : { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7672 : { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7673 : { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
7674 : { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7675 : { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7676 : { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7677 : { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7678 : { 1655 /* cvtsd2sil */, X86::CVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7679 : { 1655 /* cvtsd2sil */, X86::CVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7680 : { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7681 : { 1665 /* cvtsd2siq */, X86::CVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7682 : { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7683 : { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7684 : { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7685 : { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
7686 : { 1693 /* cvtsi2sdl */, X86::CVTSI2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7687 : { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
7688 : { 1703 /* cvtsi2sdq */, X86::CVTSI642SDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7689 : { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7690 : { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
7691 : { 1722 /* cvtsi2ssl */, X86::CVTSI2SSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7692 : { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
7693 : { 1732 /* cvtsi2ssq */, X86::CVTSI642SSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7694 : { 1742 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7695 : { 1742 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7696 : { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7697 : { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7698 : { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7699 : { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7700 : { 1760 /* cvtss2sil */, X86::CVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7701 : { 1760 /* cvtss2sil */, X86::CVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7702 : { 1770 /* cvtss2siq */, X86::CVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7703 : { 1770 /* cvtss2siq */, X86::CVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7704 : { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7705 : { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7706 : { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7707 : { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR64 }, },
7708 : { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7709 : { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7710 : { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
7711 : { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
7712 : { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7713 : { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7714 : { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7715 : { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7716 : { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7717 : { 1830 /* cvttsd2sil */, X86::CVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
7718 : { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7719 : { 1841 /* cvttsd2siq */, X86::CVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
7720 : { 1852 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7721 : { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7722 : { 1852 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7723 : { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7724 : { 1862 /* cvttss2sil */, X86::CVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
7725 : { 1862 /* cvttss2sil */, X86::CVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
7726 : { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
7727 : { 1873 /* cvttss2siq */, X86::CVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
7728 : { 1893 /* cwtd */, X86::CWD, Convert_NoOperands, 0, { }, },
7729 : { 1898 /* cwtl */, X86::CWDE, Convert_NoOperands, 0, { }, },
7730 : { 1903 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
7731 : { 1907 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
7732 : { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, { }, },
7733 : { 1922 /* decb */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
7734 : { 1922 /* decb */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7735 : { 1927 /* decl */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
7736 : { 1927 /* decl */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
7737 : { 1927 /* decl */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7738 : { 1932 /* decq */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
7739 : { 1932 /* decq */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7740 : { 1937 /* decw */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
7741 : { 1937 /* decw */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
7742 : { 1937 /* decw */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7743 : { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7744 : { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7745 : { 1946 /* divb */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
7746 : { 1946 /* divb */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
7747 : { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
7748 : { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7749 : { 1951 /* divl */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
7750 : { 1951 /* divl */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
7751 : { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7752 : { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7753 : { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7754 : { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7755 : { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
7756 : { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
7757 : { 1968 /* divq */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
7758 : { 1968 /* divq */, X86::DIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
7759 : { 1973 /* divsd */, X86::DIVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7760 : { 1973 /* divsd */, X86::DIVSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
7761 : { 1979 /* divss */, X86::DIVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7762 : { 1979 /* divss */, X86::DIVSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
7763 : { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
7764 : { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7765 : { 1985 /* divw */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
7766 : { 1985 /* divw */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
7767 : { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7768 : { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7769 : { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7770 : { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7771 : { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, { }, },
7772 : { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, { }, },
7773 : { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, 0, { }, },
7774 : { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, { }, },
7775 : { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, 0, { }, },
7776 : { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, 0, { }, },
7777 : { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, 0, { }, },
7778 : { 2042 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
7779 : { 2048 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, { }, },
7780 : { 2051 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
7781 : { 2051 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
7782 : { 2061 /* extrq */, X86::EXTRQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7783 : { 2061 /* extrq */, X86::EXTRQI, Convert__Reg1_2__Tie0_3_3__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32 }, },
7784 : { 2067 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, { }, },
7785 : { 2073 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, { }, },
7786 : { 2078 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
7787 : { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7788 : { 2078 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7789 : { 2078 /* fadd */, X86::ADD_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7790 : { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7791 : { 2083 /* faddl */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7792 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
7793 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7794 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7795 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7796 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7797 : { 2095 /* fadds */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7798 : { 2101 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7799 : { 2106 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7800 : { 2112 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, { }, },
7801 : { 2117 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7802 : { 2124 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7803 : { 2132 /* fcmove */, X86::CMOVE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7804 : { 2139 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7805 : { 2147 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7806 : { 2156 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7807 : { 2164 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7808 : { 2172 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7809 : { 2179 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, { }, },
7810 : { 2179 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7811 : { 2184 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, { }, },
7812 : { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
7813 : { 2184 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7814 : { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7815 : { 2190 /* fcoml */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7816 : { 2196 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, { }, },
7817 : { 2196 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7818 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, { }, },
7819 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
7820 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7821 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7822 : { 2209 /* fcompl */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7823 : { 2216 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, { }, },
7824 : { 2223 /* fcomps */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7825 : { 2230 /* fcoms */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7826 : { 2236 /* fcos */, X86::COS_F, Convert_NoOperands, 0, { }, },
7827 : { 2241 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, { }, },
7828 : { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7829 : { 2249 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7830 : { 2249 /* fdiv */, X86::DIVR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7831 : { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7832 : { 2254 /* fdivl */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7833 : { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__regST1, 0, { }, },
7834 : { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7835 : { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7836 : { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7837 : { 2260 /* fdivp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7838 : { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7839 : { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7840 : { 2266 /* fdivr */, X86::DIV_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7841 : { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7842 : { 2272 /* fdivrl */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7843 : { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__regST1, 0, { }, },
7844 : { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7845 : { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7846 : { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7847 : { 2279 /* fdivrp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7848 : { 2286 /* fdivrs */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7849 : { 2293 /* fdivs */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7850 : { 2299 /* femms */, X86::FEMMS, Convert_NoOperands, 0, { }, },
7851 : { 2305 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
7852 : { 2311 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
7853 : { 2324 /* fiaddl */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7854 : { 2331 /* fiadds */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7855 : { 2344 /* ficoml */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7856 : { 2358 /* ficompl */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7857 : { 2366 /* ficomps */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7858 : { 2374 /* ficoms */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7859 : { 2387 /* fidivl */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7860 : { 2401 /* fidivrl */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7861 : { 2409 /* fidivrs */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7862 : { 2417 /* fidivs */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7863 : { 2429 /* fildl */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7864 : { 2435 /* fildll */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7865 : { 2442 /* filds */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7866 : { 2454 /* fimull */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7867 : { 2461 /* fimuls */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7868 : { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, { }, },
7869 : { 2481 /* fistl */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7870 : { 2493 /* fistpl */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7871 : { 2500 /* fistpll */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7872 : { 2508 /* fistps */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7873 : { 2515 /* fists */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7874 : { 2528 /* fisttpl */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7875 : { 2536 /* fisttpll */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7876 : { 2545 /* fisttps */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7877 : { 2559 /* fisubl */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7878 : { 2573 /* fisubrl */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7879 : { 2581 /* fisubrs */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7880 : { 2589 /* fisubs */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7881 : { 2596 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
7882 : { 2600 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, { }, },
7883 : { 2605 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7884 : { 2611 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7885 : { 2618 /* fldl */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7886 : { 2623 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, { }, },
7887 : { 2630 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, { }, },
7888 : { 2637 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, { }, },
7889 : { 2644 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, { }, },
7890 : { 2651 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, { }, },
7891 : { 2657 /* flds */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7892 : { 2662 /* fldt */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7893 : { 2667 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, { }, },
7894 : { 2672 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
7895 : { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7896 : { 2672 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7897 : { 2672 /* fmul */, X86::MUL_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7898 : { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7899 : { 2677 /* fmull */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7900 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
7901 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7902 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7903 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7904 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7905 : { 2689 /* fmuls */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7906 : { 2695 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, { }, },
7907 : { 2702 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, { }, },
7908 : { 2709 /* fnop */, X86::FNOP, Convert_NoOperands, 0, { }, },
7909 : { 2714 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7910 : { 2721 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7911 : { 2728 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7912 : { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { }, },
7913 : { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
7914 : { 2736 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
7915 : { 2743 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, { }, },
7916 : { 2750 /* fprem */, X86::FPREM, Convert_NoOperands, 0, { }, },
7917 : { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, { }, },
7918 : { 2763 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, { }, },
7919 : { 2769 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, { }, },
7920 : { 2777 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7921 : { 2784 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, { }, },
7922 : { 2787 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, { }, },
7923 : { 2794 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, { }, },
7924 : { 2799 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, { }, },
7925 : { 2807 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, { }, },
7926 : { 2813 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
7927 : { 2817 /* fstl */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7928 : { 2822 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
7929 : { 2827 /* fstpl */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7930 : { 2833 /* fstps */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7931 : { 2839 /* fstpt */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
7932 : { 2845 /* fsts */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7933 : { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7934 : { 2850 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7935 : { 2850 /* fsub */, X86::SUBR_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7936 : { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7937 : { 2855 /* fsubl */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7938 : { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__regST1, 0, { }, },
7939 : { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7940 : { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7941 : { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7942 : { 2861 /* fsubp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7943 : { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
7944 : { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7945 : { 2867 /* fsubr */, X86::SUB_FrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7946 : { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7947 : { 2873 /* fsubrl */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
7948 : { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__regST1, 0, { }, },
7949 : { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
7950 : { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7951 : { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
7952 : { 2880 /* fsubrp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7953 : { 2887 /* fsubrs */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7954 : { 2894 /* fsubs */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
7955 : { 2900 /* ftst */, X86::TST_F, Convert_NoOperands, 0, { }, },
7956 : { 2905 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, { }, },
7957 : { 2905 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
7958 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, { }, },
7959 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
7960 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7961 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7962 : { 2918 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, { }, },
7963 : { 2918 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
7964 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, { }, },
7965 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
7966 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
7967 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
7968 : { 2933 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, { }, },
7969 : { 2941 /* fxam */, X86::FXAM, Convert_NoOperands, 0, { }, },
7970 : { 2946 /* fxch */, X86::XCH_F, Convert__regST1, 0, { }, },
7971 : { 2946 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
7972 : { 2951 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
7973 : { 2959 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7974 : { 2969 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
7975 : { 2976 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
7976 : { 2985 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, { }, },
7977 : { 2993 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, { }, },
7978 : { 2999 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, { }, },
7979 : { 3007 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, { }, },
7980 : { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7981 : { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7982 : { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
7983 : { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
7984 : { 3045 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7985 : { 3045 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7986 : { 3055 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, { }, },
7987 : { 3058 /* haddpd */, X86::HADDPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7988 : { 3058 /* haddpd */, X86::HADDPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7989 : { 3065 /* haddps */, X86::HADDPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7990 : { 3065 /* haddps */, X86::HADDPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7991 : { 3072 /* hlt */, X86::HLT, Convert_NoOperands, 0, { }, },
7992 : { 3076 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7993 : { 3076 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7994 : { 3083 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
7995 : { 3083 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
7996 : { 3095 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
7997 : { 3095 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
7998 : { 3095 /* idivb */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8, MCK_AL }, },
7999 : { 3095 /* idivb */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8, MCK_AL }, },
8000 : { 3101 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8001 : { 3101 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8002 : { 3101 /* idivl */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32, MCK_EAX }, },
8003 : { 3101 /* idivl */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32, MCK_EAX }, },
8004 : { 3107 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8005 : { 3107 /* idivq */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8006 : { 3107 /* idivq */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64, MCK_RAX }, },
8007 : { 3107 /* idivq */, X86::IDIV64m, Convert__Mem645_0, 0, { MCK_Mem64, MCK_RAX }, },
8008 : { 3113 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8009 : { 3113 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8010 : { 3113 /* idivw */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16, MCK_AX }, },
8011 : { 3113 /* idivw */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16, MCK_AX }, },
8012 : { 3124 /* imulb */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
8013 : { 3124 /* imulb */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8014 : { 3130 /* imull */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8015 : { 3130 /* imull */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8016 : { 3130 /* imull */, X86::IMUL32rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8017 : { 3130 /* imull */, X86::IMUL32rri8, Convert__Reg1_1__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
8018 : { 3130 /* imull */, X86::IMUL32rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8019 : { 3130 /* imull */, X86::IMUL32rm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8020 : { 3130 /* imull */, X86::IMUL32rri8, Convert__Reg1_2__Reg1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32, MCK_GR32 }, },
8021 : { 3130 /* imull */, X86::IMUL32rmi8, Convert__Reg1_2__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32, MCK_GR32 }, },
8022 : { 3130 /* imull */, X86::IMUL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8023 : { 3130 /* imull */, X86::IMUL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8024 : { 3136 /* imulq */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8025 : { 3136 /* imulq */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8026 : { 3136 /* imulq */, X86::IMUL64rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8027 : { 3136 /* imulq */, X86::IMUL64rri8, Convert__Reg1_1__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
8028 : { 3136 /* imulq */, X86::IMUL64rri32, Convert__Reg1_1__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8029 : { 3136 /* imulq */, X86::IMUL64rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8030 : { 3136 /* imulq */, X86::IMUL64rri8, Convert__Reg1_2__Reg1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64, MCK_GR64 }, },
8031 : { 3136 /* imulq */, X86::IMUL64rmi8, Convert__Reg1_2__Mem645_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_Mem64, MCK_GR64 }, },
8032 : { 3136 /* imulq */, X86::IMUL64rri32, Convert__Reg1_2__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64, MCK_GR64 }, },
8033 : { 3136 /* imulq */, X86::IMUL64rmi32, Convert__Reg1_2__Mem645_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_Mem64, MCK_GR64 }, },
8034 : { 3142 /* imulw */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8035 : { 3142 /* imulw */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8036 : { 3142 /* imulw */, X86::IMUL16rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8037 : { 3142 /* imulw */, X86::IMUL16rri8, Convert__Reg1_1__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
8038 : { 3142 /* imulw */, X86::IMUL16rri, Convert__Reg1_1__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8039 : { 3142 /* imulw */, X86::IMUL16rm, Convert__Reg1_1__Tie0_1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8040 : { 3142 /* imulw */, X86::IMUL16rri8, Convert__Reg1_2__Reg1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16, MCK_GR16 }, },
8041 : { 3142 /* imulw */, X86::IMUL16rmi8, Convert__Reg1_2__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16, MCK_GR16 }, },
8042 : { 3142 /* imulw */, X86::IMUL16rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16, MCK_GR16 }, },
8043 : { 3142 /* imulw */, X86::IMUL16rmi, Convert__Reg1_2__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16, MCK_GR16 }, },
8044 : { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
8045 : { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8046 : { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
8047 : { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
8048 : { 3159 /* incb */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8049 : { 3159 /* incb */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8050 : { 3164 /* incl */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
8051 : { 3164 /* incl */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8052 : { 3164 /* incl */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8053 : { 3169 /* incq */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8054 : { 3169 /* incq */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8055 : { 3174 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
8056 : { 3182 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
8057 : { 3190 /* incw */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
8058 : { 3190 /* incw */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8059 : { 3190 /* incw */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8060 : { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
8061 : { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8062 : { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
8063 : { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
8064 : { 3203 /* insb */, X86::INSB, Convert__DstIdx81_1, 0, { MCK_DX, MCK_DstIdx8 }, },
8065 : { 3213 /* insertps */, X86::INSERTPSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8066 : { 3213 /* insertps */, X86::INSERTPSrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8067 : { 3222 /* insertq */, X86::INSERTQ, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8068 : { 3222 /* insertq */, X86::INSERTQI, Convert__Reg1_3__Tie0_4_4__Reg1_2__ImmUnsignedi81_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8069 : { 3230 /* insl */, X86::INSL, Convert__DstIdx321_1, 0, { MCK_DX, MCK_DstIdx32 }, },
8070 : { 3235 /* insw */, X86::INSW, Convert__DstIdx161_1, 0, { MCK_DX, MCK_DstIdx16 }, },
8071 : { 3240 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8072 : { 3244 /* int3 */, X86::INT3, Convert_NoOperands, 0, { }, },
8073 : { 3249 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, { }, },
8074 : { 3254 /* invd */, X86::INVD, Convert_NoOperands, 0, { }, },
8075 : { 3259 /* invept */, X86::INVEPT32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
8076 : { 3259 /* invept */, X86::INVEPT64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
8077 : { 3266 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8078 : { 3273 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
8079 : { 3273 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
8080 : { 3281 /* invpcid */, X86::INVPCID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
8081 : { 3281 /* invpcid */, X86::INVPCID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
8082 : { 3289 /* invvpid */, X86::INVVPID32, Convert__Reg1_1__Mem1285_0, Feature_Not64BitMode, { MCK_Mem128, MCK_GR32 }, },
8083 : { 3289 /* invvpid */, X86::INVVPID64, Convert__Reg1_1__Mem1285_0, Feature_In64BitMode, { MCK_Mem128, MCK_GR64 }, },
8084 : { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
8085 : { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8086 : { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
8087 : { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
8088 : { 3312 /* iretl */, X86::IRET32, Convert_NoOperands, 0, { }, },
8089 : { 3318 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
8090 : { 3324 /* iretw */, X86::IRET16, Convert_NoOperands, 0, { }, },
8091 : { 3330 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8092 : { 3333 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8093 : { 3337 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8094 : { 3340 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8095 : { 3344 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
8096 : { 3349 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8097 : { 3352 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8098 : { 3358 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8099 : { 3361 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8100 : { 3365 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8101 : { 3368 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8102 : { 3372 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8103 : { 3372 /* jmp */, X86::JMP16m, Convert__Mem165_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem16 }, },
8104 : { 3372 /* jmp */, X86::JMP32m, Convert__Mem325_1, Feature_In32BitMode, { MCK__STAR_, MCK_Mem32 }, },
8105 : { 3372 /* jmp */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
8106 : { 3372 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
8107 : { 3372 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
8108 : { 3376 /* jmpl */, X86::JMP32r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR32 }, },
8109 : { 3376 /* jmpl */, X86::JMP32m, Convert__Mem325_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem32 }, },
8110 : { 3376 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8111 : { 3381 /* jmpq */, X86::JMP64r, Convert__Reg1_1, Feature_In64BitMode, { MCK__STAR_, MCK_GR64 }, },
8112 : { 3381 /* jmpq */, X86::JMP64m, Convert__Mem645_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem64 }, },
8113 : { 3386 /* jmpw */, X86::JMP16r, Convert__Reg1_1, Feature_Not64BitMode, { MCK__STAR_, MCK_GR16 }, },
8114 : { 3386 /* jmpw */, X86::JMP16m, Convert__Mem165_1, Feature_Not64BitMode, { MCK__STAR_, MCK_Mem16 }, },
8115 : { 3386 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8116 : { 3391 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8117 : { 3395 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8118 : { 3399 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8119 : { 3403 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8120 : { 3407 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8121 : { 3410 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8122 : { 3413 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
8123 : { 3419 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8124 : { 3422 /* kaddb */, X86::KADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8125 : { 3428 /* kaddd */, X86::KADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8126 : { 3434 /* kaddq */, X86::KADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8127 : { 3440 /* kaddw */, X86::KADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8128 : { 3446 /* kandb */, X86::KANDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8129 : { 3452 /* kandd */, X86::KANDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8130 : { 3458 /* kandnb */, X86::KANDNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8131 : { 3465 /* kandnd */, X86::KANDNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8132 : { 3472 /* kandnq */, X86::KANDNQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8133 : { 3479 /* kandnw */, X86::KANDNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8134 : { 3486 /* kandq */, X86::KANDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8135 : { 3492 /* kandw */, X86::KANDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8136 : { 3498 /* kmovb */, X86::KMOVBkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8137 : { 3498 /* kmovb */, X86::KMOVBrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
8138 : { 3498 /* kmovb */, X86::KMOVBmk, Convert__Mem85_1__Reg1_0, 0, { MCK_VK1, MCK_Mem8 }, },
8139 : { 3498 /* kmovb */, X86::KMOVBkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
8140 : { 3498 /* kmovb */, X86::KMOVBkm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VK1 }, },
8141 : { 3504 /* kmovd */, X86::KMOVDkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8142 : { 3504 /* kmovd */, X86::KMOVDrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
8143 : { 3504 /* kmovd */, X86::KMOVDmk, Convert__Mem325_1__Reg1_0, 0, { MCK_VK1, MCK_Mem32 }, },
8144 : { 3504 /* kmovd */, X86::KMOVDkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
8145 : { 3504 /* kmovd */, X86::KMOVDkm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VK1 }, },
8146 : { 3510 /* kmovq */, X86::KMOVQkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8147 : { 3510 /* kmovq */, X86::KMOVQrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR64 }, },
8148 : { 3510 /* kmovq */, X86::KMOVQmk, Convert__Mem645_1__Reg1_0, 0, { MCK_VK1, MCK_Mem64 }, },
8149 : { 3510 /* kmovq */, X86::KMOVQkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VK1 }, },
8150 : { 3510 /* kmovq */, X86::KMOVQkm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VK1 }, },
8151 : { 3516 /* kmovw */, X86::KMOVWkk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8152 : { 3516 /* kmovw */, X86::KMOVWrk, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_GR32 }, },
8153 : { 3516 /* kmovw */, X86::KMOVWmk, Convert__Mem165_1__Reg1_0, 0, { MCK_VK1, MCK_Mem16 }, },
8154 : { 3516 /* kmovw */, X86::KMOVWkr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VK1 }, },
8155 : { 3516 /* kmovw */, X86::KMOVWkm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VK1 }, },
8156 : { 3522 /* knotb */, X86::KNOTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8157 : { 3528 /* knotd */, X86::KNOTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8158 : { 3534 /* knotq */, X86::KNOTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8159 : { 3540 /* knotw */, X86::KNOTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8160 : { 3546 /* korb */, X86::KORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8161 : { 3551 /* kord */, X86::KORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8162 : { 3556 /* korq */, X86::KORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8163 : { 3561 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8164 : { 3570 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8165 : { 3579 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8166 : { 3588 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8167 : { 3597 /* korw */, X86::KORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8168 : { 3602 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8169 : { 3611 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8170 : { 3620 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8171 : { 3629 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8172 : { 3638 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8173 : { 3647 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8174 : { 3656 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8175 : { 3665 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VK1, MCK_VK1 }, },
8176 : { 3674 /* ktestb */, X86::KTESTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8177 : { 3681 /* ktestd */, X86::KTESTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8178 : { 3688 /* ktestq */, X86::KTESTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8179 : { 3695 /* ktestw */, X86::KTESTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1 }, },
8180 : { 3702 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8181 : { 3711 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8182 : { 3720 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8183 : { 3729 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8184 : { 3736 /* kxnord */, X86::KXNORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8185 : { 3743 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8186 : { 3750 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8187 : { 3757 /* kxorb */, X86::KXORBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8188 : { 3763 /* kxord */, X86::KXORDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8189 : { 3769 /* kxorq */, X86::KXORQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8190 : { 3775 /* kxorw */, X86::KXORWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
8191 : { 3781 /* lahf */, X86::LAHF, Convert_NoOperands, 0, { }, },
8192 : { 3790 /* larl */, X86::LAR32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8193 : { 3790 /* larl */, X86::LAR32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8194 : { 3795 /* larq */, X86::LAR64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
8195 : { 3795 /* larq */, X86::LAR64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8196 : { 3800 /* larw */, X86::LAR16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8197 : { 3800 /* larw */, X86::LAR16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8198 : { 3805 /* lcall */, X86::FARCALL32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
8199 : { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
8200 : { 3805 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
8201 : { 3805 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
8202 : { 3811 /* lcalll */, X86::FARCALL32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8203 : { 3811 /* lcalll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8204 : { 3818 /* lcallq */, X86::FARCALL64, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8205 : { 3825 /* lcallw */, X86::FARCALL16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8206 : { 3825 /* lcallw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8207 : { 3832 /* lddqu */, X86::LDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8208 : { 3838 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8209 : { 3850 /* ldsl */, X86::LDS32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
8210 : { 3855 /* ldsw */, X86::LDS16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
8211 : { 3864 /* leal */, X86::LEA32r, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
8212 : { 3864 /* leal */, X86::LEA64_32r, Convert__Reg1_1__Mem5_0, Feature_In64BitMode, { MCK_Mem, MCK_GR32 }, },
8213 : { 3869 /* leaq */, X86::LEA64r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8214 : { 3874 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, { }, },
8215 : { 3874 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, { }, },
8216 : { 3880 /* leaw */, X86::LEA16r, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8217 : { 3889 /* lesl */, X86::LES32rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR32 }, },
8218 : { 3894 /* lesw */, X86::LES16rm, Convert__Reg1_1__Mem5_0, Feature_Not64BitMode, { MCK_Mem, MCK_GR16 }, },
8219 : { 3899 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, { }, },
8220 : { 3910 /* lfsl */, X86::LFS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
8221 : { 3915 /* lfsq */, X86::LFS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8222 : { 3920 /* lfsw */, X86::LFS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8223 : { 3936 /* lgdtl */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8224 : { 3942 /* lgdtq */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
8225 : { 3948 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8226 : { 3958 /* lgsl */, X86::LGS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
8227 : { 3963 /* lgsq */, X86::LGS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8228 : { 3968 /* lgsw */, X86::LGS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8229 : { 3984 /* lidtl */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8230 : { 3990 /* lidtq */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
8231 : { 3996 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
8232 : { 4002 /* ljmp */, X86::FARJMP32m, Convert__Mem5_1, Feature_Not16BitMode, { MCK__STAR_, MCK_Mem }, },
8233 : { 4002 /* ljmp */, X86::FARJMP16m, Convert__Mem5_1, Feature_In16BitMode, { MCK__STAR_, MCK_Mem }, },
8234 : { 4002 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
8235 : { 4002 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
8236 : { 4007 /* ljmpl */, X86::FARJMP32m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8237 : { 4007 /* ljmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8238 : { 4013 /* ljmpq */, X86::FARJMP64, Convert__Mem5_1, Feature_In64BitMode, { MCK__STAR_, MCK_Mem }, },
8239 : { 4019 /* ljmpw */, X86::FARJMP16m, Convert__Mem5_1, 0, { MCK__STAR_, MCK_Mem }, },
8240 : { 4019 /* ljmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
8241 : { 4030 /* lldtw */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8242 : { 4030 /* lldtw */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8243 : { 4036 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
8244 : { 4036 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
8245 : { 4048 /* lmsww */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8246 : { 4048 /* lmsww */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8247 : { 4054 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, { }, },
8248 : { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
8249 : { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
8250 : { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
8251 : { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
8252 : { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
8253 : { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_AL }, },
8254 : { 4076 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
8255 : { 4076 /* lodsl */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_EAX }, },
8256 : { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
8257 : { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_RAX }, },
8258 : { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
8259 : { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_AX }, },
8260 : { 4094 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8261 : { 4099 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8262 : { 4105 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
8263 : { 4112 /* lretl */, X86::LRETL, Convert_NoOperands, 0, { }, },
8264 : { 4112 /* lretl */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
8265 : { 4118 /* lretq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
8266 : { 4118 /* lretq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
8267 : { 4124 /* lretw */, X86::LRETW, Convert_NoOperands, 0, { }, },
8268 : { 4124 /* lretw */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
8269 : { 4134 /* lsll */, X86::LSL32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8270 : { 4134 /* lsll */, X86::LSL32rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8271 : { 4139 /* lslq */, X86::LSL64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
8272 : { 4139 /* lslq */, X86::LSL64rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8273 : { 4144 /* lslw */, X86::LSL16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8274 : { 4144 /* lslw */, X86::LSL16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8275 : { 4153 /* lssl */, X86::LSS32rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR32 }, },
8276 : { 4158 /* lssq */, X86::LSS64rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR64 }, },
8277 : { 4163 /* lssw */, X86::LSS16rm, Convert__Reg1_1__Mem5_0, 0, { MCK_Mem, MCK_GR16 }, },
8278 : { 4172 /* ltrw */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8279 : { 4172 /* ltrw */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8280 : { 4177 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8281 : { 4177 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
8282 : { 4177 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8283 : { 4177 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
8284 : { 4184 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR32 }, },
8285 : { 4184 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_2__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32, MCK_GR64 }, },
8286 : { 4184 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR32 }, },
8287 : { 4184 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_2__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32, MCK_GR64 }, },
8288 : { 4197 /* lzcntl */, X86::LZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8289 : { 4197 /* lzcntl */, X86::LZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8290 : { 4204 /* lzcntq */, X86::LZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8291 : { 4204 /* lzcntq */, X86::LZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8292 : { 4211 /* lzcntw */, X86::LZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8293 : { 4211 /* lzcntw */, X86::LZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8294 : { 4218 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
8295 : { 4218 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
8296 : { 4229 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
8297 : { 4229 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
8298 : { 4238 /* maxpd */, X86::MAXPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8299 : { 4238 /* maxpd */, X86::MAXPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8300 : { 4244 /* maxps */, X86::MAXPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8301 : { 4244 /* maxps */, X86::MAXPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8302 : { 4250 /* maxsd */, X86::MAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8303 : { 4250 /* maxsd */, X86::MAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8304 : { 4256 /* maxss */, X86::MAXSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8305 : { 4256 /* maxss */, X86::MAXSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8306 : { 4262 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, { }, },
8307 : { 4269 /* minpd */, X86::MINPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8308 : { 4269 /* minpd */, X86::MINPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8309 : { 4275 /* minps */, X86::MINPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8310 : { 4275 /* minps */, X86::MINPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8311 : { 4281 /* minsd */, X86::MINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8312 : { 4281 /* minsd */, X86::MINSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8313 : { 4287 /* minss */, X86::MINSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8314 : { 4287 /* minss */, X86::MINSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8315 : { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, { }, },
8316 : { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
8317 : { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
8318 : { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, { }, },
8319 : { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EDX }, },
8320 : { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RDX }, },
8321 : { 4310 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, { }, },
8322 : { 4322 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8323 : { 4322 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8324 : { 4322 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8325 : { 4322 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8326 : { 4335 /* movabsb */, X86::MOV8o64a, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
8327 : { 4335 /* movabsb */, X86::MOV8ao64, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
8328 : { 4343 /* movabsl */, X86::MOV32o64a, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
8329 : { 4343 /* movabsl */, X86::MOV32ao64, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
8330 : { 4351 /* movabsq */, X86::MOV64o64a, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
8331 : { 4351 /* movabsq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
8332 : { 4351 /* movabsq */, X86::MOV64ao64, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
8333 : { 4359 /* movabsw */, X86::MOV16o64a, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
8334 : { 4359 /* movabsw */, X86::MOV16ao64, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
8335 : { 4367 /* movapd */, X86::MOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8336 : { 4367 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8337 : { 4367 /* movapd */, X86::MOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8338 : { 4374 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8339 : { 4383 /* movaps */, X86::MOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8340 : { 4383 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8341 : { 4383 /* movaps */, X86::MOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8342 : { 4390 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8343 : { 4399 /* movb */, X86::MOV8o16a, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
8344 : { 4399 /* movb */, X86::MOV8o32a, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
8345 : { 4399 /* movb */, X86::MOV8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8346 : { 4399 /* movb */, X86::MOV8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
8347 : { 4399 /* movb */, X86::MOV8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
8348 : { 4399 /* movb */, X86::MOV8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
8349 : { 4399 /* movb */, X86::MOV8ao16, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
8350 : { 4399 /* movb */, X86::MOV8ao32, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
8351 : { 4399 /* movb */, X86::MOV8rm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
8352 : { 4404 /* movb.s */, X86::MOV8rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8353 : { 4417 /* movbel */, X86::MOVBE32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8354 : { 4417 /* movbel */, X86::MOVBE32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8355 : { 4424 /* movbeq */, X86::MOVBE64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8356 : { 4424 /* movbeq */, X86::MOVBE64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8357 : { 4431 /* movbew */, X86::MOVBE16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8358 : { 4431 /* movbew */, X86::MOVBE16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8359 : { 4438 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR32 }, },
8360 : { 4438 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
8361 : { 4438 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR64, MCK_Mem32 }, },
8362 : { 4438 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
8363 : { 4438 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
8364 : { 4438 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8365 : { 4438 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR64 }, },
8366 : { 4438 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
8367 : { 4438 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
8368 : { 4438 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
8369 : { 4438 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
8370 : { 4438 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8371 : { 4443 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8372 : { 4443 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8373 : { 4451 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_1__Mem5125_0, Feature_Not64BitMode, { MCK_Mem512, MCK_GR16 }, },
8374 : { 4451 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_GR32 }, },
8375 : { 4451 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_1__Mem5125_0, Feature_In64BitMode, { MCK_Mem512, MCK_GR64 }, },
8376 : { 4461 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8377 : { 4461 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
8378 : { 4469 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR64 }, },
8379 : { 4477 /* movdqa */, X86::MOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8380 : { 4477 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8381 : { 4477 /* movdqa */, X86::MOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8382 : { 4484 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8383 : { 4493 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8384 : { 4493 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8385 : { 4493 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8386 : { 4500 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8387 : { 4509 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8388 : { 4517 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8389 : { 4517 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8390 : { 4524 /* movhps */, X86::MOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8391 : { 4524 /* movhps */, X86::MOVHPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8392 : { 4531 /* movl */, X86::MOV32o16a, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
8393 : { 4531 /* movl */, X86::MOV32o32a, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
8394 : { 4531 /* movl */, X86::MOV32rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
8395 : { 4531 /* movl */, X86::MOV32rc, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
8396 : { 4531 /* movl */, X86::MOV32rd, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
8397 : { 4531 /* movl */, X86::MOV32sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
8398 : { 4531 /* movl */, X86::MOV32cr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
8399 : { 4531 /* movl */, X86::MOV32dr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
8400 : { 4531 /* movl */, X86::MOV32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8401 : { 4531 /* movl */, X86::MOV32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8402 : { 4531 /* movl */, X86::MOV32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8403 : { 4531 /* movl */, X86::MOV32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
8404 : { 4531 /* movl */, X86::MOV32ao16, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
8405 : { 4531 /* movl */, X86::MOV32ao32, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
8406 : { 4531 /* movl */, X86::MOV32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8407 : { 4536 /* movl.s */, X86::MOV32rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8408 : { 4543 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8409 : { 4551 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8410 : { 4551 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8411 : { 4558 /* movlps */, X86::MOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8412 : { 4558 /* movlps */, X86::MOVLPSrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8413 : { 4565 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8414 : { 4574 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8415 : { 4583 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8416 : { 4591 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8417 : { 4607 /* movntil */, X86::MOVNTImr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8418 : { 4615 /* movntiq */, X86::MOVNTI_64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8419 : { 4623 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8420 : { 4631 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8421 : { 4639 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
8422 : { 4646 /* movntsd */, X86::MOVNTSD, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8423 : { 4654 /* movntss */, X86::MOVNTSS, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8424 : { 4662 /* movq */, X86::MOV64o32a, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
8425 : { 4662 /* movq */, X86::MOV64rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
8426 : { 4662 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8427 : { 4662 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_GR64 }, },
8428 : { 4662 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR64, MCK_Mem64 }, },
8429 : { 4662 /* movq */, X86::MOV64rc, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
8430 : { 4662 /* movq */, X86::MOV64rd, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
8431 : { 4662 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8432 : { 4662 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
8433 : { 4662 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8434 : { 4662 /* movq */, X86::MOV64sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
8435 : { 4662 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR64 }, },
8436 : { 4662 /* movq */, X86::MOV64cr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
8437 : { 4662 /* movq */, X86::MOV64dr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
8438 : { 4662 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
8439 : { 4662 /* movq */, X86::MOV64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8440 : { 4662 /* movq */, X86::MOV64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8441 : { 4662 /* movq */, X86::MOV64ri32, Convert__Reg1_1__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8442 : { 4662 /* movq */, X86::MOV64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8443 : { 4662 /* movq */, X86::MOV64ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR64 }, },
8444 : { 4662 /* movq */, X86::MOV64ao32, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
8445 : { 4662 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8446 : { 4662 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8447 : { 4662 /* movq */, X86::MOV64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8448 : { 4667 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8449 : { 4667 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8450 : { 4667 /* movq.s */, X86::MOV64rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8451 : { 4674 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_FR32 }, },
8452 : { 4687 /* movsb */, X86::MOVSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
8453 : { 4693 /* movsbl */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8454 : { 4693 /* movsbl */, X86::MOVSX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
8455 : { 4700 /* movsbq */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8456 : { 4700 /* movsbq */, X86::MOVSX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
8457 : { 4707 /* movsbw */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8458 : { 4707 /* movsbw */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8459 : { 4714 /* movsd */, X86::MOVSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8460 : { 4714 /* movsd */, X86::MOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
8461 : { 4714 /* movsd */, X86::MOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8462 : { 4720 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8463 : { 4728 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8464 : { 4728 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8465 : { 4737 /* movsl */, X86::MOVSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
8466 : { 4743 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8467 : { 4743 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8468 : { 4752 /* movslq */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR32, MCK_GR64 }, },
8469 : { 4752 /* movslq */, X86::MOVSX64rm32, Convert__Reg1_1__Mem325_0, Feature_In64BitMode, { MCK_Mem32, MCK_GR64 }, },
8470 : { 4759 /* movsq */, X86::MOVSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
8471 : { 4765 /* movss */, X86::MOVSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8472 : { 4765 /* movss */, X86::MOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
8473 : { 4765 /* movss */, X86::MOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8474 : { 4771 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8475 : { 4779 /* movsw */, X86::MOVSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
8476 : { 4785 /* movswl */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8477 : { 4785 /* movswl */, X86::MOVSX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8478 : { 4792 /* movswq */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8479 : { 4792 /* movswq */, X86::MOVSX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8480 : { 4799 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8481 : { 4799 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8482 : { 4799 /* movsx */, X86::MOVSX64rr32, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR64 }, },
8483 : { 4799 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8484 : { 4799 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8485 : { 4799 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8486 : { 4799 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8487 : { 4812 /* movupd */, X86::MOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8488 : { 4812 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8489 : { 4812 /* movupd */, X86::MOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8490 : { 4819 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8491 : { 4828 /* movups */, X86::MOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8492 : { 4828 /* movups */, X86::MOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
8493 : { 4828 /* movups */, X86::MOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8494 : { 4835 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8495 : { 4844 /* movw */, X86::MOV16o16a, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
8496 : { 4844 /* movw */, X86::MOV16o32a, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
8497 : { 4844 /* movw */, X86::MOV16rs, Convert__Reg1_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
8498 : { 4844 /* movw */, X86::MOV16ms, Convert__Mem165_1__Reg1_0, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
8499 : { 4844 /* movw */, X86::MOV16sr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
8500 : { 4844 /* movw */, X86::MOV16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8501 : { 4844 /* movw */, X86::MOV16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8502 : { 4844 /* movw */, X86::MOV16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8503 : { 4844 /* movw */, X86::MOV16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
8504 : { 4844 /* movw */, X86::MOV16ao16, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
8505 : { 4844 /* movw */, X86::MOV16ao32, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
8506 : { 4844 /* movw */, X86::MOV16sm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
8507 : { 4844 /* movw */, X86::MOV16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8508 : { 4849 /* movw.s */, X86::MOV16rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8509 : { 4856 /* movzbl */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8510 : { 4856 /* movzbl */, X86::MOVZX32rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR32 }, },
8511 : { 4863 /* movzbq */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8512 : { 4863 /* movzbq */, X86::MOVZX64rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR64 }, },
8513 : { 4870 /* movzbw */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8514 : { 4870 /* movzbw */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8515 : { 4877 /* movzwl */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8516 : { 4877 /* movzwl */, X86::MOVZX32rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR32 }, },
8517 : { 4884 /* movzwq */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8518 : { 4884 /* movzwq */, X86::MOVZX64rm16, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR64 }, },
8519 : { 4891 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR32 }, },
8520 : { 4891 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR64 }, },
8521 : { 4891 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR16 }, },
8522 : { 4891 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR32 }, },
8523 : { 4891 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR64 }, },
8524 : { 4891 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_GR16 }, },
8525 : { 4897 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8526 : { 4897 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8527 : { 4909 /* mulb */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
8528 : { 4909 /* mulb */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8529 : { 4914 /* mull */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
8530 : { 4914 /* mull */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8531 : { 4919 /* mulpd */, X86::MULPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8532 : { 4919 /* mulpd */, X86::MULPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8533 : { 4925 /* mulps */, X86::MULPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8534 : { 4925 /* mulps */, X86::MULPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8535 : { 4931 /* mulq */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
8536 : { 4931 /* mulq */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8537 : { 4936 /* mulsd */, X86::MULSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8538 : { 4936 /* mulsd */, X86::MULSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8539 : { 4942 /* mulss */, X86::MULSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8540 : { 4942 /* mulss */, X86::MULSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8541 : { 4948 /* mulw */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8542 : { 4948 /* mulw */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8543 : { 4958 /* mulxl */, X86::MULX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8544 : { 4958 /* mulxl */, X86::MULX32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8545 : { 4964 /* mulxq */, X86::MULX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8546 : { 4964 /* mulxq */, X86::MULX64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8547 : { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, { }, },
8548 : { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
8549 : { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX }, },
8550 : { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, { }, },
8551 : { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX, MCK_EBX }, },
8552 : { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_RCX, MCK_RBX }, },
8553 : { 4987 /* negb */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8554 : { 4987 /* negb */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8555 : { 4992 /* negl */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8556 : { 4992 /* negl */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8557 : { 4997 /* negq */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8558 : { 4997 /* negq */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8559 : { 5002 /* negw */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8560 : { 5002 /* negw */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8561 : { 5007 /* nop */, X86::NOOP, Convert_NoOperands, 0, { }, },
8562 : { 5011 /* nopl */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
8563 : { 5011 /* nopl */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8564 : { 5016 /* nopq */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8565 : { 5016 /* nopq */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8566 : { 5021 /* nopw */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
8567 : { 5021 /* nopw */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8568 : { 5030 /* notb */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
8569 : { 5030 /* notb */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8570 : { 5035 /* notl */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
8571 : { 5035 /* notl */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
8572 : { 5040 /* notq */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
8573 : { 5040 /* notq */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8574 : { 5045 /* notw */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
8575 : { 5045 /* notw */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8576 : { 5053 /* orb */, X86::OR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
8577 : { 5053 /* orb */, X86::OR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
8578 : { 5053 /* orb */, X86::OR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
8579 : { 5053 /* orb */, X86::OR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
8580 : { 5053 /* orb */, X86::OR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
8581 : { 5053 /* orb */, X86::OR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
8582 : { 5057 /* orl */, X86::OR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8583 : { 5057 /* orl */, X86::OR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
8584 : { 5057 /* orl */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
8585 : { 5057 /* orl */, X86::OR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
8586 : { 5057 /* orl */, X86::OR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
8587 : { 5057 /* orl */, X86::OR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
8588 : { 5057 /* orl */, X86::OR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
8589 : { 5057 /* orl */, X86::OR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
8590 : { 5057 /* orl */, X86::OR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8591 : { 5061 /* orpd */, X86::ORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8592 : { 5061 /* orpd */, X86::ORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8593 : { 5066 /* orps */, X86::ORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8594 : { 5066 /* orps */, X86::ORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8595 : { 5071 /* orq */, X86::OR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8596 : { 5071 /* orq */, X86::OR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
8597 : { 5071 /* orq */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
8598 : { 5071 /* orq */, X86::OR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
8599 : { 5071 /* orq */, X86::OR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
8600 : { 5071 /* orq */, X86::OR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
8601 : { 5071 /* orq */, X86::OR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
8602 : { 5071 /* orq */, X86::OR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
8603 : { 5071 /* orq */, X86::OR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8604 : { 5075 /* orw */, X86::OR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8605 : { 5075 /* orw */, X86::OR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
8606 : { 5075 /* orw */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
8607 : { 5075 /* orw */, X86::OR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
8608 : { 5075 /* orw */, X86::OR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
8609 : { 5075 /* orw */, X86::OR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
8610 : { 5075 /* orw */, X86::OR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
8611 : { 5075 /* orw */, X86::OR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
8612 : { 5075 /* orw */, X86::OR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8613 : { 5083 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
8614 : { 5083 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8615 : { 5083 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
8616 : { 5083 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
8617 : { 5088 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
8618 : { 5088 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8619 : { 5088 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
8620 : { 5088 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
8621 : { 5098 /* outsb */, X86::OUTSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DX }, },
8622 : { 5110 /* outsl */, X86::OUTSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DX }, },
8623 : { 5116 /* outsw */, X86::OUTSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DX }, },
8624 : { 5122 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
8625 : { 5122 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
8626 : { 5122 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
8627 : { 5122 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
8628 : { 5127 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8629 : { 5127 /* pabsb */, X86::PABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8630 : { 5127 /* pabsb */, X86::PABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8631 : { 5127 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8632 : { 5133 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8633 : { 5133 /* pabsd */, X86::PABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8634 : { 5133 /* pabsd */, X86::PABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8635 : { 5133 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8636 : { 5139 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8637 : { 5139 /* pabsw */, X86::PABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8638 : { 5139 /* pabsw */, X86::PABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8639 : { 5139 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8640 : { 5145 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8641 : { 5145 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8642 : { 5145 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8643 : { 5145 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8644 : { 5154 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8645 : { 5154 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8646 : { 5154 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8647 : { 5154 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8648 : { 5163 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8649 : { 5163 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8650 : { 5172 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8651 : { 5172 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8652 : { 5172 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8653 : { 5172 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8654 : { 5181 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8655 : { 5181 /* paddb */, X86::PADDBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8656 : { 5181 /* paddb */, X86::PADDBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8657 : { 5181 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8658 : { 5187 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8659 : { 5187 /* paddd */, X86::PADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8660 : { 5187 /* paddd */, X86::PADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8661 : { 5187 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8662 : { 5193 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8663 : { 5193 /* paddq */, X86::PADDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8664 : { 5193 /* paddq */, X86::PADDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8665 : { 5193 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8666 : { 5199 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8667 : { 5199 /* paddsb */, X86::PADDSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8668 : { 5199 /* paddsb */, X86::PADDSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8669 : { 5199 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8670 : { 5206 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8671 : { 5206 /* paddsw */, X86::PADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8672 : { 5206 /* paddsw */, X86::PADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8673 : { 5206 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8674 : { 5213 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8675 : { 5213 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8676 : { 5213 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8677 : { 5213 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8678 : { 5221 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8679 : { 5221 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8680 : { 5221 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8681 : { 5221 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8682 : { 5229 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8683 : { 5229 /* paddw */, X86::PADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8684 : { 5229 /* paddw */, X86::PADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8685 : { 5229 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8686 : { 5235 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
8687 : { 5235 /* palignr */, X86::PALIGNRrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8688 : { 5235 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8689 : { 5235 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
8690 : { 5243 /* pand */, X86::MMX_PANDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8691 : { 5243 /* pand */, X86::PANDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8692 : { 5243 /* pand */, X86::PANDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8693 : { 5243 /* pand */, X86::MMX_PANDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8694 : { 5248 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8695 : { 5248 /* pandn */, X86::PANDNrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8696 : { 5248 /* pandn */, X86::PANDNrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8697 : { 5248 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8698 : { 5254 /* pause */, X86::PAUSE, Convert_NoOperands, 0, { }, },
8699 : { 5260 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8700 : { 5260 /* pavgb */, X86::PAVGBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8701 : { 5260 /* pavgb */, X86::PAVGBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8702 : { 5260 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8703 : { 5266 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8704 : { 5266 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8705 : { 5274 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8706 : { 5274 /* pavgw */, X86::PAVGWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8707 : { 5274 /* pavgw */, X86::PAVGWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8708 : { 5274 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8709 : { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8710 : { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8711 : { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
8712 : { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
8713 : { 5289 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8714 : { 5289 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8715 : { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
8716 : { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32 }, },
8717 : { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
8718 : { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32 }, },
8719 : { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
8720 : { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32 }, },
8721 : { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_1__Tie0_2_2__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
8722 : { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_1__Tie0_2_2__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32 }, },
8723 : { 5349 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8724 : { 5349 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8725 : { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8726 : { 5359 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8727 : { 5359 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8728 : { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8729 : { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8730 : { 5367 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8731 : { 5367 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8732 : { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8733 : { 5375 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8734 : { 5375 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8735 : { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8736 : { 5383 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8737 : { 5383 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8738 : { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8739 : { 5391 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8740 : { 5391 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8741 : { 5401 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8742 : { 5401 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8743 : { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8744 : { 5411 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8745 : { 5411 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8746 : { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8747 : { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8748 : { 5419 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8749 : { 5419 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8750 : { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8751 : { 5427 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8752 : { 5427 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8753 : { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8754 : { 5435 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8755 : { 5435 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8756 : { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8757 : { 5443 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8758 : { 5443 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8759 : { 5453 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8760 : { 5453 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8761 : { 5463 /* pconfig */, X86::PCONFIG, Convert_NoOperands, 0, { }, },
8762 : { 5476 /* pdepl */, X86::PDEP32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8763 : { 5476 /* pdepl */, X86::PDEP32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8764 : { 5482 /* pdepq */, X86::PDEP64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8765 : { 5482 /* pdepq */, X86::PDEP64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8766 : { 5493 /* pextl */, X86::PEXT32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
8767 : { 5493 /* pextl */, X86::PEXT32rm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32, MCK_GR32 }, },
8768 : { 5499 /* pextq */, X86::PEXT64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
8769 : { 5499 /* pextq */, X86::PEXT64rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64, MCK_GR64 }, },
8770 : { 5505 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8771 : { 5505 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
8772 : { 5512 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
8773 : { 5512 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
8774 : { 5519 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
8775 : { 5519 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
8776 : { 5526 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_GR32orGR64 }, },
8777 : { 5526 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
8778 : { 5526 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
8779 : { 5533 /* pf2id */, X86::PF2IDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8780 : { 5533 /* pf2id */, X86::PF2IDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8781 : { 5539 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8782 : { 5539 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8783 : { 5545 /* pfacc */, X86::PFACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8784 : { 5545 /* pfacc */, X86::PFACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8785 : { 5551 /* pfadd */, X86::PFADDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8786 : { 5551 /* pfadd */, X86::PFADDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8787 : { 5557 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8788 : { 5557 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8789 : { 5565 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8790 : { 5565 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8791 : { 5573 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8792 : { 5573 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8793 : { 5581 /* pfmax */, X86::PFMAXrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8794 : { 5581 /* pfmax */, X86::PFMAXrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8795 : { 5587 /* pfmin */, X86::PFMINrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8796 : { 5587 /* pfmin */, X86::PFMINrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8797 : { 5593 /* pfmul */, X86::PFMULrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8798 : { 5593 /* pfmul */, X86::PFMULrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8799 : { 5599 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8800 : { 5599 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8801 : { 5606 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8802 : { 5606 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8803 : { 5614 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8804 : { 5614 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8805 : { 5620 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8806 : { 5620 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8807 : { 5629 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8808 : { 5629 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8809 : { 5638 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8810 : { 5638 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8811 : { 5647 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8812 : { 5647 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8813 : { 5655 /* pfsub */, X86::PFSUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8814 : { 5655 /* pfsub */, X86::PFSUBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8815 : { 5661 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8816 : { 5661 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8817 : { 5668 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8818 : { 5668 /* phaddd */, X86::PHADDDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8819 : { 5668 /* phaddd */, X86::PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8820 : { 5668 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8821 : { 5675 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8822 : { 5675 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8823 : { 5675 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8824 : { 5675 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8825 : { 5683 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8826 : { 5683 /* phaddw */, X86::PHADDWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8827 : { 5683 /* phaddw */, X86::PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8828 : { 5683 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8829 : { 5690 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8830 : { 5690 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8831 : { 5701 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8832 : { 5701 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8833 : { 5701 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8834 : { 5701 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8835 : { 5708 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8836 : { 5708 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8837 : { 5708 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8838 : { 5708 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8839 : { 5716 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8840 : { 5716 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8841 : { 5716 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8842 : { 5716 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8843 : { 5723 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8844 : { 5723 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8845 : { 5729 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8846 : { 5729 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8847 : { 5735 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
8848 : { 5735 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_2__Tie0_1_1__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32 }, },
8849 : { 5742 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32 }, },
8850 : { 5742 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_2__Tie0_1_1__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
8851 : { 5749 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32 }, },
8852 : { 5749 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_2__Tie0_1_1__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
8853 : { 5756 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_VR64 }, },
8854 : { 5756 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_2__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32 }, },
8855 : { 5756 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_VR64 }, },
8856 : { 5756 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_2__Tie0_1_1__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32 }, },
8857 : { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8858 : { 5763 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8859 : { 5763 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8860 : { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8861 : { 5773 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8862 : { 5773 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8863 : { 5773 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8864 : { 5773 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8865 : { 5781 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8866 : { 5781 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8867 : { 5788 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8868 : { 5788 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8869 : { 5795 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8870 : { 5795 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8871 : { 5795 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8872 : { 5795 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8873 : { 5802 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8874 : { 5802 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8875 : { 5802 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8876 : { 5802 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8877 : { 5809 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8878 : { 5809 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8879 : { 5816 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8880 : { 5816 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8881 : { 5823 /* pminsb */, X86::PMINSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8882 : { 5823 /* pminsb */, X86::PMINSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8883 : { 5830 /* pminsd */, X86::PMINSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8884 : { 5830 /* pminsd */, X86::PMINSDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8885 : { 5837 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8886 : { 5837 /* pminsw */, X86::PMINSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8887 : { 5837 /* pminsw */, X86::PMINSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8888 : { 5837 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8889 : { 5844 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8890 : { 5844 /* pminub */, X86::PMINUBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8891 : { 5844 /* pminub */, X86::PMINUBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8892 : { 5844 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8893 : { 5851 /* pminud */, X86::PMINUDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8894 : { 5851 /* pminud */, X86::PMINUDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8895 : { 5858 /* pminuw */, X86::PMINUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8896 : { 5858 /* pminuw */, X86::PMINUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8897 : { 5865 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR64, MCK_GR32orGR64 }, },
8898 : { 5865 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
8899 : { 5874 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8900 : { 5874 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8901 : { 5883 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8902 : { 5883 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
8903 : { 5892 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8904 : { 5892 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8905 : { 5901 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8906 : { 5901 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8907 : { 5910 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8908 : { 5910 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8909 : { 5919 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8910 : { 5919 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8911 : { 5928 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8912 : { 5928 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8913 : { 5937 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8914 : { 5937 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
8915 : { 5946 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8916 : { 5946 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8917 : { 5955 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8918 : { 5955 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8919 : { 5964 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8920 : { 5964 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
8921 : { 5973 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8922 : { 5973 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
8923 : { 5982 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8924 : { 5982 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8925 : { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8926 : { 5989 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8927 : { 5989 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8928 : { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8929 : { 5998 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8930 : { 5998 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8931 : { 6006 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8932 : { 6006 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8933 : { 6006 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8934 : { 6006 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8935 : { 6014 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8936 : { 6014 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8937 : { 6014 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8938 : { 6014 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8939 : { 6021 /* pmulld */, X86::PMULLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8940 : { 6021 /* pmulld */, X86::PMULLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8941 : { 6028 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8942 : { 6028 /* pmullw */, X86::PMULLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8943 : { 6028 /* pmullw */, X86::PMULLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8944 : { 6028 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8945 : { 6035 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8946 : { 6035 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8947 : { 6035 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8948 : { 6035 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8949 : { 6047 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
8950 : { 6053 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
8951 : { 6066 /* popcntl */, X86::POPCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
8952 : { 6066 /* popcntl */, X86::POPCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
8953 : { 6074 /* popcntq */, X86::POPCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
8954 : { 6074 /* popcntq */, X86::POPCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
8955 : { 6082 /* popcntw */, X86::POPCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
8956 : { 6082 /* popcntw */, X86::POPCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
8957 : { 6101 /* popfl */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
8958 : { 6107 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, { }, },
8959 : { 6113 /* popfw */, X86::POPF16, Convert_NoOperands, 0, { }, },
8960 : { 6119 /* popl */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8961 : { 6119 /* popl */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8962 : { 6119 /* popl */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
8963 : { 6119 /* popl */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
8964 : { 6119 /* popl */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8965 : { 6119 /* popl */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
8966 : { 6119 /* popl */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
8967 : { 6124 /* popq */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
8968 : { 6124 /* popq */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
8969 : { 6124 /* popq */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
8970 : { 6124 /* popq */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
8971 : { 6129 /* popw */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
8972 : { 6129 /* popw */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
8973 : { 6129 /* popw */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
8974 : { 6129 /* popw */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
8975 : { 6129 /* popw */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
8976 : { 6129 /* popw */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
8977 : { 6129 /* popw */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
8978 : { 6134 /* por */, X86::MMX_PORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8979 : { 6134 /* por */, X86::PORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8980 : { 6134 /* por */, X86::PORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8981 : { 6134 /* por */, X86::MMX_PORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8982 : { 6138 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8983 : { 6147 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8984 : { 6159 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8985 : { 6170 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8986 : { 6181 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8987 : { 6192 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8988 : { 6202 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
8989 : { 6214 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8990 : { 6214 /* psadbw */, X86::PSADBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8991 : { 6214 /* psadbw */, X86::PSADBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8992 : { 6214 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8993 : { 6221 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
8994 : { 6221 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
8995 : { 6221 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
8996 : { 6221 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
8997 : { 6228 /* pshufd */, X86::PSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
8998 : { 6228 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
8999 : { 6235 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9000 : { 6235 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9001 : { 6243 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9002 : { 6243 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9003 : { 6251 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64, MCK_VR64 }, },
9004 : { 6251 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VR64 }, },
9005 : { 6258 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9006 : { 6258 /* psignb */, X86::PSIGNBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9007 : { 6258 /* psignb */, X86::PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9008 : { 6258 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9009 : { 6265 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9010 : { 6265 /* psignd */, X86::PSIGNDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9011 : { 6265 /* psignd */, X86::PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9012 : { 6265 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9013 : { 6272 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9014 : { 6272 /* psignw */, X86::PSIGNWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9015 : { 6272 /* psignw */, X86::PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9016 : { 6272 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9017 : { 6279 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9018 : { 6279 /* pslld */, X86::PSLLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9019 : { 6279 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9020 : { 6279 /* pslld */, X86::PSLLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9021 : { 6279 /* pslld */, X86::PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9022 : { 6279 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9023 : { 6285 /* pslldq */, X86::PSLLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9024 : { 6292 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9025 : { 6292 /* psllq */, X86::PSLLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9026 : { 6292 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9027 : { 6292 /* psllq */, X86::PSLLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9028 : { 6292 /* psllq */, X86::PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9029 : { 6292 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9030 : { 6298 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9031 : { 6298 /* psllw */, X86::PSLLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9032 : { 6298 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9033 : { 6298 /* psllw */, X86::PSLLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9034 : { 6298 /* psllw */, X86::PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9035 : { 6298 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9036 : { 6304 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9037 : { 6304 /* psrad */, X86::PSRADrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9038 : { 6304 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9039 : { 6304 /* psrad */, X86::PSRADri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9040 : { 6304 /* psrad */, X86::PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9041 : { 6304 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9042 : { 6310 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9043 : { 6310 /* psraw */, X86::PSRAWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9044 : { 6310 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9045 : { 6310 /* psraw */, X86::PSRAWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9046 : { 6310 /* psraw */, X86::PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9047 : { 6310 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9048 : { 6316 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9049 : { 6316 /* psrld */, X86::PSRLDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9050 : { 6316 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9051 : { 6316 /* psrld */, X86::PSRLDri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9052 : { 6316 /* psrld */, X86::PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9053 : { 6316 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9054 : { 6322 /* psrldq */, X86::PSRLDQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9055 : { 6329 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9056 : { 6329 /* psrlq */, X86::PSRLQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9057 : { 6329 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9058 : { 6329 /* psrlq */, X86::PSRLQri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9059 : { 6329 /* psrlq */, X86::PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9060 : { 6329 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9061 : { 6335 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9062 : { 6335 /* psrlw */, X86::PSRLWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9063 : { 6335 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR64 }, },
9064 : { 6335 /* psrlw */, X86::PSRLWri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32 }, },
9065 : { 6335 /* psrlw */, X86::PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9066 : { 6335 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9067 : { 6341 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9068 : { 6341 /* psubb */, X86::PSUBBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9069 : { 6341 /* psubb */, X86::PSUBBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9070 : { 6341 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9071 : { 6347 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9072 : { 6347 /* psubd */, X86::PSUBDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9073 : { 6347 /* psubd */, X86::PSUBDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9074 : { 6347 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9075 : { 6353 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9076 : { 6353 /* psubq */, X86::PSUBQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9077 : { 6353 /* psubq */, X86::PSUBQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9078 : { 6353 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9079 : { 6359 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9080 : { 6359 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9081 : { 6359 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9082 : { 6359 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9083 : { 6366 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9084 : { 6366 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9085 : { 6366 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9086 : { 6366 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9087 : { 6373 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9088 : { 6373 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9089 : { 6373 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9090 : { 6373 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9091 : { 6381 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9092 : { 6381 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9093 : { 6381 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9094 : { 6381 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9095 : { 6389 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9096 : { 6389 /* psubw */, X86::PSUBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9097 : { 6389 /* psubw */, X86::PSUBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9098 : { 6389 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9099 : { 6395 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9100 : { 6395 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9101 : { 6402 /* ptest */, X86::PTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9102 : { 6402 /* ptest */, X86::PTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9103 : { 6416 /* ptwritel */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
9104 : { 6416 /* ptwritel */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9105 : { 6425 /* ptwriteq */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9106 : { 6425 /* ptwriteq */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9107 : { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9108 : { 6434 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9109 : { 6434 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9110 : { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9111 : { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9112 : { 6444 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9113 : { 6444 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9114 : { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9115 : { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9116 : { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9117 : { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9118 : { 6465 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9119 : { 6465 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9120 : { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9121 : { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9122 : { 6475 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9123 : { 6475 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9124 : { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
9125 : { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9126 : { 6485 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9127 : { 6485 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9128 : { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
9129 : { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9130 : { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9131 : { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9132 : { 6506 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9133 : { 6506 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9134 : { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR64 }, },
9135 : { 6521 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
9136 : { 6528 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
9137 : { 6548 /* pushfl */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
9138 : { 6555 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, { }, },
9139 : { 6562 /* pushfw */, X86::PUSHF16, Convert_NoOperands, 0, { }, },
9140 : { 6569 /* pushl */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
9141 : { 6569 /* pushl */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
9142 : { 6569 /* pushl */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
9143 : { 6569 /* pushl */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
9144 : { 6569 /* pushl */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
9145 : { 6569 /* pushl */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
9146 : { 6569 /* pushl */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
9147 : { 6569 /* pushl */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
9148 : { 6569 /* pushl */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
9149 : { 6569 /* pushl */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
9150 : { 6575 /* pushq */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
9151 : { 6575 /* pushq */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
9152 : { 6575 /* pushq */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9153 : { 6575 /* pushq */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
9154 : { 6575 /* pushq */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
9155 : { 6575 /* pushq */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9156 : { 6581 /* pushw */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
9157 : { 6581 /* pushw */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
9158 : { 6581 /* pushw */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
9159 : { 6581 /* pushw */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
9160 : { 6581 /* pushw */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
9161 : { 6581 /* pushw */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
9162 : { 6581 /* pushw */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9163 : { 6581 /* pushw */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
9164 : { 6581 /* pushw */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
9165 : { 6581 /* pushw */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9166 : { 6587 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_VR64, MCK_VR64 }, },
9167 : { 6587 /* pxor */, X86::PXORrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9168 : { 6587 /* pxor */, X86::PXORrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9169 : { 6587 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR64 }, },
9170 : { 6596 /* rclb */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9171 : { 6596 /* rclb */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9172 : { 6596 /* rclb */, X86::RCL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9173 : { 6596 /* rclb */, X86::RCL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9174 : { 6596 /* rclb */, X86::RCL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9175 : { 6596 /* rclb */, X86::RCL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9176 : { 6601 /* rcll */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9177 : { 6601 /* rcll */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9178 : { 6601 /* rcll */, X86::RCL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9179 : { 6601 /* rcll */, X86::RCL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9180 : { 6601 /* rcll */, X86::RCL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9181 : { 6601 /* rcll */, X86::RCL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9182 : { 6606 /* rclq */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9183 : { 6606 /* rclq */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9184 : { 6606 /* rclq */, X86::RCL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9185 : { 6606 /* rclq */, X86::RCL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9186 : { 6606 /* rclq */, X86::RCL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9187 : { 6606 /* rclq */, X86::RCL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9188 : { 6611 /* rclw */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9189 : { 6611 /* rclw */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9190 : { 6611 /* rclw */, X86::RCL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9191 : { 6611 /* rclw */, X86::RCL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9192 : { 6611 /* rclw */, X86::RCL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9193 : { 6611 /* rclw */, X86::RCL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9194 : { 6616 /* rcpps */, X86::RCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9195 : { 6616 /* rcpps */, X86::RCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9196 : { 6622 /* rcpss */, X86::RCPSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9197 : { 6622 /* rcpss */, X86::RCPSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9198 : { 6632 /* rcrb */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9199 : { 6632 /* rcrb */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9200 : { 6632 /* rcrb */, X86::RCR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9201 : { 6632 /* rcrb */, X86::RCR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9202 : { 6632 /* rcrb */, X86::RCR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9203 : { 6632 /* rcrb */, X86::RCR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9204 : { 6637 /* rcrl */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9205 : { 6637 /* rcrl */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9206 : { 6637 /* rcrl */, X86::RCR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9207 : { 6637 /* rcrl */, X86::RCR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9208 : { 6637 /* rcrl */, X86::RCR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9209 : { 6637 /* rcrl */, X86::RCR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9210 : { 6642 /* rcrq */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9211 : { 6642 /* rcrq */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9212 : { 6642 /* rcrq */, X86::RCR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9213 : { 6642 /* rcrq */, X86::RCR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9214 : { 6642 /* rcrq */, X86::RCR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9215 : { 6642 /* rcrq */, X86::RCR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9216 : { 6647 /* rcrw */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9217 : { 6647 /* rcrw */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9218 : { 6647 /* rcrw */, X86::RCR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9219 : { 6647 /* rcrw */, X86::RCR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9220 : { 6647 /* rcrw */, X86::RCR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9221 : { 6647 /* rcrw */, X86::RCR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9222 : { 6661 /* rdfsbasel */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
9223 : { 6671 /* rdfsbaseq */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9224 : { 6690 /* rdgsbasel */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
9225 : { 6700 /* rdgsbaseq */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9226 : { 6710 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, { }, },
9227 : { 6716 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
9228 : { 6716 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9229 : { 6722 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, { }, },
9230 : { 6729 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, { }, },
9231 : { 6742 /* rdrandl */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9232 : { 6750 /* rdrandq */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9233 : { 6758 /* rdrandw */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9234 : { 6773 /* rdseedl */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9235 : { 6781 /* rdseedq */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9236 : { 6789 /* rdseedw */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9237 : { 6797 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9238 : { 6804 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9239 : { 6811 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, { }, },
9240 : { 6817 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, { }, },
9241 : { 6824 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, { }, },
9242 : { 6828 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, { }, },
9243 : { 6849 /* retl */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, { }, },
9244 : { 6849 /* retl */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
9245 : { 6854 /* retq */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
9246 : { 6854 /* retq */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
9247 : { 6859 /* retw */, X86::RETW, Convert_NoOperands, 0, { }, },
9248 : { 6859 /* retw */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
9249 : { 6864 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, { }, },
9250 : { 6874 /* rolb */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9251 : { 6874 /* rolb */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9252 : { 6874 /* rolb */, X86::ROL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9253 : { 6874 /* rolb */, X86::ROL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9254 : { 6874 /* rolb */, X86::ROL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9255 : { 6874 /* rolb */, X86::ROL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9256 : { 6879 /* roll */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9257 : { 6879 /* roll */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9258 : { 6879 /* roll */, X86::ROL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9259 : { 6879 /* roll */, X86::ROL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9260 : { 6879 /* roll */, X86::ROL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9261 : { 6879 /* roll */, X86::ROL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9262 : { 6884 /* rolq */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9263 : { 6884 /* rolq */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9264 : { 6884 /* rolq */, X86::ROL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9265 : { 6884 /* rolq */, X86::ROL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9266 : { 6884 /* rolq */, X86::ROL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9267 : { 6884 /* rolq */, X86::ROL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9268 : { 6889 /* rolw */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9269 : { 6889 /* rolw */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9270 : { 6889 /* rolw */, X86::ROL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9271 : { 6889 /* rolw */, X86::ROL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9272 : { 6889 /* rolw */, X86::ROL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9273 : { 6889 /* rolw */, X86::ROL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9274 : { 6898 /* rorb */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9275 : { 6898 /* rorb */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9276 : { 6898 /* rorb */, X86::ROR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9277 : { 6898 /* rorb */, X86::ROR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9278 : { 6898 /* rorb */, X86::ROR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9279 : { 6898 /* rorb */, X86::ROR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9280 : { 6903 /* rorl */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9281 : { 6903 /* rorl */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9282 : { 6903 /* rorl */, X86::ROR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9283 : { 6903 /* rorl */, X86::ROR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9284 : { 6903 /* rorl */, X86::ROR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9285 : { 6903 /* rorl */, X86::ROR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9286 : { 6908 /* rorq */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9287 : { 6908 /* rorq */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9288 : { 6908 /* rorq */, X86::ROR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9289 : { 6908 /* rorq */, X86::ROR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9290 : { 6908 /* rorq */, X86::ROR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9291 : { 6908 /* rorq */, X86::ROR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9292 : { 6913 /* rorw */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9293 : { 6913 /* rorw */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9294 : { 6913 /* rorw */, X86::ROR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9295 : { 6913 /* rorw */, X86::ROR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9296 : { 6913 /* rorw */, X86::ROR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9297 : { 6913 /* rorw */, X86::ROR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9298 : { 6923 /* rorxl */, X86::RORX32ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9299 : { 6923 /* rorxl */, X86::RORX32mi, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_GR32 }, },
9300 : { 6929 /* rorxq */, X86::RORX64ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9301 : { 6929 /* rorxq */, X86::RORX64mi, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_GR64 }, },
9302 : { 6935 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9303 : { 6935 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9304 : { 6943 /* roundps */, X86::ROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9305 : { 6943 /* roundps */, X86::ROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9306 : { 6951 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9307 : { 6951 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32 }, },
9308 : { 6959 /* roundss */, X86::ROUNDSSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9309 : { 6959 /* roundss */, X86::ROUNDSSm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32 }, },
9310 : { 6967 /* rsm */, X86::RSM, Convert_NoOperands, 0, { }, },
9311 : { 6971 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9312 : { 6971 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9313 : { 6979 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9314 : { 6979 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9315 : { 6987 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9316 : { 6996 /* sahf */, X86::SAHF, Convert_NoOperands, 0, { }, },
9317 : { 7001 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, { }, },
9318 : { 7010 /* sarb */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9319 : { 7010 /* sarb */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9320 : { 7010 /* sarb */, X86::SAR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9321 : { 7010 /* sarb */, X86::SAR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9322 : { 7010 /* sarb */, X86::SAR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9323 : { 7010 /* sarb */, X86::SAR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9324 : { 7015 /* sarl */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9325 : { 7015 /* sarl */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9326 : { 7015 /* sarl */, X86::SAR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9327 : { 7015 /* sarl */, X86::SAR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9328 : { 7015 /* sarl */, X86::SAR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9329 : { 7015 /* sarl */, X86::SAR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9330 : { 7020 /* sarq */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9331 : { 7020 /* sarq */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9332 : { 7020 /* sarq */, X86::SAR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9333 : { 7020 /* sarq */, X86::SAR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9334 : { 7020 /* sarq */, X86::SAR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9335 : { 7020 /* sarq */, X86::SAR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9336 : { 7025 /* sarw */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9337 : { 7025 /* sarw */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9338 : { 7025 /* sarw */, X86::SAR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9339 : { 7025 /* sarw */, X86::SAR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9340 : { 7025 /* sarw */, X86::SAR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9341 : { 7025 /* sarw */, X86::SAR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9342 : { 7035 /* sarxl */, X86::SARX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9343 : { 7035 /* sarxl */, X86::SARX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9344 : { 7041 /* sarxq */, X86::SARX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9345 : { 7041 /* sarxq */, X86::SARX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9346 : { 7047 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, { }, },
9347 : { 7063 /* sbbb */, X86::SBB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9348 : { 7063 /* sbbb */, X86::SBB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9349 : { 7063 /* sbbb */, X86::SBB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9350 : { 7063 /* sbbb */, X86::SBB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9351 : { 7063 /* sbbb */, X86::SBB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9352 : { 7063 /* sbbb */, X86::SBB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
9353 : { 7068 /* sbbl */, X86::SBB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9354 : { 7068 /* sbbl */, X86::SBB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9355 : { 7068 /* sbbl */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
9356 : { 7068 /* sbbl */, X86::SBB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
9357 : { 7068 /* sbbl */, X86::SBB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9358 : { 7068 /* sbbl */, X86::SBB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9359 : { 7068 /* sbbl */, X86::SBB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9360 : { 7068 /* sbbl */, X86::SBB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9361 : { 7068 /* sbbl */, X86::SBB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9362 : { 7073 /* sbbq */, X86::SBB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9363 : { 7073 /* sbbq */, X86::SBB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9364 : { 7073 /* sbbq */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
9365 : { 7073 /* sbbq */, X86::SBB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
9366 : { 7073 /* sbbq */, X86::SBB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9367 : { 7073 /* sbbq */, X86::SBB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9368 : { 7073 /* sbbq */, X86::SBB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
9369 : { 7073 /* sbbq */, X86::SBB64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9370 : { 7073 /* sbbq */, X86::SBB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9371 : { 7078 /* sbbw */, X86::SBB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9372 : { 7078 /* sbbw */, X86::SBB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9373 : { 7078 /* sbbw */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
9374 : { 7078 /* sbbw */, X86::SBB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
9375 : { 7078 /* sbbw */, X86::SBB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9376 : { 7078 /* sbbw */, X86::SBB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9377 : { 7078 /* sbbw */, X86::SBB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9378 : { 7078 /* sbbw */, X86::SBB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9379 : { 7078 /* sbbw */, X86::SBB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9380 : { 7083 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
9381 : { 7083 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
9382 : { 7083 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
9383 : { 7083 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
9384 : { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9385 : { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
9386 : { 7100 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9387 : { 7100 /* scasl */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
9388 : { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9389 : { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
9390 : { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9391 : { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
9392 : { 7118 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9393 : { 7118 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9394 : { 7123 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9395 : { 7123 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9396 : { 7129 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9397 : { 7129 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9398 : { 7134 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9399 : { 7134 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9400 : { 7140 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9401 : { 7140 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9402 : { 7145 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9403 : { 7145 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9404 : { 7150 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9405 : { 7150 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9406 : { 7156 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9407 : { 7156 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9408 : { 7161 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9409 : { 7161 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9410 : { 7167 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9411 : { 7167 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9412 : { 7173 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9413 : { 7173 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9414 : { 7179 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9415 : { 7179 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9416 : { 7185 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9417 : { 7185 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9418 : { 7191 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9419 : { 7191 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9420 : { 7196 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9421 : { 7196 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9422 : { 7201 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
9423 : { 7201 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9424 : { 7206 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, 0, { }, },
9425 : { 7215 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, { }, },
9426 : { 7233 /* sgdtl */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9427 : { 7239 /* sgdtq */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
9428 : { 7245 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9429 : { 7251 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9430 : { 7251 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9431 : { 7260 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9432 : { 7260 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9433 : { 7269 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9434 : { 7269 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9435 : { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9436 : { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9437 : { 7289 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9438 : { 7289 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9439 : { 7300 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9440 : { 7300 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9441 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9442 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_1__Tie0_2_2__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9443 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_XMM0, MCK_FR32, MCK_FR32 }, },
9444 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_2__Tie0_1_1__Mem1285_1, 0, { MCK_XMM0, MCK_Mem128, MCK_FR32 }, },
9445 : { 7327 /* shlb */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9446 : { 7327 /* shlb */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9447 : { 7327 /* shlb */, X86::SHL8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9448 : { 7327 /* shlb */, X86::SHL8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9449 : { 7327 /* shlb */, X86::SHL8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9450 : { 7327 /* shlb */, X86::SHL8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9451 : { 7337 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9452 : { 7337 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9453 : { 7337 /* shldl */, X86::SHLD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
9454 : { 7337 /* shldl */, X86::SHLD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
9455 : { 7337 /* shldl */, X86::SHLD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9456 : { 7337 /* shldl */, X86::SHLD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
9457 : { 7343 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9458 : { 7343 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9459 : { 7343 /* shldq */, X86::SHLD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
9460 : { 7343 /* shldq */, X86::SHLD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
9461 : { 7343 /* shldq */, X86::SHLD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9462 : { 7343 /* shldq */, X86::SHLD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
9463 : { 7349 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9464 : { 7349 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9465 : { 7349 /* shldw */, X86::SHLD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
9466 : { 7349 /* shldw */, X86::SHLD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
9467 : { 7349 /* shldw */, X86::SHLD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
9468 : { 7349 /* shldw */, X86::SHLD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
9469 : { 7355 /* shll */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9470 : { 7355 /* shll */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9471 : { 7355 /* shll */, X86::SHL32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9472 : { 7355 /* shll */, X86::SHL32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9473 : { 7355 /* shll */, X86::SHL32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9474 : { 7355 /* shll */, X86::SHL32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9475 : { 7360 /* shlq */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9476 : { 7360 /* shlq */, X86::SHL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9477 : { 7360 /* shlq */, X86::SHL64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9478 : { 7360 /* shlq */, X86::SHL64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9479 : { 7360 /* shlq */, X86::SHL64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9480 : { 7360 /* shlq */, X86::SHL64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9481 : { 7365 /* shlw */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9482 : { 7365 /* shlw */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9483 : { 7365 /* shlw */, X86::SHL16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9484 : { 7365 /* shlw */, X86::SHL16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9485 : { 7365 /* shlw */, X86::SHL16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9486 : { 7365 /* shlw */, X86::SHL16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9487 : { 7375 /* shlxl */, X86::SHLX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9488 : { 7375 /* shlxl */, X86::SHLX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9489 : { 7381 /* shlxq */, X86::SHLX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9490 : { 7381 /* shlxq */, X86::SHLX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9491 : { 7391 /* shrb */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
9492 : { 7391 /* shrb */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
9493 : { 7391 /* shrb */, X86::SHR8rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR8 }, },
9494 : { 7391 /* shrb */, X86::SHR8mCL, Convert__Mem85_1, 0, { MCK_CL, MCK_Mem8 }, },
9495 : { 7391 /* shrb */, X86::SHR8ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR8 }, },
9496 : { 7391 /* shrb */, X86::SHR8mi, Convert__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8 }, },
9497 : { 7401 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9498 : { 7401 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9499 : { 7401 /* shrdl */, X86::SHRD32rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_GR32 }, },
9500 : { 7401 /* shrdl */, X86::SHRD32mrCL, Convert__Mem325_2__Reg1_1, 0, { MCK_CL, MCK_GR32, MCK_Mem32 }, },
9501 : { 7401 /* shrdl */, X86::SHRD32rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_GR32 }, },
9502 : { 7401 /* shrdl */, X86::SHRD32mri8, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_Mem32 }, },
9503 : { 7407 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9504 : { 7407 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9505 : { 7407 /* shrdq */, X86::SHRD64rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_GR64 }, },
9506 : { 7407 /* shrdq */, X86::SHRD64mrCL, Convert__Mem645_2__Reg1_1, 0, { MCK_CL, MCK_GR64, MCK_Mem64 }, },
9507 : { 7407 /* shrdq */, X86::SHRD64rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_GR64 }, },
9508 : { 7407 /* shrdq */, X86::SHRD64mri8, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_Mem64 }, },
9509 : { 7413 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9510 : { 7413 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9511 : { 7413 /* shrdw */, X86::SHRD16rrCL, Convert__Reg1_2__Tie0_1_1__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_GR16 }, },
9512 : { 7413 /* shrdw */, X86::SHRD16mrCL, Convert__Mem165_2__Reg1_1, 0, { MCK_CL, MCK_GR16, MCK_Mem16 }, },
9513 : { 7413 /* shrdw */, X86::SHRD16rri8, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_GR16 }, },
9514 : { 7413 /* shrdw */, X86::SHRD16mri8, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16, MCK_Mem16 }, },
9515 : { 7419 /* shrl */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
9516 : { 7419 /* shrl */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9517 : { 7419 /* shrl */, X86::SHR32rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR32 }, },
9518 : { 7419 /* shrl */, X86::SHR32mCL, Convert__Mem325_1, 0, { MCK_CL, MCK_Mem32 }, },
9519 : { 7419 /* shrl */, X86::SHR32ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32 }, },
9520 : { 7419 /* shrl */, X86::SHR32mi, Convert__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32 }, },
9521 : { 7424 /* shrq */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
9522 : { 7424 /* shrq */, X86::SHR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
9523 : { 7424 /* shrq */, X86::SHR64rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR64 }, },
9524 : { 7424 /* shrq */, X86::SHR64mCL, Convert__Mem645_1, Feature_In64BitMode, { MCK_CL, MCK_Mem64 }, },
9525 : { 7424 /* shrq */, X86::SHR64ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64 }, },
9526 : { 7424 /* shrq */, X86::SHR64mi, Convert__Mem645_1__ImmUnsignedi81_0, Feature_In64BitMode, { MCK_ImmUnsignedi8, MCK_Mem64 }, },
9527 : { 7429 /* shrw */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
9528 : { 7429 /* shrw */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9529 : { 7429 /* shrw */, X86::SHR16rCL, Convert__Reg1_1__Tie0_1_1, 0, { MCK_CL, MCK_GR16 }, },
9530 : { 7429 /* shrw */, X86::SHR16mCL, Convert__Mem165_1, 0, { MCK_CL, MCK_Mem16 }, },
9531 : { 7429 /* shrw */, X86::SHR16ri, Convert__Reg1_1__Tie0_1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR16 }, },
9532 : { 7429 /* shrw */, X86::SHR16mi, Convert__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16 }, },
9533 : { 7439 /* shrxl */, X86::SHRX32rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
9534 : { 7439 /* shrxl */, X86::SHRX32rm, Convert__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
9535 : { 7445 /* shrxq */, X86::SHRX64rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
9536 : { 7445 /* shrxq */, X86::SHRX64rm, Convert__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
9537 : { 7451 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9538 : { 7451 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9539 : { 7458 /* shufps */, X86::SHUFPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9540 : { 7458 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9541 : { 7476 /* sidtl */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9542 : { 7482 /* sidtq */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
9543 : { 7488 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
9544 : { 7494 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
9545 : { 7501 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9546 : { 7506 /* sldtl */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9547 : { 7512 /* sldtq */, X86::SLDT64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9548 : { 7518 /* sldtw */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9549 : { 7518 /* sldtw */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9550 : { 7524 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
9551 : { 7524 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
9552 : { 7536 /* smswl */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9553 : { 7542 /* smswq */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9554 : { 7548 /* smsww */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9555 : { 7548 /* smsww */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9556 : { 7554 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9557 : { 7554 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9558 : { 7561 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9559 : { 7561 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9560 : { 7568 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9561 : { 7568 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9562 : { 7575 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9563 : { 7575 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9564 : { 7582 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, { }, },
9565 : { 7585 /* stac */, X86::STAC, Convert_NoOperands, 0, { }, },
9566 : { 7590 /* stc */, X86::STC, Convert_NoOperands, 0, { }, },
9567 : { 7594 /* std */, X86::STD, Convert_NoOperands, 0, { }, },
9568 : { 7598 /* stgi */, X86::STGI, Convert_NoOperands, 0, { }, },
9569 : { 7603 /* sti */, X86::STI, Convert_NoOperands, 0, { }, },
9570 : { 7607 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
9571 : { 7615 /* stos */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
9572 : { 7615 /* stos */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
9573 : { 7615 /* stos */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
9574 : { 7615 /* stos */, X86::STOSQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
9575 : { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
9576 : { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
9577 : { 7632 /* stosl */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
9578 : { 7632 /* stosl */, X86::STOSL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
9579 : { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
9580 : { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
9581 : { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
9582 : { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
9583 : { 7654 /* strl */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
9584 : { 7659 /* strq */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
9585 : { 7664 /* strw */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
9586 : { 7664 /* strw */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
9587 : { 7673 /* subb */, X86::SUB8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9588 : { 7673 /* subb */, X86::SUB8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9589 : { 7673 /* subb */, X86::SUB8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9590 : { 7673 /* subb */, X86::SUB8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9591 : { 7673 /* subb */, X86::SUB8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9592 : { 7673 /* subb */, X86::SUB8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
9593 : { 7678 /* subl */, X86::SUB32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9594 : { 7678 /* subl */, X86::SUB32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9595 : { 7678 /* subl */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
9596 : { 7678 /* subl */, X86::SUB32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
9597 : { 7678 /* subl */, X86::SUB32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
9598 : { 7678 /* subl */, X86::SUB32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9599 : { 7678 /* subl */, X86::SUB32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9600 : { 7678 /* subl */, X86::SUB32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9601 : { 7678 /* subl */, X86::SUB32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9602 : { 7683 /* subpd */, X86::SUBPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9603 : { 7683 /* subpd */, X86::SUBPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9604 : { 7689 /* subps */, X86::SUBPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9605 : { 7689 /* subps */, X86::SUBPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9606 : { 7695 /* subq */, X86::SUB64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9607 : { 7695 /* subq */, X86::SUB64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9608 : { 7695 /* subq */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
9609 : { 7695 /* subq */, X86::SUB64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
9610 : { 7695 /* subq */, X86::SUB64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
9611 : { 7695 /* subq */, X86::SUB64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9612 : { 7695 /* subq */, X86::SUB64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
9613 : { 7695 /* subq */, X86::SUB64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9614 : { 7695 /* subq */, X86::SUB64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9615 : { 7700 /* subsd */, X86::SUBSDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9616 : { 7700 /* subsd */, X86::SUBSDrm, Convert__Reg1_1__Tie0_1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9617 : { 7706 /* subss */, X86::SUBSSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9618 : { 7706 /* subss */, X86::SUBSSrm, Convert__Reg1_1__Tie0_1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9619 : { 7712 /* subw */, X86::SUB16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9620 : { 7712 /* subw */, X86::SUB16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9621 : { 7712 /* subw */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
9622 : { 7712 /* subw */, X86::SUB16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
9623 : { 7712 /* subw */, X86::SUB16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
9624 : { 7712 /* subw */, X86::SUB16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9625 : { 7712 /* subw */, X86::SUB16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9626 : { 7712 /* subw */, X86::SUB16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9627 : { 7712 /* subw */, X86::SUB16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9628 : { 7717 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, { }, },
9629 : { 7724 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, { }, },
9630 : { 7732 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, { }, },
9631 : { 7749 /* sysexitl */, X86::SYSEXIT, Convert_NoOperands, 0, { }, },
9632 : { 7758 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, { }, },
9633 : { 7774 /* sysretl */, X86::SYSRET, Convert_NoOperands, 0, { }, },
9634 : { 7782 /* sysretq */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
9635 : { 7797 /* t1mskcl */, X86::T1MSKC32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9636 : { 7797 /* t1mskcl */, X86::T1MSKC32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9637 : { 7805 /* t1mskcq */, X86::T1MSKC64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9638 : { 7805 /* t1mskcq */, X86::T1MSKC64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9639 : { 7818 /* testb */, X86::TEST8rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
9640 : { 7818 /* testb */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
9641 : { 7818 /* testb */, X86::TEST8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
9642 : { 7818 /* testb */, X86::TEST8ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
9643 : { 7818 /* testb */, X86::TEST8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
9644 : { 7818 /* testb */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
9645 : { 7824 /* testl */, X86::TEST32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9646 : { 7824 /* testl */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
9647 : { 7824 /* testl */, X86::TEST32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
9648 : { 7824 /* testl */, X86::TEST32ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
9649 : { 7824 /* testl */, X86::TEST32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
9650 : { 7824 /* testl */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
9651 : { 7830 /* testq */, X86::TEST64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9652 : { 7830 /* testq */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
9653 : { 7830 /* testq */, X86::TEST64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
9654 : { 7830 /* testq */, X86::TEST64ri32, Convert__Reg1_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_GR64 }, },
9655 : { 7830 /* testq */, X86::TEST64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
9656 : { 7830 /* testq */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
9657 : { 7836 /* testw */, X86::TEST16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9658 : { 7836 /* testw */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
9659 : { 7836 /* testw */, X86::TEST16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
9660 : { 7836 /* testw */, X86::TEST16ri, Convert__Reg1_1__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
9661 : { 7836 /* testw */, X86::TEST16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
9662 : { 7836 /* testw */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
9663 : { 7842 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
9664 : { 7855 /* tzcntl */, X86::TZCNT32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9665 : { 7855 /* tzcntl */, X86::TZCNT32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9666 : { 7862 /* tzcntq */, X86::TZCNT64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9667 : { 7862 /* tzcntq */, X86::TZCNT64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9668 : { 7869 /* tzcntw */, X86::TZCNT16rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
9669 : { 7869 /* tzcntw */, X86::TZCNT16rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
9670 : { 7882 /* tzmskl */, X86::TZMSK32rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
9671 : { 7882 /* tzmskl */, X86::TZMSK32rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
9672 : { 7889 /* tzmskq */, X86::TZMSK64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
9673 : { 7889 /* tzmskq */, X86::TZMSK64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
9674 : { 7896 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9675 : { 7896 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
9676 : { 7904 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9677 : { 7904 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
9678 : { 7912 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, { }, },
9679 : { 7916 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, { }, },
9680 : { 7921 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
9681 : { 7921 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, 0, { MCK_GR32 }, },
9682 : { 7921 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
9683 : { 7930 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
9684 : { 7937 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9685 : { 7937 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9686 : { 7946 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9687 : { 7946 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9688 : { 7955 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9689 : { 7955 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9690 : { 7964 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9691 : { 7964 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9692 : { 7973 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
9693 : { 7973 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9694 : { 7973 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9695 : { 7983 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9696 : { 7983 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9697 : { 7983 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9698 : { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
9699 : { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9700 : { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9701 : { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9702 : { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9703 : { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9704 : { 8015 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9705 : { 8015 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9706 : { 8015 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9707 : { 8015 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9708 : { 8015 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9709 : { 8015 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9710 : { 8015 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9711 : { 8015 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9712 : { 8015 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9713 : { 8015 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9714 : { 8015 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9715 : { 8015 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9716 : { 8015 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9717 : { 8015 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9718 : { 8015 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9719 : { 8015 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9720 : { 8015 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9721 : { 8015 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9722 : { 8015 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9723 : { 8015 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9724 : { 8015 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9725 : { 8015 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9726 : { 8015 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9727 : { 8015 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9728 : { 8015 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9729 : { 8015 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9730 : { 8015 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9731 : { 8015 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9732 : { 8015 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9733 : { 8015 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9734 : { 8015 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9735 : { 8015 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9736 : { 8015 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9737 : { 8015 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9738 : { 8022 /* vaddps */, X86::VADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9739 : { 8022 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9740 : { 8022 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9741 : { 8022 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9742 : { 8022 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9743 : { 8022 /* vaddps */, X86::VADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9744 : { 8022 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9745 : { 8022 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9746 : { 8022 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9747 : { 8022 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9748 : { 8022 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9749 : { 8022 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9750 : { 8022 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9751 : { 8022 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9752 : { 8022 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9753 : { 8022 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9754 : { 8022 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9755 : { 8022 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9756 : { 8022 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9757 : { 8022 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9758 : { 8022 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9759 : { 8022 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9760 : { 8022 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9761 : { 8022 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9762 : { 8022 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9763 : { 8022 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9764 : { 8022 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9765 : { 8022 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9766 : { 8022 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9767 : { 8022 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9768 : { 8022 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9769 : { 8022 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9770 : { 8022 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9771 : { 8022 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9772 : { 8029 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9773 : { 8029 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9774 : { 8029 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
9775 : { 8029 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
9776 : { 8029 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9777 : { 8029 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9778 : { 8029 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9779 : { 8029 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9780 : { 8029 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9781 : { 8029 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9782 : { 8029 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9783 : { 8036 /* vaddss */, X86::VADDSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9784 : { 8036 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9785 : { 8036 /* vaddss */, X86::VADDSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
9786 : { 8036 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
9787 : { 8036 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9788 : { 8036 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9789 : { 8036 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9790 : { 8036 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9791 : { 8036 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9792 : { 8036 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9793 : { 8036 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9794 : { 8043 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9795 : { 8043 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9796 : { 8043 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9797 : { 8043 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9798 : { 8053 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9799 : { 8053 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9800 : { 8053 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9801 : { 8053 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9802 : { 8063 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9803 : { 8063 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9804 : { 8063 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9805 : { 8063 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9806 : { 8063 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9807 : { 8063 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9808 : { 8063 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9809 : { 8063 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9810 : { 8063 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9811 : { 8063 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9812 : { 8071 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9813 : { 8071 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9814 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9815 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9816 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9817 : { 8071 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9818 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9819 : { 8071 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9820 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9821 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9822 : { 8083 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9823 : { 8083 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9824 : { 8083 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9825 : { 8083 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9826 : { 8083 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9827 : { 8083 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9828 : { 8083 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9829 : { 8083 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9830 : { 8083 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9831 : { 8083 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9832 : { 8091 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9833 : { 8091 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9834 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9835 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9836 : { 8091 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9837 : { 8091 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9838 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9839 : { 8091 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9840 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9841 : { 8091 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9842 : { 8103 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
9843 : { 8103 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
9844 : { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
9845 : { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
9846 : { 8128 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9847 : { 8128 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9848 : { 8128 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9849 : { 8128 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9850 : { 8128 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9851 : { 8128 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9852 : { 8128 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9853 : { 8128 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9854 : { 8128 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9855 : { 8128 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9856 : { 8128 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9857 : { 8128 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9858 : { 8128 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9859 : { 8128 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9860 : { 8128 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9861 : { 8128 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9862 : { 8128 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9863 : { 8128 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9864 : { 8128 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9865 : { 8128 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9866 : { 8128 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9867 : { 8128 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9868 : { 8128 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9869 : { 8128 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9870 : { 8128 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9871 : { 8128 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9872 : { 8128 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9873 : { 8136 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9874 : { 8136 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9875 : { 8136 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
9876 : { 8136 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9877 : { 8136 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9878 : { 8136 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9879 : { 8136 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9880 : { 8136 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9881 : { 8136 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9882 : { 8136 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9883 : { 8136 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9884 : { 8136 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9885 : { 8136 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9886 : { 8136 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9887 : { 8136 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9888 : { 8136 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9889 : { 8136 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9890 : { 8136 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9891 : { 8136 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9892 : { 8136 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9893 : { 8136 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9894 : { 8136 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9895 : { 8136 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9896 : { 8136 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9897 : { 8136 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9898 : { 8136 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9899 : { 8136 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9900 : { 8144 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9901 : { 8144 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9902 : { 8144 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9903 : { 8144 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9904 : { 8144 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9905 : { 8144 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9906 : { 8144 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9907 : { 8144 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9908 : { 8144 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9909 : { 8144 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9910 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9911 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9912 : { 8144 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9913 : { 8144 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9914 : { 8144 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9915 : { 8144 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9916 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9917 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9918 : { 8144 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9919 : { 8144 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9920 : { 8144 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9921 : { 8144 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9922 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9923 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9924 : { 8144 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9925 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9926 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9927 : { 8144 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9928 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9929 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9930 : { 8144 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9931 : { 8152 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9932 : { 8152 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9933 : { 8152 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9934 : { 8152 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9935 : { 8152 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9936 : { 8152 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9937 : { 8152 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9938 : { 8152 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9939 : { 8152 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9940 : { 8152 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9941 : { 8152 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
9942 : { 8152 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
9943 : { 8152 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
9944 : { 8152 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9945 : { 8152 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9946 : { 8152 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9947 : { 8152 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9948 : { 8152 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9949 : { 8152 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9950 : { 8152 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9951 : { 8152 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9952 : { 8152 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9953 : { 8152 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9954 : { 8152 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9955 : { 8152 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9956 : { 8152 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9957 : { 8152 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9958 : { 8152 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9959 : { 8152 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9960 : { 8152 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9961 : { 8152 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9962 : { 8160 /* vandpd */, X86::VANDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9963 : { 8160 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9964 : { 8160 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9965 : { 8160 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9966 : { 8160 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9967 : { 8160 /* vandpd */, X86::VANDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9968 : { 8160 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
9969 : { 8160 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
9970 : { 8160 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
9971 : { 8160 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
9972 : { 8160 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
9973 : { 8160 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
9974 : { 8160 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
9975 : { 8160 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9976 : { 8160 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9977 : { 8160 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9978 : { 8160 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9979 : { 8160 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9980 : { 8160 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9981 : { 8160 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9982 : { 8160 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9983 : { 8160 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9984 : { 8160 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9985 : { 8160 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9986 : { 8160 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9987 : { 8160 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9988 : { 8160 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9989 : { 8160 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
9990 : { 8160 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9991 : { 8160 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9992 : { 8160 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
9993 : { 8167 /* vandps */, X86::VANDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
9994 : { 8167 /* vandps */, X86::VANDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
9995 : { 8167 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
9996 : { 8167 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
9997 : { 8167 /* vandps */, X86::VANDPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
9998 : { 8167 /* vandps */, X86::VANDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
9999 : { 8167 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10000 : { 8167 /* vandps */, X86::VANDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10001 : { 8167 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10002 : { 8167 /* vandps */, X86::VANDPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10003 : { 8167 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10004 : { 8167 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
10005 : { 8167 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
10006 : { 8167 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10007 : { 8167 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10008 : { 8167 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10009 : { 8167 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10010 : { 8167 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10011 : { 8167 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10012 : { 8167 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10013 : { 8167 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10014 : { 8167 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10015 : { 8167 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10016 : { 8167 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10017 : { 8167 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10018 : { 8167 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10019 : { 8167 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10020 : { 8167 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10021 : { 8167 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10022 : { 8167 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10023 : { 8167 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10024 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10025 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10026 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10027 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10028 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10029 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10030 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
10031 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
10032 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
10033 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10034 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10035 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10036 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10037 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10038 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10039 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10040 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10041 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10042 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10043 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10044 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10045 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10046 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10047 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10048 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10049 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10050 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10051 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10052 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
10053 : { 8184 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
10054 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
10055 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
10056 : { 8184 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
10057 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
10058 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
10059 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
10060 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10061 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10062 : { 8184 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10063 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10064 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10065 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10066 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10067 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10068 : { 8184 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10069 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10070 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10071 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10072 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10073 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10074 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10075 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10076 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10077 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10078 : { 8194 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10079 : { 8194 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10080 : { 8194 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10081 : { 8194 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10082 : { 8203 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10083 : { 8203 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10084 : { 8203 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10085 : { 8203 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10086 : { 8212 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10087 : { 8212 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10088 : { 8212 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10089 : { 8212 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10090 : { 8222 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10091 : { 8222 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10092 : { 8222 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10093 : { 8222 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10094 : { 8232 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10095 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10096 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
10097 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
10098 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
10099 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10100 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10101 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10102 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10103 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10104 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10105 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10106 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10107 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10108 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
10109 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10110 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10111 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10112 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10113 : { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10114 : { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10115 : { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10116 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10117 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
10118 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10119 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10120 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10121 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10122 : { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10123 : { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10124 : { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10125 : { 8327 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10126 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10127 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10128 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
10129 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10130 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
10131 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
10132 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10133 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10134 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10135 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10136 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10137 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10138 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10139 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10140 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10141 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10142 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10143 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10144 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10145 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
10146 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10147 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10148 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10149 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10150 : { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10151 : { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10152 : { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10153 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10154 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
10155 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10156 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10157 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10158 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10159 : { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10160 : { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10161 : { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10162 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10163 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10164 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
10165 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
10166 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
10167 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
10168 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10169 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10170 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10171 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10172 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10173 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10174 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10175 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10176 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10177 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10178 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10179 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10180 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
10181 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
10182 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
10183 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
10184 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
10185 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR512 }, },
10186 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10187 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10188 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10189 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10190 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10191 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10192 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10193 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10194 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10195 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10196 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10197 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10198 : { 8448 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10199 : { 8448 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10200 : { 8448 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10201 : { 8448 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10202 : { 8448 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10203 : { 8448 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10204 : { 8448 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10205 : { 8448 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10206 : { 8448 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10207 : { 8448 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10208 : { 8448 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10209 : { 8448 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10210 : { 8448 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10211 : { 8448 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10212 : { 8448 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10213 : { 8448 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10214 : { 8448 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10215 : { 8448 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10216 : { 8448 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10217 : { 8448 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10218 : { 8448 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10219 : { 8448 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10220 : { 8448 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10221 : { 8448 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_4__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
10222 : { 8448 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10223 : { 8448 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10224 : { 8448 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10225 : { 8448 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_4__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
10226 : { 8448 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10227 : { 8448 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
10228 : { 8448 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
10229 : { 8448 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
10230 : { 8448 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10231 : { 8448 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
10232 : { 8448 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
10233 : { 8448 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
10234 : { 8448 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10235 : { 8448 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_5__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10236 : { 8448 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10237 : { 8448 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10238 : { 8448 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10239 : { 8448 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10240 : { 8448 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10241 : { 8448 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10242 : { 8448 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10243 : { 8448 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10244 : { 8448 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10245 : { 8448 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10246 : { 8448 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10247 : { 8448 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10248 : { 8448 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10249 : { 8448 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10250 : { 8448 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10251 : { 8448 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10252 : { 8448 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10253 : { 8448 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10254 : { 8448 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10255 : { 8448 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10256 : { 8448 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10257 : { 8448 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10258 : { 8448 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10259 : { 8448 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10260 : { 8448 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10261 : { 8448 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_5__Reg1_7__Reg1_4__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10262 : { 8453 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10263 : { 8453 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10264 : { 8453 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10265 : { 8453 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10266 : { 8453 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10267 : { 8453 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10268 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10269 : { 8453 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10270 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10271 : { 8453 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10272 : { 8453 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10273 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
10274 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
10275 : { 8453 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
10276 : { 8453 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10277 : { 8453 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10278 : { 8453 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10279 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10280 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10281 : { 8453 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10282 : { 8453 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10283 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10284 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10285 : { 8453 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10286 : { 8460 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10287 : { 8460 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
10288 : { 8460 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10289 : { 8460 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
10290 : { 8460 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10291 : { 8460 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
10292 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
10293 : { 8460 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
10294 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
10295 : { 8460 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
10296 : { 8460 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1 }, },
10297 : { 8460 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
10298 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
10299 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
10300 : { 8460 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10301 : { 8460 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10302 : { 8460 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10303 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10304 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10305 : { 8460 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10306 : { 8460 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10307 : { 8460 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10308 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10309 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10310 : { 8467 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10311 : { 8467 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10312 : { 8467 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10313 : { 8467 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1 }, },
10314 : { 8467 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10315 : { 8467 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10316 : { 8467 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10317 : { 8467 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10318 : { 8474 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
10319 : { 8474 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10320 : { 8474 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10321 : { 8474 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1 }, },
10322 : { 8474 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
10323 : { 8474 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10324 : { 8474 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10325 : { 8474 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10326 : { 8481 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10327 : { 8481 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10328 : { 8481 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10329 : { 8481 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10330 : { 8481 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
10331 : { 8489 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10332 : { 8489 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10333 : { 8489 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
10334 : { 8489 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
10335 : { 8489 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
10336 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10337 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
10338 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10339 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
10340 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10341 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
10342 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10343 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10344 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10345 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10346 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10347 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10348 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10349 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10350 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10351 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10352 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
10353 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10354 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
10355 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10356 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
10357 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10358 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10359 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10360 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10361 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10362 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10363 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10364 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10365 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10366 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10367 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10368 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10369 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10370 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10371 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10372 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10373 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10374 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10375 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10376 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10377 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10378 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10379 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10380 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10381 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10382 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10383 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10384 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10385 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10386 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10387 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10388 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10389 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10390 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10391 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10392 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10393 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10394 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10395 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10396 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10397 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10398 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10399 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10400 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10401 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10402 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10403 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10404 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10405 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10406 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10407 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10408 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10409 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10410 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10411 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10412 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10413 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10414 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10415 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10416 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10417 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10418 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10419 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10420 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10421 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10422 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10423 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10424 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10425 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10426 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10427 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10428 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10429 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10430 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10431 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10432 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10433 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10434 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10435 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10436 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10437 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10438 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10439 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10440 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10441 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10442 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10443 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10444 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10445 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10446 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10447 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10448 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10449 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10450 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10451 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10452 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10453 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10454 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10455 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10456 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10457 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10458 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10459 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10460 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10461 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10462 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10463 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10464 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10465 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10466 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10467 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10468 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10469 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10470 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10471 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10472 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10473 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10474 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10475 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10476 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10477 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10478 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10479 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10480 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10481 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10482 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10483 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10484 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10485 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10486 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10487 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10488 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10489 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10490 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10491 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10492 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10493 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10494 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10495 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10496 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10497 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10498 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10499 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10500 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10501 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10502 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10503 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
10504 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10505 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10506 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10507 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10508 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10509 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10510 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10511 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10512 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10513 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10514 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10515 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10516 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10517 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10518 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10519 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10520 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10521 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10522 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10523 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10524 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10525 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10526 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10527 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10528 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10529 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10530 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10531 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10532 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10533 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10534 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10535 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10536 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10537 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10538 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10539 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10540 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10541 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10542 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10543 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10544 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10545 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10546 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10547 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10548 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10549 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10550 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10551 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10552 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10553 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10554 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10555 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10556 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10557 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10558 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10559 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10560 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10561 : { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10562 : { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10563 : { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10564 : { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10565 : { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10566 : { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10567 : { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10568 : { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10569 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10570 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10571 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10572 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10573 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10574 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10575 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10576 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10577 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10578 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10579 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10580 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10581 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10582 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10583 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10584 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10585 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10586 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10587 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10588 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10589 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10590 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10591 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10592 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10593 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10594 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10595 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10596 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10597 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10598 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10599 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10600 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10601 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10602 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10603 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10604 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10605 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10606 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10607 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10608 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10609 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10610 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10611 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10612 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10613 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10614 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10615 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10616 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10617 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10618 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10619 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10620 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10621 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10622 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10623 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10624 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10625 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
10626 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10627 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10628 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10629 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10630 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10631 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
10632 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10633 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10634 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10635 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10636 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10637 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10638 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10639 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10640 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10641 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10642 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10643 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10644 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10645 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10646 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10647 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10648 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10649 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10650 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10651 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10652 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10653 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10654 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10655 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10656 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10657 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10658 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10659 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
10660 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10661 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10662 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10663 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
10664 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10665 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10666 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
10667 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10668 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
10669 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10670 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10671 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10672 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10673 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10674 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10675 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10676 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10677 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10678 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10679 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10680 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10681 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10682 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10683 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10684 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10685 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10686 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10687 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10688 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10689 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10690 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10691 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10692 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
10693 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
10694 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
10695 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
10696 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
10697 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
10698 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
10699 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
10700 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
10701 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
10702 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10703 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10704 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10705 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10706 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10707 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10708 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10709 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10710 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10711 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10712 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10713 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10714 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10715 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10716 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10717 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10718 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10719 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10720 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
10721 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10722 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10723 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10724 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10725 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10726 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10727 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10728 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10729 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10730 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10731 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10732 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10733 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10734 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10735 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10736 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10737 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10738 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10739 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10740 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10741 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10742 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10743 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10744 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10745 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10746 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10747 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10748 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10749 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10750 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10751 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
10752 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
10753 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
10754 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10755 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10756 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10757 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10758 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10759 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10760 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10761 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10762 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10763 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10764 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10765 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10766 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10767 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10768 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10769 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10770 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10771 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10772 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10773 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10774 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10775 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
10776 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
10777 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
10778 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
10779 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
10780 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512 }, },
10781 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
10782 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
10783 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
10784 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10785 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10786 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10787 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10788 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10789 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10790 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10791 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10792 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10793 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10794 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10795 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10796 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10797 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10798 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10799 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10800 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10801 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10802 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10803 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10804 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10805 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
10806 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
10807 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10808 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
10809 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
10810 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
10811 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10812 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
10813 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
10814 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10815 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10816 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10817 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10818 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10819 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10820 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10821 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10822 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10823 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10824 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10825 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10826 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10827 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10828 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10829 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10830 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10831 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10832 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10833 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10834 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10835 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10836 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10837 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10838 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
10839 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10840 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10841 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10842 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10843 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10844 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10845 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10846 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10847 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10848 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10849 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10850 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10851 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10852 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10853 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10854 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10855 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10856 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10857 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10858 : { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10859 : { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10860 : { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10861 : { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10862 : { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10863 : { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
10864 : { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10865 : { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10866 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10867 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10868 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10869 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10870 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10871 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10872 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10873 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10874 : { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10875 : { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10876 : { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10877 : { 8785 /* vcvtsd2sil */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10878 : { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10879 : { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10880 : { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10881 : { 8796 /* vcvtsd2siq */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10882 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10883 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10884 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10885 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10886 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10887 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10888 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10889 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10890 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10891 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10892 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10893 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10894 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10895 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10896 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10897 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10898 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10899 : { 8828 /* vcvtsd2usil */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10900 : { 8828 /* vcvtsd2usil */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
10901 : { 8828 /* vcvtsd2usil */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10902 : { 8840 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10903 : { 8840 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
10904 : { 8840 /* vcvtsd2usiq */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10905 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10906 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10907 : { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
10908 : { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
10909 : { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10910 : { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10911 : { 8862 /* vcvtsi2sdl */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10912 : { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
10913 : { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
10914 : { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10915 : { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10916 : { 8873 /* vcvtsi2sdq */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10917 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10918 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10919 : { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32, MCK_FR32 }, },
10920 : { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
10921 : { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10922 : { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10923 : { 8894 /* vcvtsi2ssl */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10924 : { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32, MCK_FR32 }, },
10925 : { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
10926 : { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
10927 : { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
10928 : { 8905 /* vcvtsi2ssq */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
10929 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
10930 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10931 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
10932 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
10933 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
10934 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10935 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10936 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10937 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10938 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10939 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10940 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10941 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10942 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10943 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10944 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10945 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10946 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10947 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10948 : { 8936 /* vcvtss2sil */, X86::VCVTSS2SIrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
10949 : { 8936 /* vcvtss2sil */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10950 : { 8936 /* vcvtss2sil */, X86::VCVTSS2SIrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10951 : { 8936 /* vcvtss2sil */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10952 : { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
10953 : { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10954 : { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10955 : { 8947 /* vcvtss2siq */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10956 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10957 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10958 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10959 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10960 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10961 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10962 : { 8969 /* vcvtss2usil */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
10963 : { 8969 /* vcvtss2usil */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
10964 : { 8969 /* vcvtss2usil */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR32 }, },
10965 : { 8981 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
10966 : { 8981 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
10967 : { 8981 /* vcvtss2usiq */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_GR64 }, },
10968 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10969 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
10970 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10971 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
10972 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
10973 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
10974 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
10975 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
10976 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
10977 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
10978 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10979 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10980 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10981 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10982 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10983 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10984 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10985 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10986 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10987 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10988 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10989 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10990 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10991 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10992 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10993 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
10994 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
10995 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
10996 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
10997 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
10998 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
10999 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11000 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_FR32 }, },
11001 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11002 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32 }, },
11003 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
11004 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11005 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11006 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11007 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11008 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11009 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11010 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11011 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11012 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11013 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11014 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11015 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11016 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11017 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11018 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11019 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11020 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11021 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11022 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11023 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11024 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11025 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11026 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11027 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11028 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11029 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11030 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11031 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11032 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11033 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11034 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11035 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11036 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11037 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11038 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
11039 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
11040 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X }, },
11041 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11042 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11043 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11044 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11045 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11046 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11047 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11048 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11049 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11050 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11051 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11052 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11053 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11054 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11055 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11056 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11057 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11058 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11059 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11060 : { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11061 : { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11062 : { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11063 : { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11064 : { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11065 : { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
11066 : { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11067 : { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11068 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11069 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11070 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11071 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11072 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11073 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11074 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11075 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11076 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11077 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11078 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11079 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11080 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11081 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11082 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11083 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11084 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11085 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11086 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11087 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11088 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11089 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11090 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11091 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11092 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11093 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11094 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11095 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11096 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11097 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11098 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
11099 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
11100 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11101 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11102 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11103 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
11104 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11105 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
11106 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11107 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11108 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11109 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11110 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11111 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11112 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11113 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11114 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11115 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11116 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11117 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11118 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11119 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11120 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11121 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11122 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11123 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11124 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11125 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11126 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11127 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11128 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11129 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11130 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11131 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11132 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11133 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
11134 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
11135 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
11136 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
11137 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
11138 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11139 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11140 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11141 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11142 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11143 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11144 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11145 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11146 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11147 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11148 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11149 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11150 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11151 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11152 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11153 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11154 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11155 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11156 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11157 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11158 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11159 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11160 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11161 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11162 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11163 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11164 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11165 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11166 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11167 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11168 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11169 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11170 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11171 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11172 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11173 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11174 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11175 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11176 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11177 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11178 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11179 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11180 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11181 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11182 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11183 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11184 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11185 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11186 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11187 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11188 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11189 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11190 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11191 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11192 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11193 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
11194 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
11195 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
11196 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
11197 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
11198 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512 }, },
11199 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11200 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11201 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11202 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11203 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11204 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11205 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11206 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11207 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11208 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11209 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11210 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11211 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11212 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11213 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11214 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11215 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11216 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11217 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11218 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11219 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11220 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11221 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11222 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11223 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11224 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11225 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11226 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
11227 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
11228 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11229 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11230 : { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11231 : { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11232 : { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
11233 : { 9146 /* vcvttsd2sil */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11234 : { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11235 : { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11236 : { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
11237 : { 9158 /* vcvttsd2siq */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11238 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11239 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11240 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
11241 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
11242 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11243 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11244 : { 9182 /* vcvttsd2usil */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11245 : { 9182 /* vcvttsd2usil */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR32 }, },
11246 : { 9182 /* vcvttsd2usil */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11247 : { 9195 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11248 : { 9195 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
11249 : { 9195 /* vcvttsd2usiq */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11250 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11251 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11252 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11253 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11254 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
11255 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
11256 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11257 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11258 : { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
11259 : { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11260 : { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
11261 : { 9219 /* vcvttss2sil */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11262 : { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
11263 : { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11264 : { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
11265 : { 9231 /* vcvttss2siq */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11266 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11267 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11268 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
11269 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
11270 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11271 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11272 : { 9255 /* vcvttss2usil */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
11273 : { 9255 /* vcvttss2usil */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
11274 : { 9255 /* vcvttss2usil */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR32 }, },
11275 : { 9268 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
11276 : { 9268 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_GR64 }, },
11277 : { 9268 /* vcvttss2usiq */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_GR64 }, },
11278 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11279 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
11280 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
11281 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
11282 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
11283 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
11284 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X }, },
11285 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X }, },
11286 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512 }, },
11287 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11288 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11289 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11290 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11291 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11292 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11293 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11294 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11295 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11296 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11297 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11298 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11299 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11300 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11301 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11302 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11303 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11304 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11305 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11306 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11307 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11308 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11309 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11310 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11311 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11312 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11313 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
11314 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
11315 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11316 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11317 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11318 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11319 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11320 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11321 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11322 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11323 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11324 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11325 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11326 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11327 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11328 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11329 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11330 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11331 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11332 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11333 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11334 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11335 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11336 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11337 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11338 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11339 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11340 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11341 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
11342 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11343 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
11344 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11345 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11346 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11347 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11348 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11349 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11350 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11351 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11352 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11353 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11354 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11355 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11356 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11357 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11358 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11359 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11360 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11361 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11362 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11363 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11364 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11365 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11366 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11367 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
11368 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X }, },
11369 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X }, },
11370 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
11371 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X }, },
11372 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X }, },
11373 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11374 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11375 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11376 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11377 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11378 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11379 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11380 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11381 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11382 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11383 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11384 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11385 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11386 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11387 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11388 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11389 : { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11390 : { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11391 : { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11392 : { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11393 : { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
11394 : { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X }, },
11395 : { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11396 : { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11397 : { 9349 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11398 : { 9360 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11399 : { 9360 /* vcvtusi2sdl */, X86::VCVTUSI2SDZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11400 : { 9372 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11401 : { 9372 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11402 : { 9372 /* vcvtusi2sdq */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11403 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11404 : { 9395 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK_FR32X }, },
11405 : { 9395 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11406 : { 9395 /* vcvtusi2ssl */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR32, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11407 : { 9407 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK_FR32X }, },
11408 : { 9407 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11409 : { 9407 /* vcvtusi2ssq */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_0__AVX512RC1_1, 0, { MCK_GR64, MCK_AVX512RC, MCK_FR32X, MCK_FR32X }, },
11410 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11411 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11412 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11413 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11414 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11415 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11416 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11417 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11418 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11419 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11420 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11421 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11422 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11423 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11424 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11425 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11426 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11427 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11428 : { 9429 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11429 : { 9429 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11430 : { 9429 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11431 : { 9429 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11432 : { 9429 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11433 : { 9429 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11434 : { 9429 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11435 : { 9429 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11436 : { 9429 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11437 : { 9429 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11438 : { 9429 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11439 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11440 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11441 : { 9429 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11442 : { 9429 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11443 : { 9429 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11444 : { 9429 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11445 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11446 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11447 : { 9429 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11448 : { 9429 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11449 : { 9429 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11450 : { 9429 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11451 : { 9429 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11452 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11453 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11454 : { 9429 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11455 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11456 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11457 : { 9429 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11458 : { 9429 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11459 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11460 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11461 : { 9429 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11462 : { 9436 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11463 : { 9436 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11464 : { 9436 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11465 : { 9436 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11466 : { 9436 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11467 : { 9436 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11468 : { 9436 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11469 : { 9436 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11470 : { 9436 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11471 : { 9436 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11472 : { 9436 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11473 : { 9436 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11474 : { 9436 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11475 : { 9436 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11476 : { 9436 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11477 : { 9436 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11478 : { 9436 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11479 : { 9436 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11480 : { 9436 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11481 : { 9436 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11482 : { 9436 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11483 : { 9436 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11484 : { 9436 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11485 : { 9436 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11486 : { 9436 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11487 : { 9436 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11488 : { 9436 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11489 : { 9436 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11490 : { 9436 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11491 : { 9436 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11492 : { 9436 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11493 : { 9436 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11494 : { 9436 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11495 : { 9436 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11496 : { 9443 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11497 : { 9443 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11498 : { 9443 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11499 : { 9443 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11500 : { 9443 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11501 : { 9443 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11502 : { 9443 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11503 : { 9443 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11504 : { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11505 : { 9443 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11506 : { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11507 : { 9450 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11508 : { 9450 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11509 : { 9450 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11510 : { 9450 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11511 : { 9450 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11512 : { 9450 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11513 : { 9450 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11514 : { 9450 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11515 : { 9450 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11516 : { 9450 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11517 : { 9450 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11518 : { 9457 /* vdppd */, X86::VDPPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11519 : { 9457 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11520 : { 9463 /* vdpps */, X86::VDPPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
11521 : { 9463 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
11522 : { 9463 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11523 : { 9463 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11524 : { 9469 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
11525 : { 9469 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
11526 : { 9474 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
11527 : { 9474 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
11528 : { 9479 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11529 : { 9479 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11530 : { 9479 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11531 : { 9479 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
11532 : { 9479 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11533 : { 9479 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11534 : { 9479 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11535 : { 9479 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11536 : { 9479 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11537 : { 9479 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11538 : { 9479 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11539 : { 9479 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11540 : { 9487 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11541 : { 9487 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11542 : { 9487 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
11543 : { 9487 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
11544 : { 9487 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11545 : { 9487 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11546 : { 9487 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11547 : { 9487 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11548 : { 9487 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11549 : { 9487 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11550 : { 9487 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11551 : { 9487 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11552 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11553 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11554 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11555 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11556 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11557 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11558 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11559 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11560 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11561 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11562 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11563 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11564 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11565 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11566 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11567 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11568 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11569 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11570 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
11571 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
11572 : { 9505 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
11573 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
11574 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
11575 : { 9505 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
11576 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11577 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11578 : { 9505 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11579 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11580 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11581 : { 9505 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11582 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11583 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11584 : { 9505 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11585 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11586 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11587 : { 9505 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11588 : { 9515 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11589 : { 9515 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11590 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11591 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11592 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11593 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11594 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11595 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11596 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11597 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11598 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11599 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11600 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11601 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11602 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11603 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11604 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11605 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11606 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11607 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11608 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11609 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11610 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11611 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11612 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11613 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11614 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11615 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11616 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11617 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11618 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11619 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11620 : { 9584 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_FR32 }, },
11621 : { 9584 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem128 }, },
11622 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11623 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11624 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11625 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11626 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11627 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11628 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11629 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11630 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11631 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11632 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11633 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11634 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11635 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11636 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11637 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X }, },
11638 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128 }, },
11639 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X }, },
11640 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128 }, },
11641 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11642 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11643 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11644 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11645 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11646 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11647 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X }, },
11648 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256 }, },
11649 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11650 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11651 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11652 : { 9653 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
11653 : { 9653 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
11654 : { 9653 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
11655 : { 9653 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
11656 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11657 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11658 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11659 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11660 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11661 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11662 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11663 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11664 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11665 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11666 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11667 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11668 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11669 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11670 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11671 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11672 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11673 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11674 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11675 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11676 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11677 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11678 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11679 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11680 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11681 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11682 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11683 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11684 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11685 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11686 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11687 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11688 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11689 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11690 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11691 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11692 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11693 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11694 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11695 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11696 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11697 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11698 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11699 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11700 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11701 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11702 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11703 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11704 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11705 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11706 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11707 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11708 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11709 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11710 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11711 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11712 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11713 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11714 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11715 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11716 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11717 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11718 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11719 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11720 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11721 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11722 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11723 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11724 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11725 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11726 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11727 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_4__Tie0_1_1__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11728 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11729 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11730 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11731 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11732 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11733 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11734 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11735 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11736 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11737 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11738 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11739 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11740 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11741 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11742 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11743 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11744 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11745 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11746 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11747 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11748 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11749 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11750 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11751 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11752 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11753 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11754 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11755 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11756 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11757 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11758 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11759 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11760 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11761 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11762 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11763 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11764 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11765 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11766 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11767 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11768 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11769 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11770 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11771 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11772 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11773 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11774 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11775 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11776 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11777 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11778 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11779 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11780 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11781 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11782 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11783 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11784 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11785 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11786 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11787 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11788 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11789 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11790 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11791 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11792 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11793 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11794 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11795 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11796 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11797 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11798 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11799 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11800 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11801 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11802 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11803 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11804 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11805 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11806 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11807 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11808 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11809 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11810 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11811 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11812 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11813 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11814 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11815 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11816 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11817 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11818 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11819 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11820 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11821 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11822 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11823 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11824 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11825 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11826 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11827 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11828 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11829 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11830 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11831 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11832 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11833 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11834 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11835 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11836 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11837 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11838 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11839 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11840 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11841 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11842 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11843 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11844 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11845 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11846 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11847 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11848 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11849 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11850 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11851 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11852 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11853 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11854 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11855 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11856 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11857 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11858 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11859 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11860 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11861 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11862 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11863 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11864 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11865 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11866 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11867 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11868 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11869 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11870 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11871 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11872 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11873 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11874 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11875 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11876 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11877 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11878 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11879 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11880 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11881 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11882 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11883 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11884 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11885 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11886 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11887 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11888 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11889 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11890 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11891 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11892 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11893 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11894 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11895 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11896 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11897 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11898 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11899 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11900 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11901 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11902 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11903 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11904 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11905 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11906 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11907 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11908 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11909 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11910 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11911 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11912 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11913 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11914 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11915 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11916 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11917 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11918 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11919 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11920 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11921 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11922 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11923 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11924 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11925 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
11926 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
11927 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
11928 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11929 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11930 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11931 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11932 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11933 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11934 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11935 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11936 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11937 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11938 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11939 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11940 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11941 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11942 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11943 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11944 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11945 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11946 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11947 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11948 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11949 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
11950 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11951 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
11952 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
11953 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
11954 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
11955 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
11956 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
11957 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
11958 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
11959 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
11960 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
11961 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
11962 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11963 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11964 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11965 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11966 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11967 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11968 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11969 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11970 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11971 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11972 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11973 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11974 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11975 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11976 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11977 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11978 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11979 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11980 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11981 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11982 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11983 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11984 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
11985 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
11986 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11987 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11988 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11989 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11990 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11991 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11992 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
11993 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
11994 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11995 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
11996 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
11997 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
11998 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
11999 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12000 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12001 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12002 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12003 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12004 : { 9856 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12005 : { 9856 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12006 : { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12007 : { 9856 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12008 : { 9856 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12009 : { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12010 : { 9865 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12011 : { 9865 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12012 : { 9865 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12013 : { 9865 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12014 : { 9865 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12015 : { 9865 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12016 : { 9874 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12017 : { 9874 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12018 : { 9874 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12019 : { 9883 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12020 : { 9883 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12021 : { 9883 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12022 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12023 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12024 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12025 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12026 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12027 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12028 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12029 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12030 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12031 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12032 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12033 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12034 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12035 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12036 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12037 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12038 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12039 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12040 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12041 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12042 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12043 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12044 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12045 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12046 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12047 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12048 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12049 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12050 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12051 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12052 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12053 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12054 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12055 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12056 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12057 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12058 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12059 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12060 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12061 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12062 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12063 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12064 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12065 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12066 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12067 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12068 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12069 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12070 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12071 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12072 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12073 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12074 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12075 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12076 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12077 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12078 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12079 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12080 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12081 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12082 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12083 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12084 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12085 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12086 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12087 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12088 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12089 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12090 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12091 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12092 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12093 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12094 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12095 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12096 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12097 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12098 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12099 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12100 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12101 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12102 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12103 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12104 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12105 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12106 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12107 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12108 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12109 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12110 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12111 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12112 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12113 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12114 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12115 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12116 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12117 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12118 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12119 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12120 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12121 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12122 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12123 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12124 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12125 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12126 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12127 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12128 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12129 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12130 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12131 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12132 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12133 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12134 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12135 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12136 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12137 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12138 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12139 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12140 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12141 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12142 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12143 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12144 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12145 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12146 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12147 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12148 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12149 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12150 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12151 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12152 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12153 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12154 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12155 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12156 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12157 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12158 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12159 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12160 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12161 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12162 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12163 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12164 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12165 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12166 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12167 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12168 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12169 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12170 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12171 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12172 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12173 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12174 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12175 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12176 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12177 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12178 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12179 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12180 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12181 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12182 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12183 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12184 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12185 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12186 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12187 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12188 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12189 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12190 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12191 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12192 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12193 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12194 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12195 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12196 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12197 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12198 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12199 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12200 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12201 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12202 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12203 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12204 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12205 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12206 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12207 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12208 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12209 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12210 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12211 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12212 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12213 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12214 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12215 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12216 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12217 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12218 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12219 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12220 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12221 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12222 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12223 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12224 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12225 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12226 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12227 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12228 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12229 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12230 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12231 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12232 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12233 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12234 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12235 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12236 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12237 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12238 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12239 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12240 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12241 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12242 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12243 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12244 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12245 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12246 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12247 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12248 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12249 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12250 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12251 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12252 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12253 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12254 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12255 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12256 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12257 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12258 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12259 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12260 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12261 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12262 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12263 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12264 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12265 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12266 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12267 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12268 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12269 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12270 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12271 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12272 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12273 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12274 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12275 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12276 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12277 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12278 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12279 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12280 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12281 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12282 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12283 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12284 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12285 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12286 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12287 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12288 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12289 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12290 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12291 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12292 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12293 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12294 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12295 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12296 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12297 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12298 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12299 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12300 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12301 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12302 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12303 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12304 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12305 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12306 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12307 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12308 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12309 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12310 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12311 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12312 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12313 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12314 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12315 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12316 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12317 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12318 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12319 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12320 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12321 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12322 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12323 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12324 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12325 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12326 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12327 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12328 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12329 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12330 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12331 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12332 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12333 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12334 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12335 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12336 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12337 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12338 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12339 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12340 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12341 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12342 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12343 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12344 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12345 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12346 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12347 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12348 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12349 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12350 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12351 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12352 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12353 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12354 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12355 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12356 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12357 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12358 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12359 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12360 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12361 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12362 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12363 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12364 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12365 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12366 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12367 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12368 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12369 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12370 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12371 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12372 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12373 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12374 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12375 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12376 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12377 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12378 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12379 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12380 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12381 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12382 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12383 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12384 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12385 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12386 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12387 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12388 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12389 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12390 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12391 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12392 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12393 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12394 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12395 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12396 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12397 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12398 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12399 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12400 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12401 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12402 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12403 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12404 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12405 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12406 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12407 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12408 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12409 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12410 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12411 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12412 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12413 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12414 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12415 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12416 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12417 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12418 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12419 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12420 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12421 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12422 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12423 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12424 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12425 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12426 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12427 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12428 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12429 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12430 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12431 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12432 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12433 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12434 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12435 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12436 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12437 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12438 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12439 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12440 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12441 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12442 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12443 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12444 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12445 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12446 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12447 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12448 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12449 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12450 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12451 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12452 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12453 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12454 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12455 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12456 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12457 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12458 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12459 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12460 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12461 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12462 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12463 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12464 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12465 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12466 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12467 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12468 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12469 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12470 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12471 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12472 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12473 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12474 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12475 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12476 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12477 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12478 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12479 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12480 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12481 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12482 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12483 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12484 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12485 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12486 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12487 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12488 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12489 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12490 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12491 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12492 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12493 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12494 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12495 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12496 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12497 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12498 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12499 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12500 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12501 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12502 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12503 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12504 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12505 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12506 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12507 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12508 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12509 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12510 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12511 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12512 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12513 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12514 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12515 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12516 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12517 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12518 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12519 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12520 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12521 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12522 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12523 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12524 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12525 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12526 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12527 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12528 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12529 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12530 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12531 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12532 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12533 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12534 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12535 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12536 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12537 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12538 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12539 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12540 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12541 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12542 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12543 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12544 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12545 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12546 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12547 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12548 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12549 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12550 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12551 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12552 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12553 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12554 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12555 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12556 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12557 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12558 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12559 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12560 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12561 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12562 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12563 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12564 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12565 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12566 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12567 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12568 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12569 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12570 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12571 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12572 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12573 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12574 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12575 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12576 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12577 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12578 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12579 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12580 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12581 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12582 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12583 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12584 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12585 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12586 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12587 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12588 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12589 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12590 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12591 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12592 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12593 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12594 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12595 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12596 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12597 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12598 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12599 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12600 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12601 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12602 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12603 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12604 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12605 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12606 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12607 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12608 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12609 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12610 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12611 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12612 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12613 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12614 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12615 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12616 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12617 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12618 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12619 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12620 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12621 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12622 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12623 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12624 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12625 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12626 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12627 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12628 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12629 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12630 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12631 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12632 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12633 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12634 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12635 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12636 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12637 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12638 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12639 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12640 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12641 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12642 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12643 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12644 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12645 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12646 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12647 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12648 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12649 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12650 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12651 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12652 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12653 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12654 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12655 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12656 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12657 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12658 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12659 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12660 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12661 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12662 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12663 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12664 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12665 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12666 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12667 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12668 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12669 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12670 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12671 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12672 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12673 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12674 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12675 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12676 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12677 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12678 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12679 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12680 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12681 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12682 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12683 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12684 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12685 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12686 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12687 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12688 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12689 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12690 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12691 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12692 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12693 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12694 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12695 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12696 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12697 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12698 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12699 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12700 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12701 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12702 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12703 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12704 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12705 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12706 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12707 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12708 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12709 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12710 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12711 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12712 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12713 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12714 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12715 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12716 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12717 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12718 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12719 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12720 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12721 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12722 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12723 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12724 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12725 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12726 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12727 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12728 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12729 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12730 : { 10273 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12731 : { 10273 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12732 : { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12733 : { 10273 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12734 : { 10273 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12735 : { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
12736 : { 10282 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12737 : { 10282 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12738 : { 10282 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12739 : { 10291 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12740 : { 10291 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12741 : { 10291 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
12742 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12743 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12744 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12745 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12746 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12747 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12748 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12749 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12750 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12751 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12752 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12753 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12754 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12755 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12756 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12757 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12758 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12759 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12760 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12761 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12762 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12763 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12764 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12765 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12766 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12767 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12768 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12769 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12770 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12771 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12772 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12773 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12774 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12775 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12776 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12777 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12778 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12779 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12780 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12781 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12782 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12783 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12784 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12785 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12786 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12787 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12788 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12789 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12790 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12791 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12792 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12793 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12794 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12795 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12796 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12797 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12798 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12799 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12800 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12801 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12802 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12803 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12804 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12805 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12806 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12807 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12808 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12809 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12810 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12811 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12812 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12813 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12814 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12815 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12816 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12817 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12818 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12819 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12820 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12821 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12822 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12823 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12824 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12825 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12826 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12827 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12828 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12829 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12830 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12831 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12832 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12833 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12834 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12835 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12836 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12837 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12838 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12839 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12840 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12841 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12842 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12843 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12844 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12845 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12846 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12847 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12848 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12849 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12850 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12851 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12852 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12853 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12854 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12855 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12856 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12857 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12858 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12859 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12860 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12861 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12862 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12863 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12864 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12865 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12866 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12867 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12868 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12869 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12870 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12871 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12872 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12873 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12874 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12875 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12876 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12877 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12878 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12879 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12880 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12881 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12882 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12883 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12884 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12885 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12886 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12887 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12888 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12889 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12890 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12891 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12892 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12893 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12894 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12895 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12896 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12897 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12898 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12899 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12900 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12901 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12902 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12903 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12904 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12905 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12906 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12907 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12908 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12909 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12910 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12911 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12912 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12913 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
12914 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
12915 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12916 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12917 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12918 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12919 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12920 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12921 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12922 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12923 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12924 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12925 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12926 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12927 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12928 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12929 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12930 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12931 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12932 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12933 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
12934 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
12935 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
12936 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12937 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12938 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12939 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12940 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12941 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12942 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12943 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12944 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12945 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12946 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12947 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12948 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12949 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12950 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12951 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12952 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12953 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12954 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12955 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12956 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12957 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
12958 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12959 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
12960 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
12961 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
12962 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
12963 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
12964 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
12965 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
12966 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
12967 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
12968 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
12969 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
12970 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12971 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12972 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12973 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12974 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12975 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12976 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12977 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12978 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12979 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12980 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12981 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12982 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12983 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12984 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12985 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12986 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12987 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12988 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12989 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12990 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
12991 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12992 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
12993 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
12994 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
12995 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12996 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12997 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
12998 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
12999 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13000 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13001 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13002 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13003 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13004 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13005 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13006 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13007 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13008 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13009 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13010 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13011 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13012 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13013 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13014 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13015 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13016 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13017 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13018 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13019 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13020 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13021 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13022 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13023 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13024 : { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13025 : { 10476 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13026 : { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13027 : { 10486 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13028 : { 10486 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13029 : { 10486 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13030 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13031 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13032 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13033 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13034 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13035 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13036 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13037 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13038 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13039 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13040 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13041 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13042 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13043 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13044 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13045 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13046 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13047 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13048 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13049 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13050 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13051 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13052 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13053 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13054 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13055 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13056 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13057 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13058 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13059 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13060 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13061 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13062 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13063 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13064 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13065 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13066 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13067 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13068 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13069 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13070 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13071 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13072 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13073 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13074 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13075 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13076 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13077 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13078 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13079 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13080 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13081 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13082 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13083 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13084 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13085 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13086 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13087 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13088 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13089 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13090 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13091 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13092 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13093 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13094 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13095 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13096 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13097 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13098 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13099 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13100 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13101 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13102 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13103 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13104 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13105 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13106 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13107 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13108 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13109 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13110 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13111 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13112 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13113 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13114 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13115 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13116 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13117 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13118 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13119 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13120 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13121 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13122 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13123 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13124 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13125 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13126 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13127 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13128 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13129 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13130 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13131 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13132 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13133 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13134 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13135 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13136 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13137 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13138 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13139 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13140 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13141 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13142 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13143 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13144 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13145 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13146 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13147 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13148 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13149 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13150 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13151 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13152 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13153 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13154 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13155 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13156 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13157 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13158 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13159 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13160 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13161 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13162 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13163 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13164 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13165 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13166 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13167 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13168 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13169 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13170 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13171 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13172 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13173 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13174 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13175 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13176 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13177 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13178 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13179 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13180 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13181 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13182 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13183 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13184 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13185 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13186 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13187 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13188 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13189 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13190 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13191 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13192 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13193 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13194 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13195 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13196 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13197 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13198 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13199 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13200 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13201 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13202 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13203 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13204 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13205 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13206 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13207 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13208 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13209 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13210 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13211 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13212 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13213 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13214 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13215 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13216 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13217 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13218 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13219 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13220 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13221 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13222 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13223 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13224 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13225 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13226 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13227 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13228 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13229 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13230 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13231 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13232 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13233 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13234 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13235 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13236 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13237 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13238 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13239 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13240 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13241 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13242 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13243 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13244 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13245 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13246 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13247 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13248 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13249 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13250 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13251 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13252 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13253 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13254 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13255 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13256 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13257 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13258 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13259 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13260 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13261 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13262 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13263 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13264 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13265 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13266 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13267 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13268 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13269 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13270 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13271 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13272 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13273 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13274 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13275 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13276 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13277 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13278 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13279 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13280 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13281 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13282 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13283 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13284 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13285 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13286 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13287 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13288 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13289 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13290 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13291 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13292 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13293 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13294 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13295 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13296 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13297 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13298 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13299 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13300 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13301 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13302 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13303 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13304 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13305 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13306 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13307 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13308 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13309 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13310 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13311 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13312 : { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13313 : { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_3__Reg1_2__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13314 : { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13315 : { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13316 : { 10682 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_3__Reg1_2__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13317 : { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13318 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13319 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
13320 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
13321 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13322 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13323 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13324 : { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1 }, },
13325 : { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1 }, },
13326 : { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZrmb, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1 }, },
13327 : { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13328 : { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13329 : { 10703 /* vfpclasspdq */, X86::VFPCLASSPDZrmbk, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13330 : { 10715 /* vfpclasspdx */, X86::VFPCLASSPDZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
13331 : { 10715 /* vfpclasspdx */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13332 : { 10727 /* vfpclasspdy */, X86::VFPCLASSPDZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
13333 : { 10727 /* vfpclasspdy */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13334 : { 10739 /* vfpclasspdz */, X86::VFPCLASSPDZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
13335 : { 10739 /* vfpclasspdz */, X86::VFPCLASSPDZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13336 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13337 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1 }, },
13338 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1 }, },
13339 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13340 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13341 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13342 : { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZrmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1 }, },
13343 : { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1 }, },
13344 : { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1 }, },
13345 : { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZrmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13346 : { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13347 : { 10762 /* vfpclasspsl */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13348 : { 10774 /* vfpclasspsx */, X86::VFPCLASSPSZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1 }, },
13349 : { 10774 /* vfpclasspsx */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13350 : { 10786 /* vfpclasspsy */, X86::VFPCLASSPSZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1 }, },
13351 : { 10786 /* vfpclasspsy */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13352 : { 10798 /* vfpclasspsz */, X86::VFPCLASSPSZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1 }, },
13353 : { 10798 /* vfpclasspsz */, X86::VFPCLASSPSZrmk, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13354 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13355 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1 }, },
13356 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13357 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_2__Reg1_4__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13358 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1 }, },
13359 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1 }, },
13360 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13361 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_2__Reg1_4__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13362 : { 10832 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13363 : { 10832 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13364 : { 10832 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13365 : { 10832 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13366 : { 10840 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13367 : { 10840 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13368 : { 10840 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13369 : { 10840 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13370 : { 10848 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13371 : { 10848 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
13372 : { 10856 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13373 : { 10856 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
13374 : { 10864 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13375 : { 10864 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
13376 : { 10864 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13377 : { 10864 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, 0, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13378 : { 10864 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13379 : { 10875 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13380 : { 10875 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
13381 : { 10875 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13382 : { 10875 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13383 : { 10875 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13384 : { 10886 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13385 : { 10900 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13386 : { 10914 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13387 : { 10928 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13388 : { 10942 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13389 : { 10956 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13390 : { 10970 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13391 : { 10984 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13392 : { 10998 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
13393 : { 10998 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
13394 : { 10998 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13395 : { 10998 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13396 : { 10998 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13397 : { 11009 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
13398 : { 11009 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
13399 : { 11009 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, 0, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13400 : { 11009 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13401 : { 11009 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, 0, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13402 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13403 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13404 : { 11020 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13405 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13406 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13407 : { 11020 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13408 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13409 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
13410 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
13411 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
13412 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13413 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13414 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13415 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13416 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13417 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13418 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13419 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13420 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13421 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13422 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13423 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13424 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13425 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13426 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13427 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13428 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13429 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13430 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13431 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13432 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13433 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13434 : { 11030 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13435 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13436 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13437 : { 11030 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13438 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13439 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
13440 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
13441 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
13442 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13443 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13444 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13445 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13446 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13447 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13448 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13449 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13450 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13451 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13452 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13453 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13454 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13455 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13456 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13457 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13458 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13459 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13460 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13461 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13462 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13463 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13464 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13465 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13466 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13467 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13468 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13469 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13470 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13471 : { 11050 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13472 : { 11050 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13473 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13474 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13475 : { 11050 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13476 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13477 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13478 : { 11050 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13479 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13480 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
13481 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
13482 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
13483 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
13484 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
13485 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
13486 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13487 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
13488 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
13489 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
13490 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13491 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13492 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13493 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13494 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13495 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13496 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13497 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13498 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13499 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13500 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13501 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13502 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13503 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13504 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13505 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13506 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13507 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13508 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13509 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13510 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
13511 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
13512 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
13513 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
13514 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
13515 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
13516 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
13517 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
13518 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
13519 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
13520 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13521 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13522 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13523 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13524 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13525 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13526 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13527 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13528 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13529 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13530 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13531 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13532 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13533 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13534 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13535 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13536 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13537 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13538 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13539 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13540 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13541 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13542 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13543 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13544 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13545 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13546 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13547 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13548 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13549 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13550 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13551 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13552 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13553 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13554 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13555 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13556 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13557 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13558 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13559 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13560 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13561 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13562 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13563 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13564 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13565 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13566 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13567 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13568 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13569 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13570 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13571 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13572 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13573 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13574 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13575 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13576 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13577 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13578 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13579 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13580 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13581 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13582 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13583 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13584 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13585 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13586 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13587 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13588 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13589 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13590 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
13591 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13592 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13593 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13594 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13595 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13596 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13597 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13598 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13599 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13600 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13601 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_4__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13602 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13603 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13604 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13605 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13606 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13607 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13608 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13609 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13610 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13611 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13612 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13613 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13614 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13615 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13616 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13617 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13618 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13619 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13620 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13621 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13622 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13623 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13624 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13625 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13626 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13627 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13628 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13629 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13630 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13631 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13632 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13633 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13634 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13635 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13636 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13637 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13638 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13639 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13640 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13641 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13642 : { 11148 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13643 : { 11148 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13644 : { 11148 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13645 : { 11148 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13646 : { 11156 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13647 : { 11156 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13648 : { 11156 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13649 : { 11156 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13650 : { 11164 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13651 : { 11164 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13652 : { 11164 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13653 : { 11164 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13654 : { 11172 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13655 : { 11172 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13656 : { 11172 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13657 : { 11172 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13658 : { 11180 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
13659 : { 11180 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
13660 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13661 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13662 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13663 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13664 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13665 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13666 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13667 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13668 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13669 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13670 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13671 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13672 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13673 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13674 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13675 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13676 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13677 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13678 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13679 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13680 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13681 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13682 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13683 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13684 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13685 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13686 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13687 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13688 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13689 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13690 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13691 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13692 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13693 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13694 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13695 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13696 : { 11244 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_VR256, MCK_VR256 }, },
13697 : { 11244 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256, MCK_VR256 }, },
13698 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13699 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13700 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13701 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13702 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13703 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13704 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13705 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13706 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13707 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13708 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13709 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13710 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13711 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13712 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13713 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13714 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13715 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13716 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
13717 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512 }, },
13718 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
13719 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512 }, },
13720 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13721 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13722 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13723 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13724 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13725 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13726 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13727 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13728 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512 }, },
13729 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512 }, },
13730 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13731 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13732 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13733 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13734 : { 11308 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
13735 : { 11308 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13736 : { 11308 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13737 : { 11308 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13738 : { 11318 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13739 : { 11318 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13740 : { 11325 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
13741 : { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
13742 : { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
13743 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
13744 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
13745 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13746 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13747 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
13748 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
13749 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13750 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13751 : { 11368 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13752 : { 11368 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13753 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13754 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13755 : { 11368 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13756 : { 11368 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13757 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13758 : { 11368 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13759 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13760 : { 11368 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13761 : { 11368 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13762 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13763 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13764 : { 11368 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13765 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13766 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13767 : { 11368 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13768 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13769 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13770 : { 11368 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13771 : { 11368 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13772 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13773 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13774 : { 11368 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13775 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13776 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13777 : { 11368 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13778 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13779 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13780 : { 11368 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13781 : { 11368 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13782 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13783 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13784 : { 11368 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13785 : { 11375 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13786 : { 11375 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13787 : { 11375 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13788 : { 11375 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13789 : { 11375 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13790 : { 11375 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13791 : { 11375 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13792 : { 11375 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13793 : { 11375 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13794 : { 11375 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13795 : { 11375 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13796 : { 11375 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13797 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13798 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13799 : { 11375 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13800 : { 11375 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13801 : { 11375 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13802 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13803 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13804 : { 11375 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13805 : { 11375 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13806 : { 11375 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13807 : { 11375 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13808 : { 11375 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13809 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13810 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13811 : { 11375 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13812 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13813 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13814 : { 11375 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13815 : { 11375 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13816 : { 11375 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13817 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13818 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13819 : { 11382 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13820 : { 11382 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13821 : { 11382 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13822 : { 11382 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13823 : { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13824 : { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13825 : { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13826 : { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13827 : { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13828 : { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13829 : { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13830 : { 11389 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13831 : { 11389 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13832 : { 11389 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13833 : { 11389 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13834 : { 11389 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13835 : { 11389 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13836 : { 11389 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13837 : { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13838 : { 11389 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13839 : { 11389 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13840 : { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13841 : { 11396 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, { }, },
13842 : { 11403 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
13843 : { 11411 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, { }, },
13844 : { 11418 /* vminpd */, X86::VMINPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13845 : { 11418 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13846 : { 11418 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13847 : { 11418 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13848 : { 11418 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13849 : { 11418 /* vminpd */, X86::VMINPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13850 : { 11418 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13851 : { 11418 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13852 : { 11418 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13853 : { 11418 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13854 : { 11418 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13855 : { 11418 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
13856 : { 11418 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
13857 : { 11418 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
13858 : { 11418 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13859 : { 11418 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13860 : { 11418 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13861 : { 11418 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13862 : { 11418 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13863 : { 11418 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13864 : { 11418 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13865 : { 11418 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13866 : { 11418 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13867 : { 11418 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13868 : { 11418 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13869 : { 11418 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13870 : { 11418 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13871 : { 11418 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13872 : { 11418 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13873 : { 11418 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13874 : { 11418 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13875 : { 11418 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13876 : { 11418 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13877 : { 11418 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13878 : { 11425 /* vminps */, X86::VMINPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13879 : { 11425 /* vminps */, X86::VMINPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
13880 : { 11425 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13881 : { 11425 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
13882 : { 11425 /* vminps */, X86::VMINPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
13883 : { 11425 /* vminps */, X86::VMINPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
13884 : { 11425 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
13885 : { 11425 /* vminps */, X86::VMINPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
13886 : { 11425 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
13887 : { 11425 /* vminps */, X86::VMINPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
13888 : { 11425 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
13889 : { 11425 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
13890 : { 11425 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
13891 : { 11425 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
13892 : { 11425 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13893 : { 11425 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13894 : { 11425 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13895 : { 11425 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13896 : { 11425 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13897 : { 11425 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13898 : { 11425 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13899 : { 11425 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13900 : { 11425 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13901 : { 11425 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13902 : { 11425 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13903 : { 11425 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13904 : { 11425 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13905 : { 11425 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13906 : { 11425 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13907 : { 11425 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13908 : { 11425 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13909 : { 11425 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13910 : { 11425 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13911 : { 11425 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13912 : { 11432 /* vminsd */, X86::VMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13913 : { 11432 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13914 : { 11432 /* vminsd */, X86::VMINSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
13915 : { 11432 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
13916 : { 11432 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13917 : { 11432 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13918 : { 11432 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13919 : { 11432 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13920 : { 11432 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13921 : { 11432 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13922 : { 11432 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13923 : { 11439 /* vminss */, X86::VMINSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
13924 : { 11439 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13925 : { 11439 /* vminss */, X86::VMINSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
13926 : { 11439 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
13927 : { 11439 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
13928 : { 11439 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13929 : { 11439 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13930 : { 11439 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13931 : { 11439 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13932 : { 11439 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13933 : { 11439 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13934 : { 11446 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, { }, },
13935 : { 11455 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
13936 : { 11455 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
13937 : { 11462 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, { }, },
13938 : { 11470 /* vmovapd */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13939 : { 11470 /* vmovapd */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13940 : { 11470 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13941 : { 11470 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13942 : { 11470 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13943 : { 11470 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13944 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13945 : { 11470 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13946 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13947 : { 11470 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13948 : { 11470 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13949 : { 11470 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13950 : { 11470 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13951 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13952 : { 11470 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13953 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13954 : { 11470 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13955 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13956 : { 11470 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13957 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13958 : { 11470 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13959 : { 11470 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13960 : { 11470 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13961 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13962 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13963 : { 11470 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13964 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13965 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13966 : { 11470 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13967 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13968 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13969 : { 11470 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13970 : { 11478 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13971 : { 11478 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13972 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13973 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13974 : { 11478 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13975 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13976 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13977 : { 11478 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13978 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13979 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13980 : { 11478 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
13981 : { 11488 /* vmovaps */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
13982 : { 11488 /* vmovaps */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
13983 : { 11488 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
13984 : { 11488 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
13985 : { 11488 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
13986 : { 11488 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
13987 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
13988 : { 11488 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
13989 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
13990 : { 11488 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
13991 : { 11488 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
13992 : { 11488 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
13993 : { 11488 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
13994 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
13995 : { 11488 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
13996 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
13997 : { 11488 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
13998 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
13999 : { 11488 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14000 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14001 : { 11488 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14002 : { 11488 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14003 : { 11488 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14004 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14005 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14006 : { 11488 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14007 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14008 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14009 : { 11488 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14010 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14011 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14012 : { 11488 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14013 : { 11496 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14014 : { 11496 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14015 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14016 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14017 : { 11496 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14018 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14019 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14020 : { 11496 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14021 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14022 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14023 : { 11496 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14024 : { 11506 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR32 }, },
14025 : { 11506 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
14026 : { 11506 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
14027 : { 11506 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32 }, },
14028 : { 11506 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
14029 : { 11506 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
14030 : { 11506 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X }, },
14031 : { 11506 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR32 }, },
14032 : { 11506 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
14033 : { 11506 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
14034 : { 11506 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
14035 : { 11506 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
14036 : { 11512 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14037 : { 11512 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14038 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14039 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14040 : { 11512 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14041 : { 11512 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14042 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14043 : { 11512 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14044 : { 11512 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14045 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
14046 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14047 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14048 : { 11512 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14049 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14050 : { 11512 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14051 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14052 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14053 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14054 : { 11512 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14055 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14056 : { 11512 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14057 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14058 : { 11521 /* vmovdqa */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14059 : { 11521 /* vmovdqa */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14060 : { 11521 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14061 : { 11521 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14062 : { 11521 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14063 : { 11521 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14064 : { 11521 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14065 : { 11521 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14066 : { 11529 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14067 : { 11529 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14068 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14069 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14070 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14071 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14072 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14073 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14074 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14075 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14076 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14077 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14078 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14079 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14080 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14081 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14082 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14083 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14084 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14085 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14086 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14087 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14088 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14089 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14090 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14091 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14092 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14093 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14094 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14095 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14096 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14097 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14098 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14099 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14100 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14101 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14102 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14103 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14104 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14105 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14106 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14107 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14108 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14109 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14110 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14111 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14112 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14113 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14114 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14115 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14116 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14117 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14118 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14119 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14120 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14121 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14122 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14123 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14124 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14125 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14126 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14127 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14128 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14129 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14130 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14131 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14132 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14133 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14134 : { 11583 /* vmovdqu */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14135 : { 11583 /* vmovdqu */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14136 : { 11583 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14137 : { 11583 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14138 : { 11583 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14139 : { 11583 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14140 : { 11583 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14141 : { 11583 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14142 : { 11591 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14143 : { 11591 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14144 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14145 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14146 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14147 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14148 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14149 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14150 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14151 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14152 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14153 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14154 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14155 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14156 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14157 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14158 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14159 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14160 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14161 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14162 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14163 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14164 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14165 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14166 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14167 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14168 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14169 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14170 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14171 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14172 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14173 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14174 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14175 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14176 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14177 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14178 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14179 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14180 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14181 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14182 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14183 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14184 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14185 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14186 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14187 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14188 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14189 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14190 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14191 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14192 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14193 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14194 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14195 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14196 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14197 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14198 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14199 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14200 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14201 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14202 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14203 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14204 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14205 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14206 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14207 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14208 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14209 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14210 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14211 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14212 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14213 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14214 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14215 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14216 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14217 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14218 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14219 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14220 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14221 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14222 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14223 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14224 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14225 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14226 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14227 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14228 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14229 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14230 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14231 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14232 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14233 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14234 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14235 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14236 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14237 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14238 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14239 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14240 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14241 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14242 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14243 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14244 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14245 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14246 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14247 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14248 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14249 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14250 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14251 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14252 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14253 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14254 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14255 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14256 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14257 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14258 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14259 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14260 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14261 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14262 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14263 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14264 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14265 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14266 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14267 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14268 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14269 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14270 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14271 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14272 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14273 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14274 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14275 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14276 : { 11687 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14277 : { 11687 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14278 : { 11696 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14279 : { 11696 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14280 : { 11696 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14281 : { 11696 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14282 : { 11704 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14283 : { 11704 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14284 : { 11704 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14285 : { 11704 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14286 : { 11712 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14287 : { 11712 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14288 : { 11721 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14289 : { 11721 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14290 : { 11721 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14291 : { 11721 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14292 : { 11729 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14293 : { 11729 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14294 : { 11729 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14295 : { 11729 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14296 : { 11737 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
14297 : { 11737 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
14298 : { 11747 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
14299 : { 11747 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
14300 : { 11757 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14301 : { 11757 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14302 : { 11757 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14303 : { 11757 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14304 : { 11757 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14305 : { 11766 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14306 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14307 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14308 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14309 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14310 : { 11776 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14311 : { 11776 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14312 : { 11776 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14313 : { 11776 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14314 : { 11776 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14315 : { 11785 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14316 : { 11785 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14317 : { 11785 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14318 : { 11785 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14319 : { 11785 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14320 : { 11794 /* vmovq */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14321 : { 11794 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14322 : { 11794 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_GR64 }, },
14323 : { 11794 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14324 : { 11794 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32 }, },
14325 : { 11794 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X }, },
14326 : { 11794 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_GR64 }, },
14327 : { 11794 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14328 : { 11794 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14329 : { 11794 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14330 : { 11794 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
14331 : { 11800 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14332 : { 11800 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14333 : { 11808 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32, MCK_Mem64 }, },
14334 : { 11808 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
14335 : { 11808 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
14336 : { 11808 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
14337 : { 11808 /* vmovsd */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_FR32, MCK_VR128L }, },
14338 : { 11808 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14339 : { 11808 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14340 : { 11808 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14341 : { 11808 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14342 : { 11808 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14343 : { 11808 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14344 : { 11808 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14345 : { 11815 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14346 : { 11815 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14347 : { 11815 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14348 : { 11815 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14349 : { 11824 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14350 : { 11824 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14351 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14352 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14353 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14354 : { 11824 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14355 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14356 : { 11824 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14357 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14358 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14359 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14360 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14361 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14362 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14363 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14364 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14365 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14366 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14367 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14368 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14369 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14370 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14371 : { 11834 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14372 : { 11834 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14373 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14374 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14375 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14376 : { 11834 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14377 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14378 : { 11834 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14379 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14380 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14381 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14382 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14383 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14384 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14385 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14386 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14387 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14388 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14389 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14390 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14391 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14392 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14393 : { 11844 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32, MCK_Mem32 }, },
14394 : { 11844 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
14395 : { 11844 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
14396 : { 11844 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
14397 : { 11844 /* vmovss */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_FR32, MCK_VR128L }, },
14398 : { 11844 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14399 : { 11844 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14400 : { 11844 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14401 : { 11844 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14402 : { 11844 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14403 : { 11844 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14404 : { 11844 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14405 : { 11851 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14406 : { 11851 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14407 : { 11851 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_2__Tie0_3_3__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14408 : { 11851 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14409 : { 11860 /* vmovupd */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14410 : { 11860 /* vmovupd */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14411 : { 11860 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14412 : { 11860 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14413 : { 11860 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14414 : { 11860 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14415 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14416 : { 11860 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14417 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14418 : { 11860 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14419 : { 11860 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14420 : { 11860 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14421 : { 11860 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14422 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14423 : { 11860 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14424 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14425 : { 11860 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14426 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14427 : { 11860 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14428 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14429 : { 11860 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14430 : { 11860 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14431 : { 11860 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14432 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14433 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14434 : { 11860 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14435 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14436 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14437 : { 11860 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14438 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14439 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14440 : { 11860 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14441 : { 11868 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14442 : { 11868 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14443 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14444 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14445 : { 11868 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14446 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14447 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14448 : { 11868 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14449 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14450 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14451 : { 11868 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14452 : { 11878 /* vmovups */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR128H, MCK_VR128L }, },
14453 : { 11878 /* vmovups */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256H, MCK_VR256L }, },
14454 : { 11878 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14455 : { 11878 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128 }, },
14456 : { 11878 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14457 : { 11878 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256 }, },
14458 : { 11878 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14459 : { 11878 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
14460 : { 11878 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14461 : { 11878 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
14462 : { 11878 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14463 : { 11878 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
14464 : { 11878 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14465 : { 11878 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14466 : { 11878 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14467 : { 11878 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14468 : { 11878 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14469 : { 11878 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14470 : { 11878 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14471 : { 11878 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14472 : { 11878 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14473 : { 11878 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14474 : { 11878 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14475 : { 11878 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14476 : { 11878 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14477 : { 11878 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14478 : { 11878 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14479 : { 11878 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14480 : { 11878 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14481 : { 11878 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14482 : { 11878 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14483 : { 11878 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14484 : { 11886 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14485 : { 11886 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14486 : { 11886 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14487 : { 11886 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14488 : { 11886 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14489 : { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14490 : { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14491 : { 11886 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14492 : { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14493 : { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14494 : { 11886 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14495 : { 11896 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
14496 : { 11896 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
14497 : { 11896 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14498 : { 11896 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14499 : { 11905 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14500 : { 11913 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14501 : { 11928 /* vmreadl */, X86::VMREAD32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
14502 : { 11928 /* vmreadl */, X86::VMREAD32mr, Convert__Mem325_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
14503 : { 11936 /* vmreadq */, X86::VMREAD64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
14504 : { 11936 /* vmreadq */, X86::VMREAD64mr, Convert__Mem645_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
14505 : { 11944 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, { }, },
14506 : { 11953 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
14507 : { 11953 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
14508 : { 11959 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
14509 : { 11959 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
14510 : { 11966 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14511 : { 11966 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14512 : { 11966 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14513 : { 11966 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14514 : { 11966 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14515 : { 11966 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14516 : { 11966 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14517 : { 11966 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14518 : { 11966 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14519 : { 11966 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14520 : { 11966 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14521 : { 11966 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14522 : { 11966 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14523 : { 11966 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14524 : { 11966 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14525 : { 11966 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14526 : { 11966 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14527 : { 11966 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14528 : { 11966 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14529 : { 11966 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14530 : { 11966 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14531 : { 11966 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14532 : { 11966 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14533 : { 11966 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14534 : { 11966 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14535 : { 11966 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14536 : { 11966 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14537 : { 11966 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14538 : { 11966 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14539 : { 11966 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14540 : { 11966 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14541 : { 11966 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14542 : { 11966 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14543 : { 11966 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14544 : { 11973 /* vmulps */, X86::VMULPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14545 : { 11973 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14546 : { 11973 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14547 : { 11973 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14548 : { 11973 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14549 : { 11973 /* vmulps */, X86::VMULPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14550 : { 11973 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14551 : { 11973 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14552 : { 11973 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14553 : { 11973 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14554 : { 11973 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
14555 : { 11973 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14556 : { 11973 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14557 : { 11973 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14558 : { 11973 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14559 : { 11973 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14560 : { 11973 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14561 : { 11973 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14562 : { 11973 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14563 : { 11973 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14564 : { 11973 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14565 : { 11973 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14566 : { 11973 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14567 : { 11973 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14568 : { 11973 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14569 : { 11973 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14570 : { 11973 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14571 : { 11973 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14572 : { 11973 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14573 : { 11973 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14574 : { 11973 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14575 : { 11973 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14576 : { 11973 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14577 : { 11973 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14578 : { 11980 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14579 : { 11980 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14580 : { 11980 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
14581 : { 11980 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
14582 : { 11980 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14583 : { 11980 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14584 : { 11980 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14585 : { 11980 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14586 : { 11980 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14587 : { 11980 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14588 : { 11980 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14589 : { 11987 /* vmulss */, X86::VMULSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14590 : { 11987 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14591 : { 11987 /* vmulss */, X86::VMULSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
14592 : { 11987 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
14593 : { 11987 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14594 : { 11987 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14595 : { 11987 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14596 : { 11987 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14597 : { 11987 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14598 : { 11987 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14599 : { 11987 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14600 : { 12002 /* vmwritel */, X86::VMWRITE32rr, Convert__Reg1_1__Reg1_0, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
14601 : { 12002 /* vmwritel */, X86::VMWRITE32rm, Convert__Reg1_1__Mem325_0, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
14602 : { 12011 /* vmwriteq */, X86::VMWRITE64rr, Convert__Reg1_1__Reg1_0, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
14603 : { 12011 /* vmwriteq */, X86::VMWRITE64rm, Convert__Reg1_1__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
14604 : { 12020 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, { }, },
14605 : { 12027 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
14606 : { 12033 /* vorpd */, X86::VORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14607 : { 12033 /* vorpd */, X86::VORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14608 : { 12033 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14609 : { 12033 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14610 : { 12033 /* vorpd */, X86::VORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14611 : { 12033 /* vorpd */, X86::VORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14612 : { 12033 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14613 : { 12033 /* vorpd */, X86::VORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14614 : { 12033 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14615 : { 12033 /* vorpd */, X86::VORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14616 : { 12033 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14617 : { 12033 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14618 : { 12033 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14619 : { 12033 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14620 : { 12033 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14621 : { 12033 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14622 : { 12033 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14623 : { 12033 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14624 : { 12033 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14625 : { 12033 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14626 : { 12033 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14627 : { 12033 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14628 : { 12033 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14629 : { 12033 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14630 : { 12033 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14631 : { 12033 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14632 : { 12033 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14633 : { 12033 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14634 : { 12033 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14635 : { 12033 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14636 : { 12033 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14637 : { 12039 /* vorps */, X86::VORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14638 : { 12039 /* vorps */, X86::VORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14639 : { 12039 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14640 : { 12039 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14641 : { 12039 /* vorps */, X86::VORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14642 : { 12039 /* vorps */, X86::VORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14643 : { 12039 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14644 : { 12039 /* vorps */, X86::VORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14645 : { 12039 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14646 : { 12039 /* vorps */, X86::VORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14647 : { 12039 /* vorps */, X86::VORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14648 : { 12039 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14649 : { 12039 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14650 : { 12039 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14651 : { 12039 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14652 : { 12039 /* vorps */, X86::VORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14653 : { 12039 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14654 : { 12039 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14655 : { 12039 /* vorps */, X86::VORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14656 : { 12039 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14657 : { 12039 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14658 : { 12039 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14659 : { 12039 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14660 : { 12039 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14661 : { 12039 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14662 : { 12039 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14663 : { 12039 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14664 : { 12039 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14665 : { 12039 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14666 : { 12039 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14667 : { 12039 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14668 : { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14669 : { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14670 : { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14671 : { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
14672 : { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14673 : { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14674 : { 12066 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14675 : { 12066 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14676 : { 12066 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14677 : { 12066 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14678 : { 12066 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14679 : { 12066 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14680 : { 12066 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14681 : { 12066 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14682 : { 12066 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14683 : { 12066 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14684 : { 12066 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14685 : { 12066 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14686 : { 12066 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14687 : { 12066 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14688 : { 12066 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14689 : { 12066 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14690 : { 12066 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14691 : { 12066 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14692 : { 12066 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14693 : { 12066 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14694 : { 12066 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14695 : { 12066 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14696 : { 12073 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14697 : { 12073 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14698 : { 12073 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14699 : { 12073 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14700 : { 12073 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14701 : { 12073 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14702 : { 12073 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14703 : { 12073 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14704 : { 12073 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14705 : { 12073 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14706 : { 12073 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
14707 : { 12073 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
14708 : { 12073 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
14709 : { 12073 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14710 : { 12073 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14711 : { 12073 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14712 : { 12073 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14713 : { 12073 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14714 : { 12073 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14715 : { 12073 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14716 : { 12073 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14717 : { 12073 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14718 : { 12073 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14719 : { 12073 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14720 : { 12073 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14721 : { 12073 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14722 : { 12073 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14723 : { 12073 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14724 : { 12073 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14725 : { 12073 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14726 : { 12073 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14727 : { 12080 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14728 : { 12080 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14729 : { 12080 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14730 : { 12080 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14731 : { 12080 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14732 : { 12080 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14733 : { 12080 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
14734 : { 12080 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
14735 : { 12080 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
14736 : { 12080 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14737 : { 12080 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14738 : { 12080 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14739 : { 12080 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14740 : { 12080 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14741 : { 12080 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14742 : { 12080 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14743 : { 12080 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14744 : { 12080 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14745 : { 12080 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14746 : { 12080 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14747 : { 12080 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14748 : { 12080 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14749 : { 12080 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14750 : { 12080 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14751 : { 12080 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14752 : { 12080 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14753 : { 12080 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14754 : { 12087 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
14755 : { 12087 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
14756 : { 12087 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
14757 : { 12087 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
14758 : { 12087 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
14759 : { 12087 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
14760 : { 12087 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
14761 : { 12087 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
14762 : { 12087 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
14763 : { 12087 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
14764 : { 12087 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14765 : { 12087 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14766 : { 12087 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14767 : { 12087 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14768 : { 12087 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14769 : { 12087 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14770 : { 12087 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14771 : { 12087 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14772 : { 12087 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14773 : { 12087 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14774 : { 12087 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14775 : { 12087 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14776 : { 12094 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14777 : { 12094 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14778 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14779 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14780 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14781 : { 12094 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14782 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14783 : { 12094 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14784 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14785 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14786 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14787 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14788 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14789 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14790 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14791 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14792 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14793 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14794 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14795 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14796 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14797 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14798 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14799 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14800 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14801 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14802 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14803 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14804 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14805 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14806 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14807 : { 12104 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14808 : { 12104 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14809 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14810 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14811 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14812 : { 12104 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14813 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14814 : { 12104 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14815 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14816 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14817 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14818 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14819 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14820 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14821 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14822 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14823 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14824 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14825 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14826 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14827 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14828 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14829 : { 12114 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14830 : { 12114 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14831 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14832 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14833 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14834 : { 12114 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14835 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14836 : { 12114 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14837 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14838 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14839 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14840 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14841 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14842 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14843 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14844 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14845 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14846 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14847 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14848 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14849 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14850 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14851 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14852 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14853 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14854 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14855 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14856 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14857 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14858 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14859 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14860 : { 12124 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14861 : { 12124 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14862 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14863 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14864 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14865 : { 12124 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14866 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14867 : { 12124 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14868 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14869 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14870 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14871 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14872 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14873 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14874 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14875 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14876 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14877 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14878 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14879 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14880 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14881 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14882 : { 12134 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14883 : { 12134 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14884 : { 12134 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14885 : { 12134 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14886 : { 12134 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14887 : { 12134 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14888 : { 12134 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14889 : { 12134 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14890 : { 12134 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14891 : { 12134 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14892 : { 12134 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14893 : { 12134 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14894 : { 12134 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14895 : { 12134 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14896 : { 12134 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14897 : { 12134 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14898 : { 12134 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14899 : { 12134 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14900 : { 12134 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14901 : { 12134 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14902 : { 12134 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14903 : { 12134 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14904 : { 12141 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14905 : { 12141 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14906 : { 12141 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14907 : { 12141 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14908 : { 12141 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14909 : { 12141 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14910 : { 12141 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14911 : { 12141 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14912 : { 12141 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14913 : { 12141 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14914 : { 12141 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
14915 : { 12141 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
14916 : { 12141 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
14917 : { 12141 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14918 : { 12141 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14919 : { 12141 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14920 : { 12141 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14921 : { 12141 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14922 : { 12141 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14923 : { 12141 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14924 : { 12141 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14925 : { 12141 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14926 : { 12141 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14927 : { 12141 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14928 : { 12141 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14929 : { 12141 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14930 : { 12141 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14931 : { 12141 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14932 : { 12141 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14933 : { 12141 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14934 : { 12141 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14935 : { 12148 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14936 : { 12148 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14937 : { 12148 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14938 : { 12148 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14939 : { 12148 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14940 : { 12148 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14941 : { 12148 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14942 : { 12148 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14943 : { 12148 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14944 : { 12148 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14945 : { 12148 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
14946 : { 12148 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
14947 : { 12148 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
14948 : { 12148 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14949 : { 12148 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14950 : { 12148 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14951 : { 12148 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14952 : { 12148 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14953 : { 12148 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14954 : { 12148 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14955 : { 12148 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14956 : { 12148 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14957 : { 12148 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14958 : { 12148 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14959 : { 12148 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14960 : { 12148 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14961 : { 12148 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14962 : { 12148 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14963 : { 12148 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14964 : { 12148 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14965 : { 12148 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14966 : { 12155 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14967 : { 12155 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14968 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14969 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14970 : { 12155 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14971 : { 12155 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14972 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14973 : { 12155 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14974 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14975 : { 12155 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14976 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14977 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14978 : { 12155 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14979 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14980 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14981 : { 12155 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14982 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14983 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14984 : { 12155 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14985 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14986 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14987 : { 12155 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
14988 : { 12163 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
14989 : { 12163 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
14990 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
14991 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
14992 : { 12163 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
14993 : { 12163 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
14994 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
14995 : { 12163 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
14996 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
14997 : { 12163 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
14998 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
14999 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15000 : { 12163 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15001 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15002 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15003 : { 12163 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15004 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15005 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15006 : { 12163 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15007 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15008 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15009 : { 12163 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15010 : { 12171 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15011 : { 12171 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15012 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15013 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15014 : { 12171 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15015 : { 12171 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15016 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15017 : { 12171 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15018 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15019 : { 12171 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15020 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15021 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15022 : { 12171 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15023 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15024 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15025 : { 12171 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15026 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15027 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15028 : { 12171 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15029 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15030 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15031 : { 12171 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15032 : { 12180 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15033 : { 12180 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15034 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15035 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15036 : { 12180 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15037 : { 12180 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15038 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15039 : { 12180 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15040 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15041 : { 12180 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15042 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15043 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15044 : { 12180 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15045 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15046 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15047 : { 12180 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15048 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15049 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15050 : { 12180 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15051 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15052 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15053 : { 12180 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15054 : { 12189 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15055 : { 12189 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15056 : { 12189 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15057 : { 12189 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15058 : { 12189 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15059 : { 12189 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15060 : { 12189 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15061 : { 12189 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15062 : { 12189 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15063 : { 12189 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15064 : { 12189 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15065 : { 12189 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15066 : { 12189 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15067 : { 12189 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15068 : { 12189 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15069 : { 12189 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15070 : { 12189 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15071 : { 12189 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15072 : { 12189 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15073 : { 12189 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15074 : { 12189 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15075 : { 12189 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15076 : { 12196 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15077 : { 12196 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15078 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15079 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15080 : { 12196 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15081 : { 12196 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15082 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15083 : { 12196 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15084 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15085 : { 12196 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15086 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15087 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15088 : { 12196 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15089 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15090 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15091 : { 12196 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15092 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15093 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15094 : { 12196 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15095 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15096 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15097 : { 12196 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15098 : { 12205 /* vpand */, X86::VPANDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15099 : { 12205 /* vpand */, X86::VPANDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15100 : { 12205 /* vpand */, X86::VPANDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15101 : { 12205 /* vpand */, X86::VPANDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15102 : { 12211 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15103 : { 12211 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15104 : { 12211 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15105 : { 12211 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15106 : { 12211 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15107 : { 12211 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15108 : { 12211 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15109 : { 12211 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15110 : { 12211 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15111 : { 12211 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15112 : { 12211 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15113 : { 12211 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15114 : { 12211 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15115 : { 12211 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15116 : { 12211 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15117 : { 12211 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15118 : { 12211 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15119 : { 12211 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15120 : { 12211 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15121 : { 12211 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15122 : { 12211 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15123 : { 12211 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15124 : { 12211 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15125 : { 12211 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15126 : { 12211 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15127 : { 12211 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15128 : { 12211 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15129 : { 12218 /* vpandn */, X86::VPANDNrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15130 : { 12218 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15131 : { 12218 /* vpandn */, X86::VPANDNrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15132 : { 12218 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15133 : { 12225 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15134 : { 12225 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15135 : { 12225 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15136 : { 12225 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15137 : { 12225 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15138 : { 12225 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15139 : { 12225 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15140 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15141 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15142 : { 12225 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15143 : { 12225 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15144 : { 12225 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15145 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15146 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15147 : { 12225 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15148 : { 12225 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15149 : { 12225 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15150 : { 12225 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15151 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15152 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15153 : { 12225 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15154 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15155 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15156 : { 12225 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15157 : { 12225 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15158 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15159 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15160 : { 12233 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15161 : { 12233 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15162 : { 12233 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15163 : { 12233 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15164 : { 12233 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15165 : { 12233 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15166 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15167 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15168 : { 12233 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15169 : { 12233 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15170 : { 12233 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15171 : { 12233 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15172 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15173 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15174 : { 12233 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15175 : { 12233 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15176 : { 12233 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15177 : { 12233 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15178 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15179 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15180 : { 12233 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15181 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15182 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15183 : { 12233 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15184 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15185 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15186 : { 12233 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15187 : { 12241 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15188 : { 12241 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15189 : { 12241 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15190 : { 12241 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15191 : { 12241 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15192 : { 12241 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15193 : { 12241 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15194 : { 12241 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15195 : { 12241 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15196 : { 12241 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15197 : { 12241 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15198 : { 12241 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15199 : { 12241 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15200 : { 12241 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15201 : { 12241 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15202 : { 12241 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15203 : { 12241 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15204 : { 12241 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15205 : { 12241 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15206 : { 12241 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15207 : { 12241 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15208 : { 12241 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15209 : { 12241 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15210 : { 12241 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15211 : { 12241 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15212 : { 12241 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15213 : { 12241 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15214 : { 12248 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15215 : { 12248 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15216 : { 12248 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15217 : { 12248 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15218 : { 12248 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15219 : { 12248 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15220 : { 12248 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15221 : { 12248 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15222 : { 12248 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15223 : { 12248 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15224 : { 12248 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15225 : { 12248 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15226 : { 12248 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15227 : { 12248 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15228 : { 12248 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15229 : { 12248 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15230 : { 12248 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15231 : { 12248 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15232 : { 12248 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15233 : { 12248 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15234 : { 12248 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15235 : { 12248 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15236 : { 12255 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15237 : { 12255 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15238 : { 12255 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15239 : { 12255 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15240 : { 12255 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15241 : { 12255 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15242 : { 12255 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15243 : { 12255 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15244 : { 12255 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15245 : { 12255 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15246 : { 12255 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15247 : { 12255 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15248 : { 12255 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15249 : { 12255 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15250 : { 12255 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15251 : { 12255 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15252 : { 12255 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15253 : { 12255 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15254 : { 12255 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15255 : { 12255 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15256 : { 12255 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15257 : { 12255 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15258 : { 12262 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15259 : { 12262 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15260 : { 12262 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15261 : { 12262 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15262 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15263 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15264 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15265 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15266 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15267 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15268 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15269 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15270 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15271 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15272 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15273 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15274 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15275 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15276 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15277 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15278 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15279 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15280 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15281 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15282 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15283 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15284 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15285 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15286 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
15287 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
15288 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
15289 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15290 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15291 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15292 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15293 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15294 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15295 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15296 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15297 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15298 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15299 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15300 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15301 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15302 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15303 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15304 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15305 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15306 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15307 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15308 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15309 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15310 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15311 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15312 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15313 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
15314 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
15315 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
15316 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15317 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15318 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15319 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15320 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15321 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15322 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15323 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15324 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15325 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15326 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15327 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15328 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15329 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15330 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15331 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15332 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15333 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15334 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15335 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15336 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15337 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15338 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15339 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15340 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15341 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15342 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15343 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15344 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15345 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15346 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15347 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15348 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15349 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15350 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15351 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15352 : { 12311 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15353 : { 12311 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15354 : { 12311 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15355 : { 12311 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15356 : { 12321 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15357 : { 12321 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15358 : { 12321 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15359 : { 12321 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15360 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15361 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15362 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
15363 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR256X }, },
15364 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR512 }, },
15365 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15366 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15367 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15368 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_FR32 }, },
15369 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR256 }, },
15370 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_FR32X }, },
15371 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR256X }, },
15372 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_1__Mem85_0, 0, { MCK_Mem8, MCK_VR512 }, },
15373 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15374 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15375 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15376 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15377 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15378 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15379 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15380 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15381 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15382 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15383 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15384 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15385 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15386 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15387 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15388 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15389 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15390 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_1__Reg1_3__Mem85_0, 0, { MCK_Mem8, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15391 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15392 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15393 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
15394 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR256X }, },
15395 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR512 }, },
15396 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15397 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15398 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15399 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
15400 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
15401 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
15402 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
15403 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR512 }, },
15404 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15405 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15406 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15407 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15408 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15409 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15410 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15411 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15412 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15413 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15414 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15415 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15416 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15417 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15418 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15419 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15420 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15421 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15422 : { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
15423 : { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
15424 : { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
15425 : { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
15426 : { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
15427 : { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
15428 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15429 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15430 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_FR32X }, },
15431 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR256X }, },
15432 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR64, MCK_VR512 }, },
15433 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15434 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15435 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15436 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
15437 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
15438 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
15439 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
15440 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
15441 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15442 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15443 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15444 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15445 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15446 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15447 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15448 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15449 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15450 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15451 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15452 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15453 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15454 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15455 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15456 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15457 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15458 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15459 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
15460 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
15461 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_FR32X }, },
15462 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR256X }, },
15463 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_1__Reg1_0, 0, { MCK_GR32, MCK_VR512 }, },
15464 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15465 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
15466 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
15467 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
15468 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR256 }, },
15469 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32X }, },
15470 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR256X }, },
15471 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_VR512 }, },
15472 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15473 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15474 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15475 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15476 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15477 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15478 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15479 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15480 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15481 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15482 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15483 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_GR32, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15484 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15485 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15486 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15487 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15488 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15489 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15490 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15491 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15492 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15493 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15494 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15495 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15496 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_17, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15497 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15498 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_17, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15499 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_17, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15500 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15501 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15502 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15503 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15504 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15505 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15506 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_1, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15507 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15508 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_1, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15509 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_1, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15510 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15511 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15512 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15513 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15514 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15515 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15516 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_16, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15517 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15518 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_16, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15519 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_16, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15520 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15521 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15522 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15523 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15524 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
15525 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15526 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0__imm_95_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15527 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15528 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0__imm_95_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15529 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0__imm_95_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15530 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15531 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15532 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
15533 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
15534 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
15535 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15536 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
15537 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15538 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
15539 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
15540 : { 12481 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15541 : { 12481 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15542 : { 12481 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15543 : { 12481 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_3__Reg1_2__Mem2565_1__Reg1_0, 0, { MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15544 : { 12481 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15545 : { 12481 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
15546 : { 12488 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15547 : { 12488 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15548 : { 12488 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15549 : { 12488 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15550 : { 12488 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15551 : { 12488 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15552 : { 12488 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15553 : { 12488 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15554 : { 12488 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15555 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15556 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15557 : { 12488 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15558 : { 12488 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15559 : { 12488 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15560 : { 12488 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15561 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15562 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15563 : { 12488 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15564 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15565 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15566 : { 12488 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15567 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15568 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15569 : { 12488 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15570 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15571 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15572 : { 12488 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15573 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15574 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15575 : { 12488 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15576 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15577 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15578 : { 12488 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15579 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15580 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15581 : { 12488 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15582 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15583 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15584 : { 12488 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15585 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15586 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15587 : { 12488 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15588 : { 12488 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15589 : { 12488 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15590 : { 12488 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15591 : { 12488 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15592 : { 12488 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_4__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15593 : { 12488 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_4__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15594 : { 12488 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15595 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15596 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15597 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15598 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15599 : { 12488 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15600 : { 12488 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15601 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15602 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_5__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15603 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15604 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15605 : { 12488 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_5__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15606 : { 12488 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15607 : { 12488 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15608 : { 12488 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15609 : { 12488 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15610 : { 12488 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15611 : { 12488 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15612 : { 12488 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15613 : { 12488 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15614 : { 12488 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15615 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15616 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15617 : { 12488 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15618 : { 12488 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15619 : { 12488 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15620 : { 12488 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15621 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15622 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15623 : { 12488 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15624 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15625 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15626 : { 12488 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15627 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15628 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15629 : { 12488 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15630 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15631 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15632 : { 12488 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15633 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15634 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15635 : { 12488 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15636 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15637 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15638 : { 12488 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15639 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15640 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15641 : { 12488 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15642 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15643 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15644 : { 12488 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15645 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15646 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15647 : { 12488 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15648 : { 12488 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15649 : { 12488 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15650 : { 12488 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15651 : { 12488 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15652 : { 12488 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem2565_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15653 : { 12488 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_4__Reg1_6__Reg1_3__Mem5125_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15654 : { 12488 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15655 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15656 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15657 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15658 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15659 : { 12488 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15660 : { 12488 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15661 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15662 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem325_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15663 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15664 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15665 : { 12488 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_5__Reg1_7__Reg1_4__Mem645_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15666 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15667 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15668 : { 12494 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15669 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15670 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15671 : { 12494 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15672 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15673 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15674 : { 12494 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15675 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15676 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15677 : { 12494 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15678 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15679 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15680 : { 12501 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15681 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15682 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15683 : { 12501 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15684 : { 12501 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15685 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15686 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15687 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15688 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15689 : { 12501 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15690 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15691 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15692 : { 12501 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15693 : { 12501 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15694 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15695 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15696 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15697 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15698 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15699 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15700 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15701 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15702 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15703 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15704 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15705 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15706 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15707 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15708 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15709 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15710 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15711 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15712 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15713 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15714 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15715 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15716 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15717 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15718 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15719 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15720 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15721 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15722 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15723 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15724 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15725 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15726 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15727 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15728 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15729 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15730 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15731 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15732 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15733 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15734 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15735 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15736 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15737 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15738 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15739 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15740 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15741 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15742 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15743 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15744 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15745 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15746 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15747 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15748 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15749 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15750 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15751 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15752 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15753 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15754 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15755 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15756 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15757 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15758 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15759 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15760 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15761 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15762 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15763 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15764 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15765 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15766 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15767 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15768 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15769 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15770 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15771 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15772 : { 12544 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15773 : { 12544 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15774 : { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15775 : { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15776 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15777 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15778 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15779 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15780 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15781 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15782 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15783 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15784 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15785 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15786 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15787 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15788 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15789 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15790 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15791 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15792 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15793 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15794 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15795 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15796 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15797 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15798 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15799 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15800 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15801 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15802 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15803 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15804 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15805 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15806 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15807 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15808 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15809 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15810 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15811 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15812 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15813 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15814 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15815 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15816 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15817 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15818 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15819 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15820 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15821 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15822 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15823 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15824 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15825 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15826 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15827 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15828 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15829 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15830 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15831 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15832 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15833 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15834 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15835 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15836 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
15837 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
15838 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15839 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15840 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
15841 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15842 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15843 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
15844 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15845 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15846 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15847 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15848 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15849 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15850 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15851 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15852 : { 12602 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15853 : { 12602 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15854 : { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
15855 : { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
15856 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15857 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15858 : { 12624 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15859 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15860 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15861 : { 12624 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15862 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15863 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15864 : { 12624 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15865 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15866 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15867 : { 12624 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15868 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15869 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15870 : { 12624 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15871 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15872 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15873 : { 12624 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15874 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15875 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15876 : { 12631 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15877 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15878 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15879 : { 12631 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15880 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15881 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15882 : { 12631 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15883 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15884 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15885 : { 12631 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15886 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15887 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15888 : { 12639 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15889 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15890 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15891 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15892 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
15893 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
15894 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
15895 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15896 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15897 : { 12639 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15898 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15899 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15900 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15901 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15902 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15903 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15904 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15905 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15906 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15907 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15908 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15909 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15910 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
15911 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
15912 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
15913 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15914 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15915 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15916 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15917 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15918 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15919 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15920 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15921 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15922 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15923 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15924 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15925 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15926 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15927 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15928 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15929 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15930 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15931 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15932 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15933 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15934 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
15935 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
15936 : { 12663 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1 }, },
15937 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
15938 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
15939 : { 12663 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1 }, },
15940 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15941 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15942 : { 12663 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15943 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15944 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15945 : { 12663 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15946 : { 12670 /* vpcom */, X86::VPCOMBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15947 : { 12670 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15948 : { 12670 /* vpcom */, X86::VPCOMDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15949 : { 12670 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15950 : { 12670 /* vpcom */, X86::VPCOMQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15951 : { 12670 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15952 : { 12670 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15953 : { 12670 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15954 : { 12670 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15955 : { 12670 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15956 : { 12670 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15957 : { 12670 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15958 : { 12670 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15959 : { 12670 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15960 : { 12670 /* vpcom */, X86::VPCOMWri, Convert__Reg1_4__Reg1_3__Reg1_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15961 : { 12670 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_4__Reg1_3__Mem1285_2__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15962 : { 12676 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15963 : { 12676 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15964 : { 12683 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
15965 : { 12683 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
15966 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15967 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15968 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15969 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
15970 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15971 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
15972 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15973 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15974 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15975 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15976 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15977 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15978 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15979 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15980 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15981 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15982 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15983 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15984 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
15985 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
15986 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
15987 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15988 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15989 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15990 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15991 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15992 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
15993 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15994 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15995 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
15996 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
15997 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
15998 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
15999 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
16000 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16001 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
16002 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16003 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16004 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16005 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16006 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16007 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16008 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16009 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16010 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16011 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16012 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem128 }, },
16013 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16014 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem256 }, },
16015 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16016 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_1__Reg1_0, 0, { MCK_VR512, MCK_Mem512 }, },
16017 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16018 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16019 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16020 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16021 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16022 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16023 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16024 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16025 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16026 : { 12738 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16027 : { 12738 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16028 : { 12745 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16029 : { 12745 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16030 : { 12753 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16031 : { 12753 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16032 : { 12761 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16033 : { 12761 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16034 : { 12769 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16035 : { 12769 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16036 : { 12777 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16037 : { 12777 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16038 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16039 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16040 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16041 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16042 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16043 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16044 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16045 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16046 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16047 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16048 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16049 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16050 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16051 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16052 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16053 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16054 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16055 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16056 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16057 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16058 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16059 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16060 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16061 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16062 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16063 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16064 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16065 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16066 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16067 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16068 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16069 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16070 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16071 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16072 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16073 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16074 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16075 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16076 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16077 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16078 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16079 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16080 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16081 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16082 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16083 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16084 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16085 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16086 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16087 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16088 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16089 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16090 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16091 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16092 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16093 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16094 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16095 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16096 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16097 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16098 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16099 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16100 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16101 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16102 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16103 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16104 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16105 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16106 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16107 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16108 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16109 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16110 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16111 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16112 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16113 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16114 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16115 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16116 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16117 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16118 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16119 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16120 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16121 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16122 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16123 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16124 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16125 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16126 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16127 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16128 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16129 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16130 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16131 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16132 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16133 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16134 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16135 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16136 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16137 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16138 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16139 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16140 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16141 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16142 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16143 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16144 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16145 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16146 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16147 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16148 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16149 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16150 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16151 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16152 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16153 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16154 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16155 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16156 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16157 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16158 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16159 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16160 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16161 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16162 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16163 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16164 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16165 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16166 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16167 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16168 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16169 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16170 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16171 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16172 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16173 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16174 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16175 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16176 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16177 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16178 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16179 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16180 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16181 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16182 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16183 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16184 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16185 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16186 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16187 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16188 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16189 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16190 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16191 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16192 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16193 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16194 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16195 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16196 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16197 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16198 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16199 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16200 : { 12846 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16201 : { 12846 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16202 : { 12857 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16203 : { 12857 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16204 : { 12868 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16205 : { 12868 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16206 : { 12868 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16207 : { 12868 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16208 : { 12868 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16209 : { 12868 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16210 : { 12868 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16211 : { 12868 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16212 : { 12868 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16213 : { 12868 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16214 : { 12868 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16215 : { 12868 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16216 : { 12868 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16217 : { 12868 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16218 : { 12868 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16219 : { 12868 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16220 : { 12868 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16221 : { 12868 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16222 : { 12875 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16223 : { 12875 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16224 : { 12875 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16225 : { 12875 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16226 : { 12875 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16227 : { 12875 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16228 : { 12875 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16229 : { 12875 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16230 : { 12875 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16231 : { 12875 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16232 : { 12875 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16233 : { 12875 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16234 : { 12875 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16235 : { 12875 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16236 : { 12875 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16237 : { 12875 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16238 : { 12875 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16239 : { 12875 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16240 : { 12875 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16241 : { 12875 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16242 : { 12882 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16243 : { 12882 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16244 : { 12882 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16245 : { 12882 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16246 : { 12882 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16247 : { 12882 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16248 : { 12882 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16249 : { 12882 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16250 : { 12882 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16251 : { 12882 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16252 : { 12882 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16253 : { 12882 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16254 : { 12882 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16255 : { 12882 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16256 : { 12882 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16257 : { 12882 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16258 : { 12882 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16259 : { 12882 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16260 : { 12891 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16261 : { 12891 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16262 : { 12891 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16263 : { 12891 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16264 : { 12891 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16265 : { 12891 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16266 : { 12891 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16267 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16268 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16269 : { 12891 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16270 : { 12891 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16271 : { 12891 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16272 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16273 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16274 : { 12891 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16275 : { 12891 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16276 : { 12891 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16277 : { 12891 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16278 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16279 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16280 : { 12891 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16281 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16282 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16283 : { 12891 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16284 : { 12891 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16285 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16286 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16287 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16288 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16289 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16290 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16291 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16292 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16293 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16294 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16295 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16296 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16297 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16298 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16299 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16300 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16301 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16302 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16303 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16304 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16305 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16306 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16307 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16308 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16309 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16310 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16311 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16312 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16313 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16314 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16315 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16316 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16317 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16318 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16319 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16320 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16321 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16322 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16323 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16324 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16325 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16326 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16327 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16328 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16329 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16330 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16331 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16332 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16333 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16334 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16335 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16336 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16337 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16338 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16339 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16340 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16341 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16342 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16343 : { 12920 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16344 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16345 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16346 : { 12920 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16347 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16348 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16349 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16350 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16351 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16352 : { 12920 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16353 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16354 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16355 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16356 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16357 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16358 : { 12920 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16359 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16360 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16361 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16362 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16363 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16364 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16365 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16366 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16367 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16368 : { 12929 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16369 : { 12929 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16370 : { 12929 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16371 : { 12929 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16372 : { 12929 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16373 : { 12929 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16374 : { 12929 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16375 : { 12929 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16376 : { 12929 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16377 : { 12929 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16378 : { 12929 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16379 : { 12929 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16380 : { 12929 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16381 : { 12929 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16382 : { 12929 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16383 : { 12929 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16384 : { 12929 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16385 : { 12929 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16386 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16387 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16388 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16389 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16390 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16391 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16392 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16393 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_4__Reg1_3__Mem1285_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16394 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_4__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16395 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_4__Reg1_3__Mem2565_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16396 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
16397 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_4__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
16398 : { 12960 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16399 : { 12960 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16400 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16401 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16402 : { 12960 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16403 : { 12960 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16404 : { 12960 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16405 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
16406 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16407 : { 12960 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16408 : { 12960 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16409 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
16410 : { 12960 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16411 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16412 : { 12960 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16413 : { 12960 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16414 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16415 : { 12960 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16416 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16417 : { 12960 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16418 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16419 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16420 : { 12960 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16421 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16422 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16423 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16424 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16425 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16426 : { 12960 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16427 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16428 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16429 : { 12960 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16430 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16431 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16432 : { 12960 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16433 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16434 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16435 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16436 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16437 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16438 : { 12960 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16439 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16440 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16441 : { 12960 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16442 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16443 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16444 : { 12960 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16445 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16446 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16447 : { 12960 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16448 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16449 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16450 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16451 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16452 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16453 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16454 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16455 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16456 : { 12960 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16457 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16458 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16459 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16460 : { 12970 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16461 : { 12970 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16462 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16463 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16464 : { 12970 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16465 : { 12970 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
16466 : { 12970 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16467 : { 12970 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
16468 : { 12970 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16469 : { 12970 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16470 : { 12970 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
16471 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
16472 : { 12970 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16473 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16474 : { 12970 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16475 : { 12970 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16476 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16477 : { 12970 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16478 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16479 : { 12970 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16480 : { 12970 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16481 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16482 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16483 : { 12970 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16484 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16485 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16486 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16487 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16488 : { 12970 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16489 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16490 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16491 : { 12970 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16492 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16493 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16494 : { 12970 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16495 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16496 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16497 : { 12970 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16498 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16499 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16500 : { 12970 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16501 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16502 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16503 : { 12970 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16504 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16505 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16506 : { 12970 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16507 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16508 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16509 : { 12970 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16510 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16511 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16512 : { 12970 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16513 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16514 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16515 : { 12970 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16516 : { 12970 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16517 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16518 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16519 : { 12970 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16520 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16521 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16522 : { 12980 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16523 : { 12980 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16524 : { 12980 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16525 : { 12980 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16526 : { 12980 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16527 : { 12980 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16528 : { 12980 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16529 : { 12980 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16530 : { 12980 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16531 : { 12980 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16532 : { 12980 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16533 : { 12980 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16534 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16535 : { 12980 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16536 : { 12980 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16537 : { 12980 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16538 : { 12980 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16539 : { 12980 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16540 : { 12980 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16541 : { 12980 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16542 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16543 : { 12980 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16544 : { 12980 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16545 : { 12980 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16546 : { 12980 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16547 : { 12980 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16548 : { 12980 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16549 : { 12980 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16550 : { 12980 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16551 : { 12980 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16552 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16553 : { 12980 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16554 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16555 : { 12980 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16556 : { 12980 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16557 : { 12980 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16558 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16559 : { 12980 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16560 : { 12988 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16561 : { 12988 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16562 : { 12988 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16563 : { 12988 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16564 : { 12988 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16565 : { 12988 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16566 : { 12988 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16567 : { 12988 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16568 : { 12988 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16569 : { 12988 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16570 : { 12988 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16571 : { 12988 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16572 : { 12988 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16573 : { 12988 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16574 : { 12988 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16575 : { 12988 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16576 : { 12988 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16577 : { 12988 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16578 : { 12988 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16579 : { 12988 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16580 : { 12996 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16581 : { 12996 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16582 : { 12996 /* vpermq */, X86::VPERMQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
16583 : { 12996 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
16584 : { 12996 /* vpermq */, X86::VPERMQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
16585 : { 12996 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
16586 : { 12996 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
16587 : { 12996 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
16588 : { 12996 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16589 : { 12996 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16590 : { 12996 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16591 : { 12996 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16592 : { 12996 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16593 : { 12996 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16594 : { 12996 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16595 : { 12996 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16596 : { 12996 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16597 : { 12996 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16598 : { 12996 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16599 : { 12996 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16600 : { 12996 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16601 : { 12996 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16602 : { 12996 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16603 : { 12996 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16604 : { 12996 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16605 : { 12996 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16606 : { 12996 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16607 : { 12996 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16608 : { 12996 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16609 : { 12996 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16610 : { 12996 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16611 : { 12996 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16612 : { 12996 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16613 : { 12996 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16614 : { 12996 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16615 : { 12996 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16616 : { 12996 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16617 : { 12996 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16618 : { 13003 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16619 : { 13003 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16620 : { 13003 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16621 : { 13003 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16622 : { 13003 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16623 : { 13003 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16624 : { 13003 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16625 : { 13003 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16626 : { 13003 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16627 : { 13003 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16628 : { 13003 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16629 : { 13003 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16630 : { 13003 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16631 : { 13003 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16632 : { 13003 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16633 : { 13003 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16634 : { 13003 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16635 : { 13003 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16636 : { 13012 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16637 : { 13012 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16638 : { 13012 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16639 : { 13012 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16640 : { 13012 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16641 : { 13012 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16642 : { 13012 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16643 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16644 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16645 : { 13012 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16646 : { 13012 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16647 : { 13012 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16648 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16649 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16650 : { 13012 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16651 : { 13012 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16652 : { 13012 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16653 : { 13012 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16654 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16655 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16656 : { 13012 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16657 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16658 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16659 : { 13012 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16660 : { 13012 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16661 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16662 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16663 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16664 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16665 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16666 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16667 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16668 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16669 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16670 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16671 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16672 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16673 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16674 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16675 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16676 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16677 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16678 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16679 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16680 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16681 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16682 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16683 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16684 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16685 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16686 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16687 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16688 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16689 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16690 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16691 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16692 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16693 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16694 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16695 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16696 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
16697 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
16698 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
16699 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16700 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16701 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16702 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16703 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16704 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16705 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16706 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16707 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16708 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16709 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16710 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16711 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16712 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16713 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16714 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16715 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16716 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16717 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16718 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16719 : { 13041 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16720 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16721 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16722 : { 13041 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16723 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
16724 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
16725 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
16726 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16727 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16728 : { 13041 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16729 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16730 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16731 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16732 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16733 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16734 : { 13041 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16735 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16736 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16737 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16738 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16739 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16740 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16741 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16742 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16743 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16744 : { 13050 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16745 : { 13050 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16746 : { 13050 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16747 : { 13050 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16748 : { 13050 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16749 : { 13050 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16750 : { 13050 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16751 : { 13050 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16752 : { 13050 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16753 : { 13050 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16754 : { 13050 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16755 : { 13050 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16756 : { 13050 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16757 : { 13050 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16758 : { 13050 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16759 : { 13050 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16760 : { 13050 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16761 : { 13050 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16762 : { 13059 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
16763 : { 13059 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
16764 : { 13059 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
16765 : { 13059 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
16766 : { 13059 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
16767 : { 13059 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
16768 : { 13059 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16769 : { 13059 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16770 : { 13059 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16771 : { 13059 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16772 : { 13059 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16773 : { 13059 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16774 : { 13059 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16775 : { 13059 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16776 : { 13059 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16777 : { 13059 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16778 : { 13059 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16779 : { 13059 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16780 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16781 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16782 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16783 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16784 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16785 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16786 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16787 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16788 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16789 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16790 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16791 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16792 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16793 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16794 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16795 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16796 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16797 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16798 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16799 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16800 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16801 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16802 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16803 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16804 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16805 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16806 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16807 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16808 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16809 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16810 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16811 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16812 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16813 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16814 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16815 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16816 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16817 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16818 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16819 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16820 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16821 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16822 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16823 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16824 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16825 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16826 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16827 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16828 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16829 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16830 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16831 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16832 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16833 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16834 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16835 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16836 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16837 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16838 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16839 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16840 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16841 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16842 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16843 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16844 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16845 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16846 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16847 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16848 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16849 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16850 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16851 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16852 : { 13106 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
16853 : { 13106 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem8 }, },
16854 : { 13106 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16855 : { 13106 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem8 }, },
16856 : { 13114 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32 }, },
16857 : { 13114 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem32 }, },
16858 : { 13114 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32 }, },
16859 : { 13114 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem32 }, },
16860 : { 13122 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR64 }, },
16861 : { 13122 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem64 }, },
16862 : { 13122 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR64 }, },
16863 : { 13122 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem64 }, },
16864 : { 13130 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_GR32orGR64 }, },
16865 : { 13130 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_Mem16 }, },
16866 : { 13130 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_GR32orGR64 }, },
16867 : { 13130 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_Mem16 }, },
16868 : { 13138 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16869 : { 13138 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
16870 : { 13138 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16871 : { 13138 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16872 : { 13138 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16873 : { 13149 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16874 : { 13149 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC1285_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
16875 : { 13149 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16876 : { 13149 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC128X5_0, 0, { MCK_Mem256_RC128X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16877 : { 13149 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16878 : { 13160 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC2565_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
16879 : { 13160 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem64_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
16880 : { 13160 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC256X5_0, 0, { MCK_Mem128_RC256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16881 : { 13160 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16882 : { 13160 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem64_RC128X5_0, 0, { MCK_Mem64_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16883 : { 13171 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem128_RC1285_1__Tie1_1_1, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
16884 : { 13171 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_2__Reg1_0__Tie0_1_1__Mem256_RC2565_1__Tie1_1_1, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
16885 : { 13171 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem128_RC128X5_0, 0, { MCK_Mem128_RC128X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16886 : { 13171 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem256_RC256X5_0, 0, { MCK_Mem256_RC256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16887 : { 13171 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_1__Reg1_3__Tie0_1_1__Tie1_4_4__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16888 : { 13182 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16889 : { 13182 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16890 : { 13191 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16891 : { 13191 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16892 : { 13200 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16893 : { 13200 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16894 : { 13209 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16895 : { 13209 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16896 : { 13209 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16897 : { 13209 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16898 : { 13217 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16899 : { 13217 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16900 : { 13226 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16901 : { 13226 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16902 : { 13226 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16903 : { 13226 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16904 : { 13235 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16905 : { 13235 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16906 : { 13245 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16907 : { 13245 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16908 : { 13255 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16909 : { 13255 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16910 : { 13265 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16911 : { 13265 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16912 : { 13275 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16913 : { 13275 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16914 : { 13285 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16915 : { 13285 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16916 : { 13295 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16917 : { 13295 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16918 : { 13295 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16919 : { 13295 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16920 : { 13303 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16921 : { 13303 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16922 : { 13312 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16923 : { 13312 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16924 : { 13321 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16925 : { 13321 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16926 : { 13333 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16927 : { 13333 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16928 : { 13342 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16929 : { 13342 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16930 : { 13342 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16931 : { 13342 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16932 : { 13350 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16933 : { 13350 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16934 : { 13359 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16935 : { 13359 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16936 : { 13359 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16937 : { 13359 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16938 : { 13368 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
16939 : { 13368 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
16940 : { 13368 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
16941 : { 13368 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
16942 : { 13376 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
16943 : { 13376 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
16944 : { 13385 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
16945 : { 13385 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
16946 : { 13385 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32, MCK_FR32 }, },
16947 : { 13385 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_3__Reg1_2__Mem85_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem8, MCK_FR32X, MCK_FR32X }, },
16948 : { 13393 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32, MCK_FR32 }, },
16949 : { 13393 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32, MCK_FR32X, MCK_FR32X }, },
16950 : { 13393 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
16951 : { 13393 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
16952 : { 13401 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32, MCK_FR32 }, },
16953 : { 13401 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR64, MCK_FR32X, MCK_FR32X }, },
16954 : { 13401 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
16955 : { 13401 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
16956 : { 13409 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32, MCK_FR32 }, },
16957 : { 13409 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_3__Reg1_2__GR32orGR641_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_GR32orGR64, MCK_FR32X, MCK_FR32X }, },
16958 : { 13409 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32, MCK_FR32 }, },
16959 : { 13409 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_3__Reg1_2__Mem165_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem16, MCK_FR32X, MCK_FR32X }, },
16960 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16961 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16962 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16963 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16964 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16965 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16966 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
16967 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
16968 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
16969 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16970 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16971 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16972 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16973 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16974 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16975 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16976 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16977 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16978 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16979 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16980 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16981 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16982 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16983 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16984 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16985 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16986 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
16987 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
16988 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
16989 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
16990 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
16991 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
16992 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
16993 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
16994 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
16995 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
16996 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16997 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16998 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
16999 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17000 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17001 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17002 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17003 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17004 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17005 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17006 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17007 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17008 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17009 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17010 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17011 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17012 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17013 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17014 : { 13435 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17015 : { 13435 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17016 : { 13444 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17017 : { 13444 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17018 : { 13454 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17019 : { 13454 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17020 : { 13464 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17021 : { 13464 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17022 : { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17023 : { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17024 : { 13485 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17025 : { 13485 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17026 : { 13496 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17027 : { 13496 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17028 : { 13506 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17029 : { 13506 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17030 : { 13516 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17031 : { 13516 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17032 : { 13525 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17033 : { 13525 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17034 : { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17035 : { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17036 : { 13545 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
17037 : { 13545 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17038 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17039 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17040 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17041 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17042 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17043 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17044 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17045 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17046 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17047 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17048 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17049 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17050 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17051 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17052 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17053 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17054 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17055 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17056 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17057 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17058 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17059 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17060 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17061 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17062 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17063 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17064 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17065 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17066 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17067 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17068 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17069 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17070 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17071 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17072 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17073 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17074 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17075 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17076 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17077 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17078 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17079 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17080 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17081 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17082 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17083 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17084 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17085 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17086 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17087 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17088 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17089 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17090 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17091 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17092 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17093 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17094 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17095 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17096 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17097 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17098 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17099 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17100 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17101 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17102 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17103 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17104 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17105 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17106 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17107 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17108 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17109 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17110 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17111 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17112 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17113 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17114 : { 13590 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17115 : { 13590 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17116 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17117 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17118 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17119 : { 13590 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17120 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17121 : { 13590 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17122 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17123 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17124 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17125 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17126 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17127 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17128 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17129 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17130 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17131 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17132 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17133 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17134 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17135 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17136 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
17137 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
17138 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17139 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17140 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
17141 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
17142 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17143 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17144 : { 13621 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17145 : { 13621 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17146 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17147 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17148 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17149 : { 13621 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17150 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17151 : { 13621 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17152 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17153 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17154 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17155 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17156 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17157 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17158 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17159 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17160 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17161 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17162 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17163 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17164 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17165 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17166 : { 13629 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17167 : { 13629 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17168 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17169 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17170 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17171 : { 13629 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17172 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17173 : { 13629 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17174 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17175 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17176 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17177 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17178 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17179 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17180 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17181 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17182 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17183 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17184 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17185 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17186 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17187 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17188 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17189 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17190 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17191 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17192 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17193 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17194 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17195 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17196 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17197 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17198 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17199 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17200 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17201 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17202 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17203 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17204 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17205 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17206 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17207 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17208 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17209 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17210 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17211 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17212 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17213 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17214 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17215 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17216 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17217 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17218 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17219 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17220 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17221 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17222 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17223 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17224 : { 13645 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17225 : { 13645 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17226 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17227 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17228 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17229 : { 13645 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17230 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17231 : { 13645 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17232 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17233 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17234 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17235 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17236 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17237 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17238 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17239 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17240 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17241 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17242 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17243 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17244 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17245 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17246 : { 13653 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17247 : { 13653 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17248 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17249 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17250 : { 13653 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17251 : { 13653 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17252 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17253 : { 13653 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17254 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17255 : { 13653 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17256 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17257 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17258 : { 13653 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17259 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17260 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17261 : { 13653 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17262 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17263 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17264 : { 13653 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17265 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17266 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17267 : { 13653 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17268 : { 13661 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17269 : { 13661 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17270 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17271 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17272 : { 13661 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17273 : { 13661 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17274 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17275 : { 13661 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17276 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17277 : { 13661 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17278 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17279 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17280 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17281 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17282 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17283 : { 13661 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17284 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17285 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17286 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17287 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17288 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17289 : { 13661 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17290 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17291 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17292 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17293 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17294 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17295 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17296 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17297 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17298 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17299 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17300 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17301 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17302 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17303 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17304 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17305 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17306 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17307 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17308 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17309 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17310 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17311 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17312 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17313 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17314 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17315 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17316 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17317 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17318 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17319 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17320 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17321 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17322 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17323 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17324 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17325 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17326 : { 13677 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17327 : { 13677 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17328 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17329 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17330 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17331 : { 13677 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17332 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17333 : { 13677 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17334 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17335 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17336 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17337 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17338 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17339 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17340 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17341 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17342 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17343 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17344 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17345 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17346 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17347 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17348 : { 13685 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17349 : { 13685 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17350 : { 13685 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17351 : { 13685 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17352 : { 13685 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17353 : { 13685 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17354 : { 13685 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17355 : { 13685 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17356 : { 13685 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17357 : { 13685 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17358 : { 13685 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17359 : { 13685 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17360 : { 13685 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17361 : { 13685 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17362 : { 13685 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17363 : { 13685 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17364 : { 13685 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17365 : { 13685 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17366 : { 13685 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17367 : { 13685 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17368 : { 13685 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17369 : { 13685 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17370 : { 13693 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17371 : { 13693 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17372 : { 13693 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17373 : { 13693 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17374 : { 13693 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17375 : { 13693 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17376 : { 13693 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17377 : { 13693 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17378 : { 13693 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17379 : { 13693 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17380 : { 13693 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17381 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17382 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17383 : { 13693 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17384 : { 13693 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17385 : { 13693 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17386 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17387 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17388 : { 13693 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17389 : { 13693 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17390 : { 13693 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17391 : { 13693 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17392 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17393 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17394 : { 13693 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17395 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17396 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17397 : { 13693 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17398 : { 13693 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17399 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17400 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17401 : { 13701 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17402 : { 13701 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17403 : { 13701 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17404 : { 13701 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17405 : { 13701 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17406 : { 13701 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17407 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17408 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17409 : { 13701 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17410 : { 13701 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17411 : { 13701 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17412 : { 13701 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17413 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17414 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17415 : { 13701 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17416 : { 13701 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17417 : { 13701 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17418 : { 13701 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17419 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17420 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17421 : { 13701 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17422 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17423 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17424 : { 13701 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17425 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17426 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17427 : { 13701 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17428 : { 13709 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17429 : { 13709 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17430 : { 13709 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17431 : { 13709 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17432 : { 13709 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17433 : { 13709 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17434 : { 13709 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17435 : { 13709 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17436 : { 13709 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17437 : { 13709 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17438 : { 13709 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17439 : { 13709 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17440 : { 13709 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17441 : { 13709 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17442 : { 13709 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17443 : { 13709 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17444 : { 13709 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17445 : { 13709 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17446 : { 13709 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17447 : { 13709 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17448 : { 13709 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17449 : { 13709 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17450 : { 13717 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17451 : { 13717 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17452 : { 13717 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17453 : { 13717 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17454 : { 13717 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17455 : { 13717 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17456 : { 13717 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17457 : { 13717 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17458 : { 13717 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17459 : { 13717 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17460 : { 13717 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17461 : { 13717 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17462 : { 13717 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17463 : { 13717 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17464 : { 13717 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17465 : { 13717 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17466 : { 13717 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17467 : { 13717 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17468 : { 13717 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17469 : { 13717 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17470 : { 13717 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17471 : { 13717 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17472 : { 13725 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17473 : { 13725 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17474 : { 13725 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17475 : { 13725 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17476 : { 13725 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17477 : { 13725 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17478 : { 13725 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17479 : { 13725 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17480 : { 13725 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17481 : { 13725 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17482 : { 13725 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
17483 : { 13725 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
17484 : { 13725 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
17485 : { 13725 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17486 : { 13725 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17487 : { 13725 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17488 : { 13725 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17489 : { 13725 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17490 : { 13725 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17491 : { 13725 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17492 : { 13725 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17493 : { 13725 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17494 : { 13725 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17495 : { 13725 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17496 : { 13725 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17497 : { 13725 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17498 : { 13725 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17499 : { 13725 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17500 : { 13725 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17501 : { 13725 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17502 : { 13725 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17503 : { 13733 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17504 : { 13733 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17505 : { 13733 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17506 : { 13733 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17507 : { 13733 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17508 : { 13733 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17509 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
17510 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
17511 : { 13733 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
17512 : { 13733 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17513 : { 13733 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17514 : { 13733 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17515 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17516 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17517 : { 13733 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17518 : { 13733 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17519 : { 13733 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17520 : { 13733 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17521 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17522 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17523 : { 13733 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17524 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17525 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17526 : { 13733 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17527 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17528 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17529 : { 13733 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17530 : { 13741 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
17531 : { 13741 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
17532 : { 13741 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
17533 : { 13741 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
17534 : { 13741 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
17535 : { 13741 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
17536 : { 13741 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
17537 : { 13741 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
17538 : { 13741 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
17539 : { 13741 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
17540 : { 13741 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17541 : { 13741 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17542 : { 13741 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17543 : { 13741 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17544 : { 13741 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17545 : { 13741 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17546 : { 13741 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17547 : { 13741 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17548 : { 13741 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17549 : { 13741 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17550 : { 13741 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17551 : { 13741 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17552 : { 13749 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17553 : { 13749 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17554 : { 13749 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17555 : { 13758 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17556 : { 13758 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17557 : { 13758 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17558 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17559 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17560 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17561 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17562 : { 13767 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17563 : { 13767 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17564 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17565 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17566 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17567 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17568 : { 13767 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17569 : { 13767 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17570 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17571 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17572 : { 13767 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17573 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17574 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17575 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17576 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17577 : { 13775 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17578 : { 13775 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17579 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17580 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17581 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17582 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17583 : { 13775 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17584 : { 13775 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17585 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17586 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17587 : { 13775 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17588 : { 13783 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17589 : { 13783 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17590 : { 13783 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17591 : { 13792 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17592 : { 13792 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17593 : { 13792 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17594 : { 13801 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17595 : { 13801 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17596 : { 13801 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17597 : { 13810 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_FR32X }, },
17598 : { 13810 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR256X }, },
17599 : { 13810 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VK1, MCK_VR512 }, },
17600 : { 13819 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_FR32, MCK_GR32orGR64 }, },
17601 : { 13819 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_1__Reg1_0, 0, { MCK_VR256, MCK_GR32orGR64 }, },
17602 : { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17603 : { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17604 : { 13829 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17605 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17606 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem16 }, },
17607 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17608 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem32 }, },
17609 : { 13838 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17610 : { 13838 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR512, MCK_Mem64 }, },
17611 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17612 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17613 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17614 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17615 : { 13838 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17616 : { 13838 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17617 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17618 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17619 : { 13838 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17620 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17621 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17622 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17623 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17624 : { 13846 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17625 : { 13846 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17626 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17627 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17628 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17629 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17630 : { 13846 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17631 : { 13846 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17632 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17633 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17634 : { 13846 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17635 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17636 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17637 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17638 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17639 : { 13854 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17640 : { 13854 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17641 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17642 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17643 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17644 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17645 : { 13854 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17646 : { 13854 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17647 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17648 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17649 : { 13854 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17650 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17651 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17652 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17653 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17654 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17655 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17656 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17657 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17658 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17659 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17660 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17661 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17662 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17663 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17664 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17665 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17666 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17667 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17668 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17669 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17670 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17671 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17672 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17673 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17674 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17675 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17676 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17677 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17678 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17679 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17680 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17681 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem16 }, },
17682 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17683 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem32 }, },
17684 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17685 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR512, MCK_Mem64 }, },
17686 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17687 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17688 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17689 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17690 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17691 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17692 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17693 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17694 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17695 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17696 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17697 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17698 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17699 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17700 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17701 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17702 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17703 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17704 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17705 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17706 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17707 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17708 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17709 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17710 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17711 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17712 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17713 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17714 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17715 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17716 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17717 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17718 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17719 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17720 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17721 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17722 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17723 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17724 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17725 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17726 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17727 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17728 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17729 : { 13907 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17730 : { 13907 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17731 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17732 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17733 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17734 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17735 : { 13907 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17736 : { 13907 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17737 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17738 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17739 : { 13907 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17740 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17741 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17742 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17743 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17744 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17745 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17746 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17747 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17748 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17749 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17750 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17751 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17752 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17753 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17754 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17755 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17756 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17757 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17758 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17759 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17760 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17761 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17762 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17763 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17764 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17765 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17766 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17767 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
17768 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32X }, },
17769 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
17770 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
17771 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
17772 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17773 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17774 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17775 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17776 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17777 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17778 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17779 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17780 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17781 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17782 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17783 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17784 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17785 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17786 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17787 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17788 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17789 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17790 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17791 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17792 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17793 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17794 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17795 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17796 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17797 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17798 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17799 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17800 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17801 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17802 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17803 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17804 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17805 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17806 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17807 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17808 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17809 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17810 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17811 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17812 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17813 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17814 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17815 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17816 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17817 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17818 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17819 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17820 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17821 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17822 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17823 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17824 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17825 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17826 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17827 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17828 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17829 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17830 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17831 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17832 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
17833 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
17834 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
17835 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
17836 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
17837 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
17838 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17839 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17840 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17841 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17842 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17843 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17844 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17845 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17846 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17847 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17848 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17849 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17850 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17851 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17852 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17853 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17854 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17855 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17856 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17857 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17858 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17859 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17860 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17861 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17862 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17863 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17864 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17865 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17866 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17867 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17868 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17869 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17870 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17871 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17872 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17873 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17874 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17875 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17876 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17877 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17878 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17879 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17880 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17881 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17882 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17883 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17884 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17885 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17886 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17887 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17888 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17889 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17890 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17891 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17892 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17893 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17894 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17895 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17896 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17897 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17898 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17899 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17900 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17901 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17902 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17903 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem16 }, },
17904 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17905 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem32 }, },
17906 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17907 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR512, MCK_Mem64 }, },
17908 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17909 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17910 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17911 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17912 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17913 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17914 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17915 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17916 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17917 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17918 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17919 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17920 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17921 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17922 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17923 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17924 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17925 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17926 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17927 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17928 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17929 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17930 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17931 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17932 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17933 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem32 }, },
17934 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17935 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem64 }, },
17936 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_FR32X }, },
17937 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR512, MCK_Mem128 }, },
17938 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17939 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17940 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17941 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17942 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17943 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17944 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17945 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17946 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17947 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17948 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17949 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17950 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17951 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17952 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17953 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17954 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17955 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17956 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17957 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17958 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17959 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17960 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17961 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17962 : { 14036 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VK1 }, },
17963 : { 14036 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VK1 }, },
17964 : { 14036 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VK1 }, },
17965 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17966 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_1__Reg1_0, 0, { MCK_FR32X, MCK_Mem64 }, },
17967 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_FR32X }, },
17968 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_1__Reg1_0, 0, { MCK_VR256X, MCK_Mem128 }, },
17969 : { 14045 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR256X }, },
17970 : { 14045 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_1__Reg1_0, 0, { MCK_VR512, MCK_Mem256 }, },
17971 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17972 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17973 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17974 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17975 : { 14045 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17976 : { 14045 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17977 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17978 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17979 : { 14045 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17980 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
17981 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
17982 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
17983 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
17984 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
17985 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
17986 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
17987 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
17988 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
17989 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
17990 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17991 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17992 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17993 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17994 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17995 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
17996 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17997 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17998 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
17999 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18000 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18001 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18002 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
18003 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
18004 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18005 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
18006 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
18007 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32 }, },
18008 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_1__Mem165_0, 0, { MCK_Mem16, MCK_FR32X }, },
18009 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256 }, },
18010 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_VR256X }, },
18011 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR512 }, },
18012 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18013 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18014 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18015 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18016 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18017 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18018 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18019 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18020 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18021 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem165_0, 0, { MCK_Mem16, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18022 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18023 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18024 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
18025 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
18026 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18027 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
18028 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
18029 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
18030 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
18031 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
18032 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
18033 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
18034 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18035 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18036 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18037 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18038 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18039 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18040 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18041 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18042 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18043 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18044 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18045 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18046 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
18047 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
18048 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18049 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
18050 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
18051 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
18052 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
18053 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
18054 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
18055 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
18056 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18057 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18058 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18059 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18060 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18061 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18062 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18063 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18064 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18065 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18066 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18067 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18068 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
18069 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
18070 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18071 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
18072 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR512 }, },
18073 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256 }, },
18074 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X }, },
18075 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR512 }, },
18076 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
18077 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
18078 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18079 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18080 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18081 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18082 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18083 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18084 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18085 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18086 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18087 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18088 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18089 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18090 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
18091 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256 }, },
18092 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18093 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X }, },
18094 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512 }, },
18095 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512 }, },
18096 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
18097 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
18098 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256 }, },
18099 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_VR256X }, },
18100 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18101 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18102 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18103 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18104 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18105 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18106 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18107 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18108 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18109 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18110 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18111 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem645_0, 0, { MCK_Mem64, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18112 : { 14113 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18113 : { 14113 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18114 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18115 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18116 : { 14113 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18117 : { 14113 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18118 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18119 : { 14113 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18120 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18121 : { 14113 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18122 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18123 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18124 : { 14113 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18125 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18126 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18127 : { 14113 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18128 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18129 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18130 : { 14113 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18131 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18132 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18133 : { 14113 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18134 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18135 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18136 : { 14113 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18137 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18138 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18139 : { 14113 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18140 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18141 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18142 : { 14113 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18143 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18144 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18145 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18146 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18147 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18148 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18149 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18150 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18151 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18152 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18153 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18154 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18155 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18156 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18157 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18158 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18159 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18160 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18161 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18162 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18163 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18164 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18165 : { 14131 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18166 : { 14131 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18167 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18168 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18169 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18170 : { 14131 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18171 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18172 : { 14131 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18173 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18174 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18175 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18176 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18177 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18178 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18179 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18180 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18181 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18182 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18183 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18184 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18185 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18186 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18187 : { 14140 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18188 : { 14140 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18189 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18190 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18191 : { 14140 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18192 : { 14140 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18193 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18194 : { 14140 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18195 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18196 : { 14140 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18197 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18198 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18199 : { 14140 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18200 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18201 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18202 : { 14140 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18203 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18204 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18205 : { 14140 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18206 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18207 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18208 : { 14140 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18209 : { 14148 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18210 : { 14148 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18211 : { 14148 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18212 : { 14148 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18213 : { 14148 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18214 : { 14148 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18215 : { 14148 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18216 : { 14148 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18217 : { 14148 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18218 : { 14148 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18219 : { 14148 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18220 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18221 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18222 : { 14148 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18223 : { 14148 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18224 : { 14148 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18225 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18226 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18227 : { 14148 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18228 : { 14148 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18229 : { 14148 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18230 : { 14148 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18231 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18232 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18233 : { 14148 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18234 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18235 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18236 : { 14148 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18237 : { 14148 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18238 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18239 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18240 : { 14156 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18241 : { 14156 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18242 : { 14156 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18243 : { 14156 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18244 : { 14156 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18245 : { 14156 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18246 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18247 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18248 : { 14156 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18249 : { 14156 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18250 : { 14156 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18251 : { 14156 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18252 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18253 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18254 : { 14156 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18255 : { 14156 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18256 : { 14156 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18257 : { 14156 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18258 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18259 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18260 : { 14156 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18261 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18262 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18263 : { 14156 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18264 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18265 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18266 : { 14156 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18267 : { 14164 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18268 : { 14164 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18269 : { 14164 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18270 : { 14164 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18271 : { 14164 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18272 : { 14164 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18273 : { 14164 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18274 : { 14164 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18275 : { 14164 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18276 : { 14164 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18277 : { 14164 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18278 : { 14164 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18279 : { 14164 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18280 : { 14164 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18281 : { 14164 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18282 : { 14164 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18283 : { 14164 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18284 : { 14164 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18285 : { 14164 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18286 : { 14164 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18287 : { 14164 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18288 : { 14164 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18289 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18290 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18291 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18292 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18293 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18294 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18295 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18296 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18297 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18298 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18299 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18300 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18301 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18302 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18303 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18304 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18305 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18306 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18307 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18308 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18309 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18310 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18311 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18312 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18313 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18314 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18315 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18316 : { 14187 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18317 : { 14187 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18318 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18319 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18320 : { 14187 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18321 : { 14187 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18322 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18323 : { 14187 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18324 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18325 : { 14187 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18326 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18327 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18328 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18329 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18330 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18331 : { 14187 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18332 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18333 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18334 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18335 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18336 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18337 : { 14187 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18338 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18339 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18340 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18341 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18342 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18343 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18344 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18345 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18346 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18347 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18348 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18349 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18350 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18351 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18352 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18353 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18354 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18355 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18356 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18357 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18358 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18359 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18360 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18361 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18362 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18363 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18364 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18365 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18366 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18367 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18368 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18369 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18370 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18371 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18372 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18373 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18374 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18375 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18376 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18377 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18378 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18379 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18380 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18381 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18382 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18383 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18384 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18385 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18386 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18387 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18388 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18389 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18390 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18391 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18392 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18393 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18394 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18395 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18396 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18397 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18398 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18399 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18400 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18401 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18402 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18403 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18404 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18405 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18406 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18407 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18408 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18409 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18410 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18411 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18412 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18413 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18414 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18415 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18416 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18417 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18418 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18419 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
18420 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
18421 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
18422 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
18423 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
18424 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
18425 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18426 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18427 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18428 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18429 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18430 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18431 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18432 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18433 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18434 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18435 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18436 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18437 : { 14232 /* vpor */, X86::VPORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18438 : { 14232 /* vpor */, X86::VPORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18439 : { 14232 /* vpor */, X86::VPORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18440 : { 14232 /* vpor */, X86::VPORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18441 : { 14237 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18442 : { 14237 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18443 : { 14237 /* vpord */, X86::VPORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18444 : { 14237 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18445 : { 14237 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18446 : { 14237 /* vpord */, X86::VPORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18447 : { 14237 /* vpord */, X86::VPORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18448 : { 14237 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18449 : { 14237 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18450 : { 14237 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18451 : { 14237 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18452 : { 14237 /* vpord */, X86::VPORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18453 : { 14237 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18454 : { 14237 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18455 : { 14237 /* vpord */, X86::VPORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18456 : { 14237 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18457 : { 14237 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18458 : { 14237 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18459 : { 14237 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18460 : { 14237 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18461 : { 14237 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18462 : { 14237 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18463 : { 14237 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18464 : { 14237 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18465 : { 14237 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18466 : { 14237 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18467 : { 14237 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18468 : { 14243 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18469 : { 14243 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18470 : { 14243 /* vporq */, X86::VPORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18471 : { 14243 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18472 : { 14243 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18473 : { 14243 /* vporq */, X86::VPORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18474 : { 14243 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18475 : { 14243 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18476 : { 14243 /* vporq */, X86::VPORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18477 : { 14243 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18478 : { 14243 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18479 : { 14243 /* vporq */, X86::VPORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18480 : { 14243 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18481 : { 14243 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18482 : { 14243 /* vporq */, X86::VPORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18483 : { 14243 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18484 : { 14243 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18485 : { 14243 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18486 : { 14243 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18487 : { 14243 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18488 : { 14243 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18489 : { 14243 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18490 : { 14243 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18491 : { 14243 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18492 : { 14243 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18493 : { 14243 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18494 : { 14243 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18495 : { 14249 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_3__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18496 : { 14249 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_3__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18497 : { 14249 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_3__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32, MCK_FR32 }, },
18498 : { 14256 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18499 : { 14256 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18500 : { 14256 /* vprold */, X86::VPROLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18501 : { 14256 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18502 : { 14256 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18503 : { 14256 /* vprold */, X86::VPROLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18504 : { 14256 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18505 : { 14256 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18506 : { 14256 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18507 : { 14256 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18508 : { 14256 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18509 : { 14256 /* vprold */, X86::VPROLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18510 : { 14256 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18511 : { 14256 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18512 : { 14256 /* vprold */, X86::VPROLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18513 : { 14256 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18514 : { 14256 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18515 : { 14256 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18516 : { 14256 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18517 : { 14256 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18518 : { 14256 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18519 : { 14256 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18520 : { 14256 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18521 : { 14256 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18522 : { 14256 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18523 : { 14256 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18524 : { 14256 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18525 : { 14263 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18526 : { 14263 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18527 : { 14263 /* vprolq */, X86::VPROLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18528 : { 14263 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18529 : { 14263 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18530 : { 14263 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18531 : { 14263 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18532 : { 14263 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18533 : { 14263 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18534 : { 14263 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18535 : { 14263 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18536 : { 14263 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18537 : { 14263 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18538 : { 14263 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18539 : { 14263 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18540 : { 14263 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18541 : { 14263 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18542 : { 14263 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18543 : { 14263 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18544 : { 14263 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18545 : { 14263 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18546 : { 14263 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18547 : { 14263 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18548 : { 14263 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18549 : { 14263 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18550 : { 14263 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18551 : { 14263 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18552 : { 14270 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18553 : { 14270 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18554 : { 14270 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18555 : { 14270 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18556 : { 14270 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18557 : { 14270 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18558 : { 14270 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18559 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18560 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18561 : { 14270 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18562 : { 14270 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18563 : { 14270 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18564 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18565 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18566 : { 14270 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18567 : { 14270 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18568 : { 14270 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18569 : { 14270 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18570 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18571 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18572 : { 14270 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18573 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18574 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18575 : { 14270 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18576 : { 14270 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18577 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18578 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18579 : { 14278 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18580 : { 14278 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18581 : { 14278 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18582 : { 14278 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18583 : { 14278 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18584 : { 14278 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18585 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18586 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18587 : { 14278 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18588 : { 14278 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18589 : { 14278 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18590 : { 14278 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18591 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18592 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18593 : { 14278 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18594 : { 14278 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18595 : { 14278 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18596 : { 14278 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18597 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18598 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18599 : { 14278 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18600 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18601 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18602 : { 14278 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18603 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18604 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18605 : { 14278 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18606 : { 14286 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18607 : { 14286 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18608 : { 14286 /* vprord */, X86::VPRORDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18609 : { 14286 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18610 : { 14286 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18611 : { 14286 /* vprord */, X86::VPRORDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18612 : { 14286 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
18613 : { 14286 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
18614 : { 14286 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
18615 : { 14286 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18616 : { 14286 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18617 : { 14286 /* vprord */, X86::VPRORDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18618 : { 14286 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18619 : { 14286 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18620 : { 14286 /* vprord */, X86::VPRORDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18621 : { 14286 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18622 : { 14286 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18623 : { 14286 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18624 : { 14286 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18625 : { 14286 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18626 : { 14286 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18627 : { 14286 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18628 : { 14286 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18629 : { 14286 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18630 : { 14286 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18631 : { 14286 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18632 : { 14286 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18633 : { 14293 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
18634 : { 14293 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
18635 : { 14293 /* vprorq */, X86::VPRORQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
18636 : { 14293 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
18637 : { 14293 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
18638 : { 14293 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
18639 : { 14293 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
18640 : { 14293 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
18641 : { 14293 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
18642 : { 14293 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18643 : { 14293 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18644 : { 14293 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18645 : { 14293 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18646 : { 14293 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18647 : { 14293 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18648 : { 14293 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18649 : { 14293 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18650 : { 14293 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18651 : { 14293 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18652 : { 14293 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18653 : { 14293 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18654 : { 14293 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18655 : { 14293 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18656 : { 14293 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18657 : { 14293 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18658 : { 14293 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18659 : { 14293 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18660 : { 14300 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18661 : { 14300 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18662 : { 14300 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18663 : { 14300 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18664 : { 14300 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18665 : { 14300 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18666 : { 14300 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18667 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18668 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18669 : { 14300 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18670 : { 14300 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18671 : { 14300 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18672 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18673 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18674 : { 14300 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18675 : { 14300 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18676 : { 14300 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18677 : { 14300 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18678 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18679 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18680 : { 14300 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18681 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18682 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18683 : { 14300 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18684 : { 14300 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18685 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18686 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18687 : { 14308 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18688 : { 14308 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18689 : { 14308 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18690 : { 14308 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18691 : { 14308 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18692 : { 14308 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18693 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18694 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18695 : { 14308 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18696 : { 14308 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18697 : { 14308 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18698 : { 14308 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18699 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18700 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18701 : { 14308 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18702 : { 14308 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18703 : { 14308 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18704 : { 14308 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18705 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18706 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18707 : { 14308 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18708 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18709 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18710 : { 14308 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18711 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18712 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18713 : { 14308 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18714 : { 14316 /* vprotb */, X86::VPROTBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18715 : { 14316 /* vprotb */, X86::VPROTBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18716 : { 14316 /* vprotb */, X86::VPROTBri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18717 : { 14316 /* vprotb */, X86::VPROTBmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18718 : { 14316 /* vprotb */, X86::VPROTBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18719 : { 14323 /* vprotd */, X86::VPROTDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18720 : { 14323 /* vprotd */, X86::VPROTDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18721 : { 14323 /* vprotd */, X86::VPROTDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18722 : { 14323 /* vprotd */, X86::VPROTDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18723 : { 14323 /* vprotd */, X86::VPROTDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18724 : { 14330 /* vprotq */, X86::VPROTQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18725 : { 14330 /* vprotq */, X86::VPROTQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18726 : { 14330 /* vprotq */, X86::VPROTQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18727 : { 14330 /* vprotq */, X86::VPROTQmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18728 : { 14330 /* vprotq */, X86::VPROTQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18729 : { 14337 /* vprotw */, X86::VPROTWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18730 : { 14337 /* vprotw */, X86::VPROTWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18731 : { 14337 /* vprotw */, X86::VPROTWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
18732 : { 14337 /* vprotw */, X86::VPROTWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
18733 : { 14337 /* vprotw */, X86::VPROTWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18734 : { 14344 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18735 : { 14344 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
18736 : { 14344 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18737 : { 14344 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18738 : { 14344 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18739 : { 14344 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18740 : { 14344 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18741 : { 14344 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
18742 : { 14344 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18743 : { 14344 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18744 : { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18745 : { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18746 : { 14352 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18747 : { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18748 : { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18749 : { 14364 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18750 : { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18751 : { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18752 : { 14376 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18753 : { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18754 : { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18755 : { 14388 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18756 : { 14400 /* vpshab */, X86::VPSHABrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18757 : { 14400 /* vpshab */, X86::VPSHABmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18758 : { 14400 /* vpshab */, X86::VPSHABrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18759 : { 14407 /* vpshad */, X86::VPSHADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18760 : { 14407 /* vpshad */, X86::VPSHADmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18761 : { 14407 /* vpshad */, X86::VPSHADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18762 : { 14414 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18763 : { 14414 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18764 : { 14414 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18765 : { 14421 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18766 : { 14421 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18767 : { 14421 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18768 : { 14428 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18769 : { 14428 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18770 : { 14428 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18771 : { 14435 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18772 : { 14435 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18773 : { 14435 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18774 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18775 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18776 : { 14442 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18777 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18778 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18779 : { 14442 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18780 : { 14442 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18781 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18782 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18783 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18784 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18785 : { 14442 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18786 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18787 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18788 : { 14442 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18789 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18790 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18791 : { 14442 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18792 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18793 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18794 : { 14442 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18795 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18796 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18797 : { 14442 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18798 : { 14442 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18799 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18800 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18801 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18802 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18803 : { 14450 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18804 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18805 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18806 : { 14450 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18807 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18808 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18809 : { 14450 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18810 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18811 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18812 : { 14450 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18813 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18814 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18815 : { 14450 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18816 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18817 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18818 : { 14450 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18819 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18820 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18821 : { 14450 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18822 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18823 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18824 : { 14450 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18825 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18826 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18827 : { 14450 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18828 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18829 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18830 : { 14458 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18831 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18832 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18833 : { 14458 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18834 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18835 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18836 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18837 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18838 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18839 : { 14458 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18840 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18841 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18842 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18843 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18844 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18845 : { 14458 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18846 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18847 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18848 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18849 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18850 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18851 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18852 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18853 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18854 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18855 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18856 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18857 : { 14467 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18858 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18859 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18860 : { 14467 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18861 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18862 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18863 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18864 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18865 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18866 : { 14467 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18867 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18868 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18869 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18870 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18871 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18872 : { 14467 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18873 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18874 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18875 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18876 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18877 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18878 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18879 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18880 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18881 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18882 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18883 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18884 : { 14476 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18885 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18886 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18887 : { 14476 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18888 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18889 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18890 : { 14476 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18891 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18892 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18893 : { 14476 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18894 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18895 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18896 : { 14476 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18897 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18898 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18899 : { 14476 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18900 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18901 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18902 : { 14485 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18903 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18904 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18905 : { 14485 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18906 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18907 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18908 : { 14485 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18909 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18910 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18911 : { 14485 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18912 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18913 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18914 : { 14485 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18915 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18916 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18917 : { 14485 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18918 : { 14493 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18919 : { 14493 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18920 : { 14493 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18921 : { 14500 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
18922 : { 14500 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_2__Mem1285_1__Reg1_0, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
18923 : { 14500 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
18924 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18925 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18926 : { 14507 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18927 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18928 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18929 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18930 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18931 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18932 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18933 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18934 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18935 : { 14507 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18936 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18937 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18938 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18939 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18940 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18941 : { 14507 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18942 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18943 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18944 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18945 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18946 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18947 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18948 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18949 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18950 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18951 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18952 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18953 : { 14515 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
18954 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18955 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18956 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18957 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
18958 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
18959 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
18960 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18961 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18962 : { 14515 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18963 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18964 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18965 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18966 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18967 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18968 : { 14515 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18969 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18970 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18971 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18972 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18973 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18974 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18975 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18976 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18977 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18978 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
18979 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
18980 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
18981 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
18982 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
18983 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
18984 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
18985 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
18986 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
18987 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18988 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18989 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18990 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18991 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18992 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18993 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18994 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18995 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18996 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18997 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
18998 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
18999 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19000 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19001 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19002 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19003 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19004 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19005 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19006 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19007 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19008 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19009 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19010 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19011 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19012 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19013 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19014 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19015 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19016 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19017 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19018 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19019 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19020 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19021 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19022 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19023 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19024 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19025 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19026 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19027 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19028 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19029 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19030 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19031 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19032 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19033 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19034 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_2__Tie0_1_1__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19035 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19036 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19037 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_2__Tie0_1_1__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19038 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19039 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19040 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19041 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19042 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19043 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19044 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19045 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19046 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19047 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19048 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19049 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19050 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19051 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19052 : { 14550 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
19053 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19054 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19055 : { 14550 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19056 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19057 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19058 : { 14550 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19059 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19060 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19061 : { 14550 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19062 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19063 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19064 : { 14550 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19065 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19066 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19067 : { 14550 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19068 : { 14558 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19069 : { 14558 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19070 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19071 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19072 : { 14558 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19073 : { 14558 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19074 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19075 : { 14558 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19076 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19077 : { 14558 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19078 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19079 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19080 : { 14558 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19081 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19082 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19083 : { 14558 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19084 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19085 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19086 : { 14558 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19087 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19088 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19089 : { 14558 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19090 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
19091 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
19092 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
19093 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
19094 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
19095 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
19096 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19097 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19098 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19099 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19100 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19101 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19102 : { 14579 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19103 : { 14579 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19104 : { 14579 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19105 : { 14579 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19106 : { 14579 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19107 : { 14579 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19108 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19109 : { 14579 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
19110 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19111 : { 14579 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19112 : { 14579 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19113 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19114 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19115 : { 14579 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19116 : { 14579 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19117 : { 14579 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19118 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19119 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19120 : { 14579 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19121 : { 14579 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19122 : { 14579 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19123 : { 14579 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19124 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19125 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19126 : { 14579 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19127 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19128 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19129 : { 14579 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19130 : { 14579 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19131 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19132 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19133 : { 14587 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19134 : { 14587 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19135 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19136 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19137 : { 14587 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19138 : { 14587 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19139 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19140 : { 14587 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
19141 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19142 : { 14587 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19143 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19144 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19145 : { 14587 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19146 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19147 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19148 : { 14587 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19149 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19150 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19151 : { 14587 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19152 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19153 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19154 : { 14587 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19155 : { 14596 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19156 : { 14596 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19157 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19158 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19159 : { 14596 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19160 : { 14596 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
19161 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19162 : { 14596 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
19163 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19164 : { 14596 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19165 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19166 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19167 : { 14596 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19168 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19169 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19170 : { 14596 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19171 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19172 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19173 : { 14596 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19174 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19175 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19176 : { 14596 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19177 : { 14605 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19178 : { 14605 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19179 : { 14605 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19180 : { 14605 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19181 : { 14613 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19182 : { 14613 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19183 : { 14613 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19184 : { 14613 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19185 : { 14621 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19186 : { 14621 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19187 : { 14621 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19188 : { 14621 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19189 : { 14629 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19190 : { 14629 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19191 : { 14629 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19192 : { 14629 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19193 : { 14629 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19194 : { 14629 /* vpslld */, X86::VPSLLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19195 : { 14629 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19196 : { 14629 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19197 : { 14629 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19198 : { 14629 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19199 : { 14629 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19200 : { 14629 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19201 : { 14629 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19202 : { 14629 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19203 : { 14629 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19204 : { 14629 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19205 : { 14629 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19206 : { 14629 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19207 : { 14629 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19208 : { 14629 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19209 : { 14629 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19210 : { 14629 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19211 : { 14629 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19212 : { 14629 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19213 : { 14629 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19214 : { 14629 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19215 : { 14629 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19216 : { 14629 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19217 : { 14629 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19218 : { 14629 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19219 : { 14629 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19220 : { 14629 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19221 : { 14629 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19222 : { 14629 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19223 : { 14629 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19224 : { 14629 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19225 : { 14629 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19226 : { 14629 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19227 : { 14629 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19228 : { 14629 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19229 : { 14629 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19230 : { 14629 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19231 : { 14629 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19232 : { 14629 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19233 : { 14629 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19234 : { 14629 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19235 : { 14629 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19236 : { 14629 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19237 : { 14629 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19238 : { 14629 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19239 : { 14629 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19240 : { 14636 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19241 : { 14636 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19242 : { 14636 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19243 : { 14636 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19244 : { 14636 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19245 : { 14636 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19246 : { 14636 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19247 : { 14636 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19248 : { 14644 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19249 : { 14644 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19250 : { 14644 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19251 : { 14644 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19252 : { 14644 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19253 : { 14644 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19254 : { 14644 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19255 : { 14644 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19256 : { 14644 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19257 : { 14644 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19258 : { 14644 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19259 : { 14644 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19260 : { 14644 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19261 : { 14644 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19262 : { 14644 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19263 : { 14644 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19264 : { 14644 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19265 : { 14644 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19266 : { 14644 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19267 : { 14644 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19268 : { 14644 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19269 : { 14644 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19270 : { 14644 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19271 : { 14644 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19272 : { 14644 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19273 : { 14644 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19274 : { 14644 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19275 : { 14644 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19276 : { 14644 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19277 : { 14644 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19278 : { 14644 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19279 : { 14644 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19280 : { 14644 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19281 : { 14644 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19282 : { 14644 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19283 : { 14644 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19284 : { 14644 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19285 : { 14644 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19286 : { 14644 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19287 : { 14644 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19288 : { 14644 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19289 : { 14644 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19290 : { 14644 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19291 : { 14644 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19292 : { 14644 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19293 : { 14644 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19294 : { 14644 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19295 : { 14644 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19296 : { 14644 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19297 : { 14644 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19298 : { 14644 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19299 : { 14651 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19300 : { 14651 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19301 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19302 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19303 : { 14651 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19304 : { 14651 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19305 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19306 : { 14651 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19307 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19308 : { 14651 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19309 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19310 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19311 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19312 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19313 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19314 : { 14651 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19315 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19316 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19317 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19318 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19319 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19320 : { 14651 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19321 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19322 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19323 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19324 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19325 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19326 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19327 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19328 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19329 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19330 : { 14659 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19331 : { 14659 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19332 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19333 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19334 : { 14659 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19335 : { 14659 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19336 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19337 : { 14659 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19338 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19339 : { 14659 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19340 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19341 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19342 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19343 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19344 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19345 : { 14659 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19346 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19347 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19348 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19349 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19350 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19351 : { 14659 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19352 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19353 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19354 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19355 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19356 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19357 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19358 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19359 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19360 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19361 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19362 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19363 : { 14667 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19364 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19365 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19366 : { 14667 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19367 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19368 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19369 : { 14667 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19370 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19371 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19372 : { 14667 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19373 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19374 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19375 : { 14667 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19376 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19377 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19378 : { 14667 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19379 : { 14675 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19380 : { 14675 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19381 : { 14675 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19382 : { 14675 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19383 : { 14675 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19384 : { 14675 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19385 : { 14675 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19386 : { 14675 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19387 : { 14675 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19388 : { 14675 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19389 : { 14675 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19390 : { 14675 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19391 : { 14675 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19392 : { 14675 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19393 : { 14675 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19394 : { 14675 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19395 : { 14675 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19396 : { 14675 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19397 : { 14675 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19398 : { 14675 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19399 : { 14675 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19400 : { 14675 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19401 : { 14675 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19402 : { 14675 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19403 : { 14675 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19404 : { 14675 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19405 : { 14675 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19406 : { 14675 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19407 : { 14675 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19408 : { 14675 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19409 : { 14675 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19410 : { 14675 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19411 : { 14675 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19412 : { 14675 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19413 : { 14675 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19414 : { 14675 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19415 : { 14675 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19416 : { 14675 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19417 : { 14675 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19418 : { 14675 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19419 : { 14675 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19420 : { 14675 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19421 : { 14682 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19422 : { 14682 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19423 : { 14682 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19424 : { 14682 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19425 : { 14682 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19426 : { 14682 /* vpsrad */, X86::VPSRADri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19427 : { 14682 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19428 : { 14682 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19429 : { 14682 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19430 : { 14682 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19431 : { 14682 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19432 : { 14682 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19433 : { 14682 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19434 : { 14682 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19435 : { 14682 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19436 : { 14682 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19437 : { 14682 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19438 : { 14682 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19439 : { 14682 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19440 : { 14682 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19441 : { 14682 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19442 : { 14682 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19443 : { 14682 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19444 : { 14682 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19445 : { 14682 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19446 : { 14682 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19447 : { 14682 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19448 : { 14682 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19449 : { 14682 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19450 : { 14682 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19451 : { 14682 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19452 : { 14682 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19453 : { 14682 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19454 : { 14682 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19455 : { 14682 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19456 : { 14682 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19457 : { 14682 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19458 : { 14682 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19459 : { 14682 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19460 : { 14682 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19461 : { 14682 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19462 : { 14682 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19463 : { 14682 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19464 : { 14682 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19465 : { 14682 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19466 : { 14682 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19467 : { 14682 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19468 : { 14682 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19469 : { 14682 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19470 : { 14682 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19471 : { 14682 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19472 : { 14689 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19473 : { 14689 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19474 : { 14689 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19475 : { 14689 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19476 : { 14689 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19477 : { 14689 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19478 : { 14689 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19479 : { 14689 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19480 : { 14689 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19481 : { 14689 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19482 : { 14689 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19483 : { 14689 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19484 : { 14689 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19485 : { 14689 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19486 : { 14689 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19487 : { 14689 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19488 : { 14689 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19489 : { 14689 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19490 : { 14689 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19491 : { 14689 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19492 : { 14689 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19493 : { 14689 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19494 : { 14689 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19495 : { 14689 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19496 : { 14689 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19497 : { 14689 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19498 : { 14689 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19499 : { 14689 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19500 : { 14689 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19501 : { 14689 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19502 : { 14689 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19503 : { 14689 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19504 : { 14689 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19505 : { 14689 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19506 : { 14689 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19507 : { 14689 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19508 : { 14689 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19509 : { 14689 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19510 : { 14689 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19511 : { 14689 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19512 : { 14689 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19513 : { 14689 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19514 : { 14689 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19515 : { 14689 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19516 : { 14689 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19517 : { 14696 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19518 : { 14696 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19519 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19520 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19521 : { 14696 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19522 : { 14696 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19523 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19524 : { 14696 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19525 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19526 : { 14696 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19527 : { 14696 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19528 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19529 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19530 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19531 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19532 : { 14696 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19533 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19534 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19535 : { 14696 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19536 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19537 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19538 : { 14696 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19539 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19540 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19541 : { 14696 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19542 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19543 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19544 : { 14696 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19545 : { 14696 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19546 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19547 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19548 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19549 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19550 : { 14704 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19551 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19552 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19553 : { 14704 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19554 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19555 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19556 : { 14704 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19557 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19558 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19559 : { 14704 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19560 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19561 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19562 : { 14704 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19563 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19564 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19565 : { 14704 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19566 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19567 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19568 : { 14704 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19569 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19570 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19571 : { 14704 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19572 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19573 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19574 : { 14704 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19575 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19576 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19577 : { 14712 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19578 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19579 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19580 : { 14712 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19581 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19582 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19583 : { 14712 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19584 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19585 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19586 : { 14712 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19587 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19588 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19589 : { 14712 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19590 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19591 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19592 : { 14712 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19593 : { 14720 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19594 : { 14720 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19595 : { 14720 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19596 : { 14720 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19597 : { 14720 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19598 : { 14720 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19599 : { 14720 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19600 : { 14720 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19601 : { 14720 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19602 : { 14720 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19603 : { 14720 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19604 : { 14720 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19605 : { 14720 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19606 : { 14720 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19607 : { 14720 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19608 : { 14720 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19609 : { 14720 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19610 : { 14720 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19611 : { 14720 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19612 : { 14720 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19613 : { 14720 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19614 : { 14720 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19615 : { 14720 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19616 : { 14720 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19617 : { 14720 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19618 : { 14720 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19619 : { 14720 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19620 : { 14720 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19621 : { 14720 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19622 : { 14720 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19623 : { 14720 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19624 : { 14720 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19625 : { 14720 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19626 : { 14720 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19627 : { 14720 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19628 : { 14720 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19629 : { 14720 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19630 : { 14720 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19631 : { 14720 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19632 : { 14720 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19633 : { 14720 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19634 : { 14720 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19635 : { 14727 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19636 : { 14727 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19637 : { 14727 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19638 : { 14727 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19639 : { 14727 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19640 : { 14727 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19641 : { 14727 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19642 : { 14727 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19643 : { 14727 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19644 : { 14727 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19645 : { 14727 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19646 : { 14727 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19647 : { 14727 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19648 : { 14727 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19649 : { 14727 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19650 : { 14727 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19651 : { 14727 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19652 : { 14727 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19653 : { 14727 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
19654 : { 14727 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
19655 : { 14727 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
19656 : { 14727 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19657 : { 14727 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19658 : { 14727 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19659 : { 14727 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19660 : { 14727 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19661 : { 14727 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19662 : { 14727 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19663 : { 14727 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19664 : { 14727 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19665 : { 14727 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19666 : { 14727 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19667 : { 14727 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19668 : { 14727 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19669 : { 14727 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19670 : { 14727 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19671 : { 14727 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19672 : { 14727 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19673 : { 14727 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19674 : { 14727 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19675 : { 14727 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19676 : { 14727 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19677 : { 14727 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19678 : { 14727 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19679 : { 14727 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19680 : { 14727 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19681 : { 14727 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19682 : { 14727 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19683 : { 14727 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19684 : { 14727 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19685 : { 14727 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19686 : { 14734 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19687 : { 14734 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19688 : { 14734 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19689 : { 14734 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19690 : { 14734 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19691 : { 14734 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19692 : { 14734 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19693 : { 14734 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19694 : { 14742 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19695 : { 14742 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19696 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19697 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19698 : { 14742 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19699 : { 14742 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19700 : { 14742 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19701 : { 14742 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19702 : { 14742 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19703 : { 14742 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19704 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19705 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19706 : { 14742 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19707 : { 14742 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19708 : { 14742 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19709 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19710 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19711 : { 14742 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19712 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
19713 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
19714 : { 14742 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
19715 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19716 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19717 : { 14742 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19718 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19719 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19720 : { 14742 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19721 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19722 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19723 : { 14742 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19724 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19725 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19726 : { 14742 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19727 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19728 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19729 : { 14742 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19730 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19731 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19732 : { 14742 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19733 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19734 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19735 : { 14742 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19736 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19737 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19738 : { 14742 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19739 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19740 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19741 : { 14742 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19742 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19743 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19744 : { 14742 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19745 : { 14749 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19746 : { 14749 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19747 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19748 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19749 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19750 : { 14749 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19751 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19752 : { 14749 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19753 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19754 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19755 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19756 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19757 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19758 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19759 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19760 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19761 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19762 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19763 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19764 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19765 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19766 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19767 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19768 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19769 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19770 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19771 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19772 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19773 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19774 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19775 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19776 : { 14757 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19777 : { 14757 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19778 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19779 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19780 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19781 : { 14757 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19782 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19783 : { 14757 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19784 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19785 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19786 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19787 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19788 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19789 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19790 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19791 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19792 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19793 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19794 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19795 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19796 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19797 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19798 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19799 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19800 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19801 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19802 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19803 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19804 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19805 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19806 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19807 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19808 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19809 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19810 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19811 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19812 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19813 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19814 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19815 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19816 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19817 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19818 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19819 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19820 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19821 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19822 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19823 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19824 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19825 : { 14773 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19826 : { 14773 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_VR256, MCK_VR256 }, },
19827 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19828 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X }, },
19829 : { 14773 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512 }, },
19830 : { 14773 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
19831 : { 14773 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
19832 : { 14773 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
19833 : { 14773 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
19834 : { 14773 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
19835 : { 14773 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
19836 : { 14773 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
19837 : { 14773 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
19838 : { 14773 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19839 : { 14773 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256, MCK_VR256 }, },
19840 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19841 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X }, },
19842 : { 14773 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512 }, },
19843 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19844 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19845 : { 14773 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19846 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19847 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19848 : { 14773 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19849 : { 14773 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19850 : { 14773 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19851 : { 14773 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19852 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19853 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19854 : { 14773 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19855 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19856 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19857 : { 14773 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19858 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19859 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19860 : { 14773 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19861 : { 14773 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19862 : { 14773 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19863 : { 14773 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19864 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19865 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19866 : { 14773 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19867 : { 14780 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19868 : { 14780 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19869 : { 14780 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19870 : { 14780 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19871 : { 14780 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19872 : { 14780 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19873 : { 14780 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19874 : { 14780 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19875 : { 14780 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19876 : { 14780 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19877 : { 14780 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19878 : { 14780 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19879 : { 14780 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19880 : { 14780 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19881 : { 14780 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19882 : { 14780 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19883 : { 14780 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19884 : { 14780 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19885 : { 14780 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19886 : { 14780 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19887 : { 14780 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19888 : { 14780 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19889 : { 14787 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19890 : { 14787 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19891 : { 14787 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19892 : { 14787 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19893 : { 14787 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19894 : { 14787 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19895 : { 14787 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19896 : { 14787 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19897 : { 14787 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19898 : { 14787 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19899 : { 14787 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
19900 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
19901 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
19902 : { 14787 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19903 : { 14787 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19904 : { 14787 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19905 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19906 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19907 : { 14787 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19908 : { 14787 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19909 : { 14787 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19910 : { 14787 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19911 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19912 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19913 : { 14787 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19914 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19915 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19916 : { 14787 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19917 : { 14787 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19918 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19919 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19920 : { 14794 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19921 : { 14794 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19922 : { 14794 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19923 : { 14794 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19924 : { 14794 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19925 : { 14794 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19926 : { 14794 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19927 : { 14794 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19928 : { 14794 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19929 : { 14794 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19930 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
19931 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
19932 : { 14794 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
19933 : { 14794 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19934 : { 14794 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19935 : { 14794 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19936 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19937 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19938 : { 14794 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19939 : { 14794 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19940 : { 14794 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19941 : { 14794 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19942 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19943 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19944 : { 14794 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19945 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19946 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19947 : { 14794 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19948 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19949 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19950 : { 14794 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19951 : { 14801 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19952 : { 14801 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19953 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19954 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19955 : { 14801 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19956 : { 14801 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19957 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19958 : { 14801 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19959 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19960 : { 14801 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19961 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19962 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19963 : { 14801 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19964 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19965 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19966 : { 14801 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19967 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19968 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19969 : { 14801 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19970 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19971 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19972 : { 14801 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19973 : { 14809 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19974 : { 14809 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19975 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19976 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19977 : { 14809 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
19978 : { 14809 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
19979 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
19980 : { 14809 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
19981 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
19982 : { 14809 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
19983 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19984 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19985 : { 14809 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19986 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19987 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19988 : { 14809 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
19989 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19990 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19991 : { 14809 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19992 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19993 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19994 : { 14809 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
19995 : { 14817 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
19996 : { 14817 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
19997 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
19998 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
19999 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20000 : { 14817 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20001 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20002 : { 14817 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20003 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20004 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20005 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20006 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20007 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20008 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20009 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20010 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20011 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20012 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20013 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20014 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20015 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20016 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20017 : { 14826 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20018 : { 14826 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20019 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20020 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20021 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20022 : { 14826 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20023 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20024 : { 14826 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20025 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20026 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20027 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20028 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20029 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20030 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20031 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20032 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20033 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20034 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20035 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20036 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20037 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20038 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20039 : { 14835 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20040 : { 14835 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20041 : { 14835 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20042 : { 14835 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20043 : { 14835 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20044 : { 14835 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20045 : { 14835 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20046 : { 14835 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20047 : { 14835 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20048 : { 14835 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20049 : { 14835 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20050 : { 14835 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20051 : { 14835 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20052 : { 14835 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20053 : { 14835 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20054 : { 14835 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20055 : { 14835 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20056 : { 14835 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20057 : { 14835 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20058 : { 14835 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20059 : { 14835 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20060 : { 14835 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20061 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20062 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20063 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20064 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20065 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20066 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20067 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20068 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20069 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20070 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20071 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20072 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20073 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20074 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20075 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20076 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20077 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20078 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20079 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20080 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20081 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20082 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20083 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20084 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20085 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20086 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20087 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20088 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20089 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20090 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_3__Tie0_1_1__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20091 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20092 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20093 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_3__Tie0_1_1__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20094 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20095 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20096 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_4__Tie0_1_1__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20097 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20098 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20099 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20100 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20101 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20102 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20103 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20104 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20105 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20106 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20107 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20108 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20109 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20110 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20111 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20112 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20113 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20114 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20115 : { 14864 /* vptest */, X86::VPTESTrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20116 : { 14864 /* vptest */, X86::VPTESTYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20117 : { 14864 /* vptest */, X86::VPTESTrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20118 : { 14864 /* vptest */, X86::VPTESTYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20119 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20120 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20121 : { 14871 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20122 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20123 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20124 : { 14871 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20125 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20126 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20127 : { 14871 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20128 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20129 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20130 : { 14871 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20131 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20132 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20133 : { 14880 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20134 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20135 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20136 : { 14880 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20137 : { 14880 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
20138 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
20139 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
20140 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20141 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20142 : { 14880 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20143 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20144 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20145 : { 14880 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20146 : { 14880 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20147 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20148 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20149 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20150 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20151 : { 14889 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20152 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20153 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20154 : { 14889 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20155 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
20156 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
20157 : { 14889 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
20158 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20159 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20160 : { 14889 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20161 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20162 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20163 : { 14889 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20164 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20165 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20166 : { 14889 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20167 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20168 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20169 : { 14898 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20170 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20171 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20172 : { 14898 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20173 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20174 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20175 : { 14898 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20176 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20177 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20178 : { 14898 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20179 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20180 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20181 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20182 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20183 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20184 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20185 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20186 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20187 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20188 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20189 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20190 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20191 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20192 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20193 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20194 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20195 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20196 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20197 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1 }, },
20198 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1 }, },
20199 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1 }, },
20200 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20201 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20202 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20203 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20204 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20205 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20206 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20207 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20208 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20209 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20210 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20211 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20212 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20213 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20214 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20215 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1 }, },
20216 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1 }, },
20217 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1 }, },
20218 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20219 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20220 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20221 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20222 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20223 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20224 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20225 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20226 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20227 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1 }, },
20228 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1 }, },
20229 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1 }, },
20230 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1 }, },
20231 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1 }, },
20232 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1 }, },
20233 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20234 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20235 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20236 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20237 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20238 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20239 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20240 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20241 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20242 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20243 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20244 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20245 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20246 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20247 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20248 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20249 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20250 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20251 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20252 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20253 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20254 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20255 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20256 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20257 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20258 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20259 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20260 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20261 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20262 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20263 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20264 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20265 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20266 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20267 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20268 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20269 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20270 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20271 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20272 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20273 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20274 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20275 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20276 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20277 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20278 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20279 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20280 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20281 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20282 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20283 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20284 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20285 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20286 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20287 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20288 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20289 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20290 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20291 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20292 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20293 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20294 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20295 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20296 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20297 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20298 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20299 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20300 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20301 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20302 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20303 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20304 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20305 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20306 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20307 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20308 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20309 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20310 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20311 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20312 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20313 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20314 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20315 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20316 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20317 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20318 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20319 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20320 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20321 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20322 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20323 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20324 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20325 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20326 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20327 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20328 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20329 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20330 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20331 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20332 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20333 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20334 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20335 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20336 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20337 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20338 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20339 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20340 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20341 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20342 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20343 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20344 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20345 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20346 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20347 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20348 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20349 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20350 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20351 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20352 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20353 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20354 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20355 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20356 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20357 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20358 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20359 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20360 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20361 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20362 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20363 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20364 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20365 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20366 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20367 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20368 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20369 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20370 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20371 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20372 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20373 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20374 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20375 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20376 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20377 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20378 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20379 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20380 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20381 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20382 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20383 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20384 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20385 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20386 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20387 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20388 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20389 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20390 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20391 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20392 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20393 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20394 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20395 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20396 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20397 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20398 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20399 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20400 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20401 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20402 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20403 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20404 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20405 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20406 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20407 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20408 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20409 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20410 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20411 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20412 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20413 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20414 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20415 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20416 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20417 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20418 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20419 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20420 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20421 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20422 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20423 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20424 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20425 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20426 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20427 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20428 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20429 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20430 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20431 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20432 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20433 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20434 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20435 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20436 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20437 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20438 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20439 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20440 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20441 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20442 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20443 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20444 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20445 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20446 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20447 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20448 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20449 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20450 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20451 : { 15037 /* vpxor */, X86::VPXORrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20452 : { 15037 /* vpxor */, X86::VPXORYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
20453 : { 15037 /* vpxor */, X86::VPXORrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
20454 : { 15037 /* vpxor */, X86::VPXORYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
20455 : { 15043 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20456 : { 15043 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20457 : { 15043 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20458 : { 15043 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20459 : { 15043 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20460 : { 15043 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20461 : { 15043 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20462 : { 15043 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20463 : { 15043 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20464 : { 15043 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20465 : { 15043 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20466 : { 15043 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20467 : { 15043 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20468 : { 15043 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20469 : { 15043 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20470 : { 15043 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20471 : { 15043 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20472 : { 15043 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20473 : { 15043 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20474 : { 15043 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20475 : { 15043 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20476 : { 15043 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20477 : { 15043 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20478 : { 15043 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20479 : { 15043 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20480 : { 15043 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20481 : { 15043 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20482 : { 15050 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20483 : { 15050 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20484 : { 15050 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20485 : { 15050 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20486 : { 15050 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20487 : { 15050 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20488 : { 15050 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20489 : { 15050 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20490 : { 15050 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20491 : { 15050 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20492 : { 15050 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20493 : { 15050 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20494 : { 15050 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20495 : { 15050 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20496 : { 15050 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20497 : { 15050 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20498 : { 15050 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20499 : { 15050 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20500 : { 15050 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20501 : { 15050 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20502 : { 15050 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20503 : { 15050 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20504 : { 15050 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20505 : { 15050 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20506 : { 15050 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20507 : { 15050 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20508 : { 15050 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20509 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20510 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20511 : { 15057 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20512 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20513 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20514 : { 15057 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20515 : { 15057 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20516 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20517 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20518 : { 15057 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20519 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20520 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20521 : { 15057 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20522 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20523 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20524 : { 15057 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20525 : { 15057 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20526 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20527 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20528 : { 15057 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20529 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20530 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20531 : { 15057 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20532 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20533 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20534 : { 15057 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20535 : { 15057 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20536 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20537 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20538 : { 15057 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20539 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20540 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20541 : { 15066 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20542 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20543 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20544 : { 15066 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20545 : { 15066 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20546 : { 15066 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
20547 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
20548 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
20549 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20550 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20551 : { 15066 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20552 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20553 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20554 : { 15066 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20555 : { 15066 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20556 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20557 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20558 : { 15066 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20559 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20560 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20561 : { 15066 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20562 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20563 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20564 : { 15066 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20565 : { 15066 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20566 : { 15066 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20567 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20568 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20569 : { 15075 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20570 : { 15075 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20571 : { 15075 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20572 : { 15075 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20573 : { 15075 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20574 : { 15075 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20575 : { 15075 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20576 : { 15075 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20577 : { 15075 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20578 : { 15084 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20579 : { 15084 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20580 : { 15084 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20581 : { 15084 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20582 : { 15084 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20583 : { 15084 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20584 : { 15084 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20585 : { 15084 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20586 : { 15084 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20587 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20588 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20589 : { 15093 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20590 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20591 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20592 : { 15093 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20593 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20594 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20595 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20596 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20597 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20598 : { 15093 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20599 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20600 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20601 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20602 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20603 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20604 : { 15093 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20605 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20606 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20607 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20608 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20609 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20610 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20611 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20612 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20613 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20614 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20615 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20616 : { 15102 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20617 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20618 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20619 : { 15102 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20620 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20621 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20622 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20623 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20624 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20625 : { 15102 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20626 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20627 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20628 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20629 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20630 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20631 : { 15102 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20632 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20633 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20634 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20635 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20636 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20637 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20638 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20639 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20640 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20641 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20642 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20643 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20644 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20645 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20646 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20647 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20648 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20649 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20650 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20651 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20652 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20653 : { 15129 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20654 : { 15129 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20655 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20656 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20657 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20658 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20659 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20660 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20661 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20662 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20663 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20664 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20665 : { 15138 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20666 : { 15138 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20667 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20668 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20669 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20670 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20671 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20672 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20673 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20674 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20675 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20676 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20677 : { 15147 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20678 : { 15147 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20679 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20680 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20681 : { 15147 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20682 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20683 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20684 : { 15147 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20685 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20686 : { 15156 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20687 : { 15156 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20688 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20689 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20690 : { 15156 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20691 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20692 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20693 : { 15156 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20694 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20695 : { 15165 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20696 : { 15165 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20697 : { 15165 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20698 : { 15165 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20699 : { 15172 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20700 : { 15172 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20701 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20702 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20703 : { 15179 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20704 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20705 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20706 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20707 : { 15179 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20708 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20709 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20710 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20711 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20712 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20713 : { 15179 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20714 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20715 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20716 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20717 : { 15179 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20718 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20719 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20720 : { 15179 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20721 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20722 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20723 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20724 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20725 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20726 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20727 : { 15179 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20728 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20729 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20730 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20731 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20732 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20733 : { 15189 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20734 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20735 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20736 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20737 : { 15189 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20738 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20739 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20740 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20741 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20742 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20743 : { 15189 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20744 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20745 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20746 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20747 : { 15189 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20748 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20749 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20750 : { 15189 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20751 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20752 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20753 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20754 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20755 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20756 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20757 : { 15189 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20758 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20759 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20760 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20761 : { 15199 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20762 : { 15199 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20763 : { 15199 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20764 : { 15199 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20765 : { 15199 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20766 : { 15199 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20767 : { 15199 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20768 : { 15199 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20769 : { 15199 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20770 : { 15209 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20771 : { 15209 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20772 : { 15209 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20773 : { 15209 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20774 : { 15209 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20775 : { 15209 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20776 : { 15209 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20777 : { 15209 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20778 : { 15209 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20779 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20780 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20781 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20782 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20783 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20784 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20785 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20786 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20787 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20788 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20789 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20790 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20791 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20792 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20793 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20794 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20795 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20796 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20797 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20798 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20799 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20800 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20801 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20802 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20803 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20804 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20805 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20806 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20807 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20808 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_3__Reg1_5__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20809 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X }, },
20810 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X }, },
20811 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512 }, },
20812 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X }, },
20813 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X }, },
20814 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512 }, },
20815 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20816 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20817 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20818 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20819 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20820 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20821 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20822 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20823 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20824 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20825 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20826 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20827 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20828 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_2__Reg1_4__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20829 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_2__Reg1_4__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20830 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_2__Reg1_4__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20831 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20832 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20833 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20834 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_2__Reg1_4__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20835 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_3__Reg1_5__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20836 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20837 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20838 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_3__Reg1_5__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20839 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20840 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20841 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20842 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20843 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20844 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20845 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20846 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20847 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20848 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20849 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20850 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_4__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20851 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20852 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20853 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20854 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20855 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20856 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_4__Reg1_6__Reg1_3__Reg1_2__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20857 : { 15267 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20858 : { 15267 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20859 : { 15267 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20860 : { 15267 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20861 : { 15276 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32 }, },
20862 : { 15276 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256 }, },
20863 : { 15276 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32 }, },
20864 : { 15276 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256 }, },
20865 : { 15285 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20866 : { 15285 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_3__Reg1_2__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK_FR32, MCK_FR32 }, },
20867 : { 15294 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
20868 : { 15294 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_3__Reg1_2__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20869 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20870 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20871 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20872 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20873 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20874 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20875 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
20876 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
20877 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20878 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20879 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20880 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20881 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20882 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20883 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20884 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20885 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20886 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20887 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20888 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20889 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20890 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20891 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20892 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20893 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20894 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20895 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20896 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
20897 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
20898 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20899 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
20900 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
20901 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20902 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20903 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
20904 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
20905 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20906 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20907 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20908 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20909 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20910 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20911 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20912 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20913 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20914 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20915 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20916 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20917 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20918 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20919 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20920 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20921 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20922 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20923 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20924 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20925 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20926 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20927 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20928 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20929 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20930 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20931 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20932 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20933 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20934 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20935 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20936 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20937 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20938 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
20939 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20940 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20941 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20942 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20943 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20944 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20945 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20946 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20947 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
20948 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
20949 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512 }, },
20950 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
20951 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20952 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20953 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20954 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20955 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20956 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20957 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1, 0, { MCK__123_sae_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20958 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20959 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20960 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
20961 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20962 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20963 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20964 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20965 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20966 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20967 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20968 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20969 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
20970 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_3__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20971 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20972 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20973 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20974 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20975 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20976 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
20977 : { 15391 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
20978 : { 15391 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
20979 : { 15391 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
20980 : { 15391 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
20981 : { 15400 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
20982 : { 15400 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
20983 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
20984 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
20985 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
20986 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
20987 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
20988 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
20989 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
20990 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
20991 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
20992 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
20993 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20994 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20995 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20996 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20997 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20998 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
20999 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21000 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21001 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21002 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21003 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21004 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21005 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21006 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21007 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21008 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21009 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21010 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21011 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21012 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21013 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21014 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21015 : { 15419 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21016 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21017 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21018 : { 15419 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21019 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21020 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21021 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21022 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21023 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21024 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21025 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21026 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21027 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21028 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21029 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21030 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21031 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21032 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21033 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21034 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21035 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21036 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21037 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21038 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21039 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21040 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21041 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21042 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21043 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21044 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21045 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21046 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21047 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21048 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21049 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21050 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21051 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21052 : { 15439 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21053 : { 15439 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21054 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21055 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21056 : { 15439 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21057 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21058 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21059 : { 15439 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21060 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21061 : { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21062 : { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_3__Mem256_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21063 : { 15449 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_3__Mem512_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21064 : { 15461 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21065 : { 15461 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21066 : { 15461 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21067 : { 15473 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21068 : { 15488 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21069 : { 15503 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21070 : { 15518 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21071 : { 15533 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_2__Mem512_RC256X5_0, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21072 : { 15548 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21073 : { 15563 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_2__Mem512_RC5125_0, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21074 : { 15578 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_2__Mem256_RC5125_0, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21075 : { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_3__Mem128_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21076 : { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_3__Mem256_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21077 : { 15593 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_3__Mem512_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR512, MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21078 : { 15605 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_3__Mem128_RC256X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21079 : { 15605 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_3__Mem64_RC128X5_1__Tie0_4_4__Reg1_0, 0, { MCK_FR32X, MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21080 : { 15605 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_3__Mem256_RC5125_1__Tie0_4_4__Reg1_0, 0, { MCK_VR256X, MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21081 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21082 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21083 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21084 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21085 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21086 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21087 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21088 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21089 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21090 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21091 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21092 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21093 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21094 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21095 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21096 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21097 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21098 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21099 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21100 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21101 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21102 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21103 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21104 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21105 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21106 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21107 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21108 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21109 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21110 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21111 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21112 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21113 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21114 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21115 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21116 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21117 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21118 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21119 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21120 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21121 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21122 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21123 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21124 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21125 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21126 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21127 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21128 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21129 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21130 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21131 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21132 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21133 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21134 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21135 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21136 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21137 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21138 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21139 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21140 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21141 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21142 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21143 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21144 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21145 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21146 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21147 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21148 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21149 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21150 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21151 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21152 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21153 : { 15661 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21154 : { 15661 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
21155 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21156 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21157 : { 15661 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21158 : { 15661 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21159 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21160 : { 15661 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21161 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21162 : { 15661 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21163 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21164 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21165 : { 15661 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_4__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21166 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21167 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21168 : { 15661 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21169 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21170 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21171 : { 15661 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21172 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21173 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21174 : { 15661 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21175 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21176 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21177 : { 15661 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21178 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21179 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21180 : { 15661 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21181 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21182 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21183 : { 15661 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem645_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21184 : { 15669 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32, MCK_FR32, MCK_FR32 }, },
21185 : { 15669 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256, MCK_VR256, MCK_VR256 }, },
21186 : { 15669 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21187 : { 15669 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21188 : { 15669 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_3__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21189 : { 15669 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21190 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_3__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21191 : { 15669 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21192 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_3__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21193 : { 15669 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_3__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21194 : { 15669 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21195 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21196 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_4__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21197 : { 15669 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21198 : { 15669 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21199 : { 15669 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21200 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21201 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21202 : { 15669 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21203 : { 15669 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21204 : { 15669 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21205 : { 15669 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21206 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem1285_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21207 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem2565_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21208 : { 15669 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21209 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21210 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_4__Tie0_1_1__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21211 : { 15669 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem5125_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21212 : { 15669 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21213 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21214 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_4__Reg1_6__Reg1_3__Mem325_1__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21215 : { 15677 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21216 : { 15677 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21217 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
21218 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
21219 : { 15677 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
21220 : { 15677 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21221 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
21222 : { 15677 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21223 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
21224 : { 15677 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
21225 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
21226 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X }, },
21227 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X }, },
21228 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512 }, },
21229 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21230 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21231 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21232 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21233 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21234 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21235 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21236 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21237 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21238 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21239 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21240 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21241 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21242 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21243 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21244 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21245 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21246 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21247 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21248 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_2__Reg1_4__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21249 : { 15685 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21250 : { 15685 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21251 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
21252 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X }, },
21253 : { 15685 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512 }, },
21254 : { 15685 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21255 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X }, },
21256 : { 15685 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21257 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X }, },
21258 : { 15685 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512 }, },
21259 : { 15685 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512 }, },
21260 : { 15685 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512 }, },
21261 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X }, },
21262 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X }, },
21263 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21264 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21265 : { 15685 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21266 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21267 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21268 : { 15685 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_1__Tie0_1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21269 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21270 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21271 : { 15685 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_1__Reg1_3__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21272 : { 15685 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21273 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_1__Reg1_3__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21274 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_1__Reg1_3__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21275 : { 15685 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21276 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21277 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21278 : { 15685 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_1__Reg1_3__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21279 : { 15685 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_2__Reg1_4__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21280 : { 15685 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21281 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21282 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_2__Reg1_4__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21283 : { 15693 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21284 : { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21285 : { 15693 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21286 : { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21287 : { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21288 : { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21289 : { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21290 : { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21291 : { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21292 : { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21293 : { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21294 : { 15701 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21295 : { 15701 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21296 : { 15701 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21297 : { 15701 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21298 : { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21299 : { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21300 : { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21301 : { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21302 : { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21303 : { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21304 : { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21305 : { 15709 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
21306 : { 15718 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21307 : { 15718 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21308 : { 15718 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21309 : { 15718 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21310 : { 15718 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21311 : { 15718 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21312 : { 15718 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21313 : { 15718 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21314 : { 15718 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21315 : { 15718 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21316 : { 15718 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21317 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21318 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21319 : { 15718 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21320 : { 15718 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21321 : { 15718 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21322 : { 15718 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21323 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21324 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21325 : { 15718 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21326 : { 15718 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21327 : { 15718 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21328 : { 15718 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21329 : { 15718 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21330 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21331 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21332 : { 15718 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21333 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21334 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21335 : { 15718 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21336 : { 15718 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21337 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21338 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21339 : { 15718 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21340 : { 15725 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21341 : { 15725 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21342 : { 15725 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21343 : { 15725 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21344 : { 15725 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21345 : { 15725 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21346 : { 15725 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21347 : { 15725 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21348 : { 15725 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21349 : { 15725 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21350 : { 15725 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512 }, },
21351 : { 15725 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21352 : { 15725 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21353 : { 15725 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21354 : { 15725 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21355 : { 15725 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21356 : { 15725 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21357 : { 15725 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21358 : { 15725 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21359 : { 15725 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21360 : { 15725 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21361 : { 15725 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21362 : { 15725 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21363 : { 15725 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21364 : { 15725 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21365 : { 15725 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21366 : { 15725 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21367 : { 15725 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21368 : { 15725 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21369 : { 15725 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21370 : { 15725 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21371 : { 15725 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21372 : { 15725 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21373 : { 15725 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21374 : { 15732 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21375 : { 15732 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21376 : { 15732 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32, MCK_FR32 }, },
21377 : { 15732 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_2__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X }, },
21378 : { 15732 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21379 : { 15732 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21380 : { 15732 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21381 : { 15732 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21382 : { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21383 : { 15732 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21384 : { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21385 : { 15739 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21386 : { 15739 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21387 : { 15739 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32, MCK_FR32 }, },
21388 : { 15739 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_2__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X }, },
21389 : { 15739 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_3__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21390 : { 15739 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21391 : { 15739 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21392 : { 15739 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21393 : { 15739 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21394 : { 15739 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21395 : { 15739 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_3__Reg1_5__Reg1_2__Reg1_1__AVX512RC1_0, 0, { MCK_AVX512RC, MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21396 : { 15746 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21397 : { 15746 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21398 : { 15746 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21399 : { 15746 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21400 : { 15754 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21401 : { 15754 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256 }, },
21402 : { 15754 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21403 : { 15754 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256 }, },
21404 : { 15762 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21405 : { 15762 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
21406 : { 15762 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32 }, },
21407 : { 15762 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_1__Mem645_0, 0, { MCK_Mem64, MCK_FR32X }, },
21408 : { 15762 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
21409 : { 15771 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21410 : { 15771 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X }, },
21411 : { 15771 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32 }, },
21412 : { 15771 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_1__Mem325_0, 0, { MCK_Mem32, MCK_FR32X }, },
21413 : { 15771 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_2__Reg1_1, 0, { MCK__123_sae_125_, MCK_FR32X, MCK_FR32X }, },
21414 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21415 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21416 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21417 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21418 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21419 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21420 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21421 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21422 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21423 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21424 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21425 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21426 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21427 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21428 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21429 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21430 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21431 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21432 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21433 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21434 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21435 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21436 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21437 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21438 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21439 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21440 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21441 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21442 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21443 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21444 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21445 : { 15790 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21446 : { 15790 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21447 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21448 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21449 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21450 : { 15790 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21451 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21452 : { 15790 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21453 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21454 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21455 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21456 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21457 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21458 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21459 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21460 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21461 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21462 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21463 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21464 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21465 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21466 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21467 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21468 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21469 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21470 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21471 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21472 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21473 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21474 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21475 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21476 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21477 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21478 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21479 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21480 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21481 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21482 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21483 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21484 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21485 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21486 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21487 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21488 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21489 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21490 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21491 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21492 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21493 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21494 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21495 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21496 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21497 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21498 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21499 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21500 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21501 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21502 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21503 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21504 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21505 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21506 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21507 : { 15810 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21508 : { 15810 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21509 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21510 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21511 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21512 : { 15810 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21513 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21514 : { 15810 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21515 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21516 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21517 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21518 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21519 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21520 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21521 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21522 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21523 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21524 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21525 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21526 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21527 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21528 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21529 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21530 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21531 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21532 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21533 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21534 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21535 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21536 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21537 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21538 : { 15820 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21539 : { 15820 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21540 : { 15820 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21541 : { 15820 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21542 : { 15820 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21543 : { 15820 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21544 : { 15820 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21545 : { 15820 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21546 : { 15820 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21547 : { 15820 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21548 : { 15820 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X }, },
21549 : { 15820 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X }, },
21550 : { 15820 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_3__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512 }, },
21551 : { 15820 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21552 : { 15820 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21553 : { 15820 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21554 : { 15820 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21555 : { 15820 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21556 : { 15820 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21557 : { 15820 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21558 : { 15820 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21559 : { 15820 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21560 : { 15820 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21561 : { 15820 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21562 : { 15820 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21563 : { 15820 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21564 : { 15820 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21565 : { 15820 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21566 : { 15820 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to2_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21567 : { 15820 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to4_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21568 : { 15820 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem645_0, 0, { MCK_Mem64, MCK__123_1to8_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21569 : { 15827 /* vxorps */, X86::VXORPSrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
21570 : { 15827 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
21571 : { 15827 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
21572 : { 15827 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
21573 : { 15827 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_2__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
21574 : { 15827 /* vxorps */, X86::VXORPSrm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
21575 : { 15827 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_2__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X }, },
21576 : { 15827 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
21577 : { 15827 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_2__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X }, },
21578 : { 15827 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_2__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512 }, },
21579 : { 15827 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512 }, },
21580 : { 15827 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X }, },
21581 : { 15827 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_3__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X }, },
21582 : { 15827 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21583 : { 15827 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21584 : { 15827 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21585 : { 15827 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21586 : { 15827 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21587 : { 15827 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_2__Tie0_1_1__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21588 : { 15827 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21589 : { 15827 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21590 : { 15827 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_2__Reg1_4__Reg1_1__Reg1_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21591 : { 15827 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21592 : { 15827 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem2565_0, 0, { MCK_Mem256, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21593 : { 15827 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21594 : { 15827 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21595 : { 15827 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_3__Tie0_1_1__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_ }, },
21596 : { 15827 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_2__Reg1_4__Reg1_1__Mem5125_0, 0, { MCK_Mem512, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21597 : { 15827 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to16_125_, MCK_VR512, MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21598 : { 15827 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to4_125_, MCK_FR32X, MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21599 : { 15827 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_3__Reg1_5__Reg1_2__Mem325_0, 0, { MCK_Mem32, MCK__123_1to8_125_, MCK_VR256X, MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_ }, },
21600 : { 15834 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, { }, },
21601 : { 15843 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, { }, },
21602 : { 15854 /* wait */, X86::WAIT, Convert_NoOperands, 0, { }, },
21603 : { 15859 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, { }, },
21604 : { 15866 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, 0, { }, },
21605 : { 15884 /* wrfsbasel */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
21606 : { 15894 /* wrfsbaseq */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21607 : { 15913 /* wrgsbasel */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
21608 : { 15923 /* wrgsbaseq */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
21609 : { 15933 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, { }, },
21610 : { 15939 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, { }, },
21611 : { 15946 /* wrssd */, X86::WRSSD, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21612 : { 15952 /* wrssq */, X86::WRSSQ, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21613 : { 15958 /* wrussd */, X86::WRUSSD, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21614 : { 15965 /* wrussq */, X86::WRUSSQ, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21615 : { 15972 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
21616 : { 15979 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, { }, },
21617 : { 15993 /* xaddb */, X86::XADD8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR8, MCK_GR8 }, },
21618 : { 15993 /* xaddb */, X86::XADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21619 : { 15999 /* xaddl */, X86::XADD32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR32, MCK_GR32 }, },
21620 : { 15999 /* xaddl */, X86::XADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21621 : { 16005 /* xaddq */, X86::XADD64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR64, MCK_GR64 }, },
21622 : { 16005 /* xaddq */, X86::XADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21623 : { 16011 /* xaddw */, X86::XADD16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR16, MCK_GR16 }, },
21624 : { 16011 /* xaddw */, X86::XADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21625 : { 16017 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
21626 : { 16017 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
21627 : { 16029 /* xchgb */, X86::XCHG8rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR8, MCK_GR8 }, },
21628 : { 16029 /* xchgb */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21629 : { 16029 /* xchgb */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
21630 : { 16035 /* xchgl */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, Feature_In64BitMode, { MCK_EAX, MCK_EAX }, },
21631 : { 16035 /* xchgl */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_EAX, MCK_GR32 }, },
21632 : { 16035 /* xchgl */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_EAX }, },
21633 : { 16035 /* xchgl */, X86::XCHG32rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR32, MCK_GR32 }, },
21634 : { 16035 /* xchgl */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21635 : { 16035 /* xchgl */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
21636 : { 16041 /* xchgq */, X86::NOOP, Convert_NoOperands, 0, { MCK_RAX, MCK_RAX }, },
21637 : { 16041 /* xchgq */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_RAX, MCK_GR64 }, },
21638 : { 16041 /* xchgq */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_RAX }, },
21639 : { 16041 /* xchgq */, X86::XCHG64rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR64, MCK_GR64 }, },
21640 : { 16041 /* xchgq */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21641 : { 16041 /* xchgq */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
21642 : { 16047 /* xchgw */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_AX, MCK_GR16 }, },
21643 : { 16047 /* xchgw */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_AX }, },
21644 : { 16047 /* xchgw */, X86::XCHG16rr, Convert__Reg1_1__Reg1_0__Tie0_2_2__Tie1_1_1, 0, { MCK_GR16, MCK_GR16 }, },
21645 : { 16047 /* xchgw */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21646 : { 16047 /* xchgw */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
21647 : { 16053 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, { }, },
21648 : { 16063 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, { }, },
21649 : { 16073 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, { }, },
21650 : { 16083 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, { }, },
21651 : { 16093 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, { }, },
21652 : { 16103 /* xend */, X86::XEND, Convert_NoOperands, 0, { }, },
21653 : { 16108 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, { }, },
21654 : { 16115 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, { }, },
21655 : { 16125 /* xorb */, X86::XOR8rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR8, MCK_GR8 }, },
21656 : { 16125 /* xorb */, X86::XOR8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
21657 : { 16125 /* xorb */, X86::XOR8i8, Convert__Imm1_0, 0, { MCK_Imm, MCK_AL }, },
21658 : { 16125 /* xorb */, X86::XOR8ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR8 }, },
21659 : { 16125 /* xorb */, X86::XOR8mi, Convert__Mem85_1__Imm1_0, 0, { MCK_Imm, MCK_Mem8 }, },
21660 : { 16125 /* xorb */, X86::XOR8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
21661 : { 16130 /* xorl */, X86::XOR32rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR32, MCK_GR32 }, },
21662 : { 16130 /* xorl */, X86::XOR32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
21663 : { 16130 /* xorl */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_EAX }, },
21664 : { 16130 /* xorl */, X86::XOR32ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_GR32 }, },
21665 : { 16130 /* xorl */, X86::XOR32mi8, Convert__Mem325_1__ImmSExti32i81_0, 0, { MCK_ImmSExti32i8, MCK_Mem32 }, },
21666 : { 16130 /* xorl */, X86::XOR32i32, Convert__Imm1_0, 0, { MCK_Imm, MCK_EAX }, },
21667 : { 16130 /* xorl */, X86::XOR32ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR32 }, },
21668 : { 16130 /* xorl */, X86::XOR32mi, Convert__Mem325_1__Imm1_0, 0, { MCK_Imm, MCK_Mem32 }, },
21669 : { 16130 /* xorl */, X86::XOR32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
21670 : { 16135 /* xorpd */, X86::XORPDrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21671 : { 16135 /* xorpd */, X86::XORPDrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21672 : { 16141 /* xorps */, X86::XORPSrr, Convert__Reg1_1__Tie0_1_1__Reg1_0, 0, { MCK_FR32, MCK_FR32 }, },
21673 : { 16141 /* xorps */, X86::XORPSrm, Convert__Reg1_1__Tie0_1_1__Mem1285_0, 0, { MCK_Mem128, MCK_FR32 }, },
21674 : { 16147 /* xorq */, X86::XOR64rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR64, MCK_GR64 }, },
21675 : { 16147 /* xorq */, X86::XOR64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
21676 : { 16147 /* xorq */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_RAX }, },
21677 : { 16147 /* xorq */, X86::XOR64ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti64i81_0, 0, { MCK_ImmSExti64i8, MCK_GR64 }, },
21678 : { 16147 /* xorq */, X86::XOR64mi8, Convert__Mem645_1__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8, MCK_Mem64 }, },
21679 : { 16147 /* xorq */, X86::XOR64i32, Convert__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_RAX }, },
21680 : { 16147 /* xorq */, X86::XOR64ri32, Convert__Reg1_1__Tie0_2_2__ImmSExti64i321_0, 0, { MCK_ImmSExti64i32, MCK_GR64 }, },
21681 : { 16147 /* xorq */, X86::XOR64mi32, Convert__Mem645_1__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32, MCK_Mem64 }, },
21682 : { 16147 /* xorq */, X86::XOR64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
21683 : { 16152 /* xorw */, X86::XOR16rr, Convert__Reg1_1__Tie0_2_2__Reg1_0, 0, { MCK_GR16, MCK_GR16 }, },
21684 : { 16152 /* xorw */, X86::XOR16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
21685 : { 16152 /* xorw */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_AX }, },
21686 : { 16152 /* xorw */, X86::XOR16ri8, Convert__Reg1_1__Tie0_2_2__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_GR16 }, },
21687 : { 16152 /* xorw */, X86::XOR16mi8, Convert__Mem165_1__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8, MCK_Mem16 }, },
21688 : { 16152 /* xorw */, X86::XOR16i16, Convert__Imm1_0, 0, { MCK_Imm, MCK_AX }, },
21689 : { 16152 /* xorw */, X86::XOR16ri, Convert__Reg1_1__Tie0_2_2__Imm1_0, 0, { MCK_Imm, MCK_GR16 }, },
21690 : { 16152 /* xorw */, X86::XOR16mi, Convert__Mem165_1__Imm1_0, 0, { MCK_Imm, MCK_Mem16 }, },
21691 : { 16152 /* xorw */, X86::XOR16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
21692 : { 16157 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, { }, },
21693 : { 16166 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
21694 : { 16173 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21695 : { 16182 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
21696 : { 16190 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21697 : { 16200 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
21698 : { 16206 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21699 : { 16214 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
21700 : { 16221 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21701 : { 16230 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
21702 : { 16239 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21703 : { 16250 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
21704 : { 16257 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
21705 : { 16266 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, { }, },
21706 : { 16273 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, { }, },
21707 : { 16279 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, { }, },
21708 : { 16287 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, { }, },
21709 : { 16294 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, { }, },
21710 : { 16304 /* xtest */, X86::XTEST, Convert_NoOperands, 0, { }, },
21711 : };
21712 :
21713 : static const MatchEntry MatchTable1[] = {
21714 : { 0 /* aaa */, X86::AAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
21715 : { 4 /* aad */, X86::AAD8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
21716 : { 4 /* aad */, X86::AAD8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
21717 : { 8 /* aam */, X86::AAM8i8, Convert__imm_95_10, Feature_Not64BitMode, { }, },
21718 : { 8 /* aam */, X86::AAM8i8, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
21719 : { 12 /* aas */, X86::AAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
21720 : { 16 /* adc */, X86::ADC8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21721 : { 16 /* adc */, X86::ADC16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21722 : { 16 /* adc */, X86::ADC16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21723 : { 16 /* adc */, X86::ADC32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21724 : { 16 /* adc */, X86::ADC32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21725 : { 16 /* adc */, X86::ADC64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21726 : { 16 /* adc */, X86::ADC64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21727 : { 16 /* adc */, X86::ADC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21728 : { 16 /* adc */, X86::ADC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21729 : { 16 /* adc */, X86::ADC16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21730 : { 16 /* adc */, X86::ADC16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21731 : { 16 /* adc */, X86::ADC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21732 : { 16 /* adc */, X86::ADC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21733 : { 16 /* adc */, X86::ADC32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21734 : { 16 /* adc */, X86::ADC32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21735 : { 16 /* adc */, X86::ADC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21736 : { 16 /* adc */, X86::ADC64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21737 : { 16 /* adc */, X86::ADC64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21738 : { 16 /* adc */, X86::ADC64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21739 : { 16 /* adc */, X86::ADC8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21740 : { 16 /* adc */, X86::ADC8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21741 : { 16 /* adc */, X86::ADC8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21742 : { 16 /* adc */, X86::ADC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21743 : { 16 /* adc */, X86::ADC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21744 : { 16 /* adc */, X86::ADC16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21745 : { 16 /* adc */, X86::ADC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21746 : { 16 /* adc */, X86::ADC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21747 : { 16 /* adc */, X86::ADC32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21748 : { 16 /* adc */, X86::ADC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21749 : { 16 /* adc */, X86::ADC64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21750 : { 16 /* adc */, X86::ADC64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21751 : { 16 /* adc */, X86::ADC8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21752 : { 16 /* adc */, X86::ADC8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21753 : { 40 /* adcx */, X86::ADCX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21754 : { 40 /* adcx */, X86::ADCX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21755 : { 40 /* adcx */, X86::ADCX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21756 : { 40 /* adcx */, X86::ADCX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21757 : { 57 /* add */, X86::ADD8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21758 : { 57 /* add */, X86::ADD16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21759 : { 57 /* add */, X86::ADD16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21760 : { 57 /* add */, X86::ADD32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21761 : { 57 /* add */, X86::ADD32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21762 : { 57 /* add */, X86::ADD64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21763 : { 57 /* add */, X86::ADD64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21764 : { 57 /* add */, X86::ADD16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21765 : { 57 /* add */, X86::ADD16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21766 : { 57 /* add */, X86::ADD16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21767 : { 57 /* add */, X86::ADD16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21768 : { 57 /* add */, X86::ADD32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21769 : { 57 /* add */, X86::ADD32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21770 : { 57 /* add */, X86::ADD32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21771 : { 57 /* add */, X86::ADD32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21772 : { 57 /* add */, X86::ADD64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21773 : { 57 /* add */, X86::ADD64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21774 : { 57 /* add */, X86::ADD64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21775 : { 57 /* add */, X86::ADD64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21776 : { 57 /* add */, X86::ADD8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21777 : { 57 /* add */, X86::ADD8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21778 : { 57 /* add */, X86::ADD8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21779 : { 57 /* add */, X86::ADD16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21780 : { 57 /* add */, X86::ADD16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21781 : { 57 /* add */, X86::ADD16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21782 : { 57 /* add */, X86::ADD32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21783 : { 57 /* add */, X86::ADD32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21784 : { 57 /* add */, X86::ADD32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21785 : { 57 /* add */, X86::ADD64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21786 : { 57 /* add */, X86::ADD64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21787 : { 57 /* add */, X86::ADD64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21788 : { 57 /* add */, X86::ADD8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21789 : { 57 /* add */, X86::ADD8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21790 : { 71 /* addpd */, X86::ADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21791 : { 71 /* addpd */, X86::ADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21792 : { 77 /* addps */, X86::ADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21793 : { 77 /* addps */, X86::ADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21794 : { 88 /* addsd */, X86::ADDSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21795 : { 88 /* addsd */, X86::ADDSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
21796 : { 94 /* addss */, X86::ADDSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21797 : { 94 /* addss */, X86::ADDSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
21798 : { 100 /* addsubpd */, X86::ADDSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21799 : { 100 /* addsubpd */, X86::ADDSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21800 : { 109 /* addsubps */, X86::ADDSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21801 : { 109 /* addsubps */, X86::ADDSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21802 : { 123 /* adox */, X86::ADOX32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21803 : { 123 /* adox */, X86::ADOX32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21804 : { 123 /* adox */, X86::ADOX64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21805 : { 123 /* adox */, X86::ADOX64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21806 : { 140 /* aesdec */, X86::AESDECrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21807 : { 140 /* aesdec */, X86::AESDECrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21808 : { 147 /* aesdeclast */, X86::AESDECLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21809 : { 147 /* aesdeclast */, X86::AESDECLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21810 : { 158 /* aesenc */, X86::AESENCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21811 : { 158 /* aesenc */, X86::AESENCrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21812 : { 165 /* aesenclast */, X86::AESENCLASTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21813 : { 165 /* aesenclast */, X86::AESENCLASTrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21814 : { 176 /* aesimc */, X86::AESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21815 : { 176 /* aesimc */, X86::AESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21816 : { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21817 : { 183 /* aeskeygenassist */, X86::AESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21818 : { 199 /* and */, X86::AND8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
21819 : { 199 /* and */, X86::AND16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
21820 : { 199 /* and */, X86::AND16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
21821 : { 199 /* and */, X86::AND32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
21822 : { 199 /* and */, X86::AND32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
21823 : { 199 /* and */, X86::AND64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
21824 : { 199 /* and */, X86::AND64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
21825 : { 199 /* and */, X86::AND16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21826 : { 199 /* and */, X86::AND16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21827 : { 199 /* and */, X86::AND16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
21828 : { 199 /* and */, X86::AND16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21829 : { 199 /* and */, X86::AND32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21830 : { 199 /* and */, X86::AND32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21831 : { 199 /* and */, X86::AND32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
21832 : { 199 /* and */, X86::AND32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21833 : { 199 /* and */, X86::AND64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21834 : { 199 /* and */, X86::AND64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21835 : { 199 /* and */, X86::AND64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
21836 : { 199 /* and */, X86::AND64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21837 : { 199 /* and */, X86::AND8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
21838 : { 199 /* and */, X86::AND8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
21839 : { 199 /* and */, X86::AND8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
21840 : { 199 /* and */, X86::AND16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21841 : { 199 /* and */, X86::AND16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21842 : { 199 /* and */, X86::AND16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
21843 : { 199 /* and */, X86::AND32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21844 : { 199 /* and */, X86::AND32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21845 : { 199 /* and */, X86::AND32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
21846 : { 199 /* and */, X86::AND64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21847 : { 199 /* and */, X86::AND64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21848 : { 199 /* and */, X86::AND64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
21849 : { 199 /* and */, X86::AND8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
21850 : { 199 /* and */, X86::AND8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
21851 : { 213 /* andn */, X86::ANDN32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21852 : { 213 /* andn */, X86::ANDN32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
21853 : { 213 /* andn */, X86::ANDN64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21854 : { 213 /* andn */, X86::ANDN64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
21855 : { 224 /* andnpd */, X86::ANDNPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21856 : { 224 /* andnpd */, X86::ANDNPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21857 : { 231 /* andnps */, X86::ANDNPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21858 : { 231 /* andnps */, X86::ANDNPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21859 : { 244 /* andpd */, X86::ANDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21860 : { 244 /* andpd */, X86::ANDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21861 : { 250 /* andps */, X86::ANDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21862 : { 250 /* andps */, X86::ANDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21863 : { 266 /* arpl */, X86::ARPL16rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR16, MCK_GR16 }, },
21864 : { 266 /* arpl */, X86::ARPL16mr, Convert__Mem165_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem16, MCK_GR16 }, },
21865 : { 271 /* bextr */, X86::BEXTR32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
21866 : { 271 /* bextr */, X86::BEXTRI32ri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
21867 : { 271 /* bextr */, X86::BEXTR32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
21868 : { 271 /* bextr */, X86::BEXTRI32mi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
21869 : { 271 /* bextr */, X86::BEXTR64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
21870 : { 271 /* bextr */, X86::BEXTRI64ri, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
21871 : { 271 /* bextr */, X86::BEXTR64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
21872 : { 271 /* bextr */, X86::BEXTRI64mi, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
21873 : { 291 /* blcfill */, X86::BLCFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21874 : { 291 /* blcfill */, X86::BLCFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21875 : { 291 /* blcfill */, X86::BLCFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21876 : { 291 /* blcfill */, X86::BLCFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21877 : { 317 /* blci */, X86::BLCI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21878 : { 317 /* blci */, X86::BLCI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21879 : { 317 /* blci */, X86::BLCI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21880 : { 317 /* blci */, X86::BLCI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21881 : { 322 /* blcic */, X86::BLCIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21882 : { 322 /* blcic */, X86::BLCIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21883 : { 322 /* blcic */, X86::BLCIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21884 : { 322 /* blcic */, X86::BLCIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21885 : { 354 /* blcmsk */, X86::BLCMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21886 : { 354 /* blcmsk */, X86::BLCMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21887 : { 354 /* blcmsk */, X86::BLCMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21888 : { 354 /* blcmsk */, X86::BLCMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21889 : { 377 /* blcs */, X86::BLCS32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21890 : { 377 /* blcs */, X86::BLCS32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21891 : { 377 /* blcs */, X86::BLCS64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21892 : { 377 /* blcs */, X86::BLCS64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21893 : { 394 /* blendpd */, X86::BLENDPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21894 : { 394 /* blendpd */, X86::BLENDPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21895 : { 402 /* blendps */, X86::BLENDPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
21896 : { 402 /* blendps */, X86::BLENDPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
21897 : { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21898 : { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21899 : { 410 /* blendvpd */, X86::BLENDVPDrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
21900 : { 410 /* blendvpd */, X86::BLENDVPDrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
21901 : { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
21902 : { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
21903 : { 419 /* blendvps */, X86::BLENDVPSrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
21904 : { 419 /* blendvps */, X86::BLENDVPSrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
21905 : { 428 /* blsfill */, X86::BLSFILL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21906 : { 428 /* blsfill */, X86::BLSFILL32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21907 : { 428 /* blsfill */, X86::BLSFILL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21908 : { 428 /* blsfill */, X86::BLSFILL64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21909 : { 454 /* blsi */, X86::BLSI32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21910 : { 454 /* blsi */, X86::BLSI32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21911 : { 454 /* blsi */, X86::BLSI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21912 : { 454 /* blsi */, X86::BLSI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21913 : { 459 /* blsic */, X86::BLSIC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21914 : { 459 /* blsic */, X86::BLSIC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21915 : { 459 /* blsic */, X86::BLSIC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21916 : { 459 /* blsic */, X86::BLSIC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21917 : { 491 /* blsmsk */, X86::BLSMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21918 : { 491 /* blsmsk */, X86::BLSMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21919 : { 491 /* blsmsk */, X86::BLSMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21920 : { 491 /* blsmsk */, X86::BLSMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21921 : { 514 /* blsr */, X86::BLSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21922 : { 514 /* blsr */, X86::BLSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21923 : { 514 /* blsr */, X86::BLSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21924 : { 514 /* blsr */, X86::BLSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21925 : { 531 /* bndcl */, X86::BNDCL32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21926 : { 531 /* bndcl */, X86::BNDCL64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21927 : { 531 /* bndcl */, X86::BNDCL32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21928 : { 531 /* bndcl */, X86::BNDCL64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21929 : { 537 /* bndcn */, X86::BNDCN32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21930 : { 537 /* bndcn */, X86::BNDCN64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21931 : { 537 /* bndcn */, X86::BNDCN32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21932 : { 537 /* bndcn */, X86::BNDCN64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21933 : { 543 /* bndcu */, X86::BNDCU32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_BNDR, MCK_GR32 }, },
21934 : { 543 /* bndcu */, X86::BNDCU64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_BNDR, MCK_GR64 }, },
21935 : { 543 /* bndcu */, X86::BNDCU32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21936 : { 543 /* bndcu */, X86::BNDCU64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21937 : { 549 /* bndldx */, X86::BNDLDXrm, Convert__Reg1_0__Mem5_1, 0, { MCK_BNDR, MCK_Mem }, },
21938 : { 556 /* bndmk */, X86::BNDMK32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem }, },
21939 : { 556 /* bndmk */, X86::BNDMK64rm, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem }, },
21940 : { 562 /* bndmov */, X86::BNDMOVrr, Convert__Reg1_0__Reg1_1, 0, { MCK_BNDR, MCK_BNDR }, },
21941 : { 562 /* bndmov */, X86::BNDMOV64rm, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_BNDR, MCK_Mem128 }, },
21942 : { 562 /* bndmov */, X86::BNDMOV32rm, Convert__Reg1_0__Mem645_1, Feature_Not64BitMode, { MCK_BNDR, MCK_Mem64 }, },
21943 : { 562 /* bndmov */, X86::BNDMOV64mr, Convert__Mem1285_0__Reg1_1, Feature_In64BitMode, { MCK_Mem128, MCK_BNDR }, },
21944 : { 562 /* bndmov */, X86::BNDMOV32mr, Convert__Mem645_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem64, MCK_BNDR }, },
21945 : { 569 /* bndstx */, X86::BNDSTXmr, Convert__Mem5_0__Reg1_1, 0, { MCK_Mem, MCK_BNDR }, },
21946 : { 576 /* bound */, X86::BOUNDS16rm, Convert__Reg1_0__Mem165_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem16 }, },
21947 : { 576 /* bound */, X86::BOUNDS32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
21948 : { 582 /* bsf */, X86::BSF16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21949 : { 582 /* bsf */, X86::BSF16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21950 : { 582 /* bsf */, X86::BSF32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21951 : { 582 /* bsf */, X86::BSF32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21952 : { 582 /* bsf */, X86::BSF64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21953 : { 582 /* bsf */, X86::BSF64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21954 : { 601 /* bsr */, X86::BSR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21955 : { 601 /* bsr */, X86::BSR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
21956 : { 601 /* bsr */, X86::BSR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21957 : { 601 /* bsr */, X86::BSR32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
21958 : { 601 /* bsr */, X86::BSR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21959 : { 601 /* bsr */, X86::BSR64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
21960 : { 620 /* bswap */, X86::BSWAP32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
21961 : { 620 /* bswap */, X86::BSWAP64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
21962 : { 640 /* bt */, X86::BT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21963 : { 640 /* bt */, X86::BT16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21964 : { 640 /* bt */, X86::BT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21965 : { 640 /* bt */, X86::BT32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21966 : { 640 /* bt */, X86::BT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21967 : { 640 /* bt */, X86::BT64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21968 : { 640 /* bt */, X86::BT16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21969 : { 640 /* bt */, X86::BT16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21970 : { 640 /* bt */, X86::BT32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21971 : { 640 /* bt */, X86::BT32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21972 : { 640 /* bt */, X86::BT64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21973 : { 640 /* bt */, X86::BT64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21974 : { 643 /* btc */, X86::BTC16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21975 : { 643 /* btc */, X86::BTC16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21976 : { 643 /* btc */, X86::BTC32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21977 : { 643 /* btc */, X86::BTC32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21978 : { 643 /* btc */, X86::BTC64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21979 : { 643 /* btc */, X86::BTC64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21980 : { 643 /* btc */, X86::BTC16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21981 : { 643 /* btc */, X86::BTC16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21982 : { 643 /* btc */, X86::BTC32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21983 : { 643 /* btc */, X86::BTC32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21984 : { 643 /* btc */, X86::BTC64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21985 : { 643 /* btc */, X86::BTC64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21986 : { 670 /* btr */, X86::BTR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21987 : { 670 /* btr */, X86::BTR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
21988 : { 670 /* btr */, X86::BTR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
21989 : { 670 /* btr */, X86::BTR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
21990 : { 670 /* btr */, X86::BTR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
21991 : { 670 /* btr */, X86::BTR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
21992 : { 670 /* btr */, X86::BTR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
21993 : { 670 /* btr */, X86::BTR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
21994 : { 670 /* btr */, X86::BTR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
21995 : { 670 /* btr */, X86::BTR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
21996 : { 670 /* btr */, X86::BTR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
21997 : { 670 /* btr */, X86::BTR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
21998 : { 689 /* bts */, X86::BTS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
21999 : { 689 /* bts */, X86::BTS16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22000 : { 689 /* bts */, X86::BTS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22001 : { 689 /* bts */, X86::BTS32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22002 : { 689 /* bts */, X86::BTS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22003 : { 689 /* bts */, X86::BTS64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22004 : { 689 /* bts */, X86::BTS16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22005 : { 689 /* bts */, X86::BTS16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22006 : { 689 /* bts */, X86::BTS32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22007 : { 689 /* bts */, X86::BTS32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22008 : { 689 /* bts */, X86::BTS64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22009 : { 689 /* bts */, X86::BTS64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22010 : { 712 /* bzhi */, X86::BZHI32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
22011 : { 712 /* bzhi */, X86::BZHI32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
22012 : { 712 /* bzhi */, X86::BZHI64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
22013 : { 712 /* bzhi */, X86::BZHI64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
22014 : { 729 /* call */, X86::CALL16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
22015 : { 729 /* call */, X86::CALL32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
22016 : { 729 /* call */, X86::CALL64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
22017 : { 729 /* call */, X86::CALL64pcrel32, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
22018 : { 729 /* call */, X86::CALLpcrel32, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
22019 : { 729 /* call */, X86::CALLpcrel16, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22020 : { 729 /* call */, X86::CALL16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
22021 : { 729 /* call */, X86::CALL32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
22022 : { 729 /* call */, X86::CALL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22023 : { 729 /* call */, X86::FARCALL32m, Convert__Mem5_0, 0, { MCK_Mem }, },
22024 : { 729 /* call */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22025 : { 729 /* call */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22026 : { 734 /* calll */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22027 : { 746 /* callw */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22028 : { 757 /* cbw */, X86::CBW, Convert_NoOperands, 0, { }, },
22029 : { 761 /* cdq */, X86::CDQ, Convert_NoOperands, 0, { }, },
22030 : { 765 /* cdqe */, X86::CDQE, Convert_NoOperands, 0, { }, },
22031 : { 770 /* clac */, X86::CLAC, Convert_NoOperands, 0, { }, },
22032 : { 775 /* clc */, X86::CLC, Convert_NoOperands, 0, { }, },
22033 : { 779 /* cld */, X86::CLD, Convert_NoOperands, 0, { }, },
22034 : { 783 /* cldemote */, X86::CLDEMOTE, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22035 : { 792 /* clflush */, X86::CLFLUSH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22036 : { 800 /* clflushopt */, X86::CLFLUSHOPT, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22037 : { 811 /* clgi */, X86::CLGI, Convert_NoOperands, 0, { }, },
22038 : { 816 /* cli */, X86::CLI, Convert_NoOperands, 0, { }, },
22039 : { 820 /* clr */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR16 }, },
22040 : { 820 /* clr */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR32 }, },
22041 : { 820 /* clr */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR64 }, },
22042 : { 820 /* clr */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_0, 0, { MCK_GR8 }, },
22043 : { 839 /* clrssbsy */, X86::CLRSSBSY, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22044 : { 863 /* clts */, X86::CLTS, Convert_NoOperands, 0, { }, },
22045 : { 868 /* clwb */, X86::CLWB, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22046 : { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, 0, { }, },
22047 : { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
22048 : { 873 /* clzero */, X86::CLZEROr, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
22049 : { 880 /* cmc */, X86::CMC, Convert_NoOperands, 0, { }, },
22050 : { 884 /* cmova */, X86::CMOVA16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22051 : { 884 /* cmova */, X86::CMOVA16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22052 : { 884 /* cmova */, X86::CMOVA32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22053 : { 884 /* cmova */, X86::CMOVA32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22054 : { 884 /* cmova */, X86::CMOVA64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22055 : { 884 /* cmova */, X86::CMOVA64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22056 : { 890 /* cmovae */, X86::CMOVAE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22057 : { 890 /* cmovae */, X86::CMOVAE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22058 : { 890 /* cmovae */, X86::CMOVAE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22059 : { 890 /* cmovae */, X86::CMOVAE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22060 : { 890 /* cmovae */, X86::CMOVAE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22061 : { 890 /* cmovae */, X86::CMOVAE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22062 : { 942 /* cmovb */, X86::CMOVB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22063 : { 942 /* cmovb */, X86::CMOVB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22064 : { 942 /* cmovb */, X86::CMOVB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22065 : { 942 /* cmovb */, X86::CMOVB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22066 : { 942 /* cmovb */, X86::CMOVB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22067 : { 942 /* cmovb */, X86::CMOVB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22068 : { 948 /* cmovbe */, X86::CMOVBE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22069 : { 948 /* cmovbe */, X86::CMOVBE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22070 : { 948 /* cmovbe */, X86::CMOVBE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22071 : { 948 /* cmovbe */, X86::CMOVBE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22072 : { 948 /* cmovbe */, X86::CMOVBE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22073 : { 948 /* cmovbe */, X86::CMOVBE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22074 : { 1000 /* cmove */, X86::CMOVE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22075 : { 1000 /* cmove */, X86::CMOVE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22076 : { 1000 /* cmove */, X86::CMOVE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22077 : { 1000 /* cmove */, X86::CMOVE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22078 : { 1000 /* cmove */, X86::CMOVE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22079 : { 1000 /* cmove */, X86::CMOVE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22080 : { 1027 /* cmovg */, X86::CMOVG16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22081 : { 1027 /* cmovg */, X86::CMOVG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22082 : { 1027 /* cmovg */, X86::CMOVG32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22083 : { 1027 /* cmovg */, X86::CMOVG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22084 : { 1027 /* cmovg */, X86::CMOVG64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22085 : { 1027 /* cmovg */, X86::CMOVG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22086 : { 1033 /* cmovge */, X86::CMOVGE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22087 : { 1033 /* cmovge */, X86::CMOVGE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22088 : { 1033 /* cmovge */, X86::CMOVGE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22089 : { 1033 /* cmovge */, X86::CMOVGE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22090 : { 1033 /* cmovge */, X86::CMOVGE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22091 : { 1033 /* cmovge */, X86::CMOVGE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22092 : { 1085 /* cmovl */, X86::CMOVL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22093 : { 1085 /* cmovl */, X86::CMOVL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22094 : { 1085 /* cmovl */, X86::CMOVL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22095 : { 1085 /* cmovl */, X86::CMOVL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22096 : { 1085 /* cmovl */, X86::CMOVL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22097 : { 1085 /* cmovl */, X86::CMOVL64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22098 : { 1091 /* cmovle */, X86::CMOVLE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22099 : { 1091 /* cmovle */, X86::CMOVLE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22100 : { 1091 /* cmovle */, X86::CMOVLE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22101 : { 1091 /* cmovle */, X86::CMOVLE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22102 : { 1091 /* cmovle */, X86::CMOVLE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22103 : { 1091 /* cmovle */, X86::CMOVLE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22104 : { 1143 /* cmovne */, X86::CMOVNE16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22105 : { 1143 /* cmovne */, X86::CMOVNE16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22106 : { 1143 /* cmovne */, X86::CMOVNE32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22107 : { 1143 /* cmovne */, X86::CMOVNE32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22108 : { 1143 /* cmovne */, X86::CMOVNE64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22109 : { 1143 /* cmovne */, X86::CMOVNE64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22110 : { 1174 /* cmovno */, X86::CMOVNO16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22111 : { 1174 /* cmovno */, X86::CMOVNO16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22112 : { 1174 /* cmovno */, X86::CMOVNO32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22113 : { 1174 /* cmovno */, X86::CMOVNO32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22114 : { 1174 /* cmovno */, X86::CMOVNO64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22115 : { 1174 /* cmovno */, X86::CMOVNO64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22116 : { 1205 /* cmovnp */, X86::CMOVNP16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22117 : { 1205 /* cmovnp */, X86::CMOVNP16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22118 : { 1205 /* cmovnp */, X86::CMOVNP32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22119 : { 1205 /* cmovnp */, X86::CMOVNP32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22120 : { 1205 /* cmovnp */, X86::CMOVNP64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22121 : { 1205 /* cmovnp */, X86::CMOVNP64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22122 : { 1236 /* cmovns */, X86::CMOVNS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22123 : { 1236 /* cmovns */, X86::CMOVNS16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22124 : { 1236 /* cmovns */, X86::CMOVNS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22125 : { 1236 /* cmovns */, X86::CMOVNS32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22126 : { 1236 /* cmovns */, X86::CMOVNS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22127 : { 1236 /* cmovns */, X86::CMOVNS64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22128 : { 1267 /* cmovo */, X86::CMOVO16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22129 : { 1267 /* cmovo */, X86::CMOVO16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22130 : { 1267 /* cmovo */, X86::CMOVO32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22131 : { 1267 /* cmovo */, X86::CMOVO32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22132 : { 1267 /* cmovo */, X86::CMOVO64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22133 : { 1267 /* cmovo */, X86::CMOVO64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22134 : { 1294 /* cmovp */, X86::CMOVP16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22135 : { 1294 /* cmovp */, X86::CMOVP16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22136 : { 1294 /* cmovp */, X86::CMOVP32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22137 : { 1294 /* cmovp */, X86::CMOVP32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22138 : { 1294 /* cmovp */, X86::CMOVP64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22139 : { 1294 /* cmovp */, X86::CMOVP64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22140 : { 1321 /* cmovs */, X86::CMOVS16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22141 : { 1321 /* cmovs */, X86::CMOVS16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22142 : { 1321 /* cmovs */, X86::CMOVS32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22143 : { 1321 /* cmovs */, X86::CMOVS32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22144 : { 1321 /* cmovs */, X86::CMOVS64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22145 : { 1321 /* cmovs */, X86::CMOVS64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22146 : { 1348 /* cmp */, X86::CMP8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
22147 : { 1348 /* cmp */, X86::CMP16ri8, Convert__regAX__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
22148 : { 1348 /* cmp */, X86::CMP16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
22149 : { 1348 /* cmp */, X86::CMP32ri8, Convert__regEAX__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
22150 : { 1348 /* cmp */, X86::CMP32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
22151 : { 1348 /* cmp */, X86::CMP64ri8, Convert__regRAX__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
22152 : { 1348 /* cmp */, X86::CMP64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
22153 : { 1348 /* cmp */, X86::CMP16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22154 : { 1348 /* cmp */, X86::CMP16ri8, Convert__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22155 : { 1348 /* cmp */, X86::CMP16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22156 : { 1348 /* cmp */, X86::CMP16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22157 : { 1348 /* cmp */, X86::CMP32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22158 : { 1348 /* cmp */, X86::CMP32ri8, Convert__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22159 : { 1348 /* cmp */, X86::CMP32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22160 : { 1348 /* cmp */, X86::CMP32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22161 : { 1348 /* cmp */, X86::CMP64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22162 : { 1348 /* cmp */, X86::CMP64ri8, Convert__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22163 : { 1348 /* cmp */, X86::CMP64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22164 : { 1348 /* cmp */, X86::CMP64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22165 : { 1348 /* cmp */, X86::CMP8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22166 : { 1348 /* cmp */, X86::CMP8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
22167 : { 1348 /* cmp */, X86::CMP8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
22168 : { 1348 /* cmp */, X86::CMP16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22169 : { 1348 /* cmp */, X86::CMP16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
22170 : { 1348 /* cmp */, X86::CMP16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
22171 : { 1348 /* cmp */, X86::CMP32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22172 : { 1348 /* cmp */, X86::CMP32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
22173 : { 1348 /* cmp */, X86::CMP32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
22174 : { 1348 /* cmp */, X86::CMP64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22175 : { 1348 /* cmp */, X86::CMP64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
22176 : { 1348 /* cmp */, X86::CMP64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22177 : { 1348 /* cmp */, X86::CMP8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22178 : { 1348 /* cmp */, X86::CMP8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
22179 : { 1348 /* cmp */, X86::CMPPDrri, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32 }, },
22180 : { 1348 /* cmp */, X86::CMPPDrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_Mem128 }, },
22181 : { 1348 /* cmp */, X86::CMPPSrri, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32 }, },
22182 : { 1348 /* cmp */, X86::CMPPSrmi, Convert__Reg1_2__Tie0_1_1__Mem1285_3__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_Mem128 }, },
22183 : { 1348 /* cmp */, X86::CMPSDrr, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32 }, },
22184 : { 1348 /* cmp */, X86::CMPSDrm, Convert__Reg1_2__Tie0_1_1__Mem645_3__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_Mem64 }, },
22185 : { 1348 /* cmp */, X86::CMPSSrr, Convert__Reg1_2__Tie0_1_1__Reg1_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32 }, },
22186 : { 1348 /* cmp */, X86::CMPSSrm, Convert__Reg1_2__Tie0_1_1__Mem325_3__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_Mem32 }, },
22187 : { 1362 /* cmppd */, X86::CMPPDrri_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22188 : { 1362 /* cmppd */, X86::CMPPDrmi_alt, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22189 : { 1368 /* cmpps */, X86::CMPPSrri_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22190 : { 1368 /* cmpps */, X86::CMPPSrmi_alt, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22191 : { 1379 /* cmps */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
22192 : { 1379 /* cmps */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
22193 : { 1379 /* cmps */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
22194 : { 1379 /* cmps */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
22195 : { 1384 /* cmpsb */, X86::CMPSB, Convert__DstIdx81_1__SrcIdx82_0, 0, { MCK_SrcIdx8, MCK_DstIdx8 }, },
22196 : { 1390 /* cmpsd */, X86::CMPSL, Convert__DstIdx321_1__SrcIdx322_0, 0, { MCK_SrcIdx32, MCK_DstIdx32 }, },
22197 : { 1390 /* cmpsd */, X86::CMPSDrr_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22198 : { 1390 /* cmpsd */, X86::CMPSDrm_alt, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
22199 : { 1402 /* cmpsq */, X86::CMPSQ, Convert__DstIdx641_1__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64, MCK_DstIdx64 }, },
22200 : { 1408 /* cmpss */, X86::CMPSSrr_alt, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22201 : { 1408 /* cmpss */, X86::CMPSSrm_alt, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
22202 : { 1414 /* cmpsw */, X86::CMPSW, Convert__DstIdx161_1__SrcIdx162_0, 0, { MCK_SrcIdx16, MCK_DstIdx16 }, },
22203 : { 1425 /* cmpxchg */, X86::CMPXCHG16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22204 : { 1425 /* cmpxchg */, X86::CMPXCHG32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22205 : { 1425 /* cmpxchg */, X86::CMPXCHG64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22206 : { 1425 /* cmpxchg */, X86::CMPXCHG8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22207 : { 1425 /* cmpxchg */, X86::CMPXCHG16rm, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22208 : { 1425 /* cmpxchg */, X86::CMPXCHG32rm, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22209 : { 1425 /* cmpxchg */, X86::CMPXCHG64rm, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22210 : { 1425 /* cmpxchg */, X86::CMPXCHG8rm, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22211 : { 1433 /* cmpxchg16b */, X86::CMPXCHG16B, Convert__Mem1285_0, Feature_In64BitMode, { MCK_Mem128 }, },
22212 : { 1444 /* cmpxchg8b */, X86::CMPXCHG8B, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22213 : { 1490 /* comisd */, X86::COMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22214 : { 1490 /* comisd */, X86::COMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22215 : { 1497 /* comiss */, X86::COMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22216 : { 1497 /* comiss */, X86::COMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22217 : { 1504 /* cpuid */, X86::CPUID, Convert_NoOperands, 0, { }, },
22218 : { 1510 /* cqo */, X86::CQO, Convert_NoOperands, 0, { }, },
22219 : { 1519 /* crc32 */, X86::CRC32r32r16, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
22220 : { 1519 /* crc32 */, X86::CRC32r32r32, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22221 : { 1519 /* crc32 */, X86::CRC32r32r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
22222 : { 1519 /* crc32 */, X86::CRC32r32m16, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22223 : { 1519 /* crc32 */, X86::CRC32r32m32, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22224 : { 1519 /* crc32 */, X86::CRC32r32m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
22225 : { 1519 /* crc32 */, X86::CRC32r64r64, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22226 : { 1519 /* crc32 */, X86::CRC32r64r8, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
22227 : { 1519 /* crc32 */, X86::CRC32r64m64, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22228 : { 1519 /* crc32 */, X86::CRC32r64m8, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
22229 : { 1553 /* cs */, X86::CS_PREFIX, Convert_NoOperands, 0, { }, },
22230 : { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22231 : { 1556 /* cvtdq2pd */, X86::CVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22232 : { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22233 : { 1565 /* cvtdq2ps */, X86::CVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22234 : { 1574 /* cvtpd2dq */, X86::CVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22235 : { 1574 /* cvtpd2dq */, X86::CVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22236 : { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22237 : { 1583 /* cvtpd2pi */, X86::MMX_CVTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
22238 : { 1592 /* cvtpd2ps */, X86::CVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22239 : { 1592 /* cvtpd2ps */, X86::CVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22240 : { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
22241 : { 1601 /* cvtpi2pd */, X86::MMX_CVTPI2PDirm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22242 : { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
22243 : { 1610 /* cvtpi2ps */, X86::MMX_CVTPI2PSirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22244 : { 1619 /* cvtps2dq */, X86::CVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22245 : { 1619 /* cvtps2dq */, X86::CVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22246 : { 1628 /* cvtps2pd */, X86::CVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22247 : { 1628 /* cvtps2pd */, X86::CVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22248 : { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22249 : { 1637 /* cvtps2pi */, X86::MMX_CVTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22250 : { 1646 /* cvtsd2si */, X86::CVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22251 : { 1646 /* cvtsd2si */, X86::CVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
22252 : { 1646 /* cvtsd2si */, X86::CVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22253 : { 1646 /* cvtsd2si */, X86::CVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22254 : { 1675 /* cvtsd2ss */, X86::CVTSD2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22255 : { 1675 /* cvtsd2ss */, X86::CVTSD2SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22256 : { 1684 /* cvtsi2sd */, X86::CVTSI2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22257 : { 1684 /* cvtsi2sd */, X86::CVTSI642SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22258 : { 1684 /* cvtsi2sd */, X86::CVTSI2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22259 : { 1684 /* cvtsi2sd */, X86::CVTSI642SDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22260 : { 1713 /* cvtsi2ss */, X86::CVTSI2SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22261 : { 1713 /* cvtsi2ss */, X86::CVTSI642SSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22262 : { 1713 /* cvtsi2ss */, X86::CVTSI2SSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22263 : { 1713 /* cvtsi2ss */, X86::CVTSI642SSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22264 : { 1742 /* cvtss2sd */, X86::CVTSS2SDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22265 : { 1742 /* cvtss2sd */, X86::CVTSS2SDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22266 : { 1751 /* cvtss2si */, X86::CVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22267 : { 1751 /* cvtss2si */, X86::CVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22268 : { 1751 /* cvtss2si */, X86::CVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22269 : { 1751 /* cvtss2si */, X86::CVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22270 : { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22271 : { 1780 /* cvttpd2dq */, X86::CVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22272 : { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22273 : { 1790 /* cvttpd2pi */, X86::MMX_CVTTPD2PIirm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR64, MCK_Mem128 }, },
22274 : { 1800 /* cvttps2dq */, X86::CVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22275 : { 1800 /* cvttps2dq */, X86::CVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22276 : { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22277 : { 1810 /* cvttps2pi */, X86::MMX_CVTTPS2PIirm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
22278 : { 1820 /* cvttsd2si */, X86::CVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22279 : { 1820 /* cvttsd2si */, X86::CVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
22280 : { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22281 : { 1820 /* cvttsd2si */, X86::CVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22282 : { 1852 /* cvttss2si */, X86::CVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22283 : { 1852 /* cvttss2si */, X86::CVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22284 : { 1852 /* cvttss2si */, X86::CVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22285 : { 1852 /* cvttss2si */, X86::CVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
22286 : { 1884 /* cwd */, X86::CWD, Convert_NoOperands, 0, { }, },
22287 : { 1888 /* cwde */, X86::CWDE, Convert_NoOperands, 0, { }, },
22288 : { 1903 /* daa */, X86::DAA, Convert_NoOperands, Feature_Not64BitMode, { }, },
22289 : { 1907 /* das */, X86::DAS, Convert_NoOperands, Feature_Not64BitMode, { }, },
22290 : { 1911 /* data16 */, X86::DATA16_PREFIX, Convert_NoOperands, 0, { }, },
22291 : { 1918 /* dec */, X86::DEC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
22292 : { 1918 /* dec */, X86::DEC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
22293 : { 1918 /* dec */, X86::DEC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
22294 : { 1918 /* dec */, X86::DEC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
22295 : { 1918 /* dec */, X86::DEC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
22296 : { 1918 /* dec */, X86::DEC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
22297 : { 1918 /* dec */, X86::DEC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22298 : { 1918 /* dec */, X86::DEC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22299 : { 1918 /* dec */, X86::DEC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22300 : { 1918 /* dec */, X86::DEC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22301 : { 1942 /* div */, X86::DIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22302 : { 1942 /* div */, X86::DIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22303 : { 1942 /* div */, X86::DIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22304 : { 1942 /* div */, X86::DIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22305 : { 1942 /* div */, X86::DIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22306 : { 1942 /* div */, X86::DIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22307 : { 1942 /* div */, X86::DIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22308 : { 1942 /* div */, X86::DIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22309 : { 1942 /* div */, X86::DIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
22310 : { 1942 /* div */, X86::DIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
22311 : { 1942 /* div */, X86::DIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
22312 : { 1942 /* div */, X86::DIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
22313 : { 1942 /* div */, X86::DIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
22314 : { 1942 /* div */, X86::DIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
22315 : { 1942 /* div */, X86::DIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
22316 : { 1942 /* div */, X86::DIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
22317 : { 1956 /* divpd */, X86::DIVPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22318 : { 1956 /* divpd */, X86::DIVPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22319 : { 1962 /* divps */, X86::DIVPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22320 : { 1962 /* divps */, X86::DIVPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22321 : { 1973 /* divsd */, X86::DIVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22322 : { 1973 /* divsd */, X86::DIVSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22323 : { 1979 /* divss */, X86::DIVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22324 : { 1979 /* divss */, X86::DIVSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22325 : { 1990 /* dppd */, X86::DPPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22326 : { 1990 /* dppd */, X86::DPPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22327 : { 1995 /* dpps */, X86::DPPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22328 : { 1995 /* dpps */, X86::DPPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22329 : { 2000 /* ds */, X86::DS_PREFIX, Convert_NoOperands, 0, { }, },
22330 : { 2003 /* emms */, X86::MMX_EMMS, Convert_NoOperands, 0, { }, },
22331 : { 2008 /* encls */, X86::ENCLS, Convert_NoOperands, 0, { }, },
22332 : { 2014 /* enclu */, X86::ENCLU, Convert_NoOperands, 0, { }, },
22333 : { 2020 /* enclv */, X86::ENCLV, Convert_NoOperands, 0, { }, },
22334 : { 2026 /* endbr32 */, X86::ENDBR32, Convert_NoOperands, 0, { }, },
22335 : { 2034 /* endbr64 */, X86::ENDBR64, Convert_NoOperands, 0, { }, },
22336 : { 2042 /* enter */, X86::ENTER, Convert__Imm1_0__Imm1_1, 0, { MCK_Imm, MCK_Imm }, },
22337 : { 2048 /* es */, X86::ES_PREFIX, Convert_NoOperands, 0, { }, },
22338 : { 2051 /* extractps */, X86::EXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
22339 : { 2051 /* extractps */, X86::EXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22340 : { 2061 /* extrq */, X86::EXTRQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22341 : { 2061 /* extrq */, X86::EXTRQI, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
22342 : { 2067 /* f2xm1 */, X86::F2XM1, Convert_NoOperands, 0, { }, },
22343 : { 2073 /* fabs */, X86::ABS_F, Convert_NoOperands, 0, { }, },
22344 : { 2078 /* fadd */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
22345 : { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22346 : { 2078 /* fadd */, X86::ADD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22347 : { 2078 /* fadd */, X86::ADD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22348 : { 2078 /* fadd */, X86::ADD_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22349 : { 2078 /* fadd */, X86::ADD_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22350 : { 2078 /* fadd */, X86::ADD_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22351 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST1, 0, { }, },
22352 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22353 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22354 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22355 : { 2089 /* faddp */, X86::ADD_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22356 : { 2101 /* fbld */, X86::FBLDm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22357 : { 2106 /* fbstp */, X86::FBSTPm, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22358 : { 2112 /* fchs */, X86::CHS_F, Convert_NoOperands, 0, { }, },
22359 : { 2117 /* fcmovb */, X86::CMOVB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22360 : { 2124 /* fcmovbe */, X86::CMOVBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22361 : { 2132 /* fcmove */, X86::CMOVE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22362 : { 2139 /* fcmovnb */, X86::CMOVNB_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22363 : { 2147 /* fcmovnbe */, X86::CMOVNBE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22364 : { 2156 /* fcmovne */, X86::CMOVNE_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22365 : { 2164 /* fcmovnu */, X86::CMOVNP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22366 : { 2172 /* fcmovu */, X86::CMOVP_F, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22367 : { 2179 /* fcom */, X86::COM_FST0r, Convert__regST1, 0, { }, },
22368 : { 2179 /* fcom */, X86::COM_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22369 : { 2179 /* fcom */, X86::FCOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22370 : { 2179 /* fcom */, X86::FCOM64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22371 : { 2184 /* fcomi */, X86::COM_FIr, Convert__regST1, 0, { }, },
22372 : { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
22373 : { 2184 /* fcomi */, X86::COM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22374 : { 2184 /* fcomi */, X86::COM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22375 : { 2196 /* fcomp */, X86::COMP_FST0r, Convert__regST1, 0, { }, },
22376 : { 2196 /* fcomp */, X86::COMP_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22377 : { 2196 /* fcomp */, X86::FCOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22378 : { 2196 /* fcomp */, X86::FCOMP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22379 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST1, 0, { }, },
22380 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
22381 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22382 : { 2202 /* fcompi */, X86::COM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22383 : { 2216 /* fcompp */, X86::FCOMPP, Convert_NoOperands, 0, { }, },
22384 : { 2236 /* fcos */, X86::COS_F, Convert_NoOperands, 0, { }, },
22385 : { 2241 /* fdecstp */, X86::FDECSTP, Convert_NoOperands, 0, { }, },
22386 : { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22387 : { 2249 /* fdiv */, X86::DIV_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22388 : { 2249 /* fdiv */, X86::DIV_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22389 : { 2249 /* fdiv */, X86::DIV_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22390 : { 2249 /* fdiv */, X86::DIV_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22391 : { 2249 /* fdiv */, X86::DIV_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22392 : { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__regST1, 0, { }, },
22393 : { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22394 : { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22395 : { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22396 : { 2260 /* fdivp */, X86::DIV_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22397 : { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22398 : { 2266 /* fdivr */, X86::DIVR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22399 : { 2266 /* fdivr */, X86::DIVR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22400 : { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22401 : { 2266 /* fdivr */, X86::DIVR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22402 : { 2266 /* fdivr */, X86::DIVR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22403 : { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST1, 0, { }, },
22404 : { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22405 : { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22406 : { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22407 : { 2279 /* fdivrp */, X86::DIVR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22408 : { 2299 /* femms */, X86::FEMMS, Convert_NoOperands, 0, { }, },
22409 : { 2305 /* ffree */, X86::FFREE, Convert__Reg1_0, 0, { MCK_RST }, },
22410 : { 2311 /* ffreep */, X86::FFREEP, Convert__Reg1_0, 0, { MCK_RST }, },
22411 : { 2318 /* fiadd */, X86::ADD_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22412 : { 2318 /* fiadd */, X86::ADD_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22413 : { 2338 /* ficom */, X86::FICOM16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22414 : { 2338 /* ficom */, X86::FICOM32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22415 : { 2351 /* ficomp */, X86::FICOMP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22416 : { 2351 /* ficomp */, X86::FICOMP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22417 : { 2381 /* fidiv */, X86::DIV_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22418 : { 2381 /* fidiv */, X86::DIV_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22419 : { 2394 /* fidivr */, X86::DIVR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22420 : { 2394 /* fidivr */, X86::DIVR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22421 : { 2424 /* fild */, X86::ILD_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22422 : { 2424 /* fild */, X86::ILD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22423 : { 2424 /* fild */, X86::ILD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22424 : { 2448 /* fimul */, X86::MUL_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22425 : { 2448 /* fimul */, X86::MUL_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22426 : { 2468 /* fincstp */, X86::FINCSTP, Convert_NoOperands, 0, { }, },
22427 : { 2476 /* fist */, X86::IST_F16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22428 : { 2476 /* fist */, X86::IST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22429 : { 2487 /* fistp */, X86::IST_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22430 : { 2487 /* fistp */, X86::IST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22431 : { 2487 /* fistp */, X86::IST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22432 : { 2521 /* fisttp */, X86::ISTT_FP16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22433 : { 2521 /* fisttp */, X86::ISTT_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22434 : { 2521 /* fisttp */, X86::ISTT_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22435 : { 2553 /* fisub */, X86::SUB_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22436 : { 2553 /* fisub */, X86::SUB_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22437 : { 2566 /* fisubr */, X86::SUBR_FI16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22438 : { 2566 /* fisubr */, X86::SUBR_FI32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22439 : { 2596 /* fld */, X86::LD_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
22440 : { 2596 /* fld */, X86::LD_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22441 : { 2596 /* fld */, X86::LD_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22442 : { 2596 /* fld */, X86::LD_F80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22443 : { 2600 /* fld1 */, X86::LD_F1, Convert_NoOperands, 0, { }, },
22444 : { 2605 /* fldcw */, X86::FLDCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22445 : { 2611 /* fldenv */, X86::FLDENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22446 : { 2623 /* fldl2e */, X86::FLDL2E, Convert_NoOperands, 0, { }, },
22447 : { 2630 /* fldl2t */, X86::FLDL2T, Convert_NoOperands, 0, { }, },
22448 : { 2637 /* fldlg2 */, X86::FLDLG2, Convert_NoOperands, 0, { }, },
22449 : { 2644 /* fldln2 */, X86::FLDLN2, Convert_NoOperands, 0, { }, },
22450 : { 2651 /* fldpi */, X86::FLDPI, Convert_NoOperands, 0, { }, },
22451 : { 2667 /* fldz */, X86::LD_F0, Convert_NoOperands, 0, { }, },
22452 : { 2672 /* fmul */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
22453 : { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22454 : { 2672 /* fmul */, X86::MUL_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22455 : { 2672 /* fmul */, X86::MUL_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22456 : { 2672 /* fmul */, X86::MUL_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22457 : { 2672 /* fmul */, X86::MUL_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22458 : { 2672 /* fmul */, X86::MUL_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22459 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST1, 0, { }, },
22460 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22461 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22462 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22463 : { 2683 /* fmulp */, X86::MUL_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22464 : { 2695 /* fnclex */, X86::FNCLEX, Convert_NoOperands, 0, { }, },
22465 : { 2702 /* fninit */, X86::FNINIT, Convert_NoOperands, 0, { }, },
22466 : { 2709 /* fnop */, X86::FNOP, Convert_NoOperands, 0, { }, },
22467 : { 2714 /* fnsave */, X86::FSAVEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22468 : { 2721 /* fnstcw */, X86::FNSTCW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22469 : { 2728 /* fnstenv */, X86::FSTENVm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22470 : { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { }, },
22471 : { 2736 /* fnstsw */, X86::FNSTSW16r, Convert_NoOperands, 0, { MCK_AX }, },
22472 : { 2736 /* fnstsw */, X86::FNSTSWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22473 : { 2743 /* fpatan */, X86::FPATAN, Convert_NoOperands, 0, { }, },
22474 : { 2750 /* fprem */, X86::FPREM, Convert_NoOperands, 0, { }, },
22475 : { 2756 /* fprem1 */, X86::FPREM1, Convert_NoOperands, 0, { }, },
22476 : { 2763 /* fptan */, X86::FPTAN, Convert_NoOperands, 0, { }, },
22477 : { 2769 /* frndint */, X86::FRNDINT, Convert_NoOperands, 0, { }, },
22478 : { 2777 /* frstor */, X86::FRSTORm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22479 : { 2784 /* fs */, X86::FS_PREFIX, Convert_NoOperands, 0, { }, },
22480 : { 2787 /* fscale */, X86::FSCALE, Convert_NoOperands, 0, { }, },
22481 : { 2794 /* fsin */, X86::SIN_F, Convert_NoOperands, 0, { }, },
22482 : { 2799 /* fsincos */, X86::FSINCOS, Convert_NoOperands, 0, { }, },
22483 : { 2807 /* fsqrt */, X86::SQRT_F, Convert_NoOperands, 0, { }, },
22484 : { 2813 /* fst */, X86::ST_Frr, Convert__Reg1_0, 0, { MCK_RST }, },
22485 : { 2813 /* fst */, X86::ST_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22486 : { 2813 /* fst */, X86::ST_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22487 : { 2822 /* fstp */, X86::ST_FPrr, Convert__Reg1_0, 0, { MCK_RST }, },
22488 : { 2822 /* fstp */, X86::ST_FP32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22489 : { 2822 /* fstp */, X86::ST_FP64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22490 : { 2822 /* fstp */, X86::ST_FP80m, Convert__Mem805_0, 0, { MCK_Mem80 }, },
22491 : { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22492 : { 2850 /* fsub */, X86::SUB_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22493 : { 2850 /* fsub */, X86::SUB_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22494 : { 2850 /* fsub */, X86::SUB_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22495 : { 2850 /* fsub */, X86::SUB_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22496 : { 2850 /* fsub */, X86::SUB_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22497 : { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__regST1, 0, { }, },
22498 : { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22499 : { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22500 : { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22501 : { 2861 /* fsubp */, X86::SUB_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22502 : { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_0, 0, { MCK_RST }, },
22503 : { 2867 /* fsubr */, X86::SUBR_F32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22504 : { 2867 /* fsubr */, X86::SUBR_F64m, Convert__Mem645_0, 0, { MCK_Mem64 }, },
22505 : { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22506 : { 2867 /* fsubr */, X86::SUBR_FST0r, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22507 : { 2867 /* fsubr */, X86::SUBR_FrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22508 : { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST1, 0, { }, },
22509 : { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST }, },
22510 : { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22511 : { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22512 : { 2880 /* fsubrp */, X86::SUBR_FPrST0, Convert__Reg1_0, 0, { MCK_RST, MCK_ST0 }, },
22513 : { 2900 /* ftst */, X86::TST_F, Convert_NoOperands, 0, { }, },
22514 : { 2905 /* fucom */, X86::UCOM_Fr, Convert__regST1, 0, { }, },
22515 : { 2905 /* fucom */, X86::UCOM_Fr, Convert__Reg1_0, 0, { MCK_RST }, },
22516 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST1, 0, { }, },
22517 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_0, 0, { MCK_RST }, },
22518 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22519 : { 2911 /* fucomi */, X86::UCOM_FIr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22520 : { 2918 /* fucomp */, X86::UCOM_FPr, Convert__regST1, 0, { }, },
22521 : { 2918 /* fucomp */, X86::UCOM_FPr, Convert__Reg1_0, 0, { MCK_RST }, },
22522 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST1, 0, { }, },
22523 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_0, 0, { MCK_RST }, },
22524 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__regST0, 0, { MCK_ST0, MCK_ST0 }, },
22525 : { 2925 /* fucompi */, X86::UCOM_FIPr, Convert__Reg1_1, 0, { MCK_ST0, MCK_RST }, },
22526 : { 2933 /* fucompp */, X86::UCOM_FPPr, Convert_NoOperands, 0, { }, },
22527 : { 2941 /* fxam */, X86::FXAM, Convert_NoOperands, 0, { }, },
22528 : { 2946 /* fxch */, X86::XCH_F, Convert__regST1, 0, { }, },
22529 : { 2946 /* fxch */, X86::XCH_F, Convert__Reg1_0, 0, { MCK_RST }, },
22530 : { 2951 /* fxrstor */, X86::FXRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
22531 : { 2959 /* fxrstor64 */, X86::FXRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22532 : { 2969 /* fxsave */, X86::FXSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
22533 : { 2976 /* fxsave64 */, X86::FXSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22534 : { 2985 /* fxtract */, X86::FXTRACT, Convert_NoOperands, 0, { }, },
22535 : { 2993 /* fyl2x */, X86::FYL2X, Convert_NoOperands, 0, { }, },
22536 : { 2999 /* fyl2xp1 */, X86::FYL2XP1, Convert_NoOperands, 0, { }, },
22537 : { 3007 /* getsec */, X86::GETSEC, Convert_NoOperands, 0, { }, },
22538 : { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22539 : { 3014 /* gf2p8affineinvqb */, X86::GF2P8AFFINEINVQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22540 : { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22541 : { 3031 /* gf2p8affineqb */, X86::GF2P8AFFINEQBrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
22542 : { 3045 /* gf2p8mulb */, X86::GF2P8MULBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22543 : { 3045 /* gf2p8mulb */, X86::GF2P8MULBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22544 : { 3055 /* gs */, X86::GS_PREFIX, Convert_NoOperands, 0, { }, },
22545 : { 3058 /* haddpd */, X86::HADDPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22546 : { 3058 /* haddpd */, X86::HADDPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22547 : { 3065 /* haddps */, X86::HADDPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22548 : { 3065 /* haddps */, X86::HADDPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22549 : { 3072 /* hlt */, X86::HLT, Convert_NoOperands, 0, { }, },
22550 : { 3076 /* hsubpd */, X86::HSUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22551 : { 3076 /* hsubpd */, X86::HSUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22552 : { 3083 /* hsubps */, X86::HSUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22553 : { 3083 /* hsubps */, X86::HSUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22554 : { 3090 /* idiv */, X86::IDIV16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22555 : { 3090 /* idiv */, X86::IDIV32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22556 : { 3090 /* idiv */, X86::IDIV64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22557 : { 3090 /* idiv */, X86::IDIV8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22558 : { 3090 /* idiv */, X86::IDIV16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22559 : { 3090 /* idiv */, X86::IDIV32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22560 : { 3090 /* idiv */, X86::IDIV64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22561 : { 3090 /* idiv */, X86::IDIV8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22562 : { 3090 /* idiv */, X86::IDIV8r, Convert__Reg1_1, 0, { MCK_AL, MCK_GR8 }, },
22563 : { 3090 /* idiv */, X86::IDIV8m, Convert__Mem85_1, 0, { MCK_AL, MCK_Mem8 }, },
22564 : { 3090 /* idiv */, X86::IDIV16r, Convert__Reg1_1, 0, { MCK_AX, MCK_GR16 }, },
22565 : { 3090 /* idiv */, X86::IDIV16m, Convert__Mem165_1, 0, { MCK_AX, MCK_Mem16 }, },
22566 : { 3090 /* idiv */, X86::IDIV32r, Convert__Reg1_1, 0, { MCK_EAX, MCK_GR32 }, },
22567 : { 3090 /* idiv */, X86::IDIV32m, Convert__Mem325_1, 0, { MCK_EAX, MCK_Mem32 }, },
22568 : { 3090 /* idiv */, X86::IDIV64r, Convert__Reg1_1, 0, { MCK_RAX, MCK_GR64 }, },
22569 : { 3090 /* idiv */, X86::IDIV64m, Convert__Mem645_1, 0, { MCK_RAX, MCK_Mem64 }, },
22570 : { 3119 /* imul */, X86::IMUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22571 : { 3119 /* imul */, X86::IMUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
22572 : { 3119 /* imul */, X86::IMUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
22573 : { 3119 /* imul */, X86::IMUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
22574 : { 3119 /* imul */, X86::IMUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22575 : { 3119 /* imul */, X86::IMUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22576 : { 3119 /* imul */, X86::IMUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22577 : { 3119 /* imul */, X86::IMUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22578 : { 3119 /* imul */, X86::IMUL16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22579 : { 3119 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_0__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
22580 : { 3119 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22581 : { 3119 /* imul */, X86::IMUL16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22582 : { 3119 /* imul */, X86::IMUL32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22583 : { 3119 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_0__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
22584 : { 3119 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22585 : { 3119 /* imul */, X86::IMUL32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22586 : { 3119 /* imul */, X86::IMUL64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22587 : { 3119 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_0__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
22588 : { 3119 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22589 : { 3119 /* imul */, X86::IMUL64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22590 : { 3119 /* imul */, X86::IMUL16rri8, Convert__Reg1_0__Reg1_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmSExti16i8 }, },
22591 : { 3119 /* imul */, X86::IMUL16rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR16, MCK_GR16, MCK_Imm }, },
22592 : { 3119 /* imul */, X86::IMUL16rmi8, Convert__Reg1_0__Mem165_1__ImmSExti16i81_2, 0, { MCK_GR16, MCK_Mem16, MCK_ImmSExti16i8 }, },
22593 : { 3119 /* imul */, X86::IMUL16rmi, Convert__Reg1_0__Mem165_1__Imm1_2, 0, { MCK_GR16, MCK_Mem16, MCK_Imm }, },
22594 : { 3119 /* imul */, X86::IMUL32rri8, Convert__Reg1_0__Reg1_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmSExti32i8 }, },
22595 : { 3119 /* imul */, X86::IMUL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22596 : { 3119 /* imul */, X86::IMUL32rmi8, Convert__Reg1_0__Mem325_1__ImmSExti32i81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmSExti32i8 }, },
22597 : { 3119 /* imul */, X86::IMUL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22598 : { 3119 /* imul */, X86::IMUL64rri8, Convert__Reg1_0__Reg1_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i8 }, },
22599 : { 3119 /* imul */, X86::IMUL64rri32, Convert__Reg1_0__Reg1_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmSExti64i32 }, },
22600 : { 3119 /* imul */, X86::IMUL64rmi8, Convert__Reg1_0__Mem645_1__ImmSExti64i81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i8 }, },
22601 : { 3119 /* imul */, X86::IMUL64rmi32, Convert__Reg1_0__Mem645_1__ImmSExti64i321_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmSExti64i32 }, },
22602 : { 3148 /* in */, X86::IN8rr, Convert_NoOperands, 0, { MCK_AL, MCK_DX }, },
22603 : { 3148 /* in */, X86::IN8ri, Convert__ImmUnsignedi81_1, 0, { MCK_AL, MCK_ImmUnsignedi8 }, },
22604 : { 3148 /* in */, X86::IN16rr, Convert_NoOperands, 0, { MCK_AX, MCK_DX }, },
22605 : { 3148 /* in */, X86::IN16ri, Convert__ImmUnsignedi81_1, 0, { MCK_AX, MCK_ImmUnsignedi8 }, },
22606 : { 3148 /* in */, X86::IN32rr, Convert_NoOperands, 0, { MCK_EAX, MCK_DX }, },
22607 : { 3148 /* in */, X86::IN32ri, Convert__ImmUnsignedi81_1, 0, { MCK_EAX, MCK_ImmUnsignedi8 }, },
22608 : { 3151 /* inb */, X86::IN8rr, Convert_NoOperands, 0, { MCK_DX }, },
22609 : { 3151 /* inb */, X86::IN8ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22610 : { 3155 /* inc */, X86::INC16r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR16 }, },
22611 : { 3155 /* inc */, X86::INC16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
22612 : { 3155 /* inc */, X86::INC32r_alt, Convert__Reg1_0__Tie0_1_1, Feature_Not64BitMode, { MCK_GR32 }, },
22613 : { 3155 /* inc */, X86::INC32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
22614 : { 3155 /* inc */, X86::INC64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
22615 : { 3155 /* inc */, X86::INC8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
22616 : { 3155 /* inc */, X86::INC16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22617 : { 3155 /* inc */, X86::INC32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22618 : { 3155 /* inc */, X86::INC64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22619 : { 3155 /* inc */, X86::INC8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22620 : { 3174 /* incsspd */, X86::INCSSPD, Convert__Reg1_0, 0, { MCK_GR32 }, },
22621 : { 3182 /* incsspq */, X86::INCSSPQ, Convert__Reg1_0, 0, { MCK_GR64 }, },
22622 : { 3195 /* inl */, X86::IN32rr, Convert_NoOperands, 0, { MCK_DX }, },
22623 : { 3195 /* inl */, X86::IN32ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22624 : { 3199 /* ins */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
22625 : { 3199 /* ins */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
22626 : { 3199 /* ins */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
22627 : { 3203 /* insb */, X86::INSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_DX }, },
22628 : { 3208 /* insd */, X86::INSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_DX }, },
22629 : { 3213 /* insertps */, X86::INSERTPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
22630 : { 3213 /* insertps */, X86::INSERTPSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
22631 : { 3222 /* insertq */, X86::INSERTQ, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22632 : { 3222 /* insertq */, X86::INSERTQI, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8, MCK_ImmUnsignedi8 }, },
22633 : { 3235 /* insw */, X86::INSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_DX }, },
22634 : { 3240 /* int */, X86::INT, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22635 : { 3244 /* int3 */, X86::INT3, Convert_NoOperands, 0, { }, },
22636 : { 3249 /* into */, X86::INTO, Convert_NoOperands, Feature_Not64BitMode, { }, },
22637 : { 3254 /* invd */, X86::INVD, Convert_NoOperands, 0, { }, },
22638 : { 3259 /* invept */, X86::INVEPT32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22639 : { 3259 /* invept */, X86::INVEPT64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22640 : { 3266 /* invlpg */, X86::INVLPG, Convert__Mem85_0, 0, { MCK_Mem8 }, },
22641 : { 3273 /* invlpga */, X86::INVLPGA32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX, MCK_ECX }, },
22642 : { 3273 /* invlpga */, X86::INVLPGA64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX, MCK_ECX }, },
22643 : { 3281 /* invpcid */, X86::INVPCID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22644 : { 3281 /* invpcid */, X86::INVPCID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22645 : { 3289 /* invvpid */, X86::INVVPID32, Convert__Reg1_0__Mem1285_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem128 }, },
22646 : { 3289 /* invvpid */, X86::INVVPID64, Convert__Reg1_0__Mem1285_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem128 }, },
22647 : { 3297 /* inw */, X86::IN16rr, Convert_NoOperands, 0, { MCK_DX }, },
22648 : { 3297 /* inw */, X86::IN16ri, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
22649 : { 3301 /* iret */, X86::IRET16, Convert_NoOperands, 0, { }, },
22650 : { 3306 /* iretd */, X86::IRET32, Convert_NoOperands, 0, { }, },
22651 : { 3318 /* iretq */, X86::IRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
22652 : { 3330 /* ja */, X86::JA_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22653 : { 3333 /* jae */, X86::JAE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22654 : { 3337 /* jb */, X86::JB_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22655 : { 3340 /* jbe */, X86::JBE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22656 : { 3344 /* jcxz */, X86::JCXZ, Convert__AbsMem1_0, Feature_Not64BitMode, { MCK_AbsMem }, },
22657 : { 3349 /* je */, X86::JE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22658 : { 3352 /* jecxz */, X86::JECXZ, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22659 : { 3358 /* jg */, X86::JG_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22660 : { 3361 /* jge */, X86::JGE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22661 : { 3365 /* jl */, X86::JL_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22662 : { 3368 /* jle */, X86::JLE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22663 : { 3372 /* jmp */, X86::JMP16r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
22664 : { 3372 /* jmp */, X86::JMP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
22665 : { 3372 /* jmp */, X86::JMP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
22666 : { 3372 /* jmp */, X86::JMP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22667 : { 3372 /* jmp */, X86::JMP16m, Convert__Mem165_0, Feature_Not64BitMode, { MCK_Mem16 }, },
22668 : { 3372 /* jmp */, X86::JMP32m, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
22669 : { 3372 /* jmp */, X86::JMP64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
22670 : { 3372 /* jmp */, X86::FARJMP32m, Convert__Mem5_0, 0, { MCK_Mem }, },
22671 : { 3372 /* jmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22672 : { 3372 /* jmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22673 : { 3376 /* jmpl */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22674 : { 3386 /* jmpw */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_Not64BitMode, { MCK_Imm, MCK_Imm }, },
22675 : { 3391 /* jne */, X86::JNE_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22676 : { 3395 /* jno */, X86::JNO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22677 : { 3399 /* jnp */, X86::JNP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22678 : { 3403 /* jns */, X86::JNS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22679 : { 3407 /* jo */, X86::JO_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22680 : { 3410 /* jp */, X86::JP_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22681 : { 3413 /* jrcxz */, X86::JRCXZ, Convert__AbsMem1_0, Feature_In64BitMode, { MCK_AbsMem }, },
22682 : { 3419 /* js */, X86::JS_1, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22683 : { 3422 /* kaddb */, X86::KADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22684 : { 3428 /* kaddd */, X86::KADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22685 : { 3434 /* kaddq */, X86::KADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22686 : { 3440 /* kaddw */, X86::KADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22687 : { 3446 /* kandb */, X86::KANDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22688 : { 3452 /* kandd */, X86::KANDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22689 : { 3458 /* kandnb */, X86::KANDNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22690 : { 3465 /* kandnd */, X86::KANDNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22691 : { 3472 /* kandnq */, X86::KANDNQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22692 : { 3479 /* kandnw */, X86::KANDNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22693 : { 3486 /* kandq */, X86::KANDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22694 : { 3492 /* kandw */, X86::KANDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22695 : { 3498 /* kmovb */, X86::KMOVBkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22696 : { 3498 /* kmovb */, X86::KMOVBkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR32 }, },
22697 : { 3498 /* kmovb */, X86::KMOVBkm, Convert__Reg1_0__Mem85_1, 0, { MCK_VK1, MCK_Mem8 }, },
22698 : { 3498 /* kmovb */, X86::KMOVBrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VK1 }, },
22699 : { 3498 /* kmovb */, X86::KMOVBmk, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_VK1 }, },
22700 : { 3504 /* kmovd */, X86::KMOVDkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22701 : { 3504 /* kmovd */, X86::KMOVDkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR32 }, },
22702 : { 3504 /* kmovd */, X86::KMOVDkm, Convert__Reg1_0__Mem325_1, 0, { MCK_VK1, MCK_Mem32 }, },
22703 : { 3504 /* kmovd */, X86::KMOVDrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VK1 }, },
22704 : { 3504 /* kmovd */, X86::KMOVDmk, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VK1 }, },
22705 : { 3510 /* kmovq */, X86::KMOVQkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22706 : { 3510 /* kmovq */, X86::KMOVQkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR64 }, },
22707 : { 3510 /* kmovq */, X86::KMOVQkm, Convert__Reg1_0__Mem645_1, 0, { MCK_VK1, MCK_Mem64 }, },
22708 : { 3510 /* kmovq */, X86::KMOVQrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VK1 }, },
22709 : { 3510 /* kmovq */, X86::KMOVQmk, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VK1 }, },
22710 : { 3516 /* kmovw */, X86::KMOVWkk, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22711 : { 3516 /* kmovw */, X86::KMOVWkr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_GR32 }, },
22712 : { 3516 /* kmovw */, X86::KMOVWkm, Convert__Reg1_0__Mem165_1, 0, { MCK_VK1, MCK_Mem16 }, },
22713 : { 3516 /* kmovw */, X86::KMOVWrk, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VK1 }, },
22714 : { 3516 /* kmovw */, X86::KMOVWmk, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_VK1 }, },
22715 : { 3522 /* knotb */, X86::KNOTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22716 : { 3528 /* knotd */, X86::KNOTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22717 : { 3534 /* knotq */, X86::KNOTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22718 : { 3540 /* knotw */, X86::KNOTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22719 : { 3546 /* korb */, X86::KORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22720 : { 3551 /* kord */, X86::KORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22721 : { 3556 /* korq */, X86::KORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22722 : { 3561 /* kortestb */, X86::KORTESTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22723 : { 3570 /* kortestd */, X86::KORTESTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22724 : { 3579 /* kortestq */, X86::KORTESTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22725 : { 3588 /* kortestw */, X86::KORTESTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22726 : { 3597 /* korw */, X86::KORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22727 : { 3602 /* kshiftlb */, X86::KSHIFTLBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22728 : { 3611 /* kshiftld */, X86::KSHIFTLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22729 : { 3620 /* kshiftlq */, X86::KSHIFTLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22730 : { 3629 /* kshiftlw */, X86::KSHIFTLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22731 : { 3638 /* kshiftrb */, X86::KSHIFTRBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22732 : { 3647 /* kshiftrd */, X86::KSHIFTRDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22733 : { 3656 /* kshiftrq */, X86::KSHIFTRQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22734 : { 3665 /* kshiftrw */, X86::KSHIFTRWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VK1, MCK_ImmUnsignedi8 }, },
22735 : { 3674 /* ktestb */, X86::KTESTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22736 : { 3681 /* ktestd */, X86::KTESTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22737 : { 3688 /* ktestq */, X86::KTESTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22738 : { 3695 /* ktestw */, X86::KTESTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VK1 }, },
22739 : { 3702 /* kunpckbw */, X86::KUNPCKBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22740 : { 3711 /* kunpckdq */, X86::KUNPCKDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22741 : { 3720 /* kunpckwd */, X86::KUNPCKWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22742 : { 3729 /* kxnorb */, X86::KXNORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22743 : { 3736 /* kxnord */, X86::KXNORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22744 : { 3743 /* kxnorq */, X86::KXNORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22745 : { 3750 /* kxnorw */, X86::KXNORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22746 : { 3757 /* kxorb */, X86::KXORBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22747 : { 3763 /* kxord */, X86::KXORDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22748 : { 3769 /* kxorq */, X86::KXORQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22749 : { 3775 /* kxorw */, X86::KXORWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VK1, MCK_VK1 }, },
22750 : { 3781 /* lahf */, X86::LAHF, Convert_NoOperands, 0, { }, },
22751 : { 3786 /* lar */, X86::LAR16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22752 : { 3786 /* lar */, X86::LAR16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22753 : { 3786 /* lar */, X86::LAR32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22754 : { 3786 /* lar */, X86::LAR32rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22755 : { 3786 /* lar */, X86::LAR64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
22756 : { 3786 /* lar */, X86::LAR64rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22757 : { 3805 /* lcall */, X86::FARCALL32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
22758 : { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
22759 : { 3805 /* lcall */, X86::FARCALL16m, Convert__Mem5_0, 0, { MCK_Mem }, },
22760 : { 3805 /* lcall */, X86::FARCALL64, Convert__Mem5_0, 0, { MCK_Mem }, },
22761 : { 3805 /* lcall */, X86::FARCALL32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22762 : { 3805 /* lcall */, X86::FARCALL16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22763 : { 3832 /* lddqu */, X86::LDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22764 : { 3838 /* ldmxcsr */, X86::LDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
22765 : { 3846 /* lds */, X86::LDS16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
22766 : { 3846 /* lds */, X86::LDS32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22767 : { 3860 /* lea */, X86::LEA16r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22768 : { 3860 /* lea */, X86::LEA32r, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22769 : { 3860 /* lea */, X86::LEA64_32r, Convert__Reg1_0__Mem5_1, Feature_In64BitMode, { MCK_GR32, MCK_Mem }, },
22770 : { 3860 /* lea */, X86::LEA64r, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22771 : { 3874 /* leave */, X86::LEAVE, Convert_NoOperands, Feature_Not64BitMode, { }, },
22772 : { 3874 /* leave */, X86::LEAVE64, Convert_NoOperands, Feature_In64BitMode, { }, },
22773 : { 3885 /* les */, X86::LES16rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem }, },
22774 : { 3885 /* les */, X86::LES32rm, Convert__Reg1_0__Mem5_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem }, },
22775 : { 3899 /* lfence */, X86::LFENCE, Convert_NoOperands, 0, { }, },
22776 : { 3906 /* lfs */, X86::LFS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22777 : { 3906 /* lfs */, X86::LFS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22778 : { 3906 /* lfs */, X86::LFS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22779 : { 3925 /* lgdt */, X86::LGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22780 : { 3930 /* lgdtd */, X86::LGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22781 : { 3948 /* lgdtw */, X86::LGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22782 : { 3954 /* lgs */, X86::LGS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22783 : { 3954 /* lgs */, X86::LGS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22784 : { 3954 /* lgs */, X86::LGS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22785 : { 3973 /* lidt */, X86::LIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22786 : { 3978 /* lidtd */, X86::LIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22787 : { 3996 /* lidtw */, X86::LIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
22788 : { 4002 /* ljmp */, X86::FARJMP64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
22789 : { 4002 /* ljmp */, X86::FARJMP32m, Convert__Mem5_0, Feature_Not16BitMode, { MCK_Mem }, },
22790 : { 4002 /* ljmp */, X86::FARJMP16m, Convert__Mem5_0, Feature_In16BitMode, { MCK_Mem }, },
22791 : { 4002 /* ljmp */, X86::FARJMP32i, Convert__Imm1_1__Imm1_0, Feature_In32BitMode, { MCK_Imm, MCK_Imm }, },
22792 : { 4002 /* ljmp */, X86::FARJMP16i, Convert__Imm1_1__Imm1_0, Feature_In16BitMode, { MCK_Imm, MCK_Imm }, },
22793 : { 4025 /* lldt */, X86::LLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22794 : { 4025 /* lldt */, X86::LLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22795 : { 4036 /* llwpcb */, X86::LLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
22796 : { 4036 /* llwpcb */, X86::LLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
22797 : { 4043 /* lmsw */, X86::LMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
22798 : { 4043 /* lmsw */, X86::LMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22799 : { 4054 /* lock */, X86::LOCK_PREFIX, Convert_NoOperands, 0, { }, },
22800 : { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
22801 : { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
22802 : { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
22803 : { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
22804 : { 4059 /* lods */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
22805 : { 4059 /* lods */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
22806 : { 4059 /* lods */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
22807 : { 4059 /* lods */, X86::LODSQ, Convert__SrcIdx642_1, Feature_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
22808 : { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_0, 0, { MCK_SrcIdx8 }, },
22809 : { 4064 /* lodsb */, X86::LODSB, Convert__SrcIdx82_1, 0, { MCK_AL, MCK_SrcIdx8 }, },
22810 : { 4070 /* lodsd */, X86::LODSL, Convert__SrcIdx322_0, 0, { MCK_SrcIdx32 }, },
22811 : { 4070 /* lodsd */, X86::LODSL, Convert__SrcIdx322_1, 0, { MCK_EAX, MCK_SrcIdx32 }, },
22812 : { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_0, Feature_In64BitMode, { MCK_SrcIdx64 }, },
22813 : { 4082 /* lodsq */, X86::LODSQ, Convert__SrcIdx642_1, Feature_In64BitMode, { MCK_RAX, MCK_SrcIdx64 }, },
22814 : { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_0, 0, { MCK_SrcIdx16 }, },
22815 : { 4088 /* lodsw */, X86::LODSW, Convert__SrcIdx162_1, 0, { MCK_AX, MCK_SrcIdx16 }, },
22816 : { 4094 /* loop */, X86::LOOP, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22817 : { 4099 /* loope */, X86::LOOPE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22818 : { 4105 /* loopne */, X86::LOOPNE, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
22819 : { 4130 /* lsl */, X86::LSL16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22820 : { 4130 /* lsl */, X86::LSL16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22821 : { 4130 /* lsl */, X86::LSL32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22822 : { 4130 /* lsl */, X86::LSL32rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
22823 : { 4130 /* lsl */, X86::LSL64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR32 }, },
22824 : { 4130 /* lsl */, X86::LSL64rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
22825 : { 4149 /* lss */, X86::LSS16rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR16, MCK_Mem }, },
22826 : { 4149 /* lss */, X86::LSS32rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR32, MCK_Mem }, },
22827 : { 4149 /* lss */, X86::LSS64rm, Convert__Reg1_0__Mem5_1, 0, { MCK_GR64, MCK_Mem }, },
22828 : { 4168 /* ltr */, X86::LTRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
22829 : { 4168 /* ltr */, X86::LTRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
22830 : { 4177 /* lwpins */, X86::LWPINS32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22831 : { 4177 /* lwpins */, X86::LWPINS32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22832 : { 4177 /* lwpins */, X86::LWPINS64rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR64, MCK_GR32, MCK_Imm }, },
22833 : { 4177 /* lwpins */, X86::LWPINS64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
22834 : { 4184 /* lwpval */, X86::LWPVAL32rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR32, MCK_GR32, MCK_Imm }, },
22835 : { 4184 /* lwpval */, X86::LWPVAL32rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR32, MCK_Mem32, MCK_Imm }, },
22836 : { 4184 /* lwpval */, X86::LWPVAL64rri, Convert__Reg1_0__Reg1_1__Imm1_2, 0, { MCK_GR64, MCK_GR32, MCK_Imm }, },
22837 : { 4184 /* lwpval */, X86::LWPVAL64rmi, Convert__Reg1_0__Mem325_1__Imm1_2, 0, { MCK_GR64, MCK_Mem32, MCK_Imm }, },
22838 : { 4191 /* lzcnt */, X86::LZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22839 : { 4191 /* lzcnt */, X86::LZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22840 : { 4191 /* lzcnt */, X86::LZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22841 : { 4191 /* lzcnt */, X86::LZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22842 : { 4191 /* lzcnt */, X86::LZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22843 : { 4191 /* lzcnt */, X86::LZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22844 : { 4218 /* maskmovdqu */, X86::MASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
22845 : { 4218 /* maskmovdqu */, X86::MASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
22846 : { 4229 /* maskmovq */, X86::MMX_MASKMOVQ, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_VR64, MCK_VR64 }, },
22847 : { 4229 /* maskmovq */, X86::MMX_MASKMOVQ64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_VR64, MCK_VR64 }, },
22848 : { 4238 /* maxpd */, X86::MAXPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22849 : { 4238 /* maxpd */, X86::MAXPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22850 : { 4244 /* maxps */, X86::MAXPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22851 : { 4244 /* maxps */, X86::MAXPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22852 : { 4250 /* maxsd */, X86::MAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22853 : { 4250 /* maxsd */, X86::MAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22854 : { 4256 /* maxss */, X86::MAXSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22855 : { 4256 /* maxss */, X86::MAXSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22856 : { 4262 /* mfence */, X86::MFENCE, Convert_NoOperands, 0, { }, },
22857 : { 4269 /* minpd */, X86::MINPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22858 : { 4269 /* minpd */, X86::MINPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22859 : { 4275 /* minps */, X86::MINPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22860 : { 4275 /* minps */, X86::MINPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22861 : { 4281 /* minsd */, X86::MINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22862 : { 4281 /* minsd */, X86::MINSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22863 : { 4287 /* minss */, X86::MINSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22864 : { 4287 /* minss */, X86::MINSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22865 : { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, 0, { }, },
22866 : { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
22867 : { 4293 /* monitor */, X86::MONITORrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
22868 : { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, 0, { }, },
22869 : { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EDX, MCK_ECX, MCK_EAX }, },
22870 : { 4301 /* monitorx */, X86::MONITORXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RDX, MCK_RCX, MCK_RAX }, },
22871 : { 4310 /* montmul */, X86::MONTMUL, Convert_NoOperands, 0, { }, },
22872 : { 4318 /* mov */, X86::MOV8ao16, Convert__MemOffs16_82_1, 0, { MCK_AL, MCK_MemOffs16_8 }, },
22873 : { 4318 /* mov */, X86::MOV8ao32, Convert__MemOffs32_82_1, 0, { MCK_AL, MCK_MemOffs32_8 }, },
22874 : { 4318 /* mov */, X86::MOV16ao16, Convert__MemOffs16_162_1, 0, { MCK_AX, MCK_MemOffs16_16 }, },
22875 : { 4318 /* mov */, X86::MOV16ao32, Convert__MemOffs32_162_1, 0, { MCK_AX, MCK_MemOffs32_16 }, },
22876 : { 4318 /* mov */, X86::MOV32ao16, Convert__MemOffs16_322_1, 0, { MCK_EAX, MCK_MemOffs16_32 }, },
22877 : { 4318 /* mov */, X86::MOV32ao32, Convert__MemOffs32_322_1, 0, { MCK_EAX, MCK_MemOffs32_32 }, },
22878 : { 4318 /* mov */, X86::MOV64ao32, Convert__MemOffs32_642_1, 0, { MCK_RAX, MCK_MemOffs32_64 }, },
22879 : { 4318 /* mov */, X86::MOV16sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR16 }, },
22880 : { 4318 /* mov */, X86::MOV32sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR32 }, },
22881 : { 4318 /* mov */, X86::MOV64sr, Convert__Reg1_0__Reg1_1, 0, { MCK_SEGMENT_REG, MCK_GR64 }, },
22882 : { 4318 /* mov */, X86::MOV16sm, Convert__Reg1_0__Mem165_1, 0, { MCK_SEGMENT_REG, MCK_Mem16 }, },
22883 : { 4318 /* mov */, X86::MOV32cr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_CONTROL_REG, MCK_GR32 }, },
22884 : { 4318 /* mov */, X86::MOV64cr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_CONTROL_REG, MCK_GR64 }, },
22885 : { 4318 /* mov */, X86::MOV32dr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_DEBUG_REG, MCK_GR32 }, },
22886 : { 4318 /* mov */, X86::MOV64dr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_DEBUG_REG, MCK_GR64 }, },
22887 : { 4318 /* mov */, X86::MOV16rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_SEGMENT_REG }, },
22888 : { 4318 /* mov */, X86::MOV16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22889 : { 4318 /* mov */, X86::MOV16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
22890 : { 4318 /* mov */, X86::MOV16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22891 : { 4318 /* mov */, X86::MOV32rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_SEGMENT_REG }, },
22892 : { 4318 /* mov */, X86::MOV32rc, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_CONTROL_REG }, },
22893 : { 4318 /* mov */, X86::MOV32rd, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_DEBUG_REG }, },
22894 : { 4318 /* mov */, X86::MOV32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22895 : { 4318 /* mov */, X86::MOV32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
22896 : { 4318 /* mov */, X86::MOV32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22897 : { 4318 /* mov */, X86::MOV64rs, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_SEGMENT_REG }, },
22898 : { 4318 /* mov */, X86::MOV64rc, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_CONTROL_REG }, },
22899 : { 4318 /* mov */, X86::MOV64rd, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_DEBUG_REG }, },
22900 : { 4318 /* mov */, X86::MOV64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22901 : { 4318 /* mov */, X86::MOV64ri32, Convert__Reg1_0__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
22902 : { 4318 /* mov */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
22903 : { 4318 /* mov */, X86::MOV64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22904 : { 4318 /* mov */, X86::MOV8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22905 : { 4318 /* mov */, X86::MOV8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
22906 : { 4318 /* mov */, X86::MOV8rm, Convert__Reg1_0__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
22907 : { 4318 /* mov */, X86::MOV16o16a, Convert__MemOffs16_162_0, 0, { MCK_MemOffs16_16, MCK_AX }, },
22908 : { 4318 /* mov */, X86::MOV32o16a, Convert__MemOffs16_322_0, 0, { MCK_MemOffs16_32, MCK_EAX }, },
22909 : { 4318 /* mov */, X86::MOV8o16a, Convert__MemOffs16_82_0, 0, { MCK_MemOffs16_8, MCK_AL }, },
22910 : { 4318 /* mov */, X86::MOV16o32a, Convert__MemOffs32_162_0, 0, { MCK_MemOffs32_16, MCK_AX }, },
22911 : { 4318 /* mov */, X86::MOV32o32a, Convert__MemOffs32_322_0, 0, { MCK_MemOffs32_32, MCK_EAX }, },
22912 : { 4318 /* mov */, X86::MOV64o32a, Convert__MemOffs32_642_0, 0, { MCK_MemOffs32_64, MCK_RAX }, },
22913 : { 4318 /* mov */, X86::MOV8o32a, Convert__MemOffs32_82_0, 0, { MCK_MemOffs32_8, MCK_AL }, },
22914 : { 4318 /* mov */, X86::MOV16ms, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_SEGMENT_REG }, },
22915 : { 4318 /* mov */, X86::MOV16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22916 : { 4318 /* mov */, X86::MOV16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
22917 : { 4318 /* mov */, X86::MOV32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22918 : { 4318 /* mov */, X86::MOV32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
22919 : { 4318 /* mov */, X86::MOV64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22920 : { 4318 /* mov */, X86::MOV64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
22921 : { 4318 /* mov */, X86::MOV8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
22922 : { 4318 /* mov */, X86::MOV8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
22923 : { 4322 /* mov.s */, X86::MOV16rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
22924 : { 4322 /* mov.s */, X86::MOV32rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
22925 : { 4322 /* mov.s */, X86::MOV64rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
22926 : { 4322 /* mov.s */, X86::MOV8rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
22927 : { 4328 /* movabs */, X86::MOV8ao64, Convert__MemOffs64_82_1, 0, { MCK_AL, MCK_MemOffs64_8 }, },
22928 : { 4328 /* movabs */, X86::MOV16ao64, Convert__MemOffs64_162_1, 0, { MCK_AX, MCK_MemOffs64_16 }, },
22929 : { 4328 /* movabs */, X86::MOV32ao64, Convert__MemOffs64_322_1, 0, { MCK_EAX, MCK_MemOffs64_32 }, },
22930 : { 4328 /* movabs */, X86::MOV64ao64, Convert__MemOffs64_642_1, 0, { MCK_RAX, MCK_MemOffs64_64 }, },
22931 : { 4328 /* movabs */, X86::MOV64ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR64, MCK_Imm }, },
22932 : { 4328 /* movabs */, X86::MOV16o64a, Convert__MemOffs64_162_0, 0, { MCK_MemOffs64_16, MCK_AX }, },
22933 : { 4328 /* movabs */, X86::MOV32o64a, Convert__MemOffs64_322_0, 0, { MCK_MemOffs64_32, MCK_EAX }, },
22934 : { 4328 /* movabs */, X86::MOV64o64a, Convert__MemOffs64_642_0, 0, { MCK_MemOffs64_64, MCK_RAX }, },
22935 : { 4328 /* movabs */, X86::MOV8o64a, Convert__MemOffs64_82_0, 0, { MCK_MemOffs64_8, MCK_AL }, },
22936 : { 4367 /* movapd */, X86::MOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22937 : { 4367 /* movapd */, X86::MOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22938 : { 4367 /* movapd */, X86::MOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22939 : { 4374 /* movapd.s */, X86::MOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22940 : { 4383 /* movaps */, X86::MOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22941 : { 4383 /* movaps */, X86::MOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22942 : { 4383 /* movaps */, X86::MOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22943 : { 4390 /* movaps.s */, X86::MOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22944 : { 4411 /* movbe */, X86::MOVBE16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
22945 : { 4411 /* movbe */, X86::MOVBE32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
22946 : { 4411 /* movbe */, X86::MOVBE64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
22947 : { 4411 /* movbe */, X86::MOVBE16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
22948 : { 4411 /* movbe */, X86::MOVBE32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22949 : { 4411 /* movbe */, X86::MOVBE64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22950 : { 4438 /* movd */, X86::MMX_MOVD64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR32 }, },
22951 : { 4438 /* movd */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
22952 : { 4438 /* movd */, X86::MMX_MOVD64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
22953 : { 4438 /* movd */, X86::MOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
22954 : { 4438 /* movd */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
22955 : { 4438 /* movd */, X86::MOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
22956 : { 4438 /* movd */, X86::MMX_MOVD64grr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_VR64 }, },
22957 : { 4438 /* movd */, X86::MOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
22958 : { 4438 /* movd */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
22959 : { 4438 /* movd */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
22960 : { 4438 /* movd */, X86::MMX_MOVD64mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR64 }, },
22961 : { 4438 /* movd */, X86::MOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22962 : { 4443 /* movddup */, X86::MOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22963 : { 4443 /* movddup */, X86::MOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22964 : { 4451 /* movdir64b */, X86::MOVDIR64B16, Convert__Reg1_0__Mem5125_1, Feature_Not64BitMode, { MCK_GR16, MCK_Mem512 }, },
22965 : { 4451 /* movdir64b */, X86::MOVDIR64B32, Convert__Reg1_0__Mem5125_1, 0, { MCK_GR32, MCK_Mem512 }, },
22966 : { 4451 /* movdir64b */, X86::MOVDIR64B64, Convert__Reg1_0__Mem5125_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem512 }, },
22967 : { 4461 /* movdiri */, X86::MOVDIRI32, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22968 : { 4461 /* movdiri */, X86::MOVDIRI64, Convert__Mem645_0__Reg1_1, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
22969 : { 4469 /* movdq2q */, X86::MMX_MOVDQ2Qrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_FR32 }, },
22970 : { 4477 /* movdqa */, X86::MOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22971 : { 4477 /* movdqa */, X86::MOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22972 : { 4477 /* movdqa */, X86::MOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22973 : { 4484 /* movdqa.s */, X86::MOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22974 : { 4493 /* movdqu */, X86::MOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22975 : { 4493 /* movdqu */, X86::MOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22976 : { 4493 /* movdqu */, X86::MOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22977 : { 4500 /* movdqu.s */, X86::MOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22978 : { 4509 /* movhlps */, X86::MOVHLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22979 : { 4517 /* movhpd */, X86::MOVHPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22980 : { 4517 /* movhpd */, X86::MOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22981 : { 4524 /* movhps */, X86::MOVHPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22982 : { 4524 /* movhps */, X86::MOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22983 : { 4543 /* movlhps */, X86::MOVLHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
22984 : { 4551 /* movlpd */, X86::MOVLPDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22985 : { 4551 /* movlpd */, X86::MOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22986 : { 4558 /* movlps */, X86::MOVLPSrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
22987 : { 4558 /* movlps */, X86::MOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22988 : { 4565 /* movmskpd */, X86::MOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
22989 : { 4574 /* movmskps */, X86::MOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
22990 : { 4583 /* movntdq */, X86::MOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22991 : { 4591 /* movntdqa */, X86::MOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
22992 : { 4600 /* movnti */, X86::MOVNTImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
22993 : { 4600 /* movnti */, X86::MOVNTI_64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
22994 : { 4623 /* movntpd */, X86::MOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22995 : { 4631 /* movntps */, X86::MOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
22996 : { 4639 /* movntq */, X86::MMX_MOVNTQmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
22997 : { 4646 /* movntsd */, X86::MOVNTSD, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
22998 : { 4654 /* movntss */, X86::MOVNTSS, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
22999 : { 4662 /* movq */, X86::MMX_MOVQ64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23000 : { 4662 /* movq */, X86::MMX_MOVD64to64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_GR64 }, },
23001 : { 4662 /* movq */, X86::MMX_MOVQ64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23002 : { 4662 /* movq */, X86::MOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23003 : { 4662 /* movq */, X86::MOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
23004 : { 4662 /* movq */, X86::MOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23005 : { 4662 /* movq */, X86::MMX_MOVD64from64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_VR64 }, },
23006 : { 4662 /* movq */, X86::MOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
23007 : { 4662 /* movq */, X86::MMX_MOVQ64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR64 }, },
23008 : { 4662 /* movq */, X86::MOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
23009 : { 4667 /* movq.s */, X86::MMX_MOVQ64rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23010 : { 4667 /* movq.s */, X86::MOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23011 : { 4674 /* movq2dq */, X86::MMX_MOVQ2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR64 }, },
23012 : { 4682 /* movs */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
23013 : { 4682 /* movs */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
23014 : { 4682 /* movs */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
23015 : { 4682 /* movs */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
23016 : { 4687 /* movsb */, X86::MOVSB, Convert__DstIdx81_0__SrcIdx82_1, 0, { MCK_DstIdx8, MCK_SrcIdx8 }, },
23017 : { 4714 /* movsd */, X86::MOVSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23018 : { 4714 /* movsd */, X86::MOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23019 : { 4714 /* movsd */, X86::MOVSL, Convert__DstIdx321_0__SrcIdx322_1, 0, { MCK_DstIdx32, MCK_SrcIdx32 }, },
23020 : { 4714 /* movsd */, X86::MOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
23021 : { 4720 /* movsd.s */, X86::MOVSDrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23022 : { 4728 /* movshdup */, X86::MOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23023 : { 4728 /* movshdup */, X86::MOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23024 : { 4743 /* movsldup */, X86::MOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23025 : { 4743 /* movsldup */, X86::MOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23026 : { 4759 /* movsq */, X86::MOVSQ, Convert__DstIdx641_0__SrcIdx642_1, Feature_In64BitMode, { MCK_DstIdx64, MCK_SrcIdx64 }, },
23027 : { 4765 /* movss */, X86::MOVSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23028 : { 4765 /* movss */, X86::MOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23029 : { 4765 /* movss */, X86::MOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
23030 : { 4771 /* movss.s */, X86::MOVSSrr_REV, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23031 : { 4779 /* movsw */, X86::MOVSW, Convert__DstIdx161_0__SrcIdx162_1, 0, { MCK_DstIdx16, MCK_SrcIdx16 }, },
23032 : { 4799 /* movsx */, X86::MOVSX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
23033 : { 4799 /* movsx */, X86::MOVSX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
23034 : { 4799 /* movsx */, X86::MOVSX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
23035 : { 4799 /* movsx */, X86::MOVSX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
23036 : { 4799 /* movsx */, X86::MOVSX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
23037 : { 4799 /* movsx */, X86::MOVSX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
23038 : { 4799 /* movsx */, X86::MOVSX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
23039 : { 4799 /* movsx */, X86::MOVSX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
23040 : { 4799 /* movsx */, X86::MOVSX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
23041 : { 4799 /* movsx */, X86::MOVSX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
23042 : { 4805 /* movsxd */, X86::MOVSX64rr32, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR32 }, },
23043 : { 4805 /* movsxd */, X86::MOVSX64rm32, Convert__Reg1_0__Mem325_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem32 }, },
23044 : { 4812 /* movupd */, X86::MOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23045 : { 4812 /* movupd */, X86::MOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23046 : { 4812 /* movupd */, X86::MOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
23047 : { 4819 /* movupd.s */, X86::MOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23048 : { 4828 /* movups */, X86::MOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23049 : { 4828 /* movups */, X86::MOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23050 : { 4828 /* movups */, X86::MOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
23051 : { 4835 /* movups.s */, X86::MOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23052 : { 4891 /* movzx */, X86::MOVZX16rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR8 }, },
23053 : { 4891 /* movzx */, X86::MOVZX16rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR16, MCK_Mem8 }, },
23054 : { 4891 /* movzx */, X86::MOVZX32rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR16 }, },
23055 : { 4891 /* movzx */, X86::MOVZX32rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR8 }, },
23056 : { 4891 /* movzx */, X86::MOVZX32rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR32, MCK_Mem16 }, },
23057 : { 4891 /* movzx */, X86::MOVZX32rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR32, MCK_Mem8 }, },
23058 : { 4891 /* movzx */, X86::MOVZX64rr16, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR16 }, },
23059 : { 4891 /* movzx */, X86::MOVZX64rr8, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR8 }, },
23060 : { 4891 /* movzx */, X86::MOVZX64rm16, Convert__Reg1_0__Mem165_1, 0, { MCK_GR64, MCK_Mem16 }, },
23061 : { 4891 /* movzx */, X86::MOVZX64rm8, Convert__Reg1_0__Mem85_1, 0, { MCK_GR64, MCK_Mem8 }, },
23062 : { 4897 /* mpsadbw */, X86::MPSADBWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23063 : { 4897 /* mpsadbw */, X86::MPSADBWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23064 : { 4905 /* mul */, X86::MUL16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23065 : { 4905 /* mul */, X86::MUL32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23066 : { 4905 /* mul */, X86::MUL64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23067 : { 4905 /* mul */, X86::MUL8r, Convert__Reg1_0, 0, { MCK_GR8 }, },
23068 : { 4905 /* mul */, X86::MUL16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23069 : { 4905 /* mul */, X86::MUL32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23070 : { 4905 /* mul */, X86::MUL64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23071 : { 4905 /* mul */, X86::MUL8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23072 : { 4919 /* mulpd */, X86::MULPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23073 : { 4919 /* mulpd */, X86::MULPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23074 : { 4925 /* mulps */, X86::MULPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23075 : { 4925 /* mulps */, X86::MULPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23076 : { 4936 /* mulsd */, X86::MULSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23077 : { 4936 /* mulsd */, X86::MULSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23078 : { 4942 /* mulss */, X86::MULSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23079 : { 4942 /* mulss */, X86::MULSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23080 : { 4953 /* mulx */, X86::MULX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23081 : { 4953 /* mulx */, X86::MULX32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23082 : { 4953 /* mulx */, X86::MULX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23083 : { 4953 /* mulx */, X86::MULX64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23084 : { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, 0, { }, },
23085 : { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_ECX, MCK_EAX }, },
23086 : { 4970 /* mwait */, X86::MWAITrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RCX, MCK_RAX }, },
23087 : { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, 0, { }, },
23088 : { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_Not64BitMode, { MCK_EBX, MCK_ECX, MCK_EAX }, },
23089 : { 4976 /* mwaitx */, X86::MWAITXrrr, Convert_NoOperands, Feature_In64BitMode, { MCK_RBX, MCK_RCX, MCK_RAX }, },
23090 : { 4983 /* neg */, X86::NEG16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23091 : { 4983 /* neg */, X86::NEG32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23092 : { 4983 /* neg */, X86::NEG64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23093 : { 4983 /* neg */, X86::NEG8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23094 : { 4983 /* neg */, X86::NEG16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23095 : { 4983 /* neg */, X86::NEG32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23096 : { 4983 /* neg */, X86::NEG64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23097 : { 4983 /* neg */, X86::NEG8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23098 : { 5007 /* nop */, X86::NOOP, Convert_NoOperands, 0, { }, },
23099 : { 5007 /* nop */, X86::NOOPWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
23100 : { 5007 /* nop */, X86::NOOPLr, Convert__Reg1_0, 0, { MCK_GR32 }, },
23101 : { 5007 /* nop */, X86::NOOPQr, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23102 : { 5007 /* nop */, X86::NOOPW, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23103 : { 5007 /* nop */, X86::NOOPL, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23104 : { 5007 /* nop */, X86::NOOPQ, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23105 : { 5026 /* not */, X86::NOT16r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23106 : { 5026 /* not */, X86::NOT32r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23107 : { 5026 /* not */, X86::NOT64r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23108 : { 5026 /* not */, X86::NOT8r, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23109 : { 5026 /* not */, X86::NOT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23110 : { 5026 /* not */, X86::NOT32m, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23111 : { 5026 /* not */, X86::NOT64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23112 : { 5026 /* not */, X86::NOT8m, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23113 : { 5050 /* or */, X86::OR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23114 : { 5050 /* or */, X86::OR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
23115 : { 5050 /* or */, X86::OR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23116 : { 5050 /* or */, X86::OR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
23117 : { 5050 /* or */, X86::OR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23118 : { 5050 /* or */, X86::OR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
23119 : { 5050 /* or */, X86::OR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23120 : { 5050 /* or */, X86::OR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23121 : { 5050 /* or */, X86::OR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
23122 : { 5050 /* or */, X86::OR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23123 : { 5050 /* or */, X86::OR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23124 : { 5050 /* or */, X86::OR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23125 : { 5050 /* or */, X86::OR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
23126 : { 5050 /* or */, X86::OR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23127 : { 5050 /* or */, X86::OR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23128 : { 5050 /* or */, X86::OR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23129 : { 5050 /* or */, X86::OR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
23130 : { 5050 /* or */, X86::OR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
23131 : { 5050 /* or */, X86::OR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23132 : { 5050 /* or */, X86::OR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23133 : { 5050 /* or */, X86::OR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23134 : { 5050 /* or */, X86::OR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
23135 : { 5050 /* or */, X86::OR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23136 : { 5050 /* or */, X86::OR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23137 : { 5050 /* or */, X86::OR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23138 : { 5050 /* or */, X86::OR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23139 : { 5050 /* or */, X86::OR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23140 : { 5050 /* or */, X86::OR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23141 : { 5050 /* or */, X86::OR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23142 : { 5050 /* or */, X86::OR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23143 : { 5050 /* or */, X86::OR64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23144 : { 5050 /* or */, X86::OR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23145 : { 5050 /* or */, X86::OR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23146 : { 5061 /* orpd */, X86::ORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23147 : { 5061 /* orpd */, X86::ORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23148 : { 5066 /* orps */, X86::ORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23149 : { 5066 /* orps */, X86::ORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23150 : { 5079 /* out */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX, MCK_AL }, },
23151 : { 5079 /* out */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX, MCK_AX }, },
23152 : { 5079 /* out */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX, MCK_EAX }, },
23153 : { 5079 /* out */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AL }, },
23154 : { 5079 /* out */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_AX }, },
23155 : { 5079 /* out */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8, MCK_EAX }, },
23156 : { 5083 /* outb */, X86::OUT8rr, Convert_NoOperands, 0, { MCK_DX }, },
23157 : { 5083 /* outb */, X86::OUT8ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
23158 : { 5088 /* outl */, X86::OUT32rr, Convert_NoOperands, 0, { MCK_DX }, },
23159 : { 5088 /* outl */, X86::OUT32ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
23160 : { 5093 /* outs */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
23161 : { 5093 /* outs */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
23162 : { 5093 /* outs */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
23163 : { 5098 /* outsb */, X86::OUTSB, Convert__SrcIdx82_1, 0, { MCK_DX, MCK_SrcIdx8 }, },
23164 : { 5104 /* outsd */, X86::OUTSL, Convert__SrcIdx322_1, 0, { MCK_DX, MCK_SrcIdx32 }, },
23165 : { 5116 /* outsw */, X86::OUTSW, Convert__SrcIdx162_1, 0, { MCK_DX, MCK_SrcIdx16 }, },
23166 : { 5122 /* outw */, X86::OUT16rr, Convert_NoOperands, 0, { MCK_DX }, },
23167 : { 5122 /* outw */, X86::OUT16ir, Convert__ImmUnsignedi81_0, 0, { MCK_ImmUnsignedi8 }, },
23168 : { 5127 /* pabsb */, X86::MMX_PABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23169 : { 5127 /* pabsb */, X86::MMX_PABSBrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23170 : { 5127 /* pabsb */, X86::PABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23171 : { 5127 /* pabsb */, X86::PABSBrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23172 : { 5133 /* pabsd */, X86::MMX_PABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23173 : { 5133 /* pabsd */, X86::MMX_PABSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23174 : { 5133 /* pabsd */, X86::PABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23175 : { 5133 /* pabsd */, X86::PABSDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23176 : { 5139 /* pabsw */, X86::MMX_PABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23177 : { 5139 /* pabsw */, X86::MMX_PABSWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23178 : { 5139 /* pabsw */, X86::PABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23179 : { 5139 /* pabsw */, X86::PABSWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23180 : { 5145 /* packssdw */, X86::MMX_PACKSSDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23181 : { 5145 /* packssdw */, X86::MMX_PACKSSDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23182 : { 5145 /* packssdw */, X86::PACKSSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23183 : { 5145 /* packssdw */, X86::PACKSSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23184 : { 5154 /* packsswb */, X86::MMX_PACKSSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23185 : { 5154 /* packsswb */, X86::MMX_PACKSSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23186 : { 5154 /* packsswb */, X86::PACKSSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23187 : { 5154 /* packsswb */, X86::PACKSSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23188 : { 5163 /* packusdw */, X86::PACKUSDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23189 : { 5163 /* packusdw */, X86::PACKUSDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23190 : { 5172 /* packuswb */, X86::MMX_PACKUSWBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23191 : { 5172 /* packuswb */, X86::MMX_PACKUSWBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23192 : { 5172 /* packuswb */, X86::PACKUSWBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23193 : { 5172 /* packuswb */, X86::PACKUSWBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23194 : { 5181 /* paddb */, X86::MMX_PADDBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23195 : { 5181 /* paddb */, X86::MMX_PADDBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23196 : { 5181 /* paddb */, X86::PADDBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23197 : { 5181 /* paddb */, X86::PADDBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23198 : { 5187 /* paddd */, X86::MMX_PADDDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23199 : { 5187 /* paddd */, X86::MMX_PADDDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23200 : { 5187 /* paddd */, X86::PADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23201 : { 5187 /* paddd */, X86::PADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23202 : { 5193 /* paddq */, X86::MMX_PADDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23203 : { 5193 /* paddq */, X86::MMX_PADDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23204 : { 5193 /* paddq */, X86::PADDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23205 : { 5193 /* paddq */, X86::PADDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23206 : { 5199 /* paddsb */, X86::MMX_PADDSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23207 : { 5199 /* paddsb */, X86::MMX_PADDSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23208 : { 5199 /* paddsb */, X86::PADDSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23209 : { 5199 /* paddsb */, X86::PADDSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23210 : { 5206 /* paddsw */, X86::MMX_PADDSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23211 : { 5206 /* paddsw */, X86::MMX_PADDSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23212 : { 5206 /* paddsw */, X86::PADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23213 : { 5206 /* paddsw */, X86::PADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23214 : { 5213 /* paddusb */, X86::MMX_PADDUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23215 : { 5213 /* paddusb */, X86::MMX_PADDUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23216 : { 5213 /* paddusb */, X86::PADDUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23217 : { 5213 /* paddusb */, X86::PADDUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23218 : { 5221 /* paddusw */, X86::MMX_PADDUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23219 : { 5221 /* paddusw */, X86::MMX_PADDUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23220 : { 5221 /* paddusw */, X86::PADDUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23221 : { 5221 /* paddusw */, X86::PADDUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23222 : { 5229 /* paddw */, X86::MMX_PADDWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23223 : { 5229 /* paddw */, X86::MMX_PADDWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23224 : { 5229 /* paddw */, X86::PADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23225 : { 5229 /* paddw */, X86::PADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23226 : { 5235 /* palignr */, X86::MMX_PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23227 : { 5235 /* palignr */, X86::MMX_PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23228 : { 5235 /* palignr */, X86::PALIGNRrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23229 : { 5235 /* palignr */, X86::PALIGNRrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23230 : { 5243 /* pand */, X86::MMX_PANDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23231 : { 5243 /* pand */, X86::MMX_PANDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23232 : { 5243 /* pand */, X86::PANDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23233 : { 5243 /* pand */, X86::PANDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23234 : { 5248 /* pandn */, X86::MMX_PANDNirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23235 : { 5248 /* pandn */, X86::MMX_PANDNirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23236 : { 5248 /* pandn */, X86::PANDNrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23237 : { 5248 /* pandn */, X86::PANDNrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23238 : { 5254 /* pause */, X86::PAUSE, Convert_NoOperands, 0, { }, },
23239 : { 5260 /* pavgb */, X86::MMX_PAVGBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23240 : { 5260 /* pavgb */, X86::MMX_PAVGBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23241 : { 5260 /* pavgb */, X86::PAVGBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23242 : { 5260 /* pavgb */, X86::PAVGBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23243 : { 5266 /* pavgusb */, X86::PAVGUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23244 : { 5266 /* pavgusb */, X86::PAVGUSBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23245 : { 5274 /* pavgw */, X86::MMX_PAVGWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23246 : { 5274 /* pavgw */, X86::MMX_PAVGWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23247 : { 5274 /* pavgw */, X86::PAVGWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23248 : { 5274 /* pavgw */, X86::PAVGWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23249 : { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23250 : { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23251 : { 5280 /* pblendvb */, X86::PBLENDVBrr0, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
23252 : { 5280 /* pblendvb */, X86::PBLENDVBrm0, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
23253 : { 5289 /* pblendw */, X86::PBLENDWrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23254 : { 5289 /* pblendw */, X86::PBLENDWrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23255 : { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_17, 0, { MCK_FR32, MCK_FR32 }, },
23256 : { 5297 /* pclmulhqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_17, 0, { MCK_FR32, MCK_Mem128 }, },
23257 : { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_1, 0, { MCK_FR32, MCK_FR32 }, },
23258 : { 5310 /* pclmulhqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_1, 0, { MCK_FR32, MCK_Mem128 }, },
23259 : { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_16, 0, { MCK_FR32, MCK_FR32 }, },
23260 : { 5323 /* pclmullqhqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_16, 0, { MCK_FR32, MCK_Mem128 }, },
23261 : { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__imm_95_0, 0, { MCK_FR32, MCK_FR32 }, },
23262 : { 5336 /* pclmullqlqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__imm_95_0, 0, { MCK_FR32, MCK_Mem128 }, },
23263 : { 5349 /* pclmulqdq */, X86::PCLMULQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23264 : { 5349 /* pclmulqdq */, X86::PCLMULQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23265 : { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23266 : { 5359 /* pcmpeqb */, X86::MMX_PCMPEQBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23267 : { 5359 /* pcmpeqb */, X86::PCMPEQBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23268 : { 5359 /* pcmpeqb */, X86::PCMPEQBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23269 : { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23270 : { 5367 /* pcmpeqd */, X86::MMX_PCMPEQDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23271 : { 5367 /* pcmpeqd */, X86::PCMPEQDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23272 : { 5367 /* pcmpeqd */, X86::PCMPEQDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23273 : { 5375 /* pcmpeqq */, X86::PCMPEQQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23274 : { 5375 /* pcmpeqq */, X86::PCMPEQQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23275 : { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23276 : { 5383 /* pcmpeqw */, X86::MMX_PCMPEQWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23277 : { 5383 /* pcmpeqw */, X86::PCMPEQWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23278 : { 5383 /* pcmpeqw */, X86::PCMPEQWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23279 : { 5391 /* pcmpestri */, X86::PCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23280 : { 5391 /* pcmpestri */, X86::PCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23281 : { 5401 /* pcmpestrm */, X86::PCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23282 : { 5401 /* pcmpestrm */, X86::PCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23283 : { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23284 : { 5411 /* pcmpgtb */, X86::MMX_PCMPGTBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23285 : { 5411 /* pcmpgtb */, X86::PCMPGTBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23286 : { 5411 /* pcmpgtb */, X86::PCMPGTBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23287 : { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23288 : { 5419 /* pcmpgtd */, X86::MMX_PCMPGTDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23289 : { 5419 /* pcmpgtd */, X86::PCMPGTDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23290 : { 5419 /* pcmpgtd */, X86::PCMPGTDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23291 : { 5427 /* pcmpgtq */, X86::PCMPGTQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23292 : { 5427 /* pcmpgtq */, X86::PCMPGTQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23293 : { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23294 : { 5435 /* pcmpgtw */, X86::MMX_PCMPGTWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23295 : { 5435 /* pcmpgtw */, X86::PCMPGTWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23296 : { 5435 /* pcmpgtw */, X86::PCMPGTWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23297 : { 5443 /* pcmpistri */, X86::PCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23298 : { 5443 /* pcmpistri */, X86::PCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23299 : { 5453 /* pcmpistrm */, X86::PCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23300 : { 5453 /* pcmpistrm */, X86::PCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23301 : { 5463 /* pconfig */, X86::PCONFIG, Convert_NoOperands, 0, { }, },
23302 : { 5471 /* pdep */, X86::PDEP32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23303 : { 5471 /* pdep */, X86::PDEP32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23304 : { 5471 /* pdep */, X86::PDEP64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23305 : { 5471 /* pdep */, X86::PDEP64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23306 : { 5488 /* pext */, X86::PEXT32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23307 : { 5488 /* pext */, X86::PEXT32rm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_GR32, MCK_GR32, MCK_Mem32 }, },
23308 : { 5488 /* pext */, X86::PEXT64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23309 : { 5488 /* pext */, X86::PEXT64rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_GR64, MCK_GR64, MCK_Mem64 }, },
23310 : { 5505 /* pextrb */, X86::PEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23311 : { 5505 /* pextrb */, X86::PEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
23312 : { 5512 /* pextrd */, X86::PEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23313 : { 5512 /* pextrd */, X86::PEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23314 : { 5519 /* pextrq */, X86::PEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23315 : { 5519 /* pextrq */, X86::PEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23316 : { 5526 /* pextrw */, X86::MMX_PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23317 : { 5526 /* pextrw */, X86::PEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
23318 : { 5526 /* pextrw */, X86::PEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
23319 : { 5533 /* pf2id */, X86::PF2IDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23320 : { 5533 /* pf2id */, X86::PF2IDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23321 : { 5539 /* pf2iw */, X86::PF2IWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23322 : { 5539 /* pf2iw */, X86::PF2IWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23323 : { 5545 /* pfacc */, X86::PFACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23324 : { 5545 /* pfacc */, X86::PFACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23325 : { 5551 /* pfadd */, X86::PFADDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23326 : { 5551 /* pfadd */, X86::PFADDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23327 : { 5557 /* pfcmpeq */, X86::PFCMPEQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23328 : { 5557 /* pfcmpeq */, X86::PFCMPEQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23329 : { 5565 /* pfcmpge */, X86::PFCMPGErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23330 : { 5565 /* pfcmpge */, X86::PFCMPGErm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23331 : { 5573 /* pfcmpgt */, X86::PFCMPGTrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23332 : { 5573 /* pfcmpgt */, X86::PFCMPGTrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23333 : { 5581 /* pfmax */, X86::PFMAXrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23334 : { 5581 /* pfmax */, X86::PFMAXrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23335 : { 5587 /* pfmin */, X86::PFMINrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23336 : { 5587 /* pfmin */, X86::PFMINrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23337 : { 5593 /* pfmul */, X86::PFMULrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23338 : { 5593 /* pfmul */, X86::PFMULrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23339 : { 5599 /* pfnacc */, X86::PFNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23340 : { 5599 /* pfnacc */, X86::PFNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23341 : { 5606 /* pfpnacc */, X86::PFPNACCrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23342 : { 5606 /* pfpnacc */, X86::PFPNACCrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23343 : { 5614 /* pfrcp */, X86::PFRCPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23344 : { 5614 /* pfrcp */, X86::PFRCPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23345 : { 5620 /* pfrcpit1 */, X86::PFRCPIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23346 : { 5620 /* pfrcpit1 */, X86::PFRCPIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23347 : { 5629 /* pfrcpit2 */, X86::PFRCPIT2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23348 : { 5629 /* pfrcpit2 */, X86::PFRCPIT2rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23349 : { 5638 /* pfrsqit1 */, X86::PFRSQIT1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23350 : { 5638 /* pfrsqit1 */, X86::PFRSQIT1rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23351 : { 5647 /* pfrsqrt */, X86::PFRSQRTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23352 : { 5647 /* pfrsqrt */, X86::PFRSQRTrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23353 : { 5655 /* pfsub */, X86::PFSUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23354 : { 5655 /* pfsub */, X86::PFSUBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23355 : { 5661 /* pfsubr */, X86::PFSUBRrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23356 : { 5661 /* pfsubr */, X86::PFSUBRrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23357 : { 5668 /* phaddd */, X86::MMX_PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23358 : { 5668 /* phaddd */, X86::MMX_PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23359 : { 5668 /* phaddd */, X86::PHADDDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23360 : { 5668 /* phaddd */, X86::PHADDDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23361 : { 5675 /* phaddsw */, X86::MMX_PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23362 : { 5675 /* phaddsw */, X86::MMX_PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23363 : { 5675 /* phaddsw */, X86::PHADDSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23364 : { 5675 /* phaddsw */, X86::PHADDSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23365 : { 5683 /* phaddw */, X86::MMX_PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23366 : { 5683 /* phaddw */, X86::MMX_PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23367 : { 5683 /* phaddw */, X86::PHADDWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23368 : { 5683 /* phaddw */, X86::PHADDWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23369 : { 5690 /* phminposuw */, X86::PHMINPOSUWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23370 : { 5690 /* phminposuw */, X86::PHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23371 : { 5701 /* phsubd */, X86::MMX_PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23372 : { 5701 /* phsubd */, X86::MMX_PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23373 : { 5701 /* phsubd */, X86::PHSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23374 : { 5701 /* phsubd */, X86::PHSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23375 : { 5708 /* phsubsw */, X86::MMX_PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23376 : { 5708 /* phsubsw */, X86::MMX_PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23377 : { 5708 /* phsubsw */, X86::PHSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23378 : { 5708 /* phsubsw */, X86::PHSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23379 : { 5716 /* phsubw */, X86::MMX_PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23380 : { 5716 /* phsubw */, X86::MMX_PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23381 : { 5716 /* phsubw */, X86::PHSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23382 : { 5716 /* phsubw */, X86::PHSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23383 : { 5723 /* pi2fd */, X86::PI2FDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23384 : { 5723 /* pi2fd */, X86::PI2FDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23385 : { 5729 /* pi2fw */, X86::PI2FWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23386 : { 5729 /* pi2fw */, X86::PI2FWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23387 : { 5735 /* pinsrb */, X86::PINSRBrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23388 : { 5735 /* pinsrb */, X86::PINSRBrm, Convert__Reg1_0__Tie0_1_1__Mem85_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
23389 : { 5742 /* pinsrd */, X86::PINSRDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23390 : { 5742 /* pinsrd */, X86::PINSRDrm, Convert__Reg1_0__Tie0_1_1__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23391 : { 5749 /* pinsrq */, X86::PINSRQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
23392 : { 5749 /* pinsrq */, X86::PINSRQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23393 : { 5756 /* pinsrw */, X86::MMX_PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23394 : { 5756 /* pinsrw */, X86::MMX_PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem16, MCK_ImmUnsignedi8 }, },
23395 : { 5756 /* pinsrw */, X86::PINSRWrr, Convert__Reg1_0__Tie0_1_1__GR32orGR641_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
23396 : { 5756 /* pinsrw */, X86::PINSRWrm, Convert__Reg1_0__Tie0_1_1__Mem165_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
23397 : { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23398 : { 5763 /* pmaddubsw */, X86::MMX_PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23399 : { 5763 /* pmaddubsw */, X86::PMADDUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23400 : { 5763 /* pmaddubsw */, X86::PMADDUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23401 : { 5773 /* pmaddwd */, X86::MMX_PMADDWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23402 : { 5773 /* pmaddwd */, X86::MMX_PMADDWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23403 : { 5773 /* pmaddwd */, X86::PMADDWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23404 : { 5773 /* pmaddwd */, X86::PMADDWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23405 : { 5781 /* pmaxsb */, X86::PMAXSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23406 : { 5781 /* pmaxsb */, X86::PMAXSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23407 : { 5788 /* pmaxsd */, X86::PMAXSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23408 : { 5788 /* pmaxsd */, X86::PMAXSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23409 : { 5795 /* pmaxsw */, X86::MMX_PMAXSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23410 : { 5795 /* pmaxsw */, X86::MMX_PMAXSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23411 : { 5795 /* pmaxsw */, X86::PMAXSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23412 : { 5795 /* pmaxsw */, X86::PMAXSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23413 : { 5802 /* pmaxub */, X86::MMX_PMAXUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23414 : { 5802 /* pmaxub */, X86::MMX_PMAXUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23415 : { 5802 /* pmaxub */, X86::PMAXUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23416 : { 5802 /* pmaxub */, X86::PMAXUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23417 : { 5809 /* pmaxud */, X86::PMAXUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23418 : { 5809 /* pmaxud */, X86::PMAXUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23419 : { 5816 /* pmaxuw */, X86::PMAXUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23420 : { 5816 /* pmaxuw */, X86::PMAXUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23421 : { 5823 /* pminsb */, X86::PMINSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23422 : { 5823 /* pminsb */, X86::PMINSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23423 : { 5830 /* pminsd */, X86::PMINSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23424 : { 5830 /* pminsd */, X86::PMINSDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23425 : { 5837 /* pminsw */, X86::MMX_PMINSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23426 : { 5837 /* pminsw */, X86::MMX_PMINSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23427 : { 5837 /* pminsw */, X86::PMINSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23428 : { 5837 /* pminsw */, X86::PMINSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23429 : { 5844 /* pminub */, X86::MMX_PMINUBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23430 : { 5844 /* pminub */, X86::MMX_PMINUBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23431 : { 5844 /* pminub */, X86::PMINUBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23432 : { 5844 /* pminub */, X86::PMINUBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23433 : { 5851 /* pminud */, X86::PMINUDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23434 : { 5851 /* pminud */, X86::PMINUDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23435 : { 5858 /* pminuw */, X86::PMINUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23436 : { 5858 /* pminuw */, X86::PMINUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23437 : { 5865 /* pmovmskb */, X86::MMX_PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR64 }, },
23438 : { 5865 /* pmovmskb */, X86::PMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
23439 : { 5874 /* pmovsxbd */, X86::PMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23440 : { 5874 /* pmovsxbd */, X86::PMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23441 : { 5883 /* pmovsxbq */, X86::PMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23442 : { 5883 /* pmovsxbq */, X86::PMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
23443 : { 5892 /* pmovsxbw */, X86::PMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23444 : { 5892 /* pmovsxbw */, X86::PMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23445 : { 5901 /* pmovsxdq */, X86::PMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23446 : { 5901 /* pmovsxdq */, X86::PMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23447 : { 5910 /* pmovsxwd */, X86::PMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23448 : { 5910 /* pmovsxwd */, X86::PMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23449 : { 5919 /* pmovsxwq */, X86::PMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23450 : { 5919 /* pmovsxwq */, X86::PMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23451 : { 5928 /* pmovzxbd */, X86::PMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23452 : { 5928 /* pmovzxbd */, X86::PMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23453 : { 5937 /* pmovzxbq */, X86::PMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23454 : { 5937 /* pmovzxbq */, X86::PMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
23455 : { 5946 /* pmovzxbw */, X86::PMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23456 : { 5946 /* pmovzxbw */, X86::PMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23457 : { 5955 /* pmovzxdq */, X86::PMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23458 : { 5955 /* pmovzxdq */, X86::PMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23459 : { 5964 /* pmovzxwd */, X86::PMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23460 : { 5964 /* pmovzxwd */, X86::PMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
23461 : { 5973 /* pmovzxwq */, X86::PMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23462 : { 5973 /* pmovzxwq */, X86::PMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23463 : { 5982 /* pmuldq */, X86::PMULDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23464 : { 5982 /* pmuldq */, X86::PMULDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23465 : { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23466 : { 5989 /* pmulhrsw */, X86::MMX_PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23467 : { 5989 /* pmulhrsw */, X86::PMULHRSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23468 : { 5989 /* pmulhrsw */, X86::PMULHRSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23469 : { 5998 /* pmulhrw */, X86::PMULHRWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23470 : { 5998 /* pmulhrw */, X86::PMULHRWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23471 : { 6006 /* pmulhuw */, X86::MMX_PMULHUWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23472 : { 6006 /* pmulhuw */, X86::MMX_PMULHUWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23473 : { 6006 /* pmulhuw */, X86::PMULHUWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23474 : { 6006 /* pmulhuw */, X86::PMULHUWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23475 : { 6014 /* pmulhw */, X86::MMX_PMULHWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23476 : { 6014 /* pmulhw */, X86::MMX_PMULHWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23477 : { 6014 /* pmulhw */, X86::PMULHWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23478 : { 6014 /* pmulhw */, X86::PMULHWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23479 : { 6021 /* pmulld */, X86::PMULLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23480 : { 6021 /* pmulld */, X86::PMULLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23481 : { 6028 /* pmullw */, X86::MMX_PMULLWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23482 : { 6028 /* pmullw */, X86::MMX_PMULLWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23483 : { 6028 /* pmullw */, X86::PMULLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23484 : { 6028 /* pmullw */, X86::PMULLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23485 : { 6035 /* pmuludq */, X86::MMX_PMULUDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23486 : { 6035 /* pmuludq */, X86::MMX_PMULUDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23487 : { 6035 /* pmuludq */, X86::PMULUDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23488 : { 6035 /* pmuludq */, X86::PMULUDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23489 : { 6043 /* pop */, X86::POPDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23490 : { 6043 /* pop */, X86::POPDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23491 : { 6043 /* pop */, X86::POPES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23492 : { 6043 /* pop */, X86::POPES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23493 : { 6043 /* pop */, X86::POPFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
23494 : { 6043 /* pop */, X86::POPFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
23495 : { 6043 /* pop */, X86::POPFS16, Convert_NoOperands, 0, { MCK_FS }, },
23496 : { 6043 /* pop */, X86::POPGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
23497 : { 6043 /* pop */, X86::POPGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
23498 : { 6043 /* pop */, X86::POPGS16, Convert_NoOperands, 0, { MCK_GS }, },
23499 : { 6043 /* pop */, X86::POPSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23500 : { 6043 /* pop */, X86::POPSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23501 : { 6043 /* pop */, X86::POP16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23502 : { 6043 /* pop */, X86::POP32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23503 : { 6043 /* pop */, X86::POP64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23504 : { 6043 /* pop */, X86::POP16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23505 : { 6043 /* pop */, X86::POP32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
23506 : { 6043 /* pop */, X86::POP64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23507 : { 6047 /* popal */, X86::POPA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23508 : { 6053 /* popaw */, X86::POPA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
23509 : { 6059 /* popcnt */, X86::POPCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23510 : { 6059 /* popcnt */, X86::POPCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23511 : { 6059 /* popcnt */, X86::POPCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23512 : { 6059 /* popcnt */, X86::POPCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23513 : { 6059 /* popcnt */, X86::POPCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23514 : { 6059 /* popcnt */, X86::POPCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23515 : { 6090 /* popf */, X86::POPF16, Convert_NoOperands, 0, { }, },
23516 : { 6095 /* popfd */, X86::POPF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23517 : { 6107 /* popfq */, X86::POPF64, Convert_NoOperands, Feature_In64BitMode, { }, },
23518 : { 6134 /* por */, X86::MMX_PORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23519 : { 6134 /* por */, X86::MMX_PORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23520 : { 6134 /* por */, X86::PORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23521 : { 6134 /* por */, X86::PORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23522 : { 6138 /* prefetch */, X86::PREFETCH, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23523 : { 6147 /* prefetchnta */, X86::PREFETCHNTA, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23524 : { 6159 /* prefetcht0 */, X86::PREFETCHT0, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23525 : { 6170 /* prefetcht1 */, X86::PREFETCHT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23526 : { 6181 /* prefetcht2 */, X86::PREFETCHT2, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23527 : { 6192 /* prefetchw */, X86::PREFETCHW, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23528 : { 6202 /* prefetchwt1 */, X86::PREFETCHWT1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23529 : { 6214 /* psadbw */, X86::MMX_PSADBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23530 : { 6214 /* psadbw */, X86::MMX_PSADBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23531 : { 6214 /* psadbw */, X86::PSADBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23532 : { 6214 /* psadbw */, X86::PSADBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23533 : { 6221 /* pshufb */, X86::MMX_PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23534 : { 6221 /* pshufb */, X86::MMX_PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23535 : { 6221 /* pshufb */, X86::PSHUFBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23536 : { 6221 /* pshufb */, X86::PSHUFBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23537 : { 6228 /* pshufd */, X86::PSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23538 : { 6228 /* pshufd */, X86::PSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23539 : { 6235 /* pshufhw */, X86::PSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23540 : { 6235 /* pshufhw */, X86::PSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23541 : { 6243 /* pshuflw */, X86::PSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23542 : { 6243 /* pshuflw */, X86::PSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23543 : { 6251 /* pshufw */, X86::MMX_PSHUFWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_VR64, MCK_ImmUnsignedi8 }, },
23544 : { 6251 /* pshufw */, X86::MMX_PSHUFWmi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23545 : { 6258 /* psignb */, X86::MMX_PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23546 : { 6258 /* psignb */, X86::MMX_PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23547 : { 6258 /* psignb */, X86::PSIGNBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23548 : { 6258 /* psignb */, X86::PSIGNBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23549 : { 6265 /* psignd */, X86::MMX_PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23550 : { 6265 /* psignd */, X86::MMX_PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23551 : { 6265 /* psignd */, X86::PSIGNDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23552 : { 6265 /* psignd */, X86::PSIGNDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23553 : { 6272 /* psignw */, X86::MMX_PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23554 : { 6272 /* psignw */, X86::MMX_PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23555 : { 6272 /* psignw */, X86::PSIGNWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23556 : { 6272 /* psignw */, X86::PSIGNWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23557 : { 6279 /* pslld */, X86::MMX_PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23558 : { 6279 /* pslld */, X86::MMX_PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23559 : { 6279 /* pslld */, X86::MMX_PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23560 : { 6279 /* pslld */, X86::PSLLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23561 : { 6279 /* pslld */, X86::PSLLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23562 : { 6279 /* pslld */, X86::PSLLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23563 : { 6285 /* pslldq */, X86::PSLLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23564 : { 6292 /* psllq */, X86::MMX_PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23565 : { 6292 /* psllq */, X86::MMX_PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23566 : { 6292 /* psllq */, X86::MMX_PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23567 : { 6292 /* psllq */, X86::PSLLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23568 : { 6292 /* psllq */, X86::PSLLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23569 : { 6292 /* psllq */, X86::PSLLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23570 : { 6298 /* psllw */, X86::MMX_PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23571 : { 6298 /* psllw */, X86::MMX_PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23572 : { 6298 /* psllw */, X86::MMX_PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23573 : { 6298 /* psllw */, X86::PSLLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23574 : { 6298 /* psllw */, X86::PSLLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23575 : { 6298 /* psllw */, X86::PSLLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23576 : { 6304 /* psrad */, X86::MMX_PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23577 : { 6304 /* psrad */, X86::MMX_PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23578 : { 6304 /* psrad */, X86::MMX_PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23579 : { 6304 /* psrad */, X86::PSRADrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23580 : { 6304 /* psrad */, X86::PSRADri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23581 : { 6304 /* psrad */, X86::PSRADrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23582 : { 6310 /* psraw */, X86::MMX_PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23583 : { 6310 /* psraw */, X86::MMX_PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23584 : { 6310 /* psraw */, X86::MMX_PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23585 : { 6310 /* psraw */, X86::PSRAWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23586 : { 6310 /* psraw */, X86::PSRAWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23587 : { 6310 /* psraw */, X86::PSRAWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23588 : { 6316 /* psrld */, X86::MMX_PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23589 : { 6316 /* psrld */, X86::MMX_PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23590 : { 6316 /* psrld */, X86::MMX_PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23591 : { 6316 /* psrld */, X86::PSRLDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23592 : { 6316 /* psrld */, X86::PSRLDri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23593 : { 6316 /* psrld */, X86::PSRLDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23594 : { 6322 /* psrldq */, X86::PSRLDQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23595 : { 6329 /* psrlq */, X86::MMX_PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23596 : { 6329 /* psrlq */, X86::MMX_PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23597 : { 6329 /* psrlq */, X86::MMX_PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23598 : { 6329 /* psrlq */, X86::PSRLQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23599 : { 6329 /* psrlq */, X86::PSRLQri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23600 : { 6329 /* psrlq */, X86::PSRLQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23601 : { 6335 /* psrlw */, X86::MMX_PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23602 : { 6335 /* psrlw */, X86::MMX_PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_VR64, MCK_ImmUnsignedi8 }, },
23603 : { 6335 /* psrlw */, X86::MMX_PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23604 : { 6335 /* psrlw */, X86::PSRLWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23605 : { 6335 /* psrlw */, X86::PSRLWri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_FR32, MCK_ImmUnsignedi8 }, },
23606 : { 6335 /* psrlw */, X86::PSRLWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23607 : { 6341 /* psubb */, X86::MMX_PSUBBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23608 : { 6341 /* psubb */, X86::MMX_PSUBBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23609 : { 6341 /* psubb */, X86::PSUBBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23610 : { 6341 /* psubb */, X86::PSUBBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23611 : { 6347 /* psubd */, X86::MMX_PSUBDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23612 : { 6347 /* psubd */, X86::MMX_PSUBDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23613 : { 6347 /* psubd */, X86::PSUBDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23614 : { 6347 /* psubd */, X86::PSUBDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23615 : { 6353 /* psubq */, X86::MMX_PSUBQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23616 : { 6353 /* psubq */, X86::MMX_PSUBQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23617 : { 6353 /* psubq */, X86::PSUBQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23618 : { 6353 /* psubq */, X86::PSUBQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23619 : { 6359 /* psubsb */, X86::MMX_PSUBSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23620 : { 6359 /* psubsb */, X86::MMX_PSUBSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23621 : { 6359 /* psubsb */, X86::PSUBSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23622 : { 6359 /* psubsb */, X86::PSUBSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23623 : { 6366 /* psubsw */, X86::MMX_PSUBSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23624 : { 6366 /* psubsw */, X86::MMX_PSUBSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23625 : { 6366 /* psubsw */, X86::PSUBSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23626 : { 6366 /* psubsw */, X86::PSUBSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23627 : { 6373 /* psubusb */, X86::MMX_PSUBUSBirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23628 : { 6373 /* psubusb */, X86::MMX_PSUBUSBirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23629 : { 6373 /* psubusb */, X86::PSUBUSBrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23630 : { 6373 /* psubusb */, X86::PSUBUSBrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23631 : { 6381 /* psubusw */, X86::MMX_PSUBUSWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23632 : { 6381 /* psubusw */, X86::MMX_PSUBUSWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23633 : { 6381 /* psubusw */, X86::PSUBUSWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23634 : { 6381 /* psubusw */, X86::PSUBUSWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23635 : { 6389 /* psubw */, X86::MMX_PSUBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23636 : { 6389 /* psubw */, X86::MMX_PSUBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23637 : { 6389 /* psubw */, X86::PSUBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23638 : { 6389 /* psubw */, X86::PSUBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23639 : { 6395 /* pswapd */, X86::PSWAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23640 : { 6395 /* pswapd */, X86::PSWAPDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23641 : { 6402 /* ptest */, X86::PTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23642 : { 6402 /* ptest */, X86::PTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23643 : { 6408 /* ptwrite */, X86::PTWRITEr, Convert__Reg1_0, 0, { MCK_GR32 }, },
23644 : { 6408 /* ptwrite */, X86::PTWRITE64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23645 : { 6408 /* ptwrite */, X86::PTWRITEm, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23646 : { 6408 /* ptwrite */, X86::PTWRITE64m, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23647 : { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23648 : { 6434 /* punpckhbw */, X86::MMX_PUNPCKHBWirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23649 : { 6434 /* punpckhbw */, X86::PUNPCKHBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23650 : { 6434 /* punpckhbw */, X86::PUNPCKHBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23651 : { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23652 : { 6444 /* punpckhdq */, X86::MMX_PUNPCKHDQirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23653 : { 6444 /* punpckhdq */, X86::PUNPCKHDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23654 : { 6444 /* punpckhdq */, X86::PUNPCKHDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23655 : { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23656 : { 6454 /* punpckhqdq */, X86::PUNPCKHQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23657 : { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23658 : { 6465 /* punpckhwd */, X86::MMX_PUNPCKHWDirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23659 : { 6465 /* punpckhwd */, X86::PUNPCKHWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23660 : { 6465 /* punpckhwd */, X86::PUNPCKHWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23661 : { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23662 : { 6475 /* punpcklbw */, X86::MMX_PUNPCKLBWirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23663 : { 6475 /* punpcklbw */, X86::PUNPCKLBWrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23664 : { 6475 /* punpcklbw */, X86::PUNPCKLBWrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23665 : { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23666 : { 6485 /* punpckldq */, X86::MMX_PUNPCKLDQirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23667 : { 6485 /* punpckldq */, X86::PUNPCKLDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23668 : { 6485 /* punpckldq */, X86::PUNPCKLDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23669 : { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23670 : { 6495 /* punpcklqdq */, X86::PUNPCKLQDQrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23671 : { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23672 : { 6506 /* punpcklwd */, X86::MMX_PUNPCKLWDirm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_VR64, MCK_Mem32 }, },
23673 : { 6506 /* punpcklwd */, X86::PUNPCKLWDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23674 : { 6506 /* punpcklwd */, X86::PUNPCKLWDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23675 : { 6516 /* push */, X86::PUSHCS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
23676 : { 6516 /* push */, X86::PUSHCS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_CS }, },
23677 : { 6516 /* push */, X86::PUSHDS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23678 : { 6516 /* push */, X86::PUSHDS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_DS }, },
23679 : { 6516 /* push */, X86::PUSHES16, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23680 : { 6516 /* push */, X86::PUSHES32, Convert_NoOperands, Feature_Not64BitMode, { MCK_ES }, },
23681 : { 6516 /* push */, X86::PUSHFS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_FS }, },
23682 : { 6516 /* push */, X86::PUSHFS64, Convert_NoOperands, Feature_In64BitMode, { MCK_FS }, },
23683 : { 6516 /* push */, X86::PUSHFS16, Convert_NoOperands, 0, { MCK_FS }, },
23684 : { 6516 /* push */, X86::PUSHGS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_GS }, },
23685 : { 6516 /* push */, X86::PUSHGS64, Convert_NoOperands, Feature_In64BitMode, { MCK_GS }, },
23686 : { 6516 /* push */, X86::PUSHGS16, Convert_NoOperands, 0, { MCK_GS }, },
23687 : { 6516 /* push */, X86::PUSHSS16, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23688 : { 6516 /* push */, X86::PUSHSS32, Convert_NoOperands, Feature_Not64BitMode, { MCK_SS }, },
23689 : { 6516 /* push */, X86::PUSH16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23690 : { 6516 /* push */, X86::PUSH32r, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23691 : { 6516 /* push */, X86::PUSH64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23692 : { 6516 /* push */, X86::PUSH64i8, Convert__ImmSExti64i81_0, Feature_In64BitMode, { MCK_ImmSExti64i8 }, },
23693 : { 6516 /* push */, X86::PUSH16i8, Convert__ImmSExti16i81_0, 0, { MCK_ImmSExti16i8 }, },
23694 : { 6516 /* push */, X86::PUSH32i8, Convert__ImmSExti32i81_0, Feature_Not64BitMode, { MCK_ImmSExti32i8 }, },
23695 : { 6516 /* push */, X86::PUSH64i32, Convert__ImmSExti64i321_0, Feature_In64BitMode, { MCK_ImmSExti64i32 }, },
23696 : { 6516 /* push */, X86::PUSHi32, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
23697 : { 6516 /* push */, X86::PUSHi16, Convert__Imm1_0, 0, { MCK_Imm }, },
23698 : { 6516 /* push */, X86::PUSH16rmm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23699 : { 6516 /* push */, X86::PUSH32rmm, Convert__Mem325_0, Feature_Not64BitMode, { MCK_Mem32 }, },
23700 : { 6516 /* push */, X86::PUSH64rmm, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23701 : { 6521 /* pushal */, X86::PUSHA32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23702 : { 6528 /* pushaw */, X86::PUSHA16, Convert_NoOperands, Feature_Not64BitMode, { }, },
23703 : { 6535 /* pushf */, X86::PUSHF16, Convert_NoOperands, 0, { }, },
23704 : { 6541 /* pushfd */, X86::PUSHF32, Convert_NoOperands, Feature_Not64BitMode, { }, },
23705 : { 6555 /* pushfq */, X86::PUSHF64, Convert_NoOperands, Feature_In64BitMode, { }, },
23706 : { 6587 /* pxor */, X86::MMX_PXORirr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_VR64, MCK_VR64 }, },
23707 : { 6587 /* pxor */, X86::MMX_PXORirm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_VR64, MCK_Mem64 }, },
23708 : { 6587 /* pxor */, X86::PXORrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23709 : { 6587 /* pxor */, X86::PXORrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23710 : { 6592 /* rcl */, X86::RCL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23711 : { 6592 /* rcl */, X86::RCL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23712 : { 6592 /* rcl */, X86::RCL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23713 : { 6592 /* rcl */, X86::RCL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23714 : { 6592 /* rcl */, X86::RCL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23715 : { 6592 /* rcl */, X86::RCL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23716 : { 6592 /* rcl */, X86::RCL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23717 : { 6592 /* rcl */, X86::RCL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23718 : { 6592 /* rcl */, X86::RCL16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23719 : { 6592 /* rcl */, X86::RCL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23720 : { 6592 /* rcl */, X86::RCL32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23721 : { 6592 /* rcl */, X86::RCL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23722 : { 6592 /* rcl */, X86::RCL64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23723 : { 6592 /* rcl */, X86::RCL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23724 : { 6592 /* rcl */, X86::RCL8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23725 : { 6592 /* rcl */, X86::RCL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23726 : { 6592 /* rcl */, X86::RCL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23727 : { 6592 /* rcl */, X86::RCL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23728 : { 6592 /* rcl */, X86::RCL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23729 : { 6592 /* rcl */, X86::RCL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23730 : { 6592 /* rcl */, X86::RCL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23731 : { 6592 /* rcl */, X86::RCL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23732 : { 6592 /* rcl */, X86::RCL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23733 : { 6592 /* rcl */, X86::RCL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23734 : { 6616 /* rcpps */, X86::RCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23735 : { 6616 /* rcpps */, X86::RCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23736 : { 6622 /* rcpss */, X86::RCPSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23737 : { 6622 /* rcpss */, X86::RCPSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23738 : { 6628 /* rcr */, X86::RCR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23739 : { 6628 /* rcr */, X86::RCR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23740 : { 6628 /* rcr */, X86::RCR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23741 : { 6628 /* rcr */, X86::RCR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23742 : { 6628 /* rcr */, X86::RCR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23743 : { 6628 /* rcr */, X86::RCR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23744 : { 6628 /* rcr */, X86::RCR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23745 : { 6628 /* rcr */, X86::RCR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23746 : { 6628 /* rcr */, X86::RCR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23747 : { 6628 /* rcr */, X86::RCR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23748 : { 6628 /* rcr */, X86::RCR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23749 : { 6628 /* rcr */, X86::RCR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23750 : { 6628 /* rcr */, X86::RCR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23751 : { 6628 /* rcr */, X86::RCR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23752 : { 6628 /* rcr */, X86::RCR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23753 : { 6628 /* rcr */, X86::RCR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23754 : { 6628 /* rcr */, X86::RCR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23755 : { 6628 /* rcr */, X86::RCR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23756 : { 6628 /* rcr */, X86::RCR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23757 : { 6628 /* rcr */, X86::RCR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23758 : { 6628 /* rcr */, X86::RCR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23759 : { 6628 /* rcr */, X86::RCR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23760 : { 6628 /* rcr */, X86::RCR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23761 : { 6628 /* rcr */, X86::RCR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23762 : { 6652 /* rdfsbase */, X86::RDFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
23763 : { 6652 /* rdfsbase */, X86::RDFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23764 : { 6681 /* rdgsbase */, X86::RDGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
23765 : { 6681 /* rdgsbase */, X86::RDGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23766 : { 6710 /* rdmsr */, X86::RDMSR, Convert_NoOperands, 0, { }, },
23767 : { 6716 /* rdpid */, X86::RDPID32, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR32 }, },
23768 : { 6716 /* rdpid */, X86::RDPID64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
23769 : { 6722 /* rdpkru */, X86::RDPKRUr, Convert_NoOperands, 0, { }, },
23770 : { 6729 /* rdpmc */, X86::RDPMC, Convert_NoOperands, 0, { }, },
23771 : { 6735 /* rdrand */, X86::RDRAND16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23772 : { 6735 /* rdrand */, X86::RDRAND32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23773 : { 6735 /* rdrand */, X86::RDRAND64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23774 : { 6766 /* rdseed */, X86::RDSEED16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
23775 : { 6766 /* rdseed */, X86::RDSEED32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
23776 : { 6766 /* rdseed */, X86::RDSEED64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
23777 : { 6797 /* rdsspd */, X86::RDSSPD, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23778 : { 6804 /* rdsspq */, X86::RDSSPQ, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23779 : { 6811 /* rdtsc */, X86::RDTSC, Convert_NoOperands, 0, { }, },
23780 : { 6817 /* rdtscp */, X86::RDTSCP, Convert_NoOperands, 0, { }, },
23781 : { 6824 /* rep */, X86::REP_PREFIX, Convert_NoOperands, 0, { }, },
23782 : { 6828 /* repne */, X86::REPNE_PREFIX, Convert_NoOperands, 0, { }, },
23783 : { 6834 /* ret */, X86::RETL, Convert_NoOperands, Feature_Not64BitMode, { }, },
23784 : { 6834 /* ret */, X86::RETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
23785 : { 6834 /* ret */, X86::RETW, Convert_NoOperands, 0, { }, },
23786 : { 6834 /* ret */, X86::RETIL, Convert__Imm1_0, Feature_Not64BitMode, { MCK_Imm }, },
23787 : { 6834 /* ret */, X86::RETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
23788 : { 6834 /* ret */, X86::RETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
23789 : { 6838 /* retf */, X86::LRETL, Convert_NoOperands, 0, { }, },
23790 : { 6838 /* retf */, X86::LRETW, Convert_NoOperands, 0, { }, },
23791 : { 6838 /* retf */, X86::LRETIL, Convert__Imm1_0, 0, { MCK_Imm }, },
23792 : { 6838 /* retf */, X86::LRETIW, Convert__Imm1_0, 0, { MCK_Imm }, },
23793 : { 6843 /* retfq */, X86::LRETQ, Convert_NoOperands, Feature_In64BitMode, { }, },
23794 : { 6843 /* retfq */, X86::LRETIQ, Convert__Imm1_0, Feature_In64BitMode, { MCK_Imm }, },
23795 : { 6864 /* rex64 */, X86::REX64_PREFIX, Convert_NoOperands, Feature_In64BitMode, { }, },
23796 : { 6870 /* rol */, X86::ROL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23797 : { 6870 /* rol */, X86::ROL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23798 : { 6870 /* rol */, X86::ROL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23799 : { 6870 /* rol */, X86::ROL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23800 : { 6870 /* rol */, X86::ROL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23801 : { 6870 /* rol */, X86::ROL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23802 : { 6870 /* rol */, X86::ROL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23803 : { 6870 /* rol */, X86::ROL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23804 : { 6870 /* rol */, X86::ROL16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23805 : { 6870 /* rol */, X86::ROL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23806 : { 6870 /* rol */, X86::ROL32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23807 : { 6870 /* rol */, X86::ROL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23808 : { 6870 /* rol */, X86::ROL64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23809 : { 6870 /* rol */, X86::ROL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23810 : { 6870 /* rol */, X86::ROL8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23811 : { 6870 /* rol */, X86::ROL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23812 : { 6870 /* rol */, X86::ROL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23813 : { 6870 /* rol */, X86::ROL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23814 : { 6870 /* rol */, X86::ROL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23815 : { 6870 /* rol */, X86::ROL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23816 : { 6870 /* rol */, X86::ROL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23817 : { 6870 /* rol */, X86::ROL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23818 : { 6870 /* rol */, X86::ROL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23819 : { 6870 /* rol */, X86::ROL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23820 : { 6894 /* ror */, X86::ROR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23821 : { 6894 /* ror */, X86::ROR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23822 : { 6894 /* ror */, X86::ROR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23823 : { 6894 /* ror */, X86::ROR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23824 : { 6894 /* ror */, X86::ROR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23825 : { 6894 /* ror */, X86::ROR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23826 : { 6894 /* ror */, X86::ROR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23827 : { 6894 /* ror */, X86::ROR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23828 : { 6894 /* ror */, X86::ROR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23829 : { 6894 /* ror */, X86::ROR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23830 : { 6894 /* ror */, X86::ROR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23831 : { 6894 /* ror */, X86::ROR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23832 : { 6894 /* ror */, X86::ROR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23833 : { 6894 /* ror */, X86::ROR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23834 : { 6894 /* ror */, X86::ROR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23835 : { 6894 /* ror */, X86::ROR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23836 : { 6894 /* ror */, X86::ROR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23837 : { 6894 /* ror */, X86::ROR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23838 : { 6894 /* ror */, X86::ROR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23839 : { 6894 /* ror */, X86::ROR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23840 : { 6894 /* ror */, X86::ROR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23841 : { 6894 /* ror */, X86::ROR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23842 : { 6894 /* ror */, X86::ROR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23843 : { 6894 /* ror */, X86::ROR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23844 : { 6918 /* rorx */, X86::RORX32ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
23845 : { 6918 /* rorx */, X86::RORX32mi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23846 : { 6918 /* rorx */, X86::RORX64ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
23847 : { 6918 /* rorx */, X86::RORX64mi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23848 : { 6935 /* roundpd */, X86::ROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23849 : { 6935 /* roundpd */, X86::ROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23850 : { 6943 /* roundps */, X86::ROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23851 : { 6943 /* roundps */, X86::ROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23852 : { 6951 /* roundsd */, X86::ROUNDSDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23853 : { 6951 /* roundsd */, X86::ROUNDSDm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
23854 : { 6959 /* roundss */, X86::ROUNDSSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23855 : { 6959 /* roundss */, X86::ROUNDSSm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
23856 : { 6967 /* rsm */, X86::RSM, Convert_NoOperands, 0, { }, },
23857 : { 6971 /* rsqrtps */, X86::RSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23858 : { 6971 /* rsqrtps */, X86::RSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23859 : { 6979 /* rsqrtss */, X86::RSQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23860 : { 6979 /* rsqrtss */, X86::RSQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
23861 : { 6987 /* rstorssp */, X86::RSTORSSP, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23862 : { 6996 /* sahf */, X86::SAHF, Convert_NoOperands, 0, { }, },
23863 : { 7001 /* salc */, X86::SALC, Convert_NoOperands, Feature_Not64BitMode, { }, },
23864 : { 7006 /* sar */, X86::SAR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23865 : { 7006 /* sar */, X86::SAR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23866 : { 7006 /* sar */, X86::SAR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23867 : { 7006 /* sar */, X86::SAR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23868 : { 7006 /* sar */, X86::SAR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
23869 : { 7006 /* sar */, X86::SAR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
23870 : { 7006 /* sar */, X86::SAR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
23871 : { 7006 /* sar */, X86::SAR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23872 : { 7006 /* sar */, X86::SAR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
23873 : { 7006 /* sar */, X86::SAR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
23874 : { 7006 /* sar */, X86::SAR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
23875 : { 7006 /* sar */, X86::SAR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
23876 : { 7006 /* sar */, X86::SAR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
23877 : { 7006 /* sar */, X86::SAR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
23878 : { 7006 /* sar */, X86::SAR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
23879 : { 7006 /* sar */, X86::SAR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
23880 : { 7006 /* sar */, X86::SAR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
23881 : { 7006 /* sar */, X86::SAR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
23882 : { 7006 /* sar */, X86::SAR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
23883 : { 7006 /* sar */, X86::SAR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
23884 : { 7006 /* sar */, X86::SAR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
23885 : { 7006 /* sar */, X86::SAR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
23886 : { 7006 /* sar */, X86::SAR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
23887 : { 7006 /* sar */, X86::SAR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
23888 : { 7030 /* sarx */, X86::SARX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
23889 : { 7030 /* sarx */, X86::SARX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
23890 : { 7030 /* sarx */, X86::SARX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
23891 : { 7030 /* sarx */, X86::SARX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
23892 : { 7047 /* saveprevssp */, X86::SAVEPREVSSP, Convert_NoOperands, 0, { }, },
23893 : { 7059 /* sbb */, X86::SBB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
23894 : { 7059 /* sbb */, X86::SBB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
23895 : { 7059 /* sbb */, X86::SBB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
23896 : { 7059 /* sbb */, X86::SBB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
23897 : { 7059 /* sbb */, X86::SBB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
23898 : { 7059 /* sbb */, X86::SBB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
23899 : { 7059 /* sbb */, X86::SBB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
23900 : { 7059 /* sbb */, X86::SBB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
23901 : { 7059 /* sbb */, X86::SBB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
23902 : { 7059 /* sbb */, X86::SBB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
23903 : { 7059 /* sbb */, X86::SBB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
23904 : { 7059 /* sbb */, X86::SBB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
23905 : { 7059 /* sbb */, X86::SBB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
23906 : { 7059 /* sbb */, X86::SBB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
23907 : { 7059 /* sbb */, X86::SBB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
23908 : { 7059 /* sbb */, X86::SBB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
23909 : { 7059 /* sbb */, X86::SBB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
23910 : { 7059 /* sbb */, X86::SBB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
23911 : { 7059 /* sbb */, X86::SBB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
23912 : { 7059 /* sbb */, X86::SBB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
23913 : { 7059 /* sbb */, X86::SBB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
23914 : { 7059 /* sbb */, X86::SBB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
23915 : { 7059 /* sbb */, X86::SBB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
23916 : { 7059 /* sbb */, X86::SBB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
23917 : { 7059 /* sbb */, X86::SBB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
23918 : { 7059 /* sbb */, X86::SBB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
23919 : { 7059 /* sbb */, X86::SBB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
23920 : { 7059 /* sbb */, X86::SBB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
23921 : { 7059 /* sbb */, X86::SBB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
23922 : { 7059 /* sbb */, X86::SBB64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
23923 : { 7059 /* sbb */, X86::SBB64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
23924 : { 7059 /* sbb */, X86::SBB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
23925 : { 7059 /* sbb */, X86::SBB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
23926 : { 7083 /* scas */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23927 : { 7083 /* scas */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23928 : { 7083 /* scas */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23929 : { 7083 /* scas */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23930 : { 7083 /* scas */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
23931 : { 7083 /* scas */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
23932 : { 7083 /* scas */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
23933 : { 7083 /* scas */, X86::SCASQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
23934 : { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
23935 : { 7088 /* scasb */, X86::SCASB, Convert__DstIdx81_1, 0, { MCK_AL, MCK_DstIdx8 }, },
23936 : { 7094 /* scasd */, X86::SCASL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
23937 : { 7094 /* scasd */, X86::SCASL, Convert__DstIdx321_1, 0, { MCK_EAX, MCK_DstIdx32 }, },
23938 : { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
23939 : { 7106 /* scasq */, X86::SCASQ, Convert__DstIdx641_1, Feature_In64BitMode, { MCK_RAX, MCK_DstIdx64 }, },
23940 : { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
23941 : { 7112 /* scasw */, X86::SCASW, Convert__DstIdx161_1, 0, { MCK_AX, MCK_DstIdx16 }, },
23942 : { 7118 /* seta */, X86::SETAr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23943 : { 7118 /* seta */, X86::SETAm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23944 : { 7123 /* setae */, X86::SETAEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23945 : { 7123 /* setae */, X86::SETAEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23946 : { 7129 /* setb */, X86::SETBr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23947 : { 7129 /* setb */, X86::SETBm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23948 : { 7134 /* setbe */, X86::SETBEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23949 : { 7134 /* setbe */, X86::SETBEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23950 : { 7140 /* sete */, X86::SETEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23951 : { 7140 /* sete */, X86::SETEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23952 : { 7145 /* setg */, X86::SETGr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23953 : { 7145 /* setg */, X86::SETGm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23954 : { 7150 /* setge */, X86::SETGEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23955 : { 7150 /* setge */, X86::SETGEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23956 : { 7156 /* setl */, X86::SETLr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23957 : { 7156 /* setl */, X86::SETLm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23958 : { 7161 /* setle */, X86::SETLEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23959 : { 7161 /* setle */, X86::SETLEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23960 : { 7167 /* setne */, X86::SETNEr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23961 : { 7167 /* setne */, X86::SETNEm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23962 : { 7173 /* setno */, X86::SETNOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23963 : { 7173 /* setno */, X86::SETNOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23964 : { 7179 /* setnp */, X86::SETNPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23965 : { 7179 /* setnp */, X86::SETNPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23966 : { 7185 /* setns */, X86::SETNSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23967 : { 7185 /* setns */, X86::SETNSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23968 : { 7191 /* seto */, X86::SETOr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23969 : { 7191 /* seto */, X86::SETOm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23970 : { 7196 /* setp */, X86::SETPr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23971 : { 7196 /* setp */, X86::SETPm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23972 : { 7201 /* sets */, X86::SETSr, Convert__Reg1_0, 0, { MCK_GR8 }, },
23973 : { 7201 /* sets */, X86::SETSm, Convert__Mem85_0, 0, { MCK_Mem8 }, },
23974 : { 7206 /* setssbsy */, X86::SETSSBSY, Convert_NoOperands, 0, { }, },
23975 : { 7215 /* sfence */, X86::SFENCE, Convert_NoOperands, 0, { }, },
23976 : { 7222 /* sgdt */, X86::SGDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
23977 : { 7227 /* sgdtd */, X86::SGDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23978 : { 7245 /* sgdtw */, X86::SGDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
23979 : { 7251 /* sha1msg1 */, X86::SHA1MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23980 : { 7251 /* sha1msg1 */, X86::SHA1MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23981 : { 7260 /* sha1msg2 */, X86::SHA1MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23982 : { 7260 /* sha1msg2 */, X86::SHA1MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23983 : { 7269 /* sha1nexte */, X86::SHA1NEXTErr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23984 : { 7269 /* sha1nexte */, X86::SHA1NEXTErm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23985 : { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
23986 : { 7279 /* sha1rnds4 */, X86::SHA1RNDS4rmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
23987 : { 7289 /* sha256msg1 */, X86::SHA256MSG1rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23988 : { 7289 /* sha256msg1 */, X86::SHA256MSG1rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23989 : { 7300 /* sha256msg2 */, X86::SHA256MSG2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23990 : { 7300 /* sha256msg2 */, X86::SHA256MSG2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23991 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
23992 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
23993 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32, MCK_XMM0 }, },
23994 : { 7311 /* sha256rnds2 */, X86::SHA256RNDS2rm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128, MCK_XMM0 }, },
23995 : { 7323 /* shl */, X86::SHL16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
23996 : { 7323 /* shl */, X86::SHL32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
23997 : { 7323 /* shl */, X86::SHL64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
23998 : { 7323 /* shl */, X86::SHL8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
23999 : { 7323 /* shl */, X86::SHL16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
24000 : { 7323 /* shl */, X86::SHL32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
24001 : { 7323 /* shl */, X86::SHL64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
24002 : { 7323 /* shl */, X86::SHL8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
24003 : { 7323 /* shl */, X86::SHL16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
24004 : { 7323 /* shl */, X86::SHL16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24005 : { 7323 /* shl */, X86::SHL32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
24006 : { 7323 /* shl */, X86::SHL32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24007 : { 7323 /* shl */, X86::SHL64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
24008 : { 7323 /* shl */, X86::SHL64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24009 : { 7323 /* shl */, X86::SHL8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
24010 : { 7323 /* shl */, X86::SHL8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24011 : { 7323 /* shl */, X86::SHL16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
24012 : { 7323 /* shl */, X86::SHL16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24013 : { 7323 /* shl */, X86::SHL32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
24014 : { 7323 /* shl */, X86::SHL32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24015 : { 7323 /* shl */, X86::SHL64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
24016 : { 7323 /* shl */, X86::SHL64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24017 : { 7323 /* shl */, X86::SHL8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
24018 : { 7323 /* shl */, X86::SHL8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24019 : { 7332 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24020 : { 7332 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24021 : { 7332 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24022 : { 7332 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
24023 : { 7332 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
24024 : { 7332 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
24025 : { 7332 /* shld */, X86::SHLD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
24026 : { 7332 /* shld */, X86::SHLD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24027 : { 7332 /* shld */, X86::SHLD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
24028 : { 7332 /* shld */, X86::SHLD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24029 : { 7332 /* shld */, X86::SHLD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
24030 : { 7332 /* shld */, X86::SHLD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
24031 : { 7332 /* shld */, X86::SHLD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
24032 : { 7332 /* shld */, X86::SHLD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24033 : { 7332 /* shld */, X86::SHLD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
24034 : { 7332 /* shld */, X86::SHLD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24035 : { 7332 /* shld */, X86::SHLD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
24036 : { 7332 /* shld */, X86::SHLD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
24037 : { 7370 /* shlx */, X86::SHLX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24038 : { 7370 /* shlx */, X86::SHLX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24039 : { 7370 /* shlx */, X86::SHLX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
24040 : { 7370 /* shlx */, X86::SHLX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
24041 : { 7387 /* shr */, X86::SHR16r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16 }, },
24042 : { 7387 /* shr */, X86::SHR32r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32 }, },
24043 : { 7387 /* shr */, X86::SHR64r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64 }, },
24044 : { 7387 /* shr */, X86::SHR8r1, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8 }, },
24045 : { 7387 /* shr */, X86::SHR16m1, Convert__Mem165_0, 0, { MCK_Mem16 }, },
24046 : { 7387 /* shr */, X86::SHR32m1, Convert__Mem325_0, 0, { MCK_Mem32 }, },
24047 : { 7387 /* shr */, X86::SHR64m1, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64 }, },
24048 : { 7387 /* shr */, X86::SHR8m1, Convert__Mem85_0, 0, { MCK_Mem8 }, },
24049 : { 7387 /* shr */, X86::SHR16rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_CL }, },
24050 : { 7387 /* shr */, X86::SHR16ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR16, MCK_ImmUnsignedi8 }, },
24051 : { 7387 /* shr */, X86::SHR32rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_CL }, },
24052 : { 7387 /* shr */, X86::SHR32ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR32, MCK_ImmUnsignedi8 }, },
24053 : { 7387 /* shr */, X86::SHR64rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_CL }, },
24054 : { 7387 /* shr */, X86::SHR64ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR64, MCK_ImmUnsignedi8 }, },
24055 : { 7387 /* shr */, X86::SHR8rCL, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR8, MCK_CL }, },
24056 : { 7387 /* shr */, X86::SHR8ri, Convert__Reg1_0__Tie0_1_1__ImmUnsignedi81_1, 0, { MCK_GR8, MCK_ImmUnsignedi8 }, },
24057 : { 7387 /* shr */, X86::SHR16mCL, Convert__Mem165_0, 0, { MCK_Mem16, MCK_CL }, },
24058 : { 7387 /* shr */, X86::SHR16mi, Convert__Mem165_0__ImmUnsignedi81_1, 0, { MCK_Mem16, MCK_ImmUnsignedi8 }, },
24059 : { 7387 /* shr */, X86::SHR32mCL, Convert__Mem325_0, 0, { MCK_Mem32, MCK_CL }, },
24060 : { 7387 /* shr */, X86::SHR32mi, Convert__Mem325_0__ImmUnsignedi81_1, 0, { MCK_Mem32, MCK_ImmUnsignedi8 }, },
24061 : { 7387 /* shr */, X86::SHR64mCL, Convert__Mem645_0, Feature_In64BitMode, { MCK_Mem64, MCK_CL }, },
24062 : { 7387 /* shr */, X86::SHR64mi, Convert__Mem645_0__ImmUnsignedi81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmUnsignedi8 }, },
24063 : { 7387 /* shr */, X86::SHR8mCL, Convert__Mem85_0, 0, { MCK_Mem8, MCK_CL }, },
24064 : { 7387 /* shr */, X86::SHR8mi, Convert__Mem85_0__ImmUnsignedi81_1, 0, { MCK_Mem8, MCK_ImmUnsignedi8 }, },
24065 : { 7396 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24066 : { 7396 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24067 : { 7396 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24068 : { 7396 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
24069 : { 7396 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
24070 : { 7396 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
24071 : { 7396 /* shrd */, X86::SHRD16rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16, MCK_CL }, },
24072 : { 7396 /* shrd */, X86::SHRD16rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24073 : { 7396 /* shrd */, X86::SHRD32rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32, MCK_CL }, },
24074 : { 7396 /* shrd */, X86::SHRD32rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24075 : { 7396 /* shrd */, X86::SHRD64rrCL, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64, MCK_CL }, },
24076 : { 7396 /* shrd */, X86::SHRD64rri8, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_GR64, MCK_ImmUnsignedi8 }, },
24077 : { 7396 /* shrd */, X86::SHRD16mrCL, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16, MCK_CL }, },
24078 : { 7396 /* shrd */, X86::SHRD16mri8, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_GR16, MCK_ImmUnsignedi8 }, },
24079 : { 7396 /* shrd */, X86::SHRD32mrCL, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32, MCK_CL }, },
24080 : { 7396 /* shrd */, X86::SHRD32mri8, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_GR32, MCK_ImmUnsignedi8 }, },
24081 : { 7396 /* shrd */, X86::SHRD64mrCL, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64, MCK_CL }, },
24082 : { 7396 /* shrd */, X86::SHRD64mri8, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_GR64, MCK_ImmUnsignedi8 }, },
24083 : { 7434 /* shrx */, X86::SHRX32rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR32, MCK_GR32, MCK_GR32 }, },
24084 : { 7434 /* shrx */, X86::SHRX32rm, Convert__Reg1_0__Mem325_1__Reg1_2, 0, { MCK_GR32, MCK_Mem32, MCK_GR32 }, },
24085 : { 7434 /* shrx */, X86::SHRX64rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_GR64, MCK_GR64, MCK_GR64 }, },
24086 : { 7434 /* shrx */, X86::SHRX64rm, Convert__Reg1_0__Mem645_1__Reg1_2, 0, { MCK_GR64, MCK_Mem64, MCK_GR64 }, },
24087 : { 7451 /* shufpd */, X86::SHUFPDrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24088 : { 7451 /* shufpd */, X86::SHUFPDrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24089 : { 7458 /* shufps */, X86::SHUFPSrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24090 : { 7458 /* shufps */, X86::SHUFPSrmi, Convert__Reg1_0__Tie0_1_1__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24091 : { 7465 /* sidt */, X86::SIDT64m, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
24092 : { 7470 /* sidtd */, X86::SIDT32m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
24093 : { 7488 /* sidtw */, X86::SIDT16m, Convert__Mem5_0, Feature_Not64BitMode, { MCK_Mem }, },
24094 : { 7494 /* skinit */, X86::SKINIT, Convert_NoOperands, 0, { MCK_EAX }, },
24095 : { 7501 /* sldt */, X86::SLDT16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
24096 : { 7501 /* sldt */, X86::SLDT32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
24097 : { 7501 /* sldt */, X86::SLDT64r, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
24098 : { 7501 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
24099 : { 7501 /* sldt */, X86::SLDT16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
24100 : { 7524 /* slwpcb */, X86::SLWPCB, Convert__Reg1_0, 0, { MCK_GR32 }, },
24101 : { 7524 /* slwpcb */, X86::SLWPCB64, Convert__Reg1_0, 0, { MCK_GR64 }, },
24102 : { 7531 /* smsw */, X86::SMSW16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
24103 : { 7531 /* smsw */, X86::SMSW32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
24104 : { 7531 /* smsw */, X86::SMSW64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
24105 : { 7531 /* smsw */, X86::SMSW16m, Convert__Mem165_0, 0, { MCK_Mem16 }, },
24106 : { 7554 /* sqrtpd */, X86::SQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24107 : { 7554 /* sqrtpd */, X86::SQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24108 : { 7561 /* sqrtps */, X86::SQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24109 : { 7561 /* sqrtps */, X86::SQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24110 : { 7568 /* sqrtsd */, X86::SQRTSDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24111 : { 7568 /* sqrtsd */, X86::SQRTSDm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24112 : { 7575 /* sqrtss */, X86::SQRTSSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24113 : { 7575 /* sqrtss */, X86::SQRTSSm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24114 : { 7582 /* ss */, X86::SS_PREFIX, Convert_NoOperands, 0, { }, },
24115 : { 7585 /* stac */, X86::STAC, Convert_NoOperands, 0, { }, },
24116 : { 7590 /* stc */, X86::STC, Convert_NoOperands, 0, { }, },
24117 : { 7594 /* std */, X86::STD, Convert_NoOperands, 0, { }, },
24118 : { 7598 /* stgi */, X86::STGI, Convert_NoOperands, 0, { }, },
24119 : { 7603 /* sti */, X86::STI, Convert_NoOperands, 0, { }, },
24120 : { 7607 /* stmxcsr */, X86::STMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
24121 : { 7615 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
24122 : { 7615 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
24123 : { 7615 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
24124 : { 7615 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
24125 : { 7615 /* stos */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
24126 : { 7615 /* stos */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
24127 : { 7615 /* stos */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
24128 : { 7615 /* stos */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
24129 : { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8 }, },
24130 : { 7620 /* stosb */, X86::STOSB, Convert__DstIdx81_0, 0, { MCK_DstIdx8, MCK_AL }, },
24131 : { 7626 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32 }, },
24132 : { 7626 /* stosd */, X86::STOSL, Convert__DstIdx321_0, 0, { MCK_DstIdx32, MCK_EAX }, },
24133 : { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64 }, },
24134 : { 7638 /* stosq */, X86::STOSQ, Convert__DstIdx641_0, Feature_In64BitMode, { MCK_DstIdx64, MCK_RAX }, },
24135 : { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16 }, },
24136 : { 7644 /* stosw */, X86::STOSW, Convert__DstIdx161_0, 0, { MCK_DstIdx16, MCK_AX }, },
24137 : { 7650 /* str */, X86::STR16r, Convert__Reg1_0, 0, { MCK_GR16 }, },
24138 : { 7650 /* str */, X86::STR32r, Convert__Reg1_0, 0, { MCK_GR32 }, },
24139 : { 7650 /* str */, X86::STR64r, Convert__Reg1_0, 0, { MCK_GR64 }, },
24140 : { 7650 /* str */, X86::STRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
24141 : { 7669 /* sub */, X86::SUB8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
24142 : { 7669 /* sub */, X86::SUB16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
24143 : { 7669 /* sub */, X86::SUB16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
24144 : { 7669 /* sub */, X86::SUB32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
24145 : { 7669 /* sub */, X86::SUB32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
24146 : { 7669 /* sub */, X86::SUB64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
24147 : { 7669 /* sub */, X86::SUB64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
24148 : { 7669 /* sub */, X86::SUB16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24149 : { 7669 /* sub */, X86::SUB16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
24150 : { 7669 /* sub */, X86::SUB16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
24151 : { 7669 /* sub */, X86::SUB16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
24152 : { 7669 /* sub */, X86::SUB32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24153 : { 7669 /* sub */, X86::SUB32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
24154 : { 7669 /* sub */, X86::SUB32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
24155 : { 7669 /* sub */, X86::SUB32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
24156 : { 7669 /* sub */, X86::SUB64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24157 : { 7669 /* sub */, X86::SUB64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
24158 : { 7669 /* sub */, X86::SUB64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
24159 : { 7669 /* sub */, X86::SUB64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24160 : { 7669 /* sub */, X86::SUB8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
24161 : { 7669 /* sub */, X86::SUB8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
24162 : { 7669 /* sub */, X86::SUB8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
24163 : { 7669 /* sub */, X86::SUB16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
24164 : { 7669 /* sub */, X86::SUB16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
24165 : { 7669 /* sub */, X86::SUB16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
24166 : { 7669 /* sub */, X86::SUB32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
24167 : { 7669 /* sub */, X86::SUB32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
24168 : { 7669 /* sub */, X86::SUB32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
24169 : { 7669 /* sub */, X86::SUB64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
24170 : { 7669 /* sub */, X86::SUB64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
24171 : { 7669 /* sub */, X86::SUB64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
24172 : { 7669 /* sub */, X86::SUB8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
24173 : { 7669 /* sub */, X86::SUB8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
24174 : { 7683 /* subpd */, X86::SUBPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24175 : { 7683 /* subpd */, X86::SUBPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24176 : { 7689 /* subps */, X86::SUBPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24177 : { 7689 /* subps */, X86::SUBPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24178 : { 7700 /* subsd */, X86::SUBSDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24179 : { 7700 /* subsd */, X86::SUBSDrm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24180 : { 7706 /* subss */, X86::SUBSSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24181 : { 7706 /* subss */, X86::SUBSSrm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24182 : { 7717 /* swapgs */, X86::SWAPGS, Convert_NoOperands, 0, { }, },
24183 : { 7724 /* syscall */, X86::SYSCALL, Convert_NoOperands, 0, { }, },
24184 : { 7732 /* sysenter */, X86::SYSENTER, Convert_NoOperands, 0, { }, },
24185 : { 7741 /* sysexit */, X86::SYSEXIT, Convert_NoOperands, 0, { }, },
24186 : { 7758 /* sysexitq */, X86::SYSEXIT64, Convert_NoOperands, Feature_In64BitMode, { }, },
24187 : { 7767 /* sysret */, X86::SYSRET, Convert_NoOperands, 0, { }, },
24188 : { 7782 /* sysretq */, X86::SYSRET64, Convert_NoOperands, Feature_In64BitMode, { }, },
24189 : { 7790 /* t1mskc */, X86::T1MSKC32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24190 : { 7790 /* t1mskc */, X86::T1MSKC32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
24191 : { 7790 /* t1mskc */, X86::T1MSKC64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24192 : { 7790 /* t1mskc */, X86::T1MSKC64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24193 : { 7813 /* test */, X86::TEST8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
24194 : { 7813 /* test */, X86::TEST16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
24195 : { 7813 /* test */, X86::TEST32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
24196 : { 7813 /* test */, X86::TEST64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
24197 : { 7813 /* test */, X86::TEST16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24198 : { 7813 /* test */, X86::TEST16ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
24199 : { 7813 /* test */, X86::TEST16mr, Convert__Mem165_1__Reg1_0, 0, { MCK_GR16, MCK_Mem16 }, },
24200 : { 7813 /* test */, X86::TEST32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24201 : { 7813 /* test */, X86::TEST32ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
24202 : { 7813 /* test */, X86::TEST32mr, Convert__Mem325_1__Reg1_0, 0, { MCK_GR32, MCK_Mem32 }, },
24203 : { 7813 /* test */, X86::TEST64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24204 : { 7813 /* test */, X86::TEST64ri32, Convert__Reg1_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_GR64, MCK_ImmSExti64i32 }, },
24205 : { 7813 /* test */, X86::TEST64mr, Convert__Mem645_1__Reg1_0, 0, { MCK_GR64, MCK_Mem64 }, },
24206 : { 7813 /* test */, X86::TEST8rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
24207 : { 7813 /* test */, X86::TEST8ri, Convert__Reg1_0__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
24208 : { 7813 /* test */, X86::TEST8mr, Convert__Mem85_1__Reg1_0, 0, { MCK_GR8, MCK_Mem8 }, },
24209 : { 7813 /* test */, X86::TEST16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
24210 : { 7813 /* test */, X86::TEST16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
24211 : { 7813 /* test */, X86::TEST32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
24212 : { 7813 /* test */, X86::TEST32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
24213 : { 7813 /* test */, X86::TEST64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
24214 : { 7813 /* test */, X86::TEST64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
24215 : { 7813 /* test */, X86::TEST8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
24216 : { 7813 /* test */, X86::TEST8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
24217 : { 7842 /* tpause */, X86::TPAUSE, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
24218 : { 7849 /* tzcnt */, X86::TZCNT16rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
24219 : { 7849 /* tzcnt */, X86::TZCNT16rm, Convert__Reg1_0__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
24220 : { 7849 /* tzcnt */, X86::TZCNT32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24221 : { 7849 /* tzcnt */, X86::TZCNT32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
24222 : { 7849 /* tzcnt */, X86::TZCNT64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24223 : { 7849 /* tzcnt */, X86::TZCNT64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24224 : { 7876 /* tzmsk */, X86::TZMSK32rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
24225 : { 7876 /* tzmsk */, X86::TZMSK32rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
24226 : { 7876 /* tzmsk */, X86::TZMSK64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
24227 : { 7876 /* tzmsk */, X86::TZMSK64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
24228 : { 7896 /* ucomisd */, X86::UCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24229 : { 7896 /* ucomisd */, X86::UCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24230 : { 7904 /* ucomiss */, X86::UCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24231 : { 7904 /* ucomiss */, X86::UCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24232 : { 7912 /* ud2 */, X86::TRAP, Convert_NoOperands, 0, { }, },
24233 : { 7916 /* ud2b */, X86::UD2B, Convert_NoOperands, 0, { }, },
24234 : { 7921 /* umonitor */, X86::UMONITOR16, Convert__Reg1_0, Feature_Not64BitMode, { MCK_GR16 }, },
24235 : { 7921 /* umonitor */, X86::UMONITOR32, Convert__Reg1_0, 0, { MCK_GR32 }, },
24236 : { 7921 /* umonitor */, X86::UMONITOR64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
24237 : { 7930 /* umwait */, X86::UMWAIT, Convert__GR32orGR641_0, 0, { MCK_GR32orGR64 }, },
24238 : { 7937 /* unpckhpd */, X86::UNPCKHPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24239 : { 7937 /* unpckhpd */, X86::UNPCKHPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24240 : { 7946 /* unpckhps */, X86::UNPCKHPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24241 : { 7946 /* unpckhps */, X86::UNPCKHPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24242 : { 7955 /* unpcklpd */, X86::UNPCKLPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24243 : { 7955 /* unpcklpd */, X86::UNPCKLPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24244 : { 7964 /* unpcklps */, X86::UNPCKLPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24245 : { 7964 /* unpcklps */, X86::UNPCKLPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24246 : { 7973 /* v4fmaddps */, X86::V4FMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
24247 : { 7973 /* v4fmaddps */, X86::V4FMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
24248 : { 7973 /* v4fmaddps */, X86::V4FMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
24249 : { 7983 /* v4fmaddss */, X86::V4FMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24250 : { 7983 /* v4fmaddss */, X86::V4FMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24251 : { 7983 /* v4fmaddss */, X86::V4FMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24252 : { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
24253 : { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
24254 : { 7993 /* v4fnmaddps */, X86::V4FNMADDPSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
24255 : { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24256 : { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24257 : { 8004 /* v4fnmaddss */, X86::V4FNMADDSSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24258 : { 8015 /* vaddpd */, X86::VADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24259 : { 8015 /* vaddpd */, X86::VADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24260 : { 8015 /* vaddpd */, X86::VADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24261 : { 8015 /* vaddpd */, X86::VADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24262 : { 8015 /* vaddpd */, X86::VADDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24263 : { 8015 /* vaddpd */, X86::VADDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24264 : { 8015 /* vaddpd */, X86::VADDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24265 : { 8015 /* vaddpd */, X86::VADDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24266 : { 8015 /* vaddpd */, X86::VADDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24267 : { 8015 /* vaddpd */, X86::VADDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24268 : { 8015 /* vaddpd */, X86::VADDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24269 : { 8015 /* vaddpd */, X86::VADDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24270 : { 8015 /* vaddpd */, X86::VADDPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24271 : { 8015 /* vaddpd */, X86::VADDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24272 : { 8015 /* vaddpd */, X86::VADDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24273 : { 8015 /* vaddpd */, X86::VADDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24274 : { 8015 /* vaddpd */, X86::VADDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24275 : { 8015 /* vaddpd */, X86::VADDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24276 : { 8015 /* vaddpd */, X86::VADDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24277 : { 8015 /* vaddpd */, X86::VADDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24278 : { 8015 /* vaddpd */, X86::VADDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24279 : { 8015 /* vaddpd */, X86::VADDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24280 : { 8015 /* vaddpd */, X86::VADDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24281 : { 8015 /* vaddpd */, X86::VADDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24282 : { 8015 /* vaddpd */, X86::VADDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24283 : { 8015 /* vaddpd */, X86::VADDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24284 : { 8015 /* vaddpd */, X86::VADDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24285 : { 8015 /* vaddpd */, X86::VADDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24286 : { 8015 /* vaddpd */, X86::VADDPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24287 : { 8015 /* vaddpd */, X86::VADDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24288 : { 8015 /* vaddpd */, X86::VADDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24289 : { 8015 /* vaddpd */, X86::VADDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24290 : { 8015 /* vaddpd */, X86::VADDPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24291 : { 8015 /* vaddpd */, X86::VADDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24292 : { 8022 /* vaddps */, X86::VADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24293 : { 8022 /* vaddps */, X86::VADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24294 : { 8022 /* vaddps */, X86::VADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24295 : { 8022 /* vaddps */, X86::VADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24296 : { 8022 /* vaddps */, X86::VADDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24297 : { 8022 /* vaddps */, X86::VADDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24298 : { 8022 /* vaddps */, X86::VADDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24299 : { 8022 /* vaddps */, X86::VADDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24300 : { 8022 /* vaddps */, X86::VADDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24301 : { 8022 /* vaddps */, X86::VADDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24302 : { 8022 /* vaddps */, X86::VADDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24303 : { 8022 /* vaddps */, X86::VADDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24304 : { 8022 /* vaddps */, X86::VADDPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24305 : { 8022 /* vaddps */, X86::VADDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24306 : { 8022 /* vaddps */, X86::VADDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24307 : { 8022 /* vaddps */, X86::VADDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24308 : { 8022 /* vaddps */, X86::VADDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24309 : { 8022 /* vaddps */, X86::VADDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24310 : { 8022 /* vaddps */, X86::VADDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24311 : { 8022 /* vaddps */, X86::VADDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24312 : { 8022 /* vaddps */, X86::VADDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24313 : { 8022 /* vaddps */, X86::VADDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24314 : { 8022 /* vaddps */, X86::VADDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24315 : { 8022 /* vaddps */, X86::VADDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24316 : { 8022 /* vaddps */, X86::VADDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24317 : { 8022 /* vaddps */, X86::VADDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24318 : { 8022 /* vaddps */, X86::VADDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24319 : { 8022 /* vaddps */, X86::VADDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24320 : { 8022 /* vaddps */, X86::VADDPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24321 : { 8022 /* vaddps */, X86::VADDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24322 : { 8022 /* vaddps */, X86::VADDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24323 : { 8022 /* vaddps */, X86::VADDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24324 : { 8022 /* vaddps */, X86::VADDPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24325 : { 8022 /* vaddps */, X86::VADDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24326 : { 8029 /* vaddsd */, X86::VADDSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24327 : { 8029 /* vaddsd */, X86::VADDSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
24328 : { 8029 /* vaddsd */, X86::VADDSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24329 : { 8029 /* vaddsd */, X86::VADDSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
24330 : { 8029 /* vaddsd */, X86::VADDSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24331 : { 8029 /* vaddsd */, X86::VADDSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24332 : { 8029 /* vaddsd */, X86::VADDSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
24333 : { 8029 /* vaddsd */, X86::VADDSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24334 : { 8029 /* vaddsd */, X86::VADDSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
24335 : { 8029 /* vaddsd */, X86::VADDSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24336 : { 8029 /* vaddsd */, X86::VADDSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24337 : { 8036 /* vaddss */, X86::VADDSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24338 : { 8036 /* vaddss */, X86::VADDSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
24339 : { 8036 /* vaddss */, X86::VADDSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24340 : { 8036 /* vaddss */, X86::VADDSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
24341 : { 8036 /* vaddss */, X86::VADDSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24342 : { 8036 /* vaddss */, X86::VADDSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24343 : { 8036 /* vaddss */, X86::VADDSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
24344 : { 8036 /* vaddss */, X86::VADDSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24345 : { 8036 /* vaddss */, X86::VADDSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
24346 : { 8036 /* vaddss */, X86::VADDSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24347 : { 8036 /* vaddss */, X86::VADDSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
24348 : { 8043 /* vaddsubpd */, X86::VADDSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24349 : { 8043 /* vaddsubpd */, X86::VADDSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24350 : { 8043 /* vaddsubpd */, X86::VADDSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24351 : { 8043 /* vaddsubpd */, X86::VADDSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24352 : { 8053 /* vaddsubps */, X86::VADDSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24353 : { 8053 /* vaddsubps */, X86::VADDSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24354 : { 8053 /* vaddsubps */, X86::VADDSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24355 : { 8053 /* vaddsubps */, X86::VADDSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24356 : { 8063 /* vaesdec */, X86::VAESDECrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24357 : { 8063 /* vaesdec */, X86::VAESDECrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24358 : { 8063 /* vaesdec */, X86::VAESDECYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24359 : { 8063 /* vaesdec */, X86::VAESDECYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24360 : { 8063 /* vaesdec */, X86::VAESDECZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24361 : { 8063 /* vaesdec */, X86::VAESDECZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24362 : { 8063 /* vaesdec */, X86::VAESDECZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24363 : { 8063 /* vaesdec */, X86::VAESDECZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24364 : { 8063 /* vaesdec */, X86::VAESDECZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24365 : { 8063 /* vaesdec */, X86::VAESDECZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24366 : { 8071 /* vaesdeclast */, X86::VAESDECLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24367 : { 8071 /* vaesdeclast */, X86::VAESDECLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24368 : { 8071 /* vaesdeclast */, X86::VAESDECLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24369 : { 8071 /* vaesdeclast */, X86::VAESDECLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24370 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24371 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24372 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24373 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24374 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24375 : { 8071 /* vaesdeclast */, X86::VAESDECLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24376 : { 8083 /* vaesenc */, X86::VAESENCrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24377 : { 8083 /* vaesenc */, X86::VAESENCrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24378 : { 8083 /* vaesenc */, X86::VAESENCYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24379 : { 8083 /* vaesenc */, X86::VAESENCYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24380 : { 8083 /* vaesenc */, X86::VAESENCZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24381 : { 8083 /* vaesenc */, X86::VAESENCZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24382 : { 8083 /* vaesenc */, X86::VAESENCZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24383 : { 8083 /* vaesenc */, X86::VAESENCZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24384 : { 8083 /* vaesenc */, X86::VAESENCZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24385 : { 8083 /* vaesenc */, X86::VAESENCZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24386 : { 8091 /* vaesenclast */, X86::VAESENCLASTrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24387 : { 8091 /* vaesenclast */, X86::VAESENCLASTrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24388 : { 8091 /* vaesenclast */, X86::VAESENCLASTYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24389 : { 8091 /* vaesenclast */, X86::VAESENCLASTYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24390 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24391 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24392 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24393 : { 8091 /* vaesenclast */, X86::VAESENCLASTZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24394 : { 8091 /* vaesenclast */, X86::VAESENCLASTZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24395 : { 8091 /* vaesenclast */, X86::VAESENCLASTZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24396 : { 8103 /* vaesimc */, X86::VAESIMCrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24397 : { 8103 /* vaesimc */, X86::VAESIMCrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24398 : { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24399 : { 8111 /* vaeskeygenassist */, X86::VAESKEYGENASSIST128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24400 : { 8128 /* valignd */, X86::VALIGNDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24401 : { 8128 /* valignd */, X86::VALIGNDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24402 : { 8128 /* valignd */, X86::VALIGNDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24403 : { 8128 /* valignd */, X86::VALIGNDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24404 : { 8128 /* valignd */, X86::VALIGNDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24405 : { 8128 /* valignd */, X86::VALIGNDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24406 : { 8128 /* valignd */, X86::VALIGNDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24407 : { 8128 /* valignd */, X86::VALIGNDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24408 : { 8128 /* valignd */, X86::VALIGNDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24409 : { 8128 /* valignd */, X86::VALIGNDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24410 : { 8128 /* valignd */, X86::VALIGNDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24411 : { 8128 /* valignd */, X86::VALIGNDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24412 : { 8128 /* valignd */, X86::VALIGNDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24413 : { 8128 /* valignd */, X86::VALIGNDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24414 : { 8128 /* valignd */, X86::VALIGNDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24415 : { 8128 /* valignd */, X86::VALIGNDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24416 : { 8128 /* valignd */, X86::VALIGNDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24417 : { 8128 /* valignd */, X86::VALIGNDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24418 : { 8128 /* valignd */, X86::VALIGNDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24419 : { 8128 /* valignd */, X86::VALIGNDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24420 : { 8128 /* valignd */, X86::VALIGNDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24421 : { 8128 /* valignd */, X86::VALIGNDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24422 : { 8128 /* valignd */, X86::VALIGNDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24423 : { 8128 /* valignd */, X86::VALIGNDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24424 : { 8128 /* valignd */, X86::VALIGNDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24425 : { 8128 /* valignd */, X86::VALIGNDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24426 : { 8128 /* valignd */, X86::VALIGNDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24427 : { 8136 /* valignq */, X86::VALIGNQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24428 : { 8136 /* valignq */, X86::VALIGNQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24429 : { 8136 /* valignq */, X86::VALIGNQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24430 : { 8136 /* valignq */, X86::VALIGNQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24431 : { 8136 /* valignq */, X86::VALIGNQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24432 : { 8136 /* valignq */, X86::VALIGNQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24433 : { 8136 /* valignq */, X86::VALIGNQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24434 : { 8136 /* valignq */, X86::VALIGNQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24435 : { 8136 /* valignq */, X86::VALIGNQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24436 : { 8136 /* valignq */, X86::VALIGNQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24437 : { 8136 /* valignq */, X86::VALIGNQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24438 : { 8136 /* valignq */, X86::VALIGNQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24439 : { 8136 /* valignq */, X86::VALIGNQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24440 : { 8136 /* valignq */, X86::VALIGNQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24441 : { 8136 /* valignq */, X86::VALIGNQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24442 : { 8136 /* valignq */, X86::VALIGNQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24443 : { 8136 /* valignq */, X86::VALIGNQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24444 : { 8136 /* valignq */, X86::VALIGNQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24445 : { 8136 /* valignq */, X86::VALIGNQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24446 : { 8136 /* valignq */, X86::VALIGNQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24447 : { 8136 /* valignq */, X86::VALIGNQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24448 : { 8136 /* valignq */, X86::VALIGNQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24449 : { 8136 /* valignq */, X86::VALIGNQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24450 : { 8136 /* valignq */, X86::VALIGNQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24451 : { 8136 /* valignq */, X86::VALIGNQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24452 : { 8136 /* valignq */, X86::VALIGNQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24453 : { 8136 /* valignq */, X86::VALIGNQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24454 : { 8144 /* vandnpd */, X86::VANDNPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24455 : { 8144 /* vandnpd */, X86::VANDNPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24456 : { 8144 /* vandnpd */, X86::VANDNPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24457 : { 8144 /* vandnpd */, X86::VANDNPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24458 : { 8144 /* vandnpd */, X86::VANDNPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24459 : { 8144 /* vandnpd */, X86::VANDNPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24460 : { 8144 /* vandnpd */, X86::VANDNPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24461 : { 8144 /* vandnpd */, X86::VANDNPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24462 : { 8144 /* vandnpd */, X86::VANDNPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24463 : { 8144 /* vandnpd */, X86::VANDNPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24464 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24465 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24466 : { 8144 /* vandnpd */, X86::VANDNPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24467 : { 8144 /* vandnpd */, X86::VANDNPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24468 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24469 : { 8144 /* vandnpd */, X86::VANDNPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24470 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24471 : { 8144 /* vandnpd */, X86::VANDNPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24472 : { 8144 /* vandnpd */, X86::VANDNPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24473 : { 8144 /* vandnpd */, X86::VANDNPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24474 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24475 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24476 : { 8144 /* vandnpd */, X86::VANDNPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24477 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24478 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24479 : { 8144 /* vandnpd */, X86::VANDNPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24480 : { 8144 /* vandnpd */, X86::VANDNPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24481 : { 8144 /* vandnpd */, X86::VANDNPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24482 : { 8144 /* vandnpd */, X86::VANDNPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24483 : { 8144 /* vandnpd */, X86::VANDNPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24484 : { 8144 /* vandnpd */, X86::VANDNPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24485 : { 8152 /* vandnps */, X86::VANDNPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24486 : { 8152 /* vandnps */, X86::VANDNPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24487 : { 8152 /* vandnps */, X86::VANDNPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24488 : { 8152 /* vandnps */, X86::VANDNPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24489 : { 8152 /* vandnps */, X86::VANDNPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24490 : { 8152 /* vandnps */, X86::VANDNPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24491 : { 8152 /* vandnps */, X86::VANDNPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24492 : { 8152 /* vandnps */, X86::VANDNPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24493 : { 8152 /* vandnps */, X86::VANDNPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24494 : { 8152 /* vandnps */, X86::VANDNPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24495 : { 8152 /* vandnps */, X86::VANDNPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24496 : { 8152 /* vandnps */, X86::VANDNPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24497 : { 8152 /* vandnps */, X86::VANDNPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24498 : { 8152 /* vandnps */, X86::VANDNPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24499 : { 8152 /* vandnps */, X86::VANDNPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24500 : { 8152 /* vandnps */, X86::VANDNPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24501 : { 8152 /* vandnps */, X86::VANDNPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24502 : { 8152 /* vandnps */, X86::VANDNPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24503 : { 8152 /* vandnps */, X86::VANDNPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24504 : { 8152 /* vandnps */, X86::VANDNPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24505 : { 8152 /* vandnps */, X86::VANDNPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24506 : { 8152 /* vandnps */, X86::VANDNPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24507 : { 8152 /* vandnps */, X86::VANDNPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24508 : { 8152 /* vandnps */, X86::VANDNPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24509 : { 8152 /* vandnps */, X86::VANDNPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24510 : { 8152 /* vandnps */, X86::VANDNPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24511 : { 8152 /* vandnps */, X86::VANDNPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24512 : { 8152 /* vandnps */, X86::VANDNPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24513 : { 8152 /* vandnps */, X86::VANDNPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24514 : { 8152 /* vandnps */, X86::VANDNPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24515 : { 8152 /* vandnps */, X86::VANDNPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24516 : { 8160 /* vandpd */, X86::VANDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24517 : { 8160 /* vandpd */, X86::VANDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24518 : { 8160 /* vandpd */, X86::VANDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24519 : { 8160 /* vandpd */, X86::VANDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24520 : { 8160 /* vandpd */, X86::VANDPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24521 : { 8160 /* vandpd */, X86::VANDPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24522 : { 8160 /* vandpd */, X86::VANDPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24523 : { 8160 /* vandpd */, X86::VANDPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24524 : { 8160 /* vandpd */, X86::VANDPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24525 : { 8160 /* vandpd */, X86::VANDPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24526 : { 8160 /* vandpd */, X86::VANDPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24527 : { 8160 /* vandpd */, X86::VANDPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24528 : { 8160 /* vandpd */, X86::VANDPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24529 : { 8160 /* vandpd */, X86::VANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24530 : { 8160 /* vandpd */, X86::VANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24531 : { 8160 /* vandpd */, X86::VANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24532 : { 8160 /* vandpd */, X86::VANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24533 : { 8160 /* vandpd */, X86::VANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24534 : { 8160 /* vandpd */, X86::VANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24535 : { 8160 /* vandpd */, X86::VANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24536 : { 8160 /* vandpd */, X86::VANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24537 : { 8160 /* vandpd */, X86::VANDPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24538 : { 8160 /* vandpd */, X86::VANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24539 : { 8160 /* vandpd */, X86::VANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24540 : { 8160 /* vandpd */, X86::VANDPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24541 : { 8160 /* vandpd */, X86::VANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24542 : { 8160 /* vandpd */, X86::VANDPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24543 : { 8160 /* vandpd */, X86::VANDPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24544 : { 8160 /* vandpd */, X86::VANDPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24545 : { 8160 /* vandpd */, X86::VANDPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24546 : { 8160 /* vandpd */, X86::VANDPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24547 : { 8167 /* vandps */, X86::VANDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
24548 : { 8167 /* vandps */, X86::VANDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24549 : { 8167 /* vandps */, X86::VANDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
24550 : { 8167 /* vandps */, X86::VANDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24551 : { 8167 /* vandps */, X86::VANDPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24552 : { 8167 /* vandps */, X86::VANDPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24553 : { 8167 /* vandps */, X86::VANDPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24554 : { 8167 /* vandps */, X86::VANDPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24555 : { 8167 /* vandps */, X86::VANDPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24556 : { 8167 /* vandps */, X86::VANDPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24557 : { 8167 /* vandps */, X86::VANDPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24558 : { 8167 /* vandps */, X86::VANDPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24559 : { 8167 /* vandps */, X86::VANDPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24560 : { 8167 /* vandps */, X86::VANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24561 : { 8167 /* vandps */, X86::VANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24562 : { 8167 /* vandps */, X86::VANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24563 : { 8167 /* vandps */, X86::VANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24564 : { 8167 /* vandps */, X86::VANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24565 : { 8167 /* vandps */, X86::VANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24566 : { 8167 /* vandps */, X86::VANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24567 : { 8167 /* vandps */, X86::VANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24568 : { 8167 /* vandps */, X86::VANDPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24569 : { 8167 /* vandps */, X86::VANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24570 : { 8167 /* vandps */, X86::VANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24571 : { 8167 /* vandps */, X86::VANDPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24572 : { 8167 /* vandps */, X86::VANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24573 : { 8167 /* vandps */, X86::VANDPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24574 : { 8167 /* vandps */, X86::VANDPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24575 : { 8167 /* vandps */, X86::VANDPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24576 : { 8167 /* vandps */, X86::VANDPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24577 : { 8167 /* vandps */, X86::VANDPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24578 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24579 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24580 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24581 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24582 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24583 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24584 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24585 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24586 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24587 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24588 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24589 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24590 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24591 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24592 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24593 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24594 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24595 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24596 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24597 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24598 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24599 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24600 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24601 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24602 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24603 : { 8174 /* vblendmpd */, X86::VBLENDMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24604 : { 8174 /* vblendmpd */, X86::VBLENDMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24605 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
24606 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
24607 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
24608 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
24609 : { 8184 /* vblendmps */, X86::VBLENDMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
24610 : { 8184 /* vblendmps */, X86::VBLENDMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
24611 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24612 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24613 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24614 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24615 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24616 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24617 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24618 : { 8184 /* vblendmps */, X86::VBLENDMPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24619 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24620 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
24621 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
24622 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24623 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
24624 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
24625 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24626 : { 8184 /* vblendmps */, X86::VBLENDMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
24627 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
24628 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24629 : { 8184 /* vblendmps */, X86::VBLENDMPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24630 : { 8184 /* vblendmps */, X86::VBLENDMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24631 : { 8184 /* vblendmps */, X86::VBLENDMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24632 : { 8194 /* vblendpd */, X86::VBLENDPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24633 : { 8194 /* vblendpd */, X86::VBLENDPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24634 : { 8194 /* vblendpd */, X86::VBLENDPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24635 : { 8194 /* vblendpd */, X86::VBLENDPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24636 : { 8203 /* vblendps */, X86::VBLENDPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24637 : { 8203 /* vblendps */, X86::VBLENDPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24638 : { 8203 /* vblendps */, X86::VBLENDPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24639 : { 8203 /* vblendps */, X86::VBLENDPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24640 : { 8212 /* vblendvpd */, X86::VBLENDVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24641 : { 8212 /* vblendvpd */, X86::VBLENDVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
24642 : { 8212 /* vblendvpd */, X86::VBLENDVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24643 : { 8212 /* vblendvpd */, X86::VBLENDVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
24644 : { 8222 /* vblendvps */, X86::VBLENDVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24645 : { 8222 /* vblendvps */, X86::VBLENDVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
24646 : { 8222 /* vblendvps */, X86::VBLENDVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24647 : { 8222 /* vblendvps */, X86::VBLENDVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
24648 : { 8232 /* vbroadcastf128 */, X86::VBROADCASTF128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24649 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24650 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
24651 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24652 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
24653 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24654 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24655 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24656 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24657 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24658 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24659 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24660 : { 8247 /* vbroadcastf32x2 */, X86::VBROADCASTF32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24661 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24662 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24663 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24664 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24665 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24666 : { 8263 /* vbroadcastf32x4 */, X86::VBROADCASTF32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24667 : { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24668 : { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24669 : { 8279 /* vbroadcastf32x8 */, X86::VBROADCASTF32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24670 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24671 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24672 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24673 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24674 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24675 : { 8295 /* vbroadcastf64x2 */, X86::VBROADCASTF64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24676 : { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24677 : { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24678 : { 8311 /* vbroadcastf64x4 */, X86::VBROADCASTF64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24679 : { 8327 /* vbroadcasti128 */, X86::VBROADCASTI128, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24680 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24681 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128m, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24682 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24683 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
24684 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24685 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
24686 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24687 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24688 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24689 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24690 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24691 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24692 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24693 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24694 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24695 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Z256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24696 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24697 : { 8342 /* vbroadcasti32x2 */, X86::VBROADCASTI32X2Zmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24698 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24699 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24700 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24701 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24702 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4Z256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24703 : { 8358 /* vbroadcasti32x4 */, X86::VBROADCASTI32X4rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24704 : { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24705 : { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24706 : { 8374 /* vbroadcasti32x8 */, X86::VBROADCASTI32X8rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24707 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24708 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
24709 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24710 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24711 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24712 : { 8390 /* vbroadcasti64x2 */, X86::VBROADCASTI64X2rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24713 : { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24714 : { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24715 : { 8406 /* vbroadcasti64x4 */, X86::VBROADCASTI64X4rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24716 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24717 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
24718 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24719 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
24720 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24721 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
24722 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24723 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24724 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24725 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24726 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24727 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24728 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24729 : { 8422 /* vbroadcastsd */, X86::VBROADCASTSDZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24730 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24731 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24732 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24733 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
24734 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24735 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128m, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
24736 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24737 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256m, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
24738 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
24739 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32 }, },
24740 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24741 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24742 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24743 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24744 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24745 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
24746 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24747 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24748 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24749 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24750 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24751 : { 8435 /* vbroadcastss */, X86::VBROADCASTSSZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
24752 : { 8448 /* vcmp */, X86::VCMPPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24753 : { 8448 /* vcmp */, X86::VCMPPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
24754 : { 8448 /* vcmp */, X86::VCMPPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
24755 : { 8448 /* vcmp */, X86::VCMPPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
24756 : { 8448 /* vcmp */, X86::VCMPPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512 }, },
24757 : { 8448 /* vcmp */, X86::VCMPPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
24758 : { 8448 /* vcmp */, X86::VCMPPDrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24759 : { 8448 /* vcmp */, X86::VCMPPDrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24760 : { 8448 /* vcmp */, X86::VCMPPDYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24761 : { 8448 /* vcmp */, X86::VCMPPDYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24762 : { 8448 /* vcmp */, X86::VCMPPSZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24763 : { 8448 /* vcmp */, X86::VCMPPSZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
24764 : { 8448 /* vcmp */, X86::VCMPPSZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
24765 : { 8448 /* vcmp */, X86::VCMPPSZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
24766 : { 8448 /* vcmp */, X86::VCMPPSZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512 }, },
24767 : { 8448 /* vcmp */, X86::VCMPPSZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
24768 : { 8448 /* vcmp */, X86::VCMPPSrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24769 : { 8448 /* vcmp */, X86::VCMPPSrmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
24770 : { 8448 /* vcmp */, X86::VCMPPSYrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_VR256 }, },
24771 : { 8448 /* vcmp */, X86::VCMPPSYrmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
24772 : { 8448 /* vcmp */, X86::VCMPSDZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24773 : { 8448 /* vcmp */, X86::VCMPSDZrm_Int, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_Mem64 }, },
24774 : { 8448 /* vcmp */, X86::VCMPSDrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24775 : { 8448 /* vcmp */, X86::VCMPSDrm, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
24776 : { 8448 /* vcmp */, X86::VCMPSSZrr_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
24777 : { 8448 /* vcmp */, X86::VCMPSSZrm_Int, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_Mem32 }, },
24778 : { 8448 /* vcmp */, X86::VCMPSSrr, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_FR32 }, },
24779 : { 8448 /* vcmp */, X86::VCMPSSrm, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
24780 : { 8448 /* vcmp */, X86::VCMPPDZ128rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24781 : { 8448 /* vcmp */, X86::VCMPPDZ256rmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24782 : { 8448 /* vcmp */, X86::VCMPPDZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24783 : { 8448 /* vcmp */, X86::VCMPPDZrmbi, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24784 : { 8448 /* vcmp */, X86::VCMPPSZ128rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24785 : { 8448 /* vcmp */, X86::VCMPPSZ256rmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24786 : { 8448 /* vcmp */, X86::VCMPPSZrrib, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24787 : { 8448 /* vcmp */, X86::VCMPPSZrmbi, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24788 : { 8448 /* vcmp */, X86::VCMPSDZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24789 : { 8448 /* vcmp */, X86::VCMPSSZrrb_Int, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24790 : { 8448 /* vcmp */, X86::VCMPPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24791 : { 8448 /* vcmp */, X86::VCMPPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24792 : { 8448 /* vcmp */, X86::VCMPPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24793 : { 8448 /* vcmp */, X86::VCMPPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24794 : { 8448 /* vcmp */, X86::VCMPPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24795 : { 8448 /* vcmp */, X86::VCMPPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24796 : { 8448 /* vcmp */, X86::VCMPPSZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24797 : { 8448 /* vcmp */, X86::VCMPPSZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
24798 : { 8448 /* vcmp */, X86::VCMPPSZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
24799 : { 8448 /* vcmp */, X86::VCMPPSZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
24800 : { 8448 /* vcmp */, X86::VCMPPSZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
24801 : { 8448 /* vcmp */, X86::VCMPPSZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
24802 : { 8448 /* vcmp */, X86::VCMPSDZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24803 : { 8448 /* vcmp */, X86::VCMPSDZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
24804 : { 8448 /* vcmp */, X86::VCMPSSZrr_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
24805 : { 8448 /* vcmp */, X86::VCMPSSZrm_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
24806 : { 8448 /* vcmp */, X86::VCMPPDZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24807 : { 8448 /* vcmp */, X86::VCMPPDZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
24808 : { 8448 /* vcmp */, X86::VCMPPDZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24809 : { 8448 /* vcmp */, X86::VCMPPDZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_pd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
24810 : { 8448 /* vcmp */, X86::VCMPPSZ128rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24811 : { 8448 /* vcmp */, X86::VCMPPSZ256rmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24812 : { 8448 /* vcmp */, X86::VCMPPSZrribk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
24813 : { 8448 /* vcmp */, X86::VCMPPSZrmbik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ps, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24814 : { 8448 /* vcmp */, X86::VCMPSDZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_sd, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24815 : { 8448 /* vcmp */, X86::VCMPSSZrrb_Intk, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ss, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24816 : { 8453 /* vcmppd */, X86::VCMPPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24817 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24818 : { 8453 /* vcmppd */, X86::VCMPPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24819 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24820 : { 8453 /* vcmppd */, X86::VCMPPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24821 : { 8453 /* vcmppd */, X86::VCMPPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24822 : { 8453 /* vcmppd */, X86::VCMPPDrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24823 : { 8453 /* vcmppd */, X86::VCMPPDrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24824 : { 8453 /* vcmppd */, X86::VCMPPDYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24825 : { 8453 /* vcmppd */, X86::VCMPPDYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24826 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24827 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24828 : { 8453 /* vcmppd */, X86::VCMPPDZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24829 : { 8453 /* vcmppd */, X86::VCMPPDZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24830 : { 8453 /* vcmppd */, X86::VCMPPDZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24831 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24832 : { 8453 /* vcmppd */, X86::VCMPPDZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24833 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24834 : { 8453 /* vcmppd */, X86::VCMPPDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24835 : { 8453 /* vcmppd */, X86::VCMPPDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24836 : { 8453 /* vcmppd */, X86::VCMPPDZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
24837 : { 8453 /* vcmppd */, X86::VCMPPDZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24838 : { 8453 /* vcmppd */, X86::VCMPPDZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24839 : { 8453 /* vcmppd */, X86::VCMPPDZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24840 : { 8460 /* vcmpps */, X86::VCMPPSZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24841 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24842 : { 8460 /* vcmpps */, X86::VCMPPSZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24843 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24844 : { 8460 /* vcmpps */, X86::VCMPPSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24845 : { 8460 /* vcmpps */, X86::VCMPPSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24846 : { 8460 /* vcmpps */, X86::VCMPPSrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24847 : { 8460 /* vcmpps */, X86::VCMPPSrmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24848 : { 8460 /* vcmpps */, X86::VCMPPSYrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
24849 : { 8460 /* vcmpps */, X86::VCMPPSYrmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24850 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24851 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24852 : { 8460 /* vcmpps */, X86::VCMPPSZrrib_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24853 : { 8460 /* vcmpps */, X86::VCMPPSZrmbi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24854 : { 8460 /* vcmpps */, X86::VCMPPSZ128rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24855 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
24856 : { 8460 /* vcmpps */, X86::VCMPPSZ256rri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
24857 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
24858 : { 8460 /* vcmpps */, X86::VCMPPSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
24859 : { 8460 /* vcmpps */, X86::VCMPPSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
24860 : { 8460 /* vcmpps */, X86::VCMPPSZ128rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
24861 : { 8460 /* vcmpps */, X86::VCMPPSZ256rmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
24862 : { 8460 /* vcmpps */, X86::VCMPPSZrrib_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24863 : { 8460 /* vcmpps */, X86::VCMPPSZrmbi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
24864 : { 8467 /* vcmpsd */, X86::VCMPSDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24865 : { 8467 /* vcmpsd */, X86::VCMPSDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24866 : { 8467 /* vcmpsd */, X86::VCMPSDrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24867 : { 8467 /* vcmpsd */, X86::VCMPSDrm_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24868 : { 8467 /* vcmpsd */, X86::VCMPSDZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24869 : { 8467 /* vcmpsd */, X86::VCMPSDZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24870 : { 8467 /* vcmpsd */, X86::VCMPSDZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
24871 : { 8467 /* vcmpsd */, X86::VCMPSDZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24872 : { 8474 /* vcmpss */, X86::VCMPSSZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24873 : { 8474 /* vcmpss */, X86::VCMPSSZrmi_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24874 : { 8474 /* vcmpss */, X86::VCMPSSrr_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
24875 : { 8474 /* vcmpss */, X86::VCMPSSrm_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24876 : { 8474 /* vcmpss */, X86::VCMPSSZrrb_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24877 : { 8474 /* vcmpss */, X86::VCMPSSZrri_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
24878 : { 8474 /* vcmpss */, X86::VCMPSSZrmi_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
24879 : { 8474 /* vcmpss */, X86::VCMPSSZrrb_altk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
24880 : { 8481 /* vcomisd */, X86::VCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24881 : { 8481 /* vcomisd */, X86::VCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24882 : { 8481 /* vcomisd */, X86::VCOMISDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24883 : { 8481 /* vcomisd */, X86::VCOMISDZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24884 : { 8481 /* vcomisd */, X86::VCOMISDZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24885 : { 8489 /* vcomiss */, X86::VCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24886 : { 8489 /* vcomiss */, X86::VCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
24887 : { 8489 /* vcomiss */, X86::VCOMISSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24888 : { 8489 /* vcomiss */, X86::VCOMISSZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
24889 : { 8489 /* vcomiss */, X86::VCOMISSZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
24890 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24891 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24892 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24893 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
24894 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
24895 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
24896 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24897 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24898 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24899 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24900 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24901 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24902 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24903 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24904 : { 8497 /* vcompresspd */, X86::VCOMPRESSPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24905 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24906 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24907 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24908 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
24909 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
24910 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
24911 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24912 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24913 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24914 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24915 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24916 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24917 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24918 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24919 : { 8509 /* vcompressps */, X86::VCOMPRESSPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24920 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24921 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
24922 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
24923 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
24924 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24925 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
24926 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
24927 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
24928 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
24929 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
24930 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
24931 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
24932 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
24933 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24934 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
24935 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24936 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24937 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24938 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24939 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24940 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
24941 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24942 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24943 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24944 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24945 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24946 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24947 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24948 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
24949 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24950 : { 8521 /* vcvtdq2pd */, X86::VCVTDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24951 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24952 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24953 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
24954 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
24955 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24956 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24957 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
24958 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
24959 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
24960 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
24961 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
24962 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
24963 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
24964 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
24965 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
24966 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
24967 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
24968 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
24969 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
24970 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
24971 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
24972 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
24973 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24974 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
24975 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
24976 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24977 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
24978 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
24979 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
24980 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24981 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
24982 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
24983 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
24984 : { 8531 /* vcvtdq2ps */, X86::VCVTDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
24985 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
24986 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
24987 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
24988 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
24989 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
24990 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
24991 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
24992 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
24993 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
24994 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
24995 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
24996 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
24997 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
24998 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
24999 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25000 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25001 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25002 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25003 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25004 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25005 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25006 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25007 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25008 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25009 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25010 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25011 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25012 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25013 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25014 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25015 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25016 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25017 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25018 : { 8541 /* vcvtpd2dq */, X86::VCVTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25019 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25020 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25021 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25022 : { 8551 /* vcvtpd2dqx */, X86::VCVTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25023 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25024 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25025 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25026 : { 8562 /* vcvtpd2dqy */, X86::VCVTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25027 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25028 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25029 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25030 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25031 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25032 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25033 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25034 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25035 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25036 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25037 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25038 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25039 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25040 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25041 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25042 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25043 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25044 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25045 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25046 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25047 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25048 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25049 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25050 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25051 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25052 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25053 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25054 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25055 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25056 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25057 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25058 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25059 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25060 : { 8573 /* vcvtpd2ps */, X86::VCVTPD2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25061 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25062 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25063 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25064 : { 8583 /* vcvtpd2psx */, X86::VCVTPD2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25065 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25066 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25067 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25068 : { 8594 /* vcvtpd2psy */, X86::VCVTPD2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25069 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25070 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25071 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25072 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25073 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25074 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25075 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25076 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25077 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25078 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25079 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25080 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25081 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25082 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25083 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25084 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25085 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25086 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25087 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25088 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25089 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25090 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25091 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25092 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25093 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25094 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25095 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25096 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25097 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25098 : { 8605 /* vcvtpd2qq */, X86::VCVTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25099 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25100 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25101 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25102 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25103 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25104 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25105 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25106 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25107 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25108 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25109 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25110 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25111 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25112 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25113 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25114 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25115 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25116 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25117 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25118 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25119 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25120 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25121 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25122 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25123 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25124 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25125 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25126 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25127 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25128 : { 8615 /* vcvtpd2udq */, X86::VCVTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25129 : { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25130 : { 8626 /* vcvtpd2udqx */, X86::VCVTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25131 : { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25132 : { 8638 /* vcvtpd2udqy */, X86::VCVTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25133 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25134 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25135 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25136 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25137 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25138 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25139 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25140 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25141 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25142 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25143 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25144 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25145 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25146 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25147 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25148 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25149 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25150 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25151 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25152 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25153 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25154 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25155 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25156 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25157 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25158 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25159 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25160 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25161 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25162 : { 8650 /* vcvtpd2uqq */, X86::VCVTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25163 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25164 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
25165 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
25166 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
25167 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25168 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25169 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25170 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25171 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25172 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25173 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25174 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25175 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25176 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25177 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25178 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25179 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25180 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25181 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25182 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25183 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25184 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25185 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25186 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25187 : { 8661 /* vcvtph2ps */, X86::VCVTPH2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25188 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25189 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25190 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
25191 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
25192 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25193 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25194 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25195 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25196 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25197 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25198 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25199 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25200 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25201 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25202 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25203 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25204 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25205 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25206 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25207 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25208 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25209 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25210 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25211 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25212 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25213 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25214 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25215 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25216 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25217 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25218 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25219 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25220 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25221 : { 8671 /* vcvtps2dq */, X86::VCVTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25222 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25223 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
25224 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
25225 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
25226 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25227 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25228 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25229 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25230 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25231 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25232 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25233 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25234 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25235 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25236 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25237 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25238 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25239 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25240 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25241 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25242 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25243 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25244 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25245 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25246 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25247 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25248 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25249 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25250 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25251 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25252 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25253 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25254 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25255 : { 8681 /* vcvtps2pd */, X86::VCVTPS2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25256 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
25257 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
25258 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25259 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25260 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
25261 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHYmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
25262 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25263 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
25264 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
25265 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25266 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrb, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25267 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25268 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25269 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25270 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25271 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25272 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25273 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25274 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25275 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
25276 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25277 : { 8691 /* vcvtps2ph */, X86::VCVTPS2PHZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
25278 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25279 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25280 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25281 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25282 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25283 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25284 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25285 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25286 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
25287 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25288 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25289 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25290 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25291 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25292 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25293 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25294 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25295 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25296 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25297 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25298 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25299 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25300 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25301 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25302 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
25303 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25304 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25305 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25306 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
25307 : { 8701 /* vcvtps2qq */, X86::VCVTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25308 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25309 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25310 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25311 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25312 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25313 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25314 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25315 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25316 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25317 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25318 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25319 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25320 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25321 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25322 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25323 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25324 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25325 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25326 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25327 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25328 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25329 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25330 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25331 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25332 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25333 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25334 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25335 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25336 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25337 : { 8711 /* vcvtps2udq */, X86::VCVTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25338 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25339 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25340 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25341 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25342 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25343 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25344 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25345 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25346 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR256X, MCK_AVX512RC }, },
25347 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25348 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25349 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25350 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25351 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25352 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25353 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25354 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25355 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25356 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25357 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25358 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25359 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25360 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25361 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25362 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_AVX512RC }, },
25363 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25364 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25365 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25366 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_AVX512RC }, },
25367 : { 8722 /* vcvtps2uqq */, X86::VCVTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25368 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25369 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25370 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25371 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25372 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25373 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25374 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25375 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25376 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25377 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25378 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25379 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25380 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25381 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25382 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25383 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25384 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25385 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25386 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25387 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25388 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25389 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25390 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25391 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25392 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25393 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25394 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25395 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25396 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25397 : { 8733 /* vcvtqq2pd */, X86::VCVTQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25398 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25399 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25400 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25401 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25402 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25403 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25404 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25405 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25406 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25407 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25408 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25409 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25410 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25411 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25412 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25413 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25414 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25415 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25416 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25417 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25418 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25419 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25420 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25421 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25422 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25423 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25424 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25425 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25426 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25427 : { 8743 /* vcvtqq2ps */, X86::VCVTQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25428 : { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25429 : { 8753 /* vcvtqq2psx */, X86::VCVTQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25430 : { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25431 : { 8764 /* vcvtqq2psy */, X86::VCVTQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25432 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25433 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25434 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25435 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25436 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25437 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64rm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25438 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25439 : { 8775 /* vcvtsd2si */, X86::VCVTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25440 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25441 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25442 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25443 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25444 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25445 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25446 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
25447 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25448 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
25449 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25450 : { 8807 /* vcvtsd2ss */, X86::VCVTSD2SSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
25451 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25452 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25453 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25454 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25455 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25456 : { 8817 /* vcvtsd2usi */, X86::VCVTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25457 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
25458 : { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
25459 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25460 : { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25461 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25462 : { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25463 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25464 : { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25465 : { 8852 /* vcvtsi2sd */, X86::VCVTSI2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25466 : { 8852 /* vcvtsi2sd */, X86::VCVTSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25467 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR32 }, },
25468 : { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_GR64 }, },
25469 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25470 : { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
25471 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25472 : { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25473 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25474 : { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25475 : { 8884 /* vcvtsi2ss */, X86::VCVTSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25476 : { 8884 /* vcvtsi2ss */, X86::VCVTSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25477 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25478 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
25479 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25480 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25481 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25482 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25483 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
25484 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25485 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
25486 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25487 : { 8916 /* vcvtss2sd */, X86::VCVTSS2SDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
25488 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25489 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25490 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25491 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25492 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25493 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64rm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25494 : { 8926 /* vcvtss2si */, X86::VCVTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25495 : { 8926 /* vcvtss2si */, X86::VCVTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25496 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25497 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25498 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25499 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25500 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR32, MCK_FR32X, MCK_AVX512RC }, },
25501 : { 8958 /* vcvtss2usi */, X86::VCVTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_GR64, MCK_FR32X, MCK_AVX512RC }, },
25502 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25503 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25504 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25505 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25506 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25507 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25508 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25509 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25510 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25511 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25512 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25513 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25514 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
25515 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25516 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25517 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25518 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25519 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25520 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25521 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25522 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25523 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25524 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25525 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25526 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25527 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25528 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25529 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25530 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25531 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25532 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25533 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25534 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25535 : { 8993 /* vcvttpd2dq */, X86::VCVTTPD2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25536 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25537 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25538 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25539 : { 9004 /* vcvttpd2dqx */, X86::VCVTTPD2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25540 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_VR256 }, },
25541 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32, MCK_Mem256 }, },
25542 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25543 : { 9016 /* vcvttpd2dqy */, X86::VCVTTPD2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25544 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25545 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25546 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25547 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25548 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25549 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25550 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25551 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25552 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25553 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25554 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25555 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25556 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25557 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25558 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25559 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25560 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25561 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25562 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25563 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25564 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25565 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25566 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25567 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25568 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25569 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25570 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25571 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25572 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25573 : { 9028 /* vcvttpd2qq */, X86::VCVTTPD2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25574 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25575 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25576 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25577 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25578 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25579 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25580 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25581 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25582 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512, MCK__123_sae_125_ }, },
25583 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25584 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25585 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25586 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25587 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25588 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25589 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25590 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25591 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25592 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25593 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25594 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25595 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25596 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25597 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25598 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25599 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25600 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25601 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25602 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25603 : { 9039 /* vcvttpd2udq */, X86::VCVTTPD2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25604 : { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25605 : { 9051 /* vcvttpd2udqx */, X86::VCVTTPD2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25606 : { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25607 : { 9064 /* vcvttpd2udqy */, X86::VCVTTPD2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25608 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25609 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25610 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25611 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25612 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25613 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25614 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25615 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25616 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25617 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25618 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25619 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25620 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25621 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25622 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25623 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25624 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25625 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25626 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25627 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25628 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25629 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25630 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25631 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25632 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25633 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25634 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25635 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25636 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25637 : { 9077 /* vcvttpd2uqq */, X86::VCVTTPD2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25638 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
25639 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
25640 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
25641 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
25642 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25643 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25644 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25645 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25646 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25647 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25648 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25649 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25650 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25651 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25652 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25653 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25654 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25655 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25656 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25657 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25658 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25659 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25660 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25661 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25662 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25663 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25664 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25665 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25666 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25667 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25668 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25669 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25670 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25671 : { 9089 /* vcvttps2dq */, X86::VCVTTPS2DQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25672 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25673 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25674 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25675 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25676 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25677 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25678 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25679 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25680 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25681 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25682 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25683 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25684 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25685 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25686 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25687 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25688 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25689 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25690 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25691 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25692 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25693 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25694 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25695 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25696 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25697 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25698 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25699 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25700 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25701 : { 9100 /* vcvttps2qq */, X86::VCVTTPS2QQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25702 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25703 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25704 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25705 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25706 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25707 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25708 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25709 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25710 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
25711 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25712 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25713 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25714 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25715 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25716 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25717 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25718 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25719 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25720 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25721 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25722 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25723 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25724 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25725 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25726 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
25727 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25728 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25729 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25730 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
25731 : { 9111 /* vcvttps2udq */, X86::VCVTTPS2UDQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25732 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25733 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25734 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25735 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25736 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25737 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25738 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25739 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25740 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X, MCK__123_sae_125_ }, },
25741 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25742 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25743 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25744 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25745 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25746 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25747 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25748 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25749 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25750 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25751 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25752 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25753 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25754 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25755 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25756 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK__123_sae_125_ }, },
25757 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25758 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25759 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25760 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK__123_sae_125_ }, },
25761 : { 9123 /* vcvttps2uqq */, X86::VCVTTPS2UQQZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25762 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25763 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25764 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25765 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25766 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25767 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64rm, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25768 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25769 : { 9135 /* vcvttsd2si */, X86::VCVTTSD2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25770 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25771 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR32, MCK_Mem64 }, },
25772 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25773 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrm_Int, Convert__Reg1_0__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
25774 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25775 : { 9170 /* vcvttsd2usi */, X86::VCVTTSD2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25776 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
25777 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25778 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25779 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
25780 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25781 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64rm, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25782 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25783 : { 9208 /* vcvttss2si */, X86::VCVTTSS2SI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25784 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
25785 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
25786 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrr_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
25787 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrm_Int, Convert__Reg1_0__Mem325_1, 0, { MCK_GR64, MCK_Mem32 }, },
25788 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USIZrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X, MCK__123_sae_125_ }, },
25789 : { 9243 /* vcvttss2usi */, X86::VCVTTSS2USI64Zrrb_Int, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X, MCK__123_sae_125_ }, },
25790 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25791 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
25792 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
25793 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
25794 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
25795 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
25796 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to2_125_ }, },
25797 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to4_125_ }, },
25798 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to8_125_ }, },
25799 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25800 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
25801 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25802 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25803 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25804 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25805 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25806 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
25807 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25808 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25809 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25810 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25811 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25812 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25813 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25814 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to2_125_ }, },
25815 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25816 : { 9281 /* vcvtudq2pd */, X86::VCVTUDQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25817 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25818 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25819 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25820 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25821 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25822 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25823 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25824 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25825 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25826 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25827 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25828 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25829 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25830 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25831 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25832 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25833 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25834 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25835 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25836 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25837 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25838 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25839 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25840 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25841 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25842 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25843 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
25844 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
25845 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25846 : { 9292 /* vcvtudq2ps */, X86::VCVTUDQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
25847 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25848 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25849 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
25850 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
25851 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
25852 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
25853 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25854 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25855 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25856 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25857 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25858 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25859 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25860 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25861 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25862 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25863 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25864 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25865 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25866 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25867 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25868 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25869 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25870 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25871 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25872 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25873 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25874 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25875 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25876 : { 9303 /* vcvtuqq2pd */, X86::VCVTUQQ2PDZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25877 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25878 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25879 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25880 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25881 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
25882 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR256X, MCK_Mem512 }, },
25883 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25884 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to4_125_ }, },
25885 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR256X, MCK_VR512, MCK_AVX512RC }, },
25886 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to8_125_ }, },
25887 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
25888 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
25889 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
25890 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
25891 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
25892 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
25893 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
25894 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
25895 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
25896 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
25897 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25898 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25899 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
25900 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
25901 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
25902 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25903 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
25904 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
25905 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
25906 : { 9314 /* vcvtuqq2ps */, X86::VCVTUQQ2PSZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
25907 : { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
25908 : { 9325 /* vcvtuqq2psx */, X86::VCVTUQQ2PSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
25909 : { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
25910 : { 9337 /* vcvtuqq2psy */, X86::VCVTUQQ2PSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_FR32X, MCK_Mem256 }, },
25911 : { 9349 /* vcvtusi2sd */, X86::VCVTUSI2SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25912 : { 9349 /* vcvtusi2sd */, X86::VCVTUSI642SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25913 : { 9349 /* vcvtusi2sd */, X86::VCVTUSI2SDZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25914 : { 9349 /* vcvtusi2sd */, X86::VCVTUSI642SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25915 : { 9349 /* vcvtusi2sd */, X86::VCVTUSI642SDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25916 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32 }, },
25917 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI642SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64 }, },
25918 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
25919 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI642SSZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
25920 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI2SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR32 }, },
25921 : { 9384 /* vcvtusi2ss */, X86::VCVTUSI642SSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_3__AVX512RC1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_AVX512RC, MCK_GR64 }, },
25922 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25923 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25924 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25925 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25926 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25927 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25928 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25929 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25930 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25931 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25932 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25933 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25934 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
25935 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
25936 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
25937 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
25938 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
25939 : { 9419 /* vdbpsadbw */, X86::VDBPSADBWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
25940 : { 9429 /* vdivpd */, X86::VDIVPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25941 : { 9429 /* vdivpd */, X86::VDIVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25942 : { 9429 /* vdivpd */, X86::VDIVPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25943 : { 9429 /* vdivpd */, X86::VDIVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25944 : { 9429 /* vdivpd */, X86::VDIVPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25945 : { 9429 /* vdivpd */, X86::VDIVPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25946 : { 9429 /* vdivpd */, X86::VDIVPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25947 : { 9429 /* vdivpd */, X86::VDIVPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25948 : { 9429 /* vdivpd */, X86::VDIVPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25949 : { 9429 /* vdivpd */, X86::VDIVPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25950 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25951 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25952 : { 9429 /* vdivpd */, X86::VDIVPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25953 : { 9429 /* vdivpd */, X86::VDIVPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25954 : { 9429 /* vdivpd */, X86::VDIVPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25955 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25956 : { 9429 /* vdivpd */, X86::VDIVPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25957 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25958 : { 9429 /* vdivpd */, X86::VDIVPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25959 : { 9429 /* vdivpd */, X86::VDIVPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25960 : { 9429 /* vdivpd */, X86::VDIVPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25961 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25962 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25963 : { 9429 /* vdivpd */, X86::VDIVPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25964 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25965 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25966 : { 9429 /* vdivpd */, X86::VDIVPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
25967 : { 9429 /* vdivpd */, X86::VDIVPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
25968 : { 9429 /* vdivpd */, X86::VDIVPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25969 : { 9429 /* vdivpd */, X86::VDIVPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25970 : { 9429 /* vdivpd */, X86::VDIVPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
25971 : { 9429 /* vdivpd */, X86::VDIVPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
25972 : { 9429 /* vdivpd */, X86::VDIVPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25973 : { 9429 /* vdivpd */, X86::VDIVPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
25974 : { 9436 /* vdivps */, X86::VDIVPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
25975 : { 9436 /* vdivps */, X86::VDIVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
25976 : { 9436 /* vdivps */, X86::VDIVPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
25977 : { 9436 /* vdivps */, X86::VDIVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
25978 : { 9436 /* vdivps */, X86::VDIVPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
25979 : { 9436 /* vdivps */, X86::VDIVPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
25980 : { 9436 /* vdivps */, X86::VDIVPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
25981 : { 9436 /* vdivps */, X86::VDIVPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
25982 : { 9436 /* vdivps */, X86::VDIVPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
25983 : { 9436 /* vdivps */, X86::VDIVPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
25984 : { 9436 /* vdivps */, X86::VDIVPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25985 : { 9436 /* vdivps */, X86::VDIVPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
25986 : { 9436 /* vdivps */, X86::VDIVPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
25987 : { 9436 /* vdivps */, X86::VDIVPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
25988 : { 9436 /* vdivps */, X86::VDIVPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
25989 : { 9436 /* vdivps */, X86::VDIVPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
25990 : { 9436 /* vdivps */, X86::VDIVPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
25991 : { 9436 /* vdivps */, X86::VDIVPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
25992 : { 9436 /* vdivps */, X86::VDIVPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
25993 : { 9436 /* vdivps */, X86::VDIVPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
25994 : { 9436 /* vdivps */, X86::VDIVPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
25995 : { 9436 /* vdivps */, X86::VDIVPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
25996 : { 9436 /* vdivps */, X86::VDIVPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
25997 : { 9436 /* vdivps */, X86::VDIVPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
25998 : { 9436 /* vdivps */, X86::VDIVPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
25999 : { 9436 /* vdivps */, X86::VDIVPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26000 : { 9436 /* vdivps */, X86::VDIVPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26001 : { 9436 /* vdivps */, X86::VDIVPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26002 : { 9436 /* vdivps */, X86::VDIVPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26003 : { 9436 /* vdivps */, X86::VDIVPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26004 : { 9436 /* vdivps */, X86::VDIVPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26005 : { 9436 /* vdivps */, X86::VDIVPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26006 : { 9436 /* vdivps */, X86::VDIVPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26007 : { 9436 /* vdivps */, X86::VDIVPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26008 : { 9443 /* vdivsd */, X86::VDIVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26009 : { 9443 /* vdivsd */, X86::VDIVSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26010 : { 9443 /* vdivsd */, X86::VDIVSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26011 : { 9443 /* vdivsd */, X86::VDIVSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26012 : { 9443 /* vdivsd */, X86::VDIVSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26013 : { 9443 /* vdivsd */, X86::VDIVSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26014 : { 9443 /* vdivsd */, X86::VDIVSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26015 : { 9443 /* vdivsd */, X86::VDIVSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26016 : { 9443 /* vdivsd */, X86::VDIVSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26017 : { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26018 : { 9443 /* vdivsd */, X86::VDIVSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26019 : { 9450 /* vdivss */, X86::VDIVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26020 : { 9450 /* vdivss */, X86::VDIVSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26021 : { 9450 /* vdivss */, X86::VDIVSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26022 : { 9450 /* vdivss */, X86::VDIVSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26023 : { 9450 /* vdivss */, X86::VDIVSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26024 : { 9450 /* vdivss */, X86::VDIVSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26025 : { 9450 /* vdivss */, X86::VDIVSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26026 : { 9450 /* vdivss */, X86::VDIVSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26027 : { 9450 /* vdivss */, X86::VDIVSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26028 : { 9450 /* vdivss */, X86::VDIVSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26029 : { 9450 /* vdivss */, X86::VDIVSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26030 : { 9457 /* vdppd */, X86::VDPPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26031 : { 9457 /* vdppd */, X86::VDPPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26032 : { 9463 /* vdpps */, X86::VDPPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26033 : { 9463 /* vdpps */, X86::VDPPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26034 : { 9463 /* vdpps */, X86::VDPPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
26035 : { 9463 /* vdpps */, X86::VDPPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26036 : { 9469 /* verr */, X86::VERRr, Convert__Reg1_0, 0, { MCK_GR16 }, },
26037 : { 9469 /* verr */, X86::VERRm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
26038 : { 9474 /* verw */, X86::VERWr, Convert__Reg1_0, 0, { MCK_GR16 }, },
26039 : { 9474 /* verw */, X86::VERWm, Convert__Mem165_0, 0, { MCK_Mem16 }, },
26040 : { 9479 /* vexp2pd */, X86::VEXP2PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
26041 : { 9479 /* vexp2pd */, X86::VEXP2PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
26042 : { 9479 /* vexp2pd */, X86::VEXP2PDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26043 : { 9479 /* vexp2pd */, X86::VEXP2PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26044 : { 9479 /* vexp2pd */, X86::VEXP2PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26045 : { 9479 /* vexp2pd */, X86::VEXP2PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26046 : { 9479 /* vexp2pd */, X86::VEXP2PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26047 : { 9479 /* vexp2pd */, X86::VEXP2PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26048 : { 9479 /* vexp2pd */, X86::VEXP2PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26049 : { 9479 /* vexp2pd */, X86::VEXP2PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26050 : { 9479 /* vexp2pd */, X86::VEXP2PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26051 : { 9479 /* vexp2pd */, X86::VEXP2PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
26052 : { 9487 /* vexp2ps */, X86::VEXP2PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
26053 : { 9487 /* vexp2ps */, X86::VEXP2PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
26054 : { 9487 /* vexp2ps */, X86::VEXP2PSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
26055 : { 9487 /* vexp2ps */, X86::VEXP2PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26056 : { 9487 /* vexp2ps */, X86::VEXP2PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26057 : { 9487 /* vexp2ps */, X86::VEXP2PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26058 : { 9487 /* vexp2ps */, X86::VEXP2PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26059 : { 9487 /* vexp2ps */, X86::VEXP2PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26060 : { 9487 /* vexp2ps */, X86::VEXP2PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
26061 : { 9487 /* vexp2ps */, X86::VEXP2PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26062 : { 9487 /* vexp2ps */, X86::VEXP2PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
26063 : { 9487 /* vexp2ps */, X86::VEXP2PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
26064 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
26065 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
26066 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
26067 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
26068 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
26069 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
26070 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26071 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26072 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26073 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26074 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26075 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26076 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26077 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26078 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26079 : { 9495 /* vexpandpd */, X86::VEXPANDPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26080 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26081 : { 9495 /* vexpandpd */, X86::VEXPANDPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26082 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
26083 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
26084 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
26085 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
26086 : { 9505 /* vexpandps */, X86::VEXPANDPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
26087 : { 9505 /* vexpandps */, X86::VEXPANDPSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
26088 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
26089 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
26090 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
26091 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
26092 : { 9505 /* vexpandps */, X86::VEXPANDPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
26093 : { 9505 /* vexpandps */, X86::VEXPANDPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
26094 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
26095 : { 9505 /* vexpandps */, X86::VEXPANDPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
26096 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
26097 : { 9505 /* vexpandps */, X86::VEXPANDPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
26098 : { 9505 /* vexpandps */, X86::VEXPANDPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
26099 : { 9505 /* vexpandps */, X86::VEXPANDPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
26100 : { 9515 /* vextractf128 */, X86::VEXTRACTF128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
26101 : { 9515 /* vextractf128 */, X86::VEXTRACTF128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
26102 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26103 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26104 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26105 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26106 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26107 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26108 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26109 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26110 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26111 : { 9528 /* vextractf32x4 */, X86::VEXTRACTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26112 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26113 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26114 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26115 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26116 : { 9542 /* vextractf32x8 */, X86::VEXTRACTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26117 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26118 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26119 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26120 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26121 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26122 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26123 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26124 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26125 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26126 : { 9556 /* vextractf64x2 */, X86::VEXTRACTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26127 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26128 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26129 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26130 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26131 : { 9570 /* vextractf64x4 */, X86::VEXTRACTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26132 : { 9584 /* vextracti128 */, X86::VEXTRACTI128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_VR256, MCK_ImmUnsignedi8 }, },
26133 : { 9584 /* vextracti128 */, X86::VEXTRACTI128mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256, MCK_ImmUnsignedi8 }, },
26134 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26135 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26136 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26137 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26138 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26139 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26140 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26141 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26142 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26143 : { 9597 /* vextracti32x4 */, X86::VEXTRACTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26144 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26145 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26146 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26147 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26148 : { 9611 /* vextracti32x8 */, X86::VEXTRACTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26149 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26150 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26151 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26152 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmr, Convert__Mem1285_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem128, MCK_VR512, MCK_ImmUnsignedi8 }, },
26153 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26154 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26155 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26156 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zmrk, Convert__Mem1285_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26157 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26158 : { 9625 /* vextracti64x2 */, X86::VEXTRACTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26159 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR512, MCK_ImmUnsignedi8 }, },
26160 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmr, Convert__Mem2565_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem256, MCK_VR512, MCK_ImmUnsignedi8 }, },
26161 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26162 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zmrk, Convert__Mem2565_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26163 : { 9639 /* vextracti64x4 */, X86::VEXTRACTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
26164 : { 9653 /* vextractps */, X86::VEXTRACTPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26165 : { 9653 /* vextractps */, X86::VEXTRACTPSrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
26166 : { 9653 /* vextractps */, X86::VEXTRACTPSmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
26167 : { 9653 /* vextractps */, X86::VEXTRACTPSZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26168 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26169 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26170 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26171 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26172 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26173 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26174 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
26175 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26176 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26177 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26178 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26179 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26180 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26181 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26182 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26183 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26184 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26185 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26186 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
26187 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26188 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26189 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26190 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26191 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26192 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26193 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26194 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
26195 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26196 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26197 : { 9664 /* vfixupimmpd */, X86::VFIXUPIMMPDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26198 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26199 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26200 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26201 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26202 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26203 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26204 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26205 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26206 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26207 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
26208 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26209 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26210 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26211 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26212 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26213 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26214 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26215 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
26216 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26217 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
26218 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
26219 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26220 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
26221 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
26222 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26223 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
26224 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
26225 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
26226 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26227 : { 9676 /* vfixupimmps */, X86::VFIXUPIMMPSZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
26228 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26229 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
26230 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26231 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26232 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
26233 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26234 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
26235 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26236 : { 9688 /* vfixupimmsd */, X86::VFIXUPIMMSDZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26237 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26238 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
26239 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrib, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26240 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26241 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
26242 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
26243 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
26244 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26245 : { 9700 /* vfixupimmss */, X86::VFIXUPIMMSSZrribkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
26246 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26247 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26248 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26249 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26250 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26251 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26252 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26253 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26254 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26255 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26256 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26257 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26258 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26259 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26260 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26261 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26262 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26263 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26264 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26265 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26266 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26267 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26268 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26269 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26270 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26271 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26272 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26273 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26274 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26275 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26276 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26277 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26278 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26279 : { 9712 /* vfmadd132pd */, X86::VFMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26280 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26281 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26282 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26283 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26284 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26285 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26286 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26287 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26288 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26289 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26290 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26291 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26292 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26293 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26294 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26295 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26296 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26297 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26298 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26299 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26300 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26301 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26302 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26303 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26304 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26305 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26306 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26307 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26308 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26309 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26310 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26311 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26312 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26313 : { 9724 /* vfmadd132ps */, X86::VFMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26314 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26315 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26316 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26317 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26318 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26319 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26320 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26321 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26322 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26323 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26324 : { 9736 /* vfmadd132sd */, X86::VFMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26325 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26326 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26327 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26328 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26329 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26330 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26331 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26332 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26333 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26334 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26335 : { 9748 /* vfmadd132ss */, X86::VFMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26336 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26337 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26338 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26339 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26340 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26341 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26342 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26343 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26344 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26345 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26346 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26347 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26348 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26349 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26350 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26351 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26352 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26353 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26354 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26355 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26356 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26357 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26358 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26359 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26360 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26361 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26362 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26363 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26364 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26365 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26366 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26367 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26368 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26369 : { 9760 /* vfmadd213pd */, X86::VFMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26370 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26371 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26372 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26373 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26374 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26375 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26376 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26377 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26378 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26379 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26380 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26381 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26382 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26383 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26384 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26385 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26386 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26387 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26388 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26389 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26390 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26391 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26392 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26393 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26394 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26395 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26396 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26397 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26398 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26399 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26400 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26401 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26402 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26403 : { 9772 /* vfmadd213ps */, X86::VFMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26404 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26405 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26406 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26407 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26408 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26409 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26410 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26411 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26412 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26413 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26414 : { 9784 /* vfmadd213sd */, X86::VFMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26415 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26416 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26417 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26418 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26419 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26420 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26421 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26422 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26423 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26424 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26425 : { 9796 /* vfmadd213ss */, X86::VFMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26426 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26427 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26428 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26429 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26430 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26431 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26432 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26433 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26434 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26435 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26436 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26437 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26438 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26439 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26440 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26441 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26442 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26443 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26444 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26445 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26446 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26447 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26448 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26449 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26450 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26451 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26452 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26453 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26454 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26455 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26456 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26457 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26458 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26459 : { 9808 /* vfmadd231pd */, X86::VFMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26460 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26461 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26462 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26463 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26464 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26465 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26466 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26467 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26468 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26469 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26470 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26471 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26472 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26473 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26474 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26475 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26476 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26477 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26478 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26479 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26480 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26481 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26482 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26483 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26484 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26485 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26486 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26487 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26488 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26489 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26490 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26491 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26492 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26493 : { 9820 /* vfmadd231ps */, X86::VFMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26494 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26495 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26496 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26497 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26498 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26499 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26500 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26501 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26502 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26503 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26504 : { 9832 /* vfmadd231sd */, X86::VFMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26505 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26506 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26507 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26508 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26509 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26510 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26511 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26512 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26513 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26514 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26515 : { 9844 /* vfmadd231ss */, X86::VFMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26516 : { 9856 /* vfmaddpd */, X86::VFMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26517 : { 9856 /* vfmaddpd */, X86::VFMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26518 : { 9856 /* vfmaddpd */, X86::VFMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26519 : { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26520 : { 9856 /* vfmaddpd */, X86::VFMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26521 : { 9856 /* vfmaddpd */, X86::VFMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26522 : { 9865 /* vfmaddps */, X86::VFMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26523 : { 9865 /* vfmaddps */, X86::VFMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26524 : { 9865 /* vfmaddps */, X86::VFMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26525 : { 9865 /* vfmaddps */, X86::VFMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26526 : { 9865 /* vfmaddps */, X86::VFMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26527 : { 9865 /* vfmaddps */, X86::VFMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26528 : { 9874 /* vfmaddsd */, X86::VFMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26529 : { 9874 /* vfmaddsd */, X86::VFMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26530 : { 9874 /* vfmaddsd */, X86::VFMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
26531 : { 9883 /* vfmaddss */, X86::VFMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26532 : { 9883 /* vfmaddss */, X86::VFMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26533 : { 9883 /* vfmaddss */, X86::VFMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
26534 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26535 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26536 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26537 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26538 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26539 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26540 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26541 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26542 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26543 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26544 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26545 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26546 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26547 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26548 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26549 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26550 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26551 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26552 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26553 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26554 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26555 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26556 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26557 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26558 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26559 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26560 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26561 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26562 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26563 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26564 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26565 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26566 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26567 : { 9892 /* vfmaddsub132pd */, X86::VFMADDSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26568 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26569 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26570 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26571 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26572 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26573 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26574 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26575 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26576 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26577 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26578 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26579 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26580 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26581 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26582 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26583 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26584 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26585 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26586 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26587 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26588 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26589 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26590 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26591 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26592 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26593 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26594 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26595 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26596 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26597 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26598 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26599 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26600 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26601 : { 9907 /* vfmaddsub132ps */, X86::VFMADDSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26602 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26603 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26604 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26605 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26606 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26607 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26608 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26609 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26610 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26611 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26612 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26613 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26614 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26615 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26616 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26617 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26618 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26619 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26620 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26621 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26622 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26623 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26624 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26625 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26626 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26627 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26628 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26629 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26630 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26631 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26632 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26633 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26634 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26635 : { 9922 /* vfmaddsub213pd */, X86::VFMADDSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26636 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26637 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26638 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26639 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26640 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26641 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26642 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26643 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26644 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26645 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26646 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26647 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26648 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26649 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26650 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26651 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26652 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26653 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26654 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26655 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26656 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26657 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26658 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26659 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26660 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26661 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26662 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26663 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26664 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26665 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26666 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26667 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26668 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26669 : { 9937 /* vfmaddsub213ps */, X86::VFMADDSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26670 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26671 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26672 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26673 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26674 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26675 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26676 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26677 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26678 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26679 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26680 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26681 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26682 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26683 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26684 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26685 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26686 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26687 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26688 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26689 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26690 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26691 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26692 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26693 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26694 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26695 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26696 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26697 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26698 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26699 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26700 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26701 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26702 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26703 : { 9952 /* vfmaddsub231pd */, X86::VFMADDSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26704 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26705 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26706 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26707 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26708 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26709 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26710 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26711 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26712 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26713 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26714 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26715 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26716 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26717 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26718 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26719 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26720 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26721 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26722 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26723 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26724 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26725 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26726 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26727 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26728 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26729 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26730 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26731 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26732 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26733 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26734 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26735 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26736 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26737 : { 9967 /* vfmaddsub231ps */, X86::VFMADDSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26738 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26739 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26740 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26741 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26742 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26743 : { 9982 /* vfmaddsubpd */, X86::VFMADDSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26744 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
26745 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26746 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
26747 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
26748 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26749 : { 9994 /* vfmaddsubps */, X86::VFMADDSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
26750 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26751 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26752 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26753 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26754 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26755 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26756 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26757 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26758 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26759 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26760 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26761 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26762 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26763 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26764 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26765 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26766 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26767 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26768 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26769 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26770 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26771 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26772 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26773 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26774 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26775 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26776 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26777 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26778 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26779 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26780 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26781 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26782 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26783 : { 10006 /* vfmsub132pd */, X86::VFMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26784 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26785 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26786 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26787 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26788 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26789 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26790 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26791 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26792 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26793 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26794 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26795 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26796 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26797 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26798 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26799 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26800 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26801 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26802 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26803 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26804 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26805 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26806 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26807 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26808 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26809 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26810 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26811 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26812 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26813 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26814 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26815 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26816 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26817 : { 10018 /* vfmsub132ps */, X86::VFMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26818 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26819 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26820 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26821 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26822 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26823 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26824 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26825 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26826 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26827 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26828 : { 10030 /* vfmsub132sd */, X86::VFMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26829 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26830 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26831 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26832 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26833 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26834 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26835 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26836 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26837 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26838 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26839 : { 10042 /* vfmsub132ss */, X86::VFMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26840 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26841 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26842 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26843 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26844 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26845 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26846 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26847 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26848 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26849 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26850 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26851 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26852 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26853 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26854 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26855 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26856 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26857 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26858 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26859 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26860 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26861 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26862 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26863 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26864 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26865 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26866 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26867 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26868 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26869 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26870 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26871 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26872 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26873 : { 10054 /* vfmsub213pd */, X86::VFMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26874 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26875 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26876 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26877 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26878 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26879 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26880 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26881 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26882 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26883 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26884 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26885 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26886 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26887 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26888 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26889 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26890 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26891 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26892 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26893 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26894 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26895 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26896 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26897 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26898 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26899 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26900 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26901 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26902 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26903 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26904 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26905 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26906 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26907 : { 10066 /* vfmsub213ps */, X86::VFMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26908 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26909 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
26910 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26911 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
26912 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26913 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26914 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
26915 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26916 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
26917 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26918 : { 10078 /* vfmsub213sd */, X86::VFMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26919 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26920 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
26921 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26922 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
26923 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26924 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26925 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
26926 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26927 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
26928 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26929 : { 10090 /* vfmsub213ss */, X86::VFMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
26930 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26931 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26932 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26933 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26934 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26935 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26936 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26937 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26938 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26939 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26940 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26941 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26942 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26943 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26944 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26945 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26946 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26947 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26948 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26949 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26950 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26951 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26952 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26953 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26954 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26955 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26956 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26957 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26958 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26959 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26960 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
26961 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
26962 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26963 : { 10102 /* vfmsub231pd */, X86::VFMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
26964 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26965 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
26966 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
26967 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
26968 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
26969 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
26970 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
26971 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
26972 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
26973 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
26974 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26975 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26976 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26977 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26978 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
26979 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
26980 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
26981 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
26982 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
26983 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
26984 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
26985 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
26986 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26987 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
26988 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
26989 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26990 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
26991 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
26992 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26993 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26994 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
26995 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
26996 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
26997 : { 10114 /* vfmsub231ps */, X86::VFMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
26998 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
26999 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27000 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27001 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27002 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27003 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27004 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27005 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27006 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27007 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27008 : { 10126 /* vfmsub231sd */, X86::VFMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27009 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27010 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27011 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27012 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27013 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27014 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27015 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27016 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27017 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27018 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27019 : { 10138 /* vfmsub231ss */, X86::VFMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27020 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27021 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27022 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27023 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27024 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27025 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27026 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27027 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27028 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27029 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27030 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27031 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27032 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27033 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27034 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27035 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27036 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27037 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27038 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27039 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27040 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27041 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27042 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27043 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27044 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27045 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27046 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27047 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27048 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27049 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27050 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27051 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27052 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27053 : { 10150 /* vfmsubadd132pd */, X86::VFMSUBADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27054 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27055 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27056 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27057 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27058 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27059 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27060 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27061 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27062 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27063 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27064 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27065 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27066 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27067 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27068 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27069 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27070 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27071 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27072 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27073 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27074 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27075 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27076 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27077 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27078 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27079 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27080 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27081 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27082 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27083 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27084 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27085 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27086 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27087 : { 10165 /* vfmsubadd132ps */, X86::VFMSUBADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27088 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27089 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27090 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27091 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27092 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27093 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27094 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27095 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27096 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27097 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27098 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27099 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27100 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27101 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27102 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27103 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27104 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27105 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27106 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27107 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27108 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27109 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27110 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27111 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27112 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27113 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27114 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27115 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27116 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27117 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27118 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27119 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27120 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27121 : { 10180 /* vfmsubadd213pd */, X86::VFMSUBADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27122 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27123 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27124 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27125 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27126 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27127 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27128 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27129 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27130 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27131 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27132 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27133 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27134 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27135 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27136 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27137 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27138 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27139 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27140 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27141 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27142 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27143 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27144 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27145 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27146 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27147 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27148 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27149 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27150 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27151 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27152 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27153 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27154 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27155 : { 10195 /* vfmsubadd213ps */, X86::VFMSUBADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27156 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27157 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27158 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27159 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27160 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27161 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27162 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27163 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27164 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27165 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27166 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27167 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27168 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27169 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27170 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27171 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27172 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27173 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27174 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27175 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27176 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27177 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27178 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27179 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27180 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27181 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27182 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27183 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27184 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27185 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27186 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27187 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27188 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27189 : { 10210 /* vfmsubadd231pd */, X86::VFMSUBADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27190 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27191 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27192 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27193 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27194 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27195 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27196 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27197 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27198 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27199 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27200 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27201 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27202 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27203 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27204 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27205 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27206 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27207 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27208 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27209 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27210 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27211 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27212 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27213 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27214 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27215 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27216 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27217 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27218 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27219 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27220 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27221 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27222 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27223 : { 10225 /* vfmsubadd231ps */, X86::VFMSUBADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27224 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27225 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27226 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27227 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27228 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27229 : { 10240 /* vfmsubaddpd */, X86::VFMSUBADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27230 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27231 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27232 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27233 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27234 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27235 : { 10252 /* vfmsubaddps */, X86::VFMSUBADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27236 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27237 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27238 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27239 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27240 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27241 : { 10264 /* vfmsubpd */, X86::VFMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27242 : { 10273 /* vfmsubps */, X86::VFMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27243 : { 10273 /* vfmsubps */, X86::VFMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27244 : { 10273 /* vfmsubps */, X86::VFMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27245 : { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27246 : { 10273 /* vfmsubps */, X86::VFMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27247 : { 10273 /* vfmsubps */, X86::VFMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27248 : { 10282 /* vfmsubsd */, X86::VFMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27249 : { 10282 /* vfmsubsd */, X86::VFMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27250 : { 10282 /* vfmsubsd */, X86::VFMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27251 : { 10291 /* vfmsubss */, X86::VFMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27252 : { 10291 /* vfmsubss */, X86::VFMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27253 : { 10291 /* vfmsubss */, X86::VFMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27254 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27255 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27256 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27257 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27258 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27259 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27260 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27261 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27262 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27263 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27264 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27265 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27266 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27267 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27268 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27269 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27270 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27271 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27272 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27273 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27274 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27275 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27276 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27277 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27278 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27279 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27280 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27281 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27282 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27283 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27284 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27285 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27286 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27287 : { 10300 /* vfnmadd132pd */, X86::VFNMADD132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27288 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27289 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27290 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27291 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27292 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27293 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27294 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27295 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27296 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27297 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27298 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27299 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27300 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27301 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27302 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27303 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27304 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27305 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27306 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27307 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27308 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27309 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27310 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27311 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27312 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27313 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27314 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27315 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27316 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27317 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27318 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27319 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27320 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27321 : { 10313 /* vfnmadd132ps */, X86::VFNMADD132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27322 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27323 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27324 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27325 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27326 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27327 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27328 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27329 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27330 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27331 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27332 : { 10326 /* vfnmadd132sd */, X86::VFNMADD132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27333 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27334 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27335 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27336 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27337 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27338 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27339 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27340 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27341 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27342 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27343 : { 10339 /* vfnmadd132ss */, X86::VFNMADD132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27344 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27345 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27346 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27347 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27348 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27349 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27350 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27351 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27352 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27353 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27354 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27355 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27356 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27357 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27358 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27359 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27360 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27361 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27362 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27363 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27364 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27365 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27366 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27367 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27368 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27369 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27370 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27371 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27372 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27373 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27374 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27375 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27376 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27377 : { 10352 /* vfnmadd213pd */, X86::VFNMADD213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27378 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27379 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27380 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27381 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27382 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27383 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27384 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27385 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27386 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27387 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27388 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27389 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27390 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27391 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27392 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27393 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27394 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27395 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27396 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27397 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27398 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27399 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27400 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27401 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27402 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27403 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27404 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27405 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27406 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27407 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27408 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27409 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27410 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27411 : { 10365 /* vfnmadd213ps */, X86::VFNMADD213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27412 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27413 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27414 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27415 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27416 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27417 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27418 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27419 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27420 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27421 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27422 : { 10378 /* vfnmadd213sd */, X86::VFNMADD213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27423 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27424 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27425 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27426 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27427 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27428 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27429 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27430 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27431 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27432 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27433 : { 10391 /* vfnmadd213ss */, X86::VFNMADD213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27434 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27435 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27436 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27437 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27438 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27439 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27440 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27441 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27442 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27443 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27444 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27445 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27446 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27447 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27448 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27449 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27450 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27451 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27452 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27453 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27454 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27455 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27456 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27457 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27458 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27459 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27460 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27461 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27462 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27463 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27464 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27465 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27466 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27467 : { 10404 /* vfnmadd231pd */, X86::VFNMADD231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27468 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27469 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27470 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27471 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27472 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27473 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27474 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27475 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27476 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27477 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27478 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27479 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27480 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27481 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27482 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27483 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27484 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27485 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27486 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27487 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27488 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27489 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27490 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27491 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27492 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27493 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27494 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27495 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27496 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27497 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27498 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27499 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27500 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27501 : { 10417 /* vfnmadd231ps */, X86::VFNMADD231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27502 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27503 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27504 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27505 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27506 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27507 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27508 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27509 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27510 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27511 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27512 : { 10430 /* vfnmadd231sd */, X86::VFNMADD231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27513 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27514 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27515 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27516 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27517 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27518 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27519 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27520 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27521 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27522 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27523 : { 10443 /* vfnmadd231ss */, X86::VFNMADD231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27524 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27525 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27526 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27527 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27528 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27529 : { 10456 /* vfnmaddpd */, X86::VFNMADDPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27530 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27531 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27532 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27533 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27534 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27535 : { 10466 /* vfnmaddps */, X86::VFNMADDPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27536 : { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27537 : { 10476 /* vfnmaddsd */, X86::VFNMADDSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27538 : { 10476 /* vfnmaddsd */, X86::VFNMADDSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27539 : { 10486 /* vfnmaddss */, X86::VFNMADDSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27540 : { 10486 /* vfnmaddss */, X86::VFNMADDSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27541 : { 10486 /* vfnmaddss */, X86::VFNMADDSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27542 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27543 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27544 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27545 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27546 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27547 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27548 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27549 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27550 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27551 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27552 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27553 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27554 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27555 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27556 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27557 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27558 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27559 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27560 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27561 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27562 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27563 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27564 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27565 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27566 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27567 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27568 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27569 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27570 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27571 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27572 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27573 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27574 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27575 : { 10496 /* vfnmsub132pd */, X86::VFNMSUB132PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27576 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27577 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27578 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27579 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27580 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27581 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27582 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27583 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27584 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27585 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27586 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27587 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27588 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27589 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27590 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27591 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27592 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27593 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27594 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27595 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27596 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27597 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27598 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27599 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27600 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27601 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27602 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27603 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27604 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27605 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27606 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27607 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27608 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27609 : { 10509 /* vfnmsub132ps */, X86::VFNMSUB132PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27610 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27611 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27612 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27613 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27614 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27615 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27616 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27617 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27618 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27619 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27620 : { 10522 /* vfnmsub132sd */, X86::VFNMSUB132SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27621 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27622 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27623 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27624 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27625 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27626 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27627 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27628 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27629 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27630 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27631 : { 10535 /* vfnmsub132ss */, X86::VFNMSUB132SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27632 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27633 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27634 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27635 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27636 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27637 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27638 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27639 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27640 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27641 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27642 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27643 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27644 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27645 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27646 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27647 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27648 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27649 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27650 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27651 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27652 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27653 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27654 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27655 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27656 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27657 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27658 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27659 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27660 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27661 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27662 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27663 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27664 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27665 : { 10548 /* vfnmsub213pd */, X86::VFNMSUB213PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27666 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27667 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27668 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27669 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27670 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27671 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27672 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27673 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27674 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27675 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27676 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27677 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27678 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27679 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27680 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27681 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27682 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27683 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27684 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27685 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27686 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27687 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27688 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27689 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27690 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27691 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27692 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27693 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27694 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27695 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27696 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27697 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27698 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27699 : { 10561 /* vfnmsub213ps */, X86::VFNMSUB213PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27700 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27701 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27702 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27703 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27704 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27705 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27706 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27707 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27708 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27709 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27710 : { 10574 /* vfnmsub213sd */, X86::VFNMSUB213SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27711 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27712 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27713 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27714 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27715 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27716 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27717 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27718 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27719 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27720 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27721 : { 10587 /* vfnmsub213ss */, X86::VFNMSUB213SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27722 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27723 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27724 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27725 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27726 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27727 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27728 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27729 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27730 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27731 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27732 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27733 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27734 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27735 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27736 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27737 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27738 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27739 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27740 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27741 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27742 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27743 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27744 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27745 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27746 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27747 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27748 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27749 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27750 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27751 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27752 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27753 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27754 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27755 : { 10600 /* vfnmsub231pd */, X86::VFNMSUB231PDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27756 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27757 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27758 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
27759 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSYm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27760 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27761 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
27762 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
27763 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
27764 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
27765 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
27766 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27767 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27768 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27769 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27770 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27771 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
27772 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
27773 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
27774 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
27775 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
27776 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27777 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
27778 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27779 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
27780 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
27781 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27782 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
27783 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
27784 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27785 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27786 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27787 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27788 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZrbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
27789 : { 10613 /* vfnmsub231ps */, X86::VFNMSUB231PSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27790 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27791 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27792 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27793 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27794 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27795 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27796 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27797 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27798 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27799 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27800 : { 10626 /* vfnmsub231sd */, X86::VFNMSUB231SDZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27801 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
27802 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27803 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27804 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27805 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Int, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27806 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27807 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27808 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZr_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27809 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZm_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27810 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27811 : { 10639 /* vfnmsub231ss */, X86::VFNMSUB231SSZrb_Intkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
27812 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27813 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27814 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27815 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27816 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27817 : { 10652 /* vfnmsubpd */, X86::VFNMSUBPD4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27818 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27819 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
27820 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4mr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
27821 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
27822 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Yrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
27823 : { 10662 /* vfnmsubps */, X86::VFNMSUBPS4Ymr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
27824 : { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27825 : { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem645_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem64 }, },
27826 : { 10672 /* vfnmsubsd */, X86::VFNMSUBSD4mr, Convert__Reg1_0__Reg1_1__Mem645_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_FR32 }, },
27827 : { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
27828 : { 10682 /* vfnmsubss */, X86::VFNMSUBSS4rm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem325_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem32 }, },
27829 : { 10682 /* vfnmsubss */, X86::VFNMSUBSS4mr, Convert__Reg1_0__Reg1_1__Mem325_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_FR32 }, },
27830 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27831 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27832 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
27833 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27834 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27835 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27836 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27837 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27838 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrmb, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27839 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27840 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27841 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27842 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27843 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27844 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27845 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ128rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27846 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZ256rmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27847 : { 10692 /* vfpclasspd */, X86::VFPCLASSPDZrmbk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27848 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27849 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27850 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_VR512, MCK_ImmUnsignedi8 }, },
27851 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27852 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27853 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27854 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27855 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27856 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rmb, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27857 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27858 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27859 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
27860 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rmk, Convert__Reg1_0__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27861 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rmk, Convert__Reg1_0__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27862 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrmk, Convert__Reg1_0__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27863 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZrmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
27864 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ128rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
27865 : { 10751 /* vfpclassps */, X86::VFPCLASSPSZ256rmbk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
27866 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27867 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrm, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27868 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27869 : { 10810 /* vfpclasssd */, X86::VFPCLASSSDZrmk, Convert__Reg1_0__Reg1_2__Mem645_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK_ImmUnsignedi8 }, },
27870 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27871 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrm, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_2, 0, { MCK_VK1, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27872 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27873 : { 10821 /* vfpclassss */, X86::VFPCLASSSSZrmk, Convert__Reg1_0__Reg1_2__Mem325_4__ImmUnsignedi81_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK_ImmUnsignedi8 }, },
27874 : { 10832 /* vfrczpd */, X86::VFRCZPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27875 : { 10832 /* vfrczpd */, X86::VFRCZPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27876 : { 10832 /* vfrczpd */, X86::VFRCZPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
27877 : { 10832 /* vfrczpd */, X86::VFRCZPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27878 : { 10840 /* vfrczps */, X86::VFRCZPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27879 : { 10840 /* vfrczps */, X86::VFRCZPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
27880 : { 10840 /* vfrczps */, X86::VFRCZPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
27881 : { 10840 /* vfrczps */, X86::VFRCZPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
27882 : { 10848 /* vfrczsd */, X86::VFRCZSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27883 : { 10848 /* vfrczsd */, X86::VFRCZSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
27884 : { 10856 /* vfrczss */, X86::VFRCZSSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
27885 : { 10856 /* vfrczss */, X86::VFRCZSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
27886 : { 10864 /* vgatherdpd */, X86::VGATHERDPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27887 : { 10864 /* vgatherdpd */, X86::VGATHERDPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
27888 : { 10864 /* vgatherdpd */, X86::VGATHERDPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27889 : { 10864 /* vgatherdpd */, X86::VGATHERDPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
27890 : { 10864 /* vgatherdpd */, X86::VGATHERDPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27891 : { 10875 /* vgatherdps */, X86::VGATHERDPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27892 : { 10875 /* vgatherdps */, X86::VGATHERDPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
27893 : { 10875 /* vgatherdps */, X86::VGATHERDPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27894 : { 10875 /* vgatherdps */, X86::VGATHERDPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
27895 : { 10875 /* vgatherdps */, X86::VGATHERDPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27896 : { 10886 /* vgatherpf0dpd */, X86::VGATHERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27897 : { 10900 /* vgatherpf0dps */, X86::VGATHERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27898 : { 10914 /* vgatherpf0qpd */, X86::VGATHERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27899 : { 10928 /* vgatherpf0qps */, X86::VGATHERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27900 : { 10942 /* vgatherpf1dpd */, X86::VGATHERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
27901 : { 10956 /* vgatherpf1dps */, X86::VGATHERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27902 : { 10970 /* vgatherpf1qpd */, X86::VGATHERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27903 : { 10984 /* vgatherpf1qps */, X86::VGATHERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27904 : { 10998 /* vgatherqpd */, X86::VGATHERQPDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
27905 : { 10998 /* vgatherqpd */, X86::VGATHERQPDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
27906 : { 10998 /* vgatherqpd */, X86::VGATHERQPDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
27907 : { 10998 /* vgatherqpd */, X86::VGATHERQPDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
27908 : { 10998 /* vgatherqpd */, X86::VGATHERQPDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
27909 : { 11009 /* vgatherqps */, X86::VGATHERQPSYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
27910 : { 11009 /* vgatherqps */, X86::VGATHERQPSrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
27911 : { 11009 /* vgatherqps */, X86::VGATHERQPSZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
27912 : { 11009 /* vgatherqps */, X86::VGATHERQPSZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
27913 : { 11009 /* vgatherqps */, X86::VGATHERQPSZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
27914 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
27915 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
27916 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
27917 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
27918 : { 11020 /* vgetexppd */, X86::VGETEXPPDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
27919 : { 11020 /* vgetexppd */, X86::VGETEXPPDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
27920 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
27921 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
27922 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27923 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
27924 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27925 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27926 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27927 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27928 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27929 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27930 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27931 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27932 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
27933 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27934 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27935 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
27936 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27937 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27938 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27939 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27940 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
27941 : { 11020 /* vgetexppd */, X86::VGETEXPPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
27942 : { 11020 /* vgetexppd */, X86::VGETEXPPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27943 : { 11020 /* vgetexppd */, X86::VGETEXPPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
27944 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
27945 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
27946 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
27947 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
27948 : { 11030 /* vgetexpps */, X86::VGETEXPPSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
27949 : { 11030 /* vgetexpps */, X86::VGETEXPPSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
27950 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
27951 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
27952 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
27953 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
27954 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
27955 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
27956 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
27957 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
27958 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
27959 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
27960 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
27961 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
27962 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
27963 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
27964 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
27965 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
27966 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
27967 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
27968 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
27969 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27970 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
27971 : { 11030 /* vgetexpps */, X86::VGETEXPPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
27972 : { 11030 /* vgetexpps */, X86::VGETEXPPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
27973 : { 11030 /* vgetexpps */, X86::VGETEXPPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
27974 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27975 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
27976 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27977 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27978 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
27979 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27980 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
27981 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27982 : { 11040 /* vgetexpsd */, X86::VGETEXPSDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27983 : { 11050 /* vgetexpss */, X86::VGETEXPSSZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
27984 : { 11050 /* vgetexpss */, X86::VGETEXPSSZm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
27985 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27986 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
27987 : { 11050 /* vgetexpss */, X86::VGETEXPSSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
27988 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
27989 : { 11050 /* vgetexpss */, X86::VGETEXPSSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
27990 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27991 : { 11050 /* vgetexpss */, X86::VGETEXPSSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
27992 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
27993 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
27994 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
27995 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
27996 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
27997 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
27998 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
27999 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28000 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28001 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28002 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28003 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28004 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28005 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28006 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28007 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28008 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28009 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28010 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28011 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28012 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28013 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28014 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28015 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28016 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28017 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28018 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28019 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28020 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28021 : { 11060 /* vgetmantpd */, X86::VGETMANTPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28022 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28023 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28024 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28025 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28026 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28027 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28028 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28029 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28030 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28031 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28032 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28033 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28034 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28035 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28036 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28037 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28038 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28039 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28040 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28041 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28042 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28043 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28044 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
28045 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28046 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28047 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28048 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28049 : { 11071 /* vgetmantps */, X86::VGETMANTPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28050 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28051 : { 11071 /* vgetmantps */, X86::VGETMANTPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
28052 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28053 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
28054 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28055 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28056 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
28057 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28058 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
28059 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28060 : { 11082 /* vgetmantsd */, X86::VGETMANTSDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28061 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28062 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28063 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28064 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28065 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28066 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28067 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28068 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28069 : { 11093 /* vgetmantss */, X86::VGETMANTSSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
28070 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28071 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28072 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28073 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28074 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28075 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28076 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28077 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28078 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28079 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28080 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28081 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28082 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28083 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28084 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28085 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28086 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28087 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28088 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28089 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28090 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28091 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28092 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28093 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28094 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28095 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28096 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28097 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28098 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28099 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28100 : { 11104 /* vgf2p8affineinvqb */, X86::VGF2P8AFFINEINVQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28101 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28102 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28103 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
28104 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28105 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28106 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28107 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28108 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28109 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28110 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28111 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28112 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28113 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbi, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28114 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28115 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28116 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28117 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28118 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28119 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28120 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28121 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28122 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28123 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28124 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28125 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28126 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
28127 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
28128 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem85_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28129 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem8, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
28130 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem8, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
28131 : { 11122 /* vgf2p8affineqb */, X86::VGF2P8AFFINEQBZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem85_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem8, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
28132 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28133 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28134 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28135 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28136 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28137 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28138 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28139 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28140 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28141 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28142 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28143 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28144 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28145 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28146 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28147 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28148 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28149 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28150 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28151 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28152 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28153 : { 11137 /* vgf2p8mulb */, X86::VGF2P8MULBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28154 : { 11148 /* vhaddpd */, X86::VHADDPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28155 : { 11148 /* vhaddpd */, X86::VHADDPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28156 : { 11148 /* vhaddpd */, X86::VHADDPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28157 : { 11148 /* vhaddpd */, X86::VHADDPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28158 : { 11156 /* vhaddps */, X86::VHADDPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28159 : { 11156 /* vhaddps */, X86::VHADDPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28160 : { 11156 /* vhaddps */, X86::VHADDPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28161 : { 11156 /* vhaddps */, X86::VHADDPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28162 : { 11164 /* vhsubpd */, X86::VHSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28163 : { 11164 /* vhsubpd */, X86::VHSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28164 : { 11164 /* vhsubpd */, X86::VHSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28165 : { 11164 /* vhsubpd */, X86::VHSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28166 : { 11172 /* vhsubps */, X86::VHSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28167 : { 11172 /* vhsubps */, X86::VHSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28168 : { 11172 /* vhsubps */, X86::VHSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28169 : { 11172 /* vhsubps */, X86::VHSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28170 : { 11180 /* vinsertf128 */, X86::VINSERTF128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
28171 : { 11180 /* vinsertf128 */, X86::VINSERTF128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28172 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28173 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28174 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28175 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28176 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28177 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28178 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28179 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28180 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28181 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28182 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28183 : { 11192 /* vinsertf32x4 */, X86::VINSERTF32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28184 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28185 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28186 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28187 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28188 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28189 : { 11205 /* vinsertf32x8 */, X86::VINSERTF32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28190 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28191 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28192 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28193 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28194 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28195 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28196 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28197 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28198 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28199 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28200 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28201 : { 11218 /* vinsertf64x2 */, X86::VINSERTF64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28202 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28203 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28204 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28205 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28206 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28207 : { 11231 /* vinsertf64x4 */, X86::VINSERTF64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28208 : { 11244 /* vinserti128 */, X86::VINSERTI128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_FR32, MCK_ImmUnsignedi8 }, },
28209 : { 11244 /* vinserti128 */, X86::VINSERTI128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28210 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28211 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28212 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28213 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28214 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28215 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28216 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28217 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28218 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28219 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28220 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28221 : { 11256 /* vinserti32x4 */, X86::VINSERTI32x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28222 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28223 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28224 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28225 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28226 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28227 : { 11269 /* vinserti32x8 */, X86::VINSERTI32x8Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28228 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28229 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28230 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28231 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28232 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28233 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28234 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28235 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28236 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28237 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Z256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28238 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28239 : { 11282 /* vinserti64x2 */, X86::VINSERTI64x2Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128, MCK_ImmUnsignedi8 }, },
28240 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28241 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28242 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28243 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28244 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR256X, MCK_ImmUnsignedi8 }, },
28245 : { 11295 /* vinserti64x4 */, X86::VINSERTI64x4Zrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem256, MCK_ImmUnsignedi8 }, },
28246 : { 11308 /* vinsertps */, X86::VINSERTPSrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
28247 : { 11308 /* vinsertps */, X86::VINSERTPSrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28248 : { 11308 /* vinsertps */, X86::VINSERTPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
28249 : { 11308 /* vinsertps */, X86::VINSERTPSZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
28250 : { 11318 /* vlddqu */, X86::VLDDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28251 : { 11318 /* vlddqu */, X86::VLDDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28252 : { 11325 /* vldmxcsr */, X86::VLDMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
28253 : { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_FR32, MCK_FR32 }, },
28254 : { 11334 /* vmaskmovdqu */, X86::VMASKMOVDQU64, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_FR32, MCK_FR32 }, },
28255 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28256 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28257 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
28258 : { 11346 /* vmaskmovpd */, X86::VMASKMOVPDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
28259 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28260 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28261 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
28262 : { 11357 /* vmaskmovps */, X86::VMASKMOVPSYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
28263 : { 11368 /* vmaxpd */, X86::VMAXPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28264 : { 11368 /* vmaxpd */, X86::VMAXPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28265 : { 11368 /* vmaxpd */, X86::VMAXPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28266 : { 11368 /* vmaxpd */, X86::VMAXPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28267 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28268 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28269 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28270 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28271 : { 11368 /* vmaxpd */, X86::VMAXPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28272 : { 11368 /* vmaxpd */, X86::VMAXPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28273 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28274 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28275 : { 11368 /* vmaxpd */, X86::VMAXPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28276 : { 11368 /* vmaxpd */, X86::VMAXPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28277 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28278 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28279 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28280 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28281 : { 11368 /* vmaxpd */, X86::VMAXPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28282 : { 11368 /* vmaxpd */, X86::VMAXPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28283 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28284 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28285 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28286 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28287 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28288 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28289 : { 11368 /* vmaxpd */, X86::VMAXPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28290 : { 11368 /* vmaxpd */, X86::VMAXPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28291 : { 11368 /* vmaxpd */, X86::VMAXPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28292 : { 11368 /* vmaxpd */, X86::VMAXPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28293 : { 11368 /* vmaxpd */, X86::VMAXPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28294 : { 11368 /* vmaxpd */, X86::VMAXPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28295 : { 11368 /* vmaxpd */, X86::VMAXPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28296 : { 11368 /* vmaxpd */, X86::VMAXPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28297 : { 11375 /* vmaxps */, X86::VMAXPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28298 : { 11375 /* vmaxps */, X86::VMAXPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28299 : { 11375 /* vmaxps */, X86::VMAXPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28300 : { 11375 /* vmaxps */, X86::VMAXPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28301 : { 11375 /* vmaxps */, X86::VMAXPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28302 : { 11375 /* vmaxps */, X86::VMAXPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28303 : { 11375 /* vmaxps */, X86::VMAXPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28304 : { 11375 /* vmaxps */, X86::VMAXPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28305 : { 11375 /* vmaxps */, X86::VMAXPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28306 : { 11375 /* vmaxps */, X86::VMAXPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28307 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28308 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28309 : { 11375 /* vmaxps */, X86::VMAXPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28310 : { 11375 /* vmaxps */, X86::VMAXPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28311 : { 11375 /* vmaxps */, X86::VMAXPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28312 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28313 : { 11375 /* vmaxps */, X86::VMAXPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28314 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28315 : { 11375 /* vmaxps */, X86::VMAXPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28316 : { 11375 /* vmaxps */, X86::VMAXPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28317 : { 11375 /* vmaxps */, X86::VMAXPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28318 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28319 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28320 : { 11375 /* vmaxps */, X86::VMAXPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28321 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28322 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28323 : { 11375 /* vmaxps */, X86::VMAXPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28324 : { 11375 /* vmaxps */, X86::VMAXPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28325 : { 11375 /* vmaxps */, X86::VMAXPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28326 : { 11375 /* vmaxps */, X86::VMAXPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28327 : { 11375 /* vmaxps */, X86::VMAXPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28328 : { 11375 /* vmaxps */, X86::VMAXPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28329 : { 11375 /* vmaxps */, X86::VMAXPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28330 : { 11375 /* vmaxps */, X86::VMAXPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28331 : { 11382 /* vmaxsd */, X86::VMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28332 : { 11382 /* vmaxsd */, X86::VMAXSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28333 : { 11382 /* vmaxsd */, X86::VMAXSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28334 : { 11382 /* vmaxsd */, X86::VMAXSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28335 : { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28336 : { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28337 : { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28338 : { 11382 /* vmaxsd */, X86::VMAXSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28339 : { 11382 /* vmaxsd */, X86::VMAXSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28340 : { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28341 : { 11382 /* vmaxsd */, X86::VMAXSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28342 : { 11389 /* vmaxss */, X86::VMAXSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28343 : { 11389 /* vmaxss */, X86::VMAXSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28344 : { 11389 /* vmaxss */, X86::VMAXSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28345 : { 11389 /* vmaxss */, X86::VMAXSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28346 : { 11389 /* vmaxss */, X86::VMAXSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28347 : { 11389 /* vmaxss */, X86::VMAXSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28348 : { 11389 /* vmaxss */, X86::VMAXSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28349 : { 11389 /* vmaxss */, X86::VMAXSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28350 : { 11389 /* vmaxss */, X86::VMAXSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28351 : { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28352 : { 11389 /* vmaxss */, X86::VMAXSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28353 : { 11396 /* vmcall */, X86::VMCALL, Convert_NoOperands, 0, { }, },
28354 : { 11403 /* vmclear */, X86::VMCLEARm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
28355 : { 11411 /* vmfunc */, X86::VMFUNC, Convert_NoOperands, 0, { }, },
28356 : { 11418 /* vminpd */, X86::VMINPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28357 : { 11418 /* vminpd */, X86::VMINPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28358 : { 11418 /* vminpd */, X86::VMINPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28359 : { 11418 /* vminpd */, X86::VMINPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28360 : { 11418 /* vminpd */, X86::VMINPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28361 : { 11418 /* vminpd */, X86::VMINPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28362 : { 11418 /* vminpd */, X86::VMINPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28363 : { 11418 /* vminpd */, X86::VMINPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28364 : { 11418 /* vminpd */, X86::VMINPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28365 : { 11418 /* vminpd */, X86::VMINPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28366 : { 11418 /* vminpd */, X86::VMINPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28367 : { 11418 /* vminpd */, X86::VMINPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28368 : { 11418 /* vminpd */, X86::VMINPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28369 : { 11418 /* vminpd */, X86::VMINPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28370 : { 11418 /* vminpd */, X86::VMINPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28371 : { 11418 /* vminpd */, X86::VMINPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28372 : { 11418 /* vminpd */, X86::VMINPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28373 : { 11418 /* vminpd */, X86::VMINPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28374 : { 11418 /* vminpd */, X86::VMINPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28375 : { 11418 /* vminpd */, X86::VMINPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28376 : { 11418 /* vminpd */, X86::VMINPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28377 : { 11418 /* vminpd */, X86::VMINPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28378 : { 11418 /* vminpd */, X86::VMINPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28379 : { 11418 /* vminpd */, X86::VMINPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28380 : { 11418 /* vminpd */, X86::VMINPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28381 : { 11418 /* vminpd */, X86::VMINPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28382 : { 11418 /* vminpd */, X86::VMINPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28383 : { 11418 /* vminpd */, X86::VMINPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28384 : { 11418 /* vminpd */, X86::VMINPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28385 : { 11418 /* vminpd */, X86::VMINPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28386 : { 11418 /* vminpd */, X86::VMINPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
28387 : { 11418 /* vminpd */, X86::VMINPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
28388 : { 11418 /* vminpd */, X86::VMINPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28389 : { 11418 /* vminpd */, X86::VMINPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
28390 : { 11425 /* vminps */, X86::VMINPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28391 : { 11425 /* vminps */, X86::VMINPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
28392 : { 11425 /* vminps */, X86::VMINPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
28393 : { 11425 /* vminps */, X86::VMINPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
28394 : { 11425 /* vminps */, X86::VMINPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28395 : { 11425 /* vminps */, X86::VMINPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
28396 : { 11425 /* vminps */, X86::VMINPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
28397 : { 11425 /* vminps */, X86::VMINPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
28398 : { 11425 /* vminps */, X86::VMINPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
28399 : { 11425 /* vminps */, X86::VMINPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
28400 : { 11425 /* vminps */, X86::VMINPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28401 : { 11425 /* vminps */, X86::VMINPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28402 : { 11425 /* vminps */, X86::VMINPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28403 : { 11425 /* vminps */, X86::VMINPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28404 : { 11425 /* vminps */, X86::VMINPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28405 : { 11425 /* vminps */, X86::VMINPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
28406 : { 11425 /* vminps */, X86::VMINPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
28407 : { 11425 /* vminps */, X86::VMINPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
28408 : { 11425 /* vminps */, X86::VMINPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
28409 : { 11425 /* vminps */, X86::VMINPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
28410 : { 11425 /* vminps */, X86::VMINPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28411 : { 11425 /* vminps */, X86::VMINPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
28412 : { 11425 /* vminps */, X86::VMINPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28413 : { 11425 /* vminps */, X86::VMINPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
28414 : { 11425 /* vminps */, X86::VMINPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
28415 : { 11425 /* vminps */, X86::VMINPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28416 : { 11425 /* vminps */, X86::VMINPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
28417 : { 11425 /* vminps */, X86::VMINPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
28418 : { 11425 /* vminps */, X86::VMINPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28419 : { 11425 /* vminps */, X86::VMINPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28420 : { 11425 /* vminps */, X86::VMINPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
28421 : { 11425 /* vminps */, X86::VMINPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
28422 : { 11425 /* vminps */, X86::VMINPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
28423 : { 11425 /* vminps */, X86::VMINPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
28424 : { 11432 /* vminsd */, X86::VMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28425 : { 11432 /* vminsd */, X86::VMINSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28426 : { 11432 /* vminsd */, X86::VMINSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28427 : { 11432 /* vminsd */, X86::VMINSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28428 : { 11432 /* vminsd */, X86::VMINSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28429 : { 11432 /* vminsd */, X86::VMINSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28430 : { 11432 /* vminsd */, X86::VMINSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
28431 : { 11432 /* vminsd */, X86::VMINSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28432 : { 11432 /* vminsd */, X86::VMINSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
28433 : { 11432 /* vminsd */, X86::VMINSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28434 : { 11432 /* vminsd */, X86::VMINSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28435 : { 11439 /* vminss */, X86::VMINSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28436 : { 11439 /* vminss */, X86::VMINSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
28437 : { 11439 /* vminss */, X86::VMINSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28438 : { 11439 /* vminss */, X86::VMINSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
28439 : { 11439 /* vminss */, X86::VMINSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28440 : { 11439 /* vminss */, X86::VMINSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28441 : { 11439 /* vminss */, X86::VMINSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
28442 : { 11439 /* vminss */, X86::VMINSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28443 : { 11439 /* vminss */, X86::VMINSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
28444 : { 11439 /* vminss */, X86::VMINSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28445 : { 11439 /* vminss */, X86::VMINSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
28446 : { 11446 /* vmlaunch */, X86::VMLAUNCH, Convert_NoOperands, 0, { }, },
28447 : { 11455 /* vmload */, X86::VMLOAD32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
28448 : { 11455 /* vmload */, X86::VMLOAD64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
28449 : { 11462 /* vmmcall */, X86::VMMCALL, Convert_NoOperands, 0, { }, },
28450 : { 11470 /* vmovapd */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28451 : { 11470 /* vmovapd */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28452 : { 11470 /* vmovapd */, X86::VMOVAPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28453 : { 11470 /* vmovapd */, X86::VMOVAPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28454 : { 11470 /* vmovapd */, X86::VMOVAPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28455 : { 11470 /* vmovapd */, X86::VMOVAPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28456 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28457 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28458 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28459 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28460 : { 11470 /* vmovapd */, X86::VMOVAPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28461 : { 11470 /* vmovapd */, X86::VMOVAPDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28462 : { 11470 /* vmovapd */, X86::VMOVAPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28463 : { 11470 /* vmovapd */, X86::VMOVAPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28464 : { 11470 /* vmovapd */, X86::VMOVAPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28465 : { 11470 /* vmovapd */, X86::VMOVAPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28466 : { 11470 /* vmovapd */, X86::VMOVAPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28467 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28468 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28469 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28470 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28471 : { 11470 /* vmovapd */, X86::VMOVAPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28472 : { 11470 /* vmovapd */, X86::VMOVAPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28473 : { 11470 /* vmovapd */, X86::VMOVAPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28474 : { 11470 /* vmovapd */, X86::VMOVAPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28475 : { 11470 /* vmovapd */, X86::VMOVAPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28476 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28477 : { 11470 /* vmovapd */, X86::VMOVAPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28478 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28479 : { 11470 /* vmovapd */, X86::VMOVAPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28480 : { 11470 /* vmovapd */, X86::VMOVAPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28481 : { 11470 /* vmovapd */, X86::VMOVAPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28482 : { 11478 /* vmovapd.s */, X86::VMOVAPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28483 : { 11478 /* vmovapd.s */, X86::VMOVAPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28484 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28485 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28486 : { 11478 /* vmovapd.s */, X86::VMOVAPDZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28487 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28488 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28489 : { 11478 /* vmovapd.s */, X86::VMOVAPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28490 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28491 : { 11478 /* vmovapd.s */, X86::VMOVAPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28492 : { 11478 /* vmovapd.s */, X86::VMOVAPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28493 : { 11488 /* vmovaps */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28494 : { 11488 /* vmovaps */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28495 : { 11488 /* vmovaps */, X86::VMOVAPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28496 : { 11488 /* vmovaps */, X86::VMOVAPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28497 : { 11488 /* vmovaps */, X86::VMOVAPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28498 : { 11488 /* vmovaps */, X86::VMOVAPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28499 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28500 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28501 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28502 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28503 : { 11488 /* vmovaps */, X86::VMOVAPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28504 : { 11488 /* vmovaps */, X86::VMOVAPSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28505 : { 11488 /* vmovaps */, X86::VMOVAPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28506 : { 11488 /* vmovaps */, X86::VMOVAPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28507 : { 11488 /* vmovaps */, X86::VMOVAPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28508 : { 11488 /* vmovaps */, X86::VMOVAPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28509 : { 11488 /* vmovaps */, X86::VMOVAPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28510 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28511 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28512 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28513 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28514 : { 11488 /* vmovaps */, X86::VMOVAPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28515 : { 11488 /* vmovaps */, X86::VMOVAPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28516 : { 11488 /* vmovaps */, X86::VMOVAPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28517 : { 11488 /* vmovaps */, X86::VMOVAPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28518 : { 11488 /* vmovaps */, X86::VMOVAPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28519 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28520 : { 11488 /* vmovaps */, X86::VMOVAPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28521 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28522 : { 11488 /* vmovaps */, X86::VMOVAPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28523 : { 11488 /* vmovaps */, X86::VMOVAPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28524 : { 11488 /* vmovaps */, X86::VMOVAPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28525 : { 11496 /* vmovaps.s */, X86::VMOVAPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28526 : { 11496 /* vmovaps.s */, X86::VMOVAPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28527 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28528 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28529 : { 11496 /* vmovaps.s */, X86::VMOVAPSZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28530 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28531 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28532 : { 11496 /* vmovaps.s */, X86::VMOVAPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28533 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28534 : { 11496 /* vmovaps.s */, X86::VMOVAPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28535 : { 11496 /* vmovaps.s */, X86::VMOVAPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28536 : { 11506 /* vmovd */, X86::VMOVDI2PDIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR32 }, },
28537 : { 11506 /* vmovd */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
28538 : { 11506 /* vmovd */, X86::VMOVDI2PDIrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
28539 : { 11506 /* vmovd */, X86::VMOVPDI2DIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32 }, },
28540 : { 11506 /* vmovd */, X86::VMOVPDI2DIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR32, MCK_FR32X }, },
28541 : { 11506 /* vmovd */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
28542 : { 11506 /* vmovd */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
28543 : { 11506 /* vmovd */, X86::VMOVDI2PDIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
28544 : { 11506 /* vmovd */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR64 }, },
28545 : { 11506 /* vmovd */, X86::VMOVDI2PDIZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
28546 : { 11506 /* vmovd */, X86::VMOVPDI2DImr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
28547 : { 11506 /* vmovd */, X86::VMOVPDI2DIZmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
28548 : { 11512 /* vmovddup */, X86::VMOVDDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28549 : { 11512 /* vmovddup */, X86::VMOVDDUPrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28550 : { 11512 /* vmovddup */, X86::VMOVDDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28551 : { 11512 /* vmovddup */, X86::VMOVDDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28552 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28553 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
28554 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28555 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28556 : { 11512 /* vmovddup */, X86::VMOVDDUPZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28557 : { 11512 /* vmovddup */, X86::VMOVDDUPZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28558 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28559 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
28560 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28561 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28562 : { 11512 /* vmovddup */, X86::VMOVDDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28563 : { 11512 /* vmovddup */, X86::VMOVDDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28564 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28565 : { 11512 /* vmovddup */, X86::VMOVDDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
28566 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28567 : { 11512 /* vmovddup */, X86::VMOVDDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28568 : { 11512 /* vmovddup */, X86::VMOVDDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28569 : { 11512 /* vmovddup */, X86::VMOVDDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28570 : { 11521 /* vmovdqa */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28571 : { 11521 /* vmovdqa */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28572 : { 11521 /* vmovdqa */, X86::VMOVDQArr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28573 : { 11521 /* vmovdqa */, X86::VMOVDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28574 : { 11521 /* vmovdqa */, X86::VMOVDQAYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28575 : { 11521 /* vmovdqa */, X86::VMOVDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28576 : { 11521 /* vmovdqa */, X86::VMOVDQAmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28577 : { 11521 /* vmovdqa */, X86::VMOVDQAYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28578 : { 11529 /* vmovdqa.s */, X86::VMOVDQArr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28579 : { 11529 /* vmovdqa.s */, X86::VMOVDQAYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28580 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28581 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28582 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28583 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28584 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28585 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28586 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28587 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28588 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28589 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28590 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28591 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28592 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28593 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28594 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28595 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28596 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28597 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28598 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28599 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28600 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28601 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28602 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28603 : { 11539 /* vmovdqa32 */, X86::VMOVDQA32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28604 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28605 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28606 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28607 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28608 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28609 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28610 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28611 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28612 : { 11549 /* vmovdqa32.s */, X86::VMOVDQA32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28613 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28614 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28615 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28616 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28617 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28618 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28619 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28620 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28621 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28622 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28623 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28624 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28625 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28626 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28627 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28628 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28629 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28630 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28631 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28632 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28633 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28634 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28635 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28636 : { 11561 /* vmovdqa64 */, X86::VMOVDQA64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28637 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28638 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28639 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28640 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28641 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28642 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28643 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28644 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28645 : { 11571 /* vmovdqa64.s */, X86::VMOVDQA64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28646 : { 11583 /* vmovdqu */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28647 : { 11583 /* vmovdqu */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28648 : { 11583 /* vmovdqu */, X86::VMOVDQUrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28649 : { 11583 /* vmovdqu */, X86::VMOVDQUrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28650 : { 11583 /* vmovdqu */, X86::VMOVDQUYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28651 : { 11583 /* vmovdqu */, X86::VMOVDQUYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28652 : { 11583 /* vmovdqu */, X86::VMOVDQUmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28653 : { 11583 /* vmovdqu */, X86::VMOVDQUYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28654 : { 11591 /* vmovdqu.s */, X86::VMOVDQUrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28655 : { 11591 /* vmovdqu.s */, X86::VMOVDQUYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28656 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28657 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28658 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28659 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28660 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28661 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28662 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28663 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28664 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28665 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28666 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28667 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28668 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28669 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28670 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28671 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28672 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28673 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28674 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28675 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28676 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28677 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28678 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28679 : { 11601 /* vmovdqu16 */, X86::VMOVDQU16Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28680 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28681 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28682 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28683 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28684 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28685 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28686 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28687 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28688 : { 11611 /* vmovdqu16.s */, X86::VMOVDQU16Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28689 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28690 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28691 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28692 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28693 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28694 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28695 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28696 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28697 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28698 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28699 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28700 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28701 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28702 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28703 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28704 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28705 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28706 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28707 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28708 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28709 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28710 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28711 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28712 : { 11623 /* vmovdqu32 */, X86::VMOVDQU32Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28713 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28714 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28715 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28716 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28717 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28718 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28719 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28720 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28721 : { 11633 /* vmovdqu32.s */, X86::VMOVDQU32Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28722 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28723 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28724 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28725 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28726 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28727 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28728 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28729 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28730 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28731 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28732 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28733 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28734 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28735 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28736 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28737 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28738 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28739 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28740 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28741 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28742 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28743 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28744 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28745 : { 11645 /* vmovdqu64 */, X86::VMOVDQU64Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28746 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28747 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28748 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28749 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28750 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28751 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28752 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28753 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28754 : { 11655 /* vmovdqu64.s */, X86::VMOVDQU64Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28755 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28756 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28757 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28758 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28759 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28760 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28761 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28762 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28763 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28764 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28765 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28766 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28767 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28768 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28769 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28770 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28771 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28772 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28773 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28774 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28775 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28776 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Z256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28777 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28778 : { 11667 /* vmovdqu8 */, X86::VMOVDQU8Zrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28779 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28780 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28781 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28782 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28783 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28784 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28785 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28786 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Z256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28787 : { 11676 /* vmovdqu8.s */, X86::VMOVDQU8Zrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28788 : { 11687 /* vmovhlps */, X86::VMOVHLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28789 : { 11687 /* vmovhlps */, X86::VMOVHLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28790 : { 11696 /* vmovhpd */, X86::VMOVHPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28791 : { 11696 /* vmovhpd */, X86::VMOVHPDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28792 : { 11696 /* vmovhpd */, X86::VMOVHPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28793 : { 11696 /* vmovhpd */, X86::VMOVHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28794 : { 11704 /* vmovhps */, X86::VMOVHPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28795 : { 11704 /* vmovhps */, X86::VMOVHPSZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28796 : { 11704 /* vmovhps */, X86::VMOVHPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28797 : { 11704 /* vmovhps */, X86::VMOVHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28798 : { 11712 /* vmovlhps */, X86::VMOVLHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28799 : { 11712 /* vmovlhps */, X86::VMOVLHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28800 : { 11721 /* vmovlpd */, X86::VMOVLPDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28801 : { 11721 /* vmovlpd */, X86::VMOVLPDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28802 : { 11721 /* vmovlpd */, X86::VMOVLPDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28803 : { 11721 /* vmovlpd */, X86::VMOVLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28804 : { 11729 /* vmovlps */, X86::VMOVLPSmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28805 : { 11729 /* vmovlps */, X86::VMOVLPSZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28806 : { 11729 /* vmovlps */, X86::VMOVLPSrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
28807 : { 11729 /* vmovlps */, X86::VMOVLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
28808 : { 11737 /* vmovmskpd */, X86::VMOVMSKPDrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
28809 : { 11737 /* vmovmskpd */, X86::VMOVMSKPDYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
28810 : { 11747 /* vmovmskps */, X86::VMOVMSKPSrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
28811 : { 11747 /* vmovmskps */, X86::VMOVMSKPSYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
28812 : { 11757 /* vmovntdq */, X86::VMOVNTDQmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28813 : { 11757 /* vmovntdq */, X86::VMOVNTDQZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28814 : { 11757 /* vmovntdq */, X86::VMOVNTDQYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28815 : { 11757 /* vmovntdq */, X86::VMOVNTDQZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28816 : { 11757 /* vmovntdq */, X86::VMOVNTDQZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28817 : { 11766 /* vmovntdqa */, X86::VMOVNTDQArm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28818 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28819 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28820 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28821 : { 11766 /* vmovntdqa */, X86::VMOVNTDQAZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28822 : { 11776 /* vmovntpd */, X86::VMOVNTPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28823 : { 11776 /* vmovntpd */, X86::VMOVNTPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28824 : { 11776 /* vmovntpd */, X86::VMOVNTPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28825 : { 11776 /* vmovntpd */, X86::VMOVNTPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28826 : { 11776 /* vmovntpd */, X86::VMOVNTPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28827 : { 11785 /* vmovntps */, X86::VMOVNTPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28828 : { 11785 /* vmovntps */, X86::VMOVNTPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28829 : { 11785 /* vmovntps */, X86::VMOVNTPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28830 : { 11785 /* vmovntps */, X86::VMOVNTPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28831 : { 11785 /* vmovntps */, X86::VMOVNTPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28832 : { 11794 /* vmovq */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28833 : { 11794 /* vmovq */, X86::VMOVZPQILo2PQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28834 : { 11794 /* vmovq */, X86::VMOV64toPQIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_GR64 }, },
28835 : { 11794 /* vmovq */, X86::VMOVQI2PQIrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28836 : { 11794 /* vmovq */, X86::VMOVPQIto64rr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32 }, },
28837 : { 11794 /* vmovq */, X86::VMOVPQIto64Zrr, Convert__Reg1_0__Reg1_1, 0, { MCK_GR64, MCK_FR32X }, },
28838 : { 11794 /* vmovq */, X86::VMOV64toPQIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR64 }, },
28839 : { 11794 /* vmovq */, X86::VMOVZPQILo2PQIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28840 : { 11794 /* vmovq */, X86::VMOVQI2PQIZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
28841 : { 11794 /* vmovq */, X86::VMOVPQI2QImr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28842 : { 11794 /* vmovq */, X86::VMOVPQI2QIZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28843 : { 11800 /* vmovq.s */, X86::VMOVPQI2QIrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28844 : { 11800 /* vmovq.s */, X86::VMOVPQI2QIZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28845 : { 11808 /* vmovsd */, X86::VMOVSDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
28846 : { 11808 /* vmovsd */, X86::VMOVSDZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
28847 : { 11808 /* vmovsd */, X86::VMOVSDmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32 }, },
28848 : { 11808 /* vmovsd */, X86::VMOVSDZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
28849 : { 11808 /* vmovsd */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR128L, MCK_FR32, MCK_VR128H }, },
28850 : { 11808 /* vmovsd */, X86::VMOVSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28851 : { 11808 /* vmovsd */, X86::VMOVSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28852 : { 11808 /* vmovsd */, X86::VMOVSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
28853 : { 11808 /* vmovsd */, X86::VMOVSDZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28854 : { 11808 /* vmovsd */, X86::VMOVSDZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
28855 : { 11808 /* vmovsd */, X86::VMOVSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28856 : { 11808 /* vmovsd */, X86::VMOVSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28857 : { 11815 /* vmovsd.s */, X86::VMOVSDrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28858 : { 11815 /* vmovsd.s */, X86::VMOVSDZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28859 : { 11815 /* vmovsd.s */, X86::VMOVSDZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28860 : { 11815 /* vmovsd.s */, X86::VMOVSDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28861 : { 11824 /* vmovshdup */, X86::VMOVSHDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28862 : { 11824 /* vmovshdup */, X86::VMOVSHDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28863 : { 11824 /* vmovshdup */, X86::VMOVSHDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28864 : { 11824 /* vmovshdup */, X86::VMOVSHDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28865 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28866 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28867 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28868 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28869 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28870 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28871 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28872 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28873 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28874 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28875 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28876 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28877 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28878 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28879 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28880 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28881 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28882 : { 11824 /* vmovshdup */, X86::VMOVSHDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28883 : { 11834 /* vmovsldup */, X86::VMOVSLDUPrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28884 : { 11834 /* vmovsldup */, X86::VMOVSLDUPrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28885 : { 11834 /* vmovsldup */, X86::VMOVSLDUPYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28886 : { 11834 /* vmovsldup */, X86::VMOVSLDUPYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28887 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28888 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28889 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28890 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28891 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28892 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28893 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28894 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28895 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28896 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28897 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28898 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28899 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28900 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28901 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28902 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28903 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28904 : { 11834 /* vmovsldup */, X86::VMOVSLDUPZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28905 : { 11844 /* vmovss */, X86::VMOVSSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
28906 : { 11844 /* vmovss */, X86::VMOVSSZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
28907 : { 11844 /* vmovss */, X86::VMOVSSmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32 }, },
28908 : { 11844 /* vmovss */, X86::VMOVSSZmr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
28909 : { 11844 /* vmovss */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR128L, MCK_FR32, MCK_VR128H }, },
28910 : { 11844 /* vmovss */, X86::VMOVSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28911 : { 11844 /* vmovss */, X86::VMOVSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28912 : { 11844 /* vmovss */, X86::VMOVSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
28913 : { 11844 /* vmovss */, X86::VMOVSSZmrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28914 : { 11844 /* vmovss */, X86::VMOVSSZrmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
28915 : { 11844 /* vmovss */, X86::VMOVSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28916 : { 11844 /* vmovss */, X86::VMOVSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28917 : { 11851 /* vmovss.s */, X86::VMOVSSrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
28918 : { 11851 /* vmovss.s */, X86::VMOVSSZrr_REV, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
28919 : { 11851 /* vmovss.s */, X86::VMOVSSZrrk_REV, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
28920 : { 11851 /* vmovss.s */, X86::VMOVSSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
28921 : { 11860 /* vmovupd */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28922 : { 11860 /* vmovupd */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28923 : { 11860 /* vmovupd */, X86::VMOVUPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28924 : { 11860 /* vmovupd */, X86::VMOVUPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28925 : { 11860 /* vmovupd */, X86::VMOVUPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28926 : { 11860 /* vmovupd */, X86::VMOVUPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28927 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28928 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28929 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28930 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28931 : { 11860 /* vmovupd */, X86::VMOVUPDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28932 : { 11860 /* vmovupd */, X86::VMOVUPDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28933 : { 11860 /* vmovupd */, X86::VMOVUPDmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28934 : { 11860 /* vmovupd */, X86::VMOVUPDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28935 : { 11860 /* vmovupd */, X86::VMOVUPDYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28936 : { 11860 /* vmovupd */, X86::VMOVUPDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28937 : { 11860 /* vmovupd */, X86::VMOVUPDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28938 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28939 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28940 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28941 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28942 : { 11860 /* vmovupd */, X86::VMOVUPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28943 : { 11860 /* vmovupd */, X86::VMOVUPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28944 : { 11860 /* vmovupd */, X86::VMOVUPDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28945 : { 11860 /* vmovupd */, X86::VMOVUPDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28946 : { 11860 /* vmovupd */, X86::VMOVUPDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28947 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28948 : { 11860 /* vmovupd */, X86::VMOVUPDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28949 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28950 : { 11860 /* vmovupd */, X86::VMOVUPDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28951 : { 11860 /* vmovupd */, X86::VMOVUPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28952 : { 11860 /* vmovupd */, X86::VMOVUPDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28953 : { 11868 /* vmovupd.s */, X86::VMOVUPDrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28954 : { 11868 /* vmovupd.s */, X86::VMOVUPDYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28955 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28956 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28957 : { 11868 /* vmovupd.s */, X86::VMOVUPDZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28958 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28959 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28960 : { 11868 /* vmovupd.s */, X86::VMOVUPDZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28961 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28962 : { 11868 /* vmovupd.s */, X86::VMOVUPDZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28963 : { 11868 /* vmovupd.s */, X86::VMOVUPDZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28964 : { 11878 /* vmovups */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR128L, MCK_VR128H }, },
28965 : { 11878 /* vmovups */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256L, MCK_VR256H }, },
28966 : { 11878 /* vmovups */, X86::VMOVUPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28967 : { 11878 /* vmovups */, X86::VMOVUPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
28968 : { 11878 /* vmovups */, X86::VMOVUPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28969 : { 11878 /* vmovups */, X86::VMOVUPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
28970 : { 11878 /* vmovups */, X86::VMOVUPSZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28971 : { 11878 /* vmovups */, X86::VMOVUPSZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
28972 : { 11878 /* vmovups */, X86::VMOVUPSZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
28973 : { 11878 /* vmovups */, X86::VMOVUPSZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
28974 : { 11878 /* vmovups */, X86::VMOVUPSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
28975 : { 11878 /* vmovups */, X86::VMOVUPSZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
28976 : { 11878 /* vmovups */, X86::VMOVUPSmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32 }, },
28977 : { 11878 /* vmovups */, X86::VMOVUPSZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
28978 : { 11878 /* vmovups */, X86::VMOVUPSYmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256 }, },
28979 : { 11878 /* vmovups */, X86::VMOVUPSZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
28980 : { 11878 /* vmovups */, X86::VMOVUPSZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
28981 : { 11878 /* vmovups */, X86::VMOVUPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28982 : { 11878 /* vmovups */, X86::VMOVUPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
28983 : { 11878 /* vmovups */, X86::VMOVUPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28984 : { 11878 /* vmovups */, X86::VMOVUPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
28985 : { 11878 /* vmovups */, X86::VMOVUPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28986 : { 11878 /* vmovups */, X86::VMOVUPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
28987 : { 11878 /* vmovups */, X86::VMOVUPSZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
28988 : { 11878 /* vmovups */, X86::VMOVUPSZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
28989 : { 11878 /* vmovups */, X86::VMOVUPSZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
28990 : { 11878 /* vmovups */, X86::VMOVUPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
28991 : { 11878 /* vmovups */, X86::VMOVUPSZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
28992 : { 11878 /* vmovups */, X86::VMOVUPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
28993 : { 11878 /* vmovups */, X86::VMOVUPSZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
28994 : { 11878 /* vmovups */, X86::VMOVUPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
28995 : { 11878 /* vmovups */, X86::VMOVUPSZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
28996 : { 11886 /* vmovups.s */, X86::VMOVUPSrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
28997 : { 11886 /* vmovups.s */, X86::VMOVUPSYrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
28998 : { 11886 /* vmovups.s */, X86::VMOVUPSZ128rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
28999 : { 11886 /* vmovups.s */, X86::VMOVUPSZ256rr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
29000 : { 11886 /* vmovups.s */, X86::VMOVUPSZrr_REV, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
29001 : { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29002 : { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29003 : { 11886 /* vmovups.s */, X86::VMOVUPSZrrk_REV, Convert__Reg1_0__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29004 : { 11886 /* vmovups.s */, X86::VMOVUPSZ128rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29005 : { 11886 /* vmovups.s */, X86::VMOVUPSZ256rrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29006 : { 11886 /* vmovups.s */, X86::VMOVUPSZrrkz_REV, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29007 : { 11896 /* vmpsadbw */, X86::VMPSADBWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29008 : { 11896 /* vmpsadbw */, X86::VMPSADBWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29009 : { 11896 /* vmpsadbw */, X86::VMPSADBWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29010 : { 11896 /* vmpsadbw */, X86::VMPSADBWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29011 : { 11905 /* vmptrld */, X86::VMPTRLDm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
29012 : { 11913 /* vmptrst */, X86::VMPTRSTm, Convert__Mem645_0, 0, { MCK_Mem64 }, },
29013 : { 11921 /* vmread */, X86::VMREAD32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29014 : { 11921 /* vmread */, X86::VMREAD64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
29015 : { 11921 /* vmread */, X86::VMREAD32mr, Convert__Mem325_0__Reg1_1, Feature_Not64BitMode, { MCK_Mem32, MCK_GR32 }, },
29016 : { 11921 /* vmread */, X86::VMREAD64mr, Convert__Mem645_0__Reg1_1, Feature_In64BitMode, { MCK_Mem64, MCK_GR64 }, },
29017 : { 11944 /* vmresume */, X86::VMRESUME, Convert_NoOperands, 0, { }, },
29018 : { 11953 /* vmrun */, X86::VMRUN32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
29019 : { 11953 /* vmrun */, X86::VMRUN64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
29020 : { 11959 /* vmsave */, X86::VMSAVE32, Convert_NoOperands, Feature_Not64BitMode, { MCK_EAX }, },
29021 : { 11959 /* vmsave */, X86::VMSAVE64, Convert_NoOperands, Feature_In64BitMode, { MCK_RAX }, },
29022 : { 11966 /* vmulpd */, X86::VMULPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29023 : { 11966 /* vmulpd */, X86::VMULPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29024 : { 11966 /* vmulpd */, X86::VMULPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29025 : { 11966 /* vmulpd */, X86::VMULPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29026 : { 11966 /* vmulpd */, X86::VMULPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29027 : { 11966 /* vmulpd */, X86::VMULPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29028 : { 11966 /* vmulpd */, X86::VMULPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29029 : { 11966 /* vmulpd */, X86::VMULPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29030 : { 11966 /* vmulpd */, X86::VMULPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29031 : { 11966 /* vmulpd */, X86::VMULPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29032 : { 11966 /* vmulpd */, X86::VMULPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29033 : { 11966 /* vmulpd */, X86::VMULPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29034 : { 11966 /* vmulpd */, X86::VMULPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29035 : { 11966 /* vmulpd */, X86::VMULPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29036 : { 11966 /* vmulpd */, X86::VMULPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29037 : { 11966 /* vmulpd */, X86::VMULPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29038 : { 11966 /* vmulpd */, X86::VMULPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29039 : { 11966 /* vmulpd */, X86::VMULPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29040 : { 11966 /* vmulpd */, X86::VMULPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29041 : { 11966 /* vmulpd */, X86::VMULPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29042 : { 11966 /* vmulpd */, X86::VMULPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29043 : { 11966 /* vmulpd */, X86::VMULPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29044 : { 11966 /* vmulpd */, X86::VMULPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29045 : { 11966 /* vmulpd */, X86::VMULPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29046 : { 11966 /* vmulpd */, X86::VMULPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29047 : { 11966 /* vmulpd */, X86::VMULPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29048 : { 11966 /* vmulpd */, X86::VMULPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29049 : { 11966 /* vmulpd */, X86::VMULPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29050 : { 11966 /* vmulpd */, X86::VMULPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29051 : { 11966 /* vmulpd */, X86::VMULPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29052 : { 11966 /* vmulpd */, X86::VMULPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29053 : { 11966 /* vmulpd */, X86::VMULPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29054 : { 11966 /* vmulpd */, X86::VMULPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29055 : { 11966 /* vmulpd */, X86::VMULPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29056 : { 11973 /* vmulps */, X86::VMULPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29057 : { 11973 /* vmulps */, X86::VMULPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29058 : { 11973 /* vmulps */, X86::VMULPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29059 : { 11973 /* vmulps */, X86::VMULPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29060 : { 11973 /* vmulps */, X86::VMULPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29061 : { 11973 /* vmulps */, X86::VMULPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29062 : { 11973 /* vmulps */, X86::VMULPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29063 : { 11973 /* vmulps */, X86::VMULPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29064 : { 11973 /* vmulps */, X86::VMULPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29065 : { 11973 /* vmulps */, X86::VMULPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29066 : { 11973 /* vmulps */, X86::VMULPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29067 : { 11973 /* vmulps */, X86::VMULPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29068 : { 11973 /* vmulps */, X86::VMULPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29069 : { 11973 /* vmulps */, X86::VMULPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29070 : { 11973 /* vmulps */, X86::VMULPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29071 : { 11973 /* vmulps */, X86::VMULPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29072 : { 11973 /* vmulps */, X86::VMULPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29073 : { 11973 /* vmulps */, X86::VMULPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29074 : { 11973 /* vmulps */, X86::VMULPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29075 : { 11973 /* vmulps */, X86::VMULPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29076 : { 11973 /* vmulps */, X86::VMULPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29077 : { 11973 /* vmulps */, X86::VMULPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29078 : { 11973 /* vmulps */, X86::VMULPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29079 : { 11973 /* vmulps */, X86::VMULPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29080 : { 11973 /* vmulps */, X86::VMULPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29081 : { 11973 /* vmulps */, X86::VMULPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29082 : { 11973 /* vmulps */, X86::VMULPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29083 : { 11973 /* vmulps */, X86::VMULPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29084 : { 11973 /* vmulps */, X86::VMULPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29085 : { 11973 /* vmulps */, X86::VMULPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29086 : { 11973 /* vmulps */, X86::VMULPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29087 : { 11973 /* vmulps */, X86::VMULPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29088 : { 11973 /* vmulps */, X86::VMULPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
29089 : { 11973 /* vmulps */, X86::VMULPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29090 : { 11980 /* vmulsd */, X86::VMULSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29091 : { 11980 /* vmulsd */, X86::VMULSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
29092 : { 11980 /* vmulsd */, X86::VMULSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29093 : { 11980 /* vmulsd */, X86::VMULSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
29094 : { 11980 /* vmulsd */, X86::VMULSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
29095 : { 11980 /* vmulsd */, X86::VMULSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29096 : { 11980 /* vmulsd */, X86::VMULSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
29097 : { 11980 /* vmulsd */, X86::VMULSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29098 : { 11980 /* vmulsd */, X86::VMULSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
29099 : { 11980 /* vmulsd */, X86::VMULSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
29100 : { 11980 /* vmulsd */, X86::VMULSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
29101 : { 11987 /* vmulss */, X86::VMULSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29102 : { 11987 /* vmulss */, X86::VMULSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
29103 : { 11987 /* vmulss */, X86::VMULSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29104 : { 11987 /* vmulss */, X86::VMULSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
29105 : { 11987 /* vmulss */, X86::VMULSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
29106 : { 11987 /* vmulss */, X86::VMULSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29107 : { 11987 /* vmulss */, X86::VMULSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
29108 : { 11987 /* vmulss */, X86::VMULSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29109 : { 11987 /* vmulss */, X86::VMULSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
29110 : { 11987 /* vmulss */, X86::VMULSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
29111 : { 11987 /* vmulss */, X86::VMULSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
29112 : { 11994 /* vmwrite */, X86::VMWRITE32rr, Convert__Reg1_0__Reg1_1, Feature_Not64BitMode, { MCK_GR32, MCK_GR32 }, },
29113 : { 11994 /* vmwrite */, X86::VMWRITE32rm, Convert__Reg1_0__Mem325_1, Feature_Not64BitMode, { MCK_GR32, MCK_Mem32 }, },
29114 : { 11994 /* vmwrite */, X86::VMWRITE64rr, Convert__Reg1_0__Reg1_1, Feature_In64BitMode, { MCK_GR64, MCK_GR64 }, },
29115 : { 11994 /* vmwrite */, X86::VMWRITE64rm, Convert__Reg1_0__Mem645_1, Feature_In64BitMode, { MCK_GR64, MCK_Mem64 }, },
29116 : { 12020 /* vmxoff */, X86::VMXOFF, Convert_NoOperands, 0, { }, },
29117 : { 12027 /* vmxon */, X86::VMXON, Convert__Mem645_0, 0, { MCK_Mem64 }, },
29118 : { 12033 /* vorpd */, X86::VORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29119 : { 12033 /* vorpd */, X86::VORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29120 : { 12033 /* vorpd */, X86::VORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29121 : { 12033 /* vorpd */, X86::VORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29122 : { 12033 /* vorpd */, X86::VORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29123 : { 12033 /* vorpd */, X86::VORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29124 : { 12033 /* vorpd */, X86::VORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29125 : { 12033 /* vorpd */, X86::VORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29126 : { 12033 /* vorpd */, X86::VORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29127 : { 12033 /* vorpd */, X86::VORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29128 : { 12033 /* vorpd */, X86::VORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29129 : { 12033 /* vorpd */, X86::VORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29130 : { 12033 /* vorpd */, X86::VORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29131 : { 12033 /* vorpd */, X86::VORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29132 : { 12033 /* vorpd */, X86::VORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29133 : { 12033 /* vorpd */, X86::VORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29134 : { 12033 /* vorpd */, X86::VORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29135 : { 12033 /* vorpd */, X86::VORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29136 : { 12033 /* vorpd */, X86::VORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29137 : { 12033 /* vorpd */, X86::VORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29138 : { 12033 /* vorpd */, X86::VORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29139 : { 12033 /* vorpd */, X86::VORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29140 : { 12033 /* vorpd */, X86::VORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29141 : { 12033 /* vorpd */, X86::VORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29142 : { 12033 /* vorpd */, X86::VORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29143 : { 12033 /* vorpd */, X86::VORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29144 : { 12033 /* vorpd */, X86::VORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29145 : { 12033 /* vorpd */, X86::VORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29146 : { 12033 /* vorpd */, X86::VORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29147 : { 12033 /* vorpd */, X86::VORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29148 : { 12033 /* vorpd */, X86::VORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29149 : { 12039 /* vorps */, X86::VORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29150 : { 12039 /* vorps */, X86::VORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29151 : { 12039 /* vorps */, X86::VORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29152 : { 12039 /* vorps */, X86::VORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29153 : { 12039 /* vorps */, X86::VORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29154 : { 12039 /* vorps */, X86::VORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29155 : { 12039 /* vorps */, X86::VORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29156 : { 12039 /* vorps */, X86::VORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29157 : { 12039 /* vorps */, X86::VORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29158 : { 12039 /* vorps */, X86::VORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29159 : { 12039 /* vorps */, X86::VORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29160 : { 12039 /* vorps */, X86::VORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29161 : { 12039 /* vorps */, X86::VORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29162 : { 12039 /* vorps */, X86::VORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29163 : { 12039 /* vorps */, X86::VORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29164 : { 12039 /* vorps */, X86::VORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29165 : { 12039 /* vorps */, X86::VORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29166 : { 12039 /* vorps */, X86::VORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29167 : { 12039 /* vorps */, X86::VORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29168 : { 12039 /* vorps */, X86::VORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29169 : { 12039 /* vorps */, X86::VORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29170 : { 12039 /* vorps */, X86::VORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29171 : { 12039 /* vorps */, X86::VORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29172 : { 12039 /* vorps */, X86::VORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29173 : { 12039 /* vorps */, X86::VORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29174 : { 12039 /* vorps */, X86::VORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29175 : { 12039 /* vorps */, X86::VORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29176 : { 12039 /* vorps */, X86::VORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29177 : { 12039 /* vorps */, X86::VORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29178 : { 12039 /* vorps */, X86::VORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29179 : { 12039 /* vorps */, X86::VORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29180 : { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
29181 : { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
29182 : { 12045 /* vp4dpwssd */, X86::VP4DPWSSDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
29183 : { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
29184 : { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
29185 : { 12055 /* vp4dpwssds */, X86::VP4DPWSSDSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
29186 : { 12066 /* vpabsb */, X86::VPABSBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29187 : { 12066 /* vpabsb */, X86::VPABSBrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
29188 : { 12066 /* vpabsb */, X86::VPABSBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
29189 : { 12066 /* vpabsb */, X86::VPABSBYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
29190 : { 12066 /* vpabsb */, X86::VPABSBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29191 : { 12066 /* vpabsb */, X86::VPABSBZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
29192 : { 12066 /* vpabsb */, X86::VPABSBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
29193 : { 12066 /* vpabsb */, X86::VPABSBZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
29194 : { 12066 /* vpabsb */, X86::VPABSBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
29195 : { 12066 /* vpabsb */, X86::VPABSBZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
29196 : { 12066 /* vpabsb */, X86::VPABSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29197 : { 12066 /* vpabsb */, X86::VPABSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29198 : { 12066 /* vpabsb */, X86::VPABSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29199 : { 12066 /* vpabsb */, X86::VPABSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29200 : { 12066 /* vpabsb */, X86::VPABSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29201 : { 12066 /* vpabsb */, X86::VPABSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29202 : { 12066 /* vpabsb */, X86::VPABSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29203 : { 12066 /* vpabsb */, X86::VPABSBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29204 : { 12066 /* vpabsb */, X86::VPABSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29205 : { 12066 /* vpabsb */, X86::VPABSBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29206 : { 12066 /* vpabsb */, X86::VPABSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29207 : { 12066 /* vpabsb */, X86::VPABSBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29208 : { 12073 /* vpabsd */, X86::VPABSDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29209 : { 12073 /* vpabsd */, X86::VPABSDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
29210 : { 12073 /* vpabsd */, X86::VPABSDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
29211 : { 12073 /* vpabsd */, X86::VPABSDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
29212 : { 12073 /* vpabsd */, X86::VPABSDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29213 : { 12073 /* vpabsd */, X86::VPABSDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
29214 : { 12073 /* vpabsd */, X86::VPABSDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
29215 : { 12073 /* vpabsd */, X86::VPABSDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
29216 : { 12073 /* vpabsd */, X86::VPABSDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
29217 : { 12073 /* vpabsd */, X86::VPABSDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
29218 : { 12073 /* vpabsd */, X86::VPABSDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29219 : { 12073 /* vpabsd */, X86::VPABSDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29220 : { 12073 /* vpabsd */, X86::VPABSDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29221 : { 12073 /* vpabsd */, X86::VPABSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29222 : { 12073 /* vpabsd */, X86::VPABSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29223 : { 12073 /* vpabsd */, X86::VPABSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29224 : { 12073 /* vpabsd */, X86::VPABSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29225 : { 12073 /* vpabsd */, X86::VPABSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29226 : { 12073 /* vpabsd */, X86::VPABSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29227 : { 12073 /* vpabsd */, X86::VPABSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29228 : { 12073 /* vpabsd */, X86::VPABSDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29229 : { 12073 /* vpabsd */, X86::VPABSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
29230 : { 12073 /* vpabsd */, X86::VPABSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29231 : { 12073 /* vpabsd */, X86::VPABSDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29232 : { 12073 /* vpabsd */, X86::VPABSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
29233 : { 12073 /* vpabsd */, X86::VPABSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29234 : { 12073 /* vpabsd */, X86::VPABSDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29235 : { 12073 /* vpabsd */, X86::VPABSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
29236 : { 12073 /* vpabsd */, X86::VPABSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
29237 : { 12073 /* vpabsd */, X86::VPABSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
29238 : { 12073 /* vpabsd */, X86::VPABSDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
29239 : { 12080 /* vpabsq */, X86::VPABSQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29240 : { 12080 /* vpabsq */, X86::VPABSQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
29241 : { 12080 /* vpabsq */, X86::VPABSQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
29242 : { 12080 /* vpabsq */, X86::VPABSQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
29243 : { 12080 /* vpabsq */, X86::VPABSQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
29244 : { 12080 /* vpabsq */, X86::VPABSQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
29245 : { 12080 /* vpabsq */, X86::VPABSQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29246 : { 12080 /* vpabsq */, X86::VPABSQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29247 : { 12080 /* vpabsq */, X86::VPABSQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29248 : { 12080 /* vpabsq */, X86::VPABSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29249 : { 12080 /* vpabsq */, X86::VPABSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29250 : { 12080 /* vpabsq */, X86::VPABSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29251 : { 12080 /* vpabsq */, X86::VPABSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29252 : { 12080 /* vpabsq */, X86::VPABSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29253 : { 12080 /* vpabsq */, X86::VPABSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29254 : { 12080 /* vpabsq */, X86::VPABSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29255 : { 12080 /* vpabsq */, X86::VPABSQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29256 : { 12080 /* vpabsq */, X86::VPABSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
29257 : { 12080 /* vpabsq */, X86::VPABSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29258 : { 12080 /* vpabsq */, X86::VPABSQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29259 : { 12080 /* vpabsq */, X86::VPABSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
29260 : { 12080 /* vpabsq */, X86::VPABSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29261 : { 12080 /* vpabsq */, X86::VPABSQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29262 : { 12080 /* vpabsq */, X86::VPABSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
29263 : { 12080 /* vpabsq */, X86::VPABSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
29264 : { 12080 /* vpabsq */, X86::VPABSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
29265 : { 12080 /* vpabsq */, X86::VPABSQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
29266 : { 12087 /* vpabsw */, X86::VPABSWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29267 : { 12087 /* vpabsw */, X86::VPABSWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
29268 : { 12087 /* vpabsw */, X86::VPABSWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
29269 : { 12087 /* vpabsw */, X86::VPABSWYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
29270 : { 12087 /* vpabsw */, X86::VPABSWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29271 : { 12087 /* vpabsw */, X86::VPABSWZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
29272 : { 12087 /* vpabsw */, X86::VPABSWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
29273 : { 12087 /* vpabsw */, X86::VPABSWZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
29274 : { 12087 /* vpabsw */, X86::VPABSWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
29275 : { 12087 /* vpabsw */, X86::VPABSWZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
29276 : { 12087 /* vpabsw */, X86::VPABSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29277 : { 12087 /* vpabsw */, X86::VPABSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
29278 : { 12087 /* vpabsw */, X86::VPABSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
29279 : { 12087 /* vpabsw */, X86::VPABSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
29280 : { 12087 /* vpabsw */, X86::VPABSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
29281 : { 12087 /* vpabsw */, X86::VPABSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
29282 : { 12087 /* vpabsw */, X86::VPABSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29283 : { 12087 /* vpabsw */, X86::VPABSWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
29284 : { 12087 /* vpabsw */, X86::VPABSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
29285 : { 12087 /* vpabsw */, X86::VPABSWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
29286 : { 12087 /* vpabsw */, X86::VPABSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
29287 : { 12087 /* vpabsw */, X86::VPABSWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
29288 : { 12094 /* vpackssdw */, X86::VPACKSSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29289 : { 12094 /* vpackssdw */, X86::VPACKSSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29290 : { 12094 /* vpackssdw */, X86::VPACKSSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29291 : { 12094 /* vpackssdw */, X86::VPACKSSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29292 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29293 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29294 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29295 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29296 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29297 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29298 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29299 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29300 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29301 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29302 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29303 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29304 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29305 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29306 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29307 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29308 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29309 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29310 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29311 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29312 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29313 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29314 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29315 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29316 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29317 : { 12094 /* vpackssdw */, X86::VPACKSSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29318 : { 12094 /* vpackssdw */, X86::VPACKSSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29319 : { 12104 /* vpacksswb */, X86::VPACKSSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29320 : { 12104 /* vpacksswb */, X86::VPACKSSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29321 : { 12104 /* vpacksswb */, X86::VPACKSSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29322 : { 12104 /* vpacksswb */, X86::VPACKSSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29323 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29324 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29325 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29326 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29327 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29328 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29329 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29330 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29331 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29332 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29333 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29334 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29335 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29336 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29337 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29338 : { 12104 /* vpacksswb */, X86::VPACKSSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29339 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29340 : { 12104 /* vpacksswb */, X86::VPACKSSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29341 : { 12114 /* vpackusdw */, X86::VPACKUSDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29342 : { 12114 /* vpackusdw */, X86::VPACKUSDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29343 : { 12114 /* vpackusdw */, X86::VPACKUSDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29344 : { 12114 /* vpackusdw */, X86::VPACKUSDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29345 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29346 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29347 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29348 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29349 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29350 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29351 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29352 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29353 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29354 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29355 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29356 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29357 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29358 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29359 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29360 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29361 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29362 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29363 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29364 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29365 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29366 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29367 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29368 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29369 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29370 : { 12114 /* vpackusdw */, X86::VPACKUSDWZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29371 : { 12114 /* vpackusdw */, X86::VPACKUSDWZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29372 : { 12124 /* vpackuswb */, X86::VPACKUSWBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29373 : { 12124 /* vpackuswb */, X86::VPACKUSWBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29374 : { 12124 /* vpackuswb */, X86::VPACKUSWBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29375 : { 12124 /* vpackuswb */, X86::VPACKUSWBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29376 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29377 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29378 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29379 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29380 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29381 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29382 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29383 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29384 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29385 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29386 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29387 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29388 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29389 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29390 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29391 : { 12124 /* vpackuswb */, X86::VPACKUSWBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29392 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29393 : { 12124 /* vpackuswb */, X86::VPACKUSWBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29394 : { 12134 /* vpaddb */, X86::VPADDBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29395 : { 12134 /* vpaddb */, X86::VPADDBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29396 : { 12134 /* vpaddb */, X86::VPADDBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29397 : { 12134 /* vpaddb */, X86::VPADDBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29398 : { 12134 /* vpaddb */, X86::VPADDBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29399 : { 12134 /* vpaddb */, X86::VPADDBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29400 : { 12134 /* vpaddb */, X86::VPADDBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29401 : { 12134 /* vpaddb */, X86::VPADDBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29402 : { 12134 /* vpaddb */, X86::VPADDBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29403 : { 12134 /* vpaddb */, X86::VPADDBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29404 : { 12134 /* vpaddb */, X86::VPADDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29405 : { 12134 /* vpaddb */, X86::VPADDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29406 : { 12134 /* vpaddb */, X86::VPADDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29407 : { 12134 /* vpaddb */, X86::VPADDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29408 : { 12134 /* vpaddb */, X86::VPADDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29409 : { 12134 /* vpaddb */, X86::VPADDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29410 : { 12134 /* vpaddb */, X86::VPADDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29411 : { 12134 /* vpaddb */, X86::VPADDBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29412 : { 12134 /* vpaddb */, X86::VPADDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29413 : { 12134 /* vpaddb */, X86::VPADDBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29414 : { 12134 /* vpaddb */, X86::VPADDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29415 : { 12134 /* vpaddb */, X86::VPADDBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29416 : { 12141 /* vpaddd */, X86::VPADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29417 : { 12141 /* vpaddd */, X86::VPADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29418 : { 12141 /* vpaddd */, X86::VPADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29419 : { 12141 /* vpaddd */, X86::VPADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29420 : { 12141 /* vpaddd */, X86::VPADDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29421 : { 12141 /* vpaddd */, X86::VPADDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29422 : { 12141 /* vpaddd */, X86::VPADDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29423 : { 12141 /* vpaddd */, X86::VPADDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29424 : { 12141 /* vpaddd */, X86::VPADDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29425 : { 12141 /* vpaddd */, X86::VPADDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29426 : { 12141 /* vpaddd */, X86::VPADDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29427 : { 12141 /* vpaddd */, X86::VPADDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29428 : { 12141 /* vpaddd */, X86::VPADDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29429 : { 12141 /* vpaddd */, X86::VPADDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29430 : { 12141 /* vpaddd */, X86::VPADDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29431 : { 12141 /* vpaddd */, X86::VPADDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29432 : { 12141 /* vpaddd */, X86::VPADDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29433 : { 12141 /* vpaddd */, X86::VPADDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29434 : { 12141 /* vpaddd */, X86::VPADDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29435 : { 12141 /* vpaddd */, X86::VPADDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29436 : { 12141 /* vpaddd */, X86::VPADDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29437 : { 12141 /* vpaddd */, X86::VPADDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29438 : { 12141 /* vpaddd */, X86::VPADDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29439 : { 12141 /* vpaddd */, X86::VPADDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29440 : { 12141 /* vpaddd */, X86::VPADDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29441 : { 12141 /* vpaddd */, X86::VPADDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29442 : { 12141 /* vpaddd */, X86::VPADDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29443 : { 12141 /* vpaddd */, X86::VPADDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29444 : { 12141 /* vpaddd */, X86::VPADDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29445 : { 12141 /* vpaddd */, X86::VPADDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29446 : { 12141 /* vpaddd */, X86::VPADDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29447 : { 12148 /* vpaddq */, X86::VPADDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29448 : { 12148 /* vpaddq */, X86::VPADDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29449 : { 12148 /* vpaddq */, X86::VPADDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29450 : { 12148 /* vpaddq */, X86::VPADDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29451 : { 12148 /* vpaddq */, X86::VPADDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29452 : { 12148 /* vpaddq */, X86::VPADDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29453 : { 12148 /* vpaddq */, X86::VPADDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29454 : { 12148 /* vpaddq */, X86::VPADDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29455 : { 12148 /* vpaddq */, X86::VPADDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29456 : { 12148 /* vpaddq */, X86::VPADDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29457 : { 12148 /* vpaddq */, X86::VPADDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29458 : { 12148 /* vpaddq */, X86::VPADDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29459 : { 12148 /* vpaddq */, X86::VPADDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29460 : { 12148 /* vpaddq */, X86::VPADDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29461 : { 12148 /* vpaddq */, X86::VPADDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29462 : { 12148 /* vpaddq */, X86::VPADDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29463 : { 12148 /* vpaddq */, X86::VPADDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29464 : { 12148 /* vpaddq */, X86::VPADDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29465 : { 12148 /* vpaddq */, X86::VPADDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29466 : { 12148 /* vpaddq */, X86::VPADDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29467 : { 12148 /* vpaddq */, X86::VPADDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29468 : { 12148 /* vpaddq */, X86::VPADDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29469 : { 12148 /* vpaddq */, X86::VPADDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29470 : { 12148 /* vpaddq */, X86::VPADDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29471 : { 12148 /* vpaddq */, X86::VPADDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29472 : { 12148 /* vpaddq */, X86::VPADDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29473 : { 12148 /* vpaddq */, X86::VPADDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29474 : { 12148 /* vpaddq */, X86::VPADDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29475 : { 12148 /* vpaddq */, X86::VPADDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29476 : { 12148 /* vpaddq */, X86::VPADDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29477 : { 12148 /* vpaddq */, X86::VPADDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29478 : { 12155 /* vpaddsb */, X86::VPADDSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29479 : { 12155 /* vpaddsb */, X86::VPADDSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29480 : { 12155 /* vpaddsb */, X86::VPADDSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29481 : { 12155 /* vpaddsb */, X86::VPADDSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29482 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29483 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29484 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29485 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29486 : { 12155 /* vpaddsb */, X86::VPADDSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29487 : { 12155 /* vpaddsb */, X86::VPADDSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29488 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29489 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29490 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29491 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29492 : { 12155 /* vpaddsb */, X86::VPADDSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29493 : { 12155 /* vpaddsb */, X86::VPADDSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29494 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29495 : { 12155 /* vpaddsb */, X86::VPADDSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29496 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29497 : { 12155 /* vpaddsb */, X86::VPADDSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29498 : { 12155 /* vpaddsb */, X86::VPADDSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29499 : { 12155 /* vpaddsb */, X86::VPADDSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29500 : { 12163 /* vpaddsw */, X86::VPADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29501 : { 12163 /* vpaddsw */, X86::VPADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29502 : { 12163 /* vpaddsw */, X86::VPADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29503 : { 12163 /* vpaddsw */, X86::VPADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29504 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29505 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29506 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29507 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29508 : { 12163 /* vpaddsw */, X86::VPADDSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29509 : { 12163 /* vpaddsw */, X86::VPADDSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29510 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29511 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29512 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29513 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29514 : { 12163 /* vpaddsw */, X86::VPADDSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29515 : { 12163 /* vpaddsw */, X86::VPADDSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29516 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29517 : { 12163 /* vpaddsw */, X86::VPADDSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29518 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29519 : { 12163 /* vpaddsw */, X86::VPADDSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29520 : { 12163 /* vpaddsw */, X86::VPADDSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29521 : { 12163 /* vpaddsw */, X86::VPADDSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29522 : { 12171 /* vpaddusb */, X86::VPADDUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29523 : { 12171 /* vpaddusb */, X86::VPADDUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29524 : { 12171 /* vpaddusb */, X86::VPADDUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29525 : { 12171 /* vpaddusb */, X86::VPADDUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29526 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29527 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29528 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29529 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29530 : { 12171 /* vpaddusb */, X86::VPADDUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29531 : { 12171 /* vpaddusb */, X86::VPADDUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29532 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29533 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29534 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29535 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29536 : { 12171 /* vpaddusb */, X86::VPADDUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29537 : { 12171 /* vpaddusb */, X86::VPADDUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29538 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29539 : { 12171 /* vpaddusb */, X86::VPADDUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29540 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29541 : { 12171 /* vpaddusb */, X86::VPADDUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29542 : { 12171 /* vpaddusb */, X86::VPADDUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29543 : { 12171 /* vpaddusb */, X86::VPADDUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29544 : { 12180 /* vpaddusw */, X86::VPADDUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29545 : { 12180 /* vpaddusw */, X86::VPADDUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29546 : { 12180 /* vpaddusw */, X86::VPADDUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29547 : { 12180 /* vpaddusw */, X86::VPADDUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29548 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29549 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29550 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29551 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29552 : { 12180 /* vpaddusw */, X86::VPADDUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29553 : { 12180 /* vpaddusw */, X86::VPADDUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29554 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29555 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29556 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29557 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29558 : { 12180 /* vpaddusw */, X86::VPADDUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29559 : { 12180 /* vpaddusw */, X86::VPADDUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29560 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29561 : { 12180 /* vpaddusw */, X86::VPADDUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29562 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29563 : { 12180 /* vpaddusw */, X86::VPADDUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29564 : { 12180 /* vpaddusw */, X86::VPADDUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29565 : { 12180 /* vpaddusw */, X86::VPADDUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29566 : { 12189 /* vpaddw */, X86::VPADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29567 : { 12189 /* vpaddw */, X86::VPADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29568 : { 12189 /* vpaddw */, X86::VPADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29569 : { 12189 /* vpaddw */, X86::VPADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29570 : { 12189 /* vpaddw */, X86::VPADDWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29571 : { 12189 /* vpaddw */, X86::VPADDWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29572 : { 12189 /* vpaddw */, X86::VPADDWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29573 : { 12189 /* vpaddw */, X86::VPADDWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29574 : { 12189 /* vpaddw */, X86::VPADDWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29575 : { 12189 /* vpaddw */, X86::VPADDWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29576 : { 12189 /* vpaddw */, X86::VPADDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29577 : { 12189 /* vpaddw */, X86::VPADDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29578 : { 12189 /* vpaddw */, X86::VPADDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29579 : { 12189 /* vpaddw */, X86::VPADDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29580 : { 12189 /* vpaddw */, X86::VPADDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29581 : { 12189 /* vpaddw */, X86::VPADDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29582 : { 12189 /* vpaddw */, X86::VPADDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29583 : { 12189 /* vpaddw */, X86::VPADDWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29584 : { 12189 /* vpaddw */, X86::VPADDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29585 : { 12189 /* vpaddw */, X86::VPADDWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29586 : { 12189 /* vpaddw */, X86::VPADDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29587 : { 12189 /* vpaddw */, X86::VPADDWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29588 : { 12196 /* vpalignr */, X86::VPALIGNRrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29589 : { 12196 /* vpalignr */, X86::VPALIGNRrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29590 : { 12196 /* vpalignr */, X86::VPALIGNRYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29591 : { 12196 /* vpalignr */, X86::VPALIGNRYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29592 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29593 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29594 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29595 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29596 : { 12196 /* vpalignr */, X86::VPALIGNRZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29597 : { 12196 /* vpalignr */, X86::VPALIGNRZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29598 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29599 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29600 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29601 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29602 : { 12196 /* vpalignr */, X86::VPALIGNRZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29603 : { 12196 /* vpalignr */, X86::VPALIGNRZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29604 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
29605 : { 12196 /* vpalignr */, X86::VPALIGNRZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29606 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
29607 : { 12196 /* vpalignr */, X86::VPALIGNRZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29608 : { 12196 /* vpalignr */, X86::VPALIGNRZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
29609 : { 12196 /* vpalignr */, X86::VPALIGNRZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
29610 : { 12205 /* vpand */, X86::VPANDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29611 : { 12205 /* vpand */, X86::VPANDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29612 : { 12205 /* vpand */, X86::VPANDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29613 : { 12205 /* vpand */, X86::VPANDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29614 : { 12211 /* vpandd */, X86::VPANDDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29615 : { 12211 /* vpandd */, X86::VPANDDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29616 : { 12211 /* vpandd */, X86::VPANDDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29617 : { 12211 /* vpandd */, X86::VPANDDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29618 : { 12211 /* vpandd */, X86::VPANDDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29619 : { 12211 /* vpandd */, X86::VPANDDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29620 : { 12211 /* vpandd */, X86::VPANDDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29621 : { 12211 /* vpandd */, X86::VPANDDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29622 : { 12211 /* vpandd */, X86::VPANDDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29623 : { 12211 /* vpandd */, X86::VPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29624 : { 12211 /* vpandd */, X86::VPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29625 : { 12211 /* vpandd */, X86::VPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29626 : { 12211 /* vpandd */, X86::VPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29627 : { 12211 /* vpandd */, X86::VPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29628 : { 12211 /* vpandd */, X86::VPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29629 : { 12211 /* vpandd */, X86::VPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29630 : { 12211 /* vpandd */, X86::VPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29631 : { 12211 /* vpandd */, X86::VPANDDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29632 : { 12211 /* vpandd */, X86::VPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29633 : { 12211 /* vpandd */, X86::VPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29634 : { 12211 /* vpandd */, X86::VPANDDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29635 : { 12211 /* vpandd */, X86::VPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29636 : { 12211 /* vpandd */, X86::VPANDDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29637 : { 12211 /* vpandd */, X86::VPANDDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29638 : { 12211 /* vpandd */, X86::VPANDDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29639 : { 12211 /* vpandd */, X86::VPANDDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29640 : { 12211 /* vpandd */, X86::VPANDDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29641 : { 12218 /* vpandn */, X86::VPANDNrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29642 : { 12218 /* vpandn */, X86::VPANDNrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29643 : { 12218 /* vpandn */, X86::VPANDNYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29644 : { 12218 /* vpandn */, X86::VPANDNYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29645 : { 12225 /* vpandnd */, X86::VPANDNDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29646 : { 12225 /* vpandnd */, X86::VPANDNDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29647 : { 12225 /* vpandnd */, X86::VPANDNDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29648 : { 12225 /* vpandnd */, X86::VPANDNDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29649 : { 12225 /* vpandnd */, X86::VPANDNDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29650 : { 12225 /* vpandnd */, X86::VPANDNDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29651 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29652 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29653 : { 12225 /* vpandnd */, X86::VPANDNDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29654 : { 12225 /* vpandnd */, X86::VPANDNDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29655 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29656 : { 12225 /* vpandnd */, X86::VPANDNDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29657 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29658 : { 12225 /* vpandnd */, X86::VPANDNDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29659 : { 12225 /* vpandnd */, X86::VPANDNDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29660 : { 12225 /* vpandnd */, X86::VPANDNDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29661 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29662 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29663 : { 12225 /* vpandnd */, X86::VPANDNDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29664 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29665 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29666 : { 12225 /* vpandnd */, X86::VPANDNDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29667 : { 12225 /* vpandnd */, X86::VPANDNDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29668 : { 12225 /* vpandnd */, X86::VPANDNDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29669 : { 12225 /* vpandnd */, X86::VPANDNDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29670 : { 12225 /* vpandnd */, X86::VPANDNDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29671 : { 12225 /* vpandnd */, X86::VPANDNDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29672 : { 12233 /* vpandnq */, X86::VPANDNQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29673 : { 12233 /* vpandnq */, X86::VPANDNQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29674 : { 12233 /* vpandnq */, X86::VPANDNQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29675 : { 12233 /* vpandnq */, X86::VPANDNQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29676 : { 12233 /* vpandnq */, X86::VPANDNQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29677 : { 12233 /* vpandnq */, X86::VPANDNQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29678 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29679 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29680 : { 12233 /* vpandnq */, X86::VPANDNQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29681 : { 12233 /* vpandnq */, X86::VPANDNQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29682 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29683 : { 12233 /* vpandnq */, X86::VPANDNQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29684 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29685 : { 12233 /* vpandnq */, X86::VPANDNQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29686 : { 12233 /* vpandnq */, X86::VPANDNQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29687 : { 12233 /* vpandnq */, X86::VPANDNQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29688 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29689 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29690 : { 12233 /* vpandnq */, X86::VPANDNQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29691 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29692 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29693 : { 12233 /* vpandnq */, X86::VPANDNQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29694 : { 12233 /* vpandnq */, X86::VPANDNQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29695 : { 12233 /* vpandnq */, X86::VPANDNQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29696 : { 12233 /* vpandnq */, X86::VPANDNQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29697 : { 12233 /* vpandnq */, X86::VPANDNQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29698 : { 12233 /* vpandnq */, X86::VPANDNQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29699 : { 12241 /* vpandq */, X86::VPANDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29700 : { 12241 /* vpandq */, X86::VPANDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29701 : { 12241 /* vpandq */, X86::VPANDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29702 : { 12241 /* vpandq */, X86::VPANDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29703 : { 12241 /* vpandq */, X86::VPANDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29704 : { 12241 /* vpandq */, X86::VPANDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29705 : { 12241 /* vpandq */, X86::VPANDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29706 : { 12241 /* vpandq */, X86::VPANDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29707 : { 12241 /* vpandq */, X86::VPANDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29708 : { 12241 /* vpandq */, X86::VPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29709 : { 12241 /* vpandq */, X86::VPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29710 : { 12241 /* vpandq */, X86::VPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29711 : { 12241 /* vpandq */, X86::VPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29712 : { 12241 /* vpandq */, X86::VPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29713 : { 12241 /* vpandq */, X86::VPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29714 : { 12241 /* vpandq */, X86::VPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29715 : { 12241 /* vpandq */, X86::VPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29716 : { 12241 /* vpandq */, X86::VPANDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29717 : { 12241 /* vpandq */, X86::VPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29718 : { 12241 /* vpandq */, X86::VPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29719 : { 12241 /* vpandq */, X86::VPANDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29720 : { 12241 /* vpandq */, X86::VPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29721 : { 12241 /* vpandq */, X86::VPANDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29722 : { 12241 /* vpandq */, X86::VPANDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29723 : { 12241 /* vpandq */, X86::VPANDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29724 : { 12241 /* vpandq */, X86::VPANDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29725 : { 12241 /* vpandq */, X86::VPANDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29726 : { 12248 /* vpavgb */, X86::VPAVGBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29727 : { 12248 /* vpavgb */, X86::VPAVGBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29728 : { 12248 /* vpavgb */, X86::VPAVGBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29729 : { 12248 /* vpavgb */, X86::VPAVGBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29730 : { 12248 /* vpavgb */, X86::VPAVGBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29731 : { 12248 /* vpavgb */, X86::VPAVGBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29732 : { 12248 /* vpavgb */, X86::VPAVGBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29733 : { 12248 /* vpavgb */, X86::VPAVGBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29734 : { 12248 /* vpavgb */, X86::VPAVGBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29735 : { 12248 /* vpavgb */, X86::VPAVGBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29736 : { 12248 /* vpavgb */, X86::VPAVGBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29737 : { 12248 /* vpavgb */, X86::VPAVGBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29738 : { 12248 /* vpavgb */, X86::VPAVGBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29739 : { 12248 /* vpavgb */, X86::VPAVGBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29740 : { 12248 /* vpavgb */, X86::VPAVGBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29741 : { 12248 /* vpavgb */, X86::VPAVGBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29742 : { 12248 /* vpavgb */, X86::VPAVGBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29743 : { 12248 /* vpavgb */, X86::VPAVGBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29744 : { 12248 /* vpavgb */, X86::VPAVGBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29745 : { 12248 /* vpavgb */, X86::VPAVGBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29746 : { 12248 /* vpavgb */, X86::VPAVGBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29747 : { 12248 /* vpavgb */, X86::VPAVGBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29748 : { 12255 /* vpavgw */, X86::VPAVGWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
29749 : { 12255 /* vpavgw */, X86::VPAVGWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
29750 : { 12255 /* vpavgw */, X86::VPAVGWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
29751 : { 12255 /* vpavgw */, X86::VPAVGWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
29752 : { 12255 /* vpavgw */, X86::VPAVGWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29753 : { 12255 /* vpavgw */, X86::VPAVGWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29754 : { 12255 /* vpavgw */, X86::VPAVGWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29755 : { 12255 /* vpavgw */, X86::VPAVGWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29756 : { 12255 /* vpavgw */, X86::VPAVGWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29757 : { 12255 /* vpavgw */, X86::VPAVGWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29758 : { 12255 /* vpavgw */, X86::VPAVGWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29759 : { 12255 /* vpavgw */, X86::VPAVGWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29760 : { 12255 /* vpavgw */, X86::VPAVGWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29761 : { 12255 /* vpavgw */, X86::VPAVGWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29762 : { 12255 /* vpavgw */, X86::VPAVGWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29763 : { 12255 /* vpavgw */, X86::VPAVGWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29764 : { 12255 /* vpavgw */, X86::VPAVGWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29765 : { 12255 /* vpavgw */, X86::VPAVGWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29766 : { 12255 /* vpavgw */, X86::VPAVGWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29767 : { 12255 /* vpavgw */, X86::VPAVGWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29768 : { 12255 /* vpavgw */, X86::VPAVGWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29769 : { 12255 /* vpavgw */, X86::VPAVGWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29770 : { 12262 /* vpblendd */, X86::VPBLENDDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29771 : { 12262 /* vpblendd */, X86::VPBLENDDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29772 : { 12262 /* vpblendd */, X86::VPBLENDDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29773 : { 12262 /* vpblendd */, X86::VPBLENDDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29774 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29775 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29776 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29777 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29778 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29779 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29780 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29781 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29782 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29783 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29784 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29785 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29786 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29787 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29788 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29789 : { 12271 /* vpblendmb */, X86::VPBLENDMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29790 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29791 : { 12271 /* vpblendmb */, X86::VPBLENDMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29792 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29793 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29794 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29795 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29796 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29797 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29798 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29799 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29800 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29801 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29802 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29803 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29804 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29805 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29806 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29807 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29808 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29809 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29810 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29811 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29812 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29813 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29814 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29815 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29816 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
29817 : { 12281 /* vpblendmd */, X86::VPBLENDMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
29818 : { 12281 /* vpblendmd */, X86::VPBLENDMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
29819 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29820 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29821 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29822 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29823 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29824 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29825 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29826 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29827 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29828 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29829 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29830 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29831 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29832 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29833 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29834 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29835 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29836 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29837 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29838 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29839 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29840 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29841 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29842 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29843 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
29844 : { 12291 /* vpblendmq */, X86::VPBLENDMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
29845 : { 12291 /* vpblendmq */, X86::VPBLENDMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
29846 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
29847 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
29848 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
29849 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
29850 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
29851 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
29852 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
29853 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
29854 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
29855 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
29856 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
29857 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
29858 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
29859 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
29860 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
29861 : { 12301 /* vpblendmw */, X86::VPBLENDMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
29862 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
29863 : { 12301 /* vpblendmw */, X86::VPBLENDMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
29864 : { 12311 /* vpblendvb */, X86::VPBLENDVBrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
29865 : { 12311 /* vpblendvb */, X86::VPBLENDVBrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
29866 : { 12311 /* vpblendvb */, X86::VPBLENDVBYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
29867 : { 12311 /* vpblendvb */, X86::VPBLENDVBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
29868 : { 12321 /* vpblendw */, X86::VPBLENDWrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
29869 : { 12321 /* vpblendw */, X86::VPBLENDWrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
29870 : { 12321 /* vpblendw */, X86::VPBLENDWYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
29871 : { 12321 /* vpblendw */, X86::VPBLENDWYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
29872 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29873 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrm, Convert__Reg1_0__Mem85_1, 0, { MCK_FR32, MCK_Mem8 }, },
29874 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29875 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBYrm, Convert__Reg1_0__Mem85_1, 0, { MCK_VR256, MCK_Mem8 }, },
29876 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
29877 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29878 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128m, Convert__Reg1_0__Mem85_1, 0, { MCK_FR32X, MCK_Mem8 }, },
29879 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR32 }, },
29880 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29881 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256m, Convert__Reg1_0__Mem85_1, 0, { MCK_VR256X, MCK_Mem8 }, },
29882 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR32 }, },
29883 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29884 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZm, Convert__Reg1_0__Mem85_1, 0, { MCK_VR512, MCK_Mem8 }, },
29885 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29886 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29887 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29888 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29889 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29890 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29891 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29892 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29893 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem85_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem8 }, },
29894 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29895 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29896 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ128mkz, Convert__Reg1_0__Reg1_2__Mem85_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29897 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29898 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29899 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZ256mkz, Convert__Reg1_0__Reg1_2__Mem85_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29900 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29901 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29902 : { 12330 /* vpbroadcastb */, X86::VPBROADCASTBZmkz, Convert__Reg1_0__Reg1_2__Mem85_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem8 }, },
29903 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29904 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
29905 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29906 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
29907 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
29908 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29909 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128m, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
29910 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR32 }, },
29911 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29912 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256m, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
29913 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR32 }, },
29914 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29915 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32 }, },
29916 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29917 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29918 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29919 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29920 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29921 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29922 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29923 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29924 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
29925 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29926 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29927 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ128mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29928 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29929 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29930 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZ256mkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29931 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29932 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29933 : { 12343 /* vpbroadcastd */, X86::VPBROADCASTDZmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
29934 : { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
29935 : { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
29936 : { 12356 /* vpbroadcastmb2q */, X86::VPBROADCASTMB2QZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
29937 : { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
29938 : { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
29939 : { 12372 /* vpbroadcastmw2d */, X86::VPBROADCASTMW2DZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
29940 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29941 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
29942 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29943 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
29944 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR64 }, },
29945 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29946 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128m, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
29947 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR64 }, },
29948 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29949 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256m, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
29950 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR64 }, },
29951 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29952 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
29953 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29954 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29955 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29956 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29957 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29958 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29959 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR64 }, },
29960 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29961 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
29962 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29963 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29964 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ128mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29965 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29966 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29967 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZ256mkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29968 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR64 }, },
29969 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29970 : { 12388 /* vpbroadcastq */, X86::VPBROADCASTQZmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
29971 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
29972 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
29973 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
29974 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWYrm, Convert__Reg1_0__Mem165_1, 0, { MCK_VR256, MCK_Mem16 }, },
29975 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_GR32 }, },
29976 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
29977 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128m, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32X, MCK_Mem16 }, },
29978 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_GR32 }, },
29979 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
29980 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256m, Convert__Reg1_0__Mem165_1, 0, { MCK_VR256X, MCK_Mem16 }, },
29981 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_GR32 }, },
29982 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
29983 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZm, Convert__Reg1_0__Mem165_1, 0, { MCK_VR512, MCK_Mem16 }, },
29984 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29985 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29986 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29987 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29988 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29989 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29990 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_GR32 }, },
29991 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
29992 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
29993 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29994 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29995 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ128mkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29996 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
29997 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
29998 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZ256mkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
29999 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWrZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_GR32 }, },
30000 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30001 : { 12401 /* vpbroadcastw */, X86::VPBROADCASTWZmkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
30002 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30003 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30004 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30005 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30006 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30007 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_17, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30008 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30009 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_17, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30010 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30011 : { 12414 /* vpclmulhqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_17, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30012 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30013 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30014 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30015 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30016 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30017 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_1, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30018 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30019 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_1, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30020 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30021 : { 12428 /* vpclmulhqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_1, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30022 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30023 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30024 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30025 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30026 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30027 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_16, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30028 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30029 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_16, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30030 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30031 : { 12442 /* vpclmullqhqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_16, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30032 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30033 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30034 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30035 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30036 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30037 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__imm_95_0, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30038 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30039 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__imm_95_0, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30040 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30041 : { 12456 /* vpclmullqlqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__imm_95_0, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30042 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30043 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30044 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30045 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30046 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30047 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30048 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30049 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30050 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30051 : { 12470 /* vpclmulqdq */, X86::VPCLMULQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30052 : { 12481 /* vpcmov */, X86::VPCMOVrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30053 : { 12481 /* vpcmov */, X86::VPCMOVrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30054 : { 12481 /* vpcmov */, X86::VPCMOVrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
30055 : { 12481 /* vpcmov */, X86::VPCMOVYrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256 }, },
30056 : { 12481 /* vpcmov */, X86::VPCMOVYrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30057 : { 12481 /* vpcmov */, X86::VPCMOVYrmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256 }, },
30058 : { 12488 /* vpcmp */, X86::VPCMPBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30059 : { 12488 /* vpcmp */, X86::VPCMPBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30060 : { 12488 /* vpcmp */, X86::VPCMPBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30061 : { 12488 /* vpcmp */, X86::VPCMPBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30062 : { 12488 /* vpcmp */, X86::VPCMPBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30063 : { 12488 /* vpcmp */, X86::VPCMPBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30064 : { 12488 /* vpcmp */, X86::VPCMPDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30065 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30066 : { 12488 /* vpcmp */, X86::VPCMPDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30067 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30068 : { 12488 /* vpcmp */, X86::VPCMPDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30069 : { 12488 /* vpcmp */, X86::VPCMPDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30070 : { 12488 /* vpcmp */, X86::VPCMPQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30071 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30072 : { 12488 /* vpcmp */, X86::VPCMPQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30073 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30074 : { 12488 /* vpcmp */, X86::VPCMPQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30075 : { 12488 /* vpcmp */, X86::VPCMPQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30076 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30077 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30078 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30079 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30080 : { 12488 /* vpcmp */, X86::VPCMPUBZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30081 : { 12488 /* vpcmp */, X86::VPCMPUBZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30082 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30083 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30084 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30085 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30086 : { 12488 /* vpcmp */, X86::VPCMPUDZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30087 : { 12488 /* vpcmp */, X86::VPCMPUDZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30088 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30089 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30090 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30091 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30092 : { 12488 /* vpcmp */, X86::VPCMPUQZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30093 : { 12488 /* vpcmp */, X86::VPCMPUQZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30094 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30095 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30096 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30097 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30098 : { 12488 /* vpcmp */, X86::VPCMPUWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30099 : { 12488 /* vpcmp */, X86::VPCMPUWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30100 : { 12488 /* vpcmp */, X86::VPCMPWZ128rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30101 : { 12488 /* vpcmp */, X86::VPCMPWZ128rmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30102 : { 12488 /* vpcmp */, X86::VPCMPWZ256rri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30103 : { 12488 /* vpcmp */, X86::VPCMPWZ256rmi, Convert__Reg1_2__Reg1_3__Mem2565_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30104 : { 12488 /* vpcmp */, X86::VPCMPWZrri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_VR512 }, },
30105 : { 12488 /* vpcmp */, X86::VPCMPWZrmi, Convert__Reg1_2__Reg1_3__Mem5125_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30106 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30107 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30108 : { 12488 /* vpcmp */, X86::VPCMPDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30109 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30110 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30111 : { 12488 /* vpcmp */, X86::VPCMPQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30112 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30113 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30114 : { 12488 /* vpcmp */, X86::VPCMPUDZrmib, Convert__Reg1_2__Reg1_3__Mem325_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30115 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30116 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30117 : { 12488 /* vpcmp */, X86::VPCMPUQZrmib, Convert__Reg1_2__Reg1_3__Mem645_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30118 : { 12488 /* vpcmp */, X86::VPCMPBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30119 : { 12488 /* vpcmp */, X86::VPCMPBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30120 : { 12488 /* vpcmp */, X86::VPCMPBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30121 : { 12488 /* vpcmp */, X86::VPCMPBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30122 : { 12488 /* vpcmp */, X86::VPCMPBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30123 : { 12488 /* vpcmp */, X86::VPCMPBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30124 : { 12488 /* vpcmp */, X86::VPCMPDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30125 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30126 : { 12488 /* vpcmp */, X86::VPCMPDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30127 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30128 : { 12488 /* vpcmp */, X86::VPCMPDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30129 : { 12488 /* vpcmp */, X86::VPCMPDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30130 : { 12488 /* vpcmp */, X86::VPCMPQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30131 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30132 : { 12488 /* vpcmp */, X86::VPCMPQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30133 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30134 : { 12488 /* vpcmp */, X86::VPCMPQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30135 : { 12488 /* vpcmp */, X86::VPCMPQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30136 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30137 : { 12488 /* vpcmp */, X86::VPCMPUBZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30138 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30139 : { 12488 /* vpcmp */, X86::VPCMPUBZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30140 : { 12488 /* vpcmp */, X86::VPCMPUBZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30141 : { 12488 /* vpcmp */, X86::VPCMPUBZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30142 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30143 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30144 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30145 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30146 : { 12488 /* vpcmp */, X86::VPCMPUDZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30147 : { 12488 /* vpcmp */, X86::VPCMPUDZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30148 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30149 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30150 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30151 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30152 : { 12488 /* vpcmp */, X86::VPCMPUQZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30153 : { 12488 /* vpcmp */, X86::VPCMPUQZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30154 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30155 : { 12488 /* vpcmp */, X86::VPCMPUWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30156 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30157 : { 12488 /* vpcmp */, X86::VPCMPUWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30158 : { 12488 /* vpcmp */, X86::VPCMPUWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30159 : { 12488 /* vpcmp */, X86::VPCMPUWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30160 : { 12488 /* vpcmp */, X86::VPCMPWZ128rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30161 : { 12488 /* vpcmp */, X86::VPCMPWZ128rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem1285_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30162 : { 12488 /* vpcmp */, X86::VPCMPWZ256rrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30163 : { 12488 /* vpcmp */, X86::VPCMPWZ256rmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem2565_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30164 : { 12488 /* vpcmp */, X86::VPCMPWZrrik, Convert__Reg1_2__Reg1_4__Reg1_6__Reg1_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30165 : { 12488 /* vpcmp */, X86::VPCMPWZrmik, Convert__Reg1_2__Reg1_4__Reg1_6__Mem5125_7__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30166 : { 12488 /* vpcmp */, X86::VPCMPDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30167 : { 12488 /* vpcmp */, X86::VPCMPDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30168 : { 12488 /* vpcmp */, X86::VPCMPDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30169 : { 12488 /* vpcmp */, X86::VPCMPQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30170 : { 12488 /* vpcmp */, X86::VPCMPQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30171 : { 12488 /* vpcmp */, X86::VPCMPQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30172 : { 12488 /* vpcmp */, X86::VPCMPUDZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30173 : { 12488 /* vpcmp */, X86::VPCMPUDZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30174 : { 12488 /* vpcmp */, X86::VPCMPUDZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem325_7__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30175 : { 12488 /* vpcmp */, X86::VPCMPUQZ128rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30176 : { 12488 /* vpcmp */, X86::VPCMPUQZ256rmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30177 : { 12488 /* vpcmp */, X86::VPCMPUQZrmibk, Convert__Reg1_2__Reg1_4__Reg1_6__Mem645_7__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30178 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30179 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30180 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30181 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30182 : { 12494 /* vpcmpb */, X86::VPCMPBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30183 : { 12494 /* vpcmpb */, X86::VPCMPBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30184 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30185 : { 12494 /* vpcmpb */, X86::VPCMPBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30186 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30187 : { 12494 /* vpcmpb */, X86::VPCMPBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30188 : { 12494 /* vpcmpb */, X86::VPCMPBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30189 : { 12494 /* vpcmpb */, X86::VPCMPBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30190 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30191 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30192 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30193 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30194 : { 12501 /* vpcmpd */, X86::VPCMPDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30195 : { 12501 /* vpcmpd */, X86::VPCMPDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30196 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30197 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30198 : { 12501 /* vpcmpd */, X86::VPCMPDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30199 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30200 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30201 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30202 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30203 : { 12501 /* vpcmpd */, X86::VPCMPDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30204 : { 12501 /* vpcmpd */, X86::VPCMPDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30205 : { 12501 /* vpcmpd */, X86::VPCMPDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30206 : { 12501 /* vpcmpd */, X86::VPCMPDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30207 : { 12501 /* vpcmpd */, X86::VPCMPDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30208 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30209 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30210 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30211 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30212 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30213 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30214 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30215 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30216 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30217 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30218 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30219 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30220 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30221 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30222 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30223 : { 12508 /* vpcmpeqb */, X86::VPCMPEQBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30224 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30225 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30226 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30227 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30228 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30229 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30230 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30231 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30232 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30233 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30234 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30235 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30236 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30237 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30238 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30239 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30240 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30241 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30242 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30243 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30244 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30245 : { 12517 /* vpcmpeqd */, X86::VPCMPEQDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30246 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30247 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30248 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30249 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30250 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30251 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30252 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30253 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30254 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30255 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30256 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30257 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30258 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30259 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30260 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30261 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30262 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30263 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30264 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30265 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30266 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30267 : { 12526 /* vpcmpeqq */, X86::VPCMPEQQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30268 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30269 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30270 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30271 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30272 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30273 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30274 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30275 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30276 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30277 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30278 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30279 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30280 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30281 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30282 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30283 : { 12535 /* vpcmpeqw */, X86::VPCMPEQWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30284 : { 12544 /* vpcmpestri */, X86::VPCMPESTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30285 : { 12544 /* vpcmpestri */, X86::VPCMPESTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30286 : { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30287 : { 12555 /* vpcmpestrm */, X86::VPCMPESTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30288 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30289 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30290 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30291 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30292 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30293 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30294 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30295 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30296 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30297 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30298 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30299 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30300 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30301 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30302 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30303 : { 12566 /* vpcmpgtb */, X86::VPCMPGTBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30304 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30305 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30306 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30307 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30308 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30309 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30310 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30311 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30312 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30313 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30314 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30315 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30316 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30317 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30318 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30319 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30320 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30321 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30322 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30323 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30324 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30325 : { 12575 /* vpcmpgtd */, X86::VPCMPGTDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30326 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30327 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30328 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30329 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30330 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30331 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30332 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30333 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30334 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30335 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30336 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30337 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30338 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30339 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30340 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30341 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30342 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30343 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30344 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30345 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30346 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30347 : { 12584 /* vpcmpgtq */, X86::VPCMPGTQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30348 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
30349 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
30350 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
30351 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
30352 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
30353 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
30354 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30355 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30356 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30357 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30358 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30359 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30360 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30361 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30362 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30363 : { 12593 /* vpcmpgtw */, X86::VPCMPGTWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30364 : { 12602 /* vpcmpistri */, X86::VPCMPISTRIrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30365 : { 12602 /* vpcmpistri */, X86::VPCMPISTRIrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30366 : { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30367 : { 12613 /* vpcmpistrm */, X86::VPCMPISTRMrm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30368 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30369 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30370 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30371 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30372 : { 12624 /* vpcmpq */, X86::VPCMPQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30373 : { 12624 /* vpcmpq */, X86::VPCMPQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30374 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30375 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30376 : { 12624 /* vpcmpq */, X86::VPCMPQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30377 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30378 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30379 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30380 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30381 : { 12624 /* vpcmpq */, X86::VPCMPQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30382 : { 12624 /* vpcmpq */, X86::VPCMPQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30383 : { 12624 /* vpcmpq */, X86::VPCMPQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30384 : { 12624 /* vpcmpq */, X86::VPCMPQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30385 : { 12624 /* vpcmpq */, X86::VPCMPQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30386 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30387 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30388 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30389 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30390 : { 12631 /* vpcmpub */, X86::VPCMPUBZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30391 : { 12631 /* vpcmpub */, X86::VPCMPUBZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30392 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30393 : { 12631 /* vpcmpub */, X86::VPCMPUBZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30394 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30395 : { 12631 /* vpcmpub */, X86::VPCMPUBZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30396 : { 12631 /* vpcmpub */, X86::VPCMPUBZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30397 : { 12631 /* vpcmpub */, X86::VPCMPUBZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30398 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30399 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30400 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30401 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30402 : { 12639 /* vpcmpud */, X86::VPCMPUDZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30403 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30404 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30405 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30406 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmib_alt, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30407 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30408 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30409 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30410 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30411 : { 12639 /* vpcmpud */, X86::VPCMPUDZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30412 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30413 : { 12639 /* vpcmpud */, X86::VPCMPUDZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30414 : { 12639 /* vpcmpud */, X86::VPCMPUDZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30415 : { 12639 /* vpcmpud */, X86::VPCMPUDZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30416 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30417 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30418 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30419 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30420 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30421 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30422 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30423 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30424 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmib_alt, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30425 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30426 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30427 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30428 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30429 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30430 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30431 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ128rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30432 : { 12647 /* vpcmpuq */, X86::VPCMPUQZ256rmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30433 : { 12647 /* vpcmpuq */, X86::VPCMPUQZrmibk_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30434 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30435 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30436 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30437 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30438 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30439 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30440 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30441 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30442 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30443 : { 12655 /* vpcmpuw */, X86::VPCMPUWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30444 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30445 : { 12655 /* vpcmpuw */, X86::VPCMPUWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30446 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30447 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30448 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30449 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rmi_alt, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30450 : { 12663 /* vpcmpw */, X86::VPCMPWZrri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30451 : { 12663 /* vpcmpw */, X86::VPCMPWZrmi_alt, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VK1, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30452 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30453 : { 12663 /* vpcmpw */, X86::VPCMPWZ128rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30454 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30455 : { 12663 /* vpcmpw */, X86::VPCMPWZ256rmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30456 : { 12663 /* vpcmpw */, X86::VPCMPWZrrik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30457 : { 12663 /* vpcmpw */, X86::VPCMPWZrmik_alt, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30458 : { 12670 /* vpcom */, X86::VPCOMBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30459 : { 12670 /* vpcom */, X86::VPCOMBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_b, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30460 : { 12670 /* vpcom */, X86::VPCOMDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30461 : { 12670 /* vpcom */, X86::VPCOMDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_d, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30462 : { 12670 /* vpcom */, X86::VPCOMQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30463 : { 12670 /* vpcom */, X86::VPCOMQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_q, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30464 : { 12670 /* vpcom */, X86::VPCOMUBri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30465 : { 12670 /* vpcom */, X86::VPCOMUBmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ub, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30466 : { 12670 /* vpcom */, X86::VPCOMUDri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30467 : { 12670 /* vpcom */, X86::VPCOMUDmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_ud, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30468 : { 12670 /* vpcom */, X86::VPCOMUQri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30469 : { 12670 /* vpcom */, X86::VPCOMUQmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uq, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30470 : { 12670 /* vpcom */, X86::VPCOMUWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30471 : { 12670 /* vpcom */, X86::VPCOMUWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_uw, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30472 : { 12670 /* vpcom */, X86::VPCOMWri, Convert__Reg1_2__Reg1_3__Reg1_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_FR32 }, },
30473 : { 12670 /* vpcom */, X86::VPCOMWmi, Convert__Reg1_2__Reg1_3__Mem1285_4__Imm1_0, 0, { MCK_Imm, MCK_w, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30474 : { 12676 /* vpcomb */, X86::VPCOMBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30475 : { 12676 /* vpcomb */, X86::VPCOMBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30476 : { 12683 /* vpcomd */, X86::VPCOMDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30477 : { 12683 /* vpcomd */, X86::VPCOMDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30478 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30479 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30480 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30481 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30482 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30483 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30484 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30485 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30486 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30487 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30488 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30489 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30490 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30491 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30492 : { 12690 /* vpcompressb */, X86::VPCOMPRESSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30493 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30494 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30495 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30496 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30497 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30498 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30499 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30500 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30501 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30502 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30503 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30504 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30505 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30506 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30507 : { 12702 /* vpcompressd */, X86::VPCOMPRESSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30508 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30509 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30510 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30511 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30512 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30513 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30514 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30515 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30516 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30517 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30518 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30519 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30520 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30521 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30522 : { 12714 /* vpcompressq */, X86::VPCOMPRESSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30523 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30524 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30525 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30526 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_FR32X }, },
30527 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR256X }, },
30528 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmr, Convert__Mem5125_0__Reg1_1, 0, { MCK_Mem512, MCK_VR512 }, },
30529 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30530 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30531 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30532 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30533 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256mrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30534 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZmrk, Convert__Mem5125_0__Reg1_2__Reg1_4, 0, { MCK_Mem512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30535 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30536 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30537 : { 12726 /* vpcompressw */, X86::VPCOMPRESSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30538 : { 12738 /* vpcomq */, X86::VPCOMQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30539 : { 12738 /* vpcomq */, X86::VPCOMQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30540 : { 12745 /* vpcomub */, X86::VPCOMUBri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30541 : { 12745 /* vpcomub */, X86::VPCOMUBmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30542 : { 12753 /* vpcomud */, X86::VPCOMUDri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30543 : { 12753 /* vpcomud */, X86::VPCOMUDmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30544 : { 12761 /* vpcomuq */, X86::VPCOMUQri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30545 : { 12761 /* vpcomuq */, X86::VPCOMUQmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30546 : { 12769 /* vpcomuw */, X86::VPCOMUWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30547 : { 12769 /* vpcomuw */, X86::VPCOMUWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30548 : { 12777 /* vpcomw */, X86::VPCOMWri_alt, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30549 : { 12777 /* vpcomw */, X86::VPCOMWmi_alt, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30550 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30551 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
30552 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30553 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
30554 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30555 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
30556 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30557 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30558 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30559 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30560 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30561 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30562 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30563 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30564 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30565 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30566 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30567 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30568 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30569 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30570 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30571 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30572 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30573 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30574 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
30575 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
30576 : { 12784 /* vpconflictd */, X86::VPCONFLICTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
30577 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
30578 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
30579 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
30580 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
30581 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
30582 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
30583 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30584 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30585 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30586 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
30587 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
30588 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
30589 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
30590 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
30591 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
30592 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
30593 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
30594 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30595 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
30596 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
30597 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30598 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
30599 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
30600 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30601 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
30602 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
30603 : { 12796 /* vpconflictq */, X86::VPCONFLICTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
30604 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30605 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30606 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30607 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30608 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30609 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30610 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30611 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30612 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30613 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30614 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30615 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30616 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30617 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30618 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30619 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30620 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30621 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30622 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30623 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30624 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30625 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30626 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30627 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30628 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30629 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30630 : { 12808 /* vpdpbusd */, X86::VPDPBUSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30631 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30632 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30633 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30634 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30635 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30636 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30637 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30638 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30639 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30640 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30641 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30642 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30643 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30644 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30645 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30646 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30647 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30648 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30649 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30650 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30651 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30652 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30653 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30654 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30655 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30656 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30657 : { 12817 /* vpdpbusds */, X86::VPDPBUSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30658 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30659 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30660 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30661 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30662 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30663 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30664 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30665 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30666 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30667 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30668 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30669 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30670 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30671 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30672 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30673 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30674 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30675 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30676 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30677 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30678 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30679 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30680 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30681 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30682 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30683 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30684 : { 12827 /* vpdpwssd */, X86::VPDPWSSDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30685 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30686 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30687 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30688 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30689 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30690 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30691 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30692 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30693 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30694 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30695 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30696 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30697 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30698 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30699 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30700 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30701 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30702 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30703 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30704 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30705 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30706 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30707 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30708 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30709 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30710 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30711 : { 12836 /* vpdpwssds */, X86::VPDPWSSDSZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30712 : { 12846 /* vperm2f128 */, X86::VPERM2F128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30713 : { 12846 /* vperm2f128 */, X86::VPERM2F128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30714 : { 12857 /* vperm2i128 */, X86::VPERM2I128rr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30715 : { 12857 /* vperm2i128 */, X86::VPERM2I128rm, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30716 : { 12868 /* vpermb */, X86::VPERMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30717 : { 12868 /* vpermb */, X86::VPERMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30718 : { 12868 /* vpermb */, X86::VPERMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30719 : { 12868 /* vpermb */, X86::VPERMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30720 : { 12868 /* vpermb */, X86::VPERMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30721 : { 12868 /* vpermb */, X86::VPERMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30722 : { 12868 /* vpermb */, X86::VPERMBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30723 : { 12868 /* vpermb */, X86::VPERMBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30724 : { 12868 /* vpermb */, X86::VPERMBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30725 : { 12868 /* vpermb */, X86::VPERMBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30726 : { 12868 /* vpermb */, X86::VPERMBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30727 : { 12868 /* vpermb */, X86::VPERMBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30728 : { 12868 /* vpermb */, X86::VPERMBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30729 : { 12868 /* vpermb */, X86::VPERMBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30730 : { 12868 /* vpermb */, X86::VPERMBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30731 : { 12868 /* vpermb */, X86::VPERMBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30732 : { 12868 /* vpermb */, X86::VPERMBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30733 : { 12868 /* vpermb */, X86::VPERMBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30734 : { 12875 /* vpermd */, X86::VPERMDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30735 : { 12875 /* vpermd */, X86::VPERMDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30736 : { 12875 /* vpermd */, X86::VPERMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30737 : { 12875 /* vpermd */, X86::VPERMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30738 : { 12875 /* vpermd */, X86::VPERMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30739 : { 12875 /* vpermd */, X86::VPERMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30740 : { 12875 /* vpermd */, X86::VPERMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30741 : { 12875 /* vpermd */, X86::VPERMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30742 : { 12875 /* vpermd */, X86::VPERMDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30743 : { 12875 /* vpermd */, X86::VPERMDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30744 : { 12875 /* vpermd */, X86::VPERMDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30745 : { 12875 /* vpermd */, X86::VPERMDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30746 : { 12875 /* vpermd */, X86::VPERMDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30747 : { 12875 /* vpermd */, X86::VPERMDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30748 : { 12875 /* vpermd */, X86::VPERMDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30749 : { 12875 /* vpermd */, X86::VPERMDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30750 : { 12875 /* vpermd */, X86::VPERMDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30751 : { 12875 /* vpermd */, X86::VPERMDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30752 : { 12875 /* vpermd */, X86::VPERMDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30753 : { 12875 /* vpermd */, X86::VPERMDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30754 : { 12882 /* vpermi2b */, X86::VPERMI2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30755 : { 12882 /* vpermi2b */, X86::VPERMI2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30756 : { 12882 /* vpermi2b */, X86::VPERMI2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30757 : { 12882 /* vpermi2b */, X86::VPERMI2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30758 : { 12882 /* vpermi2b */, X86::VPERMI2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30759 : { 12882 /* vpermi2b */, X86::VPERMI2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30760 : { 12882 /* vpermi2b */, X86::VPERMI2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30761 : { 12882 /* vpermi2b */, X86::VPERMI2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30762 : { 12882 /* vpermi2b */, X86::VPERMI2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30763 : { 12882 /* vpermi2b */, X86::VPERMI2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30764 : { 12882 /* vpermi2b */, X86::VPERMI2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30765 : { 12882 /* vpermi2b */, X86::VPERMI2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30766 : { 12882 /* vpermi2b */, X86::VPERMI2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30767 : { 12882 /* vpermi2b */, X86::VPERMI2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30768 : { 12882 /* vpermi2b */, X86::VPERMI2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30769 : { 12882 /* vpermi2b */, X86::VPERMI2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30770 : { 12882 /* vpermi2b */, X86::VPERMI2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30771 : { 12882 /* vpermi2b */, X86::VPERMI2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30772 : { 12891 /* vpermi2d */, X86::VPERMI2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30773 : { 12891 /* vpermi2d */, X86::VPERMI2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30774 : { 12891 /* vpermi2d */, X86::VPERMI2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30775 : { 12891 /* vpermi2d */, X86::VPERMI2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30776 : { 12891 /* vpermi2d */, X86::VPERMI2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30777 : { 12891 /* vpermi2d */, X86::VPERMI2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30778 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30779 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30780 : { 12891 /* vpermi2d */, X86::VPERMI2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30781 : { 12891 /* vpermi2d */, X86::VPERMI2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30782 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30783 : { 12891 /* vpermi2d */, X86::VPERMI2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30784 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30785 : { 12891 /* vpermi2d */, X86::VPERMI2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30786 : { 12891 /* vpermi2d */, X86::VPERMI2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30787 : { 12891 /* vpermi2d */, X86::VPERMI2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30788 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30789 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30790 : { 12891 /* vpermi2d */, X86::VPERMI2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30791 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30792 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30793 : { 12891 /* vpermi2d */, X86::VPERMI2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30794 : { 12891 /* vpermi2d */, X86::VPERMI2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30795 : { 12891 /* vpermi2d */, X86::VPERMI2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30796 : { 12891 /* vpermi2d */, X86::VPERMI2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30797 : { 12891 /* vpermi2d */, X86::VPERMI2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30798 : { 12891 /* vpermi2d */, X86::VPERMI2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30799 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30800 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30801 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30802 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30803 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30804 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30805 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30806 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30807 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30808 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30809 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30810 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30811 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30812 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30813 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30814 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30815 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30816 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30817 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30818 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30819 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30820 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30821 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30822 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30823 : { 12900 /* vpermi2pd */, X86::VPERMI2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30824 : { 12900 /* vpermi2pd */, X86::VPERMI2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30825 : { 12900 /* vpermi2pd */, X86::VPERMI2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30826 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30827 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30828 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30829 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30830 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30831 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30832 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30833 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30834 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30835 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30836 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30837 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30838 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30839 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30840 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30841 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30842 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30843 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30844 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30845 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30846 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30847 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30848 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30849 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30850 : { 12910 /* vpermi2ps */, X86::VPERMI2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30851 : { 12910 /* vpermi2ps */, X86::VPERMI2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30852 : { 12910 /* vpermi2ps */, X86::VPERMI2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30853 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30854 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30855 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30856 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30857 : { 12920 /* vpermi2q */, X86::VPERMI2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30858 : { 12920 /* vpermi2q */, X86::VPERMI2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30859 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30860 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30861 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30862 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30863 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30864 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30865 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30866 : { 12920 /* vpermi2q */, X86::VPERMI2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30867 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30868 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30869 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30870 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30871 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30872 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30873 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30874 : { 12920 /* vpermi2q */, X86::VPERMI2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30875 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30876 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30877 : { 12920 /* vpermi2q */, X86::VPERMI2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30878 : { 12920 /* vpermi2q */, X86::VPERMI2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30879 : { 12920 /* vpermi2q */, X86::VPERMI2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30880 : { 12929 /* vpermi2w */, X86::VPERMI2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30881 : { 12929 /* vpermi2w */, X86::VPERMI2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30882 : { 12929 /* vpermi2w */, X86::VPERMI2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30883 : { 12929 /* vpermi2w */, X86::VPERMI2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30884 : { 12929 /* vpermi2w */, X86::VPERMI2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30885 : { 12929 /* vpermi2w */, X86::VPERMI2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30886 : { 12929 /* vpermi2w */, X86::VPERMI2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30887 : { 12929 /* vpermi2w */, X86::VPERMI2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30888 : { 12929 /* vpermi2w */, X86::VPERMI2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30889 : { 12929 /* vpermi2w */, X86::VPERMI2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30890 : { 12929 /* vpermi2w */, X86::VPERMI2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30891 : { 12929 /* vpermi2w */, X86::VPERMI2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30892 : { 12929 /* vpermi2w */, X86::VPERMI2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30893 : { 12929 /* vpermi2w */, X86::VPERMI2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30894 : { 12929 /* vpermi2w */, X86::VPERMI2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30895 : { 12929 /* vpermi2w */, X86::VPERMI2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30896 : { 12929 /* vpermi2w */, X86::VPERMI2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30897 : { 12929 /* vpermi2w */, X86::VPERMI2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30898 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30899 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30900 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
30901 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30902 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30903 : { 12938 /* vpermil2pd */, X86::VPERMIL2PDYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30904 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30905 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30906 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32, MCK_ImmUnsignedi8 }, },
30907 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30908 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSYrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem2565_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30909 : { 12949 /* vpermil2ps */, X86::VPERMIL2PSYmr, Convert__Reg1_0__Reg1_1__Mem2565_2__Reg1_3__ImmUnsignedi81_4, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30910 : { 12960 /* vpermilpd */, X86::VPERMILPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30911 : { 12960 /* vpermilpd */, X86::VPERMILPDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30912 : { 12960 /* vpermilpd */, X86::VPERMILPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30913 : { 12960 /* vpermilpd */, X86::VPERMILPDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30914 : { 12960 /* vpermilpd */, X86::VPERMILPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30915 : { 12960 /* vpermilpd */, X86::VPERMILPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30916 : { 12960 /* vpermilpd */, X86::VPERMILPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30917 : { 12960 /* vpermilpd */, X86::VPERMILPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30918 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30919 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30920 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30921 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30922 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30923 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30924 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30925 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30926 : { 12960 /* vpermilpd */, X86::VPERMILPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30927 : { 12960 /* vpermilpd */, X86::VPERMILPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30928 : { 12960 /* vpermilpd */, X86::VPERMILPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30929 : { 12960 /* vpermilpd */, X86::VPERMILPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30930 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30931 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30932 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30933 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30934 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30935 : { 12960 /* vpermilpd */, X86::VPERMILPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30936 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30937 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30938 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
30939 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30940 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
30941 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30942 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
30943 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30944 : { 12960 /* vpermilpd */, X86::VPERMILPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
30945 : { 12960 /* vpermilpd */, X86::VPERMILPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30946 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
30947 : { 12960 /* vpermilpd */, X86::VPERMILPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30948 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
30949 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30950 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
30951 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30952 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30953 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30954 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
30955 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30956 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
30957 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30958 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30959 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30960 : { 12960 /* vpermilpd */, X86::VPERMILPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
30961 : { 12960 /* vpermilpd */, X86::VPERMILPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
30962 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
30963 : { 12960 /* vpermilpd */, X86::VPERMILPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30964 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30965 : { 12960 /* vpermilpd */, X86::VPERMILPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30966 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
30967 : { 12960 /* vpermilpd */, X86::VPERMILPDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
30968 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
30969 : { 12960 /* vpermilpd */, X86::VPERMILPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30970 : { 12960 /* vpermilpd */, X86::VPERMILPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
30971 : { 12960 /* vpermilpd */, X86::VPERMILPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30972 : { 12970 /* vpermilps */, X86::VPERMILPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
30973 : { 12970 /* vpermilps */, X86::VPERMILPSri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
30974 : { 12970 /* vpermilps */, X86::VPERMILPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
30975 : { 12970 /* vpermilps */, X86::VPERMILPSmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30976 : { 12970 /* vpermilps */, X86::VPERMILPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
30977 : { 12970 /* vpermilps */, X86::VPERMILPSYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
30978 : { 12970 /* vpermilps */, X86::VPERMILPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
30979 : { 12970 /* vpermilps */, X86::VPERMILPSYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30980 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
30981 : { 12970 /* vpermilps */, X86::VPERMILPSZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
30982 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
30983 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
30984 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
30985 : { 12970 /* vpermilps */, X86::VPERMILPSZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
30986 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
30987 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
30988 : { 12970 /* vpermilps */, X86::VPERMILPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
30989 : { 12970 /* vpermilps */, X86::VPERMILPSZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
30990 : { 12970 /* vpermilps */, X86::VPERMILPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
30991 : { 12970 /* vpermilps */, X86::VPERMILPSZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
30992 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
30993 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
30994 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
30995 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
30996 : { 12970 /* vpermilps */, X86::VPERMILPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
30997 : { 12970 /* vpermilps */, X86::VPERMILPSZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
30998 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
30999 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31000 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31001 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31002 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31003 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31004 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31005 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31006 : { 12970 /* vpermilps */, X86::VPERMILPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31007 : { 12970 /* vpermilps */, X86::VPERMILPSZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31008 : { 12970 /* vpermilps */, X86::VPERMILPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31009 : { 12970 /* vpermilps */, X86::VPERMILPSZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31010 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31011 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31012 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31013 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
31014 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31015 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31016 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31017 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31018 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31019 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31020 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31021 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31022 : { 12970 /* vpermilps */, X86::VPERMILPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31023 : { 12970 /* vpermilps */, X86::VPERMILPSZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31024 : { 12970 /* vpermilps */, X86::VPERMILPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31025 : { 12970 /* vpermilps */, X86::VPERMILPSZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31026 : { 12970 /* vpermilps */, X86::VPERMILPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31027 : { 12970 /* vpermilps */, X86::VPERMILPSZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31028 : { 12970 /* vpermilps */, X86::VPERMILPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31029 : { 12970 /* vpermilps */, X86::VPERMILPSZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31030 : { 12970 /* vpermilps */, X86::VPERMILPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31031 : { 12970 /* vpermilps */, X86::VPERMILPSZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31032 : { 12970 /* vpermilps */, X86::VPERMILPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31033 : { 12970 /* vpermilps */, X86::VPERMILPSZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
31034 : { 12980 /* vpermpd */, X86::VPERMPDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31035 : { 12980 /* vpermpd */, X86::VPERMPDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31036 : { 12980 /* vpermpd */, X86::VPERMPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31037 : { 12980 /* vpermpd */, X86::VPERMPDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31038 : { 12980 /* vpermpd */, X86::VPERMPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31039 : { 12980 /* vpermpd */, X86::VPERMPDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31040 : { 12980 /* vpermpd */, X86::VPERMPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31041 : { 12980 /* vpermpd */, X86::VPERMPDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31042 : { 12980 /* vpermpd */, X86::VPERMPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31043 : { 12980 /* vpermpd */, X86::VPERMPDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31044 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31045 : { 12980 /* vpermpd */, X86::VPERMPDZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31046 : { 12980 /* vpermpd */, X86::VPERMPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31047 : { 12980 /* vpermpd */, X86::VPERMPDZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31048 : { 12980 /* vpermpd */, X86::VPERMPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31049 : { 12980 /* vpermpd */, X86::VPERMPDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31050 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31051 : { 12980 /* vpermpd */, X86::VPERMPDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31052 : { 12980 /* vpermpd */, X86::VPERMPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31053 : { 12980 /* vpermpd */, X86::VPERMPDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31054 : { 12980 /* vpermpd */, X86::VPERMPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31055 : { 12980 /* vpermpd */, X86::VPERMPDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31056 : { 12980 /* vpermpd */, X86::VPERMPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31057 : { 12980 /* vpermpd */, X86::VPERMPDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31058 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31059 : { 12980 /* vpermpd */, X86::VPERMPDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31060 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31061 : { 12980 /* vpermpd */, X86::VPERMPDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31062 : { 12980 /* vpermpd */, X86::VPERMPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31063 : { 12980 /* vpermpd */, X86::VPERMPDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31064 : { 12980 /* vpermpd */, X86::VPERMPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31065 : { 12980 /* vpermpd */, X86::VPERMPDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31066 : { 12980 /* vpermpd */, X86::VPERMPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31067 : { 12980 /* vpermpd */, X86::VPERMPDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31068 : { 12980 /* vpermpd */, X86::VPERMPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31069 : { 12980 /* vpermpd */, X86::VPERMPDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31070 : { 12980 /* vpermpd */, X86::VPERMPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31071 : { 12980 /* vpermpd */, X86::VPERMPDZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31072 : { 12988 /* vpermps */, X86::VPERMPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31073 : { 12988 /* vpermps */, X86::VPERMPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31074 : { 12988 /* vpermps */, X86::VPERMPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31075 : { 12988 /* vpermps */, X86::VPERMPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31076 : { 12988 /* vpermps */, X86::VPERMPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31077 : { 12988 /* vpermps */, X86::VPERMPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31078 : { 12988 /* vpermps */, X86::VPERMPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31079 : { 12988 /* vpermps */, X86::VPERMPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31080 : { 12988 /* vpermps */, X86::VPERMPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31081 : { 12988 /* vpermps */, X86::VPERMPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31082 : { 12988 /* vpermps */, X86::VPERMPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31083 : { 12988 /* vpermps */, X86::VPERMPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31084 : { 12988 /* vpermps */, X86::VPERMPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31085 : { 12988 /* vpermps */, X86::VPERMPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31086 : { 12988 /* vpermps */, X86::VPERMPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31087 : { 12988 /* vpermps */, X86::VPERMPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31088 : { 12988 /* vpermps */, X86::VPERMPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31089 : { 12988 /* vpermps */, X86::VPERMPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31090 : { 12988 /* vpermps */, X86::VPERMPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31091 : { 12988 /* vpermps */, X86::VPERMPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31092 : { 12996 /* vpermq */, X86::VPERMQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
31093 : { 12996 /* vpermq */, X86::VPERMQYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31094 : { 12996 /* vpermq */, X86::VPERMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31095 : { 12996 /* vpermq */, X86::VPERMQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31096 : { 12996 /* vpermq */, X86::VPERMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31097 : { 12996 /* vpermq */, X86::VPERMQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31098 : { 12996 /* vpermq */, X86::VPERMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31099 : { 12996 /* vpermq */, X86::VPERMQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
31100 : { 12996 /* vpermq */, X86::VPERMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31101 : { 12996 /* vpermq */, X86::VPERMQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31102 : { 12996 /* vpermq */, X86::VPERMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31103 : { 12996 /* vpermq */, X86::VPERMQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31104 : { 12996 /* vpermq */, X86::VPERMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31105 : { 12996 /* vpermq */, X86::VPERMQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31106 : { 12996 /* vpermq */, X86::VPERMQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31107 : { 12996 /* vpermq */, X86::VPERMQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31108 : { 12996 /* vpermq */, X86::VPERMQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31109 : { 12996 /* vpermq */, X86::VPERMQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31110 : { 12996 /* vpermq */, X86::VPERMQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31111 : { 12996 /* vpermq */, X86::VPERMQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31112 : { 12996 /* vpermq */, X86::VPERMQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31113 : { 12996 /* vpermq */, X86::VPERMQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31114 : { 12996 /* vpermq */, X86::VPERMQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31115 : { 12996 /* vpermq */, X86::VPERMQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
31116 : { 12996 /* vpermq */, X86::VPERMQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31117 : { 12996 /* vpermq */, X86::VPERMQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
31118 : { 12996 /* vpermq */, X86::VPERMQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31119 : { 12996 /* vpermq */, X86::VPERMQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31120 : { 12996 /* vpermq */, X86::VPERMQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31121 : { 12996 /* vpermq */, X86::VPERMQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
31122 : { 12996 /* vpermq */, X86::VPERMQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31123 : { 12996 /* vpermq */, X86::VPERMQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
31124 : { 12996 /* vpermq */, X86::VPERMQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31125 : { 12996 /* vpermq */, X86::VPERMQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31126 : { 12996 /* vpermq */, X86::VPERMQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31127 : { 12996 /* vpermq */, X86::VPERMQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
31128 : { 12996 /* vpermq */, X86::VPERMQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31129 : { 12996 /* vpermq */, X86::VPERMQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
31130 : { 13003 /* vpermt2b */, X86::VPERMT2B128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31131 : { 13003 /* vpermt2b */, X86::VPERMT2B128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31132 : { 13003 /* vpermt2b */, X86::VPERMT2B256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31133 : { 13003 /* vpermt2b */, X86::VPERMT2B256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31134 : { 13003 /* vpermt2b */, X86::VPERMT2Brr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31135 : { 13003 /* vpermt2b */, X86::VPERMT2Brm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31136 : { 13003 /* vpermt2b */, X86::VPERMT2B128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31137 : { 13003 /* vpermt2b */, X86::VPERMT2B128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31138 : { 13003 /* vpermt2b */, X86::VPERMT2B256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31139 : { 13003 /* vpermt2b */, X86::VPERMT2B256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31140 : { 13003 /* vpermt2b */, X86::VPERMT2Brrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31141 : { 13003 /* vpermt2b */, X86::VPERMT2Brmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31142 : { 13003 /* vpermt2b */, X86::VPERMT2B128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31143 : { 13003 /* vpermt2b */, X86::VPERMT2B128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31144 : { 13003 /* vpermt2b */, X86::VPERMT2B256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31145 : { 13003 /* vpermt2b */, X86::VPERMT2B256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31146 : { 13003 /* vpermt2b */, X86::VPERMT2Brrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31147 : { 13003 /* vpermt2b */, X86::VPERMT2Brmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31148 : { 13012 /* vpermt2d */, X86::VPERMT2D128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31149 : { 13012 /* vpermt2d */, X86::VPERMT2D128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31150 : { 13012 /* vpermt2d */, X86::VPERMT2D256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31151 : { 13012 /* vpermt2d */, X86::VPERMT2D256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31152 : { 13012 /* vpermt2d */, X86::VPERMT2Drr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31153 : { 13012 /* vpermt2d */, X86::VPERMT2Drm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31154 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31155 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31156 : { 13012 /* vpermt2d */, X86::VPERMT2Drmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31157 : { 13012 /* vpermt2d */, X86::VPERMT2D128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31158 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31159 : { 13012 /* vpermt2d */, X86::VPERMT2D256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31160 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31161 : { 13012 /* vpermt2d */, X86::VPERMT2Drrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31162 : { 13012 /* vpermt2d */, X86::VPERMT2Drmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31163 : { 13012 /* vpermt2d */, X86::VPERMT2D128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31164 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31165 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31166 : { 13012 /* vpermt2d */, X86::VPERMT2D256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31167 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31168 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31169 : { 13012 /* vpermt2d */, X86::VPERMT2Drrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31170 : { 13012 /* vpermt2d */, X86::VPERMT2Drmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31171 : { 13012 /* vpermt2d */, X86::VPERMT2Drmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31172 : { 13012 /* vpermt2d */, X86::VPERMT2D128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31173 : { 13012 /* vpermt2d */, X86::VPERMT2D256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31174 : { 13012 /* vpermt2d */, X86::VPERMT2Drmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31175 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31176 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31177 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31178 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31179 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31180 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31181 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31182 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31183 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31184 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31185 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31186 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31187 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31188 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31189 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31190 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31191 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31192 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31193 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31194 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31195 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31196 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31197 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31198 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31199 : { 13021 /* vpermt2pd */, X86::VPERMT2PD128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31200 : { 13021 /* vpermt2pd */, X86::VPERMT2PD256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31201 : { 13021 /* vpermt2pd */, X86::VPERMT2PDrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31202 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31203 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31204 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31205 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31206 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31207 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31208 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31209 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31210 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31211 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31212 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31213 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31214 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31215 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31216 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31217 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31218 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31219 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31220 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31221 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31222 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31223 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31224 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31225 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31226 : { 13031 /* vpermt2ps */, X86::VPERMT2PS128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31227 : { 13031 /* vpermt2ps */, X86::VPERMT2PS256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31228 : { 13031 /* vpermt2ps */, X86::VPERMT2PSrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31229 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31230 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31231 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31232 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31233 : { 13041 /* vpermt2q */, X86::VPERMT2Qrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31234 : { 13041 /* vpermt2q */, X86::VPERMT2Qrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31235 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31236 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31237 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31238 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31239 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31240 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31241 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31242 : { 13041 /* vpermt2q */, X86::VPERMT2Qrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31243 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31244 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31245 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31246 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31247 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31248 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31249 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31250 : { 13041 /* vpermt2q */, X86::VPERMT2Qrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31251 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31252 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31253 : { 13041 /* vpermt2q */, X86::VPERMT2Q128rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31254 : { 13041 /* vpermt2q */, X86::VPERMT2Q256rmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31255 : { 13041 /* vpermt2q */, X86::VPERMT2Qrmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31256 : { 13050 /* vpermt2w */, X86::VPERMT2W128rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31257 : { 13050 /* vpermt2w */, X86::VPERMT2W128rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31258 : { 13050 /* vpermt2w */, X86::VPERMT2W256rr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31259 : { 13050 /* vpermt2w */, X86::VPERMT2W256rm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31260 : { 13050 /* vpermt2w */, X86::VPERMT2Wrr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31261 : { 13050 /* vpermt2w */, X86::VPERMT2Wrm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31262 : { 13050 /* vpermt2w */, X86::VPERMT2W128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31263 : { 13050 /* vpermt2w */, X86::VPERMT2W128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31264 : { 13050 /* vpermt2w */, X86::VPERMT2W256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31265 : { 13050 /* vpermt2w */, X86::VPERMT2W256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31266 : { 13050 /* vpermt2w */, X86::VPERMT2Wrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31267 : { 13050 /* vpermt2w */, X86::VPERMT2Wrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31268 : { 13050 /* vpermt2w */, X86::VPERMT2W128rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31269 : { 13050 /* vpermt2w */, X86::VPERMT2W128rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31270 : { 13050 /* vpermt2w */, X86::VPERMT2W256rrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31271 : { 13050 /* vpermt2w */, X86::VPERMT2W256rmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31272 : { 13050 /* vpermt2w */, X86::VPERMT2Wrrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31273 : { 13050 /* vpermt2w */, X86::VPERMT2Wrmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31274 : { 13059 /* vpermw */, X86::VPERMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31275 : { 13059 /* vpermw */, X86::VPERMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31276 : { 13059 /* vpermw */, X86::VPERMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31277 : { 13059 /* vpermw */, X86::VPERMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31278 : { 13059 /* vpermw */, X86::VPERMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31279 : { 13059 /* vpermw */, X86::VPERMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31280 : { 13059 /* vpermw */, X86::VPERMWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31281 : { 13059 /* vpermw */, X86::VPERMWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31282 : { 13059 /* vpermw */, X86::VPERMWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31283 : { 13059 /* vpermw */, X86::VPERMWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31284 : { 13059 /* vpermw */, X86::VPERMWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31285 : { 13059 /* vpermw */, X86::VPERMWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31286 : { 13059 /* vpermw */, X86::VPERMWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31287 : { 13059 /* vpermw */, X86::VPERMWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31288 : { 13059 /* vpermw */, X86::VPERMWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31289 : { 13059 /* vpermw */, X86::VPERMWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31290 : { 13059 /* vpermw */, X86::VPERMWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31291 : { 13059 /* vpermw */, X86::VPERMWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31292 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31293 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31294 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31295 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31296 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31297 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31298 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31299 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31300 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31301 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31302 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31303 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31304 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31305 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31306 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31307 : { 13066 /* vpexpandb */, X86::VPEXPANDBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31308 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31309 : { 13066 /* vpexpandb */, X86::VPEXPANDBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31310 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31311 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31312 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31313 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31314 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31315 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31316 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31317 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31318 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31319 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31320 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31321 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31322 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31323 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31324 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31325 : { 13076 /* vpexpandd */, X86::VPEXPANDDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31326 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31327 : { 13076 /* vpexpandd */, X86::VPEXPANDDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31328 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31329 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31330 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31331 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31332 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31333 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31334 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31335 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31336 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31337 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31338 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31339 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31340 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31341 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31342 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31343 : { 13086 /* vpexpandq */, X86::VPEXPANDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31344 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31345 : { 13086 /* vpexpandq */, X86::VPEXPANDQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31346 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31347 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31348 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31349 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31350 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31351 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31352 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31353 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31354 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31355 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31356 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31357 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31358 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31359 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31360 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31361 : { 13096 /* vpexpandw */, X86::VPEXPANDWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31362 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31363 : { 13096 /* vpexpandw */, X86::VPEXPANDWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31364 : { 13106 /* vpextrb */, X86::VPEXTRBrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31365 : { 13106 /* vpextrb */, X86::VPEXTRBZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31366 : { 13106 /* vpextrb */, X86::VPEXTRBmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32, MCK_ImmUnsignedi8 }, },
31367 : { 13106 /* vpextrb */, X86::VPEXTRBZmr, Convert__Mem85_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem8, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31368 : { 13114 /* vpextrd */, X86::VPEXTRDrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31369 : { 13114 /* vpextrd */, X86::VPEXTRDZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31370 : { 13114 /* vpextrd */, X86::VPEXTRDmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32, MCK_ImmUnsignedi8 }, },
31371 : { 13114 /* vpextrd */, X86::VPEXTRDZmr, Convert__Mem325_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem32, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31372 : { 13122 /* vpextrq */, X86::VPEXTRQrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31373 : { 13122 /* vpextrq */, X86::VPEXTRQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31374 : { 13122 /* vpextrq */, X86::VPEXTRQmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31375 : { 13122 /* vpextrq */, X86::VPEXTRQZmr, Convert__Mem645_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31376 : { 13130 /* vpextrw */, X86::VPEXTRWrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32, MCK_ImmUnsignedi8 }, },
31377 : { 13130 /* vpextrw */, X86::VPEXTRWZrr, Convert__GR32orGR641_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_GR32orGR64, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31378 : { 13130 /* vpextrw */, X86::VPEXTRWmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32, MCK_ImmUnsignedi8 }, },
31379 : { 13130 /* vpextrw */, X86::VPEXTRWZmr, Convert__Mem165_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_Mem16, MCK_FR32X, MCK_ImmUnsignedi8 }, },
31380 : { 13138 /* vpgatherdd */, X86::VPGATHERDDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31381 : { 13138 /* vpgatherdd */, X86::VPGATHERDDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
31382 : { 13138 /* vpgatherdd */, X86::VPGATHERDDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31383 : { 13138 /* vpgatherdd */, X86::VPGATHERDDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
31384 : { 13138 /* vpgatherdd */, X86::VPGATHERDDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
31385 : { 13149 /* vpgatherdq */, X86::VPGATHERDQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31386 : { 13149 /* vpgatherdq */, X86::VPGATHERDQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC1285_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC128, MCK_VR256 }, },
31387 : { 13149 /* vpgatherdq */, X86::VPGATHERDQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31388 : { 13149 /* vpgatherdq */, X86::VPGATHERDQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC128X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC128X }, },
31389 : { 13149 /* vpgatherdq */, X86::VPGATHERDQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC256X5_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
31390 : { 13160 /* vpgatherqd */, X86::VPGATHERQDYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC2565_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC256, MCK_FR32 }, },
31391 : { 13160 /* vpgatherqd */, X86::VPGATHERQDrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem64_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem64_RC128, MCK_FR32 }, },
31392 : { 13160 /* vpgatherqd */, X86::VPGATHERQDZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC256X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC256X }, },
31393 : { 13160 /* vpgatherqd */, X86::VPGATHERQDZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem64_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64_RC128X }, },
31394 : { 13160 /* vpgatherqd */, X86::VPGATHERQDZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC5125_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
31395 : { 13171 /* vpgatherqq */, X86::VPGATHERQQrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem128_RC1285_1__Tie1_3_3, 0, { MCK_FR32, MCK_Mem128_RC128, MCK_FR32 }, },
31396 : { 13171 /* vpgatherqq */, X86::VPGATHERQQYrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Mem256_RC2565_1__Tie1_3_3, 0, { MCK_VR256, MCK_Mem256_RC256, MCK_VR256 }, },
31397 : { 13171 /* vpgatherqq */, X86::VPGATHERQQZ128rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem128_RC128X5_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128_RC128X }, },
31398 : { 13171 /* vpgatherqq */, X86::VPGATHERQQZ256rm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem256_RC256X5_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC256X }, },
31399 : { 13171 /* vpgatherqq */, X86::VPGATHERQQZrm, Convert__Reg1_0__Reg1_2__Tie0_1_1__Tie1_3_3__Mem512_RC5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
31400 : { 13182 /* vphaddbd */, X86::VPHADDBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31401 : { 13182 /* vphaddbd */, X86::VPHADDBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31402 : { 13191 /* vphaddbq */, X86::VPHADDBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31403 : { 13191 /* vphaddbq */, X86::VPHADDBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31404 : { 13200 /* vphaddbw */, X86::VPHADDBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31405 : { 13200 /* vphaddbw */, X86::VPHADDBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31406 : { 13209 /* vphaddd */, X86::VPHADDDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31407 : { 13209 /* vphaddd */, X86::VPHADDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31408 : { 13209 /* vphaddd */, X86::VPHADDDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31409 : { 13209 /* vphaddd */, X86::VPHADDDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31410 : { 13217 /* vphadddq */, X86::VPHADDDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31411 : { 13217 /* vphadddq */, X86::VPHADDDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31412 : { 13226 /* vphaddsw */, X86::VPHADDSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31413 : { 13226 /* vphaddsw */, X86::VPHADDSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31414 : { 13226 /* vphaddsw */, X86::VPHADDSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31415 : { 13226 /* vphaddsw */, X86::VPHADDSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31416 : { 13235 /* vphaddubd */, X86::VPHADDUBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31417 : { 13235 /* vphaddubd */, X86::VPHADDUBDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31418 : { 13245 /* vphaddubq */, X86::VPHADDUBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31419 : { 13245 /* vphaddubq */, X86::VPHADDUBQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31420 : { 13255 /* vphaddubw */, X86::VPHADDUBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31421 : { 13255 /* vphaddubw */, X86::VPHADDUBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31422 : { 13265 /* vphaddudq */, X86::VPHADDUDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31423 : { 13265 /* vphaddudq */, X86::VPHADDUDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31424 : { 13275 /* vphadduwd */, X86::VPHADDUWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31425 : { 13275 /* vphadduwd */, X86::VPHADDUWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31426 : { 13285 /* vphadduwq */, X86::VPHADDUWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31427 : { 13285 /* vphadduwq */, X86::VPHADDUWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31428 : { 13295 /* vphaddw */, X86::VPHADDWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31429 : { 13295 /* vphaddw */, X86::VPHADDWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31430 : { 13295 /* vphaddw */, X86::VPHADDWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31431 : { 13295 /* vphaddw */, X86::VPHADDWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31432 : { 13303 /* vphaddwd */, X86::VPHADDWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31433 : { 13303 /* vphaddwd */, X86::VPHADDWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31434 : { 13312 /* vphaddwq */, X86::VPHADDWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31435 : { 13312 /* vphaddwq */, X86::VPHADDWQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31436 : { 13321 /* vphminposuw */, X86::VPHMINPOSUWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31437 : { 13321 /* vphminposuw */, X86::VPHMINPOSUWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31438 : { 13333 /* vphsubbw */, X86::VPHSUBBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31439 : { 13333 /* vphsubbw */, X86::VPHSUBBWrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31440 : { 13342 /* vphsubd */, X86::VPHSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31441 : { 13342 /* vphsubd */, X86::VPHSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31442 : { 13342 /* vphsubd */, X86::VPHSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31443 : { 13342 /* vphsubd */, X86::VPHSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31444 : { 13350 /* vphsubdq */, X86::VPHSUBDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31445 : { 13350 /* vphsubdq */, X86::VPHSUBDQrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31446 : { 13359 /* vphsubsw */, X86::VPHSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31447 : { 13359 /* vphsubsw */, X86::VPHSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31448 : { 13359 /* vphsubsw */, X86::VPHSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31449 : { 13359 /* vphsubsw */, X86::VPHSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31450 : { 13368 /* vphsubw */, X86::VPHSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31451 : { 13368 /* vphsubw */, X86::VPHSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31452 : { 13368 /* vphsubw */, X86::VPHSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31453 : { 13368 /* vphsubw */, X86::VPHSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31454 : { 13376 /* vphsubwd */, X86::VPHSUBWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
31455 : { 13376 /* vphsubwd */, X86::VPHSUBWDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
31456 : { 13385 /* vpinsrb */, X86::VPINSRBrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31457 : { 13385 /* vpinsrb */, X86::VPINSRBrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem8, MCK_ImmUnsignedi8 }, },
31458 : { 13385 /* vpinsrb */, X86::VPINSRBZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31459 : { 13385 /* vpinsrb */, X86::VPINSRBZrm, Convert__Reg1_0__Reg1_1__Mem85_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem8, MCK_ImmUnsignedi8 }, },
31460 : { 13393 /* vpinsrd */, X86::VPINSRDrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32, MCK_ImmUnsignedi8 }, },
31461 : { 13393 /* vpinsrd */, X86::VPINSRDrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
31462 : { 13393 /* vpinsrd */, X86::VPINSRDZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32, MCK_ImmUnsignedi8 }, },
31463 : { 13393 /* vpinsrd */, X86::VPINSRDZrm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
31464 : { 13401 /* vpinsrq */, X86::VPINSRQrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR64, MCK_ImmUnsignedi8 }, },
31465 : { 13401 /* vpinsrq */, X86::VPINSRQrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
31466 : { 13401 /* vpinsrq */, X86::VPINSRQZrr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR64, MCK_ImmUnsignedi8 }, },
31467 : { 13401 /* vpinsrq */, X86::VPINSRQZrm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
31468 : { 13409 /* vpinsrw */, X86::VPINSRWrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31469 : { 13409 /* vpinsrw */, X86::VPINSRWrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem16, MCK_ImmUnsignedi8 }, },
31470 : { 13409 /* vpinsrw */, X86::VPINSRWZrr, Convert__Reg1_0__Reg1_1__GR32orGR641_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_GR32orGR64, MCK_ImmUnsignedi8 }, },
31471 : { 13409 /* vpinsrw */, X86::VPINSRWZrm, Convert__Reg1_0__Reg1_1__Mem165_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem16, MCK_ImmUnsignedi8 }, },
31472 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31473 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31474 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31475 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31476 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31477 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31478 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31479 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31480 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31481 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31482 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31483 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31484 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31485 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31486 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31487 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31488 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31489 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31490 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31491 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31492 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31493 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31494 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31495 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31496 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
31497 : { 13417 /* vplzcntd */, X86::VPLZCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
31498 : { 13417 /* vplzcntd */, X86::VPLZCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
31499 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
31500 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
31501 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
31502 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
31503 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
31504 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
31505 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31506 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31507 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31508 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
31509 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
31510 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
31511 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
31512 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
31513 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
31514 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
31515 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
31516 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31517 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
31518 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
31519 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31520 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
31521 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
31522 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31523 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
31524 : { 13426 /* vplzcntq */, X86::VPLZCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
31525 : { 13426 /* vplzcntq */, X86::VPLZCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
31526 : { 13435 /* vpmacsdd */, X86::VPMACSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31527 : { 13435 /* vpmacsdd */, X86::VPMACSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31528 : { 13444 /* vpmacsdqh */, X86::VPMACSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31529 : { 13444 /* vpmacsdqh */, X86::VPMACSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31530 : { 13454 /* vpmacsdql */, X86::VPMACSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31531 : { 13454 /* vpmacsdql */, X86::VPMACSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31532 : { 13464 /* vpmacssdd */, X86::VPMACSSDDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31533 : { 13464 /* vpmacssdd */, X86::VPMACSSDDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31534 : { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31535 : { 13474 /* vpmacssdqh */, X86::VPMACSSDQHrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31536 : { 13485 /* vpmacssdql */, X86::VPMACSSDQLrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31537 : { 13485 /* vpmacssdql */, X86::VPMACSSDQLrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31538 : { 13496 /* vpmacsswd */, X86::VPMACSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31539 : { 13496 /* vpmacsswd */, X86::VPMACSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31540 : { 13506 /* vpmacssww */, X86::VPMACSSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31541 : { 13506 /* vpmacssww */, X86::VPMACSSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31542 : { 13516 /* vpmacswd */, X86::VPMACSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31543 : { 13516 /* vpmacswd */, X86::VPMACSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31544 : { 13525 /* vpmacsww */, X86::VPMACSWWrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31545 : { 13525 /* vpmacsww */, X86::VPMACSWWrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31546 : { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31547 : { 13534 /* vpmadcsswd */, X86::VPMADCSSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31548 : { 13545 /* vpmadcswd */, X86::VPMADCSWDrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
31549 : { 13545 /* vpmadcswd */, X86::VPMADCSWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
31550 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31551 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31552 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31553 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31554 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31555 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31556 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31557 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31558 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31559 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31560 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31561 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31562 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31563 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31564 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31565 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31566 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31567 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31568 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31569 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31570 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31571 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31572 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31573 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31574 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31575 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31576 : { 13555 /* vpmadd52huq */, X86::VPMADD52HUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31577 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31578 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31579 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31580 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31581 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31582 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31583 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31584 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31585 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31586 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31587 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31588 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31589 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31590 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31591 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31592 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31593 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31594 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31595 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31596 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31597 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31598 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31599 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31600 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31601 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31602 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31603 : { 13567 /* vpmadd52luq */, X86::VPMADD52LUQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31604 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31605 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31606 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31607 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31608 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31609 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31610 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31611 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31612 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31613 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31614 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31615 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31616 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31617 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31618 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31619 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31620 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31621 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31622 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31623 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31624 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31625 : { 13579 /* vpmaddubsw */, X86::VPMADDUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31626 : { 13590 /* vpmaddwd */, X86::VPMADDWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31627 : { 13590 /* vpmaddwd */, X86::VPMADDWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31628 : { 13590 /* vpmaddwd */, X86::VPMADDWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31629 : { 13590 /* vpmaddwd */, X86::VPMADDWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31630 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31631 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31632 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31633 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31634 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31635 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31636 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31637 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31638 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31639 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31640 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31641 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31642 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31643 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31644 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31645 : { 13590 /* vpmaddwd */, X86::VPMADDWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31646 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31647 : { 13590 /* vpmaddwd */, X86::VPMADDWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31648 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31649 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31650 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
31651 : { 13599 /* vpmaskmovd */, X86::VPMASKMOVDYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
31652 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31653 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31654 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQmr, Convert__Mem1285_0__Reg1_1__Reg1_2, 0, { MCK_Mem128, MCK_FR32, MCK_FR32 }, },
31655 : { 13610 /* vpmaskmovq */, X86::VPMASKMOVQYmr, Convert__Mem2565_0__Reg1_1__Reg1_2, 0, { MCK_Mem256, MCK_VR256, MCK_VR256 }, },
31656 : { 13621 /* vpmaxsb */, X86::VPMAXSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31657 : { 13621 /* vpmaxsb */, X86::VPMAXSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31658 : { 13621 /* vpmaxsb */, X86::VPMAXSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31659 : { 13621 /* vpmaxsb */, X86::VPMAXSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31660 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31661 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31662 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31663 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31664 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31665 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31666 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31667 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31668 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31669 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31670 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31671 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31672 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31673 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31674 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31675 : { 13621 /* vpmaxsb */, X86::VPMAXSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31676 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31677 : { 13621 /* vpmaxsb */, X86::VPMAXSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31678 : { 13629 /* vpmaxsd */, X86::VPMAXSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31679 : { 13629 /* vpmaxsd */, X86::VPMAXSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31680 : { 13629 /* vpmaxsd */, X86::VPMAXSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31681 : { 13629 /* vpmaxsd */, X86::VPMAXSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31682 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31683 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31684 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31685 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31686 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31687 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31688 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31689 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31690 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31691 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31692 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31693 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31694 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31695 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31696 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31697 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31698 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31699 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31700 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31701 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31702 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31703 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31704 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31705 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31706 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31707 : { 13629 /* vpmaxsd */, X86::VPMAXSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31708 : { 13629 /* vpmaxsd */, X86::VPMAXSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31709 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31710 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31711 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31712 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31713 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31714 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31715 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31716 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31717 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31718 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31719 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31720 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31721 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31722 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31723 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31724 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31725 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31726 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31727 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31728 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31729 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31730 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31731 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31732 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31733 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31734 : { 13637 /* vpmaxsq */, X86::VPMAXSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31735 : { 13637 /* vpmaxsq */, X86::VPMAXSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31736 : { 13645 /* vpmaxsw */, X86::VPMAXSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31737 : { 13645 /* vpmaxsw */, X86::VPMAXSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31738 : { 13645 /* vpmaxsw */, X86::VPMAXSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31739 : { 13645 /* vpmaxsw */, X86::VPMAXSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31740 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31741 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31742 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31743 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31744 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31745 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31746 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31747 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31748 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31749 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31750 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31751 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31752 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31753 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31754 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31755 : { 13645 /* vpmaxsw */, X86::VPMAXSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31756 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31757 : { 13645 /* vpmaxsw */, X86::VPMAXSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31758 : { 13653 /* vpmaxub */, X86::VPMAXUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31759 : { 13653 /* vpmaxub */, X86::VPMAXUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31760 : { 13653 /* vpmaxub */, X86::VPMAXUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31761 : { 13653 /* vpmaxub */, X86::VPMAXUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31762 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31763 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31764 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31765 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31766 : { 13653 /* vpmaxub */, X86::VPMAXUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31767 : { 13653 /* vpmaxub */, X86::VPMAXUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31768 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31769 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31770 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31771 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31772 : { 13653 /* vpmaxub */, X86::VPMAXUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31773 : { 13653 /* vpmaxub */, X86::VPMAXUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31774 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31775 : { 13653 /* vpmaxub */, X86::VPMAXUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31776 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31777 : { 13653 /* vpmaxub */, X86::VPMAXUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31778 : { 13653 /* vpmaxub */, X86::VPMAXUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31779 : { 13653 /* vpmaxub */, X86::VPMAXUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31780 : { 13661 /* vpmaxud */, X86::VPMAXUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31781 : { 13661 /* vpmaxud */, X86::VPMAXUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31782 : { 13661 /* vpmaxud */, X86::VPMAXUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31783 : { 13661 /* vpmaxud */, X86::VPMAXUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31784 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31785 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31786 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31787 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31788 : { 13661 /* vpmaxud */, X86::VPMAXUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31789 : { 13661 /* vpmaxud */, X86::VPMAXUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31790 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31791 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31792 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31793 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31794 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31795 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31796 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31797 : { 13661 /* vpmaxud */, X86::VPMAXUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31798 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31799 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31800 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31801 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31802 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31803 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31804 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31805 : { 13661 /* vpmaxud */, X86::VPMAXUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31806 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31807 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31808 : { 13661 /* vpmaxud */, X86::VPMAXUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31809 : { 13661 /* vpmaxud */, X86::VPMAXUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31810 : { 13661 /* vpmaxud */, X86::VPMAXUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31811 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31812 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31813 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31814 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31815 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31816 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31817 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31818 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31819 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31820 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31821 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31822 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31823 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31824 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31825 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31826 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31827 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31828 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31829 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31830 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31831 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31832 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31833 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31834 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31835 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31836 : { 13669 /* vpmaxuq */, X86::VPMAXUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31837 : { 13669 /* vpmaxuq */, X86::VPMAXUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31838 : { 13677 /* vpmaxuw */, X86::VPMAXUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31839 : { 13677 /* vpmaxuw */, X86::VPMAXUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31840 : { 13677 /* vpmaxuw */, X86::VPMAXUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31841 : { 13677 /* vpmaxuw */, X86::VPMAXUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31842 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31843 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31844 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31845 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31846 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31847 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31848 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31849 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31850 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31851 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31852 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31853 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31854 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31855 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31856 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31857 : { 13677 /* vpmaxuw */, X86::VPMAXUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31858 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31859 : { 13677 /* vpmaxuw */, X86::VPMAXUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31860 : { 13685 /* vpminsb */, X86::VPMINSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31861 : { 13685 /* vpminsb */, X86::VPMINSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31862 : { 13685 /* vpminsb */, X86::VPMINSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31863 : { 13685 /* vpminsb */, X86::VPMINSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31864 : { 13685 /* vpminsb */, X86::VPMINSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31865 : { 13685 /* vpminsb */, X86::VPMINSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31866 : { 13685 /* vpminsb */, X86::VPMINSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31867 : { 13685 /* vpminsb */, X86::VPMINSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31868 : { 13685 /* vpminsb */, X86::VPMINSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31869 : { 13685 /* vpminsb */, X86::VPMINSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31870 : { 13685 /* vpminsb */, X86::VPMINSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31871 : { 13685 /* vpminsb */, X86::VPMINSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31872 : { 13685 /* vpminsb */, X86::VPMINSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31873 : { 13685 /* vpminsb */, X86::VPMINSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31874 : { 13685 /* vpminsb */, X86::VPMINSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31875 : { 13685 /* vpminsb */, X86::VPMINSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31876 : { 13685 /* vpminsb */, X86::VPMINSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31877 : { 13685 /* vpminsb */, X86::VPMINSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31878 : { 13685 /* vpminsb */, X86::VPMINSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31879 : { 13685 /* vpminsb */, X86::VPMINSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31880 : { 13685 /* vpminsb */, X86::VPMINSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31881 : { 13685 /* vpminsb */, X86::VPMINSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31882 : { 13693 /* vpminsd */, X86::VPMINSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31883 : { 13693 /* vpminsd */, X86::VPMINSDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31884 : { 13693 /* vpminsd */, X86::VPMINSDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31885 : { 13693 /* vpminsd */, X86::VPMINSDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31886 : { 13693 /* vpminsd */, X86::VPMINSDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31887 : { 13693 /* vpminsd */, X86::VPMINSDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31888 : { 13693 /* vpminsd */, X86::VPMINSDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31889 : { 13693 /* vpminsd */, X86::VPMINSDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31890 : { 13693 /* vpminsd */, X86::VPMINSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31891 : { 13693 /* vpminsd */, X86::VPMINSDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31892 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31893 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31894 : { 13693 /* vpminsd */, X86::VPMINSDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31895 : { 13693 /* vpminsd */, X86::VPMINSDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31896 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31897 : { 13693 /* vpminsd */, X86::VPMINSDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31898 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31899 : { 13693 /* vpminsd */, X86::VPMINSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31900 : { 13693 /* vpminsd */, X86::VPMINSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31901 : { 13693 /* vpminsd */, X86::VPMINSDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31902 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31903 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31904 : { 13693 /* vpminsd */, X86::VPMINSDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31905 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31906 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31907 : { 13693 /* vpminsd */, X86::VPMINSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31908 : { 13693 /* vpminsd */, X86::VPMINSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31909 : { 13693 /* vpminsd */, X86::VPMINSDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31910 : { 13693 /* vpminsd */, X86::VPMINSDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31911 : { 13693 /* vpminsd */, X86::VPMINSDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31912 : { 13693 /* vpminsd */, X86::VPMINSDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31913 : { 13701 /* vpminsq */, X86::VPMINSQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31914 : { 13701 /* vpminsq */, X86::VPMINSQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31915 : { 13701 /* vpminsq */, X86::VPMINSQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31916 : { 13701 /* vpminsq */, X86::VPMINSQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31917 : { 13701 /* vpminsq */, X86::VPMINSQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31918 : { 13701 /* vpminsq */, X86::VPMINSQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31919 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31920 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31921 : { 13701 /* vpminsq */, X86::VPMINSQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31922 : { 13701 /* vpminsq */, X86::VPMINSQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31923 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31924 : { 13701 /* vpminsq */, X86::VPMINSQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31925 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31926 : { 13701 /* vpminsq */, X86::VPMINSQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31927 : { 13701 /* vpminsq */, X86::VPMINSQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31928 : { 13701 /* vpminsq */, X86::VPMINSQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31929 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31930 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31931 : { 13701 /* vpminsq */, X86::VPMINSQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31932 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31933 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31934 : { 13701 /* vpminsq */, X86::VPMINSQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31935 : { 13701 /* vpminsq */, X86::VPMINSQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31936 : { 13701 /* vpminsq */, X86::VPMINSQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31937 : { 13701 /* vpminsq */, X86::VPMINSQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
31938 : { 13701 /* vpminsq */, X86::VPMINSQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
31939 : { 13701 /* vpminsq */, X86::VPMINSQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
31940 : { 13709 /* vpminsw */, X86::VPMINSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31941 : { 13709 /* vpminsw */, X86::VPMINSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31942 : { 13709 /* vpminsw */, X86::VPMINSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31943 : { 13709 /* vpminsw */, X86::VPMINSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31944 : { 13709 /* vpminsw */, X86::VPMINSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31945 : { 13709 /* vpminsw */, X86::VPMINSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31946 : { 13709 /* vpminsw */, X86::VPMINSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31947 : { 13709 /* vpminsw */, X86::VPMINSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31948 : { 13709 /* vpminsw */, X86::VPMINSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31949 : { 13709 /* vpminsw */, X86::VPMINSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31950 : { 13709 /* vpminsw */, X86::VPMINSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31951 : { 13709 /* vpminsw */, X86::VPMINSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31952 : { 13709 /* vpminsw */, X86::VPMINSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31953 : { 13709 /* vpminsw */, X86::VPMINSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31954 : { 13709 /* vpminsw */, X86::VPMINSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31955 : { 13709 /* vpminsw */, X86::VPMINSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31956 : { 13709 /* vpminsw */, X86::VPMINSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31957 : { 13709 /* vpminsw */, X86::VPMINSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31958 : { 13709 /* vpminsw */, X86::VPMINSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31959 : { 13709 /* vpminsw */, X86::VPMINSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31960 : { 13709 /* vpminsw */, X86::VPMINSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31961 : { 13709 /* vpminsw */, X86::VPMINSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31962 : { 13717 /* vpminub */, X86::VPMINUBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31963 : { 13717 /* vpminub */, X86::VPMINUBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31964 : { 13717 /* vpminub */, X86::VPMINUBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31965 : { 13717 /* vpminub */, X86::VPMINUBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31966 : { 13717 /* vpminub */, X86::VPMINUBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31967 : { 13717 /* vpminub */, X86::VPMINUBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31968 : { 13717 /* vpminub */, X86::VPMINUBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31969 : { 13717 /* vpminub */, X86::VPMINUBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31970 : { 13717 /* vpminub */, X86::VPMINUBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31971 : { 13717 /* vpminub */, X86::VPMINUBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31972 : { 13717 /* vpminub */, X86::VPMINUBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31973 : { 13717 /* vpminub */, X86::VPMINUBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31974 : { 13717 /* vpminub */, X86::VPMINUBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
31975 : { 13717 /* vpminub */, X86::VPMINUBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
31976 : { 13717 /* vpminub */, X86::VPMINUBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
31977 : { 13717 /* vpminub */, X86::VPMINUBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
31978 : { 13717 /* vpminub */, X86::VPMINUBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
31979 : { 13717 /* vpminub */, X86::VPMINUBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
31980 : { 13717 /* vpminub */, X86::VPMINUBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
31981 : { 13717 /* vpminub */, X86::VPMINUBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
31982 : { 13717 /* vpminub */, X86::VPMINUBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
31983 : { 13717 /* vpminub */, X86::VPMINUBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
31984 : { 13725 /* vpminud */, X86::VPMINUDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
31985 : { 13725 /* vpminud */, X86::VPMINUDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
31986 : { 13725 /* vpminud */, X86::VPMINUDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
31987 : { 13725 /* vpminud */, X86::VPMINUDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
31988 : { 13725 /* vpminud */, X86::VPMINUDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
31989 : { 13725 /* vpminud */, X86::VPMINUDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
31990 : { 13725 /* vpminud */, X86::VPMINUDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
31991 : { 13725 /* vpminud */, X86::VPMINUDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
31992 : { 13725 /* vpminud */, X86::VPMINUDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
31993 : { 13725 /* vpminud */, X86::VPMINUDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
31994 : { 13725 /* vpminud */, X86::VPMINUDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
31995 : { 13725 /* vpminud */, X86::VPMINUDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
31996 : { 13725 /* vpminud */, X86::VPMINUDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
31997 : { 13725 /* vpminud */, X86::VPMINUDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
31998 : { 13725 /* vpminud */, X86::VPMINUDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
31999 : { 13725 /* vpminud */, X86::VPMINUDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32000 : { 13725 /* vpminud */, X86::VPMINUDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32001 : { 13725 /* vpminud */, X86::VPMINUDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32002 : { 13725 /* vpminud */, X86::VPMINUDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32003 : { 13725 /* vpminud */, X86::VPMINUDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32004 : { 13725 /* vpminud */, X86::VPMINUDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32005 : { 13725 /* vpminud */, X86::VPMINUDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32006 : { 13725 /* vpminud */, X86::VPMINUDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32007 : { 13725 /* vpminud */, X86::VPMINUDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32008 : { 13725 /* vpminud */, X86::VPMINUDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32009 : { 13725 /* vpminud */, X86::VPMINUDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32010 : { 13725 /* vpminud */, X86::VPMINUDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32011 : { 13725 /* vpminud */, X86::VPMINUDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32012 : { 13725 /* vpminud */, X86::VPMINUDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32013 : { 13725 /* vpminud */, X86::VPMINUDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32014 : { 13725 /* vpminud */, X86::VPMINUDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32015 : { 13733 /* vpminuq */, X86::VPMINUQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32016 : { 13733 /* vpminuq */, X86::VPMINUQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32017 : { 13733 /* vpminuq */, X86::VPMINUQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32018 : { 13733 /* vpminuq */, X86::VPMINUQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32019 : { 13733 /* vpminuq */, X86::VPMINUQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32020 : { 13733 /* vpminuq */, X86::VPMINUQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32021 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32022 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32023 : { 13733 /* vpminuq */, X86::VPMINUQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32024 : { 13733 /* vpminuq */, X86::VPMINUQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32025 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32026 : { 13733 /* vpminuq */, X86::VPMINUQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32027 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32028 : { 13733 /* vpminuq */, X86::VPMINUQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32029 : { 13733 /* vpminuq */, X86::VPMINUQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32030 : { 13733 /* vpminuq */, X86::VPMINUQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32031 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32032 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32033 : { 13733 /* vpminuq */, X86::VPMINUQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32034 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32035 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32036 : { 13733 /* vpminuq */, X86::VPMINUQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32037 : { 13733 /* vpminuq */, X86::VPMINUQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32038 : { 13733 /* vpminuq */, X86::VPMINUQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32039 : { 13733 /* vpminuq */, X86::VPMINUQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32040 : { 13733 /* vpminuq */, X86::VPMINUQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32041 : { 13733 /* vpminuq */, X86::VPMINUQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32042 : { 13741 /* vpminuw */, X86::VPMINUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32043 : { 13741 /* vpminuw */, X86::VPMINUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32044 : { 13741 /* vpminuw */, X86::VPMINUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32045 : { 13741 /* vpminuw */, X86::VPMINUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32046 : { 13741 /* vpminuw */, X86::VPMINUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32047 : { 13741 /* vpminuw */, X86::VPMINUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32048 : { 13741 /* vpminuw */, X86::VPMINUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32049 : { 13741 /* vpminuw */, X86::VPMINUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32050 : { 13741 /* vpminuw */, X86::VPMINUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32051 : { 13741 /* vpminuw */, X86::VPMINUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32052 : { 13741 /* vpminuw */, X86::VPMINUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32053 : { 13741 /* vpminuw */, X86::VPMINUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32054 : { 13741 /* vpminuw */, X86::VPMINUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32055 : { 13741 /* vpminuw */, X86::VPMINUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32056 : { 13741 /* vpminuw */, X86::VPMINUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32057 : { 13741 /* vpminuw */, X86::VPMINUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32058 : { 13741 /* vpminuw */, X86::VPMINUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32059 : { 13741 /* vpminuw */, X86::VPMINUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32060 : { 13741 /* vpminuw */, X86::VPMINUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32061 : { 13741 /* vpminuw */, X86::VPMINUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32062 : { 13741 /* vpminuw */, X86::VPMINUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32063 : { 13741 /* vpminuw */, X86::VPMINUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32064 : { 13749 /* vpmovb2m */, X86::VPMOVB2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
32065 : { 13749 /* vpmovb2m */, X86::VPMOVB2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
32066 : { 13749 /* vpmovb2m */, X86::VPMOVB2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
32067 : { 13758 /* vpmovd2m */, X86::VPMOVD2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
32068 : { 13758 /* vpmovd2m */, X86::VPMOVD2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
32069 : { 13758 /* vpmovd2m */, X86::VPMOVD2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
32070 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32071 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32072 : { 13767 /* vpmovdb */, X86::VPMOVDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32073 : { 13767 /* vpmovdb */, X86::VPMOVDBZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32074 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32075 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32076 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32077 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32078 : { 13767 /* vpmovdb */, X86::VPMOVDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32079 : { 13767 /* vpmovdb */, X86::VPMOVDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32080 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32081 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32082 : { 13767 /* vpmovdb */, X86::VPMOVDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32083 : { 13767 /* vpmovdb */, X86::VPMOVDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32084 : { 13767 /* vpmovdb */, X86::VPMOVDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32085 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32086 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32087 : { 13775 /* vpmovdw */, X86::VPMOVDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32088 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32089 : { 13775 /* vpmovdw */, X86::VPMOVDWZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32090 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32091 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32092 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32093 : { 13775 /* vpmovdw */, X86::VPMOVDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32094 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32095 : { 13775 /* vpmovdw */, X86::VPMOVDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32096 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32097 : { 13775 /* vpmovdw */, X86::VPMOVDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32098 : { 13775 /* vpmovdw */, X86::VPMOVDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32099 : { 13775 /* vpmovdw */, X86::VPMOVDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32100 : { 13783 /* vpmovm2b */, X86::VPMOVM2BZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
32101 : { 13783 /* vpmovm2b */, X86::VPMOVM2BZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
32102 : { 13783 /* vpmovm2b */, X86::VPMOVM2BZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
32103 : { 13792 /* vpmovm2d */, X86::VPMOVM2DZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
32104 : { 13792 /* vpmovm2d */, X86::VPMOVM2DZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
32105 : { 13792 /* vpmovm2d */, X86::VPMOVM2DZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
32106 : { 13801 /* vpmovm2q */, X86::VPMOVM2QZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
32107 : { 13801 /* vpmovm2q */, X86::VPMOVM2QZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
32108 : { 13801 /* vpmovm2q */, X86::VPMOVM2QZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
32109 : { 13810 /* vpmovm2w */, X86::VPMOVM2WZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VK1 }, },
32110 : { 13810 /* vpmovm2w */, X86::VPMOVM2WZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VK1 }, },
32111 : { 13810 /* vpmovm2w */, X86::VPMOVM2WZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VK1 }, },
32112 : { 13819 /* vpmovmskb */, X86::VPMOVMSKBrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_FR32 }, },
32113 : { 13819 /* vpmovmskb */, X86::VPMOVMSKBYrr, Convert__GR32orGR641_0__Reg1_1, 0, { MCK_GR32orGR64, MCK_VR256 }, },
32114 : { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
32115 : { 13829 /* vpmovq2m */, X86::VPMOVQ2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
32116 : { 13829 /* vpmovq2m */, X86::VPMOVQ2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
32117 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32118 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32119 : { 13838 /* vpmovqb */, X86::VPMOVQBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32120 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_FR32X }, },
32121 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR256X }, },
32122 : { 13838 /* vpmovqb */, X86::VPMOVQBZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR512 }, },
32123 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32124 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32125 : { 13838 /* vpmovqb */, X86::VPMOVQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32126 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, 0, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32127 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32128 : { 13838 /* vpmovqb */, X86::VPMOVQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32129 : { 13838 /* vpmovqb */, X86::VPMOVQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32130 : { 13838 /* vpmovqb */, X86::VPMOVQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32131 : { 13838 /* vpmovqb */, X86::VPMOVQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32132 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32133 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32134 : { 13846 /* vpmovqd */, X86::VPMOVQDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32135 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32136 : { 13846 /* vpmovqd */, X86::VPMOVQDZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32137 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32138 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32139 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32140 : { 13846 /* vpmovqd */, X86::VPMOVQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32141 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32142 : { 13846 /* vpmovqd */, X86::VPMOVQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32143 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32144 : { 13846 /* vpmovqd */, X86::VPMOVQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32145 : { 13846 /* vpmovqd */, X86::VPMOVQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32146 : { 13846 /* vpmovqd */, X86::VPMOVQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32147 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32148 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32149 : { 13854 /* vpmovqw */, X86::VPMOVQWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32150 : { 13854 /* vpmovqw */, X86::VPMOVQWZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32151 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32152 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32153 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32154 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32155 : { 13854 /* vpmovqw */, X86::VPMOVQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32156 : { 13854 /* vpmovqw */, X86::VPMOVQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32157 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32158 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32159 : { 13854 /* vpmovqw */, X86::VPMOVQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32160 : { 13854 /* vpmovqw */, X86::VPMOVQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32161 : { 13854 /* vpmovqw */, X86::VPMOVQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32162 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32163 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32164 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32165 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32166 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32167 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32168 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32169 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32170 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32171 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32172 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32173 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32174 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32175 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32176 : { 13862 /* vpmovsdb */, X86::VPMOVSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32177 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32178 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32179 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32180 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32181 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32182 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32183 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32184 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32185 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32186 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32187 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32188 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32189 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32190 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32191 : { 13871 /* vpmovsdw */, X86::VPMOVSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32192 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32193 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32194 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32195 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_FR32X }, },
32196 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR256X }, },
32197 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR512 }, },
32198 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32199 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32200 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32201 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, 0, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32202 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32203 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32204 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32205 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32206 : { 13880 /* vpmovsqb */, X86::VPMOVSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32207 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32208 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32209 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32210 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32211 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32212 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32213 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32214 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32215 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32216 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32217 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32218 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32219 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32220 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32221 : { 13889 /* vpmovsqd */, X86::VPMOVSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32222 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32223 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32224 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32225 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32226 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32227 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32228 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32229 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32230 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32231 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32232 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32233 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32234 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32235 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32236 : { 13898 /* vpmovsqw */, X86::VPMOVSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32237 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32238 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32239 : { 13907 /* vpmovswb */, X86::VPMOVSWBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32240 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32241 : { 13907 /* vpmovswb */, X86::VPMOVSWBZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32242 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32243 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32244 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32245 : { 13907 /* vpmovswb */, X86::VPMOVSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32246 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32247 : { 13907 /* vpmovswb */, X86::VPMOVSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32248 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32249 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32250 : { 13907 /* vpmovswb */, X86::VPMOVSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32251 : { 13907 /* vpmovswb */, X86::VPMOVSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32252 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32253 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32254 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32255 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32256 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32257 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32258 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32259 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32260 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32261 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32262 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32263 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32264 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32265 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32266 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32267 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32268 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32269 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32270 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32271 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32272 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32273 : { 13916 /* vpmovsxbd */, X86::VPMOVSXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32274 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32275 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
32276 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32277 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
32278 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32279 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32X, MCK_Mem16 }, },
32280 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32281 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
32282 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32283 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
32284 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32285 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
32286 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32287 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32288 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32289 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32290 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32291 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
32292 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32293 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32294 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32295 : { 13926 /* vpmovsxbq */, X86::VPMOVSXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32296 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32297 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32298 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32299 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32300 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32301 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32302 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32303 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32304 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32305 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32306 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32307 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32308 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32309 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32310 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32311 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32312 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32313 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32314 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32315 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32316 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32317 : { 13936 /* vpmovsxbw */, X86::VPMOVSXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32318 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32319 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32320 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32321 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32322 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32323 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32324 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32325 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32326 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32327 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32328 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32329 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32330 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32331 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32332 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32333 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32334 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32335 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32336 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32337 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32338 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32339 : { 13946 /* vpmovsxdq */, X86::VPMOVSXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32340 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32341 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32342 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32343 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32344 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32345 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32346 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32347 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32348 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32349 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32350 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32351 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32352 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32353 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32354 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32355 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32356 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32357 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32358 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32359 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32360 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32361 : { 13956 /* vpmovsxwd */, X86::VPMOVSXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32362 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32363 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32364 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32365 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32366 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32367 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32368 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32369 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32370 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32371 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32372 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32373 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32374 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32375 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32376 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32377 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32378 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32379 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32380 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32381 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32382 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32383 : { 13966 /* vpmovsxwq */, X86::VPMOVSXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32384 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32385 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32386 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32387 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32388 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32389 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32390 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32391 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32392 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32393 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32394 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32395 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32396 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32397 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32398 : { 13976 /* vpmovusdb */, X86::VPMOVUSDBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32399 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32400 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32401 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32402 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32403 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32404 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32405 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32406 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32407 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32408 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32409 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32410 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32411 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32412 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32413 : { 13986 /* vpmovusdw */, X86::VPMOVUSDWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32414 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32415 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32416 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32417 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_FR32X }, },
32418 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_VR256X }, },
32419 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR512 }, },
32420 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32421 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32422 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32423 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128mrk, Convert__Mem165_0__Reg1_2__Reg1_4, 0, { MCK_Mem16, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32424 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32425 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZmrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32426 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32427 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32428 : { 13996 /* vpmovusqb */, X86::VPMOVUSQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32429 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32430 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32431 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32432 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32433 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32434 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32435 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32436 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32437 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32438 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32439 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32440 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32441 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32442 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32443 : { 14006 /* vpmovusqd */, X86::VPMOVUSQDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32444 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32445 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32446 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR512 }, },
32447 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR512 }, },
32448 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_FR32X }, },
32449 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_VR256X }, },
32450 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32451 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32452 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32453 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZmrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32454 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128mrk, Convert__Mem325_0__Reg1_2__Reg1_4, 0, { MCK_Mem32, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32455 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32456 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32457 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32458 : { 14016 /* vpmovusqw */, X86::VPMOVUSQWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32459 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32460 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32461 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32462 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32463 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32464 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32465 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32466 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32467 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32468 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32469 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32470 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32471 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32472 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32473 : { 14026 /* vpmovuswb */, X86::VPMOVUSWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32474 : { 14036 /* vpmovw2m */, X86::VPMOVW2MZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_FR32X }, },
32475 : { 14036 /* vpmovw2m */, X86::VPMOVW2MZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR256X }, },
32476 : { 14036 /* vpmovw2m */, X86::VPMOVW2MZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VK1, MCK_VR512 }, },
32477 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32478 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_VR256X }, },
32479 : { 14045 /* vpmovwb */, X86::VPMOVWBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR512 }, },
32480 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256mr, Convert__Mem1285_0__Reg1_1, 0, { MCK_Mem128, MCK_VR256X }, },
32481 : { 14045 /* vpmovwb */, X86::VPMOVWBZmr, Convert__Mem2565_0__Reg1_1, 0, { MCK_Mem256, MCK_VR512 }, },
32482 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_FR32X }, },
32483 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32484 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32485 : { 14045 /* vpmovwb */, X86::VPMOVWBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32486 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256mrk, Convert__Mem1285_0__Reg1_2__Reg1_4, 0, { MCK_Mem128, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32487 : { 14045 /* vpmovwb */, X86::VPMOVWBZmrk, Convert__Mem2565_0__Reg1_2__Reg1_4, 0, { MCK_Mem256, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32488 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128mrk, Convert__Mem645_0__Reg1_2__Reg1_4, 0, { MCK_Mem64, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32489 : { 14045 /* vpmovwb */, X86::VPMOVWBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32490 : { 14045 /* vpmovwb */, X86::VPMOVWBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32491 : { 14045 /* vpmovwb */, X86::VPMOVWBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32492 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32493 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32494 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32495 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32496 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32497 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32498 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32499 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32500 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32501 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32502 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32503 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32504 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32505 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32506 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32507 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32508 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32509 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32510 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32511 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32512 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32513 : { 14053 /* vpmovzxbd */, X86::VPMOVZXBDZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32514 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32515 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQrm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32, MCK_Mem16 }, },
32516 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32517 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQYrm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256, MCK_Mem32 }, },
32518 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32519 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rm, Convert__Reg1_0__Mem165_1, 0, { MCK_FR32X, MCK_Mem16 }, },
32520 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32521 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rm, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32 }, },
32522 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32523 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64 }, },
32524 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32525 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem165_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem16 }, },
32526 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32527 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32528 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32529 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32530 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32531 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem165_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem16 }, },
32532 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32533 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32534 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32535 : { 14063 /* vpmovzxbq */, X86::VPMOVZXBQZrmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32536 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32537 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32538 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32539 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32540 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32541 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32542 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32543 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32544 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32545 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32546 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32547 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32548 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32549 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32550 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32551 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32552 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32553 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32554 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32555 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32556 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32557 : { 14073 /* vpmovzxbw */, X86::VPMOVZXBWZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32558 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32559 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32560 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32561 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32562 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32563 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32564 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32565 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32566 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32567 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32568 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32569 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32570 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32571 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32572 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32573 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32574 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32575 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32576 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32577 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32578 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32579 : { 14083 /* vpmovzxdq */, X86::VPMOVZXDQZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32580 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32581 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
32582 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32583 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDYrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256, MCK_Mem128 }, },
32584 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32585 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
32586 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32587 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR256X, MCK_Mem128 }, },
32588 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR256X }, },
32589 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR512, MCK_Mem256 }, },
32590 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32591 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32592 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32593 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32594 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32595 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32596 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32597 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32598 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32599 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32600 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32601 : { 14093 /* vpmovzxwd */, X86::VPMOVZXWDZrmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32602 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
32603 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
32604 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_FR32 }, },
32605 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQYrm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256, MCK_Mem64 }, },
32606 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32607 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
32608 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_FR32X }, },
32609 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rm, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64 }, },
32610 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_FR32X }, },
32611 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_VR512, MCK_Mem128 }, },
32612 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32613 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32 }, },
32614 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32615 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64 }, },
32616 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32617 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32618 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32619 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32 }, },
32620 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32621 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64 }, },
32622 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32623 : { 14103 /* vpmovzxwq */, X86::VPMOVZXWQZrmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32624 : { 14113 /* vpmuldq */, X86::VPMULDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32625 : { 14113 /* vpmuldq */, X86::VPMULDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32626 : { 14113 /* vpmuldq */, X86::VPMULDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32627 : { 14113 /* vpmuldq */, X86::VPMULDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32628 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32629 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32630 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32631 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32632 : { 14113 /* vpmuldq */, X86::VPMULDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32633 : { 14113 /* vpmuldq */, X86::VPMULDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32634 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32635 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32636 : { 14113 /* vpmuldq */, X86::VPMULDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32637 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32638 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32639 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32640 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32641 : { 14113 /* vpmuldq */, X86::VPMULDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32642 : { 14113 /* vpmuldq */, X86::VPMULDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32643 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32644 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32645 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32646 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32647 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32648 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32649 : { 14113 /* vpmuldq */, X86::VPMULDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32650 : { 14113 /* vpmuldq */, X86::VPMULDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32651 : { 14113 /* vpmuldq */, X86::VPMULDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32652 : { 14113 /* vpmuldq */, X86::VPMULDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32653 : { 14113 /* vpmuldq */, X86::VPMULDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32654 : { 14113 /* vpmuldq */, X86::VPMULDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32655 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32656 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32657 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32658 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32659 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32660 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32661 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32662 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32663 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32664 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32665 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32666 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32667 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32668 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32669 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32670 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32671 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32672 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32673 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32674 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32675 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32676 : { 14121 /* vpmulhrsw */, X86::VPMULHRSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32677 : { 14131 /* vpmulhuw */, X86::VPMULHUWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32678 : { 14131 /* vpmulhuw */, X86::VPMULHUWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32679 : { 14131 /* vpmulhuw */, X86::VPMULHUWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32680 : { 14131 /* vpmulhuw */, X86::VPMULHUWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32681 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32682 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32683 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32684 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32685 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32686 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32687 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32688 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32689 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32690 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32691 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32692 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32693 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32694 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32695 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32696 : { 14131 /* vpmulhuw */, X86::VPMULHUWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32697 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32698 : { 14131 /* vpmulhuw */, X86::VPMULHUWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32699 : { 14140 /* vpmulhw */, X86::VPMULHWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32700 : { 14140 /* vpmulhw */, X86::VPMULHWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32701 : { 14140 /* vpmulhw */, X86::VPMULHWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32702 : { 14140 /* vpmulhw */, X86::VPMULHWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32703 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32704 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32705 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32706 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32707 : { 14140 /* vpmulhw */, X86::VPMULHWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32708 : { 14140 /* vpmulhw */, X86::VPMULHWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32709 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32710 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32711 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32712 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32713 : { 14140 /* vpmulhw */, X86::VPMULHWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32714 : { 14140 /* vpmulhw */, X86::VPMULHWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32715 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32716 : { 14140 /* vpmulhw */, X86::VPMULHWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32717 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32718 : { 14140 /* vpmulhw */, X86::VPMULHWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32719 : { 14140 /* vpmulhw */, X86::VPMULHWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32720 : { 14140 /* vpmulhw */, X86::VPMULHWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32721 : { 14148 /* vpmulld */, X86::VPMULLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32722 : { 14148 /* vpmulld */, X86::VPMULLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32723 : { 14148 /* vpmulld */, X86::VPMULLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32724 : { 14148 /* vpmulld */, X86::VPMULLDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32725 : { 14148 /* vpmulld */, X86::VPMULLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32726 : { 14148 /* vpmulld */, X86::VPMULLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32727 : { 14148 /* vpmulld */, X86::VPMULLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32728 : { 14148 /* vpmulld */, X86::VPMULLDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32729 : { 14148 /* vpmulld */, X86::VPMULLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32730 : { 14148 /* vpmulld */, X86::VPMULLDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32731 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32732 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32733 : { 14148 /* vpmulld */, X86::VPMULLDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32734 : { 14148 /* vpmulld */, X86::VPMULLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32735 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32736 : { 14148 /* vpmulld */, X86::VPMULLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32737 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32738 : { 14148 /* vpmulld */, X86::VPMULLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32739 : { 14148 /* vpmulld */, X86::VPMULLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32740 : { 14148 /* vpmulld */, X86::VPMULLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32741 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32742 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32743 : { 14148 /* vpmulld */, X86::VPMULLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32744 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32745 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32746 : { 14148 /* vpmulld */, X86::VPMULLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32747 : { 14148 /* vpmulld */, X86::VPMULLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32748 : { 14148 /* vpmulld */, X86::VPMULLDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32749 : { 14148 /* vpmulld */, X86::VPMULLDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32750 : { 14148 /* vpmulld */, X86::VPMULLDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32751 : { 14148 /* vpmulld */, X86::VPMULLDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32752 : { 14156 /* vpmullq */, X86::VPMULLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32753 : { 14156 /* vpmullq */, X86::VPMULLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32754 : { 14156 /* vpmullq */, X86::VPMULLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32755 : { 14156 /* vpmullq */, X86::VPMULLQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32756 : { 14156 /* vpmullq */, X86::VPMULLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32757 : { 14156 /* vpmullq */, X86::VPMULLQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32758 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32759 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32760 : { 14156 /* vpmullq */, X86::VPMULLQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32761 : { 14156 /* vpmullq */, X86::VPMULLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32762 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32763 : { 14156 /* vpmullq */, X86::VPMULLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32764 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32765 : { 14156 /* vpmullq */, X86::VPMULLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32766 : { 14156 /* vpmullq */, X86::VPMULLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32767 : { 14156 /* vpmullq */, X86::VPMULLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32768 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32769 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32770 : { 14156 /* vpmullq */, X86::VPMULLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32771 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32772 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32773 : { 14156 /* vpmullq */, X86::VPMULLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32774 : { 14156 /* vpmullq */, X86::VPMULLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32775 : { 14156 /* vpmullq */, X86::VPMULLQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32776 : { 14156 /* vpmullq */, X86::VPMULLQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32777 : { 14156 /* vpmullq */, X86::VPMULLQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32778 : { 14156 /* vpmullq */, X86::VPMULLQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32779 : { 14164 /* vpmullw */, X86::VPMULLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32780 : { 14164 /* vpmullw */, X86::VPMULLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32781 : { 14164 /* vpmullw */, X86::VPMULLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32782 : { 14164 /* vpmullw */, X86::VPMULLWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32783 : { 14164 /* vpmullw */, X86::VPMULLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32784 : { 14164 /* vpmullw */, X86::VPMULLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32785 : { 14164 /* vpmullw */, X86::VPMULLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32786 : { 14164 /* vpmullw */, X86::VPMULLWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32787 : { 14164 /* vpmullw */, X86::VPMULLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32788 : { 14164 /* vpmullw */, X86::VPMULLWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32789 : { 14164 /* vpmullw */, X86::VPMULLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32790 : { 14164 /* vpmullw */, X86::VPMULLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32791 : { 14164 /* vpmullw */, X86::VPMULLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32792 : { 14164 /* vpmullw */, X86::VPMULLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32793 : { 14164 /* vpmullw */, X86::VPMULLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32794 : { 14164 /* vpmullw */, X86::VPMULLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32795 : { 14164 /* vpmullw */, X86::VPMULLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32796 : { 14164 /* vpmullw */, X86::VPMULLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32797 : { 14164 /* vpmullw */, X86::VPMULLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32798 : { 14164 /* vpmullw */, X86::VPMULLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32799 : { 14164 /* vpmullw */, X86::VPMULLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32800 : { 14164 /* vpmullw */, X86::VPMULLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32801 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32802 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32803 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32804 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32805 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32806 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32807 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32808 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32809 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32810 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32811 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32812 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32813 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32814 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32815 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32816 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32817 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32818 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32819 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32820 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32821 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32822 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32823 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32824 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32825 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32826 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32827 : { 14172 /* vpmultishiftqb */, X86::VPMULTISHIFTQBZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32828 : { 14187 /* vpmuludq */, X86::VPMULUDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32829 : { 14187 /* vpmuludq */, X86::VPMULUDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32830 : { 14187 /* vpmuludq */, X86::VPMULUDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32831 : { 14187 /* vpmuludq */, X86::VPMULUDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32832 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32833 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32834 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32835 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32836 : { 14187 /* vpmuludq */, X86::VPMULUDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32837 : { 14187 /* vpmuludq */, X86::VPMULUDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32838 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32839 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32840 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32841 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32842 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32843 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32844 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32845 : { 14187 /* vpmuludq */, X86::VPMULUDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32846 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32847 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32848 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32849 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32850 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32851 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32852 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32853 : { 14187 /* vpmuludq */, X86::VPMULUDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32854 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32855 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32856 : { 14187 /* vpmuludq */, X86::VPMULUDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32857 : { 14187 /* vpmuludq */, X86::VPMULUDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32858 : { 14187 /* vpmuludq */, X86::VPMULUDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32859 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32860 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32861 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32862 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32863 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32864 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32865 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32866 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32867 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32868 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32869 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32870 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32871 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32872 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32873 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32874 : { 14196 /* vpopcntb */, X86::VPOPCNTBZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32875 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32876 : { 14196 /* vpopcntb */, X86::VPOPCNTBZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32877 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32878 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32879 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32880 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32881 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32882 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32883 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32884 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32885 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32886 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32887 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32888 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32889 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32890 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32891 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32892 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32893 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32894 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32895 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32896 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32897 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32898 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32899 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32900 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32901 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
32902 : { 14205 /* vpopcntd */, X86::VPOPCNTDZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
32903 : { 14205 /* vpopcntd */, X86::VPOPCNTDZrmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
32904 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32905 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32906 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32907 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32908 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32909 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32910 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32911 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32912 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32913 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32914 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32915 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32916 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32917 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32918 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32919 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32920 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32921 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32922 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32923 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32924 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32925 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32926 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32927 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32928 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ128rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
32929 : { 14214 /* vpopcntq */, X86::VPOPCNTQZ256rmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
32930 : { 14214 /* vpopcntq */, X86::VPOPCNTQZrmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
32931 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
32932 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
32933 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
32934 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
32935 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
32936 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
32937 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
32938 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
32939 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
32940 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
32941 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
32942 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
32943 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
32944 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ128rmkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
32945 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
32946 : { 14223 /* vpopcntw */, X86::VPOPCNTWZ256rmkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
32947 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
32948 : { 14223 /* vpopcntw */, X86::VPOPCNTWZrmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
32949 : { 14232 /* vpor */, X86::VPORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
32950 : { 14232 /* vpor */, X86::VPORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
32951 : { 14232 /* vpor */, X86::VPORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
32952 : { 14232 /* vpor */, X86::VPORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
32953 : { 14237 /* vpord */, X86::VPORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32954 : { 14237 /* vpord */, X86::VPORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32955 : { 14237 /* vpord */, X86::VPORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32956 : { 14237 /* vpord */, X86::VPORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32957 : { 14237 /* vpord */, X86::VPORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32958 : { 14237 /* vpord */, X86::VPORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32959 : { 14237 /* vpord */, X86::VPORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32960 : { 14237 /* vpord */, X86::VPORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32961 : { 14237 /* vpord */, X86::VPORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32962 : { 14237 /* vpord */, X86::VPORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32963 : { 14237 /* vpord */, X86::VPORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32964 : { 14237 /* vpord */, X86::VPORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32965 : { 14237 /* vpord */, X86::VPORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32966 : { 14237 /* vpord */, X86::VPORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32967 : { 14237 /* vpord */, X86::VPORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32968 : { 14237 /* vpord */, X86::VPORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32969 : { 14237 /* vpord */, X86::VPORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32970 : { 14237 /* vpord */, X86::VPORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32971 : { 14237 /* vpord */, X86::VPORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32972 : { 14237 /* vpord */, X86::VPORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
32973 : { 14237 /* vpord */, X86::VPORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32974 : { 14237 /* vpord */, X86::VPORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
32975 : { 14237 /* vpord */, X86::VPORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
32976 : { 14237 /* vpord */, X86::VPORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32977 : { 14237 /* vpord */, X86::VPORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
32978 : { 14237 /* vpord */, X86::VPORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
32979 : { 14237 /* vpord */, X86::VPORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
32980 : { 14243 /* vporq */, X86::VPORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
32981 : { 14243 /* vporq */, X86::VPORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
32982 : { 14243 /* vporq */, X86::VPORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
32983 : { 14243 /* vporq */, X86::VPORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
32984 : { 14243 /* vporq */, X86::VPORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
32985 : { 14243 /* vporq */, X86::VPORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
32986 : { 14243 /* vporq */, X86::VPORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32987 : { 14243 /* vporq */, X86::VPORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
32988 : { 14243 /* vporq */, X86::VPORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
32989 : { 14243 /* vporq */, X86::VPORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
32990 : { 14243 /* vporq */, X86::VPORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
32991 : { 14243 /* vporq */, X86::VPORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
32992 : { 14243 /* vporq */, X86::VPORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
32993 : { 14243 /* vporq */, X86::VPORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
32994 : { 14243 /* vporq */, X86::VPORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
32995 : { 14243 /* vporq */, X86::VPORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
32996 : { 14243 /* vporq */, X86::VPORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
32997 : { 14243 /* vporq */, X86::VPORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
32998 : { 14243 /* vporq */, X86::VPORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
32999 : { 14243 /* vporq */, X86::VPORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33000 : { 14243 /* vporq */, X86::VPORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33001 : { 14243 /* vporq */, X86::VPORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33002 : { 14243 /* vporq */, X86::VPORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33003 : { 14243 /* vporq */, X86::VPORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33004 : { 14243 /* vporq */, X86::VPORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33005 : { 14243 /* vporq */, X86::VPORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33006 : { 14243 /* vporq */, X86::VPORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33007 : { 14249 /* vpperm */, X86::VPPERMrrr, Convert__Reg1_0__Reg1_1__Reg1_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_FR32 }, },
33008 : { 14249 /* vpperm */, X86::VPPERMrrm, Convert__Reg1_0__Reg1_1__Reg1_2__Mem1285_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33009 : { 14249 /* vpperm */, X86::VPPERMrmr, Convert__Reg1_0__Reg1_1__Mem1285_2__Reg1_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33010 : { 14256 /* vprold */, X86::VPROLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33011 : { 14256 /* vprold */, X86::VPROLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33012 : { 14256 /* vprold */, X86::VPROLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33013 : { 14256 /* vprold */, X86::VPROLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33014 : { 14256 /* vprold */, X86::VPROLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33015 : { 14256 /* vprold */, X86::VPROLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33016 : { 14256 /* vprold */, X86::VPROLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33017 : { 14256 /* vprold */, X86::VPROLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33018 : { 14256 /* vprold */, X86::VPROLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33019 : { 14256 /* vprold */, X86::VPROLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33020 : { 14256 /* vprold */, X86::VPROLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33021 : { 14256 /* vprold */, X86::VPROLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33022 : { 14256 /* vprold */, X86::VPROLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33023 : { 14256 /* vprold */, X86::VPROLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33024 : { 14256 /* vprold */, X86::VPROLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33025 : { 14256 /* vprold */, X86::VPROLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33026 : { 14256 /* vprold */, X86::VPROLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33027 : { 14256 /* vprold */, X86::VPROLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33028 : { 14256 /* vprold */, X86::VPROLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33029 : { 14256 /* vprold */, X86::VPROLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33030 : { 14256 /* vprold */, X86::VPROLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33031 : { 14256 /* vprold */, X86::VPROLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33032 : { 14256 /* vprold */, X86::VPROLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33033 : { 14256 /* vprold */, X86::VPROLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33034 : { 14256 /* vprold */, X86::VPROLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33035 : { 14256 /* vprold */, X86::VPROLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33036 : { 14256 /* vprold */, X86::VPROLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33037 : { 14263 /* vprolq */, X86::VPROLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33038 : { 14263 /* vprolq */, X86::VPROLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33039 : { 14263 /* vprolq */, X86::VPROLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33040 : { 14263 /* vprolq */, X86::VPROLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33041 : { 14263 /* vprolq */, X86::VPROLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33042 : { 14263 /* vprolq */, X86::VPROLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33043 : { 14263 /* vprolq */, X86::VPROLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33044 : { 14263 /* vprolq */, X86::VPROLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33045 : { 14263 /* vprolq */, X86::VPROLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33046 : { 14263 /* vprolq */, X86::VPROLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33047 : { 14263 /* vprolq */, X86::VPROLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33048 : { 14263 /* vprolq */, X86::VPROLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33049 : { 14263 /* vprolq */, X86::VPROLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33050 : { 14263 /* vprolq */, X86::VPROLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33051 : { 14263 /* vprolq */, X86::VPROLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33052 : { 14263 /* vprolq */, X86::VPROLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33053 : { 14263 /* vprolq */, X86::VPROLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33054 : { 14263 /* vprolq */, X86::VPROLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33055 : { 14263 /* vprolq */, X86::VPROLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33056 : { 14263 /* vprolq */, X86::VPROLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33057 : { 14263 /* vprolq */, X86::VPROLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33058 : { 14263 /* vprolq */, X86::VPROLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33059 : { 14263 /* vprolq */, X86::VPROLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33060 : { 14263 /* vprolq */, X86::VPROLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33061 : { 14263 /* vprolq */, X86::VPROLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33062 : { 14263 /* vprolq */, X86::VPROLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33063 : { 14263 /* vprolq */, X86::VPROLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33064 : { 14270 /* vprolvd */, X86::VPROLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33065 : { 14270 /* vprolvd */, X86::VPROLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33066 : { 14270 /* vprolvd */, X86::VPROLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33067 : { 14270 /* vprolvd */, X86::VPROLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33068 : { 14270 /* vprolvd */, X86::VPROLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33069 : { 14270 /* vprolvd */, X86::VPROLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33070 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33071 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33072 : { 14270 /* vprolvd */, X86::VPROLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33073 : { 14270 /* vprolvd */, X86::VPROLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33074 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33075 : { 14270 /* vprolvd */, X86::VPROLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33076 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33077 : { 14270 /* vprolvd */, X86::VPROLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33078 : { 14270 /* vprolvd */, X86::VPROLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33079 : { 14270 /* vprolvd */, X86::VPROLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33080 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33081 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33082 : { 14270 /* vprolvd */, X86::VPROLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33083 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33084 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33085 : { 14270 /* vprolvd */, X86::VPROLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33086 : { 14270 /* vprolvd */, X86::VPROLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33087 : { 14270 /* vprolvd */, X86::VPROLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33088 : { 14270 /* vprolvd */, X86::VPROLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33089 : { 14270 /* vprolvd */, X86::VPROLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33090 : { 14270 /* vprolvd */, X86::VPROLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33091 : { 14278 /* vprolvq */, X86::VPROLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33092 : { 14278 /* vprolvq */, X86::VPROLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33093 : { 14278 /* vprolvq */, X86::VPROLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33094 : { 14278 /* vprolvq */, X86::VPROLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33095 : { 14278 /* vprolvq */, X86::VPROLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33096 : { 14278 /* vprolvq */, X86::VPROLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33097 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33098 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33099 : { 14278 /* vprolvq */, X86::VPROLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33100 : { 14278 /* vprolvq */, X86::VPROLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33101 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33102 : { 14278 /* vprolvq */, X86::VPROLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33103 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33104 : { 14278 /* vprolvq */, X86::VPROLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33105 : { 14278 /* vprolvq */, X86::VPROLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33106 : { 14278 /* vprolvq */, X86::VPROLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33107 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33108 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33109 : { 14278 /* vprolvq */, X86::VPROLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33110 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33111 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33112 : { 14278 /* vprolvq */, X86::VPROLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33113 : { 14278 /* vprolvq */, X86::VPROLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33114 : { 14278 /* vprolvq */, X86::VPROLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33115 : { 14278 /* vprolvq */, X86::VPROLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33116 : { 14278 /* vprolvq */, X86::VPROLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33117 : { 14278 /* vprolvq */, X86::VPROLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33118 : { 14286 /* vprord */, X86::VPRORDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33119 : { 14286 /* vprord */, X86::VPRORDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33120 : { 14286 /* vprord */, X86::VPRORDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33121 : { 14286 /* vprord */, X86::VPRORDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33122 : { 14286 /* vprord */, X86::VPRORDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33123 : { 14286 /* vprord */, X86::VPRORDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33124 : { 14286 /* vprord */, X86::VPRORDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33125 : { 14286 /* vprord */, X86::VPRORDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33126 : { 14286 /* vprord */, X86::VPRORDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33127 : { 14286 /* vprord */, X86::VPRORDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33128 : { 14286 /* vprord */, X86::VPRORDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33129 : { 14286 /* vprord */, X86::VPRORDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33130 : { 14286 /* vprord */, X86::VPRORDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33131 : { 14286 /* vprord */, X86::VPRORDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33132 : { 14286 /* vprord */, X86::VPRORDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33133 : { 14286 /* vprord */, X86::VPRORDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33134 : { 14286 /* vprord */, X86::VPRORDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33135 : { 14286 /* vprord */, X86::VPRORDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33136 : { 14286 /* vprord */, X86::VPRORDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33137 : { 14286 /* vprord */, X86::VPRORDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33138 : { 14286 /* vprord */, X86::VPRORDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33139 : { 14286 /* vprord */, X86::VPRORDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33140 : { 14286 /* vprord */, X86::VPRORDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33141 : { 14286 /* vprord */, X86::VPRORDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33142 : { 14286 /* vprord */, X86::VPRORDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33143 : { 14286 /* vprord */, X86::VPRORDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33144 : { 14286 /* vprord */, X86::VPRORDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33145 : { 14293 /* vprorq */, X86::VPRORQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33146 : { 14293 /* vprorq */, X86::VPRORQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33147 : { 14293 /* vprorq */, X86::VPRORQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33148 : { 14293 /* vprorq */, X86::VPRORQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33149 : { 14293 /* vprorq */, X86::VPRORQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33150 : { 14293 /* vprorq */, X86::VPRORQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33151 : { 14293 /* vprorq */, X86::VPRORQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33152 : { 14293 /* vprorq */, X86::VPRORQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33153 : { 14293 /* vprorq */, X86::VPRORQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33154 : { 14293 /* vprorq */, X86::VPRORQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33155 : { 14293 /* vprorq */, X86::VPRORQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33156 : { 14293 /* vprorq */, X86::VPRORQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33157 : { 14293 /* vprorq */, X86::VPRORQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33158 : { 14293 /* vprorq */, X86::VPRORQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33159 : { 14293 /* vprorq */, X86::VPRORQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33160 : { 14293 /* vprorq */, X86::VPRORQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33161 : { 14293 /* vprorq */, X86::VPRORQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33162 : { 14293 /* vprorq */, X86::VPRORQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33163 : { 14293 /* vprorq */, X86::VPRORQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33164 : { 14293 /* vprorq */, X86::VPRORQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33165 : { 14293 /* vprorq */, X86::VPRORQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33166 : { 14293 /* vprorq */, X86::VPRORQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33167 : { 14293 /* vprorq */, X86::VPRORQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33168 : { 14293 /* vprorq */, X86::VPRORQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33169 : { 14293 /* vprorq */, X86::VPRORQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33170 : { 14293 /* vprorq */, X86::VPRORQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33171 : { 14293 /* vprorq */, X86::VPRORQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33172 : { 14300 /* vprorvd */, X86::VPRORVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33173 : { 14300 /* vprorvd */, X86::VPRORVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33174 : { 14300 /* vprorvd */, X86::VPRORVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33175 : { 14300 /* vprorvd */, X86::VPRORVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33176 : { 14300 /* vprorvd */, X86::VPRORVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33177 : { 14300 /* vprorvd */, X86::VPRORVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33178 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33179 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33180 : { 14300 /* vprorvd */, X86::VPRORVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33181 : { 14300 /* vprorvd */, X86::VPRORVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33182 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33183 : { 14300 /* vprorvd */, X86::VPRORVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33184 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33185 : { 14300 /* vprorvd */, X86::VPRORVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33186 : { 14300 /* vprorvd */, X86::VPRORVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33187 : { 14300 /* vprorvd */, X86::VPRORVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33188 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33189 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33190 : { 14300 /* vprorvd */, X86::VPRORVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33191 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33192 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33193 : { 14300 /* vprorvd */, X86::VPRORVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33194 : { 14300 /* vprorvd */, X86::VPRORVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33195 : { 14300 /* vprorvd */, X86::VPRORVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33196 : { 14300 /* vprorvd */, X86::VPRORVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33197 : { 14300 /* vprorvd */, X86::VPRORVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33198 : { 14300 /* vprorvd */, X86::VPRORVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33199 : { 14308 /* vprorvq */, X86::VPRORVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33200 : { 14308 /* vprorvq */, X86::VPRORVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33201 : { 14308 /* vprorvq */, X86::VPRORVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33202 : { 14308 /* vprorvq */, X86::VPRORVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33203 : { 14308 /* vprorvq */, X86::VPRORVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33204 : { 14308 /* vprorvq */, X86::VPRORVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33205 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33206 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33207 : { 14308 /* vprorvq */, X86::VPRORVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33208 : { 14308 /* vprorvq */, X86::VPRORVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33209 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33210 : { 14308 /* vprorvq */, X86::VPRORVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33211 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33212 : { 14308 /* vprorvq */, X86::VPRORVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33213 : { 14308 /* vprorvq */, X86::VPRORVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33214 : { 14308 /* vprorvq */, X86::VPRORVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33215 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33216 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33217 : { 14308 /* vprorvq */, X86::VPRORVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33218 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33219 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33220 : { 14308 /* vprorvq */, X86::VPRORVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33221 : { 14308 /* vprorvq */, X86::VPRORVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33222 : { 14308 /* vprorvq */, X86::VPRORVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33223 : { 14308 /* vprorvq */, X86::VPRORVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33224 : { 14308 /* vprorvq */, X86::VPRORVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33225 : { 14308 /* vprorvq */, X86::VPRORVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33226 : { 14316 /* vprotb */, X86::VPROTBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33227 : { 14316 /* vprotb */, X86::VPROTBri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33228 : { 14316 /* vprotb */, X86::VPROTBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33229 : { 14316 /* vprotb */, X86::VPROTBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33230 : { 14316 /* vprotb */, X86::VPROTBmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33231 : { 14323 /* vprotd */, X86::VPROTDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33232 : { 14323 /* vprotd */, X86::VPROTDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33233 : { 14323 /* vprotd */, X86::VPROTDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33234 : { 14323 /* vprotd */, X86::VPROTDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33235 : { 14323 /* vprotd */, X86::VPROTDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33236 : { 14330 /* vprotq */, X86::VPROTQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33237 : { 14330 /* vprotq */, X86::VPROTQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33238 : { 14330 /* vprotq */, X86::VPROTQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33239 : { 14330 /* vprotq */, X86::VPROTQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33240 : { 14330 /* vprotq */, X86::VPROTQmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33241 : { 14337 /* vprotw */, X86::VPROTWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33242 : { 14337 /* vprotw */, X86::VPROTWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33243 : { 14337 /* vprotw */, X86::VPROTWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33244 : { 14337 /* vprotw */, X86::VPROTWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33245 : { 14337 /* vprotw */, X86::VPROTWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33246 : { 14344 /* vpsadbw */, X86::VPSADBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33247 : { 14344 /* vpsadbw */, X86::VPSADBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33248 : { 14344 /* vpsadbw */, X86::VPSADBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33249 : { 14344 /* vpsadbw */, X86::VPSADBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33250 : { 14344 /* vpsadbw */, X86::VPSADBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33251 : { 14344 /* vpsadbw */, X86::VPSADBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33252 : { 14344 /* vpsadbw */, X86::VPSADBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33253 : { 14344 /* vpsadbw */, X86::VPSADBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33254 : { 14344 /* vpsadbw */, X86::VPSADBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33255 : { 14344 /* vpsadbw */, X86::VPSADBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33256 : { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33257 : { 14352 /* vpscatterdd */, X86::VPSCATTERDDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33258 : { 14352 /* vpscatterdd */, X86::VPSCATTERDDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33259 : { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33260 : { 14364 /* vpscatterdq */, X86::VPSCATTERDQZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33261 : { 14364 /* vpscatterdq */, X86::VPSCATTERDQZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33262 : { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33263 : { 14376 /* vpscatterqd */, X86::VPSCATTERQDZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33264 : { 14376 /* vpscatterqd */, X86::VPSCATTERQDZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33265 : { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
33266 : { 14388 /* vpscatterqq */, X86::VPSCATTERQQZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
33267 : { 14388 /* vpscatterqq */, X86::VPSCATTERQQZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
33268 : { 14400 /* vpshab */, X86::VPSHABrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33269 : { 14400 /* vpshab */, X86::VPSHABrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33270 : { 14400 /* vpshab */, X86::VPSHABmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33271 : { 14407 /* vpshad */, X86::VPSHADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33272 : { 14407 /* vpshad */, X86::VPSHADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33273 : { 14407 /* vpshad */, X86::VPSHADmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33274 : { 14414 /* vpshaq */, X86::VPSHAQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33275 : { 14414 /* vpshaq */, X86::VPSHAQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33276 : { 14414 /* vpshaq */, X86::VPSHAQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33277 : { 14421 /* vpshaw */, X86::VPSHAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33278 : { 14421 /* vpshaw */, X86::VPSHAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33279 : { 14421 /* vpshaw */, X86::VPSHAWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33280 : { 14428 /* vpshlb */, X86::VPSHLBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33281 : { 14428 /* vpshlb */, X86::VPSHLBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33282 : { 14428 /* vpshlb */, X86::VPSHLBmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33283 : { 14435 /* vpshld */, X86::VPSHLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33284 : { 14435 /* vpshld */, X86::VPSHLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33285 : { 14435 /* vpshld */, X86::VPSHLDmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33286 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33287 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33288 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33289 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33290 : { 14442 /* vpshldd */, X86::VPSHLDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33291 : { 14442 /* vpshldd */, X86::VPSHLDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33292 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33293 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33294 : { 14442 /* vpshldd */, X86::VPSHLDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33295 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33296 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33297 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33298 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33299 : { 14442 /* vpshldd */, X86::VPSHLDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33300 : { 14442 /* vpshldd */, X86::VPSHLDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33301 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33302 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33303 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33304 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33305 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33306 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33307 : { 14442 /* vpshldd */, X86::VPSHLDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33308 : { 14442 /* vpshldd */, X86::VPSHLDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33309 : { 14442 /* vpshldd */, X86::VPSHLDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33310 : { 14442 /* vpshldd */, X86::VPSHLDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33311 : { 14442 /* vpshldd */, X86::VPSHLDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33312 : { 14442 /* vpshldd */, X86::VPSHLDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33313 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33314 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33315 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33316 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33317 : { 14450 /* vpshldq */, X86::VPSHLDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33318 : { 14450 /* vpshldq */, X86::VPSHLDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33319 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33320 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33321 : { 14450 /* vpshldq */, X86::VPSHLDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33322 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33323 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33324 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33325 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33326 : { 14450 /* vpshldq */, X86::VPSHLDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33327 : { 14450 /* vpshldq */, X86::VPSHLDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33328 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33329 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33330 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33331 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33332 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33333 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33334 : { 14450 /* vpshldq */, X86::VPSHLDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33335 : { 14450 /* vpshldq */, X86::VPSHLDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33336 : { 14450 /* vpshldq */, X86::VPSHLDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33337 : { 14450 /* vpshldq */, X86::VPSHLDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33338 : { 14450 /* vpshldq */, X86::VPSHLDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33339 : { 14450 /* vpshldq */, X86::VPSHLDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33340 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33341 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33342 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33343 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33344 : { 14458 /* vpshldvd */, X86::VPSHLDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33345 : { 14458 /* vpshldvd */, X86::VPSHLDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33346 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33347 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33348 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33349 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33350 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33351 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33352 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33353 : { 14458 /* vpshldvd */, X86::VPSHLDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33354 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33355 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33356 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33357 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33358 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33359 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33360 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33361 : { 14458 /* vpshldvd */, X86::VPSHLDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33362 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33363 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33364 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33365 : { 14458 /* vpshldvd */, X86::VPSHLDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33366 : { 14458 /* vpshldvd */, X86::VPSHLDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33367 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33368 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33369 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33370 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33371 : { 14467 /* vpshldvq */, X86::VPSHLDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33372 : { 14467 /* vpshldvq */, X86::VPSHLDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33373 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33374 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33375 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33376 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33377 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33378 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33379 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33380 : { 14467 /* vpshldvq */, X86::VPSHLDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33381 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33382 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33383 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33384 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33385 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33386 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33387 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33388 : { 14467 /* vpshldvq */, X86::VPSHLDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33389 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33390 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33391 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33392 : { 14467 /* vpshldvq */, X86::VPSHLDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33393 : { 14467 /* vpshldvq */, X86::VPSHLDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33394 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33395 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33396 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33397 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33398 : { 14476 /* vpshldvw */, X86::VPSHLDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33399 : { 14476 /* vpshldvw */, X86::VPSHLDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33400 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33401 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33402 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33403 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33404 : { 14476 /* vpshldvw */, X86::VPSHLDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33405 : { 14476 /* vpshldvw */, X86::VPSHLDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33406 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33407 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33408 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33409 : { 14476 /* vpshldvw */, X86::VPSHLDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33410 : { 14476 /* vpshldvw */, X86::VPSHLDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33411 : { 14476 /* vpshldvw */, X86::VPSHLDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33412 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33413 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33414 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33415 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33416 : { 14485 /* vpshldw */, X86::VPSHLDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33417 : { 14485 /* vpshldw */, X86::VPSHLDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33418 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33419 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33420 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33421 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33422 : { 14485 /* vpshldw */, X86::VPSHLDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33423 : { 14485 /* vpshldw */, X86::VPSHLDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33424 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33425 : { 14485 /* vpshldw */, X86::VPSHLDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33426 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33427 : { 14485 /* vpshldw */, X86::VPSHLDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33428 : { 14485 /* vpshldw */, X86::VPSHLDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33429 : { 14485 /* vpshldw */, X86::VPSHLDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33430 : { 14493 /* vpshlq */, X86::VPSHLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33431 : { 14493 /* vpshlq */, X86::VPSHLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33432 : { 14493 /* vpshlq */, X86::VPSHLQmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33433 : { 14500 /* vpshlw */, X86::VPSHLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33434 : { 14500 /* vpshlw */, X86::VPSHLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33435 : { 14500 /* vpshlw */, X86::VPSHLWmr, Convert__Reg1_0__Mem1285_1__Reg1_2, 0, { MCK_FR32, MCK_Mem128, MCK_FR32 }, },
33436 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33437 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33438 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33439 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33440 : { 14507 /* vpshrdd */, X86::VPSHRDDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33441 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33442 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33443 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33444 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33445 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33446 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33447 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33448 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33449 : { 14507 /* vpshrdd */, X86::VPSHRDDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33450 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33451 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33452 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33453 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33454 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33455 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33456 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33457 : { 14507 /* vpshrdd */, X86::VPSHRDDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33458 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33459 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33460 : { 14507 /* vpshrdd */, X86::VPSHRDDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33461 : { 14507 /* vpshrdd */, X86::VPSHRDDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33462 : { 14507 /* vpshrdd */, X86::VPSHRDDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33463 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33464 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33465 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33466 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33467 : { 14515 /* vpshrdq */, X86::VPSHRDQZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33468 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33469 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33470 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33471 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33472 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33473 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33474 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33475 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33476 : { 14515 /* vpshrdq */, X86::VPSHRDQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33477 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33478 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33479 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33480 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33481 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33482 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33483 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33484 : { 14515 /* vpshrdq */, X86::VPSHRDQZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33485 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33486 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33487 : { 14515 /* vpshrdq */, X86::VPSHRDQZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33488 : { 14515 /* vpshrdq */, X86::VPSHRDQZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33489 : { 14515 /* vpshrdq */, X86::VPSHRDQZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33490 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33491 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33492 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33493 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33494 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33495 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33496 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33497 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33498 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33499 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33500 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33501 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33502 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33503 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33504 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33505 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33506 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33507 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33508 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33509 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33510 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33511 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33512 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33513 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33514 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33515 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33516 : { 14523 /* vpshrdvd */, X86::VPSHRDVDZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33517 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33518 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33519 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33520 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33521 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33522 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33523 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33524 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33525 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmb, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33526 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33527 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33528 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33529 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33530 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33531 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33532 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33533 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33534 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33535 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33536 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33537 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33538 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33539 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33540 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33541 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ128mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33542 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZ256mbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33543 : { 14532 /* vpshrdvq */, X86::VPSHRDVQZmbkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33544 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33545 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33546 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256r, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33547 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256m, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33548 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZr, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33549 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZm, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33550 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33551 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33552 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33553 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33554 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33555 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33556 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33557 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ128mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33558 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256rkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33559 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZ256mkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33560 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZrkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33561 : { 14541 /* vpshrdvw */, X86::VPSHRDVWZmkz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33562 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33563 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33564 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33565 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33566 : { 14550 /* vpshrdw */, X86::VPSHRDWZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33567 : { 14550 /* vpshrdw */, X86::VPSHRDWZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33568 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33569 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33570 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33571 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33572 : { 14550 /* vpshrdw */, X86::VPSHRDWZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33573 : { 14550 /* vpshrdw */, X86::VPSHRDWZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33574 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33575 : { 14550 /* vpshrdw */, X86::VPSHRDWZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33576 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33577 : { 14550 /* vpshrdw */, X86::VPSHRDWZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33578 : { 14550 /* vpshrdw */, X86::VPSHRDWZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33579 : { 14550 /* vpshrdw */, X86::VPSHRDWZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33580 : { 14558 /* vpshufb */, X86::VPSHUFBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33581 : { 14558 /* vpshufb */, X86::VPSHUFBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33582 : { 14558 /* vpshufb */, X86::VPSHUFBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33583 : { 14558 /* vpshufb */, X86::VPSHUFBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33584 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33585 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33586 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33587 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33588 : { 14558 /* vpshufb */, X86::VPSHUFBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33589 : { 14558 /* vpshufb */, X86::VPSHUFBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33590 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33591 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33592 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33593 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33594 : { 14558 /* vpshufb */, X86::VPSHUFBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33595 : { 14558 /* vpshufb */, X86::VPSHUFBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33596 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33597 : { 14558 /* vpshufb */, X86::VPSHUFBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33598 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33599 : { 14558 /* vpshufb */, X86::VPSHUFBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33600 : { 14558 /* vpshufb */, X86::VPSHUFBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33601 : { 14558 /* vpshufb */, X86::VPSHUFBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33602 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
33603 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
33604 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
33605 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
33606 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
33607 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
33608 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33609 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33610 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33611 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33612 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33613 : { 14566 /* vpshufbitqmb */, X86::VPSHUFBITQMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33614 : { 14579 /* vpshufd */, X86::VPSHUFDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33615 : { 14579 /* vpshufd */, X86::VPSHUFDmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33616 : { 14579 /* vpshufd */, X86::VPSHUFDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33617 : { 14579 /* vpshufd */, X86::VPSHUFDYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33618 : { 14579 /* vpshufd */, X86::VPSHUFDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33619 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33620 : { 14579 /* vpshufd */, X86::VPSHUFDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33621 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33622 : { 14579 /* vpshufd */, X86::VPSHUFDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33623 : { 14579 /* vpshufd */, X86::VPSHUFDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33624 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33625 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33626 : { 14579 /* vpshufd */, X86::VPSHUFDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33627 : { 14579 /* vpshufd */, X86::VPSHUFDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33628 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33629 : { 14579 /* vpshufd */, X86::VPSHUFDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33630 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33631 : { 14579 /* vpshufd */, X86::VPSHUFDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33632 : { 14579 /* vpshufd */, X86::VPSHUFDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33633 : { 14579 /* vpshufd */, X86::VPSHUFDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33634 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33635 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33636 : { 14579 /* vpshufd */, X86::VPSHUFDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33637 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33638 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33639 : { 14579 /* vpshufd */, X86::VPSHUFDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33640 : { 14579 /* vpshufd */, X86::VPSHUFDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33641 : { 14579 /* vpshufd */, X86::VPSHUFDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33642 : { 14579 /* vpshufd */, X86::VPSHUFDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33643 : { 14579 /* vpshufd */, X86::VPSHUFDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33644 : { 14579 /* vpshufd */, X86::VPSHUFDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33645 : { 14587 /* vpshufhw */, X86::VPSHUFHWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33646 : { 14587 /* vpshufhw */, X86::VPSHUFHWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33647 : { 14587 /* vpshufhw */, X86::VPSHUFHWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33648 : { 14587 /* vpshufhw */, X86::VPSHUFHWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33649 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33650 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33651 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33652 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33653 : { 14587 /* vpshufhw */, X86::VPSHUFHWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33654 : { 14587 /* vpshufhw */, X86::VPSHUFHWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33655 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33656 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33657 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33658 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33659 : { 14587 /* vpshufhw */, X86::VPSHUFHWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33660 : { 14587 /* vpshufhw */, X86::VPSHUFHWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33661 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33662 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33663 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33664 : { 14587 /* vpshufhw */, X86::VPSHUFHWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33665 : { 14587 /* vpshufhw */, X86::VPSHUFHWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33666 : { 14587 /* vpshufhw */, X86::VPSHUFHWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33667 : { 14596 /* vpshuflw */, X86::VPSHUFLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33668 : { 14596 /* vpshuflw */, X86::VPSHUFLWmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33669 : { 14596 /* vpshuflw */, X86::VPSHUFLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33670 : { 14596 /* vpshuflw */, X86::VPSHUFLWYmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33671 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33672 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33673 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33674 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33675 : { 14596 /* vpshuflw */, X86::VPSHUFLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33676 : { 14596 /* vpshuflw */, X86::VPSHUFLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33677 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33678 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33679 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33680 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33681 : { 14596 /* vpshuflw */, X86::VPSHUFLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33682 : { 14596 /* vpshuflw */, X86::VPSHUFLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33683 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33684 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33685 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33686 : { 14596 /* vpshuflw */, X86::VPSHUFLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33687 : { 14596 /* vpshuflw */, X86::VPSHUFLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33688 : { 14596 /* vpshuflw */, X86::VPSHUFLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33689 : { 14605 /* vpsignb */, X86::VPSIGNBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33690 : { 14605 /* vpsignb */, X86::VPSIGNBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33691 : { 14605 /* vpsignb */, X86::VPSIGNBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33692 : { 14605 /* vpsignb */, X86::VPSIGNBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33693 : { 14613 /* vpsignd */, X86::VPSIGNDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33694 : { 14613 /* vpsignd */, X86::VPSIGNDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33695 : { 14613 /* vpsignd */, X86::VPSIGNDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33696 : { 14613 /* vpsignd */, X86::VPSIGNDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33697 : { 14621 /* vpsignw */, X86::VPSIGNWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33698 : { 14621 /* vpsignw */, X86::VPSIGNWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33699 : { 14621 /* vpsignw */, X86::VPSIGNWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33700 : { 14621 /* vpsignw */, X86::VPSIGNWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33701 : { 14629 /* vpslld */, X86::VPSLLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33702 : { 14629 /* vpslld */, X86::VPSLLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33703 : { 14629 /* vpslld */, X86::VPSLLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33704 : { 14629 /* vpslld */, X86::VPSLLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33705 : { 14629 /* vpslld */, X86::VPSLLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33706 : { 14629 /* vpslld */, X86::VPSLLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33707 : { 14629 /* vpslld */, X86::VPSLLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33708 : { 14629 /* vpslld */, X86::VPSLLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33709 : { 14629 /* vpslld */, X86::VPSLLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33710 : { 14629 /* vpslld */, X86::VPSLLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33711 : { 14629 /* vpslld */, X86::VPSLLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33712 : { 14629 /* vpslld */, X86::VPSLLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33713 : { 14629 /* vpslld */, X86::VPSLLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33714 : { 14629 /* vpslld */, X86::VPSLLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33715 : { 14629 /* vpslld */, X86::VPSLLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33716 : { 14629 /* vpslld */, X86::VPSLLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33717 : { 14629 /* vpslld */, X86::VPSLLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33718 : { 14629 /* vpslld */, X86::VPSLLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33719 : { 14629 /* vpslld */, X86::VPSLLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33720 : { 14629 /* vpslld */, X86::VPSLLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33721 : { 14629 /* vpslld */, X86::VPSLLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33722 : { 14629 /* vpslld */, X86::VPSLLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33723 : { 14629 /* vpslld */, X86::VPSLLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33724 : { 14629 /* vpslld */, X86::VPSLLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33725 : { 14629 /* vpslld */, X86::VPSLLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33726 : { 14629 /* vpslld */, X86::VPSLLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33727 : { 14629 /* vpslld */, X86::VPSLLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33728 : { 14629 /* vpslld */, X86::VPSLLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33729 : { 14629 /* vpslld */, X86::VPSLLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33730 : { 14629 /* vpslld */, X86::VPSLLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33731 : { 14629 /* vpslld */, X86::VPSLLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33732 : { 14629 /* vpslld */, X86::VPSLLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33733 : { 14629 /* vpslld */, X86::VPSLLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33734 : { 14629 /* vpslld */, X86::VPSLLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33735 : { 14629 /* vpslld */, X86::VPSLLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33736 : { 14629 /* vpslld */, X86::VPSLLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33737 : { 14629 /* vpslld */, X86::VPSLLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33738 : { 14629 /* vpslld */, X86::VPSLLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33739 : { 14629 /* vpslld */, X86::VPSLLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33740 : { 14629 /* vpslld */, X86::VPSLLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33741 : { 14629 /* vpslld */, X86::VPSLLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33742 : { 14629 /* vpslld */, X86::VPSLLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33743 : { 14629 /* vpslld */, X86::VPSLLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33744 : { 14629 /* vpslld */, X86::VPSLLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33745 : { 14629 /* vpslld */, X86::VPSLLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33746 : { 14629 /* vpslld */, X86::VPSLLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33747 : { 14629 /* vpslld */, X86::VPSLLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33748 : { 14629 /* vpslld */, X86::VPSLLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33749 : { 14629 /* vpslld */, X86::VPSLLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33750 : { 14629 /* vpslld */, X86::VPSLLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33751 : { 14629 /* vpslld */, X86::VPSLLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33752 : { 14636 /* vpslldq */, X86::VPSLLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33753 : { 14636 /* vpslldq */, X86::VPSLLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33754 : { 14636 /* vpslldq */, X86::VPSLLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33755 : { 14636 /* vpslldq */, X86::VPSLLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33756 : { 14636 /* vpslldq */, X86::VPSLLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33757 : { 14636 /* vpslldq */, X86::VPSLLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33758 : { 14636 /* vpslldq */, X86::VPSLLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33759 : { 14636 /* vpslldq */, X86::VPSLLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33760 : { 14644 /* vpsllq */, X86::VPSLLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33761 : { 14644 /* vpsllq */, X86::VPSLLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33762 : { 14644 /* vpsllq */, X86::VPSLLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33763 : { 14644 /* vpsllq */, X86::VPSLLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33764 : { 14644 /* vpsllq */, X86::VPSLLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33765 : { 14644 /* vpsllq */, X86::VPSLLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33766 : { 14644 /* vpsllq */, X86::VPSLLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33767 : { 14644 /* vpsllq */, X86::VPSLLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33768 : { 14644 /* vpsllq */, X86::VPSLLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33769 : { 14644 /* vpsllq */, X86::VPSLLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33770 : { 14644 /* vpsllq */, X86::VPSLLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33771 : { 14644 /* vpsllq */, X86::VPSLLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33772 : { 14644 /* vpsllq */, X86::VPSLLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33773 : { 14644 /* vpsllq */, X86::VPSLLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33774 : { 14644 /* vpsllq */, X86::VPSLLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33775 : { 14644 /* vpsllq */, X86::VPSLLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33776 : { 14644 /* vpsllq */, X86::VPSLLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33777 : { 14644 /* vpsllq */, X86::VPSLLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33778 : { 14644 /* vpsllq */, X86::VPSLLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33779 : { 14644 /* vpsllq */, X86::VPSLLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33780 : { 14644 /* vpsllq */, X86::VPSLLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33781 : { 14644 /* vpsllq */, X86::VPSLLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33782 : { 14644 /* vpsllq */, X86::VPSLLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33783 : { 14644 /* vpsllq */, X86::VPSLLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33784 : { 14644 /* vpsllq */, X86::VPSLLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33785 : { 14644 /* vpsllq */, X86::VPSLLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33786 : { 14644 /* vpsllq */, X86::VPSLLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33787 : { 14644 /* vpsllq */, X86::VPSLLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33788 : { 14644 /* vpsllq */, X86::VPSLLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33789 : { 14644 /* vpsllq */, X86::VPSLLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33790 : { 14644 /* vpsllq */, X86::VPSLLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33791 : { 14644 /* vpsllq */, X86::VPSLLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33792 : { 14644 /* vpsllq */, X86::VPSLLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33793 : { 14644 /* vpsllq */, X86::VPSLLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33794 : { 14644 /* vpsllq */, X86::VPSLLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33795 : { 14644 /* vpsllq */, X86::VPSLLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33796 : { 14644 /* vpsllq */, X86::VPSLLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33797 : { 14644 /* vpsllq */, X86::VPSLLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33798 : { 14644 /* vpsllq */, X86::VPSLLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33799 : { 14644 /* vpsllq */, X86::VPSLLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33800 : { 14644 /* vpsllq */, X86::VPSLLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33801 : { 14644 /* vpsllq */, X86::VPSLLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33802 : { 14644 /* vpsllq */, X86::VPSLLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33803 : { 14644 /* vpsllq */, X86::VPSLLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33804 : { 14644 /* vpsllq */, X86::VPSLLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33805 : { 14644 /* vpsllq */, X86::VPSLLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33806 : { 14644 /* vpsllq */, X86::VPSLLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33807 : { 14644 /* vpsllq */, X86::VPSLLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33808 : { 14644 /* vpsllq */, X86::VPSLLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33809 : { 14644 /* vpsllq */, X86::VPSLLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33810 : { 14644 /* vpsllq */, X86::VPSLLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33811 : { 14651 /* vpsllvd */, X86::VPSLLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33812 : { 14651 /* vpsllvd */, X86::VPSLLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33813 : { 14651 /* vpsllvd */, X86::VPSLLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33814 : { 14651 /* vpsllvd */, X86::VPSLLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33815 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33816 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33817 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33818 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33819 : { 14651 /* vpsllvd */, X86::VPSLLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33820 : { 14651 /* vpsllvd */, X86::VPSLLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33821 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33822 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33823 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33824 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33825 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33826 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33827 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33828 : { 14651 /* vpsllvd */, X86::VPSLLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33829 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33830 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33831 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33832 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33833 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33834 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33835 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33836 : { 14651 /* vpsllvd */, X86::VPSLLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33837 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33838 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33839 : { 14651 /* vpsllvd */, X86::VPSLLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
33840 : { 14651 /* vpsllvd */, X86::VPSLLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
33841 : { 14651 /* vpsllvd */, X86::VPSLLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
33842 : { 14659 /* vpsllvq */, X86::VPSLLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33843 : { 14659 /* vpsllvq */, X86::VPSLLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33844 : { 14659 /* vpsllvq */, X86::VPSLLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
33845 : { 14659 /* vpsllvq */, X86::VPSLLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
33846 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33847 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33848 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33849 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33850 : { 14659 /* vpsllvq */, X86::VPSLLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33851 : { 14659 /* vpsllvq */, X86::VPSLLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33852 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33853 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33854 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33855 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33856 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33857 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33858 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33859 : { 14659 /* vpsllvq */, X86::VPSLLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33860 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33861 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33862 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33863 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33864 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33865 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33866 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33867 : { 14659 /* vpsllvq */, X86::VPSLLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33868 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33869 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33870 : { 14659 /* vpsllvq */, X86::VPSLLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
33871 : { 14659 /* vpsllvq */, X86::VPSLLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
33872 : { 14659 /* vpsllvq */, X86::VPSLLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
33873 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33874 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33875 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
33876 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
33877 : { 14667 /* vpsllvw */, X86::VPSLLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
33878 : { 14667 /* vpsllvw */, X86::VPSLLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
33879 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33880 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33881 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
33882 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
33883 : { 14667 /* vpsllvw */, X86::VPSLLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
33884 : { 14667 /* vpsllvw */, X86::VPSLLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
33885 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33886 : { 14667 /* vpsllvw */, X86::VPSLLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33887 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
33888 : { 14667 /* vpsllvw */, X86::VPSLLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
33889 : { 14667 /* vpsllvw */, X86::VPSLLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
33890 : { 14667 /* vpsllvw */, X86::VPSLLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
33891 : { 14675 /* vpsllw */, X86::VPSLLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33892 : { 14675 /* vpsllw */, X86::VPSLLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33893 : { 14675 /* vpsllw */, X86::VPSLLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33894 : { 14675 /* vpsllw */, X86::VPSLLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33895 : { 14675 /* vpsllw */, X86::VPSLLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33896 : { 14675 /* vpsllw */, X86::VPSLLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33897 : { 14675 /* vpsllw */, X86::VPSLLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33898 : { 14675 /* vpsllw */, X86::VPSLLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33899 : { 14675 /* vpsllw */, X86::VPSLLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33900 : { 14675 /* vpsllw */, X86::VPSLLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33901 : { 14675 /* vpsllw */, X86::VPSLLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33902 : { 14675 /* vpsllw */, X86::VPSLLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33903 : { 14675 /* vpsllw */, X86::VPSLLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33904 : { 14675 /* vpsllw */, X86::VPSLLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33905 : { 14675 /* vpsllw */, X86::VPSLLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33906 : { 14675 /* vpsllw */, X86::VPSLLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33907 : { 14675 /* vpsllw */, X86::VPSLLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33908 : { 14675 /* vpsllw */, X86::VPSLLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33909 : { 14675 /* vpsllw */, X86::VPSLLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33910 : { 14675 /* vpsllw */, X86::VPSLLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33911 : { 14675 /* vpsllw */, X86::VPSLLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33912 : { 14675 /* vpsllw */, X86::VPSLLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33913 : { 14675 /* vpsllw */, X86::VPSLLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33914 : { 14675 /* vpsllw */, X86::VPSLLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33915 : { 14675 /* vpsllw */, X86::VPSLLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33916 : { 14675 /* vpsllw */, X86::VPSLLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33917 : { 14675 /* vpsllw */, X86::VPSLLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33918 : { 14675 /* vpsllw */, X86::VPSLLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33919 : { 14675 /* vpsllw */, X86::VPSLLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33920 : { 14675 /* vpsllw */, X86::VPSLLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33921 : { 14675 /* vpsllw */, X86::VPSLLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33922 : { 14675 /* vpsllw */, X86::VPSLLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33923 : { 14675 /* vpsllw */, X86::VPSLLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33924 : { 14675 /* vpsllw */, X86::VPSLLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33925 : { 14675 /* vpsllw */, X86::VPSLLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33926 : { 14675 /* vpsllw */, X86::VPSLLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33927 : { 14675 /* vpsllw */, X86::VPSLLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33928 : { 14675 /* vpsllw */, X86::VPSLLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33929 : { 14675 /* vpsllw */, X86::VPSLLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33930 : { 14675 /* vpsllw */, X86::VPSLLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33931 : { 14675 /* vpsllw */, X86::VPSLLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33932 : { 14675 /* vpsllw */, X86::VPSLLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33933 : { 14682 /* vpsrad */, X86::VPSRADrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
33934 : { 14682 /* vpsrad */, X86::VPSRADri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
33935 : { 14682 /* vpsrad */, X86::VPSRADrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
33936 : { 14682 /* vpsrad */, X86::VPSRADYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
33937 : { 14682 /* vpsrad */, X86::VPSRADYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
33938 : { 14682 /* vpsrad */, X86::VPSRADYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
33939 : { 14682 /* vpsrad */, X86::VPSRADZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33940 : { 14682 /* vpsrad */, X86::VPSRADZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33941 : { 14682 /* vpsrad */, X86::VPSRADZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33942 : { 14682 /* vpsrad */, X86::VPSRADZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33943 : { 14682 /* vpsrad */, X86::VPSRADZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33944 : { 14682 /* vpsrad */, X86::VPSRADZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33945 : { 14682 /* vpsrad */, X86::VPSRADZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33946 : { 14682 /* vpsrad */, X86::VPSRADZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33947 : { 14682 /* vpsrad */, X86::VPSRADZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33948 : { 14682 /* vpsrad */, X86::VPSRADZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33949 : { 14682 /* vpsrad */, X86::VPSRADZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33950 : { 14682 /* vpsrad */, X86::VPSRADZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33951 : { 14682 /* vpsrad */, X86::VPSRADZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33952 : { 14682 /* vpsrad */, X86::VPSRADZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33953 : { 14682 /* vpsrad */, X86::VPSRADZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33954 : { 14682 /* vpsrad */, X86::VPSRADZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
33955 : { 14682 /* vpsrad */, X86::VPSRADZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33956 : { 14682 /* vpsrad */, X86::VPSRADZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
33957 : { 14682 /* vpsrad */, X86::VPSRADZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33958 : { 14682 /* vpsrad */, X86::VPSRADZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
33959 : { 14682 /* vpsrad */, X86::VPSRADZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33960 : { 14682 /* vpsrad */, X86::VPSRADZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
33961 : { 14682 /* vpsrad */, X86::VPSRADZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33962 : { 14682 /* vpsrad */, X86::VPSRADZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
33963 : { 14682 /* vpsrad */, X86::VPSRADZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33964 : { 14682 /* vpsrad */, X86::VPSRADZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
33965 : { 14682 /* vpsrad */, X86::VPSRADZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33966 : { 14682 /* vpsrad */, X86::VPSRADZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
33967 : { 14682 /* vpsrad */, X86::VPSRADZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33968 : { 14682 /* vpsrad */, X86::VPSRADZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
33969 : { 14682 /* vpsrad */, X86::VPSRADZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33970 : { 14682 /* vpsrad */, X86::VPSRADZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33971 : { 14682 /* vpsrad */, X86::VPSRADZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
33972 : { 14682 /* vpsrad */, X86::VPSRADZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33973 : { 14682 /* vpsrad */, X86::VPSRADZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
33974 : { 14682 /* vpsrad */, X86::VPSRADZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33975 : { 14682 /* vpsrad */, X86::VPSRADZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33976 : { 14682 /* vpsrad */, X86::VPSRADZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
33977 : { 14682 /* vpsrad */, X86::VPSRADZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
33978 : { 14682 /* vpsrad */, X86::VPSRADZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
33979 : { 14682 /* vpsrad */, X86::VPSRADZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33980 : { 14682 /* vpsrad */, X86::VPSRADZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33981 : { 14682 /* vpsrad */, X86::VPSRADZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33982 : { 14682 /* vpsrad */, X86::VPSRADZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33983 : { 14682 /* vpsrad */, X86::VPSRADZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
33984 : { 14689 /* vpsraq */, X86::VPSRAQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
33985 : { 14689 /* vpsraq */, X86::VPSRAQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
33986 : { 14689 /* vpsraq */, X86::VPSRAQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
33987 : { 14689 /* vpsraq */, X86::VPSRAQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
33988 : { 14689 /* vpsraq */, X86::VPSRAQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
33989 : { 14689 /* vpsraq */, X86::VPSRAQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
33990 : { 14689 /* vpsraq */, X86::VPSRAQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
33991 : { 14689 /* vpsraq */, X86::VPSRAQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
33992 : { 14689 /* vpsraq */, X86::VPSRAQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
33993 : { 14689 /* vpsraq */, X86::VPSRAQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
33994 : { 14689 /* vpsraq */, X86::VPSRAQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
33995 : { 14689 /* vpsraq */, X86::VPSRAQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
33996 : { 14689 /* vpsraq */, X86::VPSRAQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
33997 : { 14689 /* vpsraq */, X86::VPSRAQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
33998 : { 14689 /* vpsraq */, X86::VPSRAQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
33999 : { 14689 /* vpsraq */, X86::VPSRAQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34000 : { 14689 /* vpsraq */, X86::VPSRAQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34001 : { 14689 /* vpsraq */, X86::VPSRAQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34002 : { 14689 /* vpsraq */, X86::VPSRAQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34003 : { 14689 /* vpsraq */, X86::VPSRAQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34004 : { 14689 /* vpsraq */, X86::VPSRAQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34005 : { 14689 /* vpsraq */, X86::VPSRAQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34006 : { 14689 /* vpsraq */, X86::VPSRAQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34007 : { 14689 /* vpsraq */, X86::VPSRAQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34008 : { 14689 /* vpsraq */, X86::VPSRAQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34009 : { 14689 /* vpsraq */, X86::VPSRAQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34010 : { 14689 /* vpsraq */, X86::VPSRAQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34011 : { 14689 /* vpsraq */, X86::VPSRAQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34012 : { 14689 /* vpsraq */, X86::VPSRAQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34013 : { 14689 /* vpsraq */, X86::VPSRAQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34014 : { 14689 /* vpsraq */, X86::VPSRAQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34015 : { 14689 /* vpsraq */, X86::VPSRAQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34016 : { 14689 /* vpsraq */, X86::VPSRAQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34017 : { 14689 /* vpsraq */, X86::VPSRAQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34018 : { 14689 /* vpsraq */, X86::VPSRAQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34019 : { 14689 /* vpsraq */, X86::VPSRAQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34020 : { 14689 /* vpsraq */, X86::VPSRAQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34021 : { 14689 /* vpsraq */, X86::VPSRAQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34022 : { 14689 /* vpsraq */, X86::VPSRAQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34023 : { 14689 /* vpsraq */, X86::VPSRAQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34024 : { 14689 /* vpsraq */, X86::VPSRAQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34025 : { 14689 /* vpsraq */, X86::VPSRAQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34026 : { 14689 /* vpsraq */, X86::VPSRAQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34027 : { 14689 /* vpsraq */, X86::VPSRAQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34028 : { 14689 /* vpsraq */, X86::VPSRAQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34029 : { 14696 /* vpsravd */, X86::VPSRAVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34030 : { 14696 /* vpsravd */, X86::VPSRAVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34031 : { 14696 /* vpsravd */, X86::VPSRAVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34032 : { 14696 /* vpsravd */, X86::VPSRAVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34033 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34034 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34035 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34036 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34037 : { 14696 /* vpsravd */, X86::VPSRAVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34038 : { 14696 /* vpsravd */, X86::VPSRAVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34039 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34040 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34041 : { 14696 /* vpsravd */, X86::VPSRAVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34042 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34043 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34044 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34045 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34046 : { 14696 /* vpsravd */, X86::VPSRAVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34047 : { 14696 /* vpsravd */, X86::VPSRAVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34048 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34049 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34050 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34051 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34052 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34053 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34054 : { 14696 /* vpsravd */, X86::VPSRAVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34055 : { 14696 /* vpsravd */, X86::VPSRAVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34056 : { 14696 /* vpsravd */, X86::VPSRAVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34057 : { 14696 /* vpsravd */, X86::VPSRAVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34058 : { 14696 /* vpsravd */, X86::VPSRAVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34059 : { 14696 /* vpsravd */, X86::VPSRAVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34060 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34061 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34062 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34063 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34064 : { 14704 /* vpsravq */, X86::VPSRAVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34065 : { 14704 /* vpsravq */, X86::VPSRAVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34066 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34067 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34068 : { 14704 /* vpsravq */, X86::VPSRAVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34069 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34070 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34071 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34072 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34073 : { 14704 /* vpsravq */, X86::VPSRAVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34074 : { 14704 /* vpsravq */, X86::VPSRAVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34075 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34076 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34077 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34078 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34079 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34080 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34081 : { 14704 /* vpsravq */, X86::VPSRAVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34082 : { 14704 /* vpsravq */, X86::VPSRAVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34083 : { 14704 /* vpsravq */, X86::VPSRAVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34084 : { 14704 /* vpsravq */, X86::VPSRAVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34085 : { 14704 /* vpsravq */, X86::VPSRAVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34086 : { 14704 /* vpsravq */, X86::VPSRAVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34087 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34088 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34089 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34090 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34091 : { 14712 /* vpsravw */, X86::VPSRAVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34092 : { 14712 /* vpsravw */, X86::VPSRAVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34093 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34094 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34095 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34096 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34097 : { 14712 /* vpsravw */, X86::VPSRAVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34098 : { 14712 /* vpsravw */, X86::VPSRAVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34099 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34100 : { 14712 /* vpsravw */, X86::VPSRAVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34101 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34102 : { 14712 /* vpsravw */, X86::VPSRAVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34103 : { 14712 /* vpsravw */, X86::VPSRAVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34104 : { 14712 /* vpsravw */, X86::VPSRAVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34105 : { 14720 /* vpsraw */, X86::VPSRAWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34106 : { 14720 /* vpsraw */, X86::VPSRAWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34107 : { 14720 /* vpsraw */, X86::VPSRAWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34108 : { 14720 /* vpsraw */, X86::VPSRAWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34109 : { 14720 /* vpsraw */, X86::VPSRAWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34110 : { 14720 /* vpsraw */, X86::VPSRAWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34111 : { 14720 /* vpsraw */, X86::VPSRAWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34112 : { 14720 /* vpsraw */, X86::VPSRAWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34113 : { 14720 /* vpsraw */, X86::VPSRAWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34114 : { 14720 /* vpsraw */, X86::VPSRAWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34115 : { 14720 /* vpsraw */, X86::VPSRAWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34116 : { 14720 /* vpsraw */, X86::VPSRAWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34117 : { 14720 /* vpsraw */, X86::VPSRAWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34118 : { 14720 /* vpsraw */, X86::VPSRAWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34119 : { 14720 /* vpsraw */, X86::VPSRAWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34120 : { 14720 /* vpsraw */, X86::VPSRAWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34121 : { 14720 /* vpsraw */, X86::VPSRAWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34122 : { 14720 /* vpsraw */, X86::VPSRAWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34123 : { 14720 /* vpsraw */, X86::VPSRAWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34124 : { 14720 /* vpsraw */, X86::VPSRAWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34125 : { 14720 /* vpsraw */, X86::VPSRAWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34126 : { 14720 /* vpsraw */, X86::VPSRAWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34127 : { 14720 /* vpsraw */, X86::VPSRAWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34128 : { 14720 /* vpsraw */, X86::VPSRAWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34129 : { 14720 /* vpsraw */, X86::VPSRAWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34130 : { 14720 /* vpsraw */, X86::VPSRAWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34131 : { 14720 /* vpsraw */, X86::VPSRAWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34132 : { 14720 /* vpsraw */, X86::VPSRAWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34133 : { 14720 /* vpsraw */, X86::VPSRAWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34134 : { 14720 /* vpsraw */, X86::VPSRAWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34135 : { 14720 /* vpsraw */, X86::VPSRAWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34136 : { 14720 /* vpsraw */, X86::VPSRAWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34137 : { 14720 /* vpsraw */, X86::VPSRAWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34138 : { 14720 /* vpsraw */, X86::VPSRAWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34139 : { 14720 /* vpsraw */, X86::VPSRAWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34140 : { 14720 /* vpsraw */, X86::VPSRAWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34141 : { 14720 /* vpsraw */, X86::VPSRAWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34142 : { 14720 /* vpsraw */, X86::VPSRAWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34143 : { 14720 /* vpsraw */, X86::VPSRAWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34144 : { 14720 /* vpsraw */, X86::VPSRAWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34145 : { 14720 /* vpsraw */, X86::VPSRAWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34146 : { 14720 /* vpsraw */, X86::VPSRAWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34147 : { 14727 /* vpsrld */, X86::VPSRLDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34148 : { 14727 /* vpsrld */, X86::VPSRLDri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34149 : { 14727 /* vpsrld */, X86::VPSRLDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34150 : { 14727 /* vpsrld */, X86::VPSRLDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34151 : { 14727 /* vpsrld */, X86::VPSRLDYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34152 : { 14727 /* vpsrld */, X86::VPSRLDYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34153 : { 14727 /* vpsrld */, X86::VPSRLDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34154 : { 14727 /* vpsrld */, X86::VPSRLDZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34155 : { 14727 /* vpsrld */, X86::VPSRLDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34156 : { 14727 /* vpsrld */, X86::VPSRLDZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34157 : { 14727 /* vpsrld */, X86::VPSRLDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34158 : { 14727 /* vpsrld */, X86::VPSRLDZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34159 : { 14727 /* vpsrld */, X86::VPSRLDZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34160 : { 14727 /* vpsrld */, X86::VPSRLDZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34161 : { 14727 /* vpsrld */, X86::VPSRLDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34162 : { 14727 /* vpsrld */, X86::VPSRLDZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34163 : { 14727 /* vpsrld */, X86::VPSRLDZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34164 : { 14727 /* vpsrld */, X86::VPSRLDZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34165 : { 14727 /* vpsrld */, X86::VPSRLDZ128mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34166 : { 14727 /* vpsrld */, X86::VPSRLDZ256mbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34167 : { 14727 /* vpsrld */, X86::VPSRLDZmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34168 : { 14727 /* vpsrld */, X86::VPSRLDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34169 : { 14727 /* vpsrld */, X86::VPSRLDZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34170 : { 14727 /* vpsrld */, X86::VPSRLDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34171 : { 14727 /* vpsrld */, X86::VPSRLDZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34172 : { 14727 /* vpsrld */, X86::VPSRLDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34173 : { 14727 /* vpsrld */, X86::VPSRLDZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34174 : { 14727 /* vpsrld */, X86::VPSRLDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34175 : { 14727 /* vpsrld */, X86::VPSRLDZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34176 : { 14727 /* vpsrld */, X86::VPSRLDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34177 : { 14727 /* vpsrld */, X86::VPSRLDZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34178 : { 14727 /* vpsrld */, X86::VPSRLDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34179 : { 14727 /* vpsrld */, X86::VPSRLDZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34180 : { 14727 /* vpsrld */, X86::VPSRLDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34181 : { 14727 /* vpsrld */, X86::VPSRLDZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34182 : { 14727 /* vpsrld */, X86::VPSRLDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34183 : { 14727 /* vpsrld */, X86::VPSRLDZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34184 : { 14727 /* vpsrld */, X86::VPSRLDZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34185 : { 14727 /* vpsrld */, X86::VPSRLDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34186 : { 14727 /* vpsrld */, X86::VPSRLDZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34187 : { 14727 /* vpsrld */, X86::VPSRLDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34188 : { 14727 /* vpsrld */, X86::VPSRLDZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34189 : { 14727 /* vpsrld */, X86::VPSRLDZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34190 : { 14727 /* vpsrld */, X86::VPSRLDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34191 : { 14727 /* vpsrld */, X86::VPSRLDZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34192 : { 14727 /* vpsrld */, X86::VPSRLDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34193 : { 14727 /* vpsrld */, X86::VPSRLDZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34194 : { 14727 /* vpsrld */, X86::VPSRLDZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34195 : { 14727 /* vpsrld */, X86::VPSRLDZ128mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34196 : { 14727 /* vpsrld */, X86::VPSRLDZ256mbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34197 : { 14727 /* vpsrld */, X86::VPSRLDZmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34198 : { 14734 /* vpsrldq */, X86::VPSRLDQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34199 : { 14734 /* vpsrldq */, X86::VPSRLDQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34200 : { 14734 /* vpsrldq */, X86::VPSRLDQZ128rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34201 : { 14734 /* vpsrldq */, X86::VPSRLDQZ128rm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34202 : { 14734 /* vpsrldq */, X86::VPSRLDQZ256rr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34203 : { 14734 /* vpsrldq */, X86::VPSRLDQZ256rm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34204 : { 14734 /* vpsrldq */, X86::VPSRLDQZrr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34205 : { 14734 /* vpsrldq */, X86::VPSRLDQZrm, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34206 : { 14742 /* vpsrlq */, X86::VPSRLQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34207 : { 14742 /* vpsrlq */, X86::VPSRLQri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34208 : { 14742 /* vpsrlq */, X86::VPSRLQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34209 : { 14742 /* vpsrlq */, X86::VPSRLQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34210 : { 14742 /* vpsrlq */, X86::VPSRLQYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34211 : { 14742 /* vpsrlq */, X86::VPSRLQYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34212 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34213 : { 14742 /* vpsrlq */, X86::VPSRLQZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34214 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34215 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34216 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34217 : { 14742 /* vpsrlq */, X86::VPSRLQZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34218 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34219 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34220 : { 14742 /* vpsrlq */, X86::VPSRLQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34221 : { 14742 /* vpsrlq */, X86::VPSRLQZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34222 : { 14742 /* vpsrlq */, X86::VPSRLQZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34223 : { 14742 /* vpsrlq */, X86::VPSRLQZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34224 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34225 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34226 : { 14742 /* vpsrlq */, X86::VPSRLQZmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34227 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34228 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34229 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34230 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34231 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34232 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34233 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34234 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34235 : { 14742 /* vpsrlq */, X86::VPSRLQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34236 : { 14742 /* vpsrlq */, X86::VPSRLQZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34237 : { 14742 /* vpsrlq */, X86::VPSRLQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34238 : { 14742 /* vpsrlq */, X86::VPSRLQZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34239 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34240 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34241 : { 14742 /* vpsrlq */, X86::VPSRLQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34242 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34243 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34244 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34245 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34246 : { 14742 /* vpsrlq */, X86::VPSRLQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34247 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34248 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34249 : { 14742 /* vpsrlq */, X86::VPSRLQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34250 : { 14742 /* vpsrlq */, X86::VPSRLQZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34251 : { 14742 /* vpsrlq */, X86::VPSRLQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34252 : { 14742 /* vpsrlq */, X86::VPSRLQZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34253 : { 14742 /* vpsrlq */, X86::VPSRLQZmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34254 : { 14742 /* vpsrlq */, X86::VPSRLQZ128mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34255 : { 14742 /* vpsrlq */, X86::VPSRLQZ256mbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34256 : { 14742 /* vpsrlq */, X86::VPSRLQZmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34257 : { 14749 /* vpsrlvd */, X86::VPSRLVDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34258 : { 14749 /* vpsrlvd */, X86::VPSRLVDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34259 : { 14749 /* vpsrlvd */, X86::VPSRLVDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34260 : { 14749 /* vpsrlvd */, X86::VPSRLVDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34261 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34262 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34263 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34264 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34265 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34266 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34267 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34268 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34269 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34270 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34271 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34272 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34273 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34274 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34275 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34276 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34277 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34278 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34279 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34280 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34281 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34282 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34283 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34284 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34285 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34286 : { 14749 /* vpsrlvd */, X86::VPSRLVDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34287 : { 14749 /* vpsrlvd */, X86::VPSRLVDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34288 : { 14757 /* vpsrlvq */, X86::VPSRLVQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34289 : { 14757 /* vpsrlvq */, X86::VPSRLVQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34290 : { 14757 /* vpsrlvq */, X86::VPSRLVQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34291 : { 14757 /* vpsrlvq */, X86::VPSRLVQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34292 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34293 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34294 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34295 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34296 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34297 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34298 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34299 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34300 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34301 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34302 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34303 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34304 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34305 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34306 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34307 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34308 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34309 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34310 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34311 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34312 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34313 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34314 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34315 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34316 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34317 : { 14757 /* vpsrlvq */, X86::VPSRLVQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34318 : { 14757 /* vpsrlvq */, X86::VPSRLVQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34319 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34320 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34321 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34322 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34323 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34324 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34325 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34326 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34327 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34328 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34329 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34330 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34331 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34332 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34333 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34334 : { 14765 /* vpsrlvw */, X86::VPSRLVWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34335 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34336 : { 14765 /* vpsrlvw */, X86::VPSRLVWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34337 : { 14773 /* vpsrlw */, X86::VPSRLWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34338 : { 14773 /* vpsrlw */, X86::VPSRLWri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
34339 : { 14773 /* vpsrlw */, X86::VPSRLWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34340 : { 14773 /* vpsrlw */, X86::VPSRLWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_FR32 }, },
34341 : { 14773 /* vpsrlw */, X86::VPSRLWYri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
34342 : { 14773 /* vpsrlw */, X86::VPSRLWYrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem128 }, },
34343 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34344 : { 14773 /* vpsrlw */, X86::VPSRLWZ128ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34345 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34346 : { 14773 /* vpsrlw */, X86::VPSRLWZ128mi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34347 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_FR32X }, },
34348 : { 14773 /* vpsrlw */, X86::VPSRLWZ256ri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34349 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem128 }, },
34350 : { 14773 /* vpsrlw */, X86::VPSRLWZ256mi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34351 : { 14773 /* vpsrlw */, X86::VPSRLWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_FR32X }, },
34352 : { 14773 /* vpsrlw */, X86::VPSRLWZri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34353 : { 14773 /* vpsrlw */, X86::VPSRLWZrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem128 }, },
34354 : { 14773 /* vpsrlw */, X86::VPSRLWZmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34355 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34356 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34357 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34358 : { 14773 /* vpsrlw */, X86::VPSRLWZ128mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34359 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_FR32X }, },
34360 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34361 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem128 }, },
34362 : { 14773 /* vpsrlw */, X86::VPSRLWZ256mik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34363 : { 14773 /* vpsrlw */, X86::VPSRLWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_FR32X }, },
34364 : { 14773 /* vpsrlw */, X86::VPSRLWZrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34365 : { 14773 /* vpsrlw */, X86::VPSRLWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem128 }, },
34366 : { 14773 /* vpsrlw */, X86::VPSRLWZmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34367 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34368 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34369 : { 14773 /* vpsrlw */, X86::VPSRLWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34370 : { 14773 /* vpsrlw */, X86::VPSRLWZ128mikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34371 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_FR32X }, },
34372 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34373 : { 14773 /* vpsrlw */, X86::VPSRLWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem128 }, },
34374 : { 14773 /* vpsrlw */, X86::VPSRLWZ256mikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34375 : { 14773 /* vpsrlw */, X86::VPSRLWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_FR32X }, },
34376 : { 14773 /* vpsrlw */, X86::VPSRLWZrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
34377 : { 14773 /* vpsrlw */, X86::VPSRLWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem128 }, },
34378 : { 14773 /* vpsrlw */, X86::VPSRLWZmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34379 : { 14780 /* vpsubb */, X86::VPSUBBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34380 : { 14780 /* vpsubb */, X86::VPSUBBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34381 : { 14780 /* vpsubb */, X86::VPSUBBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34382 : { 14780 /* vpsubb */, X86::VPSUBBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34383 : { 14780 /* vpsubb */, X86::VPSUBBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34384 : { 14780 /* vpsubb */, X86::VPSUBBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34385 : { 14780 /* vpsubb */, X86::VPSUBBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34386 : { 14780 /* vpsubb */, X86::VPSUBBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34387 : { 14780 /* vpsubb */, X86::VPSUBBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34388 : { 14780 /* vpsubb */, X86::VPSUBBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34389 : { 14780 /* vpsubb */, X86::VPSUBBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34390 : { 14780 /* vpsubb */, X86::VPSUBBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34391 : { 14780 /* vpsubb */, X86::VPSUBBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34392 : { 14780 /* vpsubb */, X86::VPSUBBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34393 : { 14780 /* vpsubb */, X86::VPSUBBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34394 : { 14780 /* vpsubb */, X86::VPSUBBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34395 : { 14780 /* vpsubb */, X86::VPSUBBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34396 : { 14780 /* vpsubb */, X86::VPSUBBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34397 : { 14780 /* vpsubb */, X86::VPSUBBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34398 : { 14780 /* vpsubb */, X86::VPSUBBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34399 : { 14780 /* vpsubb */, X86::VPSUBBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34400 : { 14780 /* vpsubb */, X86::VPSUBBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34401 : { 14787 /* vpsubd */, X86::VPSUBDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34402 : { 14787 /* vpsubd */, X86::VPSUBDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34403 : { 14787 /* vpsubd */, X86::VPSUBDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34404 : { 14787 /* vpsubd */, X86::VPSUBDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34405 : { 14787 /* vpsubd */, X86::VPSUBDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34406 : { 14787 /* vpsubd */, X86::VPSUBDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34407 : { 14787 /* vpsubd */, X86::VPSUBDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34408 : { 14787 /* vpsubd */, X86::VPSUBDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34409 : { 14787 /* vpsubd */, X86::VPSUBDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34410 : { 14787 /* vpsubd */, X86::VPSUBDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34411 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34412 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34413 : { 14787 /* vpsubd */, X86::VPSUBDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34414 : { 14787 /* vpsubd */, X86::VPSUBDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34415 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34416 : { 14787 /* vpsubd */, X86::VPSUBDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34417 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34418 : { 14787 /* vpsubd */, X86::VPSUBDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34419 : { 14787 /* vpsubd */, X86::VPSUBDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34420 : { 14787 /* vpsubd */, X86::VPSUBDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34421 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34422 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34423 : { 14787 /* vpsubd */, X86::VPSUBDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34424 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34425 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34426 : { 14787 /* vpsubd */, X86::VPSUBDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34427 : { 14787 /* vpsubd */, X86::VPSUBDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34428 : { 14787 /* vpsubd */, X86::VPSUBDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34429 : { 14787 /* vpsubd */, X86::VPSUBDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34430 : { 14787 /* vpsubd */, X86::VPSUBDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34431 : { 14787 /* vpsubd */, X86::VPSUBDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34432 : { 14794 /* vpsubq */, X86::VPSUBQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34433 : { 14794 /* vpsubq */, X86::VPSUBQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34434 : { 14794 /* vpsubq */, X86::VPSUBQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34435 : { 14794 /* vpsubq */, X86::VPSUBQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34436 : { 14794 /* vpsubq */, X86::VPSUBQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34437 : { 14794 /* vpsubq */, X86::VPSUBQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34438 : { 14794 /* vpsubq */, X86::VPSUBQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34439 : { 14794 /* vpsubq */, X86::VPSUBQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34440 : { 14794 /* vpsubq */, X86::VPSUBQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34441 : { 14794 /* vpsubq */, X86::VPSUBQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34442 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34443 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34444 : { 14794 /* vpsubq */, X86::VPSUBQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34445 : { 14794 /* vpsubq */, X86::VPSUBQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34446 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34447 : { 14794 /* vpsubq */, X86::VPSUBQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34448 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34449 : { 14794 /* vpsubq */, X86::VPSUBQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34450 : { 14794 /* vpsubq */, X86::VPSUBQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34451 : { 14794 /* vpsubq */, X86::VPSUBQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34452 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34453 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34454 : { 14794 /* vpsubq */, X86::VPSUBQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34455 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34456 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34457 : { 14794 /* vpsubq */, X86::VPSUBQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34458 : { 14794 /* vpsubq */, X86::VPSUBQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34459 : { 14794 /* vpsubq */, X86::VPSUBQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34460 : { 14794 /* vpsubq */, X86::VPSUBQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34461 : { 14794 /* vpsubq */, X86::VPSUBQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34462 : { 14794 /* vpsubq */, X86::VPSUBQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34463 : { 14801 /* vpsubsb */, X86::VPSUBSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34464 : { 14801 /* vpsubsb */, X86::VPSUBSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34465 : { 14801 /* vpsubsb */, X86::VPSUBSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34466 : { 14801 /* vpsubsb */, X86::VPSUBSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34467 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34468 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34469 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34470 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34471 : { 14801 /* vpsubsb */, X86::VPSUBSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34472 : { 14801 /* vpsubsb */, X86::VPSUBSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34473 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34474 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34475 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34476 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34477 : { 14801 /* vpsubsb */, X86::VPSUBSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34478 : { 14801 /* vpsubsb */, X86::VPSUBSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34479 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34480 : { 14801 /* vpsubsb */, X86::VPSUBSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34481 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34482 : { 14801 /* vpsubsb */, X86::VPSUBSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34483 : { 14801 /* vpsubsb */, X86::VPSUBSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34484 : { 14801 /* vpsubsb */, X86::VPSUBSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34485 : { 14809 /* vpsubsw */, X86::VPSUBSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34486 : { 14809 /* vpsubsw */, X86::VPSUBSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34487 : { 14809 /* vpsubsw */, X86::VPSUBSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34488 : { 14809 /* vpsubsw */, X86::VPSUBSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34489 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34490 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34491 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34492 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34493 : { 14809 /* vpsubsw */, X86::VPSUBSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34494 : { 14809 /* vpsubsw */, X86::VPSUBSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34495 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34496 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34497 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34498 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34499 : { 14809 /* vpsubsw */, X86::VPSUBSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34500 : { 14809 /* vpsubsw */, X86::VPSUBSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34501 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34502 : { 14809 /* vpsubsw */, X86::VPSUBSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34503 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34504 : { 14809 /* vpsubsw */, X86::VPSUBSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34505 : { 14809 /* vpsubsw */, X86::VPSUBSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34506 : { 14809 /* vpsubsw */, X86::VPSUBSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34507 : { 14817 /* vpsubusb */, X86::VPSUBUSBrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34508 : { 14817 /* vpsubusb */, X86::VPSUBUSBrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34509 : { 14817 /* vpsubusb */, X86::VPSUBUSBYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34510 : { 14817 /* vpsubusb */, X86::VPSUBUSBYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34511 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34512 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34513 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34514 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34515 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34516 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34517 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34518 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34519 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34520 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34521 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34522 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34523 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34524 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34525 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34526 : { 14817 /* vpsubusb */, X86::VPSUBUSBZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34527 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34528 : { 14817 /* vpsubusb */, X86::VPSUBUSBZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34529 : { 14826 /* vpsubusw */, X86::VPSUBUSWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34530 : { 14826 /* vpsubusw */, X86::VPSUBUSWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34531 : { 14826 /* vpsubusw */, X86::VPSUBUSWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34532 : { 14826 /* vpsubusw */, X86::VPSUBUSWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34533 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34534 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34535 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34536 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34537 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34538 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34539 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34540 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34541 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34542 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34543 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34544 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34545 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34546 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34547 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34548 : { 14826 /* vpsubusw */, X86::VPSUBUSWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34549 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34550 : { 14826 /* vpsubusw */, X86::VPSUBUSWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34551 : { 14835 /* vpsubw */, X86::VPSUBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34552 : { 14835 /* vpsubw */, X86::VPSUBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34553 : { 14835 /* vpsubw */, X86::VPSUBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34554 : { 14835 /* vpsubw */, X86::VPSUBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34555 : { 14835 /* vpsubw */, X86::VPSUBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34556 : { 14835 /* vpsubw */, X86::VPSUBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34557 : { 14835 /* vpsubw */, X86::VPSUBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34558 : { 14835 /* vpsubw */, X86::VPSUBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34559 : { 14835 /* vpsubw */, X86::VPSUBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34560 : { 14835 /* vpsubw */, X86::VPSUBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34561 : { 14835 /* vpsubw */, X86::VPSUBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34562 : { 14835 /* vpsubw */, X86::VPSUBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34563 : { 14835 /* vpsubw */, X86::VPSUBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34564 : { 14835 /* vpsubw */, X86::VPSUBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34565 : { 14835 /* vpsubw */, X86::VPSUBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34566 : { 14835 /* vpsubw */, X86::VPSUBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34567 : { 14835 /* vpsubw */, X86::VPSUBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34568 : { 14835 /* vpsubw */, X86::VPSUBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34569 : { 14835 /* vpsubw */, X86::VPSUBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34570 : { 14835 /* vpsubw */, X86::VPSUBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34571 : { 14835 /* vpsubw */, X86::VPSUBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34572 : { 14835 /* vpsubw */, X86::VPSUBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34573 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34574 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34575 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34576 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34577 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34578 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34579 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34580 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34581 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34582 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34583 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34584 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34585 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34586 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34587 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34588 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34589 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34590 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34591 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34592 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34593 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34594 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34595 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34596 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34597 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34598 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34599 : { 14842 /* vpternlogd */, X86::VPTERNLOGDZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
34600 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34601 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34602 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34603 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34604 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrri, Convert__Reg1_0__Tie0_1_1__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34605 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34606 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34607 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34608 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbi, Convert__Reg1_0__Tie0_1_1__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34609 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34610 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34611 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34612 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34613 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34614 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34615 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
34616 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
34617 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34618 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
34619 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
34620 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34621 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrrikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
34622 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
34623 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34624 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ128rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
34625 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZ256rmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
34626 : { 14853 /* vpternlogq */, X86::VPTERNLOGQZrmbikz, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
34627 : { 14864 /* vptest */, X86::VPTESTrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
34628 : { 14864 /* vptest */, X86::VPTESTrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
34629 : { 14864 /* vptest */, X86::VPTESTYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
34630 : { 14864 /* vptest */, X86::VPTESTYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
34631 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34632 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34633 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34634 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34635 : { 14871 /* vptestmb */, X86::VPTESTMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34636 : { 14871 /* vptestmb */, X86::VPTESTMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34637 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34638 : { 14871 /* vptestmb */, X86::VPTESTMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34639 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34640 : { 14871 /* vptestmb */, X86::VPTESTMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34641 : { 14871 /* vptestmb */, X86::VPTESTMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34642 : { 14871 /* vptestmb */, X86::VPTESTMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34643 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34644 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34645 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34646 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34647 : { 14880 /* vptestmd */, X86::VPTESTMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34648 : { 14880 /* vptestmd */, X86::VPTESTMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34649 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34650 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34651 : { 14880 /* vptestmd */, X86::VPTESTMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34652 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34653 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34654 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34655 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34656 : { 14880 /* vptestmd */, X86::VPTESTMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34657 : { 14880 /* vptestmd */, X86::VPTESTMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34658 : { 14880 /* vptestmd */, X86::VPTESTMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34659 : { 14880 /* vptestmd */, X86::VPTESTMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34660 : { 14880 /* vptestmd */, X86::VPTESTMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34661 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34662 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34663 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34664 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34665 : { 14889 /* vptestmq */, X86::VPTESTMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34666 : { 14889 /* vptestmq */, X86::VPTESTMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34667 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34668 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34669 : { 14889 /* vptestmq */, X86::VPTESTMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34670 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34671 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34672 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34673 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34674 : { 14889 /* vptestmq */, X86::VPTESTMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34675 : { 14889 /* vptestmq */, X86::VPTESTMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34676 : { 14889 /* vptestmq */, X86::VPTESTMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34677 : { 14889 /* vptestmq */, X86::VPTESTMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34678 : { 14889 /* vptestmq */, X86::VPTESTMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34679 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34680 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34681 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34682 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34683 : { 14898 /* vptestmw */, X86::VPTESTMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34684 : { 14898 /* vptestmw */, X86::VPTESTMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34685 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34686 : { 14898 /* vptestmw */, X86::VPTESTMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34687 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34688 : { 14898 /* vptestmw */, X86::VPTESTMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34689 : { 14898 /* vptestmw */, X86::VPTESTMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34690 : { 14898 /* vptestmw */, X86::VPTESTMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34691 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34692 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34693 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34694 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34695 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34696 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34697 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34698 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34699 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34700 : { 14907 /* vptestnmb */, X86::VPTESTNMBZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34701 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34702 : { 14907 /* vptestnmb */, X86::VPTESTNMBZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34703 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34704 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34705 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34706 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34707 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34708 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34709 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34710 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34711 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34712 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34713 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34714 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34715 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34716 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34717 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34718 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34719 : { 14917 /* vptestnmd */, X86::VPTESTNMDZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34720 : { 14917 /* vptestnmd */, X86::VPTESTNMDZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34721 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34722 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34723 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34724 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34725 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34726 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34727 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34728 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34729 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34730 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34731 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34732 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34733 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34734 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34735 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34736 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ128rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34737 : { 14927 /* vptestnmq */, X86::VPTESTNMQZ256rmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34738 : { 14927 /* vptestnmq */, X86::VPTESTNMQZrmbk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34739 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_FR32X, MCK_FR32X }, },
34740 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_VK1, MCK_FR32X, MCK_Mem128 }, },
34741 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR256X, MCK_VR256X }, },
34742 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VK1, MCK_VR256X, MCK_Mem256 }, },
34743 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VK1, MCK_VR512, MCK_VR512 }, },
34744 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VK1, MCK_VR512, MCK_Mem512 }, },
34745 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34746 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ128rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34747 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34748 : { 14937 /* vptestnmw */, X86::VPTESTNMWZ256rmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34749 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrrk, Convert__Reg1_0__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34750 : { 14937 /* vptestnmw */, X86::VPTESTNMWZrmk, Convert__Reg1_0__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VK1, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34751 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34752 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34753 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34754 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34755 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34756 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34757 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34758 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34759 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34760 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34761 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34762 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34763 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34764 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34765 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34766 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34767 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34768 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34769 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34770 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34771 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34772 : { 14947 /* vpunpckhbw */, X86::VPUNPCKHBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34773 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34774 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34775 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34776 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34777 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34778 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34779 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34780 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34781 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34782 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34783 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34784 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34785 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34786 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34787 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34788 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34789 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34790 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34791 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34792 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34793 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34794 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34795 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34796 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34797 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34798 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34799 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34800 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34801 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34802 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34803 : { 14958 /* vpunpckhdq */, X86::VPUNPCKHDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34804 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34805 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34806 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34807 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34808 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34809 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34810 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34811 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34812 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34813 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34814 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34815 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34816 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34817 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34818 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34819 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34820 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34821 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34822 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34823 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34824 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34825 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34826 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34827 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34828 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34829 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34830 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34831 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34832 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34833 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34834 : { 14969 /* vpunpckhqdq */, X86::VPUNPCKHQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34835 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34836 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34837 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34838 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34839 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34840 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34841 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34842 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34843 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34844 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34845 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34846 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34847 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34848 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34849 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34850 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34851 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34852 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34853 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34854 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34855 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34856 : { 14981 /* vpunpckhwd */, X86::VPUNPCKHWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34857 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34858 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34859 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34860 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34861 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34862 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34863 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34864 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34865 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34866 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34867 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34868 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34869 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34870 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34871 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34872 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34873 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34874 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34875 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34876 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34877 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34878 : { 14992 /* vpunpcklbw */, X86::VPUNPCKLBWZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34879 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34880 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34881 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34882 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34883 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34884 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34885 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34886 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34887 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34888 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34889 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34890 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34891 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34892 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34893 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34894 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34895 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34896 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34897 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34898 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34899 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34900 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34901 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34902 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34903 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34904 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34905 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34906 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34907 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34908 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34909 : { 15003 /* vpunpckldq */, X86::VPUNPCKLDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34910 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34911 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34912 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34913 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34914 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34915 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34916 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34917 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34918 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34919 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34920 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34921 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34922 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34923 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34924 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34925 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34926 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34927 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34928 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34929 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34930 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34931 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34932 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34933 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34934 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34935 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34936 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34937 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34938 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
34939 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
34940 : { 15014 /* vpunpcklqdq */, X86::VPUNPCKLQDQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
34941 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34942 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34943 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34944 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34945 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34946 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34947 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34948 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34949 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34950 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34951 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34952 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34953 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34954 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34955 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34956 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34957 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34958 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34959 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34960 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34961 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34962 : { 15026 /* vpunpcklwd */, X86::VPUNPCKLWDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34963 : { 15037 /* vpxor */, X86::VPXORrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
34964 : { 15037 /* vpxor */, X86::VPXORrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
34965 : { 15037 /* vpxor */, X86::VPXORYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
34966 : { 15037 /* vpxor */, X86::VPXORYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
34967 : { 15043 /* vpxord */, X86::VPXORDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34968 : { 15043 /* vpxord */, X86::VPXORDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34969 : { 15043 /* vpxord */, X86::VPXORDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34970 : { 15043 /* vpxord */, X86::VPXORDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34971 : { 15043 /* vpxord */, X86::VPXORDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34972 : { 15043 /* vpxord */, X86::VPXORDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
34973 : { 15043 /* vpxord */, X86::VPXORDZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34974 : { 15043 /* vpxord */, X86::VPXORDZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34975 : { 15043 /* vpxord */, X86::VPXORDZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34976 : { 15043 /* vpxord */, X86::VPXORDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
34977 : { 15043 /* vpxord */, X86::VPXORDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
34978 : { 15043 /* vpxord */, X86::VPXORDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
34979 : { 15043 /* vpxord */, X86::VPXORDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
34980 : { 15043 /* vpxord */, X86::VPXORDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
34981 : { 15043 /* vpxord */, X86::VPXORDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
34982 : { 15043 /* vpxord */, X86::VPXORDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
34983 : { 15043 /* vpxord */, X86::VPXORDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
34984 : { 15043 /* vpxord */, X86::VPXORDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34985 : { 15043 /* vpxord */, X86::VPXORDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
34986 : { 15043 /* vpxord */, X86::VPXORDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
34987 : { 15043 /* vpxord */, X86::VPXORDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34988 : { 15043 /* vpxord */, X86::VPXORDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
34989 : { 15043 /* vpxord */, X86::VPXORDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
34990 : { 15043 /* vpxord */, X86::VPXORDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34991 : { 15043 /* vpxord */, X86::VPXORDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
34992 : { 15043 /* vpxord */, X86::VPXORDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
34993 : { 15043 /* vpxord */, X86::VPXORDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
34994 : { 15050 /* vpxorq */, X86::VPXORQZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
34995 : { 15050 /* vpxorq */, X86::VPXORQZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
34996 : { 15050 /* vpxorq */, X86::VPXORQZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
34997 : { 15050 /* vpxorq */, X86::VPXORQZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
34998 : { 15050 /* vpxorq */, X86::VPXORQZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
34999 : { 15050 /* vpxorq */, X86::VPXORQZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35000 : { 15050 /* vpxorq */, X86::VPXORQZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35001 : { 15050 /* vpxorq */, X86::VPXORQZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35002 : { 15050 /* vpxorq */, X86::VPXORQZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35003 : { 15050 /* vpxorq */, X86::VPXORQZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35004 : { 15050 /* vpxorq */, X86::VPXORQZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35005 : { 15050 /* vpxorq */, X86::VPXORQZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35006 : { 15050 /* vpxorq */, X86::VPXORQZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35007 : { 15050 /* vpxorq */, X86::VPXORQZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35008 : { 15050 /* vpxorq */, X86::VPXORQZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35009 : { 15050 /* vpxorq */, X86::VPXORQZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35010 : { 15050 /* vpxorq */, X86::VPXORQZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35011 : { 15050 /* vpxorq */, X86::VPXORQZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35012 : { 15050 /* vpxorq */, X86::VPXORQZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35013 : { 15050 /* vpxorq */, X86::VPXORQZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35014 : { 15050 /* vpxorq */, X86::VPXORQZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35015 : { 15050 /* vpxorq */, X86::VPXORQZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35016 : { 15050 /* vpxorq */, X86::VPXORQZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35017 : { 15050 /* vpxorq */, X86::VPXORQZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35018 : { 15050 /* vpxorq */, X86::VPXORQZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35019 : { 15050 /* vpxorq */, X86::VPXORQZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35020 : { 15050 /* vpxorq */, X86::VPXORQZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35021 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35022 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35023 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35024 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35025 : { 15057 /* vrangepd */, X86::VRANGEPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35026 : { 15057 /* vrangepd */, X86::VRANGEPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35027 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35028 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35029 : { 15057 /* vrangepd */, X86::VRANGEPDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35030 : { 15057 /* vrangepd */, X86::VRANGEPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35031 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35032 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35033 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35034 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35035 : { 15057 /* vrangepd */, X86::VRANGEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35036 : { 15057 /* vrangepd */, X86::VRANGEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35037 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35038 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35039 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35040 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35041 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35042 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35043 : { 15057 /* vrangepd */, X86::VRANGEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35044 : { 15057 /* vrangepd */, X86::VRANGEPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35045 : { 15057 /* vrangepd */, X86::VRANGEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35046 : { 15057 /* vrangepd */, X86::VRANGEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35047 : { 15057 /* vrangepd */, X86::VRANGEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35048 : { 15057 /* vrangepd */, X86::VRANGEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35049 : { 15057 /* vrangepd */, X86::VRANGEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35050 : { 15057 /* vrangepd */, X86::VRANGEPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35051 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35052 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35053 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35054 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35055 : { 15066 /* vrangeps */, X86::VRANGEPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35056 : { 15066 /* vrangeps */, X86::VRANGEPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35057 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35058 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35059 : { 15066 /* vrangeps */, X86::VRANGEPSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35060 : { 15066 /* vrangeps */, X86::VRANGEPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35061 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35062 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35063 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35064 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35065 : { 15066 /* vrangeps */, X86::VRANGEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35066 : { 15066 /* vrangeps */, X86::VRANGEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35067 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35068 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35069 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35070 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35071 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35072 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35073 : { 15066 /* vrangeps */, X86::VRANGEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35074 : { 15066 /* vrangeps */, X86::VRANGEPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35075 : { 15066 /* vrangeps */, X86::VRANGEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35076 : { 15066 /* vrangeps */, X86::VRANGEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35077 : { 15066 /* vrangeps */, X86::VRANGEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35078 : { 15066 /* vrangeps */, X86::VRANGEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35079 : { 15066 /* vrangeps */, X86::VRANGEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35080 : { 15066 /* vrangeps */, X86::VRANGEPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35081 : { 15075 /* vrangesd */, X86::VRANGESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35082 : { 15075 /* vrangesd */, X86::VRANGESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35083 : { 15075 /* vrangesd */, X86::VRANGESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35084 : { 15075 /* vrangesd */, X86::VRANGESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35085 : { 15075 /* vrangesd */, X86::VRANGESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35086 : { 15075 /* vrangesd */, X86::VRANGESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35087 : { 15075 /* vrangesd */, X86::VRANGESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35088 : { 15075 /* vrangesd */, X86::VRANGESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35089 : { 15075 /* vrangesd */, X86::VRANGESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35090 : { 15084 /* vrangess */, X86::VRANGESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35091 : { 15084 /* vrangess */, X86::VRANGESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35092 : { 15084 /* vrangess */, X86::VRANGESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35093 : { 15084 /* vrangess */, X86::VRANGESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35094 : { 15084 /* vrangess */, X86::VRANGESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35095 : { 15084 /* vrangess */, X86::VRANGESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35096 : { 15084 /* vrangess */, X86::VRANGESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35097 : { 15084 /* vrangess */, X86::VRANGESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35098 : { 15084 /* vrangess */, X86::VRANGESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35099 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35100 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35101 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35102 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35103 : { 15093 /* vrcp14pd */, X86::VRCP14PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35104 : { 15093 /* vrcp14pd */, X86::VRCP14PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35105 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35106 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35107 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35108 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35109 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35110 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35111 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35112 : { 15093 /* vrcp14pd */, X86::VRCP14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35113 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35114 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35115 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35116 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35117 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35118 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35119 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35120 : { 15093 /* vrcp14pd */, X86::VRCP14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35121 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35122 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35123 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35124 : { 15093 /* vrcp14pd */, X86::VRCP14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35125 : { 15093 /* vrcp14pd */, X86::VRCP14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35126 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35127 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35128 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35129 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35130 : { 15102 /* vrcp14ps */, X86::VRCP14PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35131 : { 15102 /* vrcp14ps */, X86::VRCP14PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35132 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35133 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35134 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35135 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35136 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35137 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35138 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35139 : { 15102 /* vrcp14ps */, X86::VRCP14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35140 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35141 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35142 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35143 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35144 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35145 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35146 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35147 : { 15102 /* vrcp14ps */, X86::VRCP14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35148 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35149 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35150 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35151 : { 15102 /* vrcp14ps */, X86::VRCP14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35152 : { 15102 /* vrcp14ps */, X86::VRCP14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35153 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35154 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35155 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35156 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35157 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35158 : { 15111 /* vrcp14sd */, X86::VRCP14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35159 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35160 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35161 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35162 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35163 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35164 : { 15120 /* vrcp14ss */, X86::VRCP14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35165 : { 15129 /* vrcp28pd */, X86::VRCP28PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35166 : { 15129 /* vrcp28pd */, X86::VRCP28PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35167 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35168 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35169 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35170 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35171 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35172 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35173 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35174 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35175 : { 15129 /* vrcp28pd */, X86::VRCP28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35176 : { 15129 /* vrcp28pd */, X86::VRCP28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35177 : { 15138 /* vrcp28ps */, X86::VRCP28PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35178 : { 15138 /* vrcp28ps */, X86::VRCP28PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35179 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35180 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35181 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35182 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35183 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35184 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35185 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35186 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35187 : { 15138 /* vrcp28ps */, X86::VRCP28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35188 : { 15138 /* vrcp28ps */, X86::VRCP28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35189 : { 15147 /* vrcp28sd */, X86::VRCP28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35190 : { 15147 /* vrcp28sd */, X86::VRCP28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35191 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35192 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35193 : { 15147 /* vrcp28sd */, X86::VRCP28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35194 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35195 : { 15147 /* vrcp28sd */, X86::VRCP28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35196 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35197 : { 15147 /* vrcp28sd */, X86::VRCP28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35198 : { 15156 /* vrcp28ss */, X86::VRCP28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35199 : { 15156 /* vrcp28ss */, X86::VRCP28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35200 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35201 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35202 : { 15156 /* vrcp28ss */, X86::VRCP28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35203 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35204 : { 15156 /* vrcp28ss */, X86::VRCP28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35205 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35206 : { 15156 /* vrcp28ss */, X86::VRCP28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35207 : { 15165 /* vrcpps */, X86::VRCPPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35208 : { 15165 /* vrcpps */, X86::VRCPPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35209 : { 15165 /* vrcpps */, X86::VRCPPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35210 : { 15165 /* vrcpps */, X86::VRCPPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35211 : { 15172 /* vrcpss */, X86::VRCPSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35212 : { 15172 /* vrcpss */, X86::VRCPSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35213 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35214 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35215 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35216 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35217 : { 15179 /* vreducepd */, X86::VREDUCEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35218 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35219 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35220 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35221 : { 15179 /* vreducepd */, X86::VREDUCEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35222 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35223 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35224 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35225 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35226 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35227 : { 15179 /* vreducepd */, X86::VREDUCEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35228 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35229 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35230 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35231 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35232 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35233 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35234 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35235 : { 15179 /* vreducepd */, X86::VREDUCEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35236 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35237 : { 15179 /* vreducepd */, X86::VREDUCEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35238 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35239 : { 15179 /* vreducepd */, X86::VREDUCEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35240 : { 15179 /* vreducepd */, X86::VREDUCEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35241 : { 15179 /* vreducepd */, X86::VREDUCEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35242 : { 15179 /* vreducepd */, X86::VREDUCEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35243 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35244 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35245 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35246 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35247 : { 15189 /* vreduceps */, X86::VREDUCEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35248 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35249 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35250 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35251 : { 15189 /* vreduceps */, X86::VREDUCEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35252 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35253 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35254 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35255 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35256 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35257 : { 15189 /* vreduceps */, X86::VREDUCEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35258 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35259 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35260 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35261 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35262 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35263 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35264 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35265 : { 15189 /* vreduceps */, X86::VREDUCEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35266 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35267 : { 15189 /* vreduceps */, X86::VREDUCEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35268 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35269 : { 15189 /* vreduceps */, X86::VREDUCEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35270 : { 15189 /* vreduceps */, X86::VREDUCEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35271 : { 15189 /* vreduceps */, X86::VREDUCEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35272 : { 15189 /* vreduceps */, X86::VREDUCEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35273 : { 15199 /* vreducesd */, X86::VREDUCESDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35274 : { 15199 /* vreducesd */, X86::VREDUCESDZrmi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35275 : { 15199 /* vreducesd */, X86::VREDUCESDZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35276 : { 15199 /* vreducesd */, X86::VREDUCESDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35277 : { 15199 /* vreducesd */, X86::VREDUCESDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35278 : { 15199 /* vreducesd */, X86::VREDUCESDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35279 : { 15199 /* vreducesd */, X86::VREDUCESDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35280 : { 15199 /* vreducesd */, X86::VREDUCESDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35281 : { 15199 /* vreducesd */, X86::VREDUCESDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35282 : { 15209 /* vreducess */, X86::VREDUCESSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35283 : { 15209 /* vreducess */, X86::VREDUCESSZrmi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35284 : { 15209 /* vreducess */, X86::VREDUCESSZrrib, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35285 : { 15209 /* vreducess */, X86::VREDUCESSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35286 : { 15209 /* vreducess */, X86::VREDUCESSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35287 : { 15209 /* vreducess */, X86::VREDUCESSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35288 : { 15209 /* vreducess */, X86::VREDUCESSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35289 : { 15209 /* vreducess */, X86::VREDUCESSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35290 : { 15209 /* vreducess */, X86::VREDUCESSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35291 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35292 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35293 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35294 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35295 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35296 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35297 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35298 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35299 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35300 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbi, Convert__Reg1_0__Mem645_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35301 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35302 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35303 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35304 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35305 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35306 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35307 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35308 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35309 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35310 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35311 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35312 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35313 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35314 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35315 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35316 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35317 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35318 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35319 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35320 : { 15219 /* vrndscalepd */, X86::VRNDSCALEPDZrmbikz, Convert__Reg1_0__Reg1_2__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35321 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35322 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmi, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35323 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35324 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmi, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35325 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrri, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35326 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmi, Convert__Reg1_0__Mem5125_1__ImmUnsignedi81_2, 0, { MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35327 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35328 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35329 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrib, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35330 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbi, Convert__Reg1_0__Mem325_1__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35331 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35332 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4__ImmUnsignedi81_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35333 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35334 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4__ImmUnsignedi81_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35335 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35336 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4__ImmUnsignedi81_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35337 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35338 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmikz, Convert__Reg1_0__Reg1_2__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35339 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35340 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35341 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmikz, Convert__Reg1_0__Reg1_2__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35342 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35343 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_ImmUnsignedi8 }, },
35344 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmikz, Convert__Reg1_0__Reg1_2__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35345 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35346 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35347 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35348 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35349 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrribkz, Convert__Reg1_0__Reg1_2__Reg1_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35350 : { 15231 /* vrndscaleps */, X86::VRNDSCALEPSZrmbikz, Convert__Reg1_0__Reg1_2__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35351 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35352 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35353 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35354 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35355 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35356 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35357 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35358 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35359 : { 15243 /* vrndscalesd */, X86::VRNDSCALESDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35360 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35361 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35362 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35363 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35364 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35365 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35366 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35367 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35368 : { 15255 /* vrndscaless */, X86::VRNDSCALESSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_, MCK_ImmUnsignedi8 }, },
35369 : { 15267 /* vroundpd */, X86::VROUNDPDr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35370 : { 15267 /* vroundpd */, X86::VROUNDPDm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35371 : { 15267 /* vroundpd */, X86::VROUNDPDYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35372 : { 15267 /* vroundpd */, X86::VROUNDPDYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35373 : { 15276 /* vroundps */, X86::VROUNDPSr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35374 : { 15276 /* vroundps */, X86::VROUNDPSm, Convert__Reg1_0__Mem1285_1__ImmUnsignedi81_2, 0, { MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35375 : { 15276 /* vroundps */, X86::VROUNDPSYr, Convert__Reg1_0__Reg1_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35376 : { 15276 /* vroundps */, X86::VROUNDPSYm, Convert__Reg1_0__Mem2565_1__ImmUnsignedi81_2, 0, { MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35377 : { 15285 /* vroundsd */, X86::VROUNDSDr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35378 : { 15285 /* vroundsd */, X86::VROUNDSDm, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem64, MCK_ImmUnsignedi8 }, },
35379 : { 15294 /* vroundss */, X86::VROUNDSSr, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35380 : { 15294 /* vroundss */, X86::VROUNDSSm, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem32, MCK_ImmUnsignedi8 }, },
35381 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35382 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35383 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35384 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35385 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35386 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35387 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35388 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35389 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35390 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35391 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35392 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35393 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35394 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35395 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35396 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35397 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35398 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35399 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35400 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35401 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35402 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35403 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35404 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35405 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35406 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35407 : { 15303 /* vrsqrt14pd */, X86::VRSQRT14PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35408 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35409 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35410 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35411 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35412 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35413 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35414 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35415 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35416 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35417 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35418 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35419 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35420 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35421 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35422 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35423 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35424 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35425 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35426 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35427 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35428 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35429 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35430 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35431 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35432 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35433 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35434 : { 15314 /* vrsqrt14ps */, X86::VRSQRT14PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35435 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35436 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35437 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35438 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35439 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35440 : { 15325 /* vrsqrt14sd */, X86::VRSQRT14SDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35441 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35442 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35443 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35444 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35445 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35446 : { 15336 /* vrsqrt14ss */, X86::VRSQRT14SSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35447 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35448 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35449 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35450 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35451 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35452 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35453 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35454 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35455 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35456 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35457 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35458 : { 15347 /* vrsqrt28pd */, X86::VRSQRT28PDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35459 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35460 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35461 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrb, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512, MCK__123_sae_125_ }, },
35462 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35463 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35464 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35465 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35466 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35467 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK__123_sae_125_ }, },
35468 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35469 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK__123_sae_125_ }, },
35470 : { 15358 /* vrsqrt28ps */, X86::VRSQRT28PSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35471 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35472 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35473 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35474 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35475 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35476 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35477 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35478 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35479 : { 15369 /* vrsqrt28sd */, X86::VRSQRT28SDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35480 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35481 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35482 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrb, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35483 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35484 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35485 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35486 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35487 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35488 : { 15380 /* vrsqrt28ss */, X86::VRSQRT28SSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35489 : { 15391 /* vrsqrtps */, X86::VRSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35490 : { 15391 /* vrsqrtps */, X86::VRSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35491 : { 15391 /* vrsqrtps */, X86::VRSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35492 : { 15391 /* vrsqrtps */, X86::VRSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35493 : { 15400 /* vrsqrtss */, X86::VRSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35494 : { 15400 /* vrsqrtss */, X86::VRSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35495 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35496 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35497 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35498 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35499 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35500 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35501 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35502 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35503 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35504 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35505 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35506 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35507 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35508 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35509 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35510 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35511 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35512 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35513 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35514 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35515 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35516 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35517 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35518 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35519 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35520 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35521 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35522 : { 15409 /* vscalefpd */, X86::VSCALEFPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35523 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35524 : { 15409 /* vscalefpd */, X86::VSCALEFPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35525 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35526 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35527 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35528 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35529 : { 15419 /* vscalefps */, X86::VSCALEFPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35530 : { 15419 /* vscalefps */, X86::VSCALEFPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35531 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35532 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35533 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35534 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35535 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35536 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35537 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35538 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35539 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35540 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35541 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35542 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35543 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35544 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35545 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35546 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35547 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35548 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35549 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35550 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35551 : { 15419 /* vscalefps */, X86::VSCALEFPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35552 : { 15419 /* vscalefps */, X86::VSCALEFPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35553 : { 15419 /* vscalefps */, X86::VSCALEFPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35554 : { 15419 /* vscalefps */, X86::VSCALEFPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35555 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35556 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35557 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35558 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35559 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35560 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35561 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35562 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35563 : { 15429 /* vscalefsd */, X86::VSCALEFSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35564 : { 15439 /* vscalefss */, X86::VSCALEFSSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35565 : { 15439 /* vscalefss */, X86::VSCALEFSSZrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35566 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35567 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35568 : { 15439 /* vscalefss */, X86::VSCALEFSSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35569 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35570 : { 15439 /* vscalefss */, X86::VSCALEFSSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35571 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35572 : { 15439 /* vscalefss */, X86::VSCALEFSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35573 : { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35574 : { 15449 /* vscatterdpd */, X86::VSCATTERDPDZ256mr, Convert__Reg1_2__Mem256_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35575 : { 15449 /* vscatterdpd */, X86::VSCATTERDPDZmr, Convert__Reg1_2__Mem512_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35576 : { 15461 /* vscatterdps */, X86::VSCATTERDPSZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35577 : { 15461 /* vscatterdps */, X86::VSCATTERDPSZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35578 : { 15461 /* vscatterdps */, X86::VSCATTERDPSZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35579 : { 15473 /* vscatterpf0dpd */, X86::VSCATTERPF0DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
35580 : { 15488 /* vscatterpf0dps */, X86::VSCATTERPF0DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35581 : { 15503 /* vscatterpf0qpd */, X86::VSCATTERPF0QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35582 : { 15518 /* vscatterpf0qps */, X86::VSCATTERPF0QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
35583 : { 15533 /* vscatterpf1dpd */, X86::VSCATTERPF1DPDm, Convert__Reg1_1__Mem512_RC256X5_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC256X }, },
35584 : { 15548 /* vscatterpf1dps */, X86::VSCATTERPF1DPSm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35585 : { 15563 /* vscatterpf1qpd */, X86::VSCATTERPF1QPDm, Convert__Reg1_1__Mem512_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512_RC512 }, },
35586 : { 15578 /* vscatterpf1qps */, X86::VSCATTERPF1QPSm, Convert__Reg1_1__Mem256_RC5125_3, 0, { MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256_RC512 }, },
35587 : { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ128mr, Convert__Reg1_2__Mem128_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35588 : { 15593 /* vscatterqpd */, X86::VSCATTERQPDZ256mr, Convert__Reg1_2__Mem256_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35589 : { 15593 /* vscatterqpd */, X86::VSCATTERQPDZmr, Convert__Reg1_2__Mem512_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem512_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35590 : { 15605 /* vscatterqps */, X86::VSCATTERQPSZ256mr, Convert__Reg1_2__Mem128_RC256X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem128_RC256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35591 : { 15605 /* vscatterqps */, X86::VSCATTERQPSZmr, Convert__Reg1_2__Mem256_RC5125_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem256_RC512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35592 : { 15605 /* vscatterqps */, X86::VSCATTERQPSZ128mr, Convert__Reg1_2__Mem64_RC128X5_0__Tie0_3_3__Reg1_4, 0, { MCK_Mem64_RC128X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35593 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35594 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35595 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35596 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35597 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35598 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35599 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35600 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35601 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35602 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35603 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35604 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35605 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35606 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35607 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35608 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35609 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35610 : { 15617 /* vshuff32x4 */, X86::VSHUFF32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35611 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35612 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35613 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35614 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35615 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35616 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35617 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35618 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35619 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35620 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35621 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35622 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35623 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35624 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35625 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35626 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35627 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35628 : { 15628 /* vshuff64x2 */, X86::VSHUFF64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35629 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35630 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35631 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35632 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35633 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35634 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35635 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35636 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35637 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35638 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35639 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35640 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35641 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35642 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35643 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35644 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35645 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35646 : { 15639 /* vshufi32x4 */, X86::VSHUFI32X4Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35647 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35648 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35649 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35650 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35651 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35652 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35653 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35654 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35655 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35656 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35657 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35658 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35659 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35660 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35661 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35662 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35663 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Z256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35664 : { 15650 /* vshufi64x2 */, X86::VSHUFI64X2Zrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35665 : { 15661 /* vshufpd */, X86::VSHUFPDrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35666 : { 15661 /* vshufpd */, X86::VSHUFPDrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35667 : { 15661 /* vshufpd */, X86::VSHUFPDYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35668 : { 15661 /* vshufpd */, X86::VSHUFPDYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35669 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35670 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35671 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35672 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35673 : { 15661 /* vshufpd */, X86::VSHUFPDZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35674 : { 15661 /* vshufpd */, X86::VSHUFPDZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35675 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35676 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35677 : { 15661 /* vshufpd */, X86::VSHUFPDZrmbi, Convert__Reg1_0__Reg1_1__Mem645_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35678 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35679 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35680 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35681 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35682 : { 15661 /* vshufpd */, X86::VSHUFPDZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35683 : { 15661 /* vshufpd */, X86::VSHUFPDZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35684 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35685 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35686 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35687 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35688 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35689 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35690 : { 15661 /* vshufpd */, X86::VSHUFPDZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35691 : { 15661 /* vshufpd */, X86::VSHUFPDZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35692 : { 15661 /* vshufpd */, X86::VSHUFPDZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35693 : { 15661 /* vshufpd */, X86::VSHUFPDZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_, MCK_ImmUnsignedi8 }, },
35694 : { 15661 /* vshufpd */, X86::VSHUFPDZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35695 : { 15661 /* vshufpd */, X86::VSHUFPDZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35696 : { 15669 /* vshufps */, X86::VSHUFPSrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_FR32, MCK_ImmUnsignedi8 }, },
35697 : { 15669 /* vshufps */, X86::VSHUFPSrmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32, MCK_FR32, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35698 : { 15669 /* vshufps */, X86::VSHUFPSYrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_VR256, MCK_ImmUnsignedi8 }, },
35699 : { 15669 /* vshufps */, X86::VSHUFPSYrmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256, MCK_VR256, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35700 : { 15669 /* vshufps */, X86::VSHUFPSZ128rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35701 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmi, Convert__Reg1_0__Reg1_1__Mem1285_2__ImmUnsignedi81_3, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35702 : { 15669 /* vshufps */, X86::VSHUFPSZ256rri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35703 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmi, Convert__Reg1_0__Reg1_1__Mem2565_2__ImmUnsignedi81_3, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35704 : { 15669 /* vshufps */, X86::VSHUFPSZrri, Convert__Reg1_0__Reg1_1__Reg1_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35705 : { 15669 /* vshufps */, X86::VSHUFPSZrmi, Convert__Reg1_0__Reg1_1__Mem5125_2__ImmUnsignedi81_3, 0, { MCK_VR512, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35706 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35707 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35708 : { 15669 /* vshufps */, X86::VSHUFPSZrmbi, Convert__Reg1_0__Reg1_1__Mem325_2__ImmUnsignedi81_4, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35709 : { 15669 /* vshufps */, X86::VSHUFPSZ128rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35710 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5__ImmUnsignedi81_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35711 : { 15669 /* vshufps */, X86::VSHUFPSZ256rrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35712 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5__ImmUnsignedi81_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35713 : { 15669 /* vshufps */, X86::VSHUFPSZrrik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35714 : { 15669 /* vshufps */, X86::VSHUFPSZrmik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5__ImmUnsignedi81_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35715 : { 15669 /* vshufps */, X86::VSHUFPSZ128rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_ImmUnsignedi8 }, },
35716 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128, MCK_ImmUnsignedi8 }, },
35717 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35718 : { 15669 /* vshufps */, X86::VSHUFPSZ256rrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X, MCK_ImmUnsignedi8 }, },
35719 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256, MCK_ImmUnsignedi8 }, },
35720 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35721 : { 15669 /* vshufps */, X86::VSHUFPSZrrikz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_ImmUnsignedi8 }, },
35722 : { 15669 /* vshufps */, X86::VSHUFPSZrmikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512, MCK_ImmUnsignedi8 }, },
35723 : { 15669 /* vshufps */, X86::VSHUFPSZrmbik, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5__ImmUnsignedi81_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35724 : { 15669 /* vshufps */, X86::VSHUFPSZ128rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_, MCK_ImmUnsignedi8 }, },
35725 : { 15669 /* vshufps */, X86::VSHUFPSZ256rmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_, MCK_ImmUnsignedi8 }, },
35726 : { 15669 /* vshufps */, X86::VSHUFPSZrmbikz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6__ImmUnsignedi81_8, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_, MCK_ImmUnsignedi8 }, },
35727 : { 15677 /* vsqrtpd */, X86::VSQRTPDr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35728 : { 15677 /* vsqrtpd */, X86::VSQRTPDm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35729 : { 15677 /* vsqrtpd */, X86::VSQRTPDYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35730 : { 15677 /* vsqrtpd */, X86::VSQRTPDYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35731 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35732 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35733 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35734 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35735 : { 15677 /* vsqrtpd */, X86::VSQRTPDZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35736 : { 15677 /* vsqrtpd */, X86::VSQRTPDZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35737 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mb, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35738 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35739 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35740 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmb, Convert__Reg1_0__Mem645_1, 0, { MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35741 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35742 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35743 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35744 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35745 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35746 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35747 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35748 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35749 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35750 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35751 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35752 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35753 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35754 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35755 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
35756 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem645_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35757 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ128mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to2_125_ }, },
35758 : { 15677 /* vsqrtpd */, X86::VSQRTPDZ256mbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to4_125_ }, },
35759 : { 15677 /* vsqrtpd */, X86::VSQRTPDZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
35760 : { 15677 /* vsqrtpd */, X86::VSQRTPDZmbkz, Convert__Reg1_0__Reg1_2__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem64, MCK__123_1to8_125_ }, },
35761 : { 15685 /* vsqrtps */, X86::VSQRTPSr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35762 : { 15685 /* vsqrtps */, X86::VSQRTPSm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35763 : { 15685 /* vsqrtps */, X86::VSQRTPSYr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35764 : { 15685 /* vsqrtps */, X86::VSQRTPSYm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35765 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128r, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35766 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128m, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32X, MCK_Mem128 }, },
35767 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256r, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256X, MCK_VR256X }, },
35768 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256m, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256X, MCK_Mem256 }, },
35769 : { 15685 /* vsqrtps */, X86::VSQRTPSZr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR512, MCK_VR512 }, },
35770 : { 15685 /* vsqrtps */, X86::VSQRTPSZm, Convert__Reg1_0__Mem5125_1, 0, { MCK_VR512, MCK_Mem512 }, },
35771 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mb, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35772 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35773 : { 15685 /* vsqrtps */, X86::VSQRTPSZrb, Convert__Reg1_0__Reg1_1__AVX512RC1_2, 0, { MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35774 : { 15685 /* vsqrtps */, X86::VSQRTPSZmb, Convert__Reg1_0__Mem325_1, 0, { MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35775 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X }, },
35776 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem1285_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem128 }, },
35777 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256rk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X }, },
35778 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem2565_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem256 }, },
35779 : { 15685 /* vsqrtps */, X86::VSQRTPSZrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512 }, },
35780 : { 15685 /* vsqrtps */, X86::VSQRTPSZmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem5125_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem512 }, },
35781 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X }, },
35782 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mkz, Convert__Reg1_0__Reg1_2__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem128 }, },
35783 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35784 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256rkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X }, },
35785 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mkz, Convert__Reg1_0__Reg1_2__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem256 }, },
35786 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35787 : { 15685 /* vsqrtps */, X86::VSQRTPSZrkz, Convert__Reg1_0__Reg1_2__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512 }, },
35788 : { 15685 /* vsqrtps */, X86::VSQRTPSZmkz, Convert__Reg1_0__Reg1_2__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem512 }, },
35789 : { 15685 /* vsqrtps */, X86::VSQRTPSZrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__AVX512RC1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_AVX512RC }, },
35790 : { 15685 /* vsqrtps */, X86::VSQRTPSZmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Mem325_4, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35791 : { 15685 /* vsqrtps */, X86::VSQRTPSZ128mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to4_125_ }, },
35792 : { 15685 /* vsqrtps */, X86::VSQRTPSZ256mbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to8_125_ }, },
35793 : { 15685 /* vsqrtps */, X86::VSQRTPSZrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_AVX512RC }, },
35794 : { 15685 /* vsqrtps */, X86::VSQRTPSZmbkz, Convert__Reg1_0__Reg1_2__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_Mem32, MCK__123_1to16_125_ }, },
35795 : { 15693 /* vsqrtsd */, X86::VSQRTSDr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35796 : { 15693 /* vsqrtsd */, X86::VSQRTSDm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
35797 : { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35798 : { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35799 : { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35800 : { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35801 : { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35802 : { 15693 /* vsqrtsd */, X86::VSQRTSDZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35803 : { 15693 /* vsqrtsd */, X86::VSQRTSDZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35804 : { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35805 : { 15693 /* vsqrtsd */, X86::VSQRTSDZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35806 : { 15701 /* vsqrtss */, X86::VSQRTSSr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35807 : { 15701 /* vsqrtss */, X86::VSQRTSSm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35808 : { 15701 /* vsqrtss */, X86::VSQRTSSZr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35809 : { 15701 /* vsqrtss */, X86::VSQRTSSZm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35810 : { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35811 : { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35812 : { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35813 : { 15701 /* vsqrtss */, X86::VSQRTSSZr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35814 : { 15701 /* vsqrtss */, X86::VSQRTSSZm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35815 : { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35816 : { 15701 /* vsqrtss */, X86::VSQRTSSZrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35817 : { 15709 /* vstmxcsr */, X86::VSTMXCSR, Convert__Mem325_0, 0, { MCK_Mem32 }, },
35818 : { 15718 /* vsubpd */, X86::VSUBPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35819 : { 15718 /* vsubpd */, X86::VSUBPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35820 : { 15718 /* vsubpd */, X86::VSUBPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35821 : { 15718 /* vsubpd */, X86::VSUBPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35822 : { 15718 /* vsubpd */, X86::VSUBPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35823 : { 15718 /* vsubpd */, X86::VSUBPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35824 : { 15718 /* vsubpd */, X86::VSUBPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35825 : { 15718 /* vsubpd */, X86::VSUBPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35826 : { 15718 /* vsubpd */, X86::VSUBPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35827 : { 15718 /* vsubpd */, X86::VSUBPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35828 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35829 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35830 : { 15718 /* vsubpd */, X86::VSUBPDZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35831 : { 15718 /* vsubpd */, X86::VSUBPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35832 : { 15718 /* vsubpd */, X86::VSUBPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35833 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35834 : { 15718 /* vsubpd */, X86::VSUBPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35835 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35836 : { 15718 /* vsubpd */, X86::VSUBPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35837 : { 15718 /* vsubpd */, X86::VSUBPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35838 : { 15718 /* vsubpd */, X86::VSUBPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35839 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35840 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35841 : { 15718 /* vsubpd */, X86::VSUBPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35842 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35843 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35844 : { 15718 /* vsubpd */, X86::VSUBPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35845 : { 15718 /* vsubpd */, X86::VSUBPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35846 : { 15718 /* vsubpd */, X86::VSUBPDZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35847 : { 15718 /* vsubpd */, X86::VSUBPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35848 : { 15718 /* vsubpd */, X86::VSUBPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35849 : { 15718 /* vsubpd */, X86::VSUBPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35850 : { 15718 /* vsubpd */, X86::VSUBPDZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35851 : { 15718 /* vsubpd */, X86::VSUBPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35852 : { 15725 /* vsubps */, X86::VSUBPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35853 : { 15725 /* vsubps */, X86::VSUBPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35854 : { 15725 /* vsubps */, X86::VSUBPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35855 : { 15725 /* vsubps */, X86::VSUBPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35856 : { 15725 /* vsubps */, X86::VSUBPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35857 : { 15725 /* vsubps */, X86::VSUBPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35858 : { 15725 /* vsubps */, X86::VSUBPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35859 : { 15725 /* vsubps */, X86::VSUBPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35860 : { 15725 /* vsubps */, X86::VSUBPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35861 : { 15725 /* vsubps */, X86::VSUBPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35862 : { 15725 /* vsubps */, X86::VSUBPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35863 : { 15725 /* vsubps */, X86::VSUBPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35864 : { 15725 /* vsubps */, X86::VSUBPSZrrb, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_VR512, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35865 : { 15725 /* vsubps */, X86::VSUBPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35866 : { 15725 /* vsubps */, X86::VSUBPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35867 : { 15725 /* vsubps */, X86::VSUBPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35868 : { 15725 /* vsubps */, X86::VSUBPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35869 : { 15725 /* vsubps */, X86::VSUBPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35870 : { 15725 /* vsubps */, X86::VSUBPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35871 : { 15725 /* vsubps */, X86::VSUBPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35872 : { 15725 /* vsubps */, X86::VSUBPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35873 : { 15725 /* vsubps */, X86::VSUBPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35874 : { 15725 /* vsubps */, X86::VSUBPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35875 : { 15725 /* vsubps */, X86::VSUBPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35876 : { 15725 /* vsubps */, X86::VSUBPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35877 : { 15725 /* vsubps */, X86::VSUBPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35878 : { 15725 /* vsubps */, X86::VSUBPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35879 : { 15725 /* vsubps */, X86::VSUBPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35880 : { 15725 /* vsubps */, X86::VSUBPSZrrbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35881 : { 15725 /* vsubps */, X86::VSUBPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35882 : { 15725 /* vsubps */, X86::VSUBPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35883 : { 15725 /* vsubps */, X86::VSUBPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35884 : { 15725 /* vsubps */, X86::VSUBPSZrrbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512, MCK_AVX512RC }, },
35885 : { 15725 /* vsubps */, X86::VSUBPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35886 : { 15732 /* vsubsd */, X86::VSUBSDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35887 : { 15732 /* vsubsd */, X86::VSUBSDrm, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem64 }, },
35888 : { 15732 /* vsubsd */, X86::VSUBSDZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35889 : { 15732 /* vsubsd */, X86::VSUBSDZrm_Int, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64 }, },
35890 : { 15732 /* vsubsd */, X86::VSUBSDZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35891 : { 15732 /* vsubsd */, X86::VSUBSDZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35892 : { 15732 /* vsubsd */, X86::VSUBSDZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64 }, },
35893 : { 15732 /* vsubsd */, X86::VSUBSDZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35894 : { 15732 /* vsubsd */, X86::VSUBSDZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64 }, },
35895 : { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35896 : { 15732 /* vsubsd */, X86::VSUBSDZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35897 : { 15739 /* vsubss */, X86::VSUBSSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35898 : { 15739 /* vsubss */, X86::VSUBSSrm, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem32 }, },
35899 : { 15739 /* vsubss */, X86::VSUBSSZrr_Int, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35900 : { 15739 /* vsubss */, X86::VSUBSSZrm_Int, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32 }, },
35901 : { 15739 /* vsubss */, X86::VSUBSSZrrb_Int, Convert__Reg1_0__Reg1_1__Reg1_2__AVX512RC1_3, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35902 : { 15739 /* vsubss */, X86::VSUBSSZrr_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35903 : { 15739 /* vsubss */, X86::VSUBSSZrm_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32 }, },
35904 : { 15739 /* vsubss */, X86::VSUBSSZrr_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35905 : { 15739 /* vsubss */, X86::VSUBSSZrm_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32 }, },
35906 : { 15739 /* vsubss */, X86::VSUBSSZrrb_Intk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5__AVX512RC1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35907 : { 15739 /* vsubss */, X86::VSUBSSZrrb_Intkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6__AVX512RC1_7, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X, MCK_AVX512RC }, },
35908 : { 15746 /* vtestpd */, X86::VTESTPDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35909 : { 15746 /* vtestpd */, X86::VTESTPDrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35910 : { 15746 /* vtestpd */, X86::VTESTPDYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35911 : { 15746 /* vtestpd */, X86::VTESTPDYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35912 : { 15754 /* vtestps */, X86::VTESTPSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35913 : { 15754 /* vtestps */, X86::VTESTPSrm, Convert__Reg1_0__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
35914 : { 15754 /* vtestps */, X86::VTESTPSYrr, Convert__Reg1_0__Reg1_1, 0, { MCK_VR256, MCK_VR256 }, },
35915 : { 15754 /* vtestps */, X86::VTESTPSYrm, Convert__Reg1_0__Mem2565_1, 0, { MCK_VR256, MCK_Mem256 }, },
35916 : { 15762 /* vucomisd */, X86::VUCOMISDrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35917 : { 15762 /* vucomisd */, X86::VUCOMISDrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32, MCK_Mem64 }, },
35918 : { 15762 /* vucomisd */, X86::VUCOMISDZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35919 : { 15762 /* vucomisd */, X86::VUCOMISDZrm, Convert__Reg1_0__Mem645_1, 0, { MCK_FR32X, MCK_Mem64 }, },
35920 : { 15762 /* vucomisd */, X86::VUCOMISDZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35921 : { 15771 /* vucomiss */, X86::VUCOMISSrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
35922 : { 15771 /* vucomiss */, X86::VUCOMISSrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32, MCK_Mem32 }, },
35923 : { 15771 /* vucomiss */, X86::VUCOMISSZrr, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X }, },
35924 : { 15771 /* vucomiss */, X86::VUCOMISSZrm, Convert__Reg1_0__Mem325_1, 0, { MCK_FR32X, MCK_Mem32 }, },
35925 : { 15771 /* vucomiss */, X86::VUCOMISSZrrb, Convert__Reg1_0__Reg1_1, 0, { MCK_FR32X, MCK_FR32X, MCK__123_sae_125_ }, },
35926 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35927 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35928 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35929 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35930 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35931 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35932 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35933 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35934 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35935 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35936 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35937 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35938 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35939 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35940 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35941 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35942 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35943 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35944 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35945 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35946 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35947 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35948 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35949 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35950 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35951 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35952 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35953 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35954 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35955 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
35956 : { 15780 /* vunpckhpd */, X86::VUNPCKHPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
35957 : { 15790 /* vunpckhps */, X86::VUNPCKHPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35958 : { 15790 /* vunpckhps */, X86::VUNPCKHPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35959 : { 15790 /* vunpckhps */, X86::VUNPCKHPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35960 : { 15790 /* vunpckhps */, X86::VUNPCKHPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35961 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35962 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35963 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35964 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35965 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35966 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35967 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35968 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35969 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35970 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
35971 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
35972 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
35973 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
35974 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
35975 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
35976 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
35977 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
35978 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35979 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
35980 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
35981 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35982 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
35983 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
35984 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35985 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
35986 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
35987 : { 15790 /* vunpckhps */, X86::VUNPCKHPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
35988 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
35989 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
35990 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
35991 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
35992 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
35993 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
35994 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
35995 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
35996 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
35997 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
35998 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
35999 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36000 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36001 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36002 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36003 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36004 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36005 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36006 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36007 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36008 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36009 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36010 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36011 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36012 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36013 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36014 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36015 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36016 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36017 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36018 : { 15800 /* vunpcklpd */, X86::VUNPCKLPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36019 : { 15810 /* vunpcklps */, X86::VUNPCKLPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36020 : { 15810 /* vunpcklps */, X86::VUNPCKLPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36021 : { 15810 /* vunpcklps */, X86::VUNPCKLPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36022 : { 15810 /* vunpcklps */, X86::VUNPCKLPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36023 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36024 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36025 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36026 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36027 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36028 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36029 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36030 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36031 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36032 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36033 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36034 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36035 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36036 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36037 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36038 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36039 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36040 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36041 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36042 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36043 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36044 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36045 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36046 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36047 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36048 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36049 : { 15810 /* vunpcklps */, X86::VUNPCKLPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36050 : { 15820 /* vxorpd */, X86::VXORPDrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36051 : { 15820 /* vxorpd */, X86::VXORPDrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36052 : { 15820 /* vxorpd */, X86::VXORPDYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36053 : { 15820 /* vxorpd */, X86::VXORPDYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36054 : { 15820 /* vxorpd */, X86::VXORPDZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36055 : { 15820 /* vxorpd */, X86::VXORPDZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36056 : { 15820 /* vxorpd */, X86::VXORPDZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36057 : { 15820 /* vxorpd */, X86::VXORPDZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36058 : { 15820 /* vxorpd */, X86::VXORPDZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36059 : { 15820 /* vxorpd */, X86::VXORPDZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36060 : { 15820 /* vxorpd */, X86::VXORPDZ128rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36061 : { 15820 /* vxorpd */, X86::VXORPDZ256rmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36062 : { 15820 /* vxorpd */, X86::VXORPDZrmb, Convert__Reg1_0__Reg1_1__Mem645_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36063 : { 15820 /* vxorpd */, X86::VXORPDZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36064 : { 15820 /* vxorpd */, X86::VXORPDZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36065 : { 15820 /* vxorpd */, X86::VXORPDZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36066 : { 15820 /* vxorpd */, X86::VXORPDZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36067 : { 15820 /* vxorpd */, X86::VXORPDZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36068 : { 15820 /* vxorpd */, X86::VXORPDZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36069 : { 15820 /* vxorpd */, X86::VXORPDZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36070 : { 15820 /* vxorpd */, X86::VXORPDZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36071 : { 15820 /* vxorpd */, X86::VXORPDZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36072 : { 15820 /* vxorpd */, X86::VXORPDZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36073 : { 15820 /* vxorpd */, X86::VXORPDZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36074 : { 15820 /* vxorpd */, X86::VXORPDZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36075 : { 15820 /* vxorpd */, X86::VXORPDZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36076 : { 15820 /* vxorpd */, X86::VXORPDZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36077 : { 15820 /* vxorpd */, X86::VXORPDZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem645_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36078 : { 15820 /* vxorpd */, X86::VXORPDZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem64, MCK__123_1to2_125_ }, },
36079 : { 15820 /* vxorpd */, X86::VXORPDZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem64, MCK__123_1to4_125_ }, },
36080 : { 15820 /* vxorpd */, X86::VXORPDZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem645_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem64, MCK__123_1to8_125_ }, },
36081 : { 15827 /* vxorps */, X86::VXORPSrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32, MCK_FR32, MCK_FR32 }, },
36082 : { 15827 /* vxorps */, X86::VXORPSrm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32, MCK_FR32, MCK_Mem128 }, },
36083 : { 15827 /* vxorps */, X86::VXORPSYrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256, MCK_VR256, MCK_VR256 }, },
36084 : { 15827 /* vxorps */, X86::VXORPSYrm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256, MCK_VR256, MCK_Mem256 }, },
36085 : { 15827 /* vxorps */, X86::VXORPSZ128rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_FR32X, MCK_FR32X, MCK_FR32X }, },
36086 : { 15827 /* vxorps */, X86::VXORPSZ128rm, Convert__Reg1_0__Reg1_1__Mem1285_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem128 }, },
36087 : { 15827 /* vxorps */, X86::VXORPSZ256rr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR256X, MCK_VR256X, MCK_VR256X }, },
36088 : { 15827 /* vxorps */, X86::VXORPSZ256rm, Convert__Reg1_0__Reg1_1__Mem2565_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem256 }, },
36089 : { 15827 /* vxorps */, X86::VXORPSZrr, Convert__Reg1_0__Reg1_1__Reg1_2, 0, { MCK_VR512, MCK_VR512, MCK_VR512 }, },
36090 : { 15827 /* vxorps */, X86::VXORPSZrm, Convert__Reg1_0__Reg1_1__Mem5125_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem512 }, },
36091 : { 15827 /* vxorps */, X86::VXORPSZ128rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_FR32X, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36092 : { 15827 /* vxorps */, X86::VXORPSZ256rmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR256X, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36093 : { 15827 /* vxorps */, X86::VXORPSZrmb, Convert__Reg1_0__Reg1_1__Mem325_2, 0, { MCK_VR512, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36094 : { 15827 /* vxorps */, X86::VXORPSZ128rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_FR32X }, },
36095 : { 15827 /* vxorps */, X86::VXORPSZ128rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem1285_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem128 }, },
36096 : { 15827 /* vxorps */, X86::VXORPSZ256rrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_VR256X }, },
36097 : { 15827 /* vxorps */, X86::VXORPSZ256rmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem2565_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem256 }, },
36098 : { 15827 /* vxorps */, X86::VXORPSZrrk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Reg1_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_VR512 }, },
36099 : { 15827 /* vxorps */, X86::VXORPSZrmk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem5125_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem512 }, },
36100 : { 15827 /* vxorps */, X86::VXORPSZ128rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_FR32X }, },
36101 : { 15827 /* vxorps */, X86::VXORPSZ128rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem1285_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem128 }, },
36102 : { 15827 /* vxorps */, X86::VXORPSZ128rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36103 : { 15827 /* vxorps */, X86::VXORPSZ256rrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_VR256X }, },
36104 : { 15827 /* vxorps */, X86::VXORPSZ256rmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem2565_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem256 }, },
36105 : { 15827 /* vxorps */, X86::VXORPSZ256rmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36106 : { 15827 /* vxorps */, X86::VXORPSZrrkz, Convert__Reg1_0__Reg1_2__Reg1_5__Reg1_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_VR512 }, },
36107 : { 15827 /* vxorps */, X86::VXORPSZrmkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem5125_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem512 }, },
36108 : { 15827 /* vxorps */, X86::VXORPSZrmbk, Convert__Reg1_0__Tie0_1_1__Reg1_2__Reg1_4__Mem325_5, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36109 : { 15827 /* vxorps */, X86::VXORPSZ128rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_FR32X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_FR32X, MCK_Mem32, MCK__123_1to4_125_ }, },
36110 : { 15827 /* vxorps */, X86::VXORPSZ256rmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR256X, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR256X, MCK_Mem32, MCK__123_1to8_125_ }, },
36111 : { 15827 /* vxorps */, X86::VXORPSZrmbkz, Convert__Reg1_0__Reg1_2__Reg1_5__Mem325_6, 0, { MCK_VR512, MCK__123_, MCK_VK16WM, MCK__125_, MCK__123_z_125_, MCK_VR512, MCK_Mem32, MCK__123_1to16_125_ }, },
36112 : { 15834 /* vzeroall */, X86::VZEROALL, Convert_NoOperands, 0, { }, },
36113 : { 15843 /* vzeroupper */, X86::VZEROUPPER, Convert_NoOperands, 0, { }, },
36114 : { 15854 /* wait */, X86::WAIT, Convert_NoOperands, 0, { }, },
36115 : { 15859 /* wbinvd */, X86::WBINVD, Convert_NoOperands, 0, { }, },
36116 : { 15866 /* wbnoinvd */, X86::WBNOINVD, Convert_NoOperands, 0, { }, },
36117 : { 15875 /* wrfsbase */, X86::WRFSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
36118 : { 15875 /* wrfsbase */, X86::WRFSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
36119 : { 15904 /* wrgsbase */, X86::WRGSBASE, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR32 }, },
36120 : { 15904 /* wrgsbase */, X86::WRGSBASE64, Convert__Reg1_0, Feature_In64BitMode, { MCK_GR64 }, },
36121 : { 15933 /* wrmsr */, X86::WRMSR, Convert_NoOperands, 0, { }, },
36122 : { 15939 /* wrpkru */, X86::WRPKRUr, Convert_NoOperands, 0, { }, },
36123 : { 15946 /* wrssd */, X86::WRSSD, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
36124 : { 15952 /* wrssq */, X86::WRSSQ, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
36125 : { 15958 /* wrussd */, X86::WRUSSD, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
36126 : { 15965 /* wrussq */, X86::WRUSSQ, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
36127 : { 15972 /* xabort */, X86::XABORT, Convert__Imm1_0, 0, { MCK_Imm }, },
36128 : { 15979 /* xacquire */, X86::XACQUIRE_PREFIX, Convert_NoOperands, 0, { }, },
36129 : { 15988 /* xadd */, X86::XADD16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR16, MCK_GR16 }, },
36130 : { 15988 /* xadd */, X86::XADD32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR32, MCK_GR32 }, },
36131 : { 15988 /* xadd */, X86::XADD64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR64, MCK_GR64 }, },
36132 : { 15988 /* xadd */, X86::XADD8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR8, MCK_GR8 }, },
36133 : { 15988 /* xadd */, X86::XADD16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
36134 : { 15988 /* xadd */, X86::XADD32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
36135 : { 15988 /* xadd */, X86::XADD64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
36136 : { 15988 /* xadd */, X86::XADD8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
36137 : { 16017 /* xbegin */, X86::XBEGIN_2, Convert__AbsMem161_0, 0, { MCK_AbsMem16 }, },
36138 : { 16017 /* xbegin */, X86::XBEGIN_4, Convert__AbsMem1_0, 0, { MCK_AbsMem }, },
36139 : { 16024 /* xchg */, X86::XCHG16ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_AX, MCK_GR16 }, },
36140 : { 16024 /* xchg */, X86::XCHG32rr, Convert__regEAX__regEAX__Tie0_1_1__Tie1_1_1, Feature_In64BitMode, { MCK_EAX, MCK_EAX }, },
36141 : { 16024 /* xchg */, X86::XCHG32ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_EAX, MCK_GR32 }, },
36142 : { 16024 /* xchg */, X86::NOOP, Convert_NoOperands, 0, { MCK_RAX, MCK_RAX }, },
36143 : { 16024 /* xchg */, X86::XCHG64ar, Convert__Reg1_1__Tie0_2_2, 0, { MCK_RAX, MCK_GR64 }, },
36144 : { 16024 /* xchg */, X86::XCHG16ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR16, MCK_AX }, },
36145 : { 16024 /* xchg */, X86::XCHG16rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR16, MCK_GR16 }, },
36146 : { 16024 /* xchg */, X86::XCHG16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
36147 : { 16024 /* xchg */, X86::XCHG32ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR32, MCK_EAX }, },
36148 : { 16024 /* xchg */, X86::XCHG32rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR32, MCK_GR32 }, },
36149 : { 16024 /* xchg */, X86::XCHG32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
36150 : { 16024 /* xchg */, X86::XCHG64ar, Convert__Reg1_0__Tie0_1_1, 0, { MCK_GR64, MCK_RAX }, },
36151 : { 16024 /* xchg */, X86::XCHG64rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR64, MCK_GR64 }, },
36152 : { 16024 /* xchg */, X86::XCHG64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
36153 : { 16024 /* xchg */, X86::XCHG8rr, Convert__Reg1_0__Reg1_1__Tie0_1_1__Tie1_2_2, 0, { MCK_GR8, MCK_GR8 }, },
36154 : { 16024 /* xchg */, X86::XCHG8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
36155 : { 16024 /* xchg */, X86::XCHG16rm, Convert__Reg1_1__Tie0_2_2__Mem165_0, 0, { MCK_Mem16, MCK_GR16 }, },
36156 : { 16024 /* xchg */, X86::XCHG32rm, Convert__Reg1_1__Tie0_2_2__Mem325_0, 0, { MCK_Mem32, MCK_GR32 }, },
36157 : { 16024 /* xchg */, X86::XCHG64rm, Convert__Reg1_1__Tie0_2_2__Mem645_0, 0, { MCK_Mem64, MCK_GR64 }, },
36158 : { 16024 /* xchg */, X86::XCHG8rm, Convert__Reg1_1__Tie0_2_2__Mem85_0, 0, { MCK_Mem8, MCK_GR8 }, },
36159 : { 16053 /* xcryptcbc */, X86::XCRYPTCBC, Convert_NoOperands, 0, { }, },
36160 : { 16063 /* xcryptcfb */, X86::XCRYPTCFB, Convert_NoOperands, 0, { }, },
36161 : { 16073 /* xcryptctr */, X86::XCRYPTCTR, Convert_NoOperands, 0, { }, },
36162 : { 16083 /* xcryptecb */, X86::XCRYPTECB, Convert_NoOperands, 0, { }, },
36163 : { 16093 /* xcryptofb */, X86::XCRYPTOFB, Convert_NoOperands, 0, { }, },
36164 : { 16103 /* xend */, X86::XEND, Convert_NoOperands, 0, { }, },
36165 : { 16108 /* xgetbv */, X86::XGETBV, Convert_NoOperands, 0, { }, },
36166 : { 16115 /* xlatb */, X86::XLAT, Convert_NoOperands, 0, { }, },
36167 : { 16121 /* xor */, X86::XOR8i8, Convert__Imm1_1, 0, { MCK_AL, MCK_Imm }, },
36168 : { 16121 /* xor */, X86::XOR16ri8, Convert__regAX__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_AX, MCK_ImmSExti16i8 }, },
36169 : { 16121 /* xor */, X86::XOR16i16, Convert__Imm1_1, 0, { MCK_AX, MCK_Imm }, },
36170 : { 16121 /* xor */, X86::XOR32ri8, Convert__regEAX__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_EAX, MCK_ImmSExti32i8 }, },
36171 : { 16121 /* xor */, X86::XOR32i32, Convert__Imm1_1, 0, { MCK_EAX, MCK_Imm }, },
36172 : { 16121 /* xor */, X86::XOR64ri8, Convert__regRAX__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_RAX, MCK_ImmSExti64i8 }, },
36173 : { 16121 /* xor */, X86::XOR64i32, Convert__ImmSExti64i321_1, 0, { MCK_RAX, MCK_ImmSExti64i32 }, },
36174 : { 16121 /* xor */, X86::XOR16rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR16, MCK_GR16 }, },
36175 : { 16121 /* xor */, X86::XOR16ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti16i81_1, 0, { MCK_GR16, MCK_ImmSExti16i8 }, },
36176 : { 16121 /* xor */, X86::XOR16ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR16, MCK_Imm }, },
36177 : { 16121 /* xor */, X86::XOR16rm, Convert__Reg1_0__Tie0_1_1__Mem165_1, 0, { MCK_GR16, MCK_Mem16 }, },
36178 : { 16121 /* xor */, X86::XOR32rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR32, MCK_GR32 }, },
36179 : { 16121 /* xor */, X86::XOR32ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti32i81_1, 0, { MCK_GR32, MCK_ImmSExti32i8 }, },
36180 : { 16121 /* xor */, X86::XOR32ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR32, MCK_Imm }, },
36181 : { 16121 /* xor */, X86::XOR32rm, Convert__Reg1_0__Tie0_1_1__Mem325_1, 0, { MCK_GR32, MCK_Mem32 }, },
36182 : { 16121 /* xor */, X86::XOR64rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR64, MCK_GR64 }, },
36183 : { 16121 /* xor */, X86::XOR64ri8, Convert__Reg1_0__Tie0_1_1__ImmSExti64i81_1, 0, { MCK_GR64, MCK_ImmSExti64i8 }, },
36184 : { 16121 /* xor */, X86::XOR64ri32, Convert__Reg1_0__Tie0_1_1__ImmSExti64i321_1, 0, { MCK_GR64, MCK_ImmSExti64i32 }, },
36185 : { 16121 /* xor */, X86::XOR64rm, Convert__Reg1_0__Tie0_1_1__Mem645_1, 0, { MCK_GR64, MCK_Mem64 }, },
36186 : { 16121 /* xor */, X86::XOR8rr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_GR8, MCK_GR8 }, },
36187 : { 16121 /* xor */, X86::XOR8ri, Convert__Reg1_0__Tie0_1_1__Imm1_1, 0, { MCK_GR8, MCK_Imm }, },
36188 : { 16121 /* xor */, X86::XOR8rm, Convert__Reg1_0__Tie0_1_1__Mem85_1, 0, { MCK_GR8, MCK_Mem8 }, },
36189 : { 16121 /* xor */, X86::XOR16mr, Convert__Mem165_0__Reg1_1, 0, { MCK_Mem16, MCK_GR16 }, },
36190 : { 16121 /* xor */, X86::XOR16mi8, Convert__Mem165_0__ImmSExti16i81_1, 0, { MCK_Mem16, MCK_ImmSExti16i8 }, },
36191 : { 16121 /* xor */, X86::XOR16mi, Convert__Mem165_0__Imm1_1, 0, { MCK_Mem16, MCK_Imm }, },
36192 : { 16121 /* xor */, X86::XOR32mr, Convert__Mem325_0__Reg1_1, 0, { MCK_Mem32, MCK_GR32 }, },
36193 : { 16121 /* xor */, X86::XOR32mi8, Convert__Mem325_0__ImmSExti32i81_1, 0, { MCK_Mem32, MCK_ImmSExti32i8 }, },
36194 : { 16121 /* xor */, X86::XOR32mi, Convert__Mem325_0__Imm1_1, 0, { MCK_Mem32, MCK_Imm }, },
36195 : { 16121 /* xor */, X86::XOR64mr, Convert__Mem645_0__Reg1_1, 0, { MCK_Mem64, MCK_GR64 }, },
36196 : { 16121 /* xor */, X86::XOR64mi8, Convert__Mem645_0__ImmSExti64i81_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i8 }, },
36197 : { 16121 /* xor */, X86::XOR64mi32, Convert__Mem645_0__ImmSExti64i321_1, Feature_In64BitMode, { MCK_Mem64, MCK_ImmSExti64i32 }, },
36198 : { 16121 /* xor */, X86::XOR8mr, Convert__Mem85_0__Reg1_1, 0, { MCK_Mem8, MCK_GR8 }, },
36199 : { 16121 /* xor */, X86::XOR8mi, Convert__Mem85_0__Imm1_1, 0, { MCK_Mem8, MCK_Imm }, },
36200 : { 16135 /* xorpd */, X86::XORPDrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
36201 : { 16135 /* xorpd */, X86::XORPDrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
36202 : { 16141 /* xorps */, X86::XORPSrr, Convert__Reg1_0__Tie0_1_1__Reg1_1, 0, { MCK_FR32, MCK_FR32 }, },
36203 : { 16141 /* xorps */, X86::XORPSrm, Convert__Reg1_0__Tie0_1_1__Mem1285_1, 0, { MCK_FR32, MCK_Mem128 }, },
36204 : { 16157 /* xrelease */, X86::XRELEASE_PREFIX, Convert_NoOperands, 0, { }, },
36205 : { 16166 /* xrstor */, X86::XRSTOR, Convert__Mem5_0, 0, { MCK_Mem }, },
36206 : { 16173 /* xrstor64 */, X86::XRSTOR64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36207 : { 16182 /* xrstors */, X86::XRSTORS, Convert__Mem5_0, 0, { MCK_Mem }, },
36208 : { 16190 /* xrstors64 */, X86::XRSTORS64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36209 : { 16200 /* xsave */, X86::XSAVE, Convert__Mem5_0, 0, { MCK_Mem }, },
36210 : { 16206 /* xsave64 */, X86::XSAVE64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36211 : { 16214 /* xsavec */, X86::XSAVEC, Convert__Mem5_0, 0, { MCK_Mem }, },
36212 : { 16221 /* xsavec64 */, X86::XSAVEC64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36213 : { 16230 /* xsaveopt */, X86::XSAVEOPT, Convert__Mem5_0, 0, { MCK_Mem }, },
36214 : { 16239 /* xsaveopt64 */, X86::XSAVEOPT64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36215 : { 16250 /* xsaves */, X86::XSAVES, Convert__Mem5_0, 0, { MCK_Mem }, },
36216 : { 16257 /* xsaves64 */, X86::XSAVES64, Convert__Mem5_0, Feature_In64BitMode, { MCK_Mem }, },
36217 : { 16266 /* xsetbv */, X86::XSETBV, Convert_NoOperands, 0, { }, },
36218 : { 16273 /* xsha1 */, X86::XSHA1, Convert_NoOperands, 0, { }, },
36219 : { 16279 /* xsha256 */, X86::XSHA256, Convert_NoOperands, 0, { }, },
36220 : { 16287 /* xstore */, X86::XSTORE, Convert_NoOperands, 0, { }, },
36221 : { 16294 /* xstorerng */, X86::XSTORE, Convert_NoOperands, 0, { }, },
36222 : { 16304 /* xtest */, X86::XTEST, Convert_NoOperands, 0, { }, },
36223 : };
36224 :
36225 : #include "llvm/Support/Debug.h"
36226 : #include "llvm/Support/Format.h"
36227 :
36228 166907 : unsigned X86AsmParser::
36229 : MatchInstructionImpl(const OperandVector &Operands,
36230 : MCInst &Inst,
36231 : uint64_t &ErrorInfo,
36232 : bool matchingInlineAsm, unsigned VariantID) {
36233 : // Eliminate obvious mismatches.
36234 166907 : if (Operands.size() > 10) {
36235 0 : ErrorInfo = 10;
36236 0 : return Match_InvalidOperand;
36237 : }
36238 :
36239 : // Get the current feature set.
36240 166907 : uint64_t AvailableFeatures = getAvailableFeatures();
36241 :
36242 : // Get the instruction mnemonic, which is the first token.
36243 166907 : StringRef Mnemonic = ((X86Operand&)*Operands[0]).getToken();
36244 :
36245 : // Process all MnemonicAliases to remap the mnemonic.
36246 166907 : applyMnemonicAliases(Mnemonic, AvailableFeatures, VariantID);
36247 :
36248 : // Some state to try to produce better error messages.
36249 : bool HadMatchOtherThanFeatures = false;
36250 : bool HadMatchOtherThanPredicate = false;
36251 : unsigned RetCode = Match_InvalidOperand;
36252 : uint64_t MissingFeatures = ~0ULL;
36253 : // Set ErrorInfo to the operand that mismatches if it is
36254 : // wrong for all instances of the instruction.
36255 166907 : ErrorInfo = ~0ULL;
36256 : // Find the appropriate table for this asm variant.
36257 : const MatchEntry *Start, *End;
36258 166907 : switch (VariantID) {
36259 0 : default: llvm_unreachable("invalid variant!");
36260 : case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
36261 13887 : case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
36262 : }
36263 : // Search the table.
36264 : auto MnemonicRange = std::equal_range(Start, End, Mnemonic, LessOpcode());
36265 :
36266 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << "AsmMatcher: found " <<
36267 : std::distance(MnemonicRange.first, MnemonicRange.second) <<
36268 : " encodings with mnemonic '" << Mnemonic << "'\n");
36269 :
36270 : // Return a more specific error code if no mnemonics match.
36271 166907 : if (MnemonicRange.first == MnemonicRange.second)
36272 : return Match_MnemonicFail;
36273 :
36274 946795 : for (const MatchEntry *it = MnemonicRange.first, *ie = MnemonicRange.second;
36275 1102608 : it != ie; ++it) {
36276 1080094 : bool HasRequiredFeatures =
36277 1080094 : (AvailableFeatures & it->RequiredFeatures) == it->RequiredFeatures;
36278 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Trying to match opcode "
36279 : << MII.getName(it->Opcode) << "\n");
36280 : // equal_range guarantees that instruction mnemonic matches.
36281 : assert(Mnemonic == it->getMnemonic());
36282 : bool OperandsValid = true;
36283 1907773 : for (unsigned FormalIdx = 0, ActualIdx = 1; FormalIdx != 9; ++FormalIdx) {
36284 1907585 : auto Formal = static_cast<MatchClassKind>(it->Classes[FormalIdx]);
36285 : DEBUG_WITH_TYPE("asm-matcher",
36286 : dbgs() << " Matching formal operand class " << getMatchClassName(Formal)
36287 : << " against actual operand at index " << ActualIdx);
36288 1907585 : if (ActualIdx < Operands.size())
36289 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << " (";
36290 : Operands[ActualIdx]->print(dbgs()); dbgs() << "): ");
36291 : else
36292 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << ": ");
36293 1907585 : if (ActualIdx >= Operands.size()) {
36294 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << "actual operand index out of range ");
36295 133930 : OperandsValid = (Formal == InvalidMatchClass) || isSubclass(Formal, OptionalMatchClass);
36296 13 : if (!OperandsValid) ErrorInfo = ActualIdx;
36297 : break;
36298 : }
36299 : MCParsedAsmOperand &Actual = *Operands[ActualIdx];
36300 1773655 : unsigned Diag = validateOperandClass(Actual, Formal);
36301 1773655 : if (Diag == Match_Success) {
36302 : DEBUG_WITH_TYPE("asm-matcher",
36303 : dbgs() << "match success using generic matcher\n");
36304 827679 : ++ActualIdx;
36305 827679 : continue;
36306 : }
36307 : // If the generic handler indicates an invalid operand
36308 : // failure, check for a special case.
36309 : if (Diag != Match_Success) {
36310 945976 : unsigned TargetDiag = validateTargetOperandClass(Actual, Formal);
36311 945976 : if (TargetDiag == Match_Success) {
36312 : DEBUG_WITH_TYPE("asm-matcher",
36313 : dbgs() << "match success using target matcher\n");
36314 0 : ++ActualIdx;
36315 0 : continue;
36316 : }
36317 : // If the target matcher returned a specific error code use
36318 : // that, else use the one from the generic matcher.
36319 945976 : if (TargetDiag != Match_InvalidOperand && HasRequiredFeatures)
36320 : Diag = TargetDiag;
36321 : }
36322 : // If current formal operand wasn't matched and it is optional
36323 : // then try to match next formal operand
36324 945976 : if (Diag == Match_InvalidOperand && isSubclass(Formal, OptionalMatchClass)) {
36325 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << "ignoring optional operand\n");
36326 : continue;
36327 : }
36328 : // If this operand is broken for all of the instances of this
36329 : // mnemonic, keep track of it so we can report loc info.
36330 : // If we already had a match that only failed due to a
36331 : // target predicate, that diagnostic is preferred.
36332 945976 : if (!HadMatchOtherThanPredicate &&
36333 824425 : (it == MnemonicRange.first || ErrorInfo <= ActualIdx)) {
36334 674268 : if (HasRequiredFeatures && (ErrorInfo != ActualIdx || Diag != Match_InvalidOperand))
36335 : RetCode = Diag;
36336 674268 : ErrorInfo = ActualIdx;
36337 : }
36338 : // Otherwise, just reject this instance of the mnemonic.
36339 : OperandsValid = false;
36340 : break;
36341 : }
36342 :
36343 1080094 : if (!OperandsValid) {
36344 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Opcode result: multiple "
36345 : "operand mismatches, ignoring "
36346 : "this opcode\n");
36347 : continue;
36348 : }
36349 134105 : if (!HasRequiredFeatures) {
36350 : HadMatchOtherThanFeatures = true;
36351 806 : uint64_t NewMissingFeatures = it->RequiredFeatures & ~AvailableFeatures;
36352 : DEBUG_WITH_TYPE("asm-matcher", dbgs() << "Missing target features: "
36353 : << format_hex(NewMissingFeatures, 18)
36354 : << "\n");
36355 806 : if (countPopulation(NewMissingFeatures) <=
36356 : countPopulation(MissingFeatures))
36357 : MissingFeatures = NewMissingFeatures;
36358 806 : continue;
36359 : }
36360 :
36361 : Inst.clear();
36362 :
36363 133299 : Inst.setOpcode(it->Opcode);
36364 : // We have a potential match but have not rendered the operands.
36365 : // Check the target predicate to handle any context sensitive
36366 : // constraints.
36367 : // For example, Ties that are referenced multiple times must be
36368 : // checked here to ensure the input is the same for each match
36369 : // constraints. If we leave it any later the ties will have been
36370 : // canonicalized
36371 : unsigned MatchResult;
36372 133299 : if ((MatchResult = checkEarlyTargetMatchPredicate(Inst, Operands)) != Match_Success) {
36373 : Inst.clear();
36374 : DEBUG_WITH_TYPE(
36375 : "asm-matcher",
36376 : dbgs() << "Early target match predicate failed with diag code "
36377 : << MatchResult << "\n");
36378 : RetCode = MatchResult;
36379 : HadMatchOtherThanPredicate = true;
36380 : continue;
36381 : }
36382 :
36383 133299 : if (matchingInlineAsm) {
36384 436 : convertToMapAndConstraints(it->ConvertFn, Operands);
36385 436 : if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
36386 : return Match_InvalidTiedOperand;
36387 :
36388 436 : return Match_Success;
36389 : }
36390 :
36391 : // We have selected a definite instruction, convert the parsed
36392 : // operands into the appropriate MCInst.
36393 132863 : convertToMCInst(it->ConvertFn, Inst, it->Opcode, Operands);
36394 :
36395 : // We have a potential match. Check the target predicate to
36396 : // handle any context sensitive constraints.
36397 132863 : if ((MatchResult = checkTargetMatchPredicate(Inst)) != Match_Success) {
36398 : DEBUG_WITH_TYPE("asm-matcher",
36399 : dbgs() << "Target match predicate failed with diag code "
36400 : << MatchResult << "\n");
36401 : Inst.clear();
36402 : RetCode = MatchResult;
36403 : HadMatchOtherThanPredicate = true;
36404 0 : continue;
36405 : }
36406 :
36407 132863 : if (!checkAsmTiedOperandConstraints(*this, it->ConvertFn, Operands, ErrorInfo))
36408 0 : return Match_InvalidTiedOperand;
36409 :
36410 : DEBUG_WITH_TYPE(
36411 : "asm-matcher",
36412 : dbgs() << "Opcode result: complete match, selecting this opcode\n");
36413 : return Match_Success;
36414 : }
36415 :
36416 : // Okay, we had no match. Try to return a useful error code.
36417 22514 : if (HadMatchOtherThanPredicate || !HadMatchOtherThanFeatures)
36418 : return RetCode;
36419 :
36420 : // Missing feature matches return which features were missing
36421 31 : ErrorInfo = MissingFeatures;
36422 31 : return Match_MissingFeature;
36423 : }
36424 :
36425 : #endif // GET_MATCHER_IMPLEMENTATION
36426 :
36427 :
36428 : #ifdef GET_MNEMONIC_SPELL_CHECKER
36429 : #undef GET_MNEMONIC_SPELL_CHECKER
36430 :
36431 : static std::string X86MnemonicSpellCheck(StringRef S, uint64_t FBS, unsigned VariantID) {
36432 : const unsigned MaxEditDist = 2;
36433 : std::vector<StringRef> Candidates;
36434 : StringRef Prev = "";
36435 :
36436 : // Find the appropriate table for this asm variant.
36437 : const MatchEntry *Start, *End;
36438 : switch (VariantID) {
36439 : default: llvm_unreachable("invalid variant!");
36440 : case 0: Start = std::begin(MatchTable0); End = std::end(MatchTable0); break;
36441 : case 1: Start = std::begin(MatchTable1); End = std::end(MatchTable1); break;
36442 : }
36443 :
36444 : for (auto I = Start; I < End; I++) {
36445 : // Ignore unsupported instructions.
36446 : if ((FBS & I->RequiredFeatures) != I->RequiredFeatures)
36447 : continue;
36448 :
36449 : StringRef T = I->getMnemonic();
36450 : // Avoid recomputing the edit distance for the same string.
36451 : if (T.equals(Prev))
36452 : continue;
36453 :
36454 : Prev = T;
36455 : unsigned Dist = S.edit_distance(T, false, MaxEditDist);
36456 : if (Dist <= MaxEditDist)
36457 : Candidates.push_back(T);
36458 : }
36459 :
36460 : if (Candidates.empty())
36461 : return "";
36462 :
36463 : std::string Res = ", did you mean: ";
36464 : unsigned i = 0;
36465 : for( ; i < Candidates.size() - 1; i++)
36466 : Res += Candidates[i].str() + ", ";
36467 : return Res + Candidates[i].str() + "?";
36468 : }
36469 :
36470 : #endif // GET_MNEMONIC_SPELL_CHECKER
36471 :
|
