LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/X86 - X86GenCallingConv.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1583 1850 85.6 %
Date: 2017-09-14 15:23:50 Functions: 54 62 87.1 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Calling Convention Implementation Fragment                                 *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : static bool CC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
      10             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
      11             :                             ISD::ArgFlagsTy ArgFlags, CCState &State);
      12             : static bool CC_X86(unsigned ValNo, MVT ValVT,
      13             :                    MVT LocVT, CCValAssign::LocInfo LocInfo,
      14             :                    ISD::ArgFlagsTy ArgFlags, CCState &State);
      15             : static bool CC_X86_32(unsigned ValNo, MVT ValVT,
      16             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      17             :                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      18             : static bool CC_X86_32_C(unsigned ValNo, MVT ValVT,
      19             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
      20             :                         ISD::ArgFlagsTy ArgFlags, CCState &State);
      21             : static bool CC_X86_32_Common(unsigned ValNo, MVT ValVT,
      22             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      23             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      24             : static bool CC_X86_32_FastCC(unsigned ValNo, MVT ValVT,
      25             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      26             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      27             : static bool CC_X86_32_FastCall(unsigned ValNo, MVT ValVT,
      28             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
      29             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
      30             : static bool CC_X86_32_GHC(unsigned ValNo, MVT ValVT,
      31             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
      32             :                           ISD::ArgFlagsTy ArgFlags, CCState &State);
      33             : static bool CC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
      34             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      35             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      36             : static bool CC_X86_32_Intr(unsigned ValNo, MVT ValVT,
      37             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      38             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      39             : static bool CC_X86_32_MCU(unsigned ValNo, MVT ValVT,
      40             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
      41             :                           ISD::ArgFlagsTy ArgFlags, CCState &State);
      42             : static bool CC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
      43             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
      44             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
      45             : static bool CC_X86_32_ThisCall(unsigned ValNo, MVT ValVT,
      46             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
      47             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
      48             : static bool CC_X86_32_ThisCall_Common(unsigned ValNo, MVT ValVT,
      49             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      50             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      51             : static bool CC_X86_32_ThisCall_Mingw(unsigned ValNo, MVT ValVT,
      52             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
      53             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State);
      54             : static bool CC_X86_32_ThisCall_Win(unsigned ValNo, MVT ValVT,
      55             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
      56             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State);
      57             : static bool CC_X86_32_Vector_Common(unsigned ValNo, MVT ValVT,
      58             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
      59             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
      60             : static bool CC_X86_32_Vector_Darwin(unsigned ValNo, MVT ValVT,
      61             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
      62             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
      63             : static bool CC_X86_32_Vector_Standard(unsigned ValNo, MVT ValVT,
      64             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      65             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      66             : static bool CC_X86_64(unsigned ValNo, MVT ValVT,
      67             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      68             :                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      69             : static bool CC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
      70             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      71             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      72             : static bool CC_X86_64_C(unsigned ValNo, MVT ValVT,
      73             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
      74             :                         ISD::ArgFlagsTy ArgFlags, CCState &State);
      75             : static bool CC_X86_64_GHC(unsigned ValNo, MVT ValVT,
      76             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
      77             :                           ISD::ArgFlagsTy ArgFlags, CCState &State);
      78             : static bool CC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
      79             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      80             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      81             : static bool CC_X86_64_HHVM_C(unsigned ValNo, MVT ValVT,
      82             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      83             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      84             : static bool CC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
      85             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      86             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      87             : static bool CC_X86_64_Intr(unsigned ValNo, MVT ValVT,
      88             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      89             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      90             : static bool CC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
      91             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
      92             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
      93             : static bool CC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
      94             :                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
      95             :                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
      96             : static bool CC_X86_Win32_VectorCall(unsigned ValNo, MVT ValVT,
      97             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
      98             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
      99             : static bool CC_X86_Win64_C(unsigned ValNo, MVT ValVT,
     100             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     101             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
     102             : static bool CC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
     103             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
     104             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State);
     105             : static bool CC_X86_Win64_VectorCall(unsigned ValNo, MVT ValVT,
     106             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     107             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     108             : static bool RetCC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
     109             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
     110             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
     111             : static bool RetCC_X86(unsigned ValNo, MVT ValVT,
     112             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
     113             :                       ISD::ArgFlagsTy ArgFlags, CCState &State);
     114             : static bool RetCC_X86Common(unsigned ValNo, MVT ValVT,
     115             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
     116             :                             ISD::ArgFlagsTy ArgFlags, CCState &State);
     117             : static bool RetCC_X86_32(unsigned ValNo, MVT ValVT,
     118             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
     119             :                          ISD::ArgFlagsTy ArgFlags, CCState &State);
     120             : static bool RetCC_X86_32_C(unsigned ValNo, MVT ValVT,
     121             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     122             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
     123             : static bool RetCC_X86_32_Fast(unsigned ValNo, MVT ValVT,
     124             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     125             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     126             : static bool RetCC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
     127             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     128             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     129             : static bool RetCC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
     130             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
     131             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State);
     132             : static bool RetCC_X86_32_VectorCall(unsigned ValNo, MVT ValVT,
     133             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     134             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     135             : static bool RetCC_X86_64(unsigned ValNo, MVT ValVT,
     136             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
     137             :                          ISD::ArgFlagsTy ArgFlags, CCState &State);
     138             : static bool RetCC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
     139             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
     140             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
     141             : static bool RetCC_X86_64_C(unsigned ValNo, MVT ValVT,
     142             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     143             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
     144             : static bool RetCC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
     145             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     146             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     147             : static bool RetCC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
     148             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     149             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     150             : static bool RetCC_X86_64_Swift(unsigned ValNo, MVT ValVT,
     151             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
     152             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
     153             : static bool RetCC_X86_64_Vectorcall(unsigned ValNo, MVT ValVT,
     154             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     155             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     156             : static bool RetCC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
     157             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
     158             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State);
     159             : static bool RetCC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
     160             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
     161             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State);
     162             : static bool RetCC_X86_Win64_C(unsigned ValNo, MVT ValVT,
     163             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     164             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     165             : static bool RetCC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
     166             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     167             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     168             : 
     169             : 
     170         182 : static bool CC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
     171             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
     172             :                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
     173             : 
     174         182 :   if (LocVT == MVT::i32) {
     175          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
     176             :       static const MCPhysReg RegList1[] = {
     177             :         X86::ECX, X86::EDX, X86::R8D, X86::R9D
     178             :       };
     179           2 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
     180           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     181           2 :         return false;
     182             :       }
     183             :     }
     184             :   }
     185             : 
     186         180 :   if (LocVT == MVT::i64) {
     187          18 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
     188             :       static const MCPhysReg RegList2[] = {
     189             :         X86::RCX, X86::RDX, X86::R8, X86::R9
     190             :       };
     191           6 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     192          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     193           6 :         return false;
     194             :       }
     195             :     }
     196             :   }
     197             : 
     198         174 :   if (LocVT == MVT::i32) {
     199          16 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     200             :       static const MCPhysReg RegList3[] = {
     201             :         X86::EDI, X86::ESI, X86::EDX, X86::ECX
     202             :       };
     203           2 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
     204           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     205           2 :         return false;
     206             :       }
     207             :     }
     208             :   }
     209             : 
     210         172 :   if (LocVT == MVT::i64) {
     211           6 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     212             :       static const MCPhysReg RegList4[] = {
     213             :         X86::RDI, X86::RSI, X86::RDX, X86::RCX
     214             :       };
     215           6 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
     216          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     217           6 :         return false;
     218             :       }
     219             :     }
     220             :   }
     221             : 
     222         166 :   if (LocVT == MVT::i32) {
     223          14 :     unsigned Offset5 = State.AllocateStack(4, 4);
     224          28 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
     225          14 :     return false;
     226             :   }
     227             : 
     228         304 :   if (LocVT == MVT::f32 ||
     229         304 :       LocVT == MVT::f64 ||
     230         304 :       LocVT == MVT::v4i32 ||
     231         304 :       LocVT == MVT::v2i64 ||
     232         384 :       LocVT == MVT::v4f32 ||
     233          80 :       LocVT == MVT::v2f64) {
     234             :     static const MCPhysReg RegList6[] = {
     235             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
     236             :     };
     237          72 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
     238         120 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     239          60 :       return false;
     240             :     }
     241             :   }
     242             : 
     243         152 :   if (LocVT == MVT::v8f32 ||
     244         120 :       LocVT == MVT::v4f64 ||
     245         212 :       LocVT == MVT::v8i32 ||
     246          60 :       LocVT == MVT::v4i64) {
     247             :     static const MCPhysReg RegList7[] = {
     248             :       X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
     249             :     };
     250          32 :     if (unsigned Reg = State.AllocateReg(RegList7)) {
     251          64 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     252          32 :       return false;
     253             :     }
     254             :   }
     255             : 
     256          92 :   if (LocVT == MVT::v16f32 ||
     257          64 :       LocVT == MVT::v8f64 ||
     258         116 :       LocVT == MVT::v16i32 ||
     259          24 :       LocVT == MVT::v8i64) {
     260             :     static const MCPhysReg RegList8[] = {
     261             :       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
     262             :     };
     263          36 :     if (unsigned Reg = State.AllocateReg(RegList8)) {
     264          72 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     265          36 :       return false;
     266             :     }
     267             :   }
     268             : 
     269          36 :   if (LocVT == MVT::v16i1 ||
     270          12 :       LocVT == MVT::v8i1) {
     271          12 :     if (unsigned Reg = State.AllocateReg(X86::K1)) {
     272          24 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     273          12 :       return false;
     274             :     }
     275             :   }
     276             : 
     277          16 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
     278           4 :     if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     279             :       return false;
     280             :   }
     281             : 
     282           8 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     283           4 :     if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     284             :       return false;
     285             :   }
     286             : 
     287           4 :   if (!CC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     288             :     return false;
     289             : 
     290           0 :   return true;  // CC didn't match.
     291             : }
     292             : 
     293             : 
     294      531389 : static bool CC_X86(unsigned ValNo, MVT ValVT,
     295             :                    MVT LocVT, CCValAssign::LocInfo LocInfo,
     296             :                    ISD::ArgFlagsTy ArgFlags, CCState &State) {
     297             : 
     298      531389 :   if (State.getCallingConv() == CallingConv::Intel_OCL_BI) {
     299         182 :     if (!CC_Intel_OCL_BI(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     300             :       return false;
     301             :   }
     302             : 
     303      531207 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     304      315889 :     if (!CC_X86_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     305             :       return false;
     306             :   }
     307             : 
     308      215519 :   if (!CC_X86_32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     309             :     return false;
     310             : 
     311           0 :   return true;  // CC didn't match.
     312             : }
     313             : 
     314             : 
     315      215519 : static bool CC_X86_32(unsigned ValNo, MVT ValVT,
     316             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
     317             :                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
     318             : 
     319      215519 :   if (State.getCallingConv() == CallingConv::X86_INTR) {
     320          15 :     if (!CC_X86_32_Intr(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     321             :       return false;
     322             :   }
     323             : 
     324      431008 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetMCU()) {
     325         125 :     if (!CC_X86_32_MCU(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     326             :       return false;
     327             :   }
     328             : 
     329      215379 :   if (State.getCallingConv() == CallingConv::X86_FastCall) {
     330         174 :     if (!CC_X86_32_FastCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     331             :       return false;
     332             :   }
     333             : 
     334      215205 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
     335         240 :     if (!CC_X86_Win32_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     336             :       return false;
     337             :   }
     338             : 
     339      214965 :   if (State.getCallingConv() == CallingConv::X86_ThisCall) {
     340         362 :     if (!CC_X86_32_ThisCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     341             :       return false;
     342             :   }
     343             : 
     344      214603 :   if (State.getCallingConv() == CallingConv::Fast) {
     345       48681 :     if (!CC_X86_32_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     346             :       return false;
     347             :   }
     348             : 
     349      165922 :   if (State.getCallingConv() == CallingConv::GHC) {
     350          20 :     if (!CC_X86_32_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     351             :       return false;
     352             :   }
     353             : 
     354      165902 :   if (State.getCallingConv() == CallingConv::HiPE) {
     355          42 :     if (!CC_X86_32_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     356             :       return false;
     357             :   }
     358             : 
     359      165860 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
     360         200 :     if (!CC_X86_32_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     361             :       return false;
     362             :   }
     363             : 
     364      165660 :   if (!CC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     365             :     return false;
     366             : 
     367           0 :   return true;  // CC didn't match.
     368             : }
     369             : 
     370             : 
     371      165664 : static bool CC_X86_32_C(unsigned ValNo, MVT ValVT,
     372             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
     373             :                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
     374             : 
     375      331326 :   if (LocVT == MVT::i1 ||
     376      316539 :       LocVT == MVT::i8 ||
     377      466646 :       LocVT == MVT::i16 ||
     378      150105 :       LocVT == MVT::v1i1) {
     379       15562 :     LocVT = MVT::i32;
     380       15562 :     if (ArgFlags.isSExt())
     381             :         LocInfo = CCValAssign::SExt;
     382       15447 :     else if (ArgFlags.isZExt())
     383             :         LocInfo = CCValAssign::ZExt;
     384             :     else
     385       12505 :         LocInfo = CCValAssign::AExt;
     386             :   }
     387             : 
     388      165664 :   if (ArgFlags.isNest()) {
     389           8 :     if (unsigned Reg = State.AllocateReg(X86::ECX)) {
     390          16 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     391           8 :       return false;
     392             :     }
     393             :   }
     394             : 
     395      165656 :   if (!State.isVarArg()) {
     396      164277 :     if (ArgFlags.isInReg()) {
     397         228 :       if (LocVT == MVT::i32) {
     398             :         static const MCPhysReg RegList1[] = {
     399             :           X86::EAX, X86::EDX, X86::ECX
     400             :         };
     401         204 :         if (unsigned Reg = State.AllocateReg(RegList1)) {
     402         408 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     403         204 :           return false;
     404             :         }
     405             :       }
     406             :     }
     407             :   }
     408             : 
     409      165452 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     410             :     return false;
     411             : 
     412           0 :   return true;  // CC didn't match.
     413             : }
     414             : 
     415             : 
     416      166063 : static bool CC_X86_32_Common(unsigned ValNo, MVT ValVT,
     417             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
     418             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
     419             : 
     420      166063 :   if (ArgFlags.isByVal()) {
     421         762 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     422         762 :     return false;
     423             :   }
     424             : 
     425      165301 :   if (!State.isVarArg()) {
     426      163917 :     if (ArgFlags.isInReg()) {
     427          86 :       if (LocVT == MVT::f32 ||
     428          41 :           LocVT == MVT::f64) {
     429          16 :         if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
     430             :           static const MCPhysReg RegList1[] = {
     431             :             X86::XMM0, X86::XMM1, X86::XMM2
     432             :           };
     433           0 :           if (unsigned Reg = State.AllocateReg(RegList1)) {
     434           0 :             State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     435           0 :             return false;
     436             :           }
     437             :         }
     438             :       }
     439             :     }
     440             :   }
     441             : 
     442      165301 :   if (!State.isVarArg()) {
     443      163917 :     if (LocVT == MVT::x86mmx) {
     444             :       static const MCPhysReg RegList2[] = {
     445             :         X86::MM0, X86::MM1, X86::MM2
     446             :       };
     447         219 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     448         438 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     449         219 :         return false;
     450             :       }
     451             :     }
     452             :   }
     453             : 
     454      173973 :   if (LocVT == MVT::i32 ||
     455        8891 :       LocVT == MVT::f32) {
     456      157037 :     unsigned Offset3 = State.AllocateStack(4, 4);
     457      314074 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
     458      157037 :     return false;
     459             :   }
     460             : 
     461        8045 :   if (LocVT == MVT::f64) {
     462         560 :     unsigned Offset4 = State.AllocateStack(8, 4);
     463        1120 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
     464         560 :     return false;
     465             :   }
     466             : 
     467        7485 :   if (LocVT == MVT::f80) {
     468         125 :     unsigned Offset5 = State.AllocateStack(
     469         375 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 4);
     470         250 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
     471         125 :     return false;
     472             :   }
     473             : 
     474        7360 :   if (LocVT == MVT::v2i1) {
     475           7 :     LocVT = MVT::v2i64;
     476           7 :     if (ArgFlags.isSExt())
     477             :         LocInfo = CCValAssign::SExt;
     478           7 :     else if (ArgFlags.isZExt())
     479             :         LocInfo = CCValAssign::ZExt;
     480             :     else
     481           7 :         LocInfo = CCValAssign::AExt;
     482             :   }
     483             : 
     484        7360 :   if (LocVT == MVT::v4i1) {
     485           7 :     LocVT = MVT::v4i32;
     486           7 :     if (ArgFlags.isSExt())
     487             :         LocInfo = CCValAssign::SExt;
     488           7 :     else if (ArgFlags.isZExt())
     489             :         LocInfo = CCValAssign::ZExt;
     490             :     else
     491           7 :         LocInfo = CCValAssign::AExt;
     492             :   }
     493             : 
     494        7360 :   if (LocVT == MVT::v8i1) {
     495          11 :     LocVT = MVT::v8i16;
     496          11 :     if (ArgFlags.isSExt())
     497             :         LocInfo = CCValAssign::SExt;
     498          11 :     else if (ArgFlags.isZExt())
     499             :         LocInfo = CCValAssign::ZExt;
     500             :     else
     501          11 :         LocInfo = CCValAssign::AExt;
     502             :   }
     503             : 
     504        7360 :   if (LocVT == MVT::v16i1) {
     505          25 :     LocVT = MVT::v16i8;
     506          25 :     if (ArgFlags.isSExt())
     507             :         LocInfo = CCValAssign::SExt;
     508          25 :     else if (ArgFlags.isZExt())
     509             :         LocInfo = CCValAssign::ZExt;
     510             :     else
     511          25 :         LocInfo = CCValAssign::AExt;
     512             :   }
     513             : 
     514        7360 :   if (LocVT == MVT::v32i1) {
     515           3 :     LocVT = MVT::v32i8;
     516           3 :     if (ArgFlags.isSExt())
     517             :         LocInfo = CCValAssign::SExt;
     518           3 :     else if (ArgFlags.isZExt())
     519             :         LocInfo = CCValAssign::ZExt;
     520             :     else
     521           3 :         LocInfo = CCValAssign::AExt;
     522             :   }
     523             : 
     524        7360 :   if (LocVT == MVT::v64i1) {
     525           0 :     LocVT = MVT::v64i8;
     526           0 :     if (ArgFlags.isSExt())
     527             :         LocInfo = CCValAssign::SExt;
     528           0 :     else if (ArgFlags.isZExt())
     529             :         LocInfo = CCValAssign::ZExt;
     530             :     else
     531           0 :         LocInfo = CCValAssign::AExt;
     532             :   }
     533             : 
     534        7360 :   if (LocVT == MVT::x86mmx) {
     535           0 :     unsigned Offset6 = State.AllocateStack(8, 4);
     536           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
     537           0 :     return false;
     538             :   }
     539             : 
     540        7360 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetDarwin()) {
     541        2141 :     if (!CC_X86_32_Vector_Darwin(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     542             :       return false;
     543             :   }
     544             : 
     545        5219 :   if (!CC_X86_32_Vector_Standard(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     546             :     return false;
     547             : 
     548           0 :   return true;  // CC didn't match.
     549             : }
     550             : 
     551             : 
     552       48681 : static bool CC_X86_32_FastCC(unsigned ValNo, MVT ValVT,
     553             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
     554             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
     555             : 
     556       48681 :   if (ArgFlags.isByVal()) {
     557          32 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     558          32 :     return false;
     559             :   }
     560             : 
     561       97298 :   if (LocVT == MVT::i1 ||
     562       97223 :       LocVT == MVT::i8 ||
     563      145796 :       LocVT == MVT::i16 ||
     564       48573 :       LocVT == MVT::v1i1) {
     565          76 :     LocVT = MVT::i32;
     566          76 :     if (ArgFlags.isSExt())
     567             :         LocInfo = CCValAssign::SExt;
     568          62 :     else if (ArgFlags.isZExt())
     569             :         LocInfo = CCValAssign::ZExt;
     570             :     else
     571           2 :         LocInfo = CCValAssign::AExt;
     572             :   }
     573             : 
     574       48649 :   if (ArgFlags.isNest()) {
     575           0 :     if (unsigned Reg = State.AllocateReg(X86::EAX)) {
     576           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     577           0 :       return false;
     578             :     }
     579             :   }
     580             : 
     581       48649 :   if (LocVT == MVT::i32) {
     582             :     static const MCPhysReg RegList1[] = {
     583             :       X86::ECX, X86::EDX
     584             :     };
     585       48628 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     586       96526 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     587       48263 :       return false;
     588             :     }
     589             :   }
     590             : 
     591         386 :   if (!State.isVarArg()) {
     592         768 :     if (LocVT == MVT::f32 ||
     593         382 :         LocVT == MVT::f64) {
     594          36 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
     595             :         static const MCPhysReg RegList2[] = {
     596             :           X86::XMM0, X86::XMM1, X86::XMM2
     597             :         };
     598           8 :         if (unsigned Reg = State.AllocateReg(RegList2)) {
     599          12 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     600           6 :           return false;
     601             :         }
     602             :       }
     603             :     }
     604             :   }
     605             : 
     606         380 :   if (LocVT == MVT::f64) {
     607           9 :     unsigned Offset3 = State.AllocateStack(8, 8);
     608          18 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
     609           9 :     return false;
     610             :   }
     611             : 
     612         371 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     613             :     return false;
     614             : 
     615           0 :   return true;  // CC didn't match.
     616             : }
     617             : 
     618             : 
     619         232 : static bool CC_X86_32_FastCall(unsigned ValNo, MVT ValVT,
     620             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
     621             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
     622             : 
     623         464 :   if (LocVT == MVT::i1 ||
     624         460 :       LocVT == MVT::i8 ||
     625         686 :       LocVT == MVT::i16 ||
     626         226 :       LocVT == MVT::v1i1) {
     627           6 :     LocVT = MVT::i32;
     628           6 :     if (ArgFlags.isSExt())
     629             :         LocInfo = CCValAssign::SExt;
     630           6 :     else if (ArgFlags.isZExt())
     631             :         LocInfo = CCValAssign::ZExt;
     632             :     else
     633           6 :         LocInfo = CCValAssign::AExt;
     634             :   }
     635             : 
     636         232 :   if (ArgFlags.isNest()) {
     637           0 :     if (unsigned Reg = State.AllocateReg(X86::EAX)) {
     638           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     639           0 :       return false;
     640             :     }
     641             :   }
     642             : 
     643         232 :   if (ArgFlags.isInReg()) {
     644         176 :     if (LocVT == MVT::i32) {
     645             :       static const MCPhysReg RegList1[] = {
     646             :         X86::ECX, X86::EDX
     647             :       };
     648         161 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
     649         310 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     650         155 :         return false;
     651             :       }
     652             :     }
     653             :   }
     654             : 
     655          77 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     656             :     return false;
     657             : 
     658           0 :   return true;  // CC didn't match.
     659             : }
     660             : 
     661             : 
     662          20 : static bool CC_X86_32_GHC(unsigned ValNo, MVT ValVT,
     663             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
     664             :                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
     665             : 
     666          40 :   if (LocVT == MVT::i8 ||
     667          20 :       LocVT == MVT::i16) {
     668           0 :     LocVT = MVT::i32;
     669           0 :     if (ArgFlags.isSExt())
     670             :         LocInfo = CCValAssign::SExt;
     671           0 :     else if (ArgFlags.isZExt())
     672             :         LocInfo = CCValAssign::ZExt;
     673             :     else
     674           0 :         LocInfo = CCValAssign::AExt;
     675             :   }
     676             : 
     677          20 :   if (LocVT == MVT::i32) {
     678             :     static const MCPhysReg RegList1[] = {
     679             :       X86::EBX, X86::EBP, X86::EDI, X86::ESI
     680             :     };
     681          20 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     682          40 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     683          20 :       return false;
     684             :     }
     685             :   }
     686             : 
     687             :   return true;  // CC didn't match.
     688             : }
     689             : 
     690             : 
     691          42 : static bool CC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
     692             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     693             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
     694             : 
     695          84 :   if (LocVT == MVT::i8 ||
     696          42 :       LocVT == MVT::i16) {
     697           0 :     LocVT = MVT::i32;
     698           0 :     if (ArgFlags.isSExt())
     699             :         LocInfo = CCValAssign::SExt;
     700           0 :     else if (ArgFlags.isZExt())
     701             :         LocInfo = CCValAssign::ZExt;
     702             :     else
     703           0 :         LocInfo = CCValAssign::AExt;
     704             :   }
     705             : 
     706          42 :   if (LocVT == MVT::i32) {
     707             :     static const MCPhysReg RegList1[] = {
     708             :       X86::ESI, X86::EBP, X86::EAX, X86::EDX, X86::ECX
     709             :     };
     710          42 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     711          82 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     712          41 :       return false;
     713             :     }
     714             :   }
     715             : 
     716           1 :   if (LocVT == MVT::i32 ||
     717           0 :       LocVT == MVT::f32) {
     718           1 :     unsigned Offset2 = State.AllocateStack(4, 4);
     719           2 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
     720           1 :     return false;
     721             :   }
     722             : 
     723             :   return true;  // CC didn't match.
     724             : }
     725             : 
     726             : 
     727          15 : static bool CC_X86_32_Intr(unsigned ValNo, MVT ValVT,
     728             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     729             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
     730             : 
     731          15 :   unsigned Offset1 = State.AllocateStack(4, 4);
     732          30 :   State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
     733             :   return false;
     734             : 
     735             :   return true;  // CC didn't match.
     736             : }
     737             : 
     738             : 
     739         125 : static bool CC_X86_32_MCU(unsigned ValNo, MVT ValVT,
     740             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
     741             :                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
     742             : 
     743         125 :   if (ArgFlags.isByVal()) {
     744           1 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     745           1 :     return false;
     746             :   }
     747             : 
     748         372 :   if (LocVT == MVT::i1 ||
     749         239 :       LocVT == MVT::i8 ||
     750         348 :       LocVT == MVT::i16 ||
     751         109 :       LocVT == MVT::v1i1) {
     752          15 :     LocVT = MVT::i32;
     753          15 :     if (ArgFlags.isSExt())
     754           0 :         LocInfo = CCValAssign::SExt;
     755          15 :     else if (ArgFlags.isZExt())
     756           3 :         LocInfo = CCValAssign::ZExt;
     757             :     else
     758          12 :         LocInfo = CCValAssign::AExt;
     759             :   }
     760             : 
     761         124 :   if (!State.isVarArg()) {
     762         246 :     if (LocVT == MVT::i32) {
     763         122 :       if (CC_X86_32_MCUInReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     764             :             return false;
     765             :     }
     766             :   }
     767             : 
     768           5 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     769             :     return false;
     770             : 
     771           0 :   return true;  // CC didn't match.
     772             : }
     773             : 
     774             : 
     775         200 : static bool CC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
     776             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     777             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
     778             : 
     779         200 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     780           0 :     if (ArgFlags.isByVal()) {
     781           0 :       State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
     782           0 :       return false;
     783             :     }
     784             :   }
     785             : 
     786         200 :   if (ArgFlags.isByVal()) {
     787           0 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     788           0 :     return false;
     789             :   }
     790             : 
     791         600 :   if (LocVT == MVT::i1 ||
     792         389 :       LocVT == MVT::i8 ||
     793         574 :       LocVT == MVT::i16 ||
     794         185 :       LocVT == MVT::v1i1) {
     795          15 :     LocVT = MVT::i32;
     796          15 :     if (ArgFlags.isSExt())
     797           2 :         LocInfo = CCValAssign::SExt;
     798          13 :     else if (ArgFlags.isZExt())
     799           0 :         LocInfo = CCValAssign::ZExt;
     800             :     else
     801          13 :         LocInfo = CCValAssign::AExt;
     802             :   }
     803             : 
     804         594 :   if (LocVT == MVT::v8i1 ||
     805         388 :       LocVT == MVT::v16i1 ||
     806         188 :       LocVT == MVT::v32i1) {
     807          18 :     LocVT = MVT::i32;
     808          18 :     if (ArgFlags.isSExt())
     809           0 :         LocInfo = CCValAssign::SExt;
     810          18 :     else if (ArgFlags.isZExt())
     811           0 :         LocInfo = CCValAssign::ZExt;
     812             :     else
     813          18 :         LocInfo = CCValAssign::AExt;
     814             :   }
     815             : 
     816         400 :   if (LocVT == MVT::i32) {
     817             :     static const MCPhysReg RegList1[] = {
     818             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
     819             :     };
     820          86 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     821         213 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     822          71 :       return false;
     823             :     }
     824             :   }
     825             : 
     826         258 :   if (LocVT == MVT::i64) {
     827           0 :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
     828           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     829           0 :       return false;
     830             :     }
     831             :   }
     832             : 
     833         129 :   if (LocVT == MVT::v64i1) {
     834          26 :     LocVT = MVT::i64;
     835          26 :     if (ArgFlags.isSExt())
     836           0 :         LocInfo = CCValAssign::SExt;
     837          26 :     else if (ArgFlags.isZExt())
     838           0 :         LocInfo = CCValAssign::ZExt;
     839             :     else
     840          26 :         LocInfo = CCValAssign::AExt;
     841             :   }
     842             : 
     843         129 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     844           0 :     if (LocVT == MVT::i64) {
     845           0 :       if (unsigned Reg = State.AllocateReg(X86::RAX)) {
     846           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     847           0 :         return false;
     848             :       }
     849             :     }
     850             :   }
     851             : 
     852         129 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
     853         258 :     if (LocVT == MVT::i64) {
     854          26 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     855             :             return false;
     856             :     }
     857             :   }
     858             : 
     859         370 :   if (LocVT == MVT::f32 ||
     860         240 :       LocVT == MVT::f64 ||
     861         115 :       LocVT == MVT::f128) {
     862          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
     863             :       static const MCPhysReg RegList2[] = {
     864             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
     865             :       };
     866          10 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     867          30 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     868          10 :         return false;
     869             :       }
     870             :     }
     871             :   }
     872             : 
     873         230 :   if (LocVT == MVT::f80) {
     874           3 :     if (unsigned Reg = State.AllocateReg(X86::FP0)) {
     875           9 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     876           3 :       return false;
     877             :     }
     878             :   }
     879             : 
     880         224 :   if (LocVT == MVT::v16i8 ||
     881         224 :       LocVT == MVT::v8i16 ||
     882         219 :       LocVT == MVT::v4i32 ||
     883         214 :       LocVT == MVT::v2i64 ||
     884         290 :       LocVT == MVT::v4f32 ||
     885          71 :       LocVT == MVT::v2f64) {
     886          82 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
     887             :       static const MCPhysReg RegList3[] = {
     888             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
     889             :       };
     890          41 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
     891          63 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     892          21 :         return false;
     893             :       }
     894             :     }
     895             :   }
     896             : 
     897         273 :   if (LocVT == MVT::v32i8 ||
     898         182 :       LocVT == MVT::v16i16 ||
     899         177 :       LocVT == MVT::v8i32 ||
     900         172 :       LocVT == MVT::v4i64 ||
     901         263 :       LocVT == MVT::v8f32 ||
     902          86 :       LocVT == MVT::v4f64) {
     903          10 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
     904             :       static const MCPhysReg RegList4[] = {
     905             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
     906             :       };
     907           5 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
     908          15 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     909           5 :         return false;
     910             :       }
     911             :     }
     912             :   }
     913             : 
     914         258 :   if (LocVT == MVT::v64i8 ||
     915         172 :       LocVT == MVT::v32i16 ||
     916         167 :       LocVT == MVT::v16i32 ||
     917         162 :       LocVT == MVT::v8i64 ||
     918         224 :       LocVT == MVT::v16f32 ||
     919          57 :       LocVT == MVT::v8f64) {
     920          58 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
     921             :       static const MCPhysReg RegList5[] = {
     922             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
     923             :       };
     924          29 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
     925          57 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     926          19 :         return false;
     927             :       }
     928             :     }
     929             :   }
     930             : 
     931          67 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     932           0 :     if (LocVT == MVT::i32 ||
     933           0 :         LocVT == MVT::i64 ||
     934           0 :         LocVT == MVT::f32 ||
     935           0 :         LocVT == MVT::f64) {
     936           0 :       unsigned Offset6 = State.AllocateStack(8, 8);
     937           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
     938           0 :       return false;
     939             :     }
     940             :   }
     941             : 
     942         186 :   if (LocVT == MVT::i32 ||
     943          52 :       LocVT == MVT::f32) {
     944          15 :     unsigned Offset7 = State.AllocateStack(4, 4);
     945          45 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
     946          15 :     return false;
     947             :   }
     948             : 
     949          82 :   if (LocVT == MVT::i64 ||
     950          30 :       LocVT == MVT::f64) {
     951          22 :     unsigned Offset8 = State.AllocateStack(8, 4);
     952          66 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
     953          22 :     return false;
     954             :   }
     955             : 
     956          30 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     957           0 :     if (LocVT == MVT::x86mmx) {
     958           0 :       unsigned Offset9 = State.AllocateStack(8, 8);
     959           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
     960           0 :       return false;
     961             :     }
     962             :   }
     963             : 
     964          30 :   if (LocVT == MVT::x86mmx) {
     965           0 :     unsigned Offset10 = State.AllocateStack(8, 4);
     966           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
     967           0 :     return false;
     968             :   }
     969             : 
     970          60 :   if (LocVT == MVT::f80 ||
     971          30 :       LocVT == MVT::f128) {
     972           0 :     unsigned Offset11 = State.AllocateStack(
     973           0 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
     974           0 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
     975           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
     976           0 :     return false;
     977             :   }
     978             : 
     979          60 :   if (LocVT == MVT::v16i8 ||
     980          60 :       LocVT == MVT::v8i16 ||
     981          60 :       LocVT == MVT::v4i32 ||
     982          60 :       LocVT == MVT::v2i64 ||
     983          70 :       LocVT == MVT::v4f32 ||
     984          10 :       LocVT == MVT::v2f64) {
     985          20 :     unsigned Offset12 = State.AllocateStack(16, 16);
     986          60 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
     987          20 :     return false;
     988             :   }
     989             : 
     990          20 :   if (LocVT == MVT::v32i8 ||
     991          20 :       LocVT == MVT::v16i16 ||
     992          20 :       LocVT == MVT::v8i32 ||
     993          20 :       LocVT == MVT::v4i64 ||
     994          30 :       LocVT == MVT::v8f32 ||
     995          10 :       LocVT == MVT::v4f64) {
     996           0 :     unsigned Offset13 = State.AllocateStack(32, 32);
     997           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
     998           0 :     return false;
     999             :   }
    1000             : 
    1001          20 :   if (LocVT == MVT::v16i32 ||
    1002          20 :       LocVT == MVT::v8i64 ||
    1003          20 :       LocVT == MVT::v16f32 ||
    1004           0 :       LocVT == MVT::v8f64) {
    1005          10 :     unsigned Offset14 = State.AllocateStack(64, 64);
    1006          30 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
    1007          10 :     return false;
    1008             :   }
    1009             : 
    1010             :   return true;  // CC didn't match.
    1011             : }
    1012             : 
    1013             : 
    1014         362 : static bool CC_X86_32_ThisCall(unsigned ValNo, MVT ValVT,
    1015             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
    1016             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1017             : 
    1018         362 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetCygMing()) {
    1019          40 :     if (!CC_X86_32_ThisCall_Mingw(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1020             :       return false;
    1021             :   }
    1022             : 
    1023         322 :   if (!CC_X86_32_ThisCall_Win(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1024             :     return false;
    1025             : 
    1026           0 :   return true;  // CC didn't match.
    1027             : }
    1028             : 
    1029             : 
    1030         338 : static bool CC_X86_32_ThisCall_Common(unsigned ValNo, MVT ValVT,
    1031             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    1032             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1033             : 
    1034         676 :   if (LocVT == MVT::i32) {
    1035         180 :     if (unsigned Reg = State.AllocateReg(X86::ECX)) {
    1036         360 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1037         180 :       return false;
    1038             :     }
    1039             :   }
    1040             : 
    1041         158 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1042             :     return false;
    1043             : 
    1044           0 :   return true;  // CC didn't match.
    1045             : }
    1046             : 
    1047             : 
    1048          40 : static bool CC_X86_32_ThisCall_Mingw(unsigned ValNo, MVT ValVT,
    1049             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
    1050             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1051             : 
    1052          80 :   if (LocVT == MVT::i1 ||
    1053          80 :       LocVT == MVT::i8 ||
    1054         120 :       LocVT == MVT::i16 ||
    1055          40 :       LocVT == MVT::v1i1) {
    1056           0 :     LocVT = MVT::i32;
    1057           0 :     if (ArgFlags.isSExt())
    1058             :         LocInfo = CCValAssign::SExt;
    1059           0 :     else if (ArgFlags.isZExt())
    1060             :         LocInfo = CCValAssign::ZExt;
    1061             :     else
    1062           0 :         LocInfo = CCValAssign::AExt;
    1063             :   }
    1064             : 
    1065          40 :   if (!CC_X86_32_ThisCall_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1066             :     return false;
    1067             : 
    1068           0 :   return true;  // CC didn't match.
    1069             : }
    1070             : 
    1071             : 
    1072         322 : static bool CC_X86_32_ThisCall_Win(unsigned ValNo, MVT ValVT,
    1073             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
    1074             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1075             : 
    1076         644 :   if (LocVT == MVT::i1 ||
    1077         643 :       LocVT == MVT::i8 ||
    1078         964 :       LocVT == MVT::i16 ||
    1079         321 :       LocVT == MVT::v1i1) {
    1080           1 :     LocVT = MVT::i32;
    1081           1 :     if (ArgFlags.isSExt())
    1082             :         LocInfo = CCValAssign::SExt;
    1083           1 :     else if (ArgFlags.isZExt())
    1084             :         LocInfo = CCValAssign::ZExt;
    1085             :     else
    1086           1 :         LocInfo = CCValAssign::AExt;
    1087             :   }
    1088             : 
    1089         322 :   if (ArgFlags.isSRet()) {
    1090          24 :     unsigned Offset1 = State.AllocateStack(4, 4);
    1091          48 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1092          24 :     return false;
    1093             :   }
    1094             : 
    1095         298 :   if (!CC_X86_32_ThisCall_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1096             :     return false;
    1097             : 
    1098           0 :   return true;  // CC didn't match.
    1099             : }
    1100             : 
    1101             : 
    1102         175 : static bool CC_X86_32_Vector_Common(unsigned ValNo, MVT ValVT,
    1103             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    1104             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1105             : 
    1106         348 :   if (LocVT == MVT::v16i8 ||
    1107         338 :       LocVT == MVT::v8i16 ||
    1108         314 :       LocVT == MVT::v4i32 ||
    1109         289 :       LocVT == MVT::v2i64 ||
    1110         390 :       LocVT == MVT::v4f32 ||
    1111          75 :       LocVT == MVT::v2f64) {
    1112         118 :     unsigned Offset1 = State.AllocateStack(16, 16);
    1113         236 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1114             :     return false;
    1115             :   }
    1116             : 
    1117         112 :   if (LocVT == MVT::v32i8 ||
    1118         108 :       LocVT == MVT::v16i16 ||
    1119          99 :       LocVT == MVT::v8i32 ||
    1120          89 :       LocVT == MVT::v4i64 ||
    1121         125 :       LocVT == MVT::v8f32 ||
    1122          25 :       LocVT == MVT::v4f64) {
    1123          42 :     unsigned Offset2 = State.AllocateStack(32, 32);
    1124          84 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
    1125             :     return false;
    1126             :   }
    1127             : 
    1128          28 :   if (LocVT == MVT::v64i8 ||
    1129          24 :       LocVT == MVT::v32i16 ||
    1130          21 :       LocVT == MVT::v16i32 ||
    1131          16 :       LocVT == MVT::v8i64 ||
    1132          26 :       LocVT == MVT::v16f32 ||
    1133           5 :       LocVT == MVT::v8f64) {
    1134          15 :     unsigned Offset3 = State.AllocateStack(64, 64);
    1135          30 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
    1136             :     return false;
    1137             :   }
    1138             : 
    1139             :   return true;  // CC didn't match.
    1140             : }
    1141             : 
    1142             : 
    1143        2141 : static bool CC_X86_32_Vector_Darwin(unsigned ValNo, MVT ValVT,
    1144             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    1145             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1146             : 
    1147        2141 :   if (!State.isVarArg()) {
    1148        4049 :     if (LocVT == MVT::v16i8 ||
    1149        3604 :         LocVT == MVT::v8i16 ||
    1150        3136 :         LocVT == MVT::v4i32 ||
    1151        2715 :         LocVT == MVT::v2i64 ||
    1152        4282 :         LocVT == MVT::v4f32 ||
    1153         866 :         LocVT == MVT::v2f64) {
    1154             :       static const MCPhysReg RegList1[] = {
    1155             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    1156             :       };
    1157        1541 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
    1158        3066 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1159             :         return false;
    1160             :       }
    1161             :     }
    1162             :   }
    1163             : 
    1164         608 :   if (!State.isVarArg()) {
    1165        1124 :     if (LocVT == MVT::v32i8 ||
    1166         896 :         LocVT == MVT::v16i16 ||
    1167         610 :         LocVT == MVT::v8i32 ||
    1168         398 :         LocVT == MVT::v4i64 ||
    1169         855 :         LocVT == MVT::v8f32 ||
    1170          79 :         LocVT == MVT::v4f64) {
    1171        1174 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasFp256()) {
    1172             :         static const MCPhysReg RegList2[] = {
    1173             :           X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
    1174             :         };
    1175         587 :         if (unsigned Reg = State.AllocateReg(RegList2)) {
    1176        1134 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1177             :           return false;
    1178             :         }
    1179             :       }
    1180             :     }
    1181             :   }
    1182             : 
    1183          41 :   if (!State.isVarArg()) {
    1184          82 :     if (LocVT == MVT::v64i8 ||
    1185          82 :         LocVT == MVT::v32i16 ||
    1186          76 :         LocVT == MVT::v16i32 ||
    1187          70 :         LocVT == MVT::v8i64 ||
    1188         104 :         LocVT == MVT::v16f32 ||
    1189          28 :         LocVT == MVT::v8f64) {
    1190             :       static const MCPhysReg RegList3[] = {
    1191             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
    1192             :       };
    1193          13 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1194          26 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1195             :         return false;
    1196             :       }
    1197             :     }
    1198             :   }
    1199             : 
    1200          28 :   if (!CC_X86_32_Vector_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1201             :     return false;
    1202             : 
    1203             :   return true;  // CC didn't match.
    1204             : }
    1205             : 
    1206             : 
    1207        5219 : static bool CC_X86_32_Vector_Standard(unsigned ValNo, MVT ValVT,
    1208             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    1209             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1210             : 
    1211        5219 :   if (!State.isVarArg()) {
    1212       10226 :     if (LocVT == MVT::v16i8 ||
    1213        9796 :         LocVT == MVT::v8i16 ||
    1214        9206 :         LocVT == MVT::v4i32 ||
    1215        8074 :         LocVT == MVT::v2i64 ||
    1216       11903 :         LocVT == MVT::v4f32 ||
    1217        3031 :         LocVT == MVT::v2f64) {
    1218             :       static const MCPhysReg RegList1[] = {
    1219             :         X86::XMM0, X86::XMM1, X86::XMM2
    1220             :       };
    1221        2586 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
    1222        4956 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1223             :         return false;
    1224             :       }
    1225             :     }
    1226             :   }
    1227             : 
    1228        2741 :   if (!State.isVarArg()) {
    1229        5304 :     if (LocVT == MVT::v32i8 ||
    1230        4990 :         LocVT == MVT::v16i16 ||
    1231        4667 :         LocVT == MVT::v8i32 ||
    1232        4053 :         LocVT == MVT::v4i64 ||
    1233        6005 :         LocVT == MVT::v8f32 ||
    1234        1455 :         LocVT == MVT::v4f64) {
    1235        3094 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasFp256()) {
    1236             :         static const MCPhysReg RegList2[] = {
    1237             :           X86::YMM0, X86::YMM1, X86::YMM2
    1238             :         };
    1239        1547 :         if (unsigned Reg = State.AllocateReg(RegList2)) {
    1240        3050 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1241             :           return false;
    1242             :         }
    1243             :       }
    1244             :     }
    1245             :   }
    1246             : 
    1247        1216 :   if (!State.isVarArg()) {
    1248        2334 :     if (LocVT == MVT::v64i8 ||
    1249        1993 :         LocVT == MVT::v32i16 ||
    1250        1618 :         LocVT == MVT::v16i32 ||
    1251        1218 :         LocVT == MVT::v8i64 ||
    1252        2070 :         LocVT == MVT::v16f32 ||
    1253         383 :         LocVT == MVT::v8f64) {
    1254             :       static const MCPhysReg RegList3[] = {
    1255             :         X86::ZMM0, X86::ZMM1, X86::ZMM2
    1256             :       };
    1257        1084 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1258        2138 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1259             :         return false;
    1260             :       }
    1261             :     }
    1262             :   }
    1263             : 
    1264         147 :   if (!CC_X86_32_Vector_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1265             :     return false;
    1266             : 
    1267             :   return true;  // CC didn't match.
    1268             : }
    1269             : 
    1270             : 
    1271      315889 : static bool CC_X86_64(unsigned ValNo, MVT ValVT,
    1272             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    1273             :                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1274             : 
    1275      315889 :   if (State.getCallingConv() == CallingConv::GHC) {
    1276          62 :     if (!CC_X86_64_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1277             :       return false;
    1278             :   }
    1279             : 
    1280      315827 :   if (State.getCallingConv() == CallingConv::HiPE) {
    1281          42 :     if (!CC_X86_64_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1282             :       return false;
    1283             :   }
    1284             : 
    1285      315785 :   if (State.getCallingConv() == CallingConv::WebKit_JS) {
    1286          69 :     if (!CC_X86_64_WebKit_JS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1287             :       return false;
    1288             :   }
    1289             : 
    1290      315716 :   if (State.getCallingConv() == CallingConv::AnyReg) {
    1291           0 :     if (!CC_X86_64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1292             :       return false;
    1293             :   }
    1294             : 
    1295      315716 :   if (State.getCallingConv() == CallingConv::Win64) {
    1296          54 :     if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1297             :       return false;
    1298             :   }
    1299             : 
    1300      315662 :   if (State.getCallingConv() == CallingConv::X86_64_SysV) {
    1301          22 :     if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1302             :       return false;
    1303             :   }
    1304             : 
    1305      315640 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
    1306         152 :     if (!CC_X86_Win64_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1307             :       return false;
    1308             :   }
    1309             : 
    1310      315488 :   if (State.getCallingConv() == CallingConv::HHVM) {
    1311         112 :     if (!CC_X86_64_HHVM(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1312             :       return false;
    1313             :   }
    1314             : 
    1315      315376 :   if (State.getCallingConv() == CallingConv::HHVM_C) {
    1316          25 :     if (!CC_X86_64_HHVM_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1317             :       return false;
    1318             :   }
    1319             : 
    1320      315351 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    1321         575 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    1322         195 :       if (!CC_X86_Win64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1323             :         return false;
    1324             :     }
    1325             :   }
    1326             : 
    1327      315156 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    1328         185 :     if (!CC_X86_SysV64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1329             :       return false;
    1330             :   }
    1331             : 
    1332      314971 :   if (State.getCallingConv() == CallingConv::X86_INTR) {
    1333          19 :     if (!CC_X86_64_Intr(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1334             :       return false;
    1335             :   }
    1336             : 
    1337      316983 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    1338        2031 :     if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1339             :       return false;
    1340             :   }
    1341             : 
    1342      312930 :   if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1343             :     return false;
    1344             : 
    1345         201 :   return true;  // CC didn't match.
    1346             : }
    1347             : 
    1348             : 
    1349             : static bool CC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
    1350             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
    1351             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1352             : 
    1353           0 :   if (CC_X86_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1354             :     return false;
    1355             : 
    1356             :   return true;  // CC didn't match.
    1357             : }
    1358             : 
    1359             : 
    1360      312976 : static bool CC_X86_64_C(unsigned ValNo, MVT ValVT,
    1361             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
    1362             :                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1363             : 
    1364      312976 :   if (ArgFlags.isByVal()) {
    1365          84 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
    1366          84 :     return false;
    1367             :   }
    1368             : 
    1369      625782 :   if (LocVT == MVT::i1 ||
    1370      610098 :       LocVT == MVT::i8 ||
    1371      905396 :       LocVT == MVT::i16 ||
    1372      295296 :       LocVT == MVT::v1i1) {
    1373       17603 :     LocVT = MVT::i32;
    1374       17603 :     if (ArgFlags.isSExt())
    1375             :         LocInfo = CCValAssign::SExt;
    1376       17394 :     else if (ArgFlags.isZExt())
    1377             :         LocInfo = CCValAssign::ZExt;
    1378             :     else
    1379       15660 :         LocInfo = CCValAssign::AExt;
    1380             :   }
    1381             : 
    1382      312892 :   if (ArgFlags.isNest()) {
    1383          11 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTarget64BitILP32()) {
    1384           2 :       if (unsigned Reg = State.AllocateReg(X86::R10D)) {
    1385           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1386           2 :         return false;
    1387             :       }
    1388             :     }
    1389             :   }
    1390             : 
    1391      312890 :   if (ArgFlags.isNest()) {
    1392           9 :     if (unsigned Reg = State.AllocateReg(X86::R10)) {
    1393          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1394           9 :       return false;
    1395             :     }
    1396             :   }
    1397             : 
    1398      312881 :   if (ArgFlags.isSwiftSelf()) {
    1399          40 :     if (LocVT == MVT::i64) {
    1400          40 :       if (unsigned Reg = State.AllocateReg(X86::R13)) {
    1401          80 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1402          40 :         return false;
    1403             :       }
    1404             :     }
    1405             :   }
    1406             : 
    1407      312841 :   if (ArgFlags.isSwiftError()) {
    1408          74 :     if (LocVT == MVT::i64) {
    1409          74 :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    1410         148 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1411          74 :         return false;
    1412             :       }
    1413             :     }
    1414             :   }
    1415             : 
    1416      312767 :   if (State.getCallingConv() == CallingConv::Swift) {
    1417         134 :     if (ArgFlags.isSRet()) {
    1418           6 :       if (LocVT == MVT::i64) {
    1419           6 :         if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    1420          12 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1421           6 :           return false;
    1422             :         }
    1423             :       }
    1424             :     }
    1425             :   }
    1426             : 
    1427      312761 :   if (LocVT == MVT::i32) {
    1428             :     static const MCPhysReg RegList1[] = {
    1429             :       X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
    1430             :     };
    1431       72967 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1432      144308 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1433       72154 :       return false;
    1434             :     }
    1435             :   }
    1436             : 
    1437      240607 :   if (LocVT == MVT::i64) {
    1438             :     static const MCPhysReg RegList2[] = {
    1439             :       X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
    1440             :     };
    1441      171921 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    1442      340756 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1443      170378 :       return false;
    1444             :     }
    1445             :   }
    1446             : 
    1447       70229 :   if (LocVT == MVT::x86mmx) {
    1448         209 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetDarwin()) {
    1449          24 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    1450          12 :         LocVT = MVT::v2i64;
    1451          12 :         if (ArgFlags.isSExt())
    1452             :                 LocInfo = CCValAssign::SExt;
    1453          12 :         else if (ArgFlags.isZExt())
    1454             :                 LocInfo = CCValAssign::ZExt;
    1455             :         else
    1456          12 :                 LocInfo = CCValAssign::AExt;
    1457             :       }
    1458             :     }
    1459             :   }
    1460             : 
    1461       70229 :   if (LocVT == MVT::v2i1) {
    1462          32 :     LocVT = MVT::v2i64;
    1463          32 :     if (ArgFlags.isSExt())
    1464             :         LocInfo = CCValAssign::SExt;
    1465          32 :     else if (ArgFlags.isZExt())
    1466             :         LocInfo = CCValAssign::ZExt;
    1467             :     else
    1468          32 :         LocInfo = CCValAssign::AExt;
    1469             :   }
    1470             : 
    1471       70229 :   if (LocVT == MVT::v4i1) {
    1472          49 :     LocVT = MVT::v4i32;
    1473          49 :     if (ArgFlags.isSExt())
    1474             :         LocInfo = CCValAssign::SExt;
    1475          49 :     else if (ArgFlags.isZExt())
    1476             :         LocInfo = CCValAssign::ZExt;
    1477             :     else
    1478          49 :         LocInfo = CCValAssign::AExt;
    1479             :   }
    1480             : 
    1481       70229 :   if (LocVT == MVT::v8i1) {
    1482          94 :     LocVT = MVT::v8i16;
    1483          94 :     if (ArgFlags.isSExt())
    1484             :         LocInfo = CCValAssign::SExt;
    1485          94 :     else if (ArgFlags.isZExt())
    1486             :         LocInfo = CCValAssign::ZExt;
    1487             :     else
    1488          94 :         LocInfo = CCValAssign::AExt;
    1489             :   }
    1490             : 
    1491       70229 :   if (LocVT == MVT::v16i1) {
    1492         124 :     LocVT = MVT::v16i8;
    1493         124 :     if (ArgFlags.isSExt())
    1494             :         LocInfo = CCValAssign::SExt;
    1495         124 :     else if (ArgFlags.isZExt())
    1496             :         LocInfo = CCValAssign::ZExt;
    1497             :     else
    1498         124 :         LocInfo = CCValAssign::AExt;
    1499             :   }
    1500             : 
    1501       70229 :   if (LocVT == MVT::v32i1) {
    1502          24 :     LocVT = MVT::v32i8;
    1503          24 :     if (ArgFlags.isSExt())
    1504             :         LocInfo = CCValAssign::SExt;
    1505          24 :     else if (ArgFlags.isZExt())
    1506             :         LocInfo = CCValAssign::ZExt;
    1507             :     else
    1508          24 :         LocInfo = CCValAssign::AExt;
    1509             :   }
    1510             : 
    1511       70229 :   if (LocVT == MVT::v64i1) {
    1512           5 :     LocVT = MVT::v64i8;
    1513           5 :     if (ArgFlags.isSExt())
    1514             :         LocInfo = CCValAssign::SExt;
    1515           5 :     else if (ArgFlags.isZExt())
    1516             :         LocInfo = CCValAssign::ZExt;
    1517             :     else
    1518           5 :         LocInfo = CCValAssign::AExt;
    1519             :   }
    1520             : 
    1521      138472 :   if (LocVT == MVT::f32 ||
    1522      134447 :       LocVT == MVT::f64 ||
    1523      131974 :       LocVT == MVT::f128 ||
    1524      126903 :       LocVT == MVT::v16i8 ||
    1525      116532 :       LocVT == MVT::v8i16 ||
    1526      103390 :       LocVT == MVT::v4i32 ||
    1527       88287 :       LocVT == MVT::v2i64 ||
    1528      144555 :       LocVT == MVT::v4f32 ||
    1529       34030 :       LocVT == MVT::v2f64) {
    1530       80252 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1531             :       static const MCPhysReg RegList3[] = {
    1532             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
    1533             :       };
    1534       40120 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1535       76692 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1536       38346 :         return false;
    1537             :       }
    1538             :     }
    1539             :   }
    1540             : 
    1541       31883 :   if (!State.isVarArg()) {
    1542       60992 :     if (LocVT == MVT::v32i8 ||
    1543       54960 :         LocVT == MVT::v16i16 ||
    1544       48391 :         LocVT == MVT::v8i32 ||
    1545       41670 :         LocVT == MVT::v4i64 ||
    1546       66404 :         LocVT == MVT::v8f32 ||
    1547       15533 :         LocVT == MVT::v4f64) {
    1548       38662 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasFp256()) {
    1549             :         static const MCPhysReg RegList4[] = {
    1550             :           X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
    1551             :         };
    1552       19331 :         if (unsigned Reg = State.AllocateReg(RegList4)) {
    1553       38574 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1554       19287 :           return false;
    1555             :         }
    1556             :       }
    1557             :     }
    1558             :   }
    1559             : 
    1560       12596 :   if (!State.isVarArg()) {
    1561       24622 :     if (LocVT == MVT::v64i8 ||
    1562       23548 :         LocVT == MVT::v32i16 ||
    1563       21113 :         LocVT == MVT::v16i32 ||
    1564       17121 :         LocVT == MVT::v8i64 ||
    1565       25871 :         LocVT == MVT::v16f32 ||
    1566        5887 :         LocVT == MVT::v8f64) {
    1567       16120 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    1568             :         static const MCPhysReg RegList5[] = {
    1569             :           X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
    1570             :         };
    1571        8060 :         if (unsigned Reg = State.AllocateReg(RegList5)) {
    1572       16112 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1573        8056 :           return false;
    1574             :         }
    1575             :       }
    1576             :     }
    1577             :   }
    1578             : 
    1579        8267 :   if (LocVT == MVT::i32 ||
    1580        5911 :       LocVT == MVT::i64 ||
    1581        8854 :       LocVT == MVT::f32 ||
    1582        2130 :       LocVT == MVT::f64) {
    1583        2412 :     unsigned Offset6 = State.AllocateStack(8, 8);
    1584        4824 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
    1585        2412 :     return false;
    1586             :   }
    1587             : 
    1588        4098 :   if (LocVT == MVT::f80 ||
    1589        1970 :       LocVT == MVT::f128) {
    1590         556 :     unsigned Offset7 = State.AllocateStack(
    1591         834 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    1592        1112 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    1593         556 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
    1594         278 :     return false;
    1595             :   }
    1596             : 
    1597        3656 :   if (LocVT == MVT::v16i8 ||
    1598        3588 :       LocVT == MVT::v8i16 ||
    1599        3492 :       LocVT == MVT::v4i32 ||
    1600        2084 :       LocVT == MVT::v2i64 ||
    1601        2562 :       LocVT == MVT::v4f32 ||
    1602         338 :       LocVT == MVT::v2f64) {
    1603        1604 :     unsigned Offset8 = State.AllocateStack(16, 16);
    1604        3208 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
    1605        1604 :     return false;
    1606             :   }
    1607             : 
    1608         492 :   if (LocVT == MVT::v32i8 ||
    1609         492 :       LocVT == MVT::v16i16 ||
    1610         492 :       LocVT == MVT::v8i32 ||
    1611         468 :       LocVT == MVT::v4i64 ||
    1612         685 :       LocVT == MVT::v8f32 ||
    1613         217 :       LocVT == MVT::v4f64) {
    1614          45 :     unsigned Offset9 = State.AllocateStack(32, 32);
    1615          90 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    1616          45 :     return false;
    1617             :   }
    1618             : 
    1619         402 :   if (LocVT == MVT::v16i32 ||
    1620         402 :       LocVT == MVT::v8i64 ||
    1621         603 :       LocVT == MVT::v16f32 ||
    1622         201 :       LocVT == MVT::v8f64) {
    1623           0 :     unsigned Offset10 = State.AllocateStack(64, 64);
    1624           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    1625           0 :     return false;
    1626             :   }
    1627             : 
    1628             :   return true;  // CC didn't match.
    1629             : }
    1630             : 
    1631             : 
    1632          62 : static bool CC_X86_64_GHC(unsigned ValNo, MVT ValVT,
    1633             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
    1634             :                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1635             : 
    1636         124 :   if (LocVT == MVT::i8 ||
    1637         124 :       LocVT == MVT::i16 ||
    1638          62 :       LocVT == MVT::i32) {
    1639           0 :     LocVT = MVT::i64;
    1640           0 :     if (ArgFlags.isSExt())
    1641             :         LocInfo = CCValAssign::SExt;
    1642           0 :     else if (ArgFlags.isZExt())
    1643             :         LocInfo = CCValAssign::ZExt;
    1644             :     else
    1645           0 :         LocInfo = CCValAssign::AExt;
    1646             :   }
    1647             : 
    1648          62 :   if (LocVT == MVT::i64) {
    1649             :     static const MCPhysReg RegList1[] = {
    1650             :       X86::R13, X86::RBP, X86::R12, X86::RBX, X86::R14, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R15
    1651             :     };
    1652          56 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1653         112 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1654          56 :       return false;
    1655             :     }
    1656             :   }
    1657             : 
    1658           8 :   if (LocVT == MVT::f32 ||
    1659           2 :       LocVT == MVT::f64 ||
    1660           0 :       LocVT == MVT::v16i8 ||
    1661           0 :       LocVT == MVT::v8i16 ||
    1662           0 :       LocVT == MVT::v4i32 ||
    1663           0 :       LocVT == MVT::v2i64 ||
    1664           6 :       LocVT == MVT::v4f32 ||
    1665           0 :       LocVT == MVT::v2f64) {
    1666          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1667             :       static const MCPhysReg RegList2[] = {
    1668             :         X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
    1669             :       };
    1670           6 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
    1671          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1672           6 :         return false;
    1673             :       }
    1674             :     }
    1675             :   }
    1676             : 
    1677           0 :   if (LocVT == MVT::v32i8 ||
    1678           0 :       LocVT == MVT::v16i16 ||
    1679           0 :       LocVT == MVT::v8i32 ||
    1680           0 :       LocVT == MVT::v4i64 ||
    1681           0 :       LocVT == MVT::v8f32 ||
    1682           0 :       LocVT == MVT::v4f64) {
    1683           0 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    1684             :       static const MCPhysReg RegList3[] = {
    1685             :         X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6
    1686             :       };
    1687           0 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1688           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1689           0 :         return false;
    1690             :       }
    1691             :     }
    1692             :   }
    1693             : 
    1694           0 :   if (LocVT == MVT::v64i8 ||
    1695           0 :       LocVT == MVT::v32i16 ||
    1696           0 :       LocVT == MVT::v16i32 ||
    1697           0 :       LocVT == MVT::v8i64 ||
    1698           0 :       LocVT == MVT::v16f32 ||
    1699           0 :       LocVT == MVT::v8f64) {
    1700           0 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    1701             :       static const MCPhysReg RegList4[] = {
    1702             :         X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6
    1703             :       };
    1704           0 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
    1705           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1706           0 :         return false;
    1707             :       }
    1708             :     }
    1709             :   }
    1710             : 
    1711             :   return true;  // CC didn't match.
    1712             : }
    1713             : 
    1714             : 
    1715         112 : static bool CC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
    1716             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    1717             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1718             : 
    1719         224 :   if (LocVT == MVT::i64) {
    1720             :     static const MCPhysReg RegList1[] = {
    1721             :       X86::RBX, X86::R12, X86::RBP, X86::R15, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11, X86::R13, X86::R14
    1722             :     };
    1723         112 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1724         224 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1725             :       return false;
    1726             :     }
    1727             :   }
    1728             : 
    1729             :   return true;  // CC didn't match.
    1730             : }
    1731             : 
    1732             : 
    1733          25 : static bool CC_X86_64_HHVM_C(unsigned ValNo, MVT ValVT,
    1734             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
    1735             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1736             : 
    1737          50 :   if (LocVT == MVT::i64) {
    1738           5 :     if (unsigned Reg = State.AllocateReg(X86::RBP)) {
    1739          10 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1740           5 :       return false;
    1741             :     }
    1742             :   }
    1743             : 
    1744          20 :   if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1745             :     return false;
    1746             : 
    1747           0 :   return true;  // CC didn't match.
    1748             : }
    1749             : 
    1750             : 
    1751          42 : static bool CC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
    1752             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    1753             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1754             : 
    1755          84 :   if (LocVT == MVT::i8 ||
    1756          84 :       LocVT == MVT::i16 ||
    1757          42 :       LocVT == MVT::i32) {
    1758           6 :     LocVT = MVT::i64;
    1759           6 :     if (ArgFlags.isSExt())
    1760             :         LocInfo = CCValAssign::SExt;
    1761           6 :     else if (ArgFlags.isZExt())
    1762             :         LocInfo = CCValAssign::ZExt;
    1763             :     else
    1764           6 :         LocInfo = CCValAssign::AExt;
    1765             :   }
    1766             : 
    1767          42 :   if (LocVT == MVT::i64) {
    1768             :     static const MCPhysReg RegList1[] = {
    1769             :       X86::R15, X86::RBP, X86::RSI, X86::RDX, X86::RCX, X86::R8
    1770             :     };
    1771          42 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1772          82 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1773          41 :       return false;
    1774             :     }
    1775             :   }
    1776             : 
    1777           2 :   if (LocVT == MVT::i32 ||
    1778           1 :       LocVT == MVT::i64 ||
    1779           1 :       LocVT == MVT::f32 ||
    1780           0 :       LocVT == MVT::f64) {
    1781           1 :     unsigned Offset2 = State.AllocateStack(8, 8);
    1782           2 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
    1783           1 :     return false;
    1784             :   }
    1785             : 
    1786             :   return true;  // CC didn't match.
    1787             : }
    1788             : 
    1789             : 
    1790          19 : static bool CC_X86_64_Intr(unsigned ValNo, MVT ValVT,
    1791             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    1792             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1793             : 
    1794          19 :   unsigned Offset1 = State.AllocateStack(8, 8);
    1795          38 :   State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1796             :   return false;
    1797             : 
    1798             :   return true;  // CC didn't match.
    1799             : }
    1800             : 
    1801             : 
    1802          69 : static bool CC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
    1803             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
    1804             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1805             : 
    1806         138 :   if (LocVT == MVT::i8 ||
    1807          69 :       LocVT == MVT::i16) {
    1808           0 :     LocVT = MVT::i32;
    1809           0 :     if (ArgFlags.isSExt())
    1810             :         LocInfo = CCValAssign::SExt;
    1811           0 :     else if (ArgFlags.isZExt())
    1812             :         LocInfo = CCValAssign::ZExt;
    1813             :     else
    1814           0 :         LocInfo = CCValAssign::AExt;
    1815             :   }
    1816             : 
    1817          69 :   if (LocVT == MVT::i32) {
    1818           4 :     if (unsigned Reg = State.AllocateReg(X86::EAX)) {
    1819           8 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1820           4 :       return false;
    1821             :     }
    1822             :   }
    1823             : 
    1824          65 :   if (LocVT == MVT::i64) {
    1825           9 :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    1826          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1827           9 :       return false;
    1828             :     }
    1829             :   }
    1830             : 
    1831          90 :   if (LocVT == MVT::i32 ||
    1832          34 :       LocVT == MVT::f32) {
    1833          22 :     unsigned Offset1 = State.AllocateStack(4, 4);
    1834          44 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1835          22 :     return false;
    1836             :   }
    1837             : 
    1838          34 :   if (LocVT == MVT::i64 ||
    1839           0 :       LocVT == MVT::f64) {
    1840          34 :     unsigned Offset2 = State.AllocateStack(8, 8);
    1841          68 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
    1842          34 :     return false;
    1843             :   }
    1844             : 
    1845             :   return true;  // CC didn't match.
    1846             : }
    1847             : 
    1848             : 
    1849         185 : static bool CC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
    1850             :                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
    1851             :                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1852             : 
    1853         185 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    1854         185 :     if (ArgFlags.isByVal()) {
    1855           0 :       State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
    1856           0 :       return false;
    1857             :     }
    1858             :   }
    1859             : 
    1860         185 :   if (ArgFlags.isByVal()) {
    1861           0 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
    1862           0 :     return false;
    1863             :   }
    1864             : 
    1865         555 :   if (LocVT == MVT::i1 ||
    1866         359 :       LocVT == MVT::i8 ||
    1867         529 :       LocVT == MVT::i16 ||
    1868         170 :       LocVT == MVT::v1i1) {
    1869          15 :     LocVT = MVT::i32;
    1870          15 :     if (ArgFlags.isSExt())
    1871           2 :         LocInfo = CCValAssign::SExt;
    1872          13 :     else if (ArgFlags.isZExt())
    1873           0 :         LocInfo = CCValAssign::ZExt;
    1874             :     else
    1875          13 :         LocInfo = CCValAssign::AExt;
    1876             :   }
    1877             : 
    1878         549 :   if (LocVT == MVT::v8i1 ||
    1879         358 :       LocVT == MVT::v16i1 ||
    1880         173 :       LocVT == MVT::v32i1) {
    1881          18 :     LocVT = MVT::i32;
    1882          18 :     if (ArgFlags.isSExt())
    1883           0 :         LocInfo = CCValAssign::SExt;
    1884          18 :     else if (ArgFlags.isZExt())
    1885           0 :         LocInfo = CCValAssign::ZExt;
    1886             :     else
    1887          18 :         LocInfo = CCValAssign::AExt;
    1888             :   }
    1889             : 
    1890         370 :   if (LocVT == MVT::i32) {
    1891             :     static const MCPhysReg RegList1[] = {
    1892             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
    1893             :     };
    1894          62 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1895         180 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1896          60 :       return false;
    1897             :     }
    1898             :   }
    1899             : 
    1900         250 :   if (LocVT == MVT::i64) {
    1901             :     static const MCPhysReg RegList2[] = {
    1902             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    1903             :     };
    1904           9 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    1905          27 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1906           9 :       return false;
    1907             :     }
    1908             :   }
    1909             : 
    1910         232 :   if (LocVT == MVT::v64i1) {
    1911          26 :     LocVT = MVT::i64;
    1912          26 :     if (ArgFlags.isSExt())
    1913           0 :         LocInfo = CCValAssign::SExt;
    1914          26 :     else if (ArgFlags.isZExt())
    1915           0 :         LocInfo = CCValAssign::ZExt;
    1916             :     else
    1917          26 :         LocInfo = CCValAssign::AExt;
    1918             :   }
    1919             : 
    1920         116 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    1921         232 :     if (LocVT == MVT::i64) {
    1922             :       static const MCPhysReg RegList3[] = {
    1923             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    1924             :       };
    1925          26 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1926          66 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1927          22 :         return false;
    1928             :       }
    1929             :     }
    1930             :   }
    1931             : 
    1932          94 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    1933           0 :     if (LocVT == MVT::i64) {
    1934           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1935             :             return false;
    1936             :     }
    1937             :   }
    1938             : 
    1939         277 :   if (LocVT == MVT::f32 ||
    1940         178 :       LocVT == MVT::f64 ||
    1941          84 :       LocVT == MVT::f128) {
    1942          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1943             :       static const MCPhysReg RegList4[] = {
    1944             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    1945             :       };
    1946          10 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
    1947          30 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1948          10 :         return false;
    1949             :       }
    1950             :     }
    1951             :   }
    1952             : 
    1953         168 :   if (LocVT == MVT::f80) {
    1954           3 :     if (unsigned Reg = State.AllocateReg(X86::FP0)) {
    1955           9 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1956           3 :       return false;
    1957             :     }
    1958             :   }
    1959             : 
    1960         162 :   if (LocVT == MVT::v16i8 ||
    1961         162 :       LocVT == MVT::v8i16 ||
    1962         157 :       LocVT == MVT::v4i32 ||
    1963         152 :       LocVT == MVT::v2i64 ||
    1964         197 :       LocVT == MVT::v4f32 ||
    1965          40 :       LocVT == MVT::v2f64) {
    1966          82 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1967             :       static const MCPhysReg RegList5[] = {
    1968             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    1969             :       };
    1970          41 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    1971          99 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1972          33 :         return false;
    1973             :       }
    1974             :     }
    1975             :   }
    1976             : 
    1977         144 :   if (LocVT == MVT::v32i8 ||
    1978          96 :       LocVT == MVT::v16i16 ||
    1979          91 :       LocVT == MVT::v8i32 ||
    1980          86 :       LocVT == MVT::v4i64 ||
    1981         134 :       LocVT == MVT::v8f32 ||
    1982          43 :       LocVT == MVT::v4f64) {
    1983          10 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    1984             :       static const MCPhysReg RegList6[] = {
    1985             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    1986             :       };
    1987           5 :       if (unsigned Reg = State.AllocateReg(RegList6)) {
    1988          15 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1989           5 :         return false;
    1990             :       }
    1991             :     }
    1992             :   }
    1993             : 
    1994         129 :   if (LocVT == MVT::v64i8 ||
    1995          86 :       LocVT == MVT::v32i16 ||
    1996          81 :       LocVT == MVT::v16i32 ||
    1997          76 :       LocVT == MVT::v8i64 ||
    1998          95 :       LocVT == MVT::v16f32 ||
    1999          14 :       LocVT == MVT::v8f64) {
    2000          58 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    2001             :       static const MCPhysReg RegList7[] = {
    2002             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    2003             :       };
    2004          29 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    2005          81 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2006          27 :         return false;
    2007             :       }
    2008             :     }
    2009             :   }
    2010             : 
    2011          16 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2012          46 :     if (LocVT == MVT::i32 ||
    2013          24 :         LocVT == MVT::i64 ||
    2014          36 :         LocVT == MVT::f32 ||
    2015          10 :         LocVT == MVT::f64) {
    2016           6 :       unsigned Offset8 = State.AllocateStack(8, 8);
    2017          18 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
    2018           6 :       return false;
    2019             :     }
    2020             :   }
    2021             : 
    2022          30 :   if (LocVT == MVT::i32 ||
    2023          10 :       LocVT == MVT::f32) {
    2024           0 :     unsigned Offset9 = State.AllocateStack(4, 4);
    2025           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    2026           0 :     return false;
    2027             :   }
    2028             : 
    2029          20 :   if (LocVT == MVT::i64 ||
    2030          10 :       LocVT == MVT::f64) {
    2031           0 :     unsigned Offset10 = State.AllocateStack(8, 4);
    2032           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    2033           0 :     return false;
    2034             :   }
    2035             : 
    2036          10 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2037          10 :     if (LocVT == MVT::x86mmx) {
    2038           0 :       unsigned Offset11 = State.AllocateStack(8, 8);
    2039           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
    2040           0 :       return false;
    2041             :     }
    2042             :   }
    2043             : 
    2044          10 :   if (LocVT == MVT::x86mmx) {
    2045           0 :     unsigned Offset12 = State.AllocateStack(8, 4);
    2046           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
    2047           0 :     return false;
    2048             :   }
    2049             : 
    2050          20 :   if (LocVT == MVT::f80 ||
    2051          10 :       LocVT == MVT::f128) {
    2052           0 :     unsigned Offset13 = State.AllocateStack(
    2053           0 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    2054           0 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    2055           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
    2056           0 :     return false;
    2057             :   }
    2058             : 
    2059          20 :   if (LocVT == MVT::v16i8 ||
    2060          20 :       LocVT == MVT::v8i16 ||
    2061          20 :       LocVT == MVT::v4i32 ||
    2062          20 :       LocVT == MVT::v2i64 ||
    2063          22 :       LocVT == MVT::v4f32 ||
    2064           2 :       LocVT == MVT::v2f64) {
    2065           8 :     unsigned Offset14 = State.AllocateStack(16, 16);
    2066          24 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
    2067           8 :     return false;
    2068             :   }
    2069             : 
    2070           4 :   if (LocVT == MVT::v32i8 ||
    2071           4 :       LocVT == MVT::v16i16 ||
    2072           4 :       LocVT == MVT::v8i32 ||
    2073           4 :       LocVT == MVT::v4i64 ||
    2074           6 :       LocVT == MVT::v8f32 ||
    2075           2 :       LocVT == MVT::v4f64) {
    2076           0 :     unsigned Offset15 = State.AllocateStack(32, 32);
    2077           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
    2078           0 :     return false;
    2079             :   }
    2080             : 
    2081           4 :   if (LocVT == MVT::v16i32 ||
    2082           4 :       LocVT == MVT::v8i64 ||
    2083           4 :       LocVT == MVT::v16f32 ||
    2084           0 :       LocVT == MVT::v8f64) {
    2085           2 :     unsigned Offset16 = State.AllocateStack(64, 64);
    2086           6 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset16, LocVT, LocInfo));
    2087           2 :     return false;
    2088             :   }
    2089             : 
    2090             :   return true;  // CC didn't match.
    2091             : }
    2092             : 
    2093             : 
    2094         240 : static bool CC_X86_Win32_VectorCall(unsigned ValNo, MVT ValVT,
    2095             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    2096             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2097             : 
    2098         240 :   if (CC_X86_32_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2099             :     return false;
    2100             : 
    2101          58 :   if (!CC_X86_32_FastCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2102             :     return false;
    2103             : 
    2104           0 :   return true;  // CC didn't match.
    2105             : }
    2106             : 
    2107             : 
    2108        2106 : static bool CC_X86_Win64_C(unsigned ValNo, MVT ValVT,
    2109             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    2110             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2111             : 
    2112        4212 :   if (LocVT == MVT::i1 ||
    2113        4188 :       LocVT == MVT::i8 ||
    2114        6256 :       LocVT == MVT::i16 ||
    2115        2068 :       LocVT == MVT::v1i1) {
    2116          38 :     LocVT = MVT::i32;
    2117          38 :     if (ArgFlags.isSExt())
    2118             :         LocInfo = CCValAssign::SExt;
    2119          38 :     else if (ArgFlags.isZExt())
    2120             :         LocInfo = CCValAssign::ZExt;
    2121             :     else
    2122          34 :         LocInfo = CCValAssign::AExt;
    2123             :   }
    2124             : 
    2125        2106 :   if (ArgFlags.isNest()) {
    2126           2 :     if (unsigned Reg = State.AllocateReg(X86::R10)) {
    2127           4 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2128           2 :       return false;
    2129             :     }
    2130             :   }
    2131             : 
    2132        4207 :   if (LocVT == MVT::v16i8 ||
    2133        4204 :       LocVT == MVT::v8i16 ||
    2134        4195 :       LocVT == MVT::v4i32 ||
    2135        4188 :       LocVT == MVT::v2i64 ||
    2136        6025 :       LocVT == MVT::v4f32 ||
    2137        1827 :       LocVT == MVT::v2f64) {
    2138             :     LocVT = MVT::i64;
    2139             :     LocInfo = CCValAssign::Indirect;
    2140             :   }
    2141             : 
    2142        4208 :   if (LocVT == MVT::v32i8 ||
    2143        4208 :       LocVT == MVT::v16i16 ||
    2144        4206 :       LocVT == MVT::v8i32 ||
    2145        4204 :       LocVT == MVT::v4i64 ||
    2146        6174 :       LocVT == MVT::v8f32 ||
    2147        1968 :       LocVT == MVT::v4f64) {
    2148             :     LocVT = MVT::i64;
    2149             :     LocInfo = CCValAssign::Indirect;
    2150             :   }
    2151             : 
    2152        4208 :   if (LocVT == MVT::v16i32 ||
    2153        4201 :       LocVT == MVT::v16f32 ||
    2154        6298 :       LocVT == MVT::v8f64 ||
    2155        2097 :       LocVT == MVT::v8i64) {
    2156             :     LocVT = MVT::i64;
    2157             :     LocInfo = CCValAssign::Indirect;
    2158             :   }
    2159             : 
    2160        2104 :   if (LocVT == MVT::x86mmx) {
    2161           0 :     LocVT = MVT::i64;
    2162           0 :     LocInfo = CCValAssign::BCvt;
    2163             :   }
    2164             : 
    2165        2104 :   if (LocVT == MVT::i32) {
    2166             :     static const MCPhysReg RegList1[] = {
    2167             :       X86::ECX, X86::EDX, X86::R8D, X86::R9D
    2168             :     };
    2169             :     static const MCPhysReg RegList2[] = {
    2170             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2171             :     };
    2172         596 :     if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
    2173        1054 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2174         527 :       return false;
    2175             :     }
    2176             :   }
    2177             : 
    2178        1577 :   if (State.getCallingConv() == CallingConv::X86_ThisCall) {
    2179          14 :     if (ArgFlags.isSRet()) {
    2180           0 :       if (LocVT == MVT::i64) {
    2181             :         static const MCPhysReg RegList3[] = {
    2182             :           X86::RDX, X86::R8, X86::R9
    2183             :         };
    2184             :         static const MCPhysReg RegList4[] = {
    2185             :           X86::XMM1, X86::XMM2, X86::XMM3
    2186             :         };
    2187           0 :         if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
    2188           0 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2189           0 :           return false;
    2190             :         }
    2191             :       }
    2192             :     }
    2193             :   }
    2194             : 
    2195        1577 :   if (LocVT == MVT::i64) {
    2196             :     static const MCPhysReg RegList5[] = {
    2197             :       X86::RCX, X86::RDX, X86::R8, X86::R9
    2198             :     };
    2199             :     static const MCPhysReg RegList6[] = {
    2200             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2201             :     };
    2202        1421 :     if (unsigned Reg = State.AllocateReg(RegList5, RegList6)) {
    2203        2694 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2204        1347 :       return false;
    2205             :     }
    2206             :   }
    2207             : 
    2208         416 :   if (LocVT == MVT::f32 ||
    2209         344 :       LocVT == MVT::f64 ||
    2210         316 :       LocVT == MVT::v16i8 ||
    2211         316 :       LocVT == MVT::v8i16 ||
    2212         316 :       LocVT == MVT::v4i32 ||
    2213         316 :       LocVT == MVT::v2i64 ||
    2214         546 :       LocVT == MVT::v4f32 ||
    2215         158 :       LocVT == MVT::v2f64) {
    2216             :     static const MCPhysReg RegList7[] = {
    2217             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2218             :     };
    2219             :     static const MCPhysReg RegList8[] = {
    2220             :       X86::RCX, X86::RDX, X86::R8, X86::R9
    2221             :     };
    2222          72 :     if (unsigned Reg = State.AllocateReg(RegList7, RegList8)) {
    2223         102 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2224          51 :       return false;
    2225             :     }
    2226             :   }
    2227             : 
    2228         289 :   if (LocVT == MVT::i32 ||
    2229         146 :       LocVT == MVT::i64 ||
    2230         235 :       LocVT == MVT::f32 ||
    2231          20 :       LocVT == MVT::f64) {
    2232         164 :     unsigned Offset9 = State.AllocateStack(8, 8);
    2233         328 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    2234         164 :     return false;
    2235             :   }
    2236             : 
    2237          15 :   if (LocVT == MVT::f80) {
    2238          12 :     unsigned Offset10 = State.AllocateStack(
    2239          18 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    2240          24 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    2241          12 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    2242           6 :     return false;
    2243             :   }
    2244             : 
    2245             :   return true;  // CC didn't match.
    2246             : }
    2247             : 
    2248             : 
    2249         195 : static bool CC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
    2250             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
    2251             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2252             : 
    2253         195 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2254         195 :     if (ArgFlags.isByVal()) {
    2255           0 :       State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
    2256           0 :       return false;
    2257             :     }
    2258             :   }
    2259             : 
    2260         195 :   if (ArgFlags.isByVal()) {
    2261           0 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
    2262           0 :     return false;
    2263             :   }
    2264             : 
    2265         585 :   if (LocVT == MVT::i1 ||
    2266         379 :       LocVT == MVT::i8 ||
    2267         559 :       LocVT == MVT::i16 ||
    2268         180 :       LocVT == MVT::v1i1) {
    2269          15 :     LocVT = MVT::i32;
    2270          15 :     if (ArgFlags.isSExt())
    2271           2 :         LocInfo = CCValAssign::SExt;
    2272          13 :     else if (ArgFlags.isZExt())
    2273           0 :         LocInfo = CCValAssign::ZExt;
    2274             :     else
    2275          13 :         LocInfo = CCValAssign::AExt;
    2276             :   }
    2277             : 
    2278         579 :   if (LocVT == MVT::v8i1 ||
    2279         378 :       LocVT == MVT::v16i1 ||
    2280         183 :       LocVT == MVT::v32i1) {
    2281          18 :     LocVT = MVT::i32;
    2282          18 :     if (ArgFlags.isSExt())
    2283           0 :         LocInfo = CCValAssign::SExt;
    2284          18 :     else if (ArgFlags.isZExt())
    2285           0 :         LocInfo = CCValAssign::ZExt;
    2286             :     else
    2287          18 :         LocInfo = CCValAssign::AExt;
    2288             :   }
    2289             : 
    2290         390 :   if (LocVT == MVT::i32) {
    2291             :     static const MCPhysReg RegList1[] = {
    2292             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
    2293             :     };
    2294          72 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2295         216 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2296          72 :       return false;
    2297             :     }
    2298             :   }
    2299             : 
    2300         246 :   if (LocVT == MVT::i64) {
    2301             :     static const MCPhysReg RegList2[] = {
    2302             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    2303             :     };
    2304           9 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2305          27 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2306           9 :       return false;
    2307             :     }
    2308             :   }
    2309             : 
    2310         228 :   if (LocVT == MVT::v64i1) {
    2311          26 :     LocVT = MVT::i64;
    2312          26 :     if (ArgFlags.isSExt())
    2313           0 :         LocInfo = CCValAssign::SExt;
    2314          26 :     else if (ArgFlags.isZExt())
    2315           0 :         LocInfo = CCValAssign::ZExt;
    2316             :     else
    2317          26 :         LocInfo = CCValAssign::AExt;
    2318             :   }
    2319             : 
    2320         114 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2321         228 :     if (LocVT == MVT::i64) {
    2322             :       static const MCPhysReg RegList3[] = {
    2323             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    2324             :       };
    2325          26 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    2326          72 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2327          24 :         return false;
    2328             :       }
    2329             :     }
    2330             :   }
    2331             : 
    2332          90 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    2333           0 :     if (LocVT == MVT::i64) {
    2334           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2335             :             return false;
    2336             :     }
    2337             :   }
    2338             : 
    2339         265 :   if (LocVT == MVT::f32 ||
    2340         170 :       LocVT == MVT::f64 ||
    2341          80 :       LocVT == MVT::f128) {
    2342          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    2343             :       static const MCPhysReg RegList4[] = {
    2344             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    2345             :       };
    2346          10 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
    2347          30 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2348          10 :         return false;
    2349             :       }
    2350             :     }
    2351             :   }
    2352             : 
    2353         160 :   if (LocVT == MVT::f80) {
    2354           3 :     if (unsigned Reg = State.AllocateReg(X86::FP0)) {
    2355           9 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2356           3 :       return false;
    2357             :     }
    2358             :   }
    2359             : 
    2360         154 :   if (LocVT == MVT::v16i8 ||
    2361         154 :       LocVT == MVT::v8i16 ||
    2362         149 :       LocVT == MVT::v4i32 ||
    2363         144 :       LocVT == MVT::v2i64 ||
    2364         185 :       LocVT == MVT::v4f32 ||
    2365          36 :       LocVT == MVT::v2f64) {
    2366          82 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    2367             :       static const MCPhysReg RegList5[] = {
    2368             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    2369             :       };
    2370          41 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    2371          99 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2372          33 :         return false;
    2373             :       }
    2374             :     }
    2375             :   }
    2376             : 
    2377         132 :   if (LocVT == MVT::v32i8 ||
    2378          88 :       LocVT == MVT::v16i16 ||
    2379          83 :       LocVT == MVT::v8i32 ||
    2380          78 :       LocVT == MVT::v4i64 ||
    2381         122 :       LocVT == MVT::v8f32 ||
    2382          39 :       LocVT == MVT::v4f64) {
    2383          10 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    2384             :       static const MCPhysReg RegList6[] = {
    2385             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    2386             :       };
    2387           5 :       if (unsigned Reg = State.AllocateReg(RegList6)) {
    2388          15 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2389           5 :         return false;
    2390             :       }
    2391             :     }
    2392             :   }
    2393             : 
    2394         117 :   if (LocVT == MVT::v64i8 ||
    2395          78 :       LocVT == MVT::v32i16 ||
    2396          73 :       LocVT == MVT::v16i32 ||
    2397          68 :       LocVT == MVT::v8i64 ||
    2398          83 :       LocVT == MVT::v16f32 ||
    2399          10 :       LocVT == MVT::v8f64) {
    2400          58 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    2401             :       static const MCPhysReg RegList7[] = {
    2402             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    2403             :       };
    2404          29 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    2405          81 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2406          27 :         return false;
    2407             :       }
    2408             :     }
    2409             :   }
    2410             : 
    2411          12 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2412          36 :     if (LocVT == MVT::i32 ||
    2413          22 :         LocVT == MVT::i64 ||
    2414          32 :         LocVT == MVT::f32 ||
    2415          10 :         LocVT == MVT::f64) {
    2416           2 :       unsigned Offset8 = State.AllocateStack(8, 8);
    2417           6 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
    2418           2 :       return false;
    2419             :     }
    2420             :   }
    2421             : 
    2422          30 :   if (LocVT == MVT::i32 ||
    2423          10 :       LocVT == MVT::f32) {
    2424           0 :     unsigned Offset9 = State.AllocateStack(4, 4);
    2425           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    2426           0 :     return false;
    2427             :   }
    2428             : 
    2429          20 :   if (LocVT == MVT::i64 ||
    2430          10 :       LocVT == MVT::f64) {
    2431           0 :     unsigned Offset10 = State.AllocateStack(8, 4);
    2432           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    2433           0 :     return false;
    2434             :   }
    2435             : 
    2436          10 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2437          10 :     if (LocVT == MVT::x86mmx) {
    2438           0 :       unsigned Offset11 = State.AllocateStack(8, 8);
    2439           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
    2440           0 :       return false;
    2441             :     }
    2442             :   }
    2443             : 
    2444          10 :   if (LocVT == MVT::x86mmx) {
    2445           0 :     unsigned Offset12 = State.AllocateStack(8, 4);
    2446           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
    2447           0 :     return false;
    2448             :   }
    2449             : 
    2450          20 :   if (LocVT == MVT::f80 ||
    2451          10 :       LocVT == MVT::f128) {
    2452           0 :     unsigned Offset13 = State.AllocateStack(
    2453           0 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    2454           0 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    2455           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
    2456           0 :     return false;
    2457             :   }
    2458             : 
    2459          20 :   if (LocVT == MVT::v16i8 ||
    2460          20 :       LocVT == MVT::v8i16 ||
    2461          20 :       LocVT == MVT::v4i32 ||
    2462          20 :       LocVT == MVT::v2i64 ||
    2463          22 :       LocVT == MVT::v4f32 ||
    2464           2 :       LocVT == MVT::v2f64) {
    2465           8 :     unsigned Offset14 = State.AllocateStack(16, 16);
    2466          24 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
    2467           8 :     return false;
    2468             :   }
    2469             : 
    2470           4 :   if (LocVT == MVT::v32i8 ||
    2471           4 :       LocVT == MVT::v16i16 ||
    2472           4 :       LocVT == MVT::v8i32 ||
    2473           4 :       LocVT == MVT::v4i64 ||
    2474           6 :       LocVT == MVT::v8f32 ||
    2475           2 :       LocVT == MVT::v4f64) {
    2476           0 :     unsigned Offset15 = State.AllocateStack(32, 32);
    2477           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
    2478           0 :     return false;
    2479             :   }
    2480             : 
    2481           4 :   if (LocVT == MVT::v16i32 ||
    2482           4 :       LocVT == MVT::v8i64 ||
    2483           4 :       LocVT == MVT::v16f32 ||
    2484           0 :       LocVT == MVT::v8f64) {
    2485           2 :     unsigned Offset16 = State.AllocateStack(64, 64);
    2486           6 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset16, LocVT, LocInfo));
    2487           2 :     return false;
    2488             :   }
    2489             : 
    2490             :   return true;  // CC didn't match.
    2491             : }
    2492             : 
    2493             : 
    2494         152 : static bool CC_X86_Win64_VectorCall(unsigned ValNo, MVT ValVT,
    2495             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    2496             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2497             : 
    2498         152 :   if (CC_X86_64_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2499             :     return false;
    2500             : 
    2501          17 :   if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2502             :     return false;
    2503             : 
    2504           0 :   return true;  // CC didn't match.
    2505             : }
    2506             : 
    2507             : 
    2508         192 : static bool RetCC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
    2509             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
    2510             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2511             : 
    2512         384 :   if (LocVT == MVT::f32 ||
    2513         384 :       LocVT == MVT::f64 ||
    2514         384 :       LocVT == MVT::v4i32 ||
    2515         384 :       LocVT == MVT::v2i64 ||
    2516         488 :       LocVT == MVT::v4f32 ||
    2517         104 :       LocVT == MVT::v2f64) {
    2518             :     static const MCPhysReg RegList1[] = {
    2519             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2520             :     };
    2521          88 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2522         176 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2523          88 :       return false;
    2524             :     }
    2525             :   }
    2526             : 
    2527         160 :   if (LocVT == MVT::v8f32 ||
    2528         112 :       LocVT == MVT::v4f64 ||
    2529         216 :       LocVT == MVT::v8i32 ||
    2530          56 :       LocVT == MVT::v4i64) {
    2531             :     static const MCPhysReg RegList2[] = {
    2532             :       X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
    2533             :     };
    2534          48 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2535          96 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2536          48 :       return false;
    2537             :     }
    2538             :   }
    2539             : 
    2540          64 :   if (LocVT == MVT::v16f32 ||
    2541          16 :       LocVT == MVT::v8f64 ||
    2542          72 :       LocVT == MVT::v16i32 ||
    2543           8 :       LocVT == MVT::v8i64) {
    2544             :     static const MCPhysReg RegList3[] = {
    2545             :       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
    2546             :     };
    2547          48 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2548          96 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2549          48 :       return false;
    2550             :     }
    2551             :   }
    2552             : 
    2553           8 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2554             :     return false;
    2555             : 
    2556           0 :   return true;  // CC didn't match.
    2557             : }
    2558             : 
    2559             : 
    2560      161742 : static bool RetCC_X86(unsigned ValNo, MVT ValVT,
    2561             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    2562             :                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2563             : 
    2564      161742 :   if (State.getCallingConv() == CallingConv::Intel_OCL_BI) {
    2565         192 :     if (!RetCC_Intel_OCL_BI(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2566             :       return false;
    2567             :   }
    2568             : 
    2569      161550 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2570      121266 :     if (!RetCC_X86_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2571             :       return false;
    2572             :   }
    2573             : 
    2574       40417 :   if (!RetCC_X86_32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2575             :     return false;
    2576             : 
    2577         591 :   return true;  // CC didn't match.
    2578             : }
    2579             : 
    2580             : 
    2581      154506 : static bool RetCC_X86Common(unsigned ValNo, MVT ValVT,
    2582             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
    2583             :                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2584             : 
    2585      154506 :   if (LocVT == MVT::v1i1) {
    2586           0 :     LocVT = MVT::i8;
    2587           0 :     if (ArgFlags.isSExt())
    2588             :         LocInfo = CCValAssign::SExt;
    2589           0 :     else if (ArgFlags.isZExt())
    2590             :         LocInfo = CCValAssign::ZExt;
    2591             :     else
    2592           0 :         LocInfo = CCValAssign::AExt;
    2593             :   }
    2594             : 
    2595      154506 :   if (LocVT == MVT::i1) {
    2596           5 :     LocVT = MVT::i8;
    2597           5 :     if (ArgFlags.isSExt())
    2598             :         LocInfo = CCValAssign::SExt;
    2599           5 :     else if (ArgFlags.isZExt())
    2600             :         LocInfo = CCValAssign::ZExt;
    2601             :     else
    2602           5 :         LocInfo = CCValAssign::AExt;
    2603             :   }
    2604             : 
    2605      154506 :   if (LocVT == MVT::i8) {
    2606             :     static const MCPhysReg RegList1[] = {
    2607             :       X86::AL, X86::DL, X86::CL
    2608             :     };
    2609        8345 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2610       16542 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2611        8271 :       return false;
    2612             :     }
    2613             :   }
    2614             : 
    2615      146235 :   if (LocVT == MVT::i16) {
    2616             :     static const MCPhysReg RegList2[] = {
    2617             :       X86::AX, X86::DX, X86::CX
    2618             :     };
    2619        2102 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2620        4184 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2621        2092 :       return false;
    2622             :     }
    2623             :   }
    2624             : 
    2625      144143 :   if (LocVT == MVT::i32) {
    2626             :     static const MCPhysReg RegList3[] = {
    2627             :       X86::EAX, X86::EDX, X86::ECX
    2628             :     };
    2629       39513 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2630       78260 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2631       39130 :       return false;
    2632             :     }
    2633             :   }
    2634             : 
    2635      105013 :   if (LocVT == MVT::i64) {
    2636             :     static const MCPhysReg RegList4[] = {
    2637             :       X86::RAX, X86::RDX, X86::RCX
    2638             :     };
    2639       19618 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    2640       39008 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2641       19504 :       return false;
    2642             :     }
    2643             :   }
    2644             : 
    2645       85509 :   if (LocVT == MVT::v2i1) {
    2646           8 :     LocVT = MVT::v2i64;
    2647           8 :     if (ArgFlags.isSExt())
    2648             :         LocInfo = CCValAssign::SExt;
    2649           8 :     else if (ArgFlags.isZExt())
    2650             :         LocInfo = CCValAssign::ZExt;
    2651             :     else
    2652           8 :         LocInfo = CCValAssign::AExt;
    2653             :   }
    2654             : 
    2655       85509 :   if (LocVT == MVT::v4i1) {
    2656          18 :     LocVT = MVT::v4i32;
    2657          18 :     if (ArgFlags.isSExt())
    2658             :         LocInfo = CCValAssign::SExt;
    2659          18 :     else if (ArgFlags.isZExt())
    2660             :         LocInfo = CCValAssign::ZExt;
    2661             :     else
    2662          18 :         LocInfo = CCValAssign::AExt;
    2663             :   }
    2664             : 
    2665       85509 :   if (LocVT == MVT::v8i1) {
    2666         100 :     LocVT = MVT::v8i16;
    2667         100 :     if (ArgFlags.isSExt())
    2668             :         LocInfo = CCValAssign::SExt;
    2669         100 :     else if (ArgFlags.isZExt())
    2670             :         LocInfo = CCValAssign::ZExt;
    2671             :     else
    2672         100 :         LocInfo = CCValAssign::AExt;
    2673             :   }
    2674             : 
    2675       85509 :   if (LocVT == MVT::v16i1) {
    2676         126 :     LocVT = MVT::v16i8;
    2677         126 :     if (ArgFlags.isSExt())
    2678             :         LocInfo = CCValAssign::SExt;
    2679         126 :     else if (ArgFlags.isZExt())
    2680             :         LocInfo = CCValAssign::ZExt;
    2681             :     else
    2682         126 :         LocInfo = CCValAssign::AExt;
    2683             :   }
    2684             : 
    2685       85509 :   if (LocVT == MVT::v32i1) {
    2686          22 :     LocVT = MVT::v32i8;
    2687          22 :     if (ArgFlags.isSExt())
    2688             :         LocInfo = CCValAssign::SExt;
    2689          22 :     else if (ArgFlags.isZExt())
    2690             :         LocInfo = CCValAssign::ZExt;
    2691             :     else
    2692          22 :         LocInfo = CCValAssign::AExt;
    2693             :   }
    2694             : 
    2695       85509 :   if (LocVT == MVT::v64i1) {
    2696          20 :     LocVT = MVT::v64i8;
    2697          20 :     if (ArgFlags.isSExt())
    2698             :         LocInfo = CCValAssign::SExt;
    2699          20 :     else if (ArgFlags.isZExt())
    2700             :         LocInfo = CCValAssign::ZExt;
    2701             :     else
    2702          20 :         LocInfo = CCValAssign::AExt;
    2703             :   }
    2704             : 
    2705      164718 :   if (LocVT == MVT::v16i8 ||
    2706      150605 :       LocVT == MVT::v8i16 ||
    2707      132801 :       LocVT == MVT::v4i32 ||
    2708      114861 :       LocVT == MVT::v2i64 ||
    2709      183109 :       LocVT == MVT::v4f32 ||
    2710       44144 :       LocVT == MVT::v2f64) {
    2711             :     static const MCPhysReg RegList5[] = {
    2712             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2713             :     };
    2714       46725 :     if (unsigned Reg = State.AllocateReg(RegList5)) {
    2715       93334 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2716       46667 :       return false;
    2717             :     }
    2718             :   }
    2719             : 
    2720       73670 :   if (LocVT == MVT::v32i8 ||
    2721       64789 :       LocVT == MVT::v16i16 ||
    2722       55484 :       LocVT == MVT::v8i32 ||
    2723       46550 :       LocVT == MVT::v4i64 ||
    2724       75661 :       LocVT == MVT::v8f32 ||
    2725       15792 :       LocVT == MVT::v4f64) {
    2726             :     static const MCPhysReg RegList6[] = {
    2727             :       X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
    2728             :     };
    2729       27412 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    2730       54816 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2731       27408 :       return false;
    2732             :     }
    2733             :   }
    2734             : 
    2735       22178 :   if (LocVT == MVT::v64i8 ||
    2736       20411 :       LocVT == MVT::v32i16 ||
    2737       17474 :       LocVT == MVT::v16i32 ||
    2738       13575 :       LocVT == MVT::v8i64 ||
    2739       20722 :       LocVT == MVT::v16f32 ||
    2740        3520 :       LocVT == MVT::v8f64) {
    2741             :     static const MCPhysReg RegList7[] = {
    2742             :       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
    2743             :     };
    2744       10304 :     if (unsigned Reg = State.AllocateReg(RegList7)) {
    2745       20608 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2746       10304 :       return false;
    2747             :     }
    2748             :   }
    2749             : 
    2750        1130 :   if (LocVT == MVT::x86mmx) {
    2751           6 :     if (unsigned Reg = State.AllocateReg(X86::MM0)) {
    2752          12 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2753           6 :       return false;
    2754             :     }
    2755             :   }
    2756             : 
    2757        1124 :   if (LocVT == MVT::f80) {
    2758             :     static const MCPhysReg RegList8[] = {
    2759             :       X86::FP0, X86::FP1
    2760             :     };
    2761         373 :     if (unsigned Reg = State.AllocateReg(RegList8)) {
    2762         746 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2763         373 :       return false;
    2764             :     }
    2765             :   }
    2766             : 
    2767             :   return true;  // CC didn't match.
    2768             : }
    2769             : 
    2770             : 
    2771       40417 : static bool RetCC_X86_32(unsigned ValNo, MVT ValVT,
    2772             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
    2773             :                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2774             : 
    2775       40417 :   if (State.getCallingConv() == CallingConv::Fast) {
    2776         287 :     if (!RetCC_X86_32_Fast(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2777             :       return false;
    2778             :   }
    2779             : 
    2780       40144 :   if (State.getCallingConv() == CallingConv::HiPE) {
    2781          30 :     if (!RetCC_X86_32_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2782             :       return false;
    2783             :   }
    2784             : 
    2785       40114 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
    2786          80 :     if (!RetCC_X86_32_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2787             :       return false;
    2788             :   }
    2789             : 
    2790       40038 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    2791         178 :     if (!RetCC_X86_32_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2792             :       return false;
    2793             :   }
    2794             : 
    2795       39860 :   if (!RetCC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2796             :     return false;
    2797             : 
    2798         591 :   return true;  // CC didn't match.
    2799             : }
    2800             : 
    2801             : 
    2802       39860 : static bool RetCC_X86_32_C(unsigned ValNo, MVT ValVT,
    2803             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    2804             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2805             : 
    2806       39860 :   if (ArgFlags.isInReg()) {
    2807          48 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    2808          12 :       if (LocVT == MVT::f32 ||
    2809           4 :           LocVT == MVT::f64) {
    2810             :         static const MCPhysReg RegList1[] = {
    2811             :           X86::XMM0, X86::XMM1, X86::XMM2
    2812             :         };
    2813           8 :         if (unsigned Reg = State.AllocateReg(RegList1)) {
    2814          16 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2815           8 :           return false;
    2816             :         }
    2817             :       }
    2818             :     }
    2819             :   }
    2820             : 
    2821       78926 :   if (LocVT == MVT::f32 ||
    2822       39074 :       LocVT == MVT::f64) {
    2823             :     static const MCPhysReg RegList2[] = {
    2824             :       X86::FP0, X86::FP1
    2825             :     };
    2826        1567 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2827        2962 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2828        1481 :       return false;
    2829             :     }
    2830             :   }
    2831             : 
    2832       38371 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2833             :     return false;
    2834             : 
    2835         591 :   return true;  // CC didn't match.
    2836             : }
    2837             : 
    2838             : 
    2839         287 : static bool RetCC_X86_32_Fast(unsigned ValNo, MVT ValVT,
    2840             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    2841             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2842             : 
    2843         287 :   if (LocVT == MVT::f32) {
    2844           4 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    2845             :       static const MCPhysReg RegList1[] = {
    2846             :         X86::XMM0, X86::XMM1, X86::XMM2
    2847             :       };
    2848           2 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
    2849           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2850           2 :         return false;
    2851             :       }
    2852             :     }
    2853             :   }
    2854             : 
    2855         285 :   if (LocVT == MVT::f64) {
    2856          34 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    2857             :       static const MCPhysReg RegList2[] = {
    2858             :         X86::XMM0, X86::XMM1, X86::XMM2
    2859             :       };
    2860           9 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
    2861          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2862           9 :         return false;
    2863             :       }
    2864             :     }
    2865             :   }
    2866             : 
    2867         276 :   if (LocVT == MVT::i8) {
    2868             :     static const MCPhysReg RegList3[] = {
    2869             :       X86::AL, X86::DL, X86::CL
    2870             :     };
    2871          15 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2872          30 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2873          15 :       return false;
    2874             :     }
    2875             :   }
    2876             : 
    2877         261 :   if (LocVT == MVT::i16) {
    2878             :     static const MCPhysReg RegList4[] = {
    2879             :       X86::AX, X86::DX, X86::CX
    2880             :     };
    2881           0 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    2882           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2883           0 :       return false;
    2884             :     }
    2885             :   }
    2886             : 
    2887         261 :   if (LocVT == MVT::i32) {
    2888             :     static const MCPhysReg RegList5[] = {
    2889             :       X86::EAX, X86::EDX, X86::ECX
    2890             :     };
    2891         252 :     if (unsigned Reg = State.AllocateReg(RegList5)) {
    2892         494 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2893         247 :       return false;
    2894             :     }
    2895             :   }
    2896             : 
    2897          14 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2898             :     return false;
    2899             : 
    2900          14 :   return true;  // CC didn't match.
    2901             : }
    2902             : 
    2903             : 
    2904          30 : static bool RetCC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
    2905             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    2906             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2907             : 
    2908          60 :   if (LocVT == MVT::i8 ||
    2909          30 :       LocVT == MVT::i16) {
    2910           0 :     LocVT = MVT::i32;
    2911           0 :     if (ArgFlags.isSExt())
    2912             :         LocInfo = CCValAssign::SExt;
    2913           0 :     else if (ArgFlags.isZExt())
    2914             :         LocInfo = CCValAssign::ZExt;
    2915             :     else
    2916           0 :         LocInfo = CCValAssign::AExt;
    2917             :   }
    2918             : 
    2919          30 :   if (LocVT == MVT::i32) {
    2920             :     static const MCPhysReg RegList1[] = {
    2921             :       X86::ESI, X86::EBP, X86::EAX, X86::EDX
    2922             :     };
    2923          30 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2924          60 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2925          30 :       return false;
    2926             :     }
    2927             :   }
    2928             : 
    2929             :   return true;  // CC didn't match.
    2930             : }
    2931             : 
    2932             : 
    2933         178 : static bool RetCC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
    2934             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
    2935             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2936             : 
    2937         534 :   if (LocVT == MVT::i1 ||
    2938         356 :       LocVT == MVT::v1i1 ||
    2939         178 :       LocVT == MVT::v8i1) {
    2940           4 :     LocVT = MVT::i8;
    2941           4 :     if (ArgFlags.isSExt())
    2942           0 :         LocInfo = CCValAssign::SExt;
    2943           4 :     else if (ArgFlags.isZExt())
    2944           0 :         LocInfo = CCValAssign::ZExt;
    2945             :     else
    2946           4 :         LocInfo = CCValAssign::AExt;
    2947             :   }
    2948             : 
    2949         356 :   if (LocVT == MVT::v16i1) {
    2950           4 :     LocVT = MVT::i16;
    2951           4 :     if (ArgFlags.isSExt())
    2952           0 :         LocInfo = CCValAssign::SExt;
    2953           4 :     else if (ArgFlags.isZExt())
    2954           0 :         LocInfo = CCValAssign::ZExt;
    2955             :     else
    2956           4 :         LocInfo = CCValAssign::AExt;
    2957             :   }
    2958             : 
    2959         356 :   if (LocVT == MVT::v32i1) {
    2960           4 :     LocVT = MVT::i32;
    2961           4 :     if (ArgFlags.isSExt())
    2962           0 :         LocInfo = CCValAssign::SExt;
    2963           4 :     else if (ArgFlags.isZExt())
    2964           0 :         LocInfo = CCValAssign::ZExt;
    2965             :     else
    2966           4 :         LocInfo = CCValAssign::AExt;
    2967             :   }
    2968             : 
    2969         356 :   if (LocVT == MVT::i8) {
    2970             :     static const MCPhysReg RegList1[] = {
    2971             :       X86::AL, X86::CL, X86::DL, X86::DIL, X86::SIL
    2972             :     };
    2973          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2974          84 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2975          28 :       return false;
    2976             :     }
    2977             :   }
    2978             : 
    2979         300 :   if (LocVT == MVT::i16) {
    2980             :     static const MCPhysReg RegList2[] = {
    2981             :       X86::AX, X86::CX, X86::DX, X86::DI, X86::SI
    2982             :     };
    2983          14 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2984          42 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2985          14 :       return false;
    2986             :     }
    2987             :   }
    2988             : 
    2989         272 :   if (LocVT == MVT::i32) {
    2990             :     static const MCPhysReg RegList3[] = {
    2991             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
    2992             :     };
    2993          60 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2994         180 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2995          60 :       return false;
    2996             :     }
    2997             :   }
    2998             : 
    2999         152 :   if (LocVT == MVT::i64) {
    3000           0 :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    3001           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3002           0 :       return false;
    3003             :     }
    3004             :   }
    3005             : 
    3006          76 :   if (LocVT == MVT::v64i1) {
    3007           4 :     LocVT = MVT::i64;
    3008           4 :     if (ArgFlags.isSExt())
    3009           0 :         LocInfo = CCValAssign::SExt;
    3010           4 :     else if (ArgFlags.isZExt())
    3011           0 :         LocInfo = CCValAssign::ZExt;
    3012             :     else
    3013           4 :         LocInfo = CCValAssign::AExt;
    3014             :   }
    3015             : 
    3016          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    3017           0 :     if (LocVT == MVT::i64) {
    3018           0 :       if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    3019           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3020           0 :         return false;
    3021             :       }
    3022             :     }
    3023             :   }
    3024             : 
    3025          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    3026         152 :     if (LocVT == MVT::i64) {
    3027           4 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3028             :             return false;
    3029             :     }
    3030             :   }
    3031             : 
    3032         144 :   if (LocVT == MVT::f80) {
    3033             :     static const MCPhysReg RegList4[] = {
    3034             :       X86::FP0, X86::FP1
    3035             :     };
    3036           6 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3037          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3038           6 :       return false;
    3039             :     }
    3040             :   }
    3041             : 
    3042         190 :   if (LocVT == MVT::f32 ||
    3043         116 :       LocVT == MVT::f64 ||
    3044          50 :       LocVT == MVT::f128) {
    3045          32 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3046             :       static const MCPhysReg RegList5[] = {
    3047             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
    3048             :       };
    3049          16 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    3050          48 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3051          16 :         return false;
    3052             :       }
    3053             :     }
    3054             :   }
    3055             : 
    3056         150 :   if (LocVT == MVT::v16i8 ||
    3057         100 :       LocVT == MVT::v8i16 ||
    3058          94 :       LocVT == MVT::v4i32 ||
    3059          88 :       LocVT == MVT::v2i64 ||
    3060         114 :       LocVT == MVT::v4f32 ||
    3061          20 :       LocVT == MVT::v2f64) {
    3062          60 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3063             :       static const MCPhysReg RegList6[] = {
    3064             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
    3065             :       };
    3066          30 :       if (unsigned Reg = State.AllocateReg(RegList6)) {
    3067          90 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3068          30 :         return false;
    3069             :       }
    3070             :     }
    3071             :   }
    3072             : 
    3073          60 :   if (LocVT == MVT::v32i8 ||
    3074          40 :       LocVT == MVT::v16i16 ||
    3075          34 :       LocVT == MVT::v8i32 ||
    3076          28 :       LocVT == MVT::v4i64 ||
    3077          48 :       LocVT == MVT::v8f32 ||
    3078          14 :       LocVT == MVT::v4f64) {
    3079          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    3080             :       static const MCPhysReg RegList7[] = {
    3081             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
    3082             :       };
    3083           6 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    3084          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3085           6 :         return false;
    3086             :       }
    3087             :     }
    3088             :   }
    3089             : 
    3090          42 :   if (LocVT == MVT::v64i8 ||
    3091          28 :       LocVT == MVT::v32i16 ||
    3092          22 :       LocVT == MVT::v16i32 ||
    3093          16 :       LocVT == MVT::v8i64 ||
    3094          22 :       LocVT == MVT::v16f32 ||
    3095           0 :       LocVT == MVT::v8f64) {
    3096          28 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    3097             :       static const MCPhysReg RegList8[] = {
    3098             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
    3099             :       };
    3100          14 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    3101          42 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3102          14 :         return false;
    3103             :       }
    3104             :     }
    3105             :   }
    3106             : 
    3107             :   return true;  // CC didn't match.
    3108             : }
    3109             : 
    3110             : 
    3111          80 : static bool RetCC_X86_32_VectorCall(unsigned ValNo, MVT ValVT,
    3112             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    3113             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3114             : 
    3115         160 :   if (LocVT == MVT::f32 ||
    3116         132 :       LocVT == MVT::f64 ||
    3117          52 :       LocVT == MVT::f128) {
    3118             :     static const MCPhysReg RegList1[] = {
    3119             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3120             :     };
    3121          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3122          48 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3123          24 :       return false;
    3124             :     }
    3125             :   }
    3126             : 
    3127          56 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3128             :     return false;
    3129             : 
    3130           4 :   return true;  // CC didn't match.
    3131             : }
    3132             : 
    3133             : 
    3134      121266 : static bool RetCC_X86_64(unsigned ValNo, MVT ValVT,
    3135             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
    3136             :                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3137             : 
    3138      121266 :   if (State.getCallingConv() == CallingConv::HiPE) {
    3139          28 :     if (!RetCC_X86_64_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3140             :       return false;
    3141             :   }
    3142             : 
    3143      121238 :   if (State.getCallingConv() == CallingConv::WebKit_JS) {
    3144          20 :     if (!RetCC_X86_64_WebKit_JS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3145             :       return false;
    3146             :   }
    3147             : 
    3148      121218 :   if (State.getCallingConv() == CallingConv::AnyReg) {
    3149           0 :     if (!RetCC_X86_64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3150             :       return false;
    3151             :   }
    3152             : 
    3153      121218 :   if (State.getCallingConv() == CallingConv::Swift) {
    3154         407 :     if (!RetCC_X86_64_Swift(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3155             :       return false;
    3156             :   }
    3157             : 
    3158      120816 :   if (State.getCallingConv() == CallingConv::Win64) {
    3159             :     if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3160             :       return false;
    3161             :   }
    3162             : 
    3163      120780 :   if (State.getCallingConv() == CallingConv::X86_64_SysV) {
    3164           8 :     if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3165             :       return false;
    3166             :   }
    3167             : 
    3168      120772 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
    3169          60 :     if (!RetCC_X86_64_Vectorcall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3170             :       return false;
    3171             :   }
    3172             : 
    3173      120714 :   if (State.getCallingConv() == CallingConv::HHVM) {
    3174          70 :     if (!RetCC_X86_64_HHVM(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3175             :       return false;
    3176             :   }
    3177             : 
    3178      120644 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    3179         490 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    3180         166 :       if (!RetCC_X86_Win64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3181             :         return false;
    3182             :     }
    3183             :   }
    3184             : 
    3185      120478 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    3186         158 :     if (!RetCC_X86_SysV64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3187             :       return false;
    3188             :   }
    3189             : 
    3190      122078 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    3191             :     if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3192             :       return false;
    3193             :   }
    3194             : 
    3195      118564 :   if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3196             :     return false;
    3197             : 
    3198         133 :   return true;  // CC didn't match.
    3199             : }
    3200             : 
    3201             : 
    3202             : static bool RetCC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
    3203             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
    3204             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3205             : 
    3206           0 :   if (CC_X86_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3207             :     return false;
    3208             : 
    3209             :   return true;  // CC didn't match.
    3210             : }
    3211             : 
    3212             : 
    3213      120402 : static bool RetCC_X86_64_C(unsigned ValNo, MVT ValVT,
    3214             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    3215             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3216             : 
    3217      120402 :   if (LocVT == MVT::f32) {
    3218             :     static const MCPhysReg RegList1[] = {
    3219             :       X86::XMM0, X86::XMM1
    3220             :     };
    3221        1829 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3222        3658 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3223        1829 :       return false;
    3224             :     }
    3225             :   }
    3226             : 
    3227      118573 :   if (LocVT == MVT::f64) {
    3228             :     static const MCPhysReg RegList2[] = {
    3229             :       X86::XMM0, X86::XMM1
    3230             :     };
    3231        2129 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3232        4238 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3233        2119 :       return false;
    3234             :     }
    3235             :   }
    3236             : 
    3237      116454 :   if (LocVT == MVT::f128) {
    3238             :     static const MCPhysReg RegList3[] = {
    3239             :       X86::XMM0, X86::XMM1
    3240             :     };
    3241         208 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3242         416 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3243         208 :       return false;
    3244             :     }
    3245             :   }
    3246             : 
    3247      116246 :   if (LocVT == MVT::x86mmx) {
    3248             :     static const MCPhysReg RegList4[] = {
    3249             :       X86::XMM0, X86::XMM1
    3250             :     };
    3251         204 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3252         408 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3253         204 :       return false;
    3254             :     }
    3255             :   }
    3256             : 
    3257      116042 :   if (ArgFlags.isSwiftError()) {
    3258          26 :     if (LocVT == MVT::i64) {
    3259          26 :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    3260          52 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3261          26 :         return false;
    3262             :       }
    3263             :     }
    3264             :   }
    3265             : 
    3266      116016 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3267             :     return false;
    3268             : 
    3269         137 :   return true;  // CC didn't match.
    3270             : }
    3271             : 
    3272             : 
    3273          70 : static bool RetCC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
    3274             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    3275             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3276             : 
    3277         140 :   if (LocVT == MVT::i8 ||
    3278         140 :       LocVT == MVT::i16 ||
    3279          70 :       LocVT == MVT::i32) {
    3280           0 :     LocVT = MVT::i64;
    3281           0 :     if (ArgFlags.isSExt())
    3282             :         LocInfo = CCValAssign::SExt;
    3283           0 :     else if (ArgFlags.isZExt())
    3284             :         LocInfo = CCValAssign::ZExt;
    3285             :     else
    3286           0 :         LocInfo = CCValAssign::AExt;
    3287             :   }
    3288             : 
    3289          70 :   if (LocVT == MVT::i64) {
    3290             :     static const MCPhysReg RegList1[] = {
    3291             :       X86::RBX, X86::RBP, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11, X86::R13, X86::R14, X86::R15
    3292             :     };
    3293          70 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3294         140 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3295          70 :       return false;
    3296             :     }
    3297             :   }
    3298             : 
    3299             :   return true;  // CC didn't match.
    3300             : }
    3301             : 
    3302             : 
    3303          28 : static bool RetCC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
    3304             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    3305             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3306             : 
    3307          56 :   if (LocVT == MVT::i8 ||
    3308          56 :       LocVT == MVT::i16 ||
    3309          28 :       LocVT == MVT::i32) {
    3310          10 :     LocVT = MVT::i64;
    3311          10 :     if (ArgFlags.isSExt())
    3312             :         LocInfo = CCValAssign::SExt;
    3313          10 :     else if (ArgFlags.isZExt())
    3314             :         LocInfo = CCValAssign::ZExt;
    3315             :     else
    3316          10 :         LocInfo = CCValAssign::AExt;
    3317             :   }
    3318             : 
    3319          28 :   if (LocVT == MVT::i64) {
    3320             :     static const MCPhysReg RegList1[] = {
    3321             :       X86::R15, X86::RBP, X86::RAX, X86::RDX
    3322             :     };
    3323          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3324          56 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3325          28 :       return false;
    3326             :     }
    3327             :   }
    3328             : 
    3329             :   return true;  // CC didn't match.
    3330             : }
    3331             : 
    3332             : 
    3333         407 : static bool RetCC_X86_64_Swift(unsigned ValNo, MVT ValVT,
    3334             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
    3335             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3336             : 
    3337         407 :   if (ArgFlags.isSwiftError()) {
    3338          52 :     if (LocVT == MVT::i64) {
    3339          52 :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    3340         104 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3341          52 :         return false;
    3342             :       }
    3343             :     }
    3344             :   }
    3345             : 
    3346         355 :   if (LocVT == MVT::v1i1) {
    3347           0 :     LocVT = MVT::i8;
    3348           0 :     if (ArgFlags.isSExt())
    3349             :         LocInfo = CCValAssign::SExt;
    3350           0 :     else if (ArgFlags.isZExt())
    3351             :         LocInfo = CCValAssign::ZExt;
    3352             :     else
    3353           0 :         LocInfo = CCValAssign::AExt;
    3354             :   }
    3355             : 
    3356         355 :   if (LocVT == MVT::i1) {
    3357           0 :     LocVT = MVT::i8;
    3358           0 :     if (ArgFlags.isSExt())
    3359             :         LocInfo = CCValAssign::SExt;
    3360           0 :     else if (ArgFlags.isZExt())
    3361             :         LocInfo = CCValAssign::ZExt;
    3362             :     else
    3363           0 :         LocInfo = CCValAssign::AExt;
    3364             :   }
    3365             : 
    3366         355 :   if (LocVT == MVT::i8) {
    3367             :     static const MCPhysReg RegList1[] = {
    3368             :       X86::AL, X86::DL, X86::CL, X86::R8B
    3369             :     };
    3370          36 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3371          72 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3372          36 :       return false;
    3373             :     }
    3374             :   }
    3375             : 
    3376         319 :   if (LocVT == MVT::i16) {
    3377             :     static const MCPhysReg RegList2[] = {
    3378             :       X86::AX, X86::DX, X86::CX, X86::R8W
    3379             :     };
    3380           4 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3381           8 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3382           4 :       return false;
    3383             :     }
    3384             :   }
    3385             : 
    3386         315 :   if (LocVT == MVT::i32) {
    3387             :     static const MCPhysReg RegList3[] = {
    3388             :       X86::EAX, X86::EDX, X86::ECX, X86::R8D
    3389             :     };
    3390          69 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3391         128 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3392          64 :       return false;
    3393             :     }
    3394             :   }
    3395             : 
    3396         251 :   if (LocVT == MVT::i64) {
    3397             :     static const MCPhysReg RegList4[] = {
    3398             :       X86::RAX, X86::RDX, X86::RCX, X86::R8
    3399             :     };
    3400         100 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3401         200 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3402         100 :       return false;
    3403             :     }
    3404             :   }
    3405             : 
    3406         151 :   if (LocVT == MVT::f32) {
    3407             :     static const MCPhysReg RegList5[] = {
    3408             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3409             :     };
    3410          54 :     if (unsigned Reg = State.AllocateReg(RegList5)) {
    3411         108 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3412          54 :       return false;
    3413             :     }
    3414             :   }
    3415             : 
    3416          97 :   if (LocVT == MVT::f64) {
    3417             :     static const MCPhysReg RegList6[] = {
    3418             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3419             :     };
    3420          56 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    3421         112 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3422          56 :       return false;
    3423             :     }
    3424             :   }
    3425             : 
    3426          41 :   if (LocVT == MVT::f128) {
    3427             :     static const MCPhysReg RegList7[] = {
    3428             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3429             :     };
    3430           0 :     if (unsigned Reg = State.AllocateReg(RegList7)) {
    3431           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3432           0 :       return false;
    3433             :     }
    3434             :   }
    3435             : 
    3436          41 :   if (LocVT == MVT::x86mmx) {
    3437             :     static const MCPhysReg RegList8[] = {
    3438             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3439             :     };
    3440           0 :     if (unsigned Reg = State.AllocateReg(RegList8)) {
    3441           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3442           0 :       return false;
    3443             :     }
    3444             :   }
    3445             : 
    3446          41 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3447             :     return false;
    3448             : 
    3449           5 :   return true;  // CC didn't match.
    3450             : }
    3451             : 
    3452             : 
    3453          60 : static bool RetCC_X86_64_Vectorcall(unsigned ValNo, MVT ValVT,
    3454             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    3455             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3456             : 
    3457         120 :   if (LocVT == MVT::f32 ||
    3458          94 :       LocVT == MVT::f64 ||
    3459          34 :       LocVT == MVT::f128) {
    3460             :     static const MCPhysReg RegList1[] = {
    3461             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3462             :     };
    3463          26 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3464          48 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3465          24 :       return false;
    3466             :     }
    3467             :   }
    3468             : 
    3469          34 :   if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3470             :     return false;
    3471             : 
    3472             :   return true;  // CC didn't match.
    3473             : }
    3474             : 
    3475             : 
    3476          20 : static bool RetCC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
    3477             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
    3478             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3479             : 
    3480          40 :   if (LocVT == MVT::i8 ||
    3481          40 :       LocVT == MVT::i16 ||
    3482          20 :       LocVT == MVT::i32) {
    3483           8 :     LocVT = MVT::i64;
    3484           8 :     if (ArgFlags.isSExt())
    3485             :         LocInfo = CCValAssign::SExt;
    3486           8 :     else if (ArgFlags.isZExt())
    3487             :         LocInfo = CCValAssign::ZExt;
    3488             :     else
    3489           8 :         LocInfo = CCValAssign::AExt;
    3490             :   }
    3491             : 
    3492          20 :   if (LocVT == MVT::i64) {
    3493          20 :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    3494          40 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3495          20 :       return false;
    3496             :     }
    3497             :   }
    3498             : 
    3499             :   return true;  // CC didn't match.
    3500             : }
    3501             : 
    3502             : 
    3503         158 : static bool RetCC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
    3504             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
    3505             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3506             : 
    3507         474 :   if (LocVT == MVT::i1 ||
    3508         316 :       LocVT == MVT::v1i1 ||
    3509         158 :       LocVT == MVT::v8i1) {
    3510           4 :     LocVT = MVT::i8;
    3511           4 :     if (ArgFlags.isSExt())
    3512           0 :         LocInfo = CCValAssign::SExt;
    3513           4 :     else if (ArgFlags.isZExt())
    3514           0 :         LocInfo = CCValAssign::ZExt;
    3515             :     else
    3516           4 :         LocInfo = CCValAssign::AExt;
    3517             :   }
    3518             : 
    3519         316 :   if (LocVT == MVT::v16i1) {
    3520           4 :     LocVT = MVT::i16;
    3521           4 :     if (ArgFlags.isSExt())
    3522           0 :         LocInfo = CCValAssign::SExt;
    3523           4 :     else if (ArgFlags.isZExt())
    3524           0 :         LocInfo = CCValAssign::ZExt;
    3525             :     else
    3526           4 :         LocInfo = CCValAssign::AExt;
    3527             :   }
    3528             : 
    3529         316 :   if (LocVT == MVT::v32i1) {
    3530           4 :     LocVT = MVT::i32;
    3531           4 :     if (ArgFlags.isSExt())
    3532           0 :         LocInfo = CCValAssign::SExt;
    3533           4 :     else if (ArgFlags.isZExt())
    3534           0 :         LocInfo = CCValAssign::ZExt;
    3535             :     else
    3536           4 :         LocInfo = CCValAssign::AExt;
    3537             :   }
    3538             : 
    3539         316 :   if (LocVT == MVT::i8) {
    3540             :     static const MCPhysReg RegList1[] = {
    3541             :       X86::AL, X86::CL, X86::DL, X86::DIL, X86::SIL, X86::R8B, X86::R9B, X86::R12B, X86::R13B, X86::R14B, X86::R15B
    3542             :     };
    3543          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3544          84 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3545          28 :       return false;
    3546             :     }
    3547             :   }
    3548             : 
    3549         260 :   if (LocVT == MVT::i16) {
    3550             :     static const MCPhysReg RegList2[] = {
    3551             :       X86::AX, X86::CX, X86::DX, X86::DI, X86::SI, X86::R8W, X86::R9W, X86::R12W, X86::R13W, X86::R14W, X86::R15W
    3552             :     };
    3553          14 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3554          42 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3555          14 :       return false;
    3556             :     }
    3557             :   }
    3558             : 
    3559         232 :   if (LocVT == MVT::i32) {
    3560             :     static const MCPhysReg RegList3[] = {
    3561             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
    3562             :     };
    3563          22 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3564          66 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3565          22 :       return false;
    3566             :     }
    3567             :   }
    3568             : 
    3569         188 :   if (LocVT == MVT::i64) {
    3570             :     static const MCPhysReg RegList4[] = {
    3571             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    3572             :     };
    3573          18 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3574          54 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3575          18 :       return false;
    3576             :     }
    3577             :   }
    3578             : 
    3579         152 :   if (LocVT == MVT::v64i1) {
    3580           4 :     LocVT = MVT::i64;
    3581           4 :     if (ArgFlags.isSExt())
    3582           0 :         LocInfo = CCValAssign::SExt;
    3583           4 :     else if (ArgFlags.isZExt())
    3584           0 :         LocInfo = CCValAssign::ZExt;
    3585             :     else
    3586           4 :         LocInfo = CCValAssign::AExt;
    3587             :   }
    3588             : 
    3589          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    3590         152 :     if (LocVT == MVT::i64) {
    3591             :       static const MCPhysReg RegList5[] = {
    3592             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    3593             :       };
    3594           4 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    3595          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3596           4 :         return false;
    3597             :       }
    3598             :     }
    3599             :   }
    3600             : 
    3601          72 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    3602           0 :     if (LocVT == MVT::i64) {
    3603           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3604             :             return false;
    3605             :     }
    3606             :   }
    3607             : 
    3608         144 :   if (LocVT == MVT::f80) {
    3609             :     static const MCPhysReg RegList6[] = {
    3610             :       X86::FP0, X86::FP1
    3611             :     };
    3612           6 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    3613          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3614           6 :       return false;
    3615             :     }
    3616             :   }
    3617             : 
    3618         190 :   if (LocVT == MVT::f32 ||
    3619         116 :       LocVT == MVT::f64 ||
    3620          50 :       LocVT == MVT::f128) {
    3621          32 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3622             :       static const MCPhysReg RegList7[] = {
    3623             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3624             :       };
    3625          16 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    3626          48 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3627          16 :         return false;
    3628             :       }
    3629             :     }
    3630             :   }
    3631             : 
    3632         150 :   if (LocVT == MVT::v16i8 ||
    3633         100 :       LocVT == MVT::v8i16 ||
    3634          94 :       LocVT == MVT::v4i32 ||
    3635          88 :       LocVT == MVT::v2i64 ||
    3636         114 :       LocVT == MVT::v4f32 ||
    3637          20 :       LocVT == MVT::v2f64) {
    3638          60 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3639             :       static const MCPhysReg RegList8[] = {
    3640             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3641             :       };
    3642          30 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    3643          90 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3644          30 :         return false;
    3645             :       }
    3646             :     }
    3647             :   }
    3648             : 
    3649          60 :   if (LocVT == MVT::v32i8 ||
    3650          40 :       LocVT == MVT::v16i16 ||
    3651          34 :       LocVT == MVT::v8i32 ||
    3652          28 :       LocVT == MVT::v4i64 ||
    3653          48 :       LocVT == MVT::v8f32 ||
    3654          14 :       LocVT == MVT::v4f64) {
    3655          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    3656             :       static const MCPhysReg RegList9[] = {
    3657             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    3658             :       };
    3659           6 :       if (unsigned Reg = State.AllocateReg(RegList9)) {
    3660          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3661           6 :         return false;
    3662             :       }
    3663             :     }
    3664             :   }
    3665             : 
    3666          42 :   if (LocVT == MVT::v64i8 ||
    3667          28 :       LocVT == MVT::v32i16 ||
    3668          22 :       LocVT == MVT::v16i32 ||
    3669          16 :       LocVT == MVT::v8i64 ||
    3670          22 :       LocVT == MVT::v16f32 ||
    3671           0 :       LocVT == MVT::v8f64) {
    3672          28 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    3673             :       static const MCPhysReg RegList10[] = {
    3674             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    3675             :       };
    3676          14 :       if (unsigned Reg = State.AllocateReg(RegList10)) {
    3677          42 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3678          14 :         return false;
    3679             :       }
    3680             :     }
    3681             :   }
    3682             : 
    3683             :   return true;  // CC didn't match.
    3684             : }
    3685             : 
    3686             : 
    3687             : static bool RetCC_X86_Win64_C(unsigned ValNo, MVT ValVT,
    3688             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    3689             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3690             : 
    3691        1830 :   if (LocVT == MVT::x86mmx) {
    3692           0 :     LocVT = MVT::i64;
    3693           0 :     LocInfo = CCValAssign::BCvt;
    3694             :   }
    3695             : 
    3696        1830 :   if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3697             :     return false;
    3698             : 
    3699             :   return true;  // CC didn't match.
    3700             : }
    3701             : 
    3702             : 
    3703         166 : static bool RetCC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
    3704             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    3705             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3706             : 
    3707         498 :   if (LocVT == MVT::i1 ||
    3708         332 :       LocVT == MVT::v1i1 ||
    3709         166 :       LocVT == MVT::v8i1) {
    3710           4 :     LocVT = MVT::i8;
    3711           4 :     if (ArgFlags.isSExt())
    3712           0 :         LocInfo = CCValAssign::SExt;
    3713           4 :     else if (ArgFlags.isZExt())
    3714           0 :         LocInfo = CCValAssign::ZExt;
    3715             :     else
    3716           4 :         LocInfo = CCValAssign::AExt;
    3717             :   }
    3718             : 
    3719         332 :   if (LocVT == MVT::v16i1) {
    3720           4 :     LocVT = MVT::i16;
    3721           4 :     if (ArgFlags.isSExt())
    3722           0 :         LocInfo = CCValAssign::SExt;
    3723           4 :     else if (ArgFlags.isZExt())
    3724           0 :         LocInfo = CCValAssign::ZExt;
    3725             :     else
    3726           4 :         LocInfo = CCValAssign::AExt;
    3727             :   }
    3728             : 
    3729         332 :   if (LocVT == MVT::v32i1) {
    3730           4 :     LocVT = MVT::i32;
    3731           4 :     if (ArgFlags.isSExt())
    3732           0 :         LocInfo = CCValAssign::SExt;
    3733           4 :     else if (ArgFlags.isZExt())
    3734           0 :         LocInfo = CCValAssign::ZExt;
    3735             :     else
    3736           4 :         LocInfo = CCValAssign::AExt;
    3737             :   }
    3738             : 
    3739         332 :   if (LocVT == MVT::i8) {
    3740             :     static const MCPhysReg RegList1[] = {
    3741             :       X86::AL, X86::CL, X86::DL, X86::DIL, X86::SIL, X86::R8B, X86::R9B, X86::R10B, X86::R11B, X86::R12B, X86::R14B, X86::R15B
    3742             :     };
    3743          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3744          84 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3745          28 :       return false;
    3746             :     }
    3747             :   }
    3748             : 
    3749         276 :   if (LocVT == MVT::i16) {
    3750             :     static const MCPhysReg RegList2[] = {
    3751             :       X86::AX, X86::CX, X86::DX, X86::DI, X86::SI, X86::R8W, X86::R9W, X86::R10W, X86::R11W, X86::R12W, X86::R14W, X86::R15W
    3752             :     };
    3753          14 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3754          42 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3755          14 :       return false;
    3756             :     }
    3757             :   }
    3758             : 
    3759         248 :   if (LocVT == MVT::i32) {
    3760             :     static const MCPhysReg RegList3[] = {
    3761             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
    3762             :     };
    3763          30 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3764          90 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3765          30 :       return false;
    3766             :     }
    3767             :   }
    3768             : 
    3769         188 :   if (LocVT == MVT::i64) {
    3770             :     static const MCPhysReg RegList4[] = {
    3771             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    3772             :     };
    3773          18 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3774          54 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3775          18 :       return false;
    3776             :     }
    3777             :   }
    3778             : 
    3779         152 :   if (LocVT == MVT::v64i1) {
    3780           4 :     LocVT = MVT::i64;
    3781           4 :     if (ArgFlags.isSExt())
    3782           0 :         LocInfo = CCValAssign::SExt;
    3783           4 :     else if (ArgFlags.isZExt())
    3784           0 :         LocInfo = CCValAssign::ZExt;
    3785             :     else
    3786           4 :         LocInfo = CCValAssign::AExt;
    3787             :   }
    3788             : 
    3789          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    3790         152 :     if (LocVT == MVT::i64) {
    3791             :       static const MCPhysReg RegList5[] = {
    3792             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    3793             :       };
    3794           4 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    3795          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3796           4 :         return false;
    3797             :       }
    3798             :     }
    3799             :   }
    3800             : 
    3801          72 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    3802           0 :     if (LocVT == MVT::i64) {
    3803           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3804             :             return false;
    3805             :     }
    3806             :   }
    3807             : 
    3808         144 :   if (LocVT == MVT::f80) {
    3809             :     static const MCPhysReg RegList6[] = {
    3810             :       X86::FP0, X86::FP1
    3811             :     };
    3812           6 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    3813          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3814           6 :       return false;
    3815             :     }
    3816             :   }
    3817             : 
    3818         190 :   if (LocVT == MVT::f32 ||
    3819         116 :       LocVT == MVT::f64 ||
    3820          50 :       LocVT == MVT::f128) {
    3821          32 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3822             :       static const MCPhysReg RegList7[] = {
    3823             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3824             :       };
    3825          16 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    3826          48 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3827          16 :         return false;
    3828             :       }
    3829             :     }
    3830             :   }
    3831             : 
    3832         150 :   if (LocVT == MVT::v16i8 ||
    3833         100 :       LocVT == MVT::v8i16 ||
    3834          94 :       LocVT == MVT::v4i32 ||
    3835          88 :       LocVT == MVT::v2i64 ||
    3836         114 :       LocVT == MVT::v4f32 ||
    3837          20 :       LocVT == MVT::v2f64) {
    3838          60 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3839             :       static const MCPhysReg RegList8[] = {
    3840             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3841             :       };
    3842          30 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    3843          90 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3844          30 :         return false;
    3845             :       }
    3846             :     }
    3847             :   }
    3848             : 
    3849          60 :   if (LocVT == MVT::v32i8 ||
    3850          40 :       LocVT == MVT::v16i16 ||
    3851          34 :       LocVT == MVT::v8i32 ||
    3852          28 :       LocVT == MVT::v4i64 ||
    3853          48 :       LocVT == MVT::v8f32 ||
    3854          14 :       LocVT == MVT::v4f64) {
    3855          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    3856             :       static const MCPhysReg RegList9[] = {
    3857             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    3858             :       };
    3859           6 :       if (unsigned Reg = State.AllocateReg(RegList9)) {
    3860          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3861           6 :         return false;
    3862             :       }
    3863             :     }
    3864             :   }
    3865             : 
    3866          42 :   if (LocVT == MVT::v64i8 ||
    3867          28 :       LocVT == MVT::v32i16 ||
    3868          22 :       LocVT == MVT::v16i32 ||
    3869          16 :       LocVT == MVT::v8i64 ||
    3870          22 :       LocVT == MVT::v16f32 ||
    3871           0 :       LocVT == MVT::v8f64) {
    3872          28 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    3873             :       static const MCPhysReg RegList10[] = {
    3874             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    3875             :       };
    3876          14 :       if (unsigned Reg = State.AllocateReg(RegList10)) {
    3877          42 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3878          14 :         return false;
    3879             :       }
    3880             :     }
    3881             :   }
    3882             : 
    3883             :   return true;  // CC didn't match.
    3884             : }

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