LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/X86 - X86GenCallingConv.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1416 1637 86.5 %
Date: 2018-06-17 00:07:59 Functions: 54 62 87.1 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Calling Convention Implementation Fragment                                 *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : static bool CC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
      10             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
      11             :                             ISD::ArgFlagsTy ArgFlags, CCState &State);
      12             : static bool CC_X86(unsigned ValNo, MVT ValVT,
      13             :                    MVT LocVT, CCValAssign::LocInfo LocInfo,
      14             :                    ISD::ArgFlagsTy ArgFlags, CCState &State);
      15             : static bool CC_X86_32(unsigned ValNo, MVT ValVT,
      16             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      17             :                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      18             : static bool CC_X86_32_C(unsigned ValNo, MVT ValVT,
      19             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
      20             :                         ISD::ArgFlagsTy ArgFlags, CCState &State);
      21             : static bool CC_X86_32_Common(unsigned ValNo, MVT ValVT,
      22             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      23             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      24             : static bool CC_X86_32_FastCC(unsigned ValNo, MVT ValVT,
      25             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      26             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      27             : static bool CC_X86_32_FastCall(unsigned ValNo, MVT ValVT,
      28             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
      29             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
      30             : static bool CC_X86_32_GHC(unsigned ValNo, MVT ValVT,
      31             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
      32             :                           ISD::ArgFlagsTy ArgFlags, CCState &State);
      33             : static bool CC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
      34             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      35             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      36             : static bool CC_X86_32_Intr(unsigned ValNo, MVT ValVT,
      37             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      38             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      39             : static bool CC_X86_32_MCU(unsigned ValNo, MVT ValVT,
      40             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
      41             :                           ISD::ArgFlagsTy ArgFlags, CCState &State);
      42             : static bool CC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
      43             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
      44             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
      45             : static bool CC_X86_32_ThisCall(unsigned ValNo, MVT ValVT,
      46             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
      47             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
      48             : static bool CC_X86_32_ThisCall_Common(unsigned ValNo, MVT ValVT,
      49             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      50             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      51             : static bool CC_X86_32_ThisCall_Mingw(unsigned ValNo, MVT ValVT,
      52             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
      53             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State);
      54             : static bool CC_X86_32_ThisCall_Win(unsigned ValNo, MVT ValVT,
      55             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
      56             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State);
      57             : static bool CC_X86_32_Vector_Common(unsigned ValNo, MVT ValVT,
      58             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
      59             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
      60             : static bool CC_X86_32_Vector_Darwin(unsigned ValNo, MVT ValVT,
      61             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
      62             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
      63             : static bool CC_X86_32_Vector_Standard(unsigned ValNo, MVT ValVT,
      64             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      65             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      66             : static bool CC_X86_64(unsigned ValNo, MVT ValVT,
      67             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
      68             :                       ISD::ArgFlagsTy ArgFlags, CCState &State);
      69             : static bool CC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
      70             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      71             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      72             : static bool CC_X86_64_C(unsigned ValNo, MVT ValVT,
      73             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
      74             :                         ISD::ArgFlagsTy ArgFlags, CCState &State);
      75             : static bool CC_X86_64_GHC(unsigned ValNo, MVT ValVT,
      76             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
      77             :                           ISD::ArgFlagsTy ArgFlags, CCState &State);
      78             : static bool CC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
      79             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      80             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      81             : static bool CC_X86_64_HHVM_C(unsigned ValNo, MVT ValVT,
      82             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
      83             :                              ISD::ArgFlagsTy ArgFlags, CCState &State);
      84             : static bool CC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
      85             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      86             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      87             : static bool CC_X86_64_Intr(unsigned ValNo, MVT ValVT,
      88             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
      89             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
      90             : static bool CC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
      91             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
      92             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
      93             : static bool CC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
      94             :                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
      95             :                                   ISD::ArgFlagsTy ArgFlags, CCState &State);
      96             : static bool CC_X86_Win32_VectorCall(unsigned ValNo, MVT ValVT,
      97             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
      98             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
      99             : static bool CC_X86_Win64_C(unsigned ValNo, MVT ValVT,
     100             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     101             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
     102             : static bool CC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
     103             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
     104             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State);
     105             : static bool CC_X86_Win64_VectorCall(unsigned ValNo, MVT ValVT,
     106             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     107             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     108             : static bool RetCC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
     109             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
     110             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
     111             : static bool RetCC_X86(unsigned ValNo, MVT ValVT,
     112             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
     113             :                       ISD::ArgFlagsTy ArgFlags, CCState &State);
     114             : static bool RetCC_X86Common(unsigned ValNo, MVT ValVT,
     115             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
     116             :                             ISD::ArgFlagsTy ArgFlags, CCState &State);
     117             : static bool RetCC_X86_32(unsigned ValNo, MVT ValVT,
     118             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
     119             :                          ISD::ArgFlagsTy ArgFlags, CCState &State);
     120             : static bool RetCC_X86_32_C(unsigned ValNo, MVT ValVT,
     121             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     122             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
     123             : static bool RetCC_X86_32_Fast(unsigned ValNo, MVT ValVT,
     124             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     125             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     126             : static bool RetCC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
     127             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     128             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     129             : static bool RetCC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
     130             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
     131             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State);
     132             : static bool RetCC_X86_32_VectorCall(unsigned ValNo, MVT ValVT,
     133             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     134             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     135             : static bool RetCC_X86_64(unsigned ValNo, MVT ValVT,
     136             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
     137             :                          ISD::ArgFlagsTy ArgFlags, CCState &State);
     138             : static bool RetCC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
     139             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
     140             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State);
     141             : static bool RetCC_X86_64_C(unsigned ValNo, MVT ValVT,
     142             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     143             :                            ISD::ArgFlagsTy ArgFlags, CCState &State);
     144             : static bool RetCC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
     145             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     146             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     147             : static bool RetCC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
     148             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     149             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     150             : static bool RetCC_X86_64_Swift(unsigned ValNo, MVT ValVT,
     151             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
     152             :                                ISD::ArgFlagsTy ArgFlags, CCState &State);
     153             : static bool RetCC_X86_64_Vectorcall(unsigned ValNo, MVT ValVT,
     154             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     155             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     156             : static bool RetCC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
     157             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
     158             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State);
     159             : static bool RetCC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
     160             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
     161             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State);
     162             : static bool RetCC_X86_Win64_C(unsigned ValNo, MVT ValVT,
     163             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     164             :                               ISD::ArgFlagsTy ArgFlags, CCState &State);
     165             : static bool RetCC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
     166             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
     167             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State);
     168             : 
     169             : 
     170         238 : static bool CC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
     171             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
     172             :                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
     173             : 
     174         238 :   if (LocVT == MVT::i32) {
     175          22 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
     176             :       static const MCPhysReg RegList1[] = {
     177             :         X86::ECX, X86::EDX, X86::R8D, X86::R9D
     178             :       };
     179           2 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
     180           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     181           2 :         return false;
     182             :       }
     183             :     }
     184             :   }
     185             : 
     186         236 :   if (LocVT == MVT::i64) {
     187          16 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
     188             :       static const MCPhysReg RegList2[] = {
     189             :         X86::RCX, X86::RDX, X86::R8, X86::R9
     190             :       };
     191           8 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     192          16 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     193           8 :         return false;
     194             :       }
     195             :     }
     196             :   }
     197             : 
     198         228 :   if (LocVT == MVT::i32) {
     199          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     200             :       static const MCPhysReg RegList3[] = {
     201             :         X86::EDI, X86::ESI, X86::EDX, X86::ECX
     202             :       };
     203           2 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
     204           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     205           2 :         return false;
     206             :       }
     207             :     }
     208             :   }
     209             : 
     210         226 :   if (LocVT == MVT::i64) {
     211           8 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     212             :       static const MCPhysReg RegList4[] = {
     213             :         X86::RDI, X86::RSI, X86::RDX, X86::RCX
     214             :       };
     215           8 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
     216          16 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     217           8 :         return false;
     218             :       }
     219             :     }
     220             :   }
     221             : 
     222         218 :   if (LocVT == MVT::i32) {
     223          18 :     unsigned Offset5 = State.AllocateStack(4, 4);
     224          36 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
     225          18 :     return false;
     226             :   }
     227             : 
     228         200 :   if (LocVT == MVT::f32 ||
     229         200 :       LocVT == MVT::f64 ||
     230         200 :       LocVT == MVT::v4i32 ||
     231         200 :       LocVT == MVT::v2i64 ||
     232         328 :       LocVT == MVT::v4f32 ||
     233             :       LocVT == MVT::v2f64) {
     234             :     static const MCPhysReg RegList6[] = {
     235             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
     236             :     };
     237          72 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
     238         120 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     239          60 :       return false;
     240             :     }
     241             :   }
     242             : 
     243         108 :   if (LocVT == MVT::v8f32 ||
     244         108 :       LocVT == MVT::v4f64 ||
     245         248 :       LocVT == MVT::v8i32 ||
     246             :       LocVT == MVT::v4i64) {
     247             :     static const MCPhysReg RegList7[] = {
     248             :       X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
     249             :     };
     250          32 :     if (unsigned Reg = State.AllocateReg(RegList7)) {
     251          64 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     252          32 :       return false;
     253             :     }
     254             :   }
     255             : 
     256          52 :   if (LocVT == MVT::v16f32 ||
     257          52 :       LocVT == MVT::v8f64 ||
     258         144 :       LocVT == MVT::v16i32 ||
     259             :       LocVT == MVT::v8i64) {
     260             :     static const MCPhysReg RegList8[] = {
     261             :       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
     262             :     };
     263          72 :     if (unsigned Reg = State.AllocateReg(RegList8)) {
     264         144 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     265          72 :       return false;
     266             :     }
     267             :   }
     268             : 
     269          36 :   if (LocVT == MVT::v16i1 ||
     270             :       LocVT == MVT::v8i1) {
     271             :     if (unsigned Reg = State.AllocateReg(X86::K1)) {
     272          48 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     273          24 :       return false;
     274             :     }
     275             :   }
     276             : 
     277          12 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
     278           4 :     if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     279             :       return false;
     280             :   }
     281             : 
     282           8 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     283           4 :     if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     284             :       return false;
     285             :   }
     286             : 
     287           4 :   if (!CC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     288             :     return false;
     289             : 
     290           0 :   return true;  // CC didn't match.
     291             : }
     292             : 
     293             : 
     294      597994 : static bool CC_X86(unsigned ValNo, MVT ValVT,
     295             :                    MVT LocVT, CCValAssign::LocInfo LocInfo,
     296             :                    ISD::ArgFlagsTy ArgFlags, CCState &State) {
     297             : 
     298      597994 :   if (State.getCallingConv() == CallingConv::Intel_OCL_BI) {
     299         238 :     if (!CC_Intel_OCL_BI(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     300             :       return false;
     301             :   }
     302             : 
     303      597756 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     304      429698 :     if (!CC_X86_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     305             :       return false;
     306             :   }
     307             : 
     308      169913 :   if (!CC_X86_32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     309             :     return false;
     310             : 
     311           0 :   return true;  // CC didn't match.
     312             : }
     313             : 
     314             : 
     315      169913 : static bool CC_X86_32(unsigned ValNo, MVT ValVT,
     316             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
     317             :                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
     318             : 
     319      169913 :   if (State.getCallingConv() == CallingConv::X86_INTR) {
     320          16 :     if (!CC_X86_32_Intr(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     321             :       return false;
     322             :   }
     323             : 
     324      339794 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetMCU()) {
     325         125 :     if (!CC_X86_32_MCU(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     326             :       return false;
     327             :   }
     328             : 
     329      169772 :   if (State.getCallingConv() == CallingConv::X86_FastCall) {
     330         202 :     if (!CC_X86_32_FastCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     331             :       return false;
     332             :   }
     333             : 
     334      169576 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
     335         244 :     if (!CC_X86_Win32_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     336             :       return false;
     337             :   }
     338             : 
     339      169332 :   if (State.getCallingConv() == CallingConv::X86_ThisCall) {
     340         448 :     if (!CC_X86_32_ThisCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     341             :       return false;
     342             :   }
     343             : 
     344      168884 :   if (State.getCallingConv() == CallingConv::Fast) {
     345       51001 :     if (!CC_X86_32_FastCC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     346             :       return false;
     347             :   }
     348             : 
     349      117883 :   if (State.getCallingConv() == CallingConv::GHC) {
     350          20 :     if (!CC_X86_32_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     351             :       return false;
     352             :   }
     353             : 
     354      117863 :   if (State.getCallingConv() == CallingConv::HiPE) {
     355          42 :     if (!CC_X86_32_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     356             :       return false;
     357             :   }
     358             : 
     359      117821 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
     360         200 :     if (!CC_X86_32_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     361             :       return false;
     362             :   }
     363             : 
     364      117621 :   if (!CC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     365             :     return false;
     366             : 
     367           0 :   return true;  // CC didn't match.
     368             : }
     369             : 
     370             : 
     371      117625 : static bool CC_X86_32_C(unsigned ValNo, MVT ValVT,
     372             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
     373             :                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
     374             : 
     375      117623 :   if (LocVT == MVT::i1 ||
     376      110324 :       LocVT == MVT::i8 ||
     377      226278 :       LocVT == MVT::i16 ||
     378             :       LocVT == MVT::v1i1) {
     379             :     LocVT = MVT::i32;
     380        8977 :     if (ArgFlags.isSExt())
     381             :         LocInfo = CCValAssign::SExt;
     382        8839 :     else if (ArgFlags.isZExt())
     383             :         LocInfo = CCValAssign::ZExt;
     384             :     else
     385             :         LocInfo = CCValAssign::AExt;
     386             :   }
     387             : 
     388      117625 :   if (ArgFlags.isNest()) {
     389             :     if (unsigned Reg = State.AllocateReg(X86::ECX)) {
     390          16 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     391           8 :       return false;
     392             :     }
     393             :   }
     394             : 
     395      117617 :   if (!State.isVarArg()) {
     396      116152 :     if (ArgFlags.isInReg()) {
     397         288 :       if (LocVT == MVT::i32) {
     398             :         static const MCPhysReg RegList1[] = {
     399             :           X86::EAX, X86::EDX, X86::ECX
     400             :         };
     401         264 :         if (unsigned Reg = State.AllocateReg(RegList1)) {
     402         510 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     403         255 :           return false;
     404             :         }
     405             :       }
     406             :     }
     407             :   }
     408             : 
     409      117362 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     410             :     return false;
     411             : 
     412           0 :   return true;  // CC didn't match.
     413             : }
     414             : 
     415             : 
     416      118028 : static bool CC_X86_32_Common(unsigned ValNo, MVT ValVT,
     417             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
     418             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
     419             : 
     420      118028 :   if (ArgFlags.isByVal()) {
     421         794 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     422         794 :     return false;
     423             :   }
     424             : 
     425      117234 :   if (!State.isVarArg()) {
     426      115764 :     if (ArgFlags.isInReg()) {
     427          62 :       if (LocVT == MVT::f32 ||
     428             :           LocVT == MVT::f64) {
     429          16 :         if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
     430             :           static const MCPhysReg RegList1[] = {
     431             :             X86::XMM0, X86::XMM1, X86::XMM2
     432             :           };
     433           0 :           if (unsigned Reg = State.AllocateReg(RegList1)) {
     434           0 :             State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     435           0 :             return false;
     436             :           }
     437             :         }
     438             :       }
     439             :     }
     440             :   }
     441             : 
     442      117234 :   if (!State.isVarArg()) {
     443      115764 :     if (LocVT == MVT::x86mmx) {
     444             :       static const MCPhysReg RegList2[] = {
     445             :         X86::MM0, X86::MM1, X86::MM2
     446             :       };
     447        1867 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     448        3734 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     449        1867 :         return false;
     450             :       }
     451             :     }
     452             :   }
     453             : 
     454      115367 :   if (LocVT == MVT::i32 ||
     455             :       LocVT == MVT::f32) {
     456       97079 :     unsigned Offset3 = State.AllocateStack(4, 4);
     457      194158 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
     458       97079 :     return false;
     459             :   }
     460             : 
     461       18288 :   if (LocVT == MVT::f64) {
     462         617 :     unsigned Offset4 = State.AllocateStack(8, 4);
     463        1234 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset4, LocVT, LocInfo));
     464         617 :     return false;
     465             :   }
     466             : 
     467       17671 :   if (LocVT == MVT::f80) {
     468         176 :     unsigned Offset5 = State.AllocateStack(
     469         528 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 4);
     470         352 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset5, LocVT, LocInfo));
     471         176 :     return false;
     472             :   }
     473             : 
     474       17495 :   if (LocVT == MVT::v2i1) {
     475             :     LocVT = MVT::v2i64;
     476          22 :     if (ArgFlags.isSExt())
     477             :         LocInfo = CCValAssign::SExt;
     478          22 :     else if (ArgFlags.isZExt())
     479             :         LocInfo = CCValAssign::ZExt;
     480             :     else
     481             :         LocInfo = CCValAssign::AExt;
     482             :   }
     483             : 
     484       17495 :   if (LocVT == MVT::v4i1) {
     485             :     LocVT = MVT::v4i32;
     486          21 :     if (ArgFlags.isSExt())
     487             :         LocInfo = CCValAssign::SExt;
     488          21 :     else if (ArgFlags.isZExt())
     489             :         LocInfo = CCValAssign::ZExt;
     490             :     else
     491             :         LocInfo = CCValAssign::AExt;
     492             :   }
     493             : 
     494       17495 :   if (LocVT == MVT::v8i1) {
     495             :     LocVT = MVT::v8i16;
     496          17 :     if (ArgFlags.isSExt())
     497             :         LocInfo = CCValAssign::SExt;
     498          17 :     else if (ArgFlags.isZExt())
     499             :         LocInfo = CCValAssign::ZExt;
     500             :     else
     501             :         LocInfo = CCValAssign::AExt;
     502             :   }
     503             : 
     504       17495 :   if (LocVT == MVT::v16i1) {
     505             :     LocVT = MVT::v16i8;
     506          30 :     if (ArgFlags.isSExt())
     507             :         LocInfo = CCValAssign::SExt;
     508          30 :     else if (ArgFlags.isZExt())
     509             :         LocInfo = CCValAssign::ZExt;
     510             :     else
     511             :         LocInfo = CCValAssign::AExt;
     512             :   }
     513             : 
     514       17495 :   if (LocVT == MVT::v32i1) {
     515             :     LocVT = MVT::v32i8;
     516           5 :     if (ArgFlags.isSExt())
     517             :         LocInfo = CCValAssign::SExt;
     518           5 :     else if (ArgFlags.isZExt())
     519             :         LocInfo = CCValAssign::ZExt;
     520             :     else
     521             :         LocInfo = CCValAssign::AExt;
     522             :   }
     523             : 
     524       17495 :   if (LocVT == MVT::v64i1) {
     525             :     LocVT = MVT::v64i8;
     526           1 :     if (ArgFlags.isSExt())
     527             :         LocInfo = CCValAssign::SExt;
     528           1 :     else if (ArgFlags.isZExt())
     529             :         LocInfo = CCValAssign::ZExt;
     530             :     else
     531             :         LocInfo = CCValAssign::AExt;
     532             :   }
     533             : 
     534       17495 :   if (LocVT == MVT::x86mmx) {
     535           0 :     unsigned Offset6 = State.AllocateStack(8, 4);
     536           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
     537           0 :     return false;
     538             :   }
     539             : 
     540       17495 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetDarwin()) {
     541        4168 :     if (!CC_X86_32_Vector_Darwin(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     542             :       return false;
     543             :   }
     544             : 
     545       13327 :   if (!CC_X86_32_Vector_Standard(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     546             :     return false;
     547             : 
     548           6 :   return true;  // CC didn't match.
     549             : }
     550             : 
     551             : 
     552       51001 : static bool CC_X86_32_FastCC(unsigned ValNo, MVT ValVT,
     553             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
     554             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
     555             : 
     556       51001 :   if (ArgFlags.isByVal()) {
     557          32 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     558          32 :     return false;
     559             :   }
     560             : 
     561       50969 :   if (LocVT == MVT::i1 ||
     562       50894 :       LocVT == MVT::i8 ||
     563      101862 :       LocVT == MVT::i16 ||
     564             :       LocVT == MVT::v1i1) {
     565             :     LocVT = MVT::i32;
     566          76 :     if (ArgFlags.isSExt())
     567             :         LocInfo = CCValAssign::SExt;
     568          62 :     else if (ArgFlags.isZExt())
     569             :         LocInfo = CCValAssign::ZExt;
     570             :     else
     571             :         LocInfo = CCValAssign::AExt;
     572             :   }
     573             : 
     574       50969 :   if (ArgFlags.isNest()) {
     575             :     if (unsigned Reg = State.AllocateReg(X86::EAX)) {
     576           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     577           0 :       return false;
     578             :     }
     579             :   }
     580             : 
     581       50969 :   if (LocVT == MVT::i32) {
     582             :     static const MCPhysReg RegList1[] = {
     583             :       X86::ECX, X86::EDX
     584             :     };
     585       50942 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     586      101146 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     587       50573 :       return false;
     588             :     }
     589             :   }
     590             : 
     591         396 :   if (!State.isVarArg()) {
     592         396 :     if (LocVT == MVT::f32 ||
     593             :         LocVT == MVT::f64) {
     594          36 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
     595             :         static const MCPhysReg RegList2[] = {
     596             :           X86::XMM0, X86::XMM1, X86::XMM2
     597             :         };
     598           8 :         if (unsigned Reg = State.AllocateReg(RegList2)) {
     599          12 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     600           6 :           return false;
     601             :         }
     602             :       }
     603             :     }
     604             :   }
     605             : 
     606         390 :   if (LocVT == MVT::f64) {
     607           9 :     unsigned Offset3 = State.AllocateStack(8, 8);
     608          18 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
     609           9 :     return false;
     610             :   }
     611             : 
     612         381 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     613             :     return false;
     614             : 
     615           0 :   return true;  // CC didn't match.
     616             : }
     617             : 
     618             : 
     619         262 : static bool CC_X86_32_FastCall(unsigned ValNo, MVT ValVT,
     620             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
     621             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
     622             : 
     623         262 :   if (LocVT == MVT::i1) {
     624             :     LocVT = MVT::i8;
     625           0 :     if (ArgFlags.isSExt())
     626             :         LocInfo = CCValAssign::SExt;
     627           0 :     else if (ArgFlags.isZExt())
     628             :         LocInfo = CCValAssign::ZExt;
     629             :     else
     630             :         LocInfo = CCValAssign::AExt;
     631             :   }
     632             : 
     633         262 :   if (ArgFlags.isNest()) {
     634             :     if (unsigned Reg = State.AllocateReg(X86::EAX)) {
     635           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     636           0 :       return false;
     637             :     }
     638             :   }
     639             : 
     640         262 :   if (ArgFlags.isInReg()) {
     641         195 :     if (LocVT == MVT::i8) {
     642             :       static const MCPhysReg RegList1[] = {
     643             :         X86::CL, X86::DL
     644             :       };
     645           4 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
     646           8 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     647           4 :         return false;
     648             :       }
     649             :     }
     650             :   }
     651             : 
     652         258 :   if (ArgFlags.isInReg()) {
     653         191 :     if (LocVT == MVT::i16) {
     654             :       static const MCPhysReg RegList2[] = {
     655             :         X86::CX, X86::DX
     656             :       };
     657           0 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     658           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     659           0 :         return false;
     660             :       }
     661             :     }
     662             :   }
     663             : 
     664         258 :   if (ArgFlags.isInReg()) {
     665         191 :     if (LocVT == MVT::i32) {
     666             :       static const MCPhysReg RegList3[] = {
     667             :         X86::ECX, X86::EDX
     668             :       };
     669         176 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
     670         340 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     671         170 :         return false;
     672             :       }
     673             :     }
     674             :   }
     675             : 
     676          88 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     677             :     return false;
     678             : 
     679           6 :   return true;  // CC didn't match.
     680             : }
     681             : 
     682             : 
     683          20 : static bool CC_X86_32_GHC(unsigned ValNo, MVT ValVT,
     684             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
     685             :                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
     686             : 
     687          20 :   if (LocVT == MVT::i8 ||
     688             :       LocVT == MVT::i16) {
     689             :     LocVT = MVT::i32;
     690           0 :     if (ArgFlags.isSExt())
     691             :         LocInfo = CCValAssign::SExt;
     692           0 :     else if (ArgFlags.isZExt())
     693             :         LocInfo = CCValAssign::ZExt;
     694             :     else
     695             :         LocInfo = CCValAssign::AExt;
     696             :   }
     697             : 
     698          20 :   if (LocVT == MVT::i32) {
     699             :     static const MCPhysReg RegList1[] = {
     700             :       X86::EBX, X86::EBP, X86::EDI, X86::ESI
     701             :     };
     702          20 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     703          40 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     704          20 :       return false;
     705             :     }
     706             :   }
     707             : 
     708             :   return true;  // CC didn't match.
     709             : }
     710             : 
     711             : 
     712          42 : static bool CC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
     713             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     714             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
     715             : 
     716          42 :   if (LocVT == MVT::i8 ||
     717             :       LocVT == MVT::i16) {
     718             :     LocVT = MVT::i32;
     719           0 :     if (ArgFlags.isSExt())
     720             :         LocInfo = CCValAssign::SExt;
     721           0 :     else if (ArgFlags.isZExt())
     722             :         LocInfo = CCValAssign::ZExt;
     723             :     else
     724             :         LocInfo = CCValAssign::AExt;
     725             :   }
     726             : 
     727          42 :   if (LocVT == MVT::i32) {
     728             :     static const MCPhysReg RegList1[] = {
     729             :       X86::ESI, X86::EBP, X86::EAX, X86::EDX, X86::ECX
     730             :     };
     731          42 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     732          82 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     733          41 :       return false;
     734             :     }
     735             :   }
     736             : 
     737           1 :   if (LocVT == MVT::i32 ||
     738             :       LocVT == MVT::f32) {
     739           1 :     unsigned Offset2 = State.AllocateStack(4, 4);
     740           2 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
     741           1 :     return false;
     742             :   }
     743             : 
     744             :   return true;  // CC didn't match.
     745             : }
     746             : 
     747             : 
     748          16 : static bool CC_X86_32_Intr(unsigned ValNo, MVT ValVT,
     749             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
     750             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
     751             : 
     752          16 :   unsigned Offset1 = State.AllocateStack(4, 4);
     753          32 :   State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
     754             :   return false;
     755             : 
     756             :   return true;  // CC didn't match.
     757             : }
     758             : 
     759             : 
     760         125 : static bool CC_X86_32_MCU(unsigned ValNo, MVT ValVT,
     761             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
     762             :                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
     763             : 
     764         125 :   if (ArgFlags.isByVal()) {
     765           1 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     766           1 :     return false;
     767             :   }
     768             : 
     769         124 :   if (LocVT == MVT::i1 ||
     770         115 :       LocVT == MVT::i8 ||
     771         233 :       LocVT == MVT::i16 ||
     772             :       LocVT == MVT::v1i1) {
     773          15 :     LocVT = MVT::i32;
     774          15 :     if (ArgFlags.isSExt())
     775           0 :         LocInfo = CCValAssign::SExt;
     776          15 :     else if (ArgFlags.isZExt())
     777           3 :         LocInfo = CCValAssign::ZExt;
     778             :     else
     779          12 :         LocInfo = CCValAssign::AExt;
     780             :   }
     781             : 
     782         124 :   if (!State.isVarArg()) {
     783         123 :     if (LocVT == MVT::i32) {
     784         122 :       if (CC_X86_32_MCUInReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     785             :             return false;
     786             :     }
     787             :   }
     788             : 
     789           5 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     790             :     return false;
     791             : 
     792           0 :   return true;  // CC didn't match.
     793             : }
     794             : 
     795             : 
     796         200 : static bool CC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
     797             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
     798             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
     799             : 
     800         200 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     801           0 :     if (ArgFlags.isByVal()) {
     802           0 :       State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
     803           0 :       return false;
     804             :     }
     805             :   }
     806             : 
     807         200 :   if (ArgFlags.isByVal()) {
     808           0 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
     809           0 :     return false;
     810             :   }
     811             : 
     812         200 :   if (LocVT == MVT::i1 ||
     813         189 :       LocVT == MVT::i8 ||
     814         385 :       LocVT == MVT::i16 ||
     815             :       LocVT == MVT::v1i1) {
     816          15 :     LocVT = MVT::i32;
     817          15 :     if (ArgFlags.isSExt())
     818           2 :         LocInfo = CCValAssign::SExt;
     819          13 :     else if (ArgFlags.isZExt())
     820           0 :         LocInfo = CCValAssign::ZExt;
     821             :     else
     822          13 :         LocInfo = CCValAssign::AExt;
     823             :   }
     824             : 
     825         194 :   if (LocVT == MVT::v8i1 ||
     826         388 :       LocVT == MVT::v16i1 ||
     827             :       LocVT == MVT::v32i1) {
     828          18 :     LocVT = MVT::i32;
     829          18 :     if (ArgFlags.isSExt())
     830           0 :         LocInfo = CCValAssign::SExt;
     831          18 :     else if (ArgFlags.isZExt())
     832           0 :         LocInfo = CCValAssign::ZExt;
     833             :     else
     834          18 :         LocInfo = CCValAssign::AExt;
     835             :   }
     836             : 
     837         200 :   if (LocVT == MVT::i32) {
     838             :     static const MCPhysReg RegList1[] = {
     839             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
     840             :     };
     841          86 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
     842         213 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     843          71 :       return false;
     844             :     }
     845             :   }
     846             : 
     847         129 :   if (LocVT == MVT::i64) {
     848             :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
     849           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     850           0 :       return false;
     851             :     }
     852             :   }
     853             : 
     854         129 :   if (LocVT == MVT::v64i1) {
     855          26 :     LocVT = MVT::i64;
     856          26 :     if (ArgFlags.isSExt())
     857           0 :         LocInfo = CCValAssign::SExt;
     858          26 :     else if (ArgFlags.isZExt())
     859           0 :         LocInfo = CCValAssign::ZExt;
     860             :     else
     861          26 :         LocInfo = CCValAssign::AExt;
     862             :   }
     863             : 
     864         129 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     865           0 :     if (LocVT == MVT::i64) {
     866             :       if (unsigned Reg = State.AllocateReg(X86::RAX)) {
     867           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     868           0 :         return false;
     869             :       }
     870             :     }
     871             :   }
     872             : 
     873         129 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
     874         129 :     if (LocVT == MVT::i64) {
     875          26 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
     876             :             return false;
     877             :     }
     878             :   }
     879             : 
     880         120 :   if (LocVT == MVT::f32 ||
     881         240 :       LocVT == MVT::f64 ||
     882             :       LocVT == MVT::f128) {
     883          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
     884             :       static const MCPhysReg RegList2[] = {
     885             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
     886             :       };
     887          10 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
     888          30 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     889          10 :         return false;
     890             :       }
     891             :     }
     892             :   }
     893             : 
     894         115 :   if (LocVT == MVT::f80) {
     895             :     if (unsigned Reg = State.AllocateReg(X86::FP0)) {
     896           9 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     897           3 :       return false;
     898             :     }
     899             :   }
     900             : 
     901         112 :   if (LocVT == MVT::v16i8 ||
     902         112 :       LocVT == MVT::v8i16 ||
     903         107 :       LocVT == MVT::v4i32 ||
     904         107 :       LocVT == MVT::v2i64 ||
     905         183 :       LocVT == MVT::v4f32 ||
     906             :       LocVT == MVT::v2f64) {
     907          82 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
     908             :       static const MCPhysReg RegList3[] = {
     909             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
     910             :       };
     911          41 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
     912          63 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     913          21 :         return false;
     914             :       }
     915             :     }
     916             :   }
     917             : 
     918          91 :   if (LocVT == MVT::v32i8 ||
     919          91 :       LocVT == MVT::v16i16 ||
     920          86 :       LocVT == MVT::v8i32 ||
     921          86 :       LocVT == MVT::v4i64 ||
     922         177 :       LocVT == MVT::v8f32 ||
     923             :       LocVT == MVT::v4f64) {
     924          10 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
     925             :       static const MCPhysReg RegList4[] = {
     926             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
     927             :       };
     928           5 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
     929          15 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     930           5 :         return false;
     931             :       }
     932             :     }
     933             :   }
     934             : 
     935          86 :   if (LocVT == MVT::v64i8 ||
     936          86 :       LocVT == MVT::v32i16 ||
     937          81 :       LocVT == MVT::v16i32 ||
     938          81 :       LocVT == MVT::v8i64 ||
     939         143 :       LocVT == MVT::v16f32 ||
     940             :       LocVT == MVT::v8f64) {
     941          58 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
     942             :       static const MCPhysReg RegList5[] = {
     943             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
     944             :       };
     945          29 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
     946          57 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
     947          19 :         return false;
     948             :       }
     949             :     }
     950             :   }
     951             : 
     952          67 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     953           0 :     if (LocVT == MVT::i32 ||
     954           0 :         LocVT == MVT::i64 ||
     955           0 :         LocVT == MVT::f32 ||
     956             :         LocVT == MVT::f64) {
     957           0 :       unsigned Offset6 = State.AllocateStack(8, 8);
     958           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
     959           0 :       return false;
     960             :     }
     961             :   }
     962             : 
     963          67 :   if (LocVT == MVT::i32 ||
     964             :       LocVT == MVT::f32) {
     965          15 :     unsigned Offset7 = State.AllocateStack(4, 4);
     966          45 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
     967          15 :     return false;
     968             :   }
     969             : 
     970          82 :   if (LocVT == MVT::i64 ||
     971             :       LocVT == MVT::f64) {
     972          22 :     unsigned Offset8 = State.AllocateStack(8, 4);
     973          66 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
     974          22 :     return false;
     975             :   }
     976             : 
     977          30 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
     978           0 :     if (LocVT == MVT::x86mmx) {
     979           0 :       unsigned Offset9 = State.AllocateStack(8, 8);
     980           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
     981           0 :       return false;
     982             :     }
     983             :   }
     984             : 
     985          30 :   if (LocVT == MVT::x86mmx) {
     986           0 :     unsigned Offset10 = State.AllocateStack(8, 4);
     987           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
     988           0 :     return false;
     989             :   }
     990             : 
     991          30 :   if (LocVT == MVT::f80 ||
     992             :       LocVT == MVT::f128) {
     993           0 :     unsigned Offset11 = State.AllocateStack(
     994           0 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
     995           0 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
     996           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
     997           0 :     return false;
     998             :   }
     999             : 
    1000          30 :   if (LocVT == MVT::v16i8 ||
    1001          30 :       LocVT == MVT::v8i16 ||
    1002          30 :       LocVT == MVT::v4i32 ||
    1003          30 :       LocVT == MVT::v2i64 ||
    1004          40 :       LocVT == MVT::v4f32 ||
    1005             :       LocVT == MVT::v2f64) {
    1006          20 :     unsigned Offset12 = State.AllocateStack(16, 16);
    1007          60 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
    1008          20 :     return false;
    1009             :   }
    1010             : 
    1011          10 :   if (LocVT == MVT::v32i8 ||
    1012          10 :       LocVT == MVT::v16i16 ||
    1013          10 :       LocVT == MVT::v8i32 ||
    1014          10 :       LocVT == MVT::v4i64 ||
    1015          20 :       LocVT == MVT::v8f32 ||
    1016             :       LocVT == MVT::v4f64) {
    1017           0 :     unsigned Offset13 = State.AllocateStack(32, 32);
    1018           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
    1019           0 :     return false;
    1020             :   }
    1021             : 
    1022          10 :   if (LocVT == MVT::v16i32 ||
    1023          10 :       LocVT == MVT::v8i64 ||
    1024          10 :       LocVT == MVT::v16f32 ||
    1025             :       LocVT == MVT::v8f64) {
    1026          10 :     unsigned Offset14 = State.AllocateStack(64, 64);
    1027          30 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
    1028          10 :     return false;
    1029             :   }
    1030             : 
    1031             :   return true;  // CC didn't match.
    1032             : }
    1033             : 
    1034             : 
    1035         448 : static bool CC_X86_32_ThisCall(unsigned ValNo, MVT ValVT,
    1036             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
    1037             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1038             : 
    1039         448 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetCygMing()) {
    1040          40 :     if (!CC_X86_32_ThisCall_Mingw(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1041             :       return false;
    1042             :   }
    1043             : 
    1044         408 :   if (!CC_X86_32_ThisCall_Win(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1045             :     return false;
    1046             : 
    1047           0 :   return true;  // CC didn't match.
    1048             : }
    1049             : 
    1050             : 
    1051         424 : static bool CC_X86_32_ThisCall_Common(unsigned ValNo, MVT ValVT,
    1052             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    1053             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1054             : 
    1055         424 :   if (LocVT == MVT::i32) {
    1056             :     if (unsigned Reg = State.AllocateReg(X86::ECX)) {
    1057         464 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1058         232 :       return false;
    1059             :     }
    1060             :   }
    1061             : 
    1062         192 :   if (!CC_X86_32_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1063             :     return false;
    1064             : 
    1065           0 :   return true;  // CC didn't match.
    1066             : }
    1067             : 
    1068             : 
    1069          40 : static bool CC_X86_32_ThisCall_Mingw(unsigned ValNo, MVT ValVT,
    1070             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
    1071             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1072             : 
    1073          40 :   if (LocVT == MVT::i1 ||
    1074          40 :       LocVT == MVT::i8 ||
    1075          80 :       LocVT == MVT::i16 ||
    1076             :       LocVT == MVT::v1i1) {
    1077             :     LocVT = MVT::i32;
    1078           0 :     if (ArgFlags.isSExt())
    1079             :         LocInfo = CCValAssign::SExt;
    1080           0 :     else if (ArgFlags.isZExt())
    1081             :         LocInfo = CCValAssign::ZExt;
    1082             :     else
    1083             :         LocInfo = CCValAssign::AExt;
    1084             :   }
    1085             : 
    1086          40 :   if (!CC_X86_32_ThisCall_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1087             :     return false;
    1088             : 
    1089           0 :   return true;  // CC didn't match.
    1090             : }
    1091             : 
    1092             : 
    1093         408 : static bool CC_X86_32_ThisCall_Win(unsigned ValNo, MVT ValVT,
    1094             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
    1095             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1096             : 
    1097         408 :   if (LocVT == MVT::i1 ||
    1098         407 :       LocVT == MVT::i8 ||
    1099         815 :       LocVT == MVT::i16 ||
    1100             :       LocVT == MVT::v1i1) {
    1101             :     LocVT = MVT::i32;
    1102           1 :     if (ArgFlags.isSExt())
    1103             :         LocInfo = CCValAssign::SExt;
    1104           1 :     else if (ArgFlags.isZExt())
    1105             :         LocInfo = CCValAssign::ZExt;
    1106             :     else
    1107             :         LocInfo = CCValAssign::AExt;
    1108             :   }
    1109             : 
    1110         408 :   if (ArgFlags.isSRet()) {
    1111          24 :     unsigned Offset1 = State.AllocateStack(4, 4);
    1112          48 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1113          24 :     return false;
    1114             :   }
    1115             : 
    1116         384 :   if (!CC_X86_32_ThisCall_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1117             :     return false;
    1118             : 
    1119           0 :   return true;  // CC didn't match.
    1120             : }
    1121             : 
    1122             : 
    1123         212 : static bool CC_X86_32_Vector_Common(unsigned ValNo, MVT ValVT,
    1124             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    1125             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1126             : 
    1127         210 :   if (LocVT == MVT::v16i8 ||
    1128         202 :       LocVT == MVT::v8i16 ||
    1129         182 :       LocVT == MVT::v4i32 ||
    1130         173 :       LocVT == MVT::v2i64 ||
    1131         318 :       LocVT == MVT::v4f32 ||
    1132             :       LocVT == MVT::v2f64) {
    1133         124 :     unsigned Offset1 = State.AllocateStack(16, 16);
    1134         248 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1135             :     return false;
    1136             :   }
    1137             : 
    1138          86 :   if (LocVT == MVT::v32i8 ||
    1139          84 :       LocVT == MVT::v16i16 ||
    1140          77 :       LocVT == MVT::v8i32 ||
    1141          74 :       LocVT == MVT::v4i64 ||
    1142         144 :       LocVT == MVT::v8f32 ||
    1143             :       LocVT == MVT::v4f64) {
    1144          42 :     unsigned Offset2 = State.AllocateStack(32, 32);
    1145          84 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
    1146             :     return false;
    1147             :   }
    1148             : 
    1149          36 :   if (LocVT == MVT::v64i8 ||
    1150          34 :       LocVT == MVT::v32i16 ||
    1151          33 :       LocVT == MVT::v16i32 ||
    1152          16 :       LocVT == MVT::v8i64 ||
    1153          61 :       LocVT == MVT::v16f32 ||
    1154             :       LocVT == MVT::v8f64) {
    1155          40 :     unsigned Offset3 = State.AllocateStack(64, 64);
    1156          80 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset3, LocVT, LocInfo));
    1157             :     return false;
    1158             :   }
    1159             : 
    1160             :   return true;  // CC didn't match.
    1161             : }
    1162             : 
    1163             : 
    1164        4168 : static bool CC_X86_32_Vector_Darwin(unsigned ValNo, MVT ValVT,
    1165             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    1166             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1167             : 
    1168        4168 :   if (!State.isVarArg()) {
    1169        3808 :     if (LocVT == MVT::v16i8 ||
    1170        3474 :         LocVT == MVT::v8i16 ||
    1171        3060 :         LocVT == MVT::v4i32 ||
    1172        2805 :         LocVT == MVT::v2i64 ||
    1173        6295 :         LocVT == MVT::v4f32 ||
    1174             :         LocVT == MVT::v2f64) {
    1175             :       static const MCPhysReg RegList1[] = {
    1176             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    1177             :       };
    1178        2432 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
    1179        4848 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1180             :         return false;
    1181             :       }
    1182             :     }
    1183             :   }
    1184             : 
    1185        1744 :   if (!State.isVarArg()) {
    1186        1620 :     if (LocVT == MVT::v32i8 ||
    1187        1458 :         LocVT == MVT::v16i16 ||
    1188        1276 :         LocVT == MVT::v8i32 ||
    1189        1183 :         LocVT == MVT::v4i64 ||
    1190        2832 :         LocVT == MVT::v8f32 ||
    1191             :         LocVT == MVT::v4f64) {
    1192        1432 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    1193             :         static const MCPhysReg RegList2[] = {
    1194             :           X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
    1195             :         };
    1196         716 :         if (unsigned Reg = State.AllocateReg(RegList2)) {
    1197        1392 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1198             :           return false;
    1199             :         }
    1200             :       }
    1201             :     }
    1202             :   }
    1203             : 
    1204        1048 :   if (!State.isVarArg()) {
    1205        1046 :     if (LocVT == MVT::v64i8 ||
    1206        1043 :         LocVT == MVT::v32i16 ||
    1207         776 :         LocVT == MVT::v16i32 ||
    1208         562 :         LocVT == MVT::v8i64 ||
    1209        1274 :         LocVT == MVT::v16f32 ||
    1210             :         LocVT == MVT::v8f64) {
    1211             :       static const MCPhysReg RegList3[] = {
    1212             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
    1213             :       };
    1214        1020 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1215        2036 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1216             :         return false;
    1217             :       }
    1218             :     }
    1219             :   }
    1220             : 
    1221          30 :   if (!CC_X86_32_Vector_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1222             :     return false;
    1223             : 
    1224             :   return true;  // CC didn't match.
    1225             : }
    1226             : 
    1227             : 
    1228       13327 : static bool CC_X86_32_Vector_Standard(unsigned ValNo, MVT ValVT,
    1229             :                                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    1230             :                                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1231             : 
    1232       13327 :   if (!State.isVarArg()) {
    1233       12855 :     if (LocVT == MVT::v16i8 ||
    1234       12219 :         LocVT == MVT::v8i16 ||
    1235       11373 :         LocVT == MVT::v4i32 ||
    1236        9410 :         LocVT == MVT::v2i64 ||
    1237       20911 :         LocVT == MVT::v4f32 ||
    1238             :         LocVT == MVT::v2f64) {
    1239             :       static const MCPhysReg RegList1[] = {
    1240             :         X86::XMM0, X86::XMM1, X86::XMM2
    1241             :       };
    1242        7107 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
    1243       13986 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1244             :         return false;
    1245             :       }
    1246             :     }
    1247             :   }
    1248             : 
    1249        6334 :   if (!State.isVarArg()) {
    1250        5989 :     if (LocVT == MVT::v32i8 ||
    1251        5529 :         LocVT == MVT::v16i16 ||
    1252        4944 :         LocVT == MVT::v8i32 ||
    1253        3900 :         LocVT == MVT::v4i64 ||
    1254        9438 :         LocVT == MVT::v8f32 ||
    1255             :         LocVT == MVT::v4f64) {
    1256        7586 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    1257             :         static const MCPhysReg RegList2[] = {
    1258             :           X86::YMM0, X86::YMM1, X86::YMM2
    1259             :         };
    1260        3793 :         if (unsigned Reg = State.AllocateReg(RegList2)) {
    1261        7542 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1262             :           return false;
    1263             :         }
    1264             :       }
    1265             :     }
    1266             :   }
    1267             : 
    1268        2563 :   if (!State.isVarArg()) {
    1269        2406 :     if (LocVT == MVT::v64i8 ||
    1270        2070 :         LocVT == MVT::v32i16 ||
    1271        1874 :         LocVT == MVT::v16i32 ||
    1272        1137 :         LocVT == MVT::v8i64 ||
    1273        3269 :         LocVT == MVT::v16f32 ||
    1274             :         LocVT == MVT::v8f64) {
    1275             :       static const MCPhysReg RegList3[] = {
    1276             :         X86::ZMM0, X86::ZMM1, X86::ZMM2
    1277             :       };
    1278        2419 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1279        4762 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1280             :         return false;
    1281             :       }
    1282             :     }
    1283             :   }
    1284             : 
    1285         182 :   if (!CC_X86_32_Vector_Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1286             :     return false;
    1287             : 
    1288             :   return true;  // CC didn't match.
    1289             : }
    1290             : 
    1291             : 
    1292      429698 : static bool CC_X86_64(unsigned ValNo, MVT ValVT,
    1293             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    1294             :                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1295             : 
    1296      429698 :   if (State.getCallingConv() == CallingConv::GHC) {
    1297          62 :     if (!CC_X86_64_GHC(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1298             :       return false;
    1299             :   }
    1300             : 
    1301      429636 :   if (State.getCallingConv() == CallingConv::HiPE) {
    1302          42 :     if (!CC_X86_64_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1303             :       return false;
    1304             :   }
    1305             : 
    1306      429594 :   if (State.getCallingConv() == CallingConv::WebKit_JS) {
    1307          69 :     if (!CC_X86_64_WebKit_JS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1308             :       return false;
    1309             :   }
    1310             : 
    1311      429525 :   if (State.getCallingConv() == CallingConv::AnyReg) {
    1312             :     if (!CC_X86_64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1313             :       return false;
    1314             :   }
    1315             : 
    1316      429525 :   if (State.getCallingConv() == CallingConv::Win64) {
    1317          55 :     if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1318             :       return false;
    1319             :   }
    1320             : 
    1321      429470 :   if (State.getCallingConv() == CallingConv::X86_64_SysV) {
    1322          22 :     if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1323             :       return false;
    1324             :   }
    1325             : 
    1326      429448 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
    1327         152 :     if (!CC_X86_Win64_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1328             :       return false;
    1329             :   }
    1330             : 
    1331      429296 :   if (State.getCallingConv() == CallingConv::HHVM) {
    1332         112 :     if (!CC_X86_64_HHVM(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1333             :       return false;
    1334             :   }
    1335             : 
    1336      429184 :   if (State.getCallingConv() == CallingConv::HHVM_C) {
    1337          25 :     if (!CC_X86_64_HHVM_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1338             :       return false;
    1339             :   }
    1340             : 
    1341      429159 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    1342         380 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    1343         195 :       if (!CC_X86_Win64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1344             :         return false;
    1345             :     }
    1346             :   }
    1347             : 
    1348      428964 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    1349         185 :     if (!CC_X86_SysV64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1350             :       return false;
    1351             :   }
    1352             : 
    1353      428779 :   if (State.getCallingConv() == CallingConv::X86_INTR) {
    1354          20 :     if (!CC_X86_64_Intr(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1355             :       return false;
    1356             :   }
    1357             : 
    1358      428759 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    1359        2642 :     if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1360             :       return false;
    1361             :   }
    1362             : 
    1363      426126 :   if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1364             :     return false;
    1365             : 
    1366        1855 :   return true;  // CC didn't match.
    1367             : }
    1368             : 
    1369             : 
    1370             : static bool CC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
    1371             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
    1372             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1373             : 
    1374             :   if (CC_X86_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1375             :     return false;
    1376             : 
    1377             :   return true;  // CC didn't match.
    1378             : }
    1379             : 
    1380             : 
    1381      426172 : static bool CC_X86_64_C(unsigned ValNo, MVT ValVT,
    1382             :                         MVT LocVT, CCValAssign::LocInfo LocInfo,
    1383             :                         ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1384             : 
    1385      426172 :   if (ArgFlags.isByVal()) {
    1386         175 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
    1387         175 :     return false;
    1388             :   }
    1389             : 
    1390      425991 :   if (LocVT == MVT::i1 ||
    1391      417807 :       LocVT == MVT::i8 ||
    1392      840438 :       LocVT == MVT::i16 ||
    1393             :       LocVT == MVT::v1i1) {
    1394             :     LocVT = MVT::i32;
    1395       11570 :     if (ArgFlags.isSExt())
    1396             :         LocInfo = CCValAssign::SExt;
    1397       11147 :     else if (ArgFlags.isZExt())
    1398             :         LocInfo = CCValAssign::ZExt;
    1399             :     else
    1400             :         LocInfo = CCValAssign::AExt;
    1401             :   }
    1402             : 
    1403      425997 :   if (ArgFlags.isNest()) {
    1404          19 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTarget64BitILP32()) {
    1405             :       if (unsigned Reg = State.AllocateReg(X86::R10D)) {
    1406           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1407           2 :         return false;
    1408             :       }
    1409             :     }
    1410             :   }
    1411             : 
    1412      425995 :   if (ArgFlags.isNest()) {
    1413             :     if (unsigned Reg = State.AllocateReg(X86::R10)) {
    1414          34 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1415          17 :       return false;
    1416             :     }
    1417             :   }
    1418             : 
    1419      425978 :   if (ArgFlags.isSwiftSelf()) {
    1420          40 :     if (LocVT == MVT::i64) {
    1421             :       if (unsigned Reg = State.AllocateReg(X86::R13)) {
    1422          80 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1423          40 :         return false;
    1424             :       }
    1425             :     }
    1426             :   }
    1427             : 
    1428      425938 :   if (ArgFlags.isSwiftError()) {
    1429          74 :     if (LocVT == MVT::i64) {
    1430             :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    1431         148 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1432          74 :         return false;
    1433             :       }
    1434             :     }
    1435             :   }
    1436             : 
    1437      425864 :   if (State.getCallingConv() == CallingConv::Swift) {
    1438         134 :     if (ArgFlags.isSRet()) {
    1439           6 :       if (LocVT == MVT::i64) {
    1440             :         if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    1441          12 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1442           6 :           return false;
    1443             :         }
    1444             :       }
    1445             :     }
    1446             :   }
    1447             : 
    1448      425858 :   if (LocVT == MVT::i32) {
    1449             :     static const MCPhysReg RegList1[] = {
    1450             :       X86::EDI, X86::ESI, X86::EDX, X86::ECX, X86::R8D, X86::R9D
    1451             :     };
    1452       37588 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1453       71832 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1454       35916 :       return false;
    1455             :     }
    1456             :   }
    1457             : 
    1458      389942 :   if (LocVT == MVT::i64) {
    1459             :     static const MCPhysReg RegList2[] = {
    1460             :       X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9
    1461             :     };
    1462      282749 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    1463      561956 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1464      280978 :       return false;
    1465             :     }
    1466             :   }
    1467             : 
    1468      108964 :   if (LocVT == MVT::x86mmx) {
    1469        1855 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetDarwin()) {
    1470          24 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    1471             :         LocVT = MVT::v2i64;
    1472          12 :         if (ArgFlags.isSExt())
    1473             :                 LocInfo = CCValAssign::SExt;
    1474          12 :         else if (ArgFlags.isZExt())
    1475             :                 LocInfo = CCValAssign::ZExt;
    1476             :         else
    1477             :                 LocInfo = CCValAssign::AExt;
    1478             :       }
    1479             :     }
    1480             :   }
    1481             : 
    1482      108964 :   if (LocVT == MVT::v2i1) {
    1483             :     LocVT = MVT::v2i64;
    1484          91 :     if (ArgFlags.isSExt())
    1485             :         LocInfo = CCValAssign::SExt;
    1486          91 :     else if (ArgFlags.isZExt())
    1487             :         LocInfo = CCValAssign::ZExt;
    1488             :     else
    1489             :         LocInfo = CCValAssign::AExt;
    1490             :   }
    1491             : 
    1492      108964 :   if (LocVT == MVT::v4i1) {
    1493             :     LocVT = MVT::v4i32;
    1494         131 :     if (ArgFlags.isSExt())
    1495             :         LocInfo = CCValAssign::SExt;
    1496         131 :     else if (ArgFlags.isZExt())
    1497             :         LocInfo = CCValAssign::ZExt;
    1498             :     else
    1499             :         LocInfo = CCValAssign::AExt;
    1500             :   }
    1501             : 
    1502      108964 :   if (LocVT == MVT::v8i1) {
    1503             :     LocVT = MVT::v8i16;
    1504         137 :     if (ArgFlags.isSExt())
    1505             :         LocInfo = CCValAssign::SExt;
    1506         137 :     else if (ArgFlags.isZExt())
    1507             :         LocInfo = CCValAssign::ZExt;
    1508             :     else
    1509             :         LocInfo = CCValAssign::AExt;
    1510             :   }
    1511             : 
    1512      108964 :   if (LocVT == MVT::v16i1) {
    1513             :     LocVT = MVT::v16i8;
    1514         172 :     if (ArgFlags.isSExt())
    1515             :         LocInfo = CCValAssign::SExt;
    1516         172 :     else if (ArgFlags.isZExt())
    1517             :         LocInfo = CCValAssign::ZExt;
    1518             :     else
    1519             :         LocInfo = CCValAssign::AExt;
    1520             :   }
    1521             : 
    1522      108964 :   if (LocVT == MVT::v32i1) {
    1523             :     LocVT = MVT::v32i8;
    1524          36 :     if (ArgFlags.isSExt())
    1525             :         LocInfo = CCValAssign::SExt;
    1526          36 :     else if (ArgFlags.isZExt())
    1527             :         LocInfo = CCValAssign::ZExt;
    1528             :     else
    1529             :         LocInfo = CCValAssign::AExt;
    1530             :   }
    1531             : 
    1532      108964 :   if (LocVT == MVT::v64i1) {
    1533             :     LocVT = MVT::v64i8;
    1534           9 :     if (ArgFlags.isSExt())
    1535             :         LocInfo = CCValAssign::SExt;
    1536           9 :     else if (ArgFlags.isZExt())
    1537             :         LocInfo = CCValAssign::ZExt;
    1538             :     else
    1539             :         LocInfo = CCValAssign::AExt;
    1540             :   }
    1541             : 
    1542      106212 :   if (LocVT == MVT::f32 ||
    1543      103101 :       LocVT == MVT::f64 ||
    1544      102665 :       LocVT == MVT::f128 ||
    1545       95814 :       LocVT == MVT::v16i8 ||
    1546       87285 :       LocVT == MVT::v8i16 ||
    1547       77195 :       LocVT == MVT::v4i32 ||
    1548       66400 :       LocVT == MVT::v2i64 ||
    1549      165480 :       LocVT == MVT::v4f32 ||
    1550             :       LocVT == MVT::v2f64) {
    1551      118678 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1552             :       static const MCPhysReg RegList3[] = {
    1553             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
    1554             :       };
    1555       59333 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1556      114896 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1557       57448 :         return false;
    1558             :       }
    1559             :     }
    1560             :   }
    1561             : 
    1562       51516 :   if (!State.isVarArg()) {
    1563       47048 :     if (LocVT == MVT::v32i8 ||
    1564       41648 :         LocVT == MVT::v16i16 ||
    1565       36530 :         LocVT == MVT::v8i32 ||
    1566       31086 :         LocVT == MVT::v4i64 ||
    1567       77177 :         LocVT == MVT::v8f32 ||
    1568             :         LocVT == MVT::v4f64) {
    1569       60700 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    1570             :         static const MCPhysReg RegList4[] = {
    1571             :           X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
    1572             :         };
    1573       30350 :         if (unsigned Reg = State.AllocateReg(RegList4)) {
    1574       60444 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1575       30222 :           return false;
    1576             :         }
    1577             :       }
    1578             :     }
    1579             :   }
    1580             : 
    1581       21294 :   if (!State.isVarArg()) {
    1582       20512 :     if (LocVT == MVT::v64i8 ||
    1583       19398 :         LocVT == MVT::v32i16 ||
    1584       16616 :         LocVT == MVT::v16i32 ||
    1585       13002 :         LocVT == MVT::v8i64 ||
    1586       31352 :         LocVT == MVT::v16f32 ||
    1587             :         LocVT == MVT::v8f64) {
    1588       27334 :       if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    1589             :         static const MCPhysReg RegList5[] = {
    1590             :           X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
    1591             :         };
    1592       13667 :         if (unsigned Reg = State.AllocateReg(RegList5)) {
    1593       27310 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1594       13655 :           return false;
    1595             :         }
    1596             :       }
    1597             :     }
    1598             :   }
    1599             : 
    1600        5967 :   if (LocVT == MVT::i32 ||
    1601        4196 :       LocVT == MVT::i64 ||
    1602       11781 :       LocVT == MVT::f32 ||
    1603             :       LocVT == MVT::f64) {
    1604        3499 :     unsigned Offset6 = State.AllocateStack(8, 8);
    1605        6998 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset6, LocVT, LocInfo));
    1606        3499 :     return false;
    1607             :   }
    1608             : 
    1609        7959 :   if (LocVT == MVT::f80 ||
    1610             :       LocVT == MVT::f128) {
    1611         882 :     unsigned Offset7 = State.AllocateStack(
    1612        1323 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    1613        1323 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    1614         882 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset7, LocVT, LocInfo));
    1615         441 :     return false;
    1616             :   }
    1617             : 
    1618        3597 :   if (LocVT == MVT::v16i8 ||
    1619        3533 :       LocVT == MVT::v8i16 ||
    1620        3461 :       LocVT == MVT::v4i32 ||
    1621        2125 :       LocVT == MVT::v2i64 ||
    1622        5783 :       LocVT == MVT::v4f32 ||
    1623             :       LocVT == MVT::v2f64) {
    1624        1715 :     unsigned Offset8 = State.AllocateStack(16, 16);
    1625        3430 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
    1626        1715 :     return false;
    1627             :   }
    1628             : 
    1629        1912 :   if (LocVT == MVT::v32i8 ||
    1630        1912 :       LocVT == MVT::v16i16 ||
    1631        1912 :       LocVT == MVT::v8i32 ||
    1632        1876 :       LocVT == MVT::v4i64 ||
    1633        3855 :       LocVT == MVT::v8f32 ||
    1634             :       LocVT == MVT::v4f64) {
    1635         129 :     unsigned Offset9 = State.AllocateStack(32, 32);
    1636         258 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    1637         129 :     return false;
    1638             :   }
    1639             : 
    1640        1855 :   if (LocVT == MVT::v16i32 ||
    1641        1855 :       LocVT == MVT::v8i64 ||
    1642        3710 :       LocVT == MVT::v16f32 ||
    1643             :       LocVT == MVT::v8f64) {
    1644           0 :     unsigned Offset10 = State.AllocateStack(64, 64);
    1645           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    1646           0 :     return false;
    1647             :   }
    1648             : 
    1649             :   return true;  // CC didn't match.
    1650             : }
    1651             : 
    1652             : 
    1653          62 : static bool CC_X86_64_GHC(unsigned ValNo, MVT ValVT,
    1654             :                           MVT LocVT, CCValAssign::LocInfo LocInfo,
    1655             :                           ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1656             : 
    1657          62 :   if (LocVT == MVT::i8 ||
    1658         124 :       LocVT == MVT::i16 ||
    1659             :       LocVT == MVT::i32) {
    1660             :     LocVT = MVT::i64;
    1661           0 :     if (ArgFlags.isSExt())
    1662             :         LocInfo = CCValAssign::SExt;
    1663           0 :     else if (ArgFlags.isZExt())
    1664             :         LocInfo = CCValAssign::ZExt;
    1665             :     else
    1666             :         LocInfo = CCValAssign::AExt;
    1667             :   }
    1668             : 
    1669          62 :   if (LocVT == MVT::i64) {
    1670             :     static const MCPhysReg RegList1[] = {
    1671             :       X86::R13, X86::RBP, X86::R12, X86::RBX, X86::R14, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R15
    1672             :     };
    1673          56 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1674         112 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1675          56 :       return false;
    1676             :     }
    1677             :   }
    1678             : 
    1679           2 :   if (LocVT == MVT::f32 ||
    1680           0 :       LocVT == MVT::f64 ||
    1681           0 :       LocVT == MVT::v16i8 ||
    1682           0 :       LocVT == MVT::v8i16 ||
    1683           0 :       LocVT == MVT::v4i32 ||
    1684           0 :       LocVT == MVT::v2i64 ||
    1685           6 :       LocVT == MVT::v4f32 ||
    1686             :       LocVT == MVT::v2f64) {
    1687          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1688             :       static const MCPhysReg RegList2[] = {
    1689             :         X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6
    1690             :       };
    1691           6 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
    1692          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1693           6 :         return false;
    1694             :       }
    1695             :     }
    1696             :   }
    1697             : 
    1698           0 :   if (LocVT == MVT::v32i8 ||
    1699           0 :       LocVT == MVT::v16i16 ||
    1700           0 :       LocVT == MVT::v8i32 ||
    1701           0 :       LocVT == MVT::v4i64 ||
    1702           0 :       LocVT == MVT::v8f32 ||
    1703             :       LocVT == MVT::v4f64) {
    1704           0 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    1705             :       static const MCPhysReg RegList3[] = {
    1706             :         X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6
    1707             :       };
    1708           0 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1709           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1710           0 :         return false;
    1711             :       }
    1712             :     }
    1713             :   }
    1714             : 
    1715           0 :   if (LocVT == MVT::v64i8 ||
    1716           0 :       LocVT == MVT::v32i16 ||
    1717           0 :       LocVT == MVT::v16i32 ||
    1718           0 :       LocVT == MVT::v8i64 ||
    1719           0 :       LocVT == MVT::v16f32 ||
    1720             :       LocVT == MVT::v8f64) {
    1721           0 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    1722             :       static const MCPhysReg RegList4[] = {
    1723             :         X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6
    1724             :       };
    1725           0 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
    1726           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1727           0 :         return false;
    1728             :       }
    1729             :     }
    1730             :   }
    1731             : 
    1732             :   return true;  // CC didn't match.
    1733             : }
    1734             : 
    1735             : 
    1736         112 : static bool CC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
    1737             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    1738             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1739             : 
    1740         112 :   if (LocVT == MVT::i64) {
    1741             :     static const MCPhysReg RegList1[] = {
    1742             :       X86::RBX, X86::R12, X86::RBP, X86::R15, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11, X86::R13, X86::R14
    1743             :     };
    1744         112 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1745         224 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1746             :       return false;
    1747             :     }
    1748             :   }
    1749             : 
    1750             :   return true;  // CC didn't match.
    1751             : }
    1752             : 
    1753             : 
    1754          25 : static bool CC_X86_64_HHVM_C(unsigned ValNo, MVT ValVT,
    1755             :                              MVT LocVT, CCValAssign::LocInfo LocInfo,
    1756             :                              ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1757             : 
    1758          25 :   if (LocVT == MVT::i64) {
    1759             :     if (unsigned Reg = State.AllocateReg(X86::RBP)) {
    1760          10 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1761           5 :       return false;
    1762             :     }
    1763             :   }
    1764             : 
    1765          20 :   if (!CC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1766             :     return false;
    1767             : 
    1768           0 :   return true;  // CC didn't match.
    1769             : }
    1770             : 
    1771             : 
    1772          42 : static bool CC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
    1773             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    1774             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1775             : 
    1776          42 :   if (LocVT == MVT::i8 ||
    1777          84 :       LocVT == MVT::i16 ||
    1778             :       LocVT == MVT::i32) {
    1779             :     LocVT = MVT::i64;
    1780           6 :     if (ArgFlags.isSExt())
    1781             :         LocInfo = CCValAssign::SExt;
    1782           6 :     else if (ArgFlags.isZExt())
    1783             :         LocInfo = CCValAssign::ZExt;
    1784             :     else
    1785             :         LocInfo = CCValAssign::AExt;
    1786             :   }
    1787             : 
    1788          42 :   if (LocVT == MVT::i64) {
    1789             :     static const MCPhysReg RegList1[] = {
    1790             :       X86::R15, X86::RBP, X86::RSI, X86::RDX, X86::RCX, X86::R8
    1791             :     };
    1792          42 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1793          82 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1794          41 :       return false;
    1795             :     }
    1796             :   }
    1797             : 
    1798           1 :   if (LocVT == MVT::i32 ||
    1799           0 :       LocVT == MVT::i64 ||
    1800           1 :       LocVT == MVT::f32 ||
    1801             :       LocVT == MVT::f64) {
    1802           1 :     unsigned Offset2 = State.AllocateStack(8, 8);
    1803           2 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
    1804           1 :     return false;
    1805             :   }
    1806             : 
    1807             :   return true;  // CC didn't match.
    1808             : }
    1809             : 
    1810             : 
    1811          20 : static bool CC_X86_64_Intr(unsigned ValNo, MVT ValVT,
    1812             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    1813             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1814             : 
    1815          20 :   unsigned Offset1 = State.AllocateStack(8, 8);
    1816          40 :   State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1817             :   return false;
    1818             : 
    1819             :   return true;  // CC didn't match.
    1820             : }
    1821             : 
    1822             : 
    1823          69 : static bool CC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
    1824             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
    1825             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1826             : 
    1827          69 :   if (LocVT == MVT::i8 ||
    1828             :       LocVT == MVT::i16) {
    1829             :     LocVT = MVT::i32;
    1830           0 :     if (ArgFlags.isSExt())
    1831             :         LocInfo = CCValAssign::SExt;
    1832           0 :     else if (ArgFlags.isZExt())
    1833             :         LocInfo = CCValAssign::ZExt;
    1834             :     else
    1835             :         LocInfo = CCValAssign::AExt;
    1836             :   }
    1837             : 
    1838          69 :   if (LocVT == MVT::i32) {
    1839             :     if (unsigned Reg = State.AllocateReg(X86::EAX)) {
    1840           8 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1841           4 :       return false;
    1842             :     }
    1843             :   }
    1844             : 
    1845          65 :   if (LocVT == MVT::i64) {
    1846             :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    1847          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1848           9 :       return false;
    1849             :     }
    1850             :   }
    1851             : 
    1852          56 :   if (LocVT == MVT::i32 ||
    1853             :       LocVT == MVT::f32) {
    1854          22 :     unsigned Offset1 = State.AllocateStack(4, 4);
    1855          44 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset1, LocVT, LocInfo));
    1856          22 :     return false;
    1857             :   }
    1858             : 
    1859          34 :   if (LocVT == MVT::i64 ||
    1860             :       LocVT == MVT::f64) {
    1861          34 :     unsigned Offset2 = State.AllocateStack(8, 8);
    1862          68 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset2, LocVT, LocInfo));
    1863          34 :     return false;
    1864             :   }
    1865             : 
    1866             :   return true;  // CC didn't match.
    1867             : }
    1868             : 
    1869             : 
    1870         185 : static bool CC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
    1871             :                                   MVT LocVT, CCValAssign::LocInfo LocInfo,
    1872             :                                   ISD::ArgFlagsTy ArgFlags, CCState &State) {
    1873             : 
    1874         185 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    1875         185 :     if (ArgFlags.isByVal()) {
    1876           0 :       State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
    1877           0 :       return false;
    1878             :     }
    1879             :   }
    1880             : 
    1881         185 :   if (ArgFlags.isByVal()) {
    1882           0 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
    1883           0 :     return false;
    1884             :   }
    1885             : 
    1886         185 :   if (LocVT == MVT::i1 ||
    1887         174 :       LocVT == MVT::i8 ||
    1888         355 :       LocVT == MVT::i16 ||
    1889             :       LocVT == MVT::v1i1) {
    1890          15 :     LocVT = MVT::i32;
    1891          15 :     if (ArgFlags.isSExt())
    1892           2 :         LocInfo = CCValAssign::SExt;
    1893          13 :     else if (ArgFlags.isZExt())
    1894           0 :         LocInfo = CCValAssign::ZExt;
    1895             :     else
    1896          13 :         LocInfo = CCValAssign::AExt;
    1897             :   }
    1898             : 
    1899         179 :   if (LocVT == MVT::v8i1 ||
    1900         358 :       LocVT == MVT::v16i1 ||
    1901             :       LocVT == MVT::v32i1) {
    1902          18 :     LocVT = MVT::i32;
    1903          18 :     if (ArgFlags.isSExt())
    1904           0 :         LocInfo = CCValAssign::SExt;
    1905          18 :     else if (ArgFlags.isZExt())
    1906           0 :         LocInfo = CCValAssign::ZExt;
    1907             :     else
    1908          18 :         LocInfo = CCValAssign::AExt;
    1909             :   }
    1910             : 
    1911         185 :   if (LocVT == MVT::i32) {
    1912             :     static const MCPhysReg RegList1[] = {
    1913             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
    1914             :     };
    1915          62 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    1916         180 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1917          60 :       return false;
    1918             :     }
    1919             :   }
    1920             : 
    1921         125 :   if (LocVT == MVT::i64) {
    1922             :     static const MCPhysReg RegList2[] = {
    1923             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    1924             :     };
    1925           9 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    1926          27 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1927           9 :       return false;
    1928             :     }
    1929             :   }
    1930             : 
    1931         116 :   if (LocVT == MVT::v64i1) {
    1932          26 :     LocVT = MVT::i64;
    1933          26 :     if (ArgFlags.isSExt())
    1934           0 :         LocInfo = CCValAssign::SExt;
    1935          26 :     else if (ArgFlags.isZExt())
    1936           0 :         LocInfo = CCValAssign::ZExt;
    1937             :     else
    1938          26 :         LocInfo = CCValAssign::AExt;
    1939             :   }
    1940             : 
    1941         116 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    1942         116 :     if (LocVT == MVT::i64) {
    1943             :       static const MCPhysReg RegList3[] = {
    1944             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    1945             :       };
    1946          26 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    1947          66 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1948          22 :         return false;
    1949             :       }
    1950             :     }
    1951             :   }
    1952             : 
    1953          94 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    1954           0 :     if (LocVT == MVT::i64) {
    1955           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    1956             :             return false;
    1957             :     }
    1958             :   }
    1959             : 
    1960          89 :   if (LocVT == MVT::f32 ||
    1961         178 :       LocVT == MVT::f64 ||
    1962             :       LocVT == MVT::f128) {
    1963          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1964             :       static const MCPhysReg RegList4[] = {
    1965             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    1966             :       };
    1967          10 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
    1968          30 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1969          10 :         return false;
    1970             :       }
    1971             :     }
    1972             :   }
    1973             : 
    1974          84 :   if (LocVT == MVT::f80) {
    1975             :     if (unsigned Reg = State.AllocateReg(X86::FP0)) {
    1976           9 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1977           3 :       return false;
    1978             :     }
    1979             :   }
    1980             : 
    1981          81 :   if (LocVT == MVT::v16i8 ||
    1982          81 :       LocVT == MVT::v8i16 ||
    1983          76 :       LocVT == MVT::v4i32 ||
    1984          76 :       LocVT == MVT::v2i64 ||
    1985         121 :       LocVT == MVT::v4f32 ||
    1986             :       LocVT == MVT::v2f64) {
    1987          82 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    1988             :       static const MCPhysReg RegList5[] = {
    1989             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    1990             :       };
    1991          41 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    1992          99 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    1993          33 :         return false;
    1994             :       }
    1995             :     }
    1996             :   }
    1997             : 
    1998          48 :   if (LocVT == MVT::v32i8 ||
    1999          48 :       LocVT == MVT::v16i16 ||
    2000          43 :       LocVT == MVT::v8i32 ||
    2001          43 :       LocVT == MVT::v4i64 ||
    2002          91 :       LocVT == MVT::v8f32 ||
    2003             :       LocVT == MVT::v4f64) {
    2004          10 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    2005             :       static const MCPhysReg RegList6[] = {
    2006             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    2007             :       };
    2008           5 :       if (unsigned Reg = State.AllocateReg(RegList6)) {
    2009          15 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2010           5 :         return false;
    2011             :       }
    2012             :     }
    2013             :   }
    2014             : 
    2015          43 :   if (LocVT == MVT::v64i8 ||
    2016          43 :       LocVT == MVT::v32i16 ||
    2017          38 :       LocVT == MVT::v16i32 ||
    2018          38 :       LocVT == MVT::v8i64 ||
    2019          57 :       LocVT == MVT::v16f32 ||
    2020             :       LocVT == MVT::v8f64) {
    2021          58 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    2022             :       static const MCPhysReg RegList7[] = {
    2023             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    2024             :       };
    2025          29 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    2026          81 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2027          27 :         return false;
    2028             :       }
    2029             :     }
    2030             :   }
    2031             : 
    2032          16 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2033          14 :     if (LocVT == MVT::i32 ||
    2034          10 :         LocVT == MVT::i64 ||
    2035          26 :         LocVT == MVT::f32 ||
    2036             :         LocVT == MVT::f64) {
    2037           6 :       unsigned Offset8 = State.AllocateStack(8, 8);
    2038          18 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
    2039           6 :       return false;
    2040             :     }
    2041             :   }
    2042             : 
    2043          10 :   if (LocVT == MVT::i32 ||
    2044             :       LocVT == MVT::f32) {
    2045           0 :     unsigned Offset9 = State.AllocateStack(4, 4);
    2046           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    2047           0 :     return false;
    2048             :   }
    2049             : 
    2050          20 :   if (LocVT == MVT::i64 ||
    2051             :       LocVT == MVT::f64) {
    2052           0 :     unsigned Offset10 = State.AllocateStack(8, 4);
    2053           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    2054           0 :     return false;
    2055             :   }
    2056             : 
    2057          10 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2058          10 :     if (LocVT == MVT::x86mmx) {
    2059           0 :       unsigned Offset11 = State.AllocateStack(8, 8);
    2060           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
    2061           0 :       return false;
    2062             :     }
    2063             :   }
    2064             : 
    2065          10 :   if (LocVT == MVT::x86mmx) {
    2066           0 :     unsigned Offset12 = State.AllocateStack(8, 4);
    2067           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
    2068           0 :     return false;
    2069             :   }
    2070             : 
    2071          10 :   if (LocVT == MVT::f80 ||
    2072             :       LocVT == MVT::f128) {
    2073           0 :     unsigned Offset13 = State.AllocateStack(
    2074           0 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    2075           0 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    2076           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
    2077           0 :     return false;
    2078             :   }
    2079             : 
    2080          10 :   if (LocVT == MVT::v16i8 ||
    2081          10 :       LocVT == MVT::v8i16 ||
    2082          10 :       LocVT == MVT::v4i32 ||
    2083          10 :       LocVT == MVT::v2i64 ||
    2084          12 :       LocVT == MVT::v4f32 ||
    2085             :       LocVT == MVT::v2f64) {
    2086           8 :     unsigned Offset14 = State.AllocateStack(16, 16);
    2087          24 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
    2088           8 :     return false;
    2089             :   }
    2090             : 
    2091           2 :   if (LocVT == MVT::v32i8 ||
    2092           2 :       LocVT == MVT::v16i16 ||
    2093           2 :       LocVT == MVT::v8i32 ||
    2094           2 :       LocVT == MVT::v4i64 ||
    2095           4 :       LocVT == MVT::v8f32 ||
    2096             :       LocVT == MVT::v4f64) {
    2097           0 :     unsigned Offset15 = State.AllocateStack(32, 32);
    2098           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
    2099           0 :     return false;
    2100             :   }
    2101             : 
    2102           2 :   if (LocVT == MVT::v16i32 ||
    2103           2 :       LocVT == MVT::v8i64 ||
    2104           2 :       LocVT == MVT::v16f32 ||
    2105             :       LocVT == MVT::v8f64) {
    2106           2 :     unsigned Offset16 = State.AllocateStack(64, 64);
    2107           6 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset16, LocVT, LocInfo));
    2108           2 :     return false;
    2109             :   }
    2110             : 
    2111             :   return true;  // CC didn't match.
    2112             : }
    2113             : 
    2114             : 
    2115         244 : static bool CC_X86_Win32_VectorCall(unsigned ValNo, MVT ValVT,
    2116             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    2117             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2118             : 
    2119         244 :   if (CC_X86_32_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2120             :     return false;
    2121             : 
    2122          60 :   if (!CC_X86_32_FastCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2123             :     return false;
    2124             : 
    2125           0 :   return true;  // CC didn't match.
    2126             : }
    2127             : 
    2128             : 
    2129        2718 : static bool CC_X86_Win64_C(unsigned ValNo, MVT ValVT,
    2130             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    2131             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2132             : 
    2133        2718 :   if (LocVT == MVT::i1 ||
    2134             :       LocVT == MVT::v1i1) {
    2135             :     LocVT = MVT::i8;
    2136           0 :     if (ArgFlags.isSExt())
    2137             :         LocInfo = CCValAssign::SExt;
    2138           0 :     else if (ArgFlags.isZExt())
    2139             :         LocInfo = CCValAssign::ZExt;
    2140             :     else
    2141             :         LocInfo = CCValAssign::AExt;
    2142             :   }
    2143             : 
    2144        2718 :   if (ArgFlags.isNest()) {
    2145             :     if (unsigned Reg = State.AllocateReg(X86::R10)) {
    2146           4 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2147           2 :       return false;
    2148             :     }
    2149             :   }
    2150             : 
    2151        2716 :   if (ArgFlags.isSwiftError()) {
    2152           2 :     if (LocVT == MVT::i64) {
    2153             :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    2154           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2155           2 :         return false;
    2156             :       }
    2157             :     }
    2158             :   }
    2159             : 
    2160        2713 :   if (LocVT == MVT::v16i8 ||
    2161        2711 :       LocVT == MVT::v8i16 ||
    2162        2704 :       LocVT == MVT::v4i32 ||
    2163        2704 :       LocVT == MVT::v2i64 ||
    2164        5139 :       LocVT == MVT::v4f32 ||
    2165             :       LocVT == MVT::v2f64) {
    2166             :     LocVT = MVT::i64;
    2167             :     LocInfo = CCValAssign::Indirect;
    2168             :   }
    2169             : 
    2170        2714 :   if (LocVT == MVT::v32i8 ||
    2171        2714 :       LocVT == MVT::v16i16 ||
    2172        2712 :       LocVT == MVT::v8i32 ||
    2173        2712 :       LocVT == MVT::v4i64 ||
    2174        5274 :       LocVT == MVT::v8f32 ||
    2175             :       LocVT == MVT::v4f64) {
    2176             :     LocVT = MVT::i64;
    2177             :     LocInfo = CCValAssign::Indirect;
    2178             :   }
    2179             : 
    2180        2714 :   if (LocVT == MVT::v16i32 ||
    2181        2700 :       LocVT == MVT::v16f32 ||
    2182        5414 :       LocVT == MVT::v8f64 ||
    2183             :       LocVT == MVT::v8i64) {
    2184             :     LocVT = MVT::i64;
    2185             :     LocInfo = CCValAssign::Indirect;
    2186             :   }
    2187             : 
    2188        2714 :   if (LocVT == MVT::f80) {
    2189             :     LocVT = MVT::i64;
    2190             :     LocInfo = CCValAssign::Indirect;
    2191             :   }
    2192             : 
    2193        2714 :   if (LocVT == MVT::x86mmx) {
    2194             :     LocVT = MVT::i64;
    2195             :     LocInfo = CCValAssign::BCvt;
    2196             :   }
    2197             : 
    2198        2714 :   if (LocVT == MVT::i8) {
    2199             :     static const MCPhysReg RegList1[] = {
    2200             :       X86::CL, X86::DL, X86::R8B, X86::R9B
    2201             :     };
    2202             :     static const MCPhysReg RegList2[] = {
    2203             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2204             :     };
    2205          40 :     if (unsigned Reg = State.AllocateReg(RegList1, RegList2)) {
    2206          72 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2207          36 :       return false;
    2208             :     }
    2209             :   }
    2210             : 
    2211        2678 :   if (LocVT == MVT::i16) {
    2212             :     static const MCPhysReg RegList3[] = {
    2213             :       X86::CX, X86::DX, X86::R8W, X86::R9W
    2214             :     };
    2215             :     static const MCPhysReg RegList4[] = {
    2216             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2217             :     };
    2218          69 :     if (unsigned Reg = State.AllocateReg(RegList3, RegList4)) {
    2219          98 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2220          49 :       return false;
    2221             :     }
    2222             :   }
    2223             : 
    2224        2629 :   if (LocVT == MVT::i32) {
    2225             :     static const MCPhysReg RegList5[] = {
    2226             :       X86::ECX, X86::EDX, X86::R8D, X86::R9D
    2227             :     };
    2228             :     static const MCPhysReg RegList6[] = {
    2229             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2230             :     };
    2231         625 :     if (unsigned Reg = State.AllocateReg(RegList5, RegList6)) {
    2232        1080 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2233         540 :       return false;
    2234             :     }
    2235             :   }
    2236             : 
    2237        2089 :   if (State.getCallingConv() == CallingConv::X86_ThisCall) {
    2238          14 :     if (ArgFlags.isSRet()) {
    2239           0 :       if (LocVT == MVT::i64) {
    2240             :         static const MCPhysReg RegList7[] = {
    2241             :           X86::RDX, X86::R8, X86::R9
    2242             :         };
    2243             :         static const MCPhysReg RegList8[] = {
    2244             :           X86::XMM1, X86::XMM2, X86::XMM3
    2245             :         };
    2246           0 :         if (unsigned Reg = State.AllocateReg(RegList7, RegList8)) {
    2247           0 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2248           0 :           return false;
    2249             :         }
    2250             :       }
    2251             :     }
    2252             :   }
    2253             : 
    2254        2089 :   if (LocVT == MVT::i64) {
    2255             :     static const MCPhysReg RegList9[] = {
    2256             :       X86::RCX, X86::RDX, X86::R8, X86::R9
    2257             :     };
    2258             :     static const MCPhysReg RegList10[] = {
    2259             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2260             :     };
    2261        1851 :     if (unsigned Reg = State.AllocateReg(RegList9, RegList10)) {
    2262        3522 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2263        1761 :       return false;
    2264             :     }
    2265             :   }
    2266             : 
    2267         260 :   if (LocVT == MVT::f32 ||
    2268         208 :       LocVT == MVT::f64 ||
    2269         208 :       LocVT == MVT::v16i8 ||
    2270         208 :       LocVT == MVT::v8i16 ||
    2271         208 :       LocVT == MVT::v4i32 ||
    2272         208 :       LocVT == MVT::v2i64 ||
    2273         536 :       LocVT == MVT::v4f32 ||
    2274             :       LocVT == MVT::v2f64) {
    2275             :     static const MCPhysReg RegList11[] = {
    2276             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2277             :     };
    2278             :     static const MCPhysReg RegList12[] = {
    2279             :       X86::RCX, X86::RDX, X86::R8, X86::R9
    2280             :     };
    2281         120 :     if (unsigned Reg = State.AllocateReg(RegList11, RegList12)) {
    2282         198 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2283          99 :       return false;
    2284             :     }
    2285             :   }
    2286             : 
    2287         225 :   if (LocVT == MVT::i8 ||
    2288         205 :       LocVT == MVT::i16 ||
    2289         120 :       LocVT == MVT::i32 ||
    2290          30 :       LocVT == MVT::i64 ||
    2291         243 :       LocVT == MVT::f32 ||
    2292             :       LocVT == MVT::f64) {
    2293         220 :     unsigned Offset13 = State.AllocateStack(8, 8);
    2294         440 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
    2295         220 :     return false;
    2296             :   }
    2297             : 
    2298             :   return true;  // CC didn't match.
    2299             : }
    2300             : 
    2301             : 
    2302         195 : static bool CC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
    2303             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
    2304             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2305             : 
    2306         195 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2307         195 :     if (ArgFlags.isByVal()) {
    2308           0 :       State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 8, 8, ArgFlags);
    2309           0 :       return false;
    2310             :     }
    2311             :   }
    2312             : 
    2313         195 :   if (ArgFlags.isByVal()) {
    2314           0 :     State.HandleByVal(ValNo, ValVT, LocVT, LocInfo, 4, 4, ArgFlags);
    2315           0 :     return false;
    2316             :   }
    2317             : 
    2318         195 :   if (LocVT == MVT::i1 ||
    2319         184 :       LocVT == MVT::i8 ||
    2320         375 :       LocVT == MVT::i16 ||
    2321             :       LocVT == MVT::v1i1) {
    2322          15 :     LocVT = MVT::i32;
    2323          15 :     if (ArgFlags.isSExt())
    2324           2 :         LocInfo = CCValAssign::SExt;
    2325          13 :     else if (ArgFlags.isZExt())
    2326           0 :         LocInfo = CCValAssign::ZExt;
    2327             :     else
    2328          13 :         LocInfo = CCValAssign::AExt;
    2329             :   }
    2330             : 
    2331         189 :   if (LocVT == MVT::v8i1 ||
    2332         378 :       LocVT == MVT::v16i1 ||
    2333             :       LocVT == MVT::v32i1) {
    2334          18 :     LocVT = MVT::i32;
    2335          18 :     if (ArgFlags.isSExt())
    2336           0 :         LocInfo = CCValAssign::SExt;
    2337          18 :     else if (ArgFlags.isZExt())
    2338           0 :         LocInfo = CCValAssign::ZExt;
    2339             :     else
    2340          18 :         LocInfo = CCValAssign::AExt;
    2341             :   }
    2342             : 
    2343         195 :   if (LocVT == MVT::i32) {
    2344             :     static const MCPhysReg RegList1[] = {
    2345             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
    2346             :     };
    2347          72 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2348         216 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2349          72 :       return false;
    2350             :     }
    2351             :   }
    2352             : 
    2353         123 :   if (LocVT == MVT::i64) {
    2354             :     static const MCPhysReg RegList2[] = {
    2355             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    2356             :     };
    2357           9 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2358          27 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2359           9 :       return false;
    2360             :     }
    2361             :   }
    2362             : 
    2363         114 :   if (LocVT == MVT::v64i1) {
    2364          26 :     LocVT = MVT::i64;
    2365          26 :     if (ArgFlags.isSExt())
    2366           0 :         LocInfo = CCValAssign::SExt;
    2367          26 :     else if (ArgFlags.isZExt())
    2368           0 :         LocInfo = CCValAssign::ZExt;
    2369             :     else
    2370          26 :         LocInfo = CCValAssign::AExt;
    2371             :   }
    2372             : 
    2373         114 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2374         114 :     if (LocVT == MVT::i64) {
    2375             :       static const MCPhysReg RegList3[] = {
    2376             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    2377             :       };
    2378          26 :       if (unsigned Reg = State.AllocateReg(RegList3)) {
    2379          72 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2380          24 :         return false;
    2381             :       }
    2382             :     }
    2383             :   }
    2384             : 
    2385          90 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    2386           0 :     if (LocVT == MVT::i64) {
    2387           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2388             :             return false;
    2389             :     }
    2390             :   }
    2391             : 
    2392          85 :   if (LocVT == MVT::f32 ||
    2393         170 :       LocVT == MVT::f64 ||
    2394             :       LocVT == MVT::f128) {
    2395          20 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    2396             :       static const MCPhysReg RegList4[] = {
    2397             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    2398             :       };
    2399          10 :       if (unsigned Reg = State.AllocateReg(RegList4)) {
    2400          30 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2401          10 :         return false;
    2402             :       }
    2403             :     }
    2404             :   }
    2405             : 
    2406          80 :   if (LocVT == MVT::f80) {
    2407             :     if (unsigned Reg = State.AllocateReg(X86::FP0)) {
    2408           9 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2409           3 :       return false;
    2410             :     }
    2411             :   }
    2412             : 
    2413          77 :   if (LocVT == MVT::v16i8 ||
    2414          77 :       LocVT == MVT::v8i16 ||
    2415          72 :       LocVT == MVT::v4i32 ||
    2416          72 :       LocVT == MVT::v2i64 ||
    2417         113 :       LocVT == MVT::v4f32 ||
    2418             :       LocVT == MVT::v2f64) {
    2419          82 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    2420             :       static const MCPhysReg RegList5[] = {
    2421             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    2422             :       };
    2423          41 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    2424          99 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2425          33 :         return false;
    2426             :       }
    2427             :     }
    2428             :   }
    2429             : 
    2430          44 :   if (LocVT == MVT::v32i8 ||
    2431          44 :       LocVT == MVT::v16i16 ||
    2432          39 :       LocVT == MVT::v8i32 ||
    2433          39 :       LocVT == MVT::v4i64 ||
    2434          83 :       LocVT == MVT::v8f32 ||
    2435             :       LocVT == MVT::v4f64) {
    2436          10 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    2437             :       static const MCPhysReg RegList6[] = {
    2438             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    2439             :       };
    2440           5 :       if (unsigned Reg = State.AllocateReg(RegList6)) {
    2441          15 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2442           5 :         return false;
    2443             :       }
    2444             :     }
    2445             :   }
    2446             : 
    2447          39 :   if (LocVT == MVT::v64i8 ||
    2448          39 :       LocVT == MVT::v32i16 ||
    2449          34 :       LocVT == MVT::v16i32 ||
    2450          34 :       LocVT == MVT::v8i64 ||
    2451          49 :       LocVT == MVT::v16f32 ||
    2452             :       LocVT == MVT::v8f64) {
    2453          58 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    2454             :       static const MCPhysReg RegList7[] = {
    2455             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    2456             :       };
    2457          29 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    2458          81 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2459          27 :         return false;
    2460             :       }
    2461             :     }
    2462             :   }
    2463             : 
    2464          12 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2465          12 :     if (LocVT == MVT::i32 ||
    2466          10 :         LocVT == MVT::i64 ||
    2467          22 :         LocVT == MVT::f32 ||
    2468             :         LocVT == MVT::f64) {
    2469           2 :       unsigned Offset8 = State.AllocateStack(8, 8);
    2470           6 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset8, LocVT, LocInfo));
    2471           2 :       return false;
    2472             :     }
    2473             :   }
    2474             : 
    2475          10 :   if (LocVT == MVT::i32 ||
    2476             :       LocVT == MVT::f32) {
    2477           0 :     unsigned Offset9 = State.AllocateStack(4, 4);
    2478           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset9, LocVT, LocInfo));
    2479           0 :     return false;
    2480             :   }
    2481             : 
    2482          20 :   if (LocVT == MVT::i64 ||
    2483             :       LocVT == MVT::f64) {
    2484           0 :     unsigned Offset10 = State.AllocateStack(8, 4);
    2485           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset10, LocVT, LocInfo));
    2486           0 :     return false;
    2487             :   }
    2488             : 
    2489          10 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2490          10 :     if (LocVT == MVT::x86mmx) {
    2491           0 :       unsigned Offset11 = State.AllocateStack(8, 8);
    2492           0 :       State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset11, LocVT, LocInfo));
    2493           0 :       return false;
    2494             :     }
    2495             :   }
    2496             : 
    2497          10 :   if (LocVT == MVT::x86mmx) {
    2498           0 :     unsigned Offset12 = State.AllocateStack(8, 4);
    2499           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset12, LocVT, LocInfo));
    2500           0 :     return false;
    2501             :   }
    2502             : 
    2503          10 :   if (LocVT == MVT::f80 ||
    2504             :       LocVT == MVT::f128) {
    2505           0 :     unsigned Offset13 = State.AllocateStack(
    2506           0 :       State.getMachineFunction().getDataLayout().getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())), 
    2507           0 :       State.getMachineFunction().getDataLayout().getABITypeAlignment(EVT(LocVT).getTypeForEVT(State.getContext())));
    2508           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset13, LocVT, LocInfo));
    2509           0 :     return false;
    2510             :   }
    2511             : 
    2512          10 :   if (LocVT == MVT::v16i8 ||
    2513          10 :       LocVT == MVT::v8i16 ||
    2514          10 :       LocVT == MVT::v4i32 ||
    2515          10 :       LocVT == MVT::v2i64 ||
    2516          12 :       LocVT == MVT::v4f32 ||
    2517             :       LocVT == MVT::v2f64) {
    2518           8 :     unsigned Offset14 = State.AllocateStack(16, 16);
    2519          24 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset14, LocVT, LocInfo));
    2520           8 :     return false;
    2521             :   }
    2522             : 
    2523           2 :   if (LocVT == MVT::v32i8 ||
    2524           2 :       LocVT == MVT::v16i16 ||
    2525           2 :       LocVT == MVT::v8i32 ||
    2526           2 :       LocVT == MVT::v4i64 ||
    2527           4 :       LocVT == MVT::v8f32 ||
    2528             :       LocVT == MVT::v4f64) {
    2529           0 :     unsigned Offset15 = State.AllocateStack(32, 32);
    2530           0 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset15, LocVT, LocInfo));
    2531           0 :     return false;
    2532             :   }
    2533             : 
    2534           2 :   if (LocVT == MVT::v16i32 ||
    2535           2 :       LocVT == MVT::v8i64 ||
    2536           2 :       LocVT == MVT::v16f32 ||
    2537             :       LocVT == MVT::v8f64) {
    2538           2 :     unsigned Offset16 = State.AllocateStack(64, 64);
    2539           6 :     State.addLoc(CCValAssign::getMem(ValNo, ValVT, Offset16, LocVT, LocInfo));
    2540           2 :     return false;
    2541             :   }
    2542             : 
    2543             :   return true;  // CC didn't match.
    2544             : }
    2545             : 
    2546             : 
    2547         152 : static bool CC_X86_Win64_VectorCall(unsigned ValNo, MVT ValVT,
    2548             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    2549             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2550             : 
    2551         152 :   if (CC_X86_64_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2552             :     return false;
    2553             : 
    2554          17 :   if (!CC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2555             :     return false;
    2556             : 
    2557           0 :   return true;  // CC didn't match.
    2558             : }
    2559             : 
    2560             : 
    2561         240 : static bool RetCC_Intel_OCL_BI(unsigned ValNo, MVT ValVT,
    2562             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
    2563             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2564             : 
    2565         240 :   if (LocVT == MVT::f32 ||
    2566         240 :       LocVT == MVT::f64 ||
    2567         240 :       LocVT == MVT::v4i32 ||
    2568         240 :       LocVT == MVT::v2i64 ||
    2569         392 :       LocVT == MVT::v4f32 ||
    2570             :       LocVT == MVT::v2f64) {
    2571             :     static const MCPhysReg RegList1[] = {
    2572             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2573             :     };
    2574          88 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2575         176 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2576          88 :       return false;
    2577             :     }
    2578             :   }
    2579             : 
    2580         104 :   if (LocVT == MVT::v8f32 ||
    2581         104 :       LocVT == MVT::v4f64 ||
    2582         256 :       LocVT == MVT::v8i32 ||
    2583             :       LocVT == MVT::v4i64) {
    2584             :     static const MCPhysReg RegList2[] = {
    2585             :       X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
    2586             :     };
    2587          48 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2588          96 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2589          48 :       return false;
    2590             :     }
    2591             :   }
    2592             : 
    2593           8 :   if (LocVT == MVT::v16f32 ||
    2594           8 :       LocVT == MVT::v8f64 ||
    2595         112 :       LocVT == MVT::v16i32 ||
    2596             :       LocVT == MVT::v8i64) {
    2597             :     static const MCPhysReg RegList3[] = {
    2598             :       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
    2599             :     };
    2600          96 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2601         192 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2602          96 :       return false;
    2603             :     }
    2604             :   }
    2605             : 
    2606           8 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2607             :     return false;
    2608             : 
    2609           0 :   return true;  // CC didn't match.
    2610             : }
    2611             : 
    2612             : 
    2613      362931 : static bool RetCC_X86(unsigned ValNo, MVT ValVT,
    2614             :                       MVT LocVT, CCValAssign::LocInfo LocInfo,
    2615             :                       ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2616             : 
    2617      362931 :   if (State.getCallingConv() == CallingConv::Intel_OCL_BI) {
    2618         240 :     if (!RetCC_Intel_OCL_BI(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2619             :       return false;
    2620             :   }
    2621             : 
    2622      362691 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    2623      308731 :     if (!RetCC_X86_64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2624             :       return false;
    2625             :   }
    2626             : 
    2627       54196 :   if (!RetCC_X86_32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2628             :     return false;
    2629             : 
    2630         521 :   return true;  // CC didn't match.
    2631             : }
    2632             : 
    2633             : 
    2634      352293 : static bool RetCC_X86Common(unsigned ValNo, MVT ValVT,
    2635             :                             MVT LocVT, CCValAssign::LocInfo LocInfo,
    2636             :                             ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2637             : 
    2638      352293 :   if (LocVT == MVT::v1i1) {
    2639             :     LocVT = MVT::i8;
    2640           6 :     if (ArgFlags.isSExt())
    2641             :         LocInfo = CCValAssign::SExt;
    2642           6 :     else if (ArgFlags.isZExt())
    2643             :         LocInfo = CCValAssign::ZExt;
    2644             :     else
    2645             :         LocInfo = CCValAssign::AExt;
    2646             :   }
    2647             : 
    2648      352293 :   if (LocVT == MVT::i1) {
    2649             :     LocVT = MVT::i8;
    2650          12 :     if (ArgFlags.isSExt())
    2651             :         LocInfo = CCValAssign::SExt;
    2652          12 :     else if (ArgFlags.isZExt())
    2653             :         LocInfo = CCValAssign::ZExt;
    2654             :     else
    2655             :         LocInfo = CCValAssign::AExt;
    2656             :   }
    2657             : 
    2658      352293 :   if (LocVT == MVT::i8) {
    2659             :     static const MCPhysReg RegList1[] = {
    2660             :       X86::AL, X86::DL, X86::CL
    2661             :     };
    2662       11640 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2663       23056 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2664       11528 :       return false;
    2665             :     }
    2666             :   }
    2667             : 
    2668      340765 :   if (LocVT == MVT::i16) {
    2669             :     static const MCPhysReg RegList2[] = {
    2670             :       X86::AX, X86::DX, X86::CX
    2671             :     };
    2672        3326 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2673        6576 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2674        3288 :       return false;
    2675             :     }
    2676             :   }
    2677             : 
    2678      337477 :   if (LocVT == MVT::i32) {
    2679             :     static const MCPhysReg RegList3[] = {
    2680             :       X86::EAX, X86::EDX, X86::ECX
    2681             :     };
    2682       92504 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2683      184472 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2684       92236 :       return false;
    2685             :     }
    2686             :   }
    2687             : 
    2688      245241 :   if (LocVT == MVT::i64) {
    2689             :     static const MCPhysReg RegList4[] = {
    2690             :       X86::RAX, X86::RDX, X86::RCX
    2691             :     };
    2692      121571 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    2693      242866 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2694      121433 :       return false;
    2695             :     }
    2696             :   }
    2697             : 
    2698      123808 :   if (LocVT == MVT::v2i1) {
    2699             :     LocVT = MVT::v2i64;
    2700          28 :     if (ArgFlags.isSExt())
    2701             :         LocInfo = CCValAssign::SExt;
    2702          28 :     else if (ArgFlags.isZExt())
    2703             :         LocInfo = CCValAssign::ZExt;
    2704             :     else
    2705             :         LocInfo = CCValAssign::AExt;
    2706             :   }
    2707             : 
    2708      123808 :   if (LocVT == MVT::v4i1) {
    2709             :     LocVT = MVT::v4i32;
    2710          78 :     if (ArgFlags.isSExt())
    2711             :         LocInfo = CCValAssign::SExt;
    2712          78 :     else if (ArgFlags.isZExt())
    2713             :         LocInfo = CCValAssign::ZExt;
    2714             :     else
    2715             :         LocInfo = CCValAssign::AExt;
    2716             :   }
    2717             : 
    2718      123808 :   if (LocVT == MVT::v8i1) {
    2719             :     LocVT = MVT::v8i16;
    2720         116 :     if (ArgFlags.isSExt())
    2721             :         LocInfo = CCValAssign::SExt;
    2722         116 :     else if (ArgFlags.isZExt())
    2723             :         LocInfo = CCValAssign::ZExt;
    2724             :     else
    2725             :         LocInfo = CCValAssign::AExt;
    2726             :   }
    2727             : 
    2728      123808 :   if (LocVT == MVT::v16i1) {
    2729             :     LocVT = MVT::v16i8;
    2730         156 :     if (ArgFlags.isSExt())
    2731             :         LocInfo = CCValAssign::SExt;
    2732         156 :     else if (ArgFlags.isZExt())
    2733             :         LocInfo = CCValAssign::ZExt;
    2734             :     else
    2735             :         LocInfo = CCValAssign::AExt;
    2736             :   }
    2737             : 
    2738      123808 :   if (LocVT == MVT::v32i1) {
    2739             :     LocVT = MVT::v32i8;
    2740          30 :     if (ArgFlags.isSExt())
    2741             :         LocInfo = CCValAssign::SExt;
    2742          30 :     else if (ArgFlags.isZExt())
    2743             :         LocInfo = CCValAssign::ZExt;
    2744             :     else
    2745             :         LocInfo = CCValAssign::AExt;
    2746             :   }
    2747             : 
    2748      123808 :   if (LocVT == MVT::v64i1) {
    2749             :     LocVT = MVT::v64i8;
    2750          20 :     if (ArgFlags.isSExt())
    2751             :         LocInfo = CCValAssign::SExt;
    2752          20 :     else if (ArgFlags.isZExt())
    2753             :         LocInfo = CCValAssign::ZExt;
    2754             :     else
    2755             :         LocInfo = CCValAssign::AExt;
    2756             :   }
    2757             : 
    2758      115202 :   if (LocVT == MVT::v16i8 ||
    2759      104089 :       LocVT == MVT::v8i16 ||
    2760       90502 :       LocVT == MVT::v4i32 ||
    2761       78734 :       LocVT == MVT::v2i64 ||
    2762      188791 :       LocVT == MVT::v4f32 ||
    2763             :       LocVT == MVT::v2f64) {
    2764             :     static const MCPhysReg RegList5[] = {
    2765             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    2766             :     };
    2767       67151 :     if (unsigned Reg = State.AllocateReg(RegList5)) {
    2768      134162 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2769       67081 :       return false;
    2770             :     }
    2771             :   }
    2772             : 
    2773       50861 :   if (LocVT == MVT::v32i8 ||
    2774       43814 :       LocVT == MVT::v16i16 ||
    2775       37394 :       LocVT == MVT::v8i32 ||
    2776       31050 :       LocVT == MVT::v4i64 ||
    2777       80630 :       LocVT == MVT::v8f32 ||
    2778             :       LocVT == MVT::v4f64) {
    2779             :     static const MCPhysReg RegList6[] = {
    2780             :       X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3
    2781             :     };
    2782       38572 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    2783       77124 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2784       38562 :       return false;
    2785             :     }
    2786             :   }
    2787             : 
    2788       17243 :   if (LocVT == MVT::v64i8 ||
    2789       15688 :       LocVT == MVT::v32i16 ||
    2790       12936 :       LocVT == MVT::v16i32 ||
    2791        9409 :       LocVT == MVT::v8i64 ||
    2792       23692 :       LocVT == MVT::v16f32 ||
    2793             :       LocVT == MVT::v8f64) {
    2794             :     static const MCPhysReg RegList7[] = {
    2795             :       X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3
    2796             :     };
    2797       16488 :     if (unsigned Reg = State.AllocateReg(RegList7)) {
    2798       32972 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2799       16486 :       return false;
    2800             :     }
    2801             :   }
    2802             : 
    2803        1679 :   if (LocVT == MVT::x86mmx) {
    2804             :     if (unsigned Reg = State.AllocateReg(X86::MM0)) {
    2805          12 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2806           6 :       return false;
    2807             :     }
    2808             :   }
    2809             : 
    2810        1673 :   if (!static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    2811        1622 :     if (LocVT == MVT::f80) {
    2812             :       static const MCPhysReg RegList8[] = {
    2813             :         X86::FP0, X86::FP1
    2814             :       };
    2815         868 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    2816        1736 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2817         868 :         return false;
    2818             :       }
    2819             :     }
    2820             :   }
    2821             : 
    2822             :   return true;  // CC didn't match.
    2823             : }
    2824             : 
    2825             : 
    2826       54196 : static bool RetCC_X86_32(unsigned ValNo, MVT ValVT,
    2827             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
    2828             :                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2829             : 
    2830       54196 :   if (State.getCallingConv() == CallingConv::Fast) {
    2831         299 :     if (!RetCC_X86_32_Fast(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2832             :       return false;
    2833             :   }
    2834             : 
    2835       53917 :   if (State.getCallingConv() == CallingConv::HiPE) {
    2836          30 :     if (!RetCC_X86_32_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2837             :       return false;
    2838             :   }
    2839             : 
    2840       53887 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
    2841          84 :     if (!RetCC_X86_32_VectorCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2842             :       return false;
    2843             :   }
    2844             : 
    2845       53807 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    2846         178 :     if (!RetCC_X86_32_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2847             :       return false;
    2848             :   }
    2849             : 
    2850       53629 :   if (!RetCC_X86_32_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2851             :     return false;
    2852             : 
    2853         521 :   return true;  // CC didn't match.
    2854             : }
    2855             : 
    2856             : 
    2857       53629 : static bool RetCC_X86_32_C(unsigned ValNo, MVT ValVT,
    2858             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    2859             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2860             : 
    2861       53629 :   if (ArgFlags.isInReg()) {
    2862          48 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    2863           8 :       if (LocVT == MVT::f32 ||
    2864             :           LocVT == MVT::f64) {
    2865             :         static const MCPhysReg RegList1[] = {
    2866             :           X86::XMM0, X86::XMM1, X86::XMM2
    2867             :         };
    2868           8 :         if (unsigned Reg = State.AllocateReg(RegList1)) {
    2869          16 :           State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2870           8 :           return false;
    2871             :         }
    2872             :       }
    2873             :     }
    2874             :   }
    2875             : 
    2876       53621 :   if (LocVT == MVT::f32 ||
    2877             :       LocVT == MVT::f64) {
    2878             :     static const MCPhysReg RegList2[] = {
    2879             :       X86::FP0, X86::FP1
    2880             :     };
    2881        1695 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    2882        3214 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2883        1607 :       return false;
    2884             :     }
    2885             :   }
    2886             : 
    2887       52014 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2888             :     return false;
    2889             : 
    2890         521 :   return true;  // CC didn't match.
    2891             : }
    2892             : 
    2893             : 
    2894         299 : static bool RetCC_X86_32_Fast(unsigned ValNo, MVT ValVT,
    2895             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    2896             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2897             : 
    2898         299 :   if (LocVT == MVT::f32) {
    2899           4 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    2900             :       static const MCPhysReg RegList1[] = {
    2901             :         X86::XMM0, X86::XMM1, X86::XMM2
    2902             :       };
    2903           2 :       if (unsigned Reg = State.AllocateReg(RegList1)) {
    2904           4 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2905           2 :         return false;
    2906             :       }
    2907             :     }
    2908             :   }
    2909             : 
    2910         297 :   if (LocVT == MVT::f64) {
    2911          50 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE2()) {
    2912             :       static const MCPhysReg RegList2[] = {
    2913             :         X86::XMM0, X86::XMM1, X86::XMM2
    2914             :       };
    2915          17 :       if (unsigned Reg = State.AllocateReg(RegList2)) {
    2916          22 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2917          11 :         return false;
    2918             :       }
    2919             :     }
    2920             :   }
    2921             : 
    2922         286 :   if (LocVT == MVT::i8) {
    2923             :     static const MCPhysReg RegList3[] = {
    2924             :       X86::AL, X86::DL, X86::CL
    2925             :     };
    2926          15 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    2927          30 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2928          15 :       return false;
    2929             :     }
    2930             :   }
    2931             : 
    2932         271 :   if (LocVT == MVT::i16) {
    2933             :     static const MCPhysReg RegList4[] = {
    2934             :       X86::AX, X86::DX, X86::CX
    2935             :     };
    2936           0 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    2937           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2938           0 :       return false;
    2939             :     }
    2940             :   }
    2941             : 
    2942         271 :   if (LocVT == MVT::i32) {
    2943             :     static const MCPhysReg RegList5[] = {
    2944             :       X86::EAX, X86::EDX, X86::ECX
    2945             :     };
    2946         252 :     if (unsigned Reg = State.AllocateReg(RegList5)) {
    2947         494 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2948         247 :       return false;
    2949             :     }
    2950             :   }
    2951             : 
    2952          24 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    2953             :     return false;
    2954             : 
    2955          20 :   return true;  // CC didn't match.
    2956             : }
    2957             : 
    2958             : 
    2959          30 : static bool RetCC_X86_32_HiPE(unsigned ValNo, MVT ValVT,
    2960             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    2961             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2962             : 
    2963          30 :   if (LocVT == MVT::i8 ||
    2964             :       LocVT == MVT::i16) {
    2965             :     LocVT = MVT::i32;
    2966           0 :     if (ArgFlags.isSExt())
    2967             :         LocInfo = CCValAssign::SExt;
    2968           0 :     else if (ArgFlags.isZExt())
    2969             :         LocInfo = CCValAssign::ZExt;
    2970             :     else
    2971             :         LocInfo = CCValAssign::AExt;
    2972             :   }
    2973             : 
    2974          30 :   if (LocVT == MVT::i32) {
    2975             :     static const MCPhysReg RegList1[] = {
    2976             :       X86::ESI, X86::EBP, X86::EAX, X86::EDX
    2977             :     };
    2978          30 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    2979          60 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    2980          30 :       return false;
    2981             :     }
    2982             :   }
    2983             : 
    2984             :   return true;  // CC didn't match.
    2985             : }
    2986             : 
    2987             : 
    2988         178 : static bool RetCC_X86_32_RegCall(unsigned ValNo, MVT ValVT,
    2989             :                                  MVT LocVT, CCValAssign::LocInfo LocInfo,
    2990             :                                  ISD::ArgFlagsTy ArgFlags, CCState &State) {
    2991             : 
    2992         178 :   if (LocVT == MVT::i1 ||
    2993         356 :       LocVT == MVT::v1i1 ||
    2994             :       LocVT == MVT::v8i1) {
    2995           4 :     LocVT = MVT::i8;
    2996           4 :     if (ArgFlags.isSExt())
    2997           0 :         LocInfo = CCValAssign::SExt;
    2998           4 :     else if (ArgFlags.isZExt())
    2999           0 :         LocInfo = CCValAssign::ZExt;
    3000             :     else
    3001           4 :         LocInfo = CCValAssign::AExt;
    3002             :   }
    3003             : 
    3004         178 :   if (LocVT == MVT::v16i1) {
    3005           4 :     LocVT = MVT::i16;
    3006           4 :     if (ArgFlags.isSExt())
    3007           0 :         LocInfo = CCValAssign::SExt;
    3008           4 :     else if (ArgFlags.isZExt())
    3009           0 :         LocInfo = CCValAssign::ZExt;
    3010             :     else
    3011           4 :         LocInfo = CCValAssign::AExt;
    3012             :   }
    3013             : 
    3014         178 :   if (LocVT == MVT::v32i1) {
    3015           4 :     LocVT = MVT::i32;
    3016           4 :     if (ArgFlags.isSExt())
    3017           0 :         LocInfo = CCValAssign::SExt;
    3018           4 :     else if (ArgFlags.isZExt())
    3019           0 :         LocInfo = CCValAssign::ZExt;
    3020             :     else
    3021           4 :         LocInfo = CCValAssign::AExt;
    3022             :   }
    3023             : 
    3024         178 :   if (LocVT == MVT::i8) {
    3025             :     static const MCPhysReg RegList1[] = {
    3026             :       X86::AL, X86::CL, X86::DL, X86::DIL, X86::SIL
    3027             :     };
    3028          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3029          84 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3030          28 :       return false;
    3031             :     }
    3032             :   }
    3033             : 
    3034         150 :   if (LocVT == MVT::i16) {
    3035             :     static const MCPhysReg RegList2[] = {
    3036             :       X86::AX, X86::CX, X86::DX, X86::DI, X86::SI
    3037             :     };
    3038          14 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3039          42 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3040          14 :       return false;
    3041             :     }
    3042             :   }
    3043             : 
    3044         136 :   if (LocVT == MVT::i32) {
    3045             :     static const MCPhysReg RegList3[] = {
    3046             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI
    3047             :     };
    3048          60 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3049         180 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3050          60 :       return false;
    3051             :     }
    3052             :   }
    3053             : 
    3054          76 :   if (LocVT == MVT::i64) {
    3055             :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    3056           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3057           0 :       return false;
    3058             :     }
    3059             :   }
    3060             : 
    3061          76 :   if (LocVT == MVT::v64i1) {
    3062           4 :     LocVT = MVT::i64;
    3063           4 :     if (ArgFlags.isSExt())
    3064           0 :         LocInfo = CCValAssign::SExt;
    3065           4 :     else if (ArgFlags.isZExt())
    3066           0 :         LocInfo = CCValAssign::ZExt;
    3067             :     else
    3068           4 :         LocInfo = CCValAssign::AExt;
    3069             :   }
    3070             : 
    3071          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    3072           0 :     if (LocVT == MVT::i64) {
    3073             :       if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    3074           0 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3075           0 :         return false;
    3076             :       }
    3077             :     }
    3078             :   }
    3079             : 
    3080          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    3081          76 :     if (LocVT == MVT::i64) {
    3082           4 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3083             :             return false;
    3084             :     }
    3085             :   }
    3086             : 
    3087          72 :   if (LocVT == MVT::f80) {
    3088             :     static const MCPhysReg RegList4[] = {
    3089             :       X86::FP0, X86::FP1
    3090             :     };
    3091           6 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3092          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3093           6 :       return false;
    3094             :     }
    3095             :   }
    3096             : 
    3097          58 :   if (LocVT == MVT::f32 ||
    3098         116 :       LocVT == MVT::f64 ||
    3099             :       LocVT == MVT::f128) {
    3100          32 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3101             :       static const MCPhysReg RegList5[] = {
    3102             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
    3103             :       };
    3104          16 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    3105          48 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3106          16 :         return false;
    3107             :       }
    3108             :     }
    3109             :   }
    3110             : 
    3111          50 :   if (LocVT == MVT::v16i8 ||
    3112          50 :       LocVT == MVT::v8i16 ||
    3113          44 :       LocVT == MVT::v4i32 ||
    3114          44 :       LocVT == MVT::v2i64 ||
    3115          70 :       LocVT == MVT::v4f32 ||
    3116             :       LocVT == MVT::v2f64) {
    3117          60 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3118             :       static const MCPhysReg RegList6[] = {
    3119             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7
    3120             :       };
    3121          30 :       if (unsigned Reg = State.AllocateReg(RegList6)) {
    3122          90 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3123          30 :         return false;
    3124             :       }
    3125             :     }
    3126             :   }
    3127             : 
    3128          20 :   if (LocVT == MVT::v32i8 ||
    3129          20 :       LocVT == MVT::v16i16 ||
    3130          14 :       LocVT == MVT::v8i32 ||
    3131          14 :       LocVT == MVT::v4i64 ||
    3132          34 :       LocVT == MVT::v8f32 ||
    3133             :       LocVT == MVT::v4f64) {
    3134          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    3135             :       static const MCPhysReg RegList7[] = {
    3136             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7
    3137             :       };
    3138           6 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    3139          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3140           6 :         return false;
    3141             :       }
    3142             :     }
    3143             :   }
    3144             : 
    3145          14 :   if (LocVT == MVT::v64i8 ||
    3146          14 :       LocVT == MVT::v32i16 ||
    3147           8 :       LocVT == MVT::v16i32 ||
    3148           8 :       LocVT == MVT::v8i64 ||
    3149          14 :       LocVT == MVT::v16f32 ||
    3150             :       LocVT == MVT::v8f64) {
    3151          28 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    3152             :       static const MCPhysReg RegList8[] = {
    3153             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7
    3154             :       };
    3155          14 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    3156          42 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3157          14 :         return false;
    3158             :       }
    3159             :     }
    3160             :   }
    3161             : 
    3162             :   return true;  // CC didn't match.
    3163             : }
    3164             : 
    3165             : 
    3166          84 : static bool RetCC_X86_32_VectorCall(unsigned ValNo, MVT ValVT,
    3167             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    3168             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3169             : 
    3170          84 :   if (LocVT == MVT::f32 ||
    3171         140 :       LocVT == MVT::f64 ||
    3172             :       LocVT == MVT::f128) {
    3173             :     static const MCPhysReg RegList1[] = {
    3174             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3175             :     };
    3176          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3177          48 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3178          24 :       return false;
    3179             :     }
    3180             :   }
    3181             : 
    3182          60 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3183             :     return false;
    3184             : 
    3185           4 :   return true;  // CC didn't match.
    3186             : }
    3187             : 
    3188             : 
    3189      308731 : static bool RetCC_X86_64(unsigned ValNo, MVT ValVT,
    3190             :                          MVT LocVT, CCValAssign::LocInfo LocInfo,
    3191             :                          ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3192             : 
    3193      308731 :   if (State.getCallingConv() == CallingConv::HiPE) {
    3194          28 :     if (!RetCC_X86_64_HiPE(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3195             :       return false;
    3196             :   }
    3197             : 
    3198      308703 :   if (State.getCallingConv() == CallingConv::WebKit_JS) {
    3199          20 :     if (!RetCC_X86_64_WebKit_JS(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3200             :       return false;
    3201             :   }
    3202             : 
    3203      308683 :   if (State.getCallingConv() == CallingConv::AnyReg) {
    3204             :     if (!RetCC_X86_64_AnyReg(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3205             :       return false;
    3206             :   }
    3207             : 
    3208      308683 :   if (State.getCallingConv() == CallingConv::Swift) {
    3209         411 :     if (!RetCC_X86_64_Swift(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3210             :       return false;
    3211             :   }
    3212             : 
    3213      308277 :   if (State.getCallingConv() == CallingConv::Win64) {
    3214             :     if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3215             :       return false;
    3216             :   }
    3217             : 
    3218      308243 :   if (State.getCallingConv() == CallingConv::X86_64_SysV) {
    3219           8 :     if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3220             :       return false;
    3221             :   }
    3222             : 
    3223      308235 :   if (State.getCallingConv() == CallingConv::X86_VectorCall) {
    3224          60 :     if (!RetCC_X86_64_Vectorcall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3225             :       return false;
    3226             :   }
    3227             : 
    3228      308177 :   if (State.getCallingConv() == CallingConv::HHVM) {
    3229          70 :     if (!RetCC_X86_64_HHVM(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3230             :       return false;
    3231             :   }
    3232             : 
    3233      308107 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    3234         324 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    3235         166 :       if (!RetCC_X86_Win64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3236             :         return false;
    3237             :     }
    3238             :   }
    3239             : 
    3240      307941 :   if (State.getCallingConv() == CallingConv::X86_RegCall) {
    3241         158 :     if (!RetCC_X86_SysV64_RegCall(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3242             :       return false;
    3243             :   }
    3244             : 
    3245      307783 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).isTargetWin64()) {
    3246             :     if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3247             :       return false;
    3248             :   }
    3249             : 
    3250      305383 :   if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3251             :     return false;
    3252             : 
    3253         236 :   return true;  // CC didn't match.
    3254             : }
    3255             : 
    3256             : 
    3257             : static bool RetCC_X86_64_AnyReg(unsigned ValNo, MVT ValVT,
    3258             :                                 MVT LocVT, CCValAssign::LocInfo LocInfo,
    3259             :                                 ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3260             : 
    3261             :   if (CC_X86_AnyReg_Error(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3262             :     return false;
    3263             : 
    3264             :   return true;  // CC didn't match.
    3265             : }
    3266             : 
    3267             : 
    3268      307878 : static bool RetCC_X86_64_C(unsigned ValNo, MVT ValVT,
    3269             :                            MVT LocVT, CCValAssign::LocInfo LocInfo,
    3270             :                            ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3271             : 
    3272      307878 :   if (LocVT == MVT::f32) {
    3273             :     static const MCPhysReg RegList1[] = {
    3274             :       X86::XMM0, X86::XMM1
    3275             :     };
    3276        3498 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3277        6996 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3278        3498 :       return false;
    3279             :     }
    3280             :   }
    3281             : 
    3282      304380 :   if (LocVT == MVT::f64) {
    3283             :     static const MCPhysReg RegList2[] = {
    3284             :       X86::XMM0, X86::XMM1
    3285             :     };
    3286        3810 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3287        7584 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3288        3792 :       return false;
    3289             :     }
    3290             :   }
    3291             : 
    3292      300588 :   if (LocVT == MVT::f128) {
    3293             :     static const MCPhysReg RegList3[] = {
    3294             :       X86::XMM0, X86::XMM1
    3295             :     };
    3296         212 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3297         424 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3298         212 :       return false;
    3299             :     }
    3300             :   }
    3301             : 
    3302      300376 :   if (LocVT == MVT::x86mmx) {
    3303             :     static const MCPhysReg RegList4[] = {
    3304             :       X86::XMM0, X86::XMM1
    3305             :     };
    3306         204 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3307         408 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3308         204 :       return false;
    3309             :     }
    3310             :   }
    3311             : 
    3312      300172 :   if (ArgFlags.isSwiftError()) {
    3313          26 :     if (LocVT == MVT::i64) {
    3314             :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    3315          52 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3316          26 :         return false;
    3317             :       }
    3318             :     }
    3319             :   }
    3320             : 
    3321      300146 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3322             :     return false;
    3323             : 
    3324         255 :   return true;  // CC didn't match.
    3325             : }
    3326             : 
    3327             : 
    3328          70 : static bool RetCC_X86_64_HHVM(unsigned ValNo, MVT ValVT,
    3329             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    3330             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3331             : 
    3332          70 :   if (LocVT == MVT::i8 ||
    3333         140 :       LocVT == MVT::i16 ||
    3334             :       LocVT == MVT::i32) {
    3335             :     LocVT = MVT::i64;
    3336           0 :     if (ArgFlags.isSExt())
    3337             :         LocInfo = CCValAssign::SExt;
    3338           0 :     else if (ArgFlags.isZExt())
    3339             :         LocInfo = CCValAssign::ZExt;
    3340             :     else
    3341             :         LocInfo = CCValAssign::AExt;
    3342             :   }
    3343             : 
    3344          70 :   if (LocVT == MVT::i64) {
    3345             :     static const MCPhysReg RegList1[] = {
    3346             :       X86::RBX, X86::RBP, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11, X86::R13, X86::R14, X86::R15
    3347             :     };
    3348          70 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3349         140 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3350          70 :       return false;
    3351             :     }
    3352             :   }
    3353             : 
    3354             :   return true;  // CC didn't match.
    3355             : }
    3356             : 
    3357             : 
    3358          28 : static bool RetCC_X86_64_HiPE(unsigned ValNo, MVT ValVT,
    3359             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    3360             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3361             : 
    3362          28 :   if (LocVT == MVT::i8 ||
    3363          56 :       LocVT == MVT::i16 ||
    3364             :       LocVT == MVT::i32) {
    3365             :     LocVT = MVT::i64;
    3366          10 :     if (ArgFlags.isSExt())
    3367             :         LocInfo = CCValAssign::SExt;
    3368          10 :     else if (ArgFlags.isZExt())
    3369             :         LocInfo = CCValAssign::ZExt;
    3370             :     else
    3371             :         LocInfo = CCValAssign::AExt;
    3372             :   }
    3373             : 
    3374          28 :   if (LocVT == MVT::i64) {
    3375             :     static const MCPhysReg RegList1[] = {
    3376             :       X86::R15, X86::RBP, X86::RAX, X86::RDX
    3377             :     };
    3378          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3379          56 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3380          28 :       return false;
    3381             :     }
    3382             :   }
    3383             : 
    3384             :   return true;  // CC didn't match.
    3385             : }
    3386             : 
    3387             : 
    3388         411 : static bool RetCC_X86_64_Swift(unsigned ValNo, MVT ValVT,
    3389             :                                MVT LocVT, CCValAssign::LocInfo LocInfo,
    3390             :                                ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3391             : 
    3392         411 :   if (ArgFlags.isSwiftError()) {
    3393          54 :     if (LocVT == MVT::i64) {
    3394             :       if (unsigned Reg = State.AllocateReg(X86::R12)) {
    3395         108 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3396          54 :         return false;
    3397             :       }
    3398             :     }
    3399             :   }
    3400             : 
    3401         357 :   if (LocVT == MVT::v1i1) {
    3402             :     LocVT = MVT::i8;
    3403           0 :     if (ArgFlags.isSExt())
    3404             :         LocInfo = CCValAssign::SExt;
    3405           0 :     else if (ArgFlags.isZExt())
    3406             :         LocInfo = CCValAssign::ZExt;
    3407             :     else
    3408             :         LocInfo = CCValAssign::AExt;
    3409             :   }
    3410             : 
    3411         357 :   if (LocVT == MVT::i1) {
    3412             :     LocVT = MVT::i8;
    3413           0 :     if (ArgFlags.isSExt())
    3414             :         LocInfo = CCValAssign::SExt;
    3415           0 :     else if (ArgFlags.isZExt())
    3416             :         LocInfo = CCValAssign::ZExt;
    3417             :     else
    3418             :         LocInfo = CCValAssign::AExt;
    3419             :   }
    3420             : 
    3421         357 :   if (LocVT == MVT::i8) {
    3422             :     static const MCPhysReg RegList1[] = {
    3423             :       X86::AL, X86::DL, X86::CL, X86::R8B
    3424             :     };
    3425          38 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3426          76 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3427          38 :       return false;
    3428             :     }
    3429             :   }
    3430             : 
    3431         319 :   if (LocVT == MVT::i16) {
    3432             :     static const MCPhysReg RegList2[] = {
    3433             :       X86::AX, X86::DX, X86::CX, X86::R8W
    3434             :     };
    3435           4 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3436           8 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3437           4 :       return false;
    3438             :     }
    3439             :   }
    3440             : 
    3441         315 :   if (LocVT == MVT::i32) {
    3442             :     static const MCPhysReg RegList3[] = {
    3443             :       X86::EAX, X86::EDX, X86::ECX, X86::R8D
    3444             :     };
    3445          69 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3446         128 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3447          64 :       return false;
    3448             :     }
    3449             :   }
    3450             : 
    3451         251 :   if (LocVT == MVT::i64) {
    3452             :     static const MCPhysReg RegList4[] = {
    3453             :       X86::RAX, X86::RDX, X86::RCX, X86::R8
    3454             :     };
    3455         100 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3456         200 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3457         100 :       return false;
    3458             :     }
    3459             :   }
    3460             : 
    3461         151 :   if (LocVT == MVT::f32) {
    3462             :     static const MCPhysReg RegList5[] = {
    3463             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3464             :     };
    3465          54 :     if (unsigned Reg = State.AllocateReg(RegList5)) {
    3466         108 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3467          54 :       return false;
    3468             :     }
    3469             :   }
    3470             : 
    3471          97 :   if (LocVT == MVT::f64) {
    3472             :     static const MCPhysReg RegList6[] = {
    3473             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3474             :     };
    3475          56 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    3476         112 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3477          56 :       return false;
    3478             :     }
    3479             :   }
    3480             : 
    3481          41 :   if (LocVT == MVT::f128) {
    3482             :     static const MCPhysReg RegList7[] = {
    3483             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3484             :     };
    3485           0 :     if (unsigned Reg = State.AllocateReg(RegList7)) {
    3486           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3487           0 :       return false;
    3488             :     }
    3489             :   }
    3490             : 
    3491          41 :   if (LocVT == MVT::x86mmx) {
    3492             :     static const MCPhysReg RegList8[] = {
    3493             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3494             :     };
    3495           0 :     if (unsigned Reg = State.AllocateReg(RegList8)) {
    3496           0 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3497           0 :       return false;
    3498             :     }
    3499             :   }
    3500             : 
    3501          41 :   if (!RetCC_X86Common(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3502             :     return false;
    3503             : 
    3504           5 :   return true;  // CC didn't match.
    3505             : }
    3506             : 
    3507             : 
    3508          60 : static bool RetCC_X86_64_Vectorcall(unsigned ValNo, MVT ValVT,
    3509             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    3510             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3511             : 
    3512          60 :   if (LocVT == MVT::f32 ||
    3513          94 :       LocVT == MVT::f64 ||
    3514             :       LocVT == MVT::f128) {
    3515             :     static const MCPhysReg RegList1[] = {
    3516             :       X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3
    3517             :     };
    3518          26 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3519          48 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3520          24 :       return false;
    3521             :     }
    3522             :   }
    3523             : 
    3524             :   if (!RetCC_X86_Win64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3525             :     return false;
    3526             : 
    3527             :   return true;  // CC didn't match.
    3528             : }
    3529             : 
    3530             : 
    3531          20 : static bool RetCC_X86_64_WebKit_JS(unsigned ValNo, MVT ValVT,
    3532             :                                    MVT LocVT, CCValAssign::LocInfo LocInfo,
    3533             :                                    ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3534             : 
    3535          20 :   if (LocVT == MVT::i8 ||
    3536          40 :       LocVT == MVT::i16 ||
    3537             :       LocVT == MVT::i32) {
    3538             :     LocVT = MVT::i64;
    3539           8 :     if (ArgFlags.isSExt())
    3540             :         LocInfo = CCValAssign::SExt;
    3541           8 :     else if (ArgFlags.isZExt())
    3542             :         LocInfo = CCValAssign::ZExt;
    3543             :     else
    3544             :         LocInfo = CCValAssign::AExt;
    3545             :   }
    3546             : 
    3547          20 :   if (LocVT == MVT::i64) {
    3548             :     if (unsigned Reg = State.AllocateReg(X86::RAX)) {
    3549          40 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3550          20 :       return false;
    3551             :     }
    3552             :   }
    3553             : 
    3554             :   return true;  // CC didn't match.
    3555             : }
    3556             : 
    3557             : 
    3558         158 : static bool RetCC_X86_SysV64_RegCall(unsigned ValNo, MVT ValVT,
    3559             :                                      MVT LocVT, CCValAssign::LocInfo LocInfo,
    3560             :                                      ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3561             : 
    3562         158 :   if (LocVT == MVT::i1 ||
    3563         316 :       LocVT == MVT::v1i1 ||
    3564             :       LocVT == MVT::v8i1) {
    3565           4 :     LocVT = MVT::i8;
    3566           4 :     if (ArgFlags.isSExt())
    3567           0 :         LocInfo = CCValAssign::SExt;
    3568           4 :     else if (ArgFlags.isZExt())
    3569           0 :         LocInfo = CCValAssign::ZExt;
    3570             :     else
    3571           4 :         LocInfo = CCValAssign::AExt;
    3572             :   }
    3573             : 
    3574         158 :   if (LocVT == MVT::v16i1) {
    3575           4 :     LocVT = MVT::i16;
    3576           4 :     if (ArgFlags.isSExt())
    3577           0 :         LocInfo = CCValAssign::SExt;
    3578           4 :     else if (ArgFlags.isZExt())
    3579           0 :         LocInfo = CCValAssign::ZExt;
    3580             :     else
    3581           4 :         LocInfo = CCValAssign::AExt;
    3582             :   }
    3583             : 
    3584         158 :   if (LocVT == MVT::v32i1) {
    3585           4 :     LocVT = MVT::i32;
    3586           4 :     if (ArgFlags.isSExt())
    3587           0 :         LocInfo = CCValAssign::SExt;
    3588           4 :     else if (ArgFlags.isZExt())
    3589           0 :         LocInfo = CCValAssign::ZExt;
    3590             :     else
    3591           4 :         LocInfo = CCValAssign::AExt;
    3592             :   }
    3593             : 
    3594         158 :   if (LocVT == MVT::i8) {
    3595             :     static const MCPhysReg RegList1[] = {
    3596             :       X86::AL, X86::CL, X86::DL, X86::DIL, X86::SIL, X86::R8B, X86::R9B, X86::R12B, X86::R13B, X86::R14B, X86::R15B
    3597             :     };
    3598          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3599          84 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3600          28 :       return false;
    3601             :     }
    3602             :   }
    3603             : 
    3604         130 :   if (LocVT == MVT::i16) {
    3605             :     static const MCPhysReg RegList2[] = {
    3606             :       X86::AX, X86::CX, X86::DX, X86::DI, X86::SI, X86::R8W, X86::R9W, X86::R12W, X86::R13W, X86::R14W, X86::R15W
    3607             :     };
    3608          14 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3609          42 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3610          14 :       return false;
    3611             :     }
    3612             :   }
    3613             : 
    3614         116 :   if (LocVT == MVT::i32) {
    3615             :     static const MCPhysReg RegList3[] = {
    3616             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R12D, X86::R13D, X86::R14D, X86::R15D
    3617             :     };
    3618          22 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3619          66 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3620          22 :       return false;
    3621             :     }
    3622             :   }
    3623             : 
    3624          94 :   if (LocVT == MVT::i64) {
    3625             :     static const MCPhysReg RegList4[] = {
    3626             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    3627             :     };
    3628          18 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3629          54 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3630          18 :       return false;
    3631             :     }
    3632             :   }
    3633             : 
    3634          76 :   if (LocVT == MVT::v64i1) {
    3635           4 :     LocVT = MVT::i64;
    3636           4 :     if (ArgFlags.isSExt())
    3637           0 :         LocInfo = CCValAssign::SExt;
    3638           4 :     else if (ArgFlags.isZExt())
    3639           0 :         LocInfo = CCValAssign::ZExt;
    3640             :     else
    3641           4 :         LocInfo = CCValAssign::AExt;
    3642             :   }
    3643             : 
    3644          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    3645          76 :     if (LocVT == MVT::i64) {
    3646             :       static const MCPhysReg RegList5[] = {
    3647             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, X86::R15
    3648             :       };
    3649           4 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    3650          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3651           4 :         return false;
    3652             :       }
    3653             :     }
    3654             :   }
    3655             : 
    3656          72 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    3657           0 :     if (LocVT == MVT::i64) {
    3658           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3659             :             return false;
    3660             :     }
    3661             :   }
    3662             : 
    3663          72 :   if (LocVT == MVT::f80) {
    3664             :     static const MCPhysReg RegList6[] = {
    3665             :       X86::FP0, X86::FP1
    3666             :     };
    3667           6 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    3668          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3669           6 :       return false;
    3670             :     }
    3671             :   }
    3672             : 
    3673          58 :   if (LocVT == MVT::f32 ||
    3674         116 :       LocVT == MVT::f64 ||
    3675             :       LocVT == MVT::f128) {
    3676          32 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3677             :       static const MCPhysReg RegList7[] = {
    3678             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3679             :       };
    3680          16 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    3681          48 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3682          16 :         return false;
    3683             :       }
    3684             :     }
    3685             :   }
    3686             : 
    3687          50 :   if (LocVT == MVT::v16i8 ||
    3688          50 :       LocVT == MVT::v8i16 ||
    3689          44 :       LocVT == MVT::v4i32 ||
    3690          44 :       LocVT == MVT::v2i64 ||
    3691          70 :       LocVT == MVT::v4f32 ||
    3692             :       LocVT == MVT::v2f64) {
    3693          60 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3694             :       static const MCPhysReg RegList8[] = {
    3695             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3696             :       };
    3697          30 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    3698          90 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3699          30 :         return false;
    3700             :       }
    3701             :     }
    3702             :   }
    3703             : 
    3704          20 :   if (LocVT == MVT::v32i8 ||
    3705          20 :       LocVT == MVT::v16i16 ||
    3706          14 :       LocVT == MVT::v8i32 ||
    3707          14 :       LocVT == MVT::v4i64 ||
    3708          34 :       LocVT == MVT::v8f32 ||
    3709             :       LocVT == MVT::v4f64) {
    3710          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    3711             :       static const MCPhysReg RegList9[] = {
    3712             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    3713             :       };
    3714           6 :       if (unsigned Reg = State.AllocateReg(RegList9)) {
    3715          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3716           6 :         return false;
    3717             :       }
    3718             :     }
    3719             :   }
    3720             : 
    3721          14 :   if (LocVT == MVT::v64i8 ||
    3722          14 :       LocVT == MVT::v32i16 ||
    3723           8 :       LocVT == MVT::v16i32 ||
    3724           8 :       LocVT == MVT::v8i64 ||
    3725          14 :       LocVT == MVT::v16f32 ||
    3726             :       LocVT == MVT::v8f64) {
    3727          28 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    3728             :       static const MCPhysReg RegList10[] = {
    3729             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    3730             :       };
    3731          14 :       if (unsigned Reg = State.AllocateReg(RegList10)) {
    3732          42 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3733          14 :         return false;
    3734             :       }
    3735             :     }
    3736             :   }
    3737             : 
    3738             :   return true;  // CC didn't match.
    3739             : }
    3740             : 
    3741             : 
    3742             : static bool RetCC_X86_Win64_C(unsigned ValNo, MVT ValVT,
    3743             :                               MVT LocVT, CCValAssign::LocInfo LocInfo,
    3744             :                               ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3745             : 
    3746        2487 :   if (LocVT == MVT::x86mmx) {
    3747             :     LocVT = MVT::i64;
    3748             :     LocInfo = CCValAssign::BCvt;
    3749             :   }
    3750             : 
    3751        2487 :   if (!RetCC_X86_64_C(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3752             :     return false;
    3753             : 
    3754             :   return true;  // CC didn't match.
    3755             : }
    3756             : 
    3757             : 
    3758         166 : static bool RetCC_X86_Win64_RegCall(unsigned ValNo, MVT ValVT,
    3759             :                                     MVT LocVT, CCValAssign::LocInfo LocInfo,
    3760             :                                     ISD::ArgFlagsTy ArgFlags, CCState &State) {
    3761             : 
    3762         166 :   if (LocVT == MVT::i1 ||
    3763         332 :       LocVT == MVT::v1i1 ||
    3764             :       LocVT == MVT::v8i1) {
    3765           4 :     LocVT = MVT::i8;
    3766           4 :     if (ArgFlags.isSExt())
    3767           0 :         LocInfo = CCValAssign::SExt;
    3768           4 :     else if (ArgFlags.isZExt())
    3769           0 :         LocInfo = CCValAssign::ZExt;
    3770             :     else
    3771           4 :         LocInfo = CCValAssign::AExt;
    3772             :   }
    3773             : 
    3774         166 :   if (LocVT == MVT::v16i1) {
    3775           4 :     LocVT = MVT::i16;
    3776           4 :     if (ArgFlags.isSExt())
    3777           0 :         LocInfo = CCValAssign::SExt;
    3778           4 :     else if (ArgFlags.isZExt())
    3779           0 :         LocInfo = CCValAssign::ZExt;
    3780             :     else
    3781           4 :         LocInfo = CCValAssign::AExt;
    3782             :   }
    3783             : 
    3784         166 :   if (LocVT == MVT::v32i1) {
    3785           4 :     LocVT = MVT::i32;
    3786           4 :     if (ArgFlags.isSExt())
    3787           0 :         LocInfo = CCValAssign::SExt;
    3788           4 :     else if (ArgFlags.isZExt())
    3789           0 :         LocInfo = CCValAssign::ZExt;
    3790             :     else
    3791           4 :         LocInfo = CCValAssign::AExt;
    3792             :   }
    3793             : 
    3794         166 :   if (LocVT == MVT::i8) {
    3795             :     static const MCPhysReg RegList1[] = {
    3796             :       X86::AL, X86::CL, X86::DL, X86::DIL, X86::SIL, X86::R8B, X86::R9B, X86::R10B, X86::R11B, X86::R12B, X86::R14B, X86::R15B
    3797             :     };
    3798          28 :     if (unsigned Reg = State.AllocateReg(RegList1)) {
    3799          84 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3800          28 :       return false;
    3801             :     }
    3802             :   }
    3803             : 
    3804         138 :   if (LocVT == MVT::i16) {
    3805             :     static const MCPhysReg RegList2[] = {
    3806             :       X86::AX, X86::CX, X86::DX, X86::DI, X86::SI, X86::R8W, X86::R9W, X86::R10W, X86::R11W, X86::R12W, X86::R14W, X86::R15W
    3807             :     };
    3808          14 :     if (unsigned Reg = State.AllocateReg(RegList2)) {
    3809          42 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3810          14 :       return false;
    3811             :     }
    3812             :   }
    3813             : 
    3814         124 :   if (LocVT == MVT::i32) {
    3815             :     static const MCPhysReg RegList3[] = {
    3816             :       X86::EAX, X86::ECX, X86::EDX, X86::EDI, X86::ESI, X86::R8D, X86::R9D, X86::R10D, X86::R11D, X86::R12D, X86::R14D, X86::R15D
    3817             :     };
    3818          30 :     if (unsigned Reg = State.AllocateReg(RegList3)) {
    3819          90 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3820          30 :       return false;
    3821             :     }
    3822             :   }
    3823             : 
    3824          94 :   if (LocVT == MVT::i64) {
    3825             :     static const MCPhysReg RegList4[] = {
    3826             :       X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    3827             :     };
    3828          18 :     if (unsigned Reg = State.AllocateReg(RegList4)) {
    3829          54 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3830          18 :       return false;
    3831             :     }
    3832             :   }
    3833             : 
    3834          76 :   if (LocVT == MVT::v64i1) {
    3835           4 :     LocVT = MVT::i64;
    3836           4 :     if (ArgFlags.isSExt())
    3837           0 :         LocInfo = CCValAssign::SExt;
    3838           4 :     else if (ArgFlags.isZExt())
    3839           0 :         LocInfo = CCValAssign::ZExt;
    3840             :     else
    3841           4 :         LocInfo = CCValAssign::AExt;
    3842             :   }
    3843             : 
    3844          76 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is64Bit()) {
    3845          76 :     if (LocVT == MVT::i64) {
    3846             :       static const MCPhysReg RegList5[] = {
    3847             :         X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, X86::R14, X86::R15
    3848             :       };
    3849           4 :       if (unsigned Reg = State.AllocateReg(RegList5)) {
    3850          12 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3851           4 :         return false;
    3852             :       }
    3853             :     }
    3854             :   }
    3855             : 
    3856          72 :   if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).is32Bit()) {
    3857           0 :     if (LocVT == MVT::i64) {
    3858           0 :       if (CC_X86_32_RegCall_Assign2Regs(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))
    3859             :             return false;
    3860             :     }
    3861             :   }
    3862             : 
    3863          72 :   if (LocVT == MVT::f80) {
    3864             :     static const MCPhysReg RegList6[] = {
    3865             :       X86::FP0, X86::FP1
    3866             :     };
    3867           6 :     if (unsigned Reg = State.AllocateReg(RegList6)) {
    3868          18 :       State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3869           6 :       return false;
    3870             :     }
    3871             :   }
    3872             : 
    3873          58 :   if (LocVT == MVT::f32 ||
    3874         116 :       LocVT == MVT::f64 ||
    3875             :       LocVT == MVT::f128) {
    3876          32 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3877             :       static const MCPhysReg RegList7[] = {
    3878             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3879             :       };
    3880          16 :       if (unsigned Reg = State.AllocateReg(RegList7)) {
    3881          48 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3882          16 :         return false;
    3883             :       }
    3884             :     }
    3885             :   }
    3886             : 
    3887          50 :   if (LocVT == MVT::v16i8 ||
    3888          50 :       LocVT == MVT::v8i16 ||
    3889          44 :       LocVT == MVT::v4i32 ||
    3890          44 :       LocVT == MVT::v2i64 ||
    3891          70 :       LocVT == MVT::v4f32 ||
    3892             :       LocVT == MVT::v2f64) {
    3893          60 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasSSE1()) {
    3894             :       static const MCPhysReg RegList8[] = {
    3895             :         X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15
    3896             :       };
    3897          30 :       if (unsigned Reg = State.AllocateReg(RegList8)) {
    3898          90 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3899          30 :         return false;
    3900             :       }
    3901             :     }
    3902             :   }
    3903             : 
    3904          20 :   if (LocVT == MVT::v32i8 ||
    3905          20 :       LocVT == MVT::v16i16 ||
    3906          14 :       LocVT == MVT::v8i32 ||
    3907          14 :       LocVT == MVT::v4i64 ||
    3908          34 :       LocVT == MVT::v8f32 ||
    3909             :       LocVT == MVT::v4f64) {
    3910          12 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX()) {
    3911             :       static const MCPhysReg RegList9[] = {
    3912             :         X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15
    3913             :       };
    3914           6 :       if (unsigned Reg = State.AllocateReg(RegList9)) {
    3915          18 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3916           6 :         return false;
    3917             :       }
    3918             :     }
    3919             :   }
    3920             : 
    3921          14 :   if (LocVT == MVT::v64i8 ||
    3922          14 :       LocVT == MVT::v32i16 ||
    3923           8 :       LocVT == MVT::v16i32 ||
    3924           8 :       LocVT == MVT::v8i64 ||
    3925          14 :       LocVT == MVT::v16f32 ||
    3926             :       LocVT == MVT::v8f64) {
    3927          28 :     if (static_cast<const X86Subtarget&>(State.getMachineFunction().getSubtarget()).hasAVX512()) {
    3928             :       static const MCPhysReg RegList10[] = {
    3929             :         X86::ZMM0, X86::ZMM1, X86::ZMM2, X86::ZMM3, X86::ZMM4, X86::ZMM5, X86::ZMM6, X86::ZMM7, X86::ZMM8, X86::ZMM9, X86::ZMM10, X86::ZMM11, X86::ZMM12, X86::ZMM13, X86::ZMM14, X86::ZMM15
    3930             :       };
    3931          14 :       if (unsigned Reg = State.AllocateReg(RegList10)) {
    3932          42 :         State.addLoc(CCValAssign::getReg(ValNo, ValVT, Reg, LocVT, LocInfo));
    3933          14 :         return false;
    3934             :       }
    3935             :     }
    3936             :   }
    3937             : 
    3938             :   return true;  // CC didn't match.
    3939             : }

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