LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/X86 - X86GenGlobalISel.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 195 220 88.6 %
Date: 2017-09-14 15:23:50 Functions: 4 18 22.2 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Global Instruction Selector for the X86 target                             *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : #ifdef GET_GLOBALISEL_PREDICATE_BITSET
      10             : const unsigned MAX_SUBTARGET_PREDICATES = 90;
      11             : using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
      12             : #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
      13             : 
      14             : #ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      15             :   mutable MatcherState State;
      16             :   typedef ComplexRendererFn(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
      17             : const MatcherInfoTy<PredicateBitset, ComplexMatcherMemFn> MatcherInfo;
      18             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
      19             : 
      20             : #ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      21             : , State(0),
      22             : MatcherInfo({TypeObjects, FeatureBitsets, ImmPredicateFns, {
      23             :   nullptr, // GICP_Invalid
      24       48120 : }})
      25             : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
      26             : 
      27             : #ifdef GET_GLOBALISEL_IMPL
      28             : // Bits for subtarget features that participate in instruction matching.
      29             : enum SubtargetFeatureBits : uint8_t {
      30             :   Feature_TruePredicateBit = 39,
      31             :   Feature_HasCMovBit = 16,
      32             :   Feature_NoCMovBit = 75,
      33             :   Feature_HasMMXBit = 62,
      34             :   Feature_Has3DNowBit = 64,
      35             :   Feature_HasSSE1Bit = 27,
      36             :   Feature_UseSSE1Bit = 33,
      37             :   Feature_HasSSE2Bit = 28,
      38             :   Feature_UseSSE2Bit = 34,
      39             :   Feature_HasSSE3Bit = 20,
      40             :   Feature_UseSSE3Bit = 42,
      41             :   Feature_HasSSSE3Bit = 63,
      42             :   Feature_UseSSSE3Bit = 43,
      43             :   Feature_NoSSE41Bit = 80,
      44             :   Feature_UseSSE41Bit = 40,
      45             :   Feature_HasSSE42Bit = 47,
      46             :   Feature_UseSSE42Bit = 46,
      47             :   Feature_HasSSE4ABit = 51,
      48             :   Feature_HasAVXBit = 35,
      49             :   Feature_HasAVX2Bit = 31,
      50             :   Feature_HasAVX1OnlyBit = 29,
      51             :   Feature_HasAVX512Bit = 53,
      52             :   Feature_UseAVXBit = 32,
      53             :   Feature_NoAVX512Bit = 24,
      54             :   Feature_HasCDIBit = 57,
      55             :   Feature_HasVPOPCNTDQBit = 61,
      56             :   Feature_HasERIBit = 60,
      57             :   Feature_HasDQIBit = 55,
      58             :   Feature_NoDQIBit = 44,
      59             :   Feature_HasBWIBit = 56,
      60             :   Feature_NoBWIBit = 41,
      61             :   Feature_HasVLXBit = 54,
      62             :   Feature_NoVLXBit = 23,
      63             :   Feature_NoVLX_Or_NoBWIBit = 38,
      64             :   Feature_NoVLX_Or_NoDQIBit = 82,
      65             :   Feature_HasPOPCNTBit = 45,
      66             :   Feature_HasAESBit = 49,
      67             :   Feature_HasFXSRBit = 21,
      68             :   Feature_HasXSAVEBit = 67,
      69             :   Feature_HasXSAVEOPTBit = 68,
      70             :   Feature_HasXSAVECBit = 69,
      71             :   Feature_HasXSAVESBit = 70,
      72             :   Feature_HasPCLMULBit = 50,
      73             :   Feature_HasFMABit = 22,
      74             :   Feature_HasFMA4Bit = 25,
      75             :   Feature_HasXOPBit = 26,
      76             :   Feature_HasTBMBit = 9,
      77             :   Feature_NoTBMBit = 78,
      78             :   Feature_HasLWPBit = 10,
      79             :   Feature_HasMOVBEBit = 3,
      80             :   Feature_HasRDRANDBit = 4,
      81             :   Feature_HasF16CBit = 52,
      82             :   Feature_NoF16CBit = 83,
      83             :   Feature_HasFSGSBaseBit = 71,
      84             :   Feature_HasLZCNTBit = 6,
      85             :   Feature_HasBMIBit = 7,
      86             :   Feature_HasBMI2Bit = 8,
      87             :   Feature_NoBMI2Bit = 77,
      88             :   Feature_HasVBMIBit = 58,
      89             :   Feature_HasIFMABit = 59,
      90             :   Feature_HasRTMBit = 66,
      91             :   Feature_HasADXBit = 15,
      92             :   Feature_HasSHABit = 48,
      93             :   Feature_HasRDSEEDBit = 5,
      94             :   Feature_HasPrefetchWBit = 65,
      95             :   Feature_HasLAHFSAHFBit = 2,
      96             :   Feature_HasMWAITXBit = 11,
      97             :   Feature_HasCLZEROBit = 12,
      98             :   Feature_FPStackf32Bit = 18,
      99             :   Feature_FPStackf64Bit = 19,
     100             :   Feature_HasCLFLUSHOPTBit = 13,
     101             :   Feature_HasCmpxchg16bBit = 76,
     102             :   Feature_Not64BitModeBit = 0,
     103             :   Feature_In64BitModeBit = 1,
     104             :   Feature_IsLP64Bit = 73,
     105             :   Feature_NotLP64Bit = 72,
     106             :   Feature_NotWin64WithoutFPBit = 74,
     107             :   Feature_IsPS4Bit = 85,
     108             :   Feature_NotPS4Bit = 84,
     109             :   Feature_KernelCodeBit = 86,
     110             :   Feature_NearDataBit = 87,
     111             :   Feature_IsNotPICBit = 88,
     112             :   Feature_OptForSizeBit = 36,
     113             :   Feature_OptForMinSizeBit = 30,
     114             :   Feature_OptForSpeedBit = 81,
     115             :   Feature_UseIncDecBit = 14,
     116             :   Feature_CallImmAddrBit = 89,
     117             :   Feature_FavorMemIndirectCallBit = 17,
     118             :   Feature_HasFastSHLDRotateBit = 79,
     119             :   Feature_HasMFenceBit = 37,
     120             : };
     121             : 
     122        8020 : PredicateBitset X86InstructionSelector::
     123             : computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const {
     124        8020 :   PredicateBitset Features;
     125             :   if (true)
     126       16040 :     Features[Feature_TruePredicateBit] = 1;
     127        8020 :   if (Subtarget->hasCMov())
     128       13696 :     Features[Feature_HasCMovBit] = 1;
     129        8020 :   if (!Subtarget->hasCMov())
     130        2344 :     Features[Feature_NoCMovBit] = 1;
     131       16040 :   if (Subtarget->hasMMX())
     132        3870 :     Features[Feature_HasMMXBit] = 1;
     133        8020 :   if (Subtarget->has3DNow())
     134          62 :     Features[Feature_Has3DNowBit] = 1;
     135       16040 :   if (Subtarget->hasSSE1())
     136       13640 :     Features[Feature_HasSSE1Bit] = 1;
     137        8020 :   if (Subtarget->hasSSE1() && !Subtarget->hasAVX())
     138        9822 :     Features[Feature_UseSSE1Bit] = 1;
     139       16040 :   if (Subtarget->hasSSE2())
     140       13548 :     Features[Feature_HasSSE2Bit] = 1;
     141        8020 :   if (Subtarget->hasSSE2() && !Subtarget->hasAVX())
     142        9730 :     Features[Feature_UseSSE2Bit] = 1;
     143       16040 :   if (Subtarget->hasSSE3())
     144        5744 :     Features[Feature_HasSSE3Bit] = 1;
     145        8020 :   if (Subtarget->hasSSE3() && !Subtarget->hasAVX())
     146        1926 :     Features[Feature_UseSSE3Bit] = 1;
     147       16040 :   if (Subtarget->hasSSSE3())
     148        5520 :     Features[Feature_HasSSSE3Bit] = 1;
     149        8020 :   if (Subtarget->hasSSSE3() && !Subtarget->hasAVX())
     150        1702 :     Features[Feature_UseSSSE3Bit] = 1;
     151       16040 :   if (!Subtarget->hasSSE41())
     152       11136 :     Features[Feature_NoSSE41Bit] = 1;
     153        8020 :   if (Subtarget->hasSSE41() && !Subtarget->hasAVX())
     154        1086 :     Features[Feature_UseSSE41Bit] = 1;
     155       16040 :   if (Subtarget->hasSSE42())
     156        4568 :     Features[Feature_HasSSE42Bit] = 1;
     157        8020 :   if (Subtarget->hasSSE42() && !Subtarget->hasAVX())
     158         750 :     Features[Feature_UseSSE42Bit] = 1;
     159        8020 :   if (Subtarget->hasSSE4A())
     160         428 :     Features[Feature_HasSSE4ABit] = 1;
     161       16040 :   if (Subtarget->hasAVX())
     162        3818 :     Features[Feature_HasAVXBit] = 1;
     163        8020 :   if (Subtarget->hasAVX2())
     164        2334 :     Features[Feature_HasAVX2Bit] = 1;
     165        8020 :   if (Subtarget->hasAVX() && !Subtarget->hasAVX2())
     166        1484 :     Features[Feature_HasAVX1OnlyBit] = 1;
     167       16040 :   if (Subtarget->hasAVX512())
     168        1444 :     Features[Feature_HasAVX512Bit] = 1;
     169        8020 :   if (Subtarget->hasAVX() && !Subtarget->hasAVX512())
     170        2374 :     Features[Feature_UseAVXBit] = 1;
     171       16040 :   if (!Subtarget->hasAVX512())
     172       14596 :     Features[Feature_NoAVX512Bit] = 1;
     173        8020 :   if (Subtarget->hasCDI())
     174         450 :     Features[Feature_HasCDIBit] = 1;
     175        8020 :   if (Subtarget->hasVPOPCNTDQ())
     176          18 :     Features[Feature_HasVPOPCNTDQBit] = 1;
     177        8020 :   if (Subtarget->hasERI())
     178         218 :     Features[Feature_HasERIBit] = 1;
     179        8020 :   if (Subtarget->hasDQI())
     180         420 :     Features[Feature_HasDQIBit] = 1;
     181        8020 :   if (!Subtarget->hasDQI())
     182       15620 :     Features[Feature_NoDQIBit] = 1;
     183        8020 :   if (Subtarget->hasBWI())
     184         598 :     Features[Feature_HasBWIBit] = 1;
     185        8020 :   if (!Subtarget->hasBWI())
     186       15442 :     Features[Feature_NoBWIBit] = 1;
     187        8020 :   if (Subtarget->hasVLX())
     188         632 :     Features[Feature_HasVLXBit] = 1;
     189        8020 :   if (!Subtarget->hasVLX())
     190       15408 :     Features[Feature_NoVLXBit] = 1;
     191        8020 :   if (!Subtarget->hasVLX() || !Subtarget->hasBWI())
     192       15650 :     Features[Feature_NoVLX_Or_NoBWIBit] = 1;
     193        8020 :   if (!Subtarget->hasVLX() || !Subtarget->hasDQI())
     194       15710 :     Features[Feature_NoVLX_Or_NoDQIBit] = 1;
     195        8020 :   if (Subtarget->hasPOPCNT())
     196        1964 :     Features[Feature_HasPOPCNTBit] = 1;
     197        8020 :   if (Subtarget->hasAES())
     198        1456 :     Features[Feature_HasAESBit] = 1;
     199        8020 :   if (Subtarget->hasFXSR())
     200        3184 :     Features[Feature_HasFXSRBit] = 1;
     201        8020 :   if (Subtarget->hasXSAVE())
     202        1408 :     Features[Feature_HasXSAVEBit] = 1;
     203        8020 :   if (Subtarget->hasXSAVEOPT())
     204        1286 :     Features[Feature_HasXSAVEOPTBit] = 1;
     205        8020 :   if (Subtarget->hasXSAVEC())
     206         318 :     Features[Feature_HasXSAVECBit] = 1;
     207        8020 :   if (Subtarget->hasXSAVES())
     208         318 :     Features[Feature_HasXSAVESBit] = 1;
     209        8020 :   if (Subtarget->hasPCLMUL())
     210        1454 :     Features[Feature_HasPCLMULBit] = 1;
     211         900 :   if (Subtarget->hasFMA())
     212        1800 :     Features[Feature_HasFMABit] = 1;
     213        8020 :   if (Subtarget->hasFMA4())
     214         244 :     Features[Feature_HasFMA4Bit] = 1;
     215        8020 :   if (Subtarget->hasXOP())
     216         214 :     Features[Feature_HasXOPBit] = 1;
     217        8020 :   if (Subtarget->hasTBM())
     218         108 :     Features[Feature_HasTBMBit] = 1;
     219        8020 :   if (!Subtarget->hasTBM())
     220       15932 :     Features[Feature_NoTBMBit] = 1;
     221        8020 :   if (Subtarget->hasLWP())
     222         140 :     Features[Feature_HasLWPBit] = 1;
     223        8020 :   if (Subtarget->hasMOVBE())
     224         956 :     Features[Feature_HasMOVBEBit] = 1;
     225        8020 :   if (Subtarget->hasRDRAND())
     226         798 :     Features[Feature_HasRDRANDBit] = 1;
     227        8020 :   if (Subtarget->hasF16C())
     228         970 :     Features[Feature_HasF16CBit] = 1;
     229        8020 :   if (!Subtarget->hasF16C())
     230       15070 :     Features[Feature_NoF16CBit] = 1;
     231        8020 :   if (Subtarget->hasFSGSBase())
     232         824 :     Features[Feature_HasFSGSBaseBit] = 1;
     233        8020 :   if (Subtarget->hasLZCNT())
     234         948 :     Features[Feature_HasLZCNTBit] = 1;
     235        8020 :   if (Subtarget->hasBMI())
     236         922 :     Features[Feature_HasBMIBit] = 1;
     237        8020 :   if (Subtarget->hasBMI2())
     238         774 :     Features[Feature_HasBMI2Bit] = 1;
     239        8020 :   if (!Subtarget->hasBMI2())
     240       15266 :     Features[Feature_NoBMI2Bit] = 1;
     241        8020 :   if (Subtarget->hasVBMI())
     242          28 :     Features[Feature_HasVBMIBit] = 1;
     243        8020 :   if (Subtarget->hasIFMA())
     244           8 :     Features[Feature_HasIFMABit] = 1;
     245        8020 :   if (Subtarget->hasRTM())
     246         264 :     Features[Feature_HasRTMBit] = 1;
     247        8020 :   if (Subtarget->hasADX())
     248         530 :     Features[Feature_HasADXBit] = 1;
     249        8020 :   if (Subtarget->hasSHA())
     250          72 :     Features[Feature_HasSHABit] = 1;
     251        8020 :   if (Subtarget->hasRDSEED())
     252         550 :     Features[Feature_HasRDSEEDBit] = 1;
     253        8020 :   if (Subtarget->hasPRFCHW())
     254         330 :     Features[Feature_HasPrefetchWBit] = 1;
     255        8020 :   if (Subtarget->hasLAHFSAHF())
     256        5950 :     Features[Feature_HasLAHFSAHFBit] = 1;
     257        8020 :   if (Subtarget->hasMWAITX())
     258          86 :     Features[Feature_HasMWAITXBit] = 1;
     259        8020 :   if (Subtarget->hasCLZERO())
     260          52 :     Features[Feature_HasCLZEROBit] = 1;
     261       16040 :   if (!Subtarget->hasSSE1())
     262        2400 :     Features[Feature_FPStackf32Bit] = 1;
     263        8020 :   if (!Subtarget->hasSSE2())
     264        2492 :     Features[Feature_FPStackf64Bit] = 1;
     265        8020 :   if (Subtarget->hasCLFLUSHOPT())
     266         316 :     Features[Feature_HasCLFLUSHOPTBit] = 1;
     267        8020 :   if (Subtarget->hasCmpxchg16b())
     268        2502 :     Features[Feature_HasCmpxchg16bBit] = 1;
     269        8020 :   if (!Subtarget->is64Bit())
     270        3958 :     Features[Feature_Not64BitModeBit] = 1;
     271        8020 :   if (Subtarget->is64Bit())
     272       12082 :     Features[Feature_In64BitModeBit] = 1;
     273        5976 :   if (Subtarget->isTarget64BitLP64())
     274       11952 :     Features[Feature_IsLP64Bit] = 1;
     275             :   if (!Subtarget->isTarget64BitLP64())
     276        4088 :     Features[Feature_NotLP64Bit] = 1;
     277          21 :   if (Subtarget->isTargetPS4())
     278          42 :     Features[Feature_IsPS4Bit] = 1;
     279             :   if (!Subtarget->isTargetPS4())
     280       15998 :     Features[Feature_NotPS4Bit] = 1;
     281        8020 :   if (TM.getCodeModel() == CodeModel::Kernel)
     282           6 :     Features[Feature_KernelCodeBit] = 1;
     283        8020 :   if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel)
     284       15592 :     Features[Feature_NearDataBit] = 1;
     285        8020 :   if (!TM.isPositionIndependent())
     286       11740 :     Features[Feature_IsNotPICBit] = 1;
     287        8020 :   if (Subtarget->isLegalToCallImmediateAddr())
     288        2644 :     Features[Feature_CallImmAddrBit] = 1;
     289        8020 :   if (!Subtarget->slowTwoMemOps())
     290       15664 :     Features[Feature_FavorMemIndirectCallBit] = 1;
     291        8020 :   if (Subtarget->hasFastSHLDRotate())
     292        1094 :     Features[Feature_HasFastSHLDRotateBit] = 1;
     293             :   if (Subtarget->hasMFence())
     294       13592 :     Features[Feature_HasMFenceBit] = 1;
     295        8020 :   return Features;
     296             : }
     297             : 
     298        1158 : PredicateBitset X86InstructionSelector::
     299             : computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const {
     300        1158 :   PredicateBitset Features;
     301           0 :   if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF))
     302        2316 :     Features[Feature_NotWin64WithoutFPBit] = 1;
     303        1158 :   if (MF->getFunction()->optForSize())
     304           4 :     Features[Feature_OptForSizeBit] = 1;
     305        2316 :   if (MF->getFunction()->optForMinSize())
     306           0 :     Features[Feature_OptForMinSizeBit] = 1;
     307        1158 :   if (!MF->getFunction()->optForSize())
     308        2312 :     Features[Feature_OptForSpeedBit] = 1;
     309        1158 :   if (!Subtarget->slowIncDec() || MF->getFunction()->optForSize())
     310        1920 :     Features[Feature_UseIncDecBit] = 1;
     311        1158 :   return Features;
     312             : }
     313             : 
     314             : // LLT Objects.
     315             : enum {
     316             :   GILLT_s1,
     317             :   GILLT_s8,
     318             :   GILLT_s16,
     319             :   GILLT_s32,
     320             :   GILLT_s64,
     321             :   GILLT_s80,
     322             :   GILLT_s128,
     323             :   GILLT_v2s1,
     324             :   GILLT_v2s64,
     325             :   GILLT_v4s1,
     326             :   GILLT_v4s32,
     327             :   GILLT_v4s64,
     328             :   GILLT_v8s1,
     329             :   GILLT_v8s16,
     330             :   GILLT_v8s32,
     331             :   GILLT_v8s64,
     332             :   GILLT_v16s1,
     333             :   GILLT_v16s8,
     334             :   GILLT_v16s16,
     335             :   GILLT_v16s32,
     336             :   GILLT_v32s1,
     337             :   GILLT_v32s8,
     338             :   GILLT_v32s16,
     339             :   GILLT_v64s1,
     340             :   GILLT_v64s8,
     341             : };
     342             : const static LLT TypeObjects[] = {
     343             :   LLT::scalar(1),
     344             :   LLT::scalar(8),
     345             :   LLT::scalar(16),
     346             :   LLT::scalar(32),
     347             :   LLT::scalar(64),
     348             :   LLT::scalar(80),
     349             :   LLT::scalar(128),
     350             :   LLT::vector(2, 1),
     351             :   LLT::vector(2, 64),
     352             :   LLT::vector(4, 1),
     353             :   LLT::vector(4, 32),
     354             :   LLT::vector(4, 64),
     355             :   LLT::vector(8, 1),
     356             :   LLT::vector(8, 16),
     357             :   LLT::vector(8, 32),
     358             :   LLT::vector(8, 64),
     359             :   LLT::vector(16, 1),
     360             :   LLT::vector(16, 8),
     361             :   LLT::vector(16, 16),
     362             :   LLT::vector(16, 32),
     363             :   LLT::vector(32, 1),
     364             :   LLT::vector(32, 8),
     365             :   LLT::vector(32, 16),
     366             :   LLT::vector(64, 1),
     367             :   LLT::vector(64, 8),
     368     1879956 : };
     369             : 
     370             : // Feature bitsets.
     371             : enum {
     372             :   GIFBS_Invalid,
     373             :   GIFBS_FPStackf32,
     374             :   GIFBS_FPStackf64,
     375             :   GIFBS_HasAES,
     376             :   GIFBS_HasAVX,
     377             :   GIFBS_HasAVX1Only,
     378             :   GIFBS_HasAVX2,
     379             :   GIFBS_HasAVX512,
     380             :   GIFBS_HasBMI,
     381             :   GIFBS_HasBMI2,
     382             :   GIFBS_HasBWI,
     383             :   GIFBS_HasDQI,
     384             :   GIFBS_HasF16C,
     385             :   GIFBS_HasFMA,
     386             :   GIFBS_HasFMA4,
     387             :   GIFBS_HasPCLMUL,
     388             :   GIFBS_HasSHA,
     389             :   GIFBS_HasSSE42,
     390             :   GIFBS_HasSSE4A,
     391             :   GIFBS_HasTBM,
     392             :   GIFBS_HasVLX,
     393             :   GIFBS_HasXOP,
     394             :   GIFBS_In64BitMode,
     395             :   GIFBS_UseAVX,
     396             :   GIFBS_UseIncDec,
     397             :   GIFBS_UseSSE1,
     398             :   GIFBS_UseSSE2,
     399             :   GIFBS_UseSSE41,
     400             :   GIFBS_UseSSE42,
     401             :   GIFBS_UseSSSE3,
     402             :   GIFBS_HasAVX_HasAES,
     403             :   GIFBS_HasAVX_HasPCLMUL,
     404             :   GIFBS_HasAVX_NoVLX,
     405             :   GIFBS_HasAVX_NoVLX_Or_NoBWI,
     406             :   GIFBS_HasAVX2_NoVLX,
     407             :   GIFBS_HasAVX2_NoVLX_Or_NoBWI,
     408             :   GIFBS_HasAVX512_HasVLX,
     409             :   GIFBS_HasBWI_HasVLX,
     410             :   GIFBS_HasDQI_HasVLX,
     411             :   GIFBS_HasVLX_HasBWI,
     412             :   GIFBS_OptForMinSize_NotWin64WithoutFP,
     413             :   GIFBS_OptForSize_Not64BitMode,
     414             : };
     415             : const static PredicateBitset FeatureBitsets[] {
     416             :   {}, // GIFBS_Invalid
     417             :   {Feature_FPStackf32Bit, },
     418             :   {Feature_FPStackf64Bit, },
     419             :   {Feature_HasAESBit, },
     420             :   {Feature_HasAVXBit, },
     421             :   {Feature_HasAVX1OnlyBit, },
     422             :   {Feature_HasAVX2Bit, },
     423             :   {Feature_HasAVX512Bit, },
     424             :   {Feature_HasBMIBit, },
     425             :   {Feature_HasBMI2Bit, },
     426             :   {Feature_HasBWIBit, },
     427             :   {Feature_HasDQIBit, },
     428             :   {Feature_HasF16CBit, },
     429             :   {Feature_HasFMABit, },
     430             :   {Feature_HasFMA4Bit, },
     431             :   {Feature_HasPCLMULBit, },
     432             :   {Feature_HasSHABit, },
     433             :   {Feature_HasSSE42Bit, },
     434             :   {Feature_HasSSE4ABit, },
     435             :   {Feature_HasTBMBit, },
     436             :   {Feature_HasVLXBit, },
     437             :   {Feature_HasXOPBit, },
     438             :   {Feature_In64BitModeBit, },
     439             :   {Feature_UseAVXBit, },
     440             :   {Feature_UseIncDecBit, },
     441             :   {Feature_UseSSE1Bit, },
     442             :   {Feature_UseSSE2Bit, },
     443             :   {Feature_UseSSE41Bit, },
     444             :   {Feature_UseSSE42Bit, },
     445             :   {Feature_UseSSSE3Bit, },
     446             :   {Feature_HasAVXBit, Feature_HasAESBit, },
     447             :   {Feature_HasAVXBit, Feature_HasPCLMULBit, },
     448             :   {Feature_HasAVXBit, Feature_NoVLXBit, },
     449             :   {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, },
     450             :   {Feature_HasAVX2Bit, Feature_NoVLXBit, },
     451             :   {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, },
     452             :   {Feature_HasAVX512Bit, Feature_HasVLXBit, },
     453             :   {Feature_HasBWIBit, Feature_HasVLXBit, },
     454             :   {Feature_HasDQIBit, Feature_HasVLXBit, },
     455             :   {Feature_HasVLXBit, Feature_HasBWIBit, },
     456             :   {Feature_OptForMinSizeBit, Feature_NotWin64WithoutFPBit, },
     457             :   {Feature_OptForSizeBit, Feature_Not64BitModeBit, },
     458       72306 : };
     459             : 
     460             : // ComplexPattern predicates.
     461             : enum {
     462             :   GICP_Invalid,
     463             : };
     464             : // See constructor for table contents
     465             : 
     466             : // PatFrag predicates.
     467             : enum {
     468             :   GIPFP_Predicate_AndMask64 = GIPFP_Invalid + 1,
     469             :   GIPFP_Predicate_FROUND_CURRENT,
     470             :   GIPFP_Predicate_FROUND_NO_EXC,
     471             :   GIPFP_Predicate_i16immSExt8,
     472             :   GIPFP_Predicate_i32immSExt8,
     473             :   GIPFP_Predicate_i64immSExt32,
     474             :   GIPFP_Predicate_i64immSExt8,
     475             :   GIPFP_Predicate_i64immZExt32,
     476             :   GIPFP_Predicate_i64immZExt32SExt8,
     477             :   GIPFP_Predicate_i8immZExt3,
     478             :   GIPFP_Predicate_i8immZExt5,
     479             :   GIPFP_Predicate_immShift16,
     480             :   GIPFP_Predicate_immShift32,
     481             :   GIPFP_Predicate_immShift64,
     482             :   GIPFP_Predicate_immShift8,
     483             : };
     484           0 :   static bool Predicate_AndMask64(int64_t Imm) {
     485           0 :   return isMask_64(Imm) && Imm > UINT32_MAX;
     486             :   }
     487           0 :   static bool Predicate_FROUND_CURRENT(int64_t Imm) {
     488           0 :   return Imm == X86::STATIC_ROUNDING::CUR_DIRECTION;
     489             :   }
     490           0 :   static bool Predicate_FROUND_NO_EXC(int64_t Imm) { return Imm == 8;   }
     491           0 :   static bool Predicate_i16immSExt8(int64_t Imm) { return isInt<8>(Imm);   }
     492           0 :   static bool Predicate_i32immSExt8(int64_t Imm) { return isInt<8>(Imm);   }
     493          78 :   static bool Predicate_i64immSExt32(int64_t Imm) { return isInt<32>(Imm);   }
     494           0 :   static bool Predicate_i64immSExt8(int64_t Imm) { return isInt<8>(Imm);   }
     495           0 :   static bool Predicate_i64immZExt32(int64_t Imm) { return isUInt<32>(Imm);   }
     496           0 :   static bool Predicate_i64immZExt32SExt8(int64_t Imm) {
     497           0 :   return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm));
     498             :   }
     499           0 :   static bool Predicate_i8immZExt3(int64_t Imm) {
     500           0 :   return Imm >= 0 && Imm < 8;
     501             :   }
     502           0 :   static bool Predicate_i8immZExt5(int64_t Imm) {
     503           0 :   return Imm >= 0 && Imm < 32;
     504             :   }
     505           0 :   static bool Predicate_immShift16(int64_t Imm) {
     506           0 :   return countTrailingOnes<uint64_t>(Imm) >= 4;
     507             :   }
     508           0 :   static bool Predicate_immShift32(int64_t Imm) {
     509           0 :   return countTrailingOnes<uint64_t>(Imm) >= 5;
     510             :   }
     511           0 :   static bool Predicate_immShift64(int64_t Imm) {
     512           0 :   return countTrailingOnes<uint64_t>(Imm) >= 6;
     513             :   }
     514           0 :   static bool Predicate_immShift8(int64_t Imm) {
     515           0 :   return countTrailingOnes<uint64_t>(Imm) >= 3;
     516             :   }
     517             : static InstructionSelector::ImmediatePredicateFn ImmPredicateFns[] = {
     518             :   nullptr,
     519             :   Predicate_AndMask64,
     520             :   Predicate_FROUND_CURRENT,
     521             :   Predicate_FROUND_NO_EXC,
     522             :   Predicate_i16immSExt8,
     523             :   Predicate_i32immSExt8,
     524             :   Predicate_i64immSExt32,
     525             :   Predicate_i64immSExt8,
     526             :   Predicate_i64immZExt32,
     527             :   Predicate_i64immZExt32SExt8,
     528             :   Predicate_i8immZExt3,
     529             :   Predicate_i8immZExt5,
     530             :   Predicate_immShift16,
     531             :   Predicate_immShift32,
     532             :   Predicate_immShift64,
     533             :   Predicate_immShift8,
     534             : };
     535        1158 : bool X86InstructionSelector::selectImpl(MachineInstr &I) const {
     536        1158 :   MachineFunction &MF = *I.getParent()->getParent();
     537        1158 :   MachineRegisterInfo &MRI = MF.getRegInfo();
     538             :   // FIXME: This should be computed on a per-function basis rather than per-insn.
     539        1158 :   AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);
     540        1158 :   const PredicateBitset AvailableFeatures = getAvailableFeatures();
     541        2316 :   NewMIVector OutMIs;
     542        2316 :   State.MIs.clear();
     543        1158 :   State.MIs.push_back(&I);
     544             : 
     545             :   constexpr static int64_t MatchTable0[] = {
     546             :     GIM_Try, /*On fail goto*//*Label 0*/ 84,
     547             :       GIM_CheckFeatures, GIFBS_HasAVX,
     548             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     549             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     550             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     551             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     552             :       // MIs[0] dst
     553             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     554             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     555             :       // MIs[0] Operand 1
     556             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss,
     557             :       // MIs[0] src1
     558             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     560             :       // MIs[0] src
     561             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     562             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     563             :       // MIs[0] cc
     564             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     565             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     566             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i8immZExt5,
     567             :       // MIs[1] Operand 0
     568             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     569             :       // MIs[1] Operand 1
     570             :       // No operand predicates
     571             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     572             :       // (intrinsic_wo_chain:v4f32 5801:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src, (imm:i8)<<P:Predicate_i8immZExt5>>:$cc)  =>  (Int_VCMPSSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src, (imm:i8):$cc)
     573             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCMPSSrr,
     574             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     575             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     576             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
     577             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
     578             :       GIR_EraseFromParent, /*InsnID*/0,
     579             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     580             :       GIR_Done,
     581             :     // Label 0: @84
     582             :     GIM_Try, /*On fail goto*//*Label 1*/ 168,
     583             :       GIM_CheckFeatures, GIFBS_HasAVX,
     584             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     585             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     586             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     587             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     588             :       // MIs[0] dst
     589             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     590             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     591             :       // MIs[0] Operand 1
     592             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd,
     593             :       // MIs[0] src1
     594             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     595             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     596             :       // MIs[0] src
     597             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
     598             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     599             :       // MIs[0] cc
     600             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     601             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     602             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i8immZExt5,
     603             :       // MIs[1] Operand 0
     604             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     605             :       // MIs[1] Operand 1
     606             :       // No operand predicates
     607             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     608             :       // (intrinsic_wo_chain:v2f64 5843:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src, (imm:i8)<<P:Predicate_i8immZExt5>>:$cc)  =>  (Int_VCMPSDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src, (imm:i8):$cc)
     609             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCMPSDrr,
     610             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     611             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
     613             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
     614             :       GIR_EraseFromParent, /*InsnID*/0,
     615             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     616             :       GIR_Done,
     617             :     // Label 1: @168
     618             :     GIM_Try, /*On fail goto*//*Label 2*/ 252,
     619             :       GIM_CheckFeatures, GIFBS_UseSSE1,
     620             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     621             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     622             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     623             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     624             :       // MIs[0] dst
     625             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     626             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     627             :       // MIs[0] Operand 1
     628             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss,
     629             :       // MIs[0] src1
     630             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     631             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     632             :       // MIs[0] src
     633             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     634             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     635             :       // MIs[0] cc
     636             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     637             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     638             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i8immZExt3,
     639             :       // MIs[1] Operand 0
     640             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     641             :       // MIs[1] Operand 1
     642             :       // No operand predicates
     643             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     644             :       // (intrinsic_wo_chain:v4f32 5801:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src, (imm:i8)<<P:Predicate_i8immZExt3>>:$cc)  =>  (Int_CMPSSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src, (imm:i8):$cc)
     645             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CMPSSrr,
     646             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     647             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     648             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
     649             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
     650             :       GIR_EraseFromParent, /*InsnID*/0,
     651             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     652             :       GIR_Done,
     653             :     // Label 2: @252
     654             :     GIM_Try, /*On fail goto*//*Label 3*/ 336,
     655             :       GIM_CheckFeatures, GIFBS_UseSSE2,
     656             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     657             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     658             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     659             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     660             :       // MIs[0] dst
     661             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     662             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     663             :       // MIs[0] Operand 1
     664             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd,
     665             :       // MIs[0] src1
     666             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     667             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     668             :       // MIs[0] src
     669             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
     670             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     671             :       // MIs[0] cc
     672             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     673             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     674             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i8immZExt3,
     675             :       // MIs[1] Operand 0
     676             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     677             :       // MIs[1] Operand 1
     678             :       // No operand predicates
     679             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     680             :       // (intrinsic_wo_chain:v2f64 5843:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src, (imm:i8)<<P:Predicate_i8immZExt3>>:$cc)  =>  (Int_CMPSDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src, (imm:i8):$cc)
     681             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CMPSDrr,
     682             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     683             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     684             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
     685             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
     686             :       GIR_EraseFromParent, /*InsnID*/0,
     687             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     688             :       GIR_Done,
     689             :     // Label 3: @336
     690             :     GIM_Try, /*On fail goto*//*Label 4*/ 417,
     691             :       GIM_CheckFeatures, GIFBS_HasAVX,
     692             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     693             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     694             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     695             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     696             :       // MIs[0] dst
     697             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     699             :       // MIs[0] Operand 1
     700             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_ss,
     701             :       // MIs[0] src1
     702             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     703             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     704             :       // MIs[0] src2
     705             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     706             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     707             :       // MIs[0] src3
     708             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     709             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     710             :       // MIs[1] Operand 0
     711             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     712             :       // MIs[1] Operand 1
     713             :       // No operand predicates
     714             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     715             :       // (intrinsic_wo_chain:v4f32 5939:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i32):$src3)  =>  (VROUNDSSr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i32):$src3)
     716             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VROUNDSSr_Int,
     717             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     718             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     719             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     720             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     721             :       GIR_EraseFromParent, /*InsnID*/0,
     722             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     723             :       GIR_Done,
     724             :     // Label 4: @417
     725             :     GIM_Try, /*On fail goto*//*Label 5*/ 498,
     726             :       GIM_CheckFeatures, GIFBS_HasAVX,
     727             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     728             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     729             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     730             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     731             :       // MIs[0] dst
     732             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     733             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     734             :       // MIs[0] Operand 1
     735             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_sd,
     736             :       // MIs[0] src1
     737             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     738             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     739             :       // MIs[0] src2
     740             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
     741             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     742             :       // MIs[0] src3
     743             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     744             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     745             :       // MIs[1] Operand 0
     746             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     747             :       // MIs[1] Operand 1
     748             :       // No operand predicates
     749             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     750             :       // (intrinsic_wo_chain:v2f64 5938:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i32):$src3)  =>  (VROUNDSDr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i32):$src3)
     751             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VROUNDSDr_Int,
     752             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     753             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     755             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     756             :       GIR_EraseFromParent, /*InsnID*/0,
     757             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     758             :       GIR_Done,
     759             :     // Label 5: @498
     760             :     GIM_Try, /*On fail goto*//*Label 6*/ 579,
     761             :       GIM_CheckFeatures, GIFBS_UseSSE41,
     762             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     763             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     764             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     765             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     766             :       // MIs[0] dst
     767             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     769             :       // MIs[0] Operand 1
     770             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_ss,
     771             :       // MIs[0] src1
     772             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     774             :       // MIs[0] src2
     775             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     776             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     777             :       // MIs[0] src3
     778             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     779             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     780             :       // MIs[1] Operand 0
     781             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     782             :       // MIs[1] Operand 1
     783             :       // No operand predicates
     784             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     785             :       // (intrinsic_wo_chain:v4f32 5939:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i32):$src3)  =>  (ROUNDSSr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i32):$src3)
     786             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROUNDSSr_Int,
     787             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     788             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     789             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     790             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     791             :       GIR_EraseFromParent, /*InsnID*/0,
     792             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     793             :       GIR_Done,
     794             :     // Label 6: @579
     795             :     GIM_Try, /*On fail goto*//*Label 7*/ 660,
     796             :       GIM_CheckFeatures, GIFBS_UseSSE41,
     797             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     798             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     799             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     800             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     801             :       // MIs[0] dst
     802             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     804             :       // MIs[0] Operand 1
     805             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_sd,
     806             :       // MIs[0] src1
     807             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     808             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     809             :       // MIs[0] src2
     810             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
     811             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     812             :       // MIs[0] src3
     813             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s32,
     814             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     815             :       // MIs[1] Operand 0
     816             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
     817             :       // MIs[1] Operand 1
     818             :       // No operand predicates
     819             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     820             :       // (intrinsic_wo_chain:v2f64 5938:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i32):$src3)  =>  (ROUNDSDr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i32):$src3)
     821             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROUNDSDr_Int,
     822             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     823             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     824             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     825             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     826             :       GIR_EraseFromParent, /*InsnID*/0,
     827             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     828             :       GIR_Done,
     829             :     // Label 7: @660
     830             :     GIM_Try, /*On fail goto*//*Label 8*/ 741,
     831             :       GIM_CheckFeatures, GIFBS_HasAVX,
     832             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     833             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     834             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     835             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     836             :       // MIs[0] dst
     837             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
     838             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     839             :       // MIs[0] Operand 1
     840             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw,
     841             :       // MIs[0] src1
     842             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
     843             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     844             :       // MIs[0] src2
     845             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
     846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     847             :       // MIs[0] src3
     848             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     849             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     850             :       // MIs[1] Operand 0
     851             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     852             :       // MIs[1] Operand 1
     853             :       // No operand predicates
     854             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     855             :       // (intrinsic_wo_chain:v8i16 5928:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)  =>  (VMPSADBWrri:v8i16 VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)
     856             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWrri,
     857             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     858             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     859             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     860             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     861             :       GIR_EraseFromParent, /*InsnID*/0,
     862             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     863             :       GIR_Done,
     864             :     // Label 8: @741
     865             :     GIM_Try, /*On fail goto*//*Label 9*/ 822,
     866             :       GIM_CheckFeatures, GIFBS_HasAVX,
     867             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     868             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     869             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     870             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     871             :       // MIs[0] dst
     872             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
     873             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     874             :       // MIs[0] Operand 1
     875             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps,
     876             :       // MIs[0] src1
     877             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
     878             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     879             :       // MIs[0] src2
     880             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
     881             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     882             :       // MIs[0] src3
     883             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     884             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     885             :       // MIs[1] Operand 0
     886             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     887             :       // MIs[1] Operand 1
     888             :       // No operand predicates
     889             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     890             :       // (intrinsic_wo_chain:v4f32 5926:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i8):$src3)  =>  (VDPPSrri:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i8):$src3)
     891             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSrri,
     892             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     893             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     894             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     895             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     896             :       GIR_EraseFromParent, /*InsnID*/0,
     897             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     898             :       GIR_Done,
     899             :     // Label 9: @822
     900             :     GIM_Try, /*On fail goto*//*Label 10*/ 903,
     901             :       GIM_CheckFeatures, GIFBS_HasAVX,
     902             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     903             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     904             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     905             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     906             :       // MIs[0] dst
     907             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
     908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
     909             :       // MIs[0] Operand 1
     910             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd,
     911             :       // MIs[0] src1
     912             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
     913             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
     914             :       // MIs[0] src2
     915             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
     916             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
     917             :       // MIs[0] src3
     918             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     919             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     920             :       // MIs[1] Operand 0
     921             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     922             :       // MIs[1] Operand 1
     923             :       // No operand predicates
     924             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     925             :       // (intrinsic_wo_chain:v2f64 5925:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i8):$src3)  =>  (VDPPDrri:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i8):$src3)
     926             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPDrri,
     927             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     928             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     929             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     930             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     931             :       GIR_EraseFromParent, /*InsnID*/0,
     932             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     933             :       GIR_Done,
     934             :     // Label 10: @903
     935             :     GIM_Try, /*On fail goto*//*Label 11*/ 984,
     936             :       GIM_CheckFeatures, GIFBS_HasAVX,
     937             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     938             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     939             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     940             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     941             :       // MIs[0] dst
     942             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
     943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
     944             :       // MIs[0] Operand 1
     945             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_dp_ps_256,
     946             :       // MIs[0] src1
     947             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
     948             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
     949             :       // MIs[0] src2
     950             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32,
     951             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
     952             :       // MIs[0] src3
     953             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     954             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     955             :       // MIs[1] Operand 0
     956             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     957             :       // MIs[1] Operand 1
     958             :       // No operand predicates
     959             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     960             :       // (intrinsic_wo_chain:v8f32 4679:iPTR, VR256:v8f32:$src1, VR256:v8f32:$src2, (imm:i8):$src3)  =>  (VDPPSYrri:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2, (imm:i8):$src3)
     961             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSYrri,
     962             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     963             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     964             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
     965             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
     966             :       GIR_EraseFromParent, /*InsnID*/0,
     967             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
     968             :       GIR_Done,
     969             :     // Label 11: @984
     970             :     GIM_Try, /*On fail goto*//*Label 12*/ 1065,
     971             :       GIM_CheckFeatures, GIFBS_HasAVX2,
     972             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
     973             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
     974             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
     975             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
     976             :       // MIs[0] dst
     977             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
     978             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
     979             :       // MIs[0] Operand 1
     980             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_mpsadbw,
     981             :       // MIs[0] src1
     982             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
     983             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
     984             :       // MIs[0] src2
     985             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8,
     986             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
     987             :       // MIs[0] src3
     988             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
     989             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
     990             :       // MIs[1] Operand 0
     991             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
     992             :       // MIs[1] Operand 1
     993             :       // No operand predicates
     994             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
     995             :       // (intrinsic_wo_chain:v16i16 4753:iPTR, VR256:v32i8:$src1, VR256:v32i8:$src2, (imm:i8):$src3)  =>  (VMPSADBWYrri:v16i16 VR256:v32i8:$src1, VR256:v32i8:$src2, (imm:i8):$src3)
     996             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWYrri,
     997             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
     998             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
     999             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1000             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1001             :       GIR_EraseFromParent, /*InsnID*/0,
    1002             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1003             :       GIR_Done,
    1004             :     // Label 12: @1065
    1005             :     GIM_Try, /*On fail goto*//*Label 13*/ 1146,
    1006             :       GIM_CheckFeatures, GIFBS_UseSSE41,
    1007             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1008             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1009             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1010             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1011             :       // MIs[0] dst
    1012             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    1013             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1014             :       // MIs[0] Operand 1
    1015             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw,
    1016             :       // MIs[0] src1
    1017             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    1018             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1019             :       // MIs[0] src2
    1020             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    1021             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1022             :       // MIs[0] src3
    1023             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1024             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1025             :       // MIs[1] Operand 0
    1026             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1027             :       // MIs[1] Operand 1
    1028             :       // No operand predicates
    1029             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1030             :       // (intrinsic_wo_chain:v8i16 5928:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)  =>  (MPSADBWrri:v8i16 VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)
    1031             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MPSADBWrri,
    1032             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1033             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1034             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1035             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1036             :       GIR_EraseFromParent, /*InsnID*/0,
    1037             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1038             :       GIR_Done,
    1039             :     // Label 13: @1146
    1040             :     GIM_Try, /*On fail goto*//*Label 14*/ 1227,
    1041             :       GIM_CheckFeatures, GIFBS_UseSSE41,
    1042             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1043             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1044             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1045             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1046             :       // MIs[0] dst
    1047             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1048             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1049             :       // MIs[0] Operand 1
    1050             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps,
    1051             :       // MIs[0] src1
    1052             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1053             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1054             :       // MIs[0] src2
    1055             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1056             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1057             :       // MIs[0] src3
    1058             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1059             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1060             :       // MIs[1] Operand 0
    1061             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1062             :       // MIs[1] Operand 1
    1063             :       // No operand predicates
    1064             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1065             :       // (intrinsic_wo_chain:v4f32 5926:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i8):$src3)  =>  (DPPSrri:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, (imm:i8):$src3)
    1066             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPSrri,
    1067             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1069             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1070             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1071             :       GIR_EraseFromParent, /*InsnID*/0,
    1072             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1073             :       GIR_Done,
    1074             :     // Label 14: @1227
    1075             :     GIM_Try, /*On fail goto*//*Label 15*/ 1308,
    1076             :       GIM_CheckFeatures, GIFBS_UseSSE41,
    1077             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1078             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1079             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1080             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1081             :       // MIs[0] dst
    1082             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1083             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1084             :       // MIs[0] Operand 1
    1085             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd,
    1086             :       // MIs[0] src1
    1087             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1088             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1089             :       // MIs[0] src2
    1090             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1091             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1092             :       // MIs[0] src3
    1093             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1094             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1095             :       // MIs[1] Operand 0
    1096             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1097             :       // MIs[1] Operand 1
    1098             :       // No operand predicates
    1099             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1100             :       // (intrinsic_wo_chain:v2f64 5925:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i8):$src3)  =>  (DPPDrri:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, (imm:i8):$src3)
    1101             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPDrri,
    1102             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1103             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1104             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1105             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1106             :       GIR_EraseFromParent, /*InsnID*/0,
    1107             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1108             :       GIR_Done,
    1109             :     // Label 15: @1308
    1110             :     GIM_Try, /*On fail goto*//*Label 16*/ 1389,
    1111             :       GIM_CheckFeatures, GIFBS_HasAVX,
    1112             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1113             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1114             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1115             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1116             :       // MIs[0] dst
    1117             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    1118             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1119             :       // MIs[0] Operand 1
    1120             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_pcmpistrm128,
    1121             :       // MIs[0] src1
    1122             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    1123             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1124             :       // MIs[0] src2
    1125             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    1126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1127             :       // MIs[0] src3
    1128             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1129             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1130             :       // MIs[1] Operand 0
    1131             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1132             :       // MIs[1] Operand 1
    1133             :       // No operand predicates
    1134             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1135             :       // (intrinsic_wo_chain:v16i8 5957:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)  =>  (VPCMPISTRM128REG:v16i8:i32 VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)
    1136             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCMPISTRM128REG,
    1137             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1138             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1139             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1140             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1141             :       GIR_EraseFromParent, /*InsnID*/0,
    1142             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1143             :       GIR_Done,
    1144             :     // Label 16: @1389
    1145             :     GIM_Try, /*On fail goto*//*Label 17*/ 1470,
    1146             :       GIM_CheckFeatures, GIFBS_UseSSE42,
    1147             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1148             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1149             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1150             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1151             :       // MIs[0] dst
    1152             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    1153             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1154             :       // MIs[0] Operand 1
    1155             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_pcmpistrm128,
    1156             :       // MIs[0] src1
    1157             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    1158             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1159             :       // MIs[0] src2
    1160             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    1161             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1162             :       // MIs[0] src3
    1163             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1164             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1165             :       // MIs[1] Operand 0
    1166             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1167             :       // MIs[1] Operand 1
    1168             :       // No operand predicates
    1169             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1170             :       // (intrinsic_wo_chain:v16i8 5957:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)  =>  (PCMPISTRM128REG:v16i8:i32 VR128:v16i8:$src1, VR128:v16i8:$src2, (imm:i8):$src3)
    1171             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PCMPISTRM128REG,
    1172             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1173             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1174             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1175             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1176             :       GIR_EraseFromParent, /*InsnID*/0,
    1177             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1178             :       GIR_Done,
    1179             :     // Label 17: @1470
    1180             :     GIM_Try, /*On fail goto*//*Label 18*/ 1551,
    1181             :       GIM_CheckFeatures, GIFBS_HasSHA,
    1182             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1183             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1184             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1185             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1186             :       // MIs[0] dst
    1187             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1188             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1189             :       // MIs[0] Operand 1
    1190             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1rnds4,
    1191             :       // MIs[0] src1
    1192             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1193             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1194             :       // MIs[0] src2
    1195             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1196             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1197             :       // MIs[0] src3
    1198             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1199             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1200             :       // MIs[1] Operand 0
    1201             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1202             :       // MIs[1] Operand 1
    1203             :       // No operand predicates
    1204             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1205             :       // (intrinsic_wo_chain:v4i32 5795:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, (imm:i8):$src3)  =>  (SHA1RNDS4rri:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2, (imm:i8):$src3)
    1206             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1RNDS4rri,
    1207             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1208             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1209             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1210             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1211             :       GIR_EraseFromParent, /*InsnID*/0,
    1212             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1213             :       GIR_Done,
    1214             :     // Label 18: @1551
    1215             :     GIM_Try, /*On fail goto*//*Label 19*/ 1632,
    1216             :       GIM_CheckFeatures, GIFBS_HasAVX_HasPCLMUL,
    1217             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1218             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1219             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1220             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1221             :       // MIs[0] dst
    1222             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1224             :       // MIs[0] Operand 1
    1225             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq,
    1226             :       // MIs[0] src1
    1227             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1228             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1229             :       // MIs[0] src2
    1230             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1231             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1232             :       // MIs[0] src3
    1233             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1234             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1235             :       // MIs[1] Operand 0
    1236             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1237             :       // MIs[1] Operand 1
    1238             :       // No operand predicates
    1239             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1240             :       // (intrinsic_wo_chain:v2i64 5773:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2, (imm:i8):$src3)  =>  (VPCLMULQDQrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2, (imm:i8):$src3)
    1241             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQrr,
    1242             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1243             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1244             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1245             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1246             :       GIR_EraseFromParent, /*InsnID*/0,
    1247             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1248             :       GIR_Done,
    1249             :     // Label 19: @1632
    1250             :     GIM_Try, /*On fail goto*//*Label 20*/ 1713,
    1251             :       GIM_CheckFeatures, GIFBS_HasPCLMUL,
    1252             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1253             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
    1254             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    1255             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1256             :       // MIs[0] dst
    1257             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1258             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1259             :       // MIs[0] Operand 1
    1260             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq,
    1261             :       // MIs[0] src1
    1262             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1264             :       // MIs[0] src2
    1265             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1266             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1267             :       // MIs[0] src3
    1268             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
    1269             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    1270             :       // MIs[1] Operand 0
    1271             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    1272             :       // MIs[1] Operand 1
    1273             :       // No operand predicates
    1274             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    1275             :       // (intrinsic_wo_chain:v2i64 5773:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2, (imm:i8):$src3)  =>  (PCLMULQDQrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2, (imm:i8):$src3)
    1276             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PCLMULQDQrr,
    1277             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1278             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1279             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1280             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
    1281             :       GIR_EraseFromParent, /*InsnID*/0,
    1282             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1283             :       GIR_Done,
    1284             :     // Label 20: @1713
    1285             :     GIM_Try, /*On fail goto*//*Label 21*/ 1783,
    1286             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1287             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1288             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1289             :       // MIs[0] dst
    1290             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1291             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1292             :       // MIs[0] Operand 1
    1293             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmadd_ss,
    1294             :       // MIs[0] src1
    1295             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1296             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1297             :       // MIs[0] src2
    1298             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1299             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1300             :       // MIs[0] src3
    1301             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1302             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1303             :       // (intrinsic_wo_chain:v4f32 5663:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFMADDSS4rr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    1304             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADDSS4rr_Int,
    1305             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1306             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1307             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1308             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1309             :       GIR_EraseFromParent, /*InsnID*/0,
    1310             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1311             :       GIR_Done,
    1312             :     // Label 21: @1783
    1313             :     GIM_Try, /*On fail goto*//*Label 22*/ 1853,
    1314             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1315             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1316             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1317             :       // MIs[0] dst
    1318             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1319             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1320             :       // MIs[0] Operand 1
    1321             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmsub_ss,
    1322             :       // MIs[0] src1
    1323             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1325             :       // MIs[0] src2
    1326             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1328             :       // MIs[0] src3
    1329             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1331             :       // (intrinsic_wo_chain:v4f32 5673:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFMSUBSS4rr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    1332             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMSUBSS4rr_Int,
    1333             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1334             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1335             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1336             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1337             :       GIR_EraseFromParent, /*InsnID*/0,
    1338             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1339             :       GIR_Done,
    1340             :     // Label 22: @1853
    1341             :     GIM_Try, /*On fail goto*//*Label 23*/ 1923,
    1342             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1343             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1344             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1345             :       // MIs[0] dst
    1346             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1347             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1348             :       // MIs[0] Operand 1
    1349             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmadd_ss,
    1350             :       // MIs[0] src1
    1351             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1352             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1353             :       // MIs[0] src2
    1354             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1355             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1356             :       // MIs[0] src3
    1357             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1358             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1359             :       // (intrinsic_wo_chain:v4f32 5683:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFNMADDSS4rr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    1360             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMADDSS4rr_Int,
    1361             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1362             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1363             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1364             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1365             :       GIR_EraseFromParent, /*InsnID*/0,
    1366             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1367             :       GIR_Done,
    1368             :     // Label 23: @1923
    1369             :     GIM_Try, /*On fail goto*//*Label 24*/ 1993,
    1370             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1371             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1372             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1373             :       // MIs[0] dst
    1374             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1375             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1376             :       // MIs[0] Operand 1
    1377             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmsub_ss,
    1378             :       // MIs[0] src1
    1379             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1380             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1381             :       // MIs[0] src2
    1382             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1384             :       // MIs[0] src3
    1385             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1387             :       // (intrinsic_wo_chain:v4f32 5689:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFNMSUBSS4rr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    1388             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMSUBSS4rr_Int,
    1389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1390             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1391             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1392             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1393             :       GIR_EraseFromParent, /*InsnID*/0,
    1394             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1395             :       GIR_Done,
    1396             :     // Label 24: @1993
    1397             :     GIM_Try, /*On fail goto*//*Label 25*/ 2063,
    1398             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1399             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1400             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1401             :       // MIs[0] dst
    1402             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1403             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1404             :       // MIs[0] Operand 1
    1405             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmadd_sd,
    1406             :       // MIs[0] src1
    1407             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1409             :       // MIs[0] src2
    1410             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1411             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1412             :       // MIs[0] src3
    1413             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1414             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1415             :       // (intrinsic_wo_chain:v2f64 5662:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFMADDSD4rr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    1416             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADDSD4rr_Int,
    1417             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1419             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1420             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1421             :       GIR_EraseFromParent, /*InsnID*/0,
    1422             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1423             :       GIR_Done,
    1424             :     // Label 25: @2063
    1425             :     GIM_Try, /*On fail goto*//*Label 26*/ 2133,
    1426             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1427             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1428             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1429             :       // MIs[0] dst
    1430             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1432             :       // MIs[0] Operand 1
    1433             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmsub_sd,
    1434             :       // MIs[0] src1
    1435             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1436             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1437             :       // MIs[0] src2
    1438             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1439             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1440             :       // MIs[0] src3
    1441             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1442             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1443             :       // (intrinsic_wo_chain:v2f64 5672:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFMSUBSD4rr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    1444             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMSUBSD4rr_Int,
    1445             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1446             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1447             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1448             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1449             :       GIR_EraseFromParent, /*InsnID*/0,
    1450             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1451             :       GIR_Done,
    1452             :     // Label 26: @2133
    1453             :     GIM_Try, /*On fail goto*//*Label 27*/ 2203,
    1454             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1455             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1456             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1457             :       // MIs[0] dst
    1458             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1459             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1460             :       // MIs[0] Operand 1
    1461             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmadd_sd,
    1462             :       // MIs[0] src1
    1463             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1464             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1465             :       // MIs[0] src2
    1466             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1467             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1468             :       // MIs[0] src3
    1469             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1470             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1471             :       // (intrinsic_wo_chain:v2f64 5682:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFNMADDSD4rr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    1472             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMADDSD4rr_Int,
    1473             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1474             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1475             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1476             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1477             :       GIR_EraseFromParent, /*InsnID*/0,
    1478             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1479             :       GIR_Done,
    1480             :     // Label 27: @2203
    1481             :     GIM_Try, /*On fail goto*//*Label 28*/ 2273,
    1482             :       GIM_CheckFeatures, GIFBS_HasFMA4,
    1483             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1484             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1485             :       // MIs[0] dst
    1486             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1487             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1488             :       // MIs[0] Operand 1
    1489             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmsub_sd,
    1490             :       // MIs[0] src1
    1491             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1493             :       // MIs[0] src2
    1494             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1496             :       // MIs[0] src3
    1497             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1498             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1499             :       // (intrinsic_wo_chain:v2f64 5688:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFNMSUBSD4rr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    1500             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMSUBSD4rr_Int,
    1501             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1502             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1503             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1504             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1505             :       GIR_EraseFromParent, /*InsnID*/0,
    1506             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1507             :       GIR_Done,
    1508             :     // Label 28: @2273
    1509             :     GIM_Try, /*On fail goto*//*Label 29*/ 2343,
    1510             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1511             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1512             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1513             :       // MIs[0] dst
    1514             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1515             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1516             :       // MIs[0] Operand 1
    1517             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcswd,
    1518             :       // MIs[0] src1
    1519             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1520             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1521             :       // MIs[0] src2
    1522             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1523             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1524             :       // MIs[0] src3
    1525             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1526             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1527             :       // (intrinsic_wo_chain:v4i32 6050:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)  =>  (VPMADCSWDrr:v4i32 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)
    1528             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSWDrr,
    1529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1530             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1531             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1532             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1533             :       GIR_EraseFromParent, /*InsnID*/0,
    1534             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1535             :       GIR_Done,
    1536             :     // Label 29: @2343
    1537             :     GIM_Try, /*On fail goto*//*Label 30*/ 2413,
    1538             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1539             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1540             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1541             :       // MIs[0] dst
    1542             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1543             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1544             :       // MIs[0] Operand 1
    1545             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcsswd,
    1546             :       // MIs[0] src1
    1547             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1548             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1549             :       // MIs[0] src2
    1550             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1551             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1552             :       // MIs[0] src3
    1553             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1554             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1555             :       // (intrinsic_wo_chain:v4i32 6049:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)  =>  (VPMADCSSWDrr:v4i32 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)
    1556             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSSWDrr,
    1557             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1558             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1559             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1560             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1561             :       GIR_EraseFromParent, /*InsnID*/0,
    1562             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1563             :       GIR_Done,
    1564             :     // Label 30: @2413
    1565             :     GIM_Try, /*On fail goto*//*Label 31*/ 2483,
    1566             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1567             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1568             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1569             :       // MIs[0] dst
    1570             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    1571             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1572             :       // MIs[0] Operand 1
    1573             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsww,
    1574             :       // MIs[0] src1
    1575             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1576             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1577             :       // MIs[0] src2
    1578             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1579             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1580             :       // MIs[0] src3
    1581             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16,
    1582             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1583             :       // (intrinsic_wo_chain:v8i16 6048:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v8i16:$src3)  =>  (VPMACSWWrr:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v8i16:$src3)
    1584             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr,
    1585             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1586             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1587             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1589             :       GIR_EraseFromParent, /*InsnID*/0,
    1590             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1591             :       GIR_Done,
    1592             :     // Label 31: @2483
    1593             :     GIM_Try, /*On fail goto*//*Label 32*/ 2553,
    1594             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1595             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1596             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1597             :       // MIs[0] dst
    1598             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1599             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1600             :       // MIs[0] Operand 1
    1601             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacswd,
    1602             :       // MIs[0] src1
    1603             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1604             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1605             :       // MIs[0] src2
    1606             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1607             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1608             :       // MIs[0] src3
    1609             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1610             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1611             :       // (intrinsic_wo_chain:v4i32 6047:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)  =>  (VPMACSWDrr:v4i32 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)
    1612             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWDrr,
    1613             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1614             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1615             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1616             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1617             :       GIR_EraseFromParent, /*InsnID*/0,
    1618             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1619             :       GIR_Done,
    1620             :     // Label 32: @2553
    1621             :     GIM_Try, /*On fail goto*//*Label 33*/ 2623,
    1622             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1623             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1624             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1625             :       // MIs[0] dst
    1626             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    1627             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1628             :       // MIs[0] Operand 1
    1629             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssww,
    1630             :       // MIs[0] src1
    1631             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1632             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1633             :       // MIs[0] src2
    1634             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1635             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1636             :       // MIs[0] src3
    1637             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16,
    1638             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1639             :       // (intrinsic_wo_chain:v8i16 6046:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v8i16:$src3)  =>  (VPMACSSWWrr:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v8i16:$src3)
    1640             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWWrr,
    1641             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1642             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1643             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1644             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1645             :       GIR_EraseFromParent, /*InsnID*/0,
    1646             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1647             :       GIR_Done,
    1648             :     // Label 33: @2623
    1649             :     GIM_Try, /*On fail goto*//*Label 34*/ 2693,
    1650             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1651             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1652             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1653             :       // MIs[0] dst
    1654             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1655             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1656             :       // MIs[0] Operand 1
    1657             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsswd,
    1658             :       // MIs[0] src1
    1659             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    1660             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1661             :       // MIs[0] src2
    1662             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    1663             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1664             :       // MIs[0] src3
    1665             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1666             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1667             :       // (intrinsic_wo_chain:v4i32 6045:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)  =>  (VPMACSSWDrr:v4i32 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v4i32:$src3)
    1668             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWDrr,
    1669             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1670             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1671             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1672             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1673             :       GIR_EraseFromParent, /*InsnID*/0,
    1674             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1675             :       GIR_Done,
    1676             :     // Label 34: @2693
    1677             :     GIM_Try, /*On fail goto*//*Label 35*/ 2763,
    1678             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1679             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1680             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1681             :       // MIs[0] dst
    1682             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1683             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1684             :       // MIs[0] Operand 1
    1685             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdql,
    1686             :       // MIs[0] src1
    1687             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1688             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1689             :       // MIs[0] src2
    1690             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1691             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1692             :       // MIs[0] src3
    1693             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1694             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1695             :       // (intrinsic_wo_chain:v2i64 6044:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)  =>  (VPMACSSDQLrr:v2i64 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)
    1696             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQLrr,
    1697             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1698             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1699             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1700             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1701             :       GIR_EraseFromParent, /*InsnID*/0,
    1702             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1703             :       GIR_Done,
    1704             :     // Label 35: @2763
    1705             :     GIM_Try, /*On fail goto*//*Label 36*/ 2833,
    1706             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1707             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1708             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1709             :       // MIs[0] dst
    1710             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1711             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1712             :       // MIs[0] Operand 1
    1713             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdqh,
    1714             :       // MIs[0] src1
    1715             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1717             :       // MIs[0] src2
    1718             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1719             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1720             :       // MIs[0] src3
    1721             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1722             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1723             :       // (intrinsic_wo_chain:v2i64 6043:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)  =>  (VPMACSSDQHrr:v2i64 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)
    1724             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQHrr,
    1725             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1726             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1727             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1728             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1729             :       GIR_EraseFromParent, /*InsnID*/0,
    1730             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1731             :       GIR_Done,
    1732             :     // Label 36: @2833
    1733             :     GIM_Try, /*On fail goto*//*Label 37*/ 2903,
    1734             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1735             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1736             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1737             :       // MIs[0] dst
    1738             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1739             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1740             :       // MIs[0] Operand 1
    1741             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdd,
    1742             :       // MIs[0] src1
    1743             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1744             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1745             :       // MIs[0] src2
    1746             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1747             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1748             :       // MIs[0] src3
    1749             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1751             :       // (intrinsic_wo_chain:v4i32 6042:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v4i32:$src3)  =>  (VPMACSSDDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v4i32:$src3)
    1752             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDDrr,
    1753             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1755             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1756             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1757             :       GIR_EraseFromParent, /*InsnID*/0,
    1758             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1759             :       GIR_Done,
    1760             :     // Label 37: @2903
    1761             :     GIM_Try, /*On fail goto*//*Label 38*/ 2973,
    1762             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1763             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1764             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1765             :       // MIs[0] dst
    1766             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1768             :       // MIs[0] Operand 1
    1769             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdql,
    1770             :       // MIs[0] src1
    1771             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1772             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1773             :       // MIs[0] src2
    1774             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1775             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1776             :       // MIs[0] src3
    1777             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1778             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1779             :       // (intrinsic_wo_chain:v2i64 6041:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)  =>  (VPMACSDQLrr:v2i64 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)
    1780             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQLrr,
    1781             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1782             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1783             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1784             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1785             :       GIR_EraseFromParent, /*InsnID*/0,
    1786             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1787             :       GIR_Done,
    1788             :     // Label 38: @2973
    1789             :     GIM_Try, /*On fail goto*//*Label 39*/ 3043,
    1790             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1791             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1792             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1793             :       // MIs[0] dst
    1794             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1795             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1796             :       // MIs[0] Operand 1
    1797             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdqh,
    1798             :       // MIs[0] src1
    1799             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1800             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1801             :       // MIs[0] src2
    1802             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1804             :       // MIs[0] src3
    1805             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1806             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1807             :       // (intrinsic_wo_chain:v2i64 6040:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)  =>  (VPMACSDQHrr:v2i64 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v2i64:$src3)
    1808             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQHrr,
    1809             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1810             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1811             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1812             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1813             :       GIR_EraseFromParent, /*InsnID*/0,
    1814             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1815             :       GIR_Done,
    1816             :     // Label 39: @3043
    1817             :     GIM_Try, /*On fail goto*//*Label 40*/ 3113,
    1818             :       GIM_CheckFeatures, GIFBS_HasXOP,
    1819             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1820             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1821             :       // MIs[0] dst
    1822             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1823             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1824             :       // MIs[0] Operand 1
    1825             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdd,
    1826             :       // MIs[0] src1
    1827             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1828             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1829             :       // MIs[0] src2
    1830             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1831             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1832             :       // MIs[0] src3
    1833             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1834             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1835             :       // (intrinsic_wo_chain:v4i32 6039:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v4i32:$src3)  =>  (VPMACSDDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v4i32:$src3)
    1836             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr,
    1837             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1838             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1839             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1840             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1841             :       GIR_EraseFromParent, /*InsnID*/0,
    1842             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1843             :       GIR_Done,
    1844             :     // Label 40: @3113
    1845             :     GIM_Try, /*On fail goto*//*Label 41*/ 3183,
    1846             :       GIM_CheckFeatures, GIFBS_HasAVX,
    1847             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1848             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1849             :       // MIs[0] dst
    1850             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    1851             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1852             :       // MIs[0] Operand 1
    1853             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_blendvpd,
    1854             :       // MIs[0] src1
    1855             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    1856             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1857             :       // MIs[0] src2
    1858             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    1859             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1860             :       // MIs[0] src3
    1861             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    1862             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1863             :       // (intrinsic_wo_chain:v2f64 5923:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VBLENDVPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    1864             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPDrr,
    1865             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1866             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1867             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1868             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1869             :       GIR_EraseFromParent, /*InsnID*/0,
    1870             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1871             :       GIR_Done,
    1872             :     // Label 41: @3183
    1873             :     GIM_Try, /*On fail goto*//*Label 42*/ 3253,
    1874             :       GIM_CheckFeatures, GIFBS_HasAVX,
    1875             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1876             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1877             :       // MIs[0] dst
    1878             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    1879             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    1880             :       // MIs[0] Operand 1
    1881             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_blendv_pd_256,
    1882             :       // MIs[0] src1
    1883             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    1884             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    1885             :       // MIs[0] src2
    1886             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
    1887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    1888             :       // MIs[0] src3
    1889             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s64,
    1890             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID,
    1891             :       // (intrinsic_wo_chain:v4f64 4669:iPTR, VR256:v4f64:$src1, VR256:v4f64:$src2, VR256:v4f64:$src3)  =>  (VBLENDVPDYrr:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2, VR256:v4f64:$src3)
    1892             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPDYrr,
    1893             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1894             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1895             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1896             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1897             :       GIR_EraseFromParent, /*InsnID*/0,
    1898             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1899             :       GIR_Done,
    1900             :     // Label 42: @3253
    1901             :     GIM_Try, /*On fail goto*//*Label 43*/ 3323,
    1902             :       GIM_CheckFeatures, GIFBS_HasAVX,
    1903             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1904             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1905             :       // MIs[0] dst
    1906             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    1907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1908             :       // MIs[0] Operand 1
    1909             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_blendvps,
    1910             :       // MIs[0] src1
    1911             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    1912             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1913             :       // MIs[0] src2
    1914             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    1915             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1916             :       // MIs[0] src3
    1917             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    1918             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1919             :       // (intrinsic_wo_chain:v4f32 5924:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VBLENDVPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    1920             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPSrr,
    1921             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1922             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1923             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1924             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1925             :       GIR_EraseFromParent, /*InsnID*/0,
    1926             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1927             :       GIR_Done,
    1928             :     // Label 43: @3323
    1929             :     GIM_Try, /*On fail goto*//*Label 44*/ 3393,
    1930             :       GIM_CheckFeatures, GIFBS_HasAVX,
    1931             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1932             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1933             :       // MIs[0] dst
    1934             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    1935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    1936             :       // MIs[0] Operand 1
    1937             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_blendv_ps_256,
    1938             :       // MIs[0] src1
    1939             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    1940             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    1941             :       // MIs[0] src2
    1942             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32,
    1943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    1944             :       // MIs[0] src3
    1945             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s32,
    1946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID,
    1947             :       // (intrinsic_wo_chain:v8f32 4670:iPTR, VR256:v8f32:$src1, VR256:v8f32:$src2, VR256:v8f32:$src3)  =>  (VBLENDVPSYrr:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2, VR256:v8f32:$src3)
    1948             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPSYrr,
    1949             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1950             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1951             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1952             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1953             :       GIR_EraseFromParent, /*InsnID*/0,
    1954             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1955             :       GIR_Done,
    1956             :     // Label 44: @3393
    1957             :     GIM_Try, /*On fail goto*//*Label 45*/ 3463,
    1958             :       GIM_CheckFeatures, GIFBS_HasAVX,
    1959             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1960             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1961             :       // MIs[0] dst
    1962             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    1963             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    1964             :       // MIs[0] Operand 1
    1965             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_pblendvb,
    1966             :       // MIs[0] src1
    1967             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    1968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    1969             :       // MIs[0] src2
    1970             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    1971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    1972             :       // MIs[0] src3
    1973             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
    1974             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    1975             :       // (intrinsic_wo_chain:v16i8 5930:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2, VR128:v16i8:$src3)  =>  (VPBLENDVBrr:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2, VR128:v16i8:$src3)
    1976             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPBLENDVBrr,
    1977             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    1978             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    1979             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    1980             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    1981             :       GIR_EraseFromParent, /*InsnID*/0,
    1982             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    1983             :       GIR_Done,
    1984             :     // Label 45: @3463
    1985             :     GIM_Try, /*On fail goto*//*Label 46*/ 3533,
    1986             :       GIM_CheckFeatures, GIFBS_HasAVX2,
    1987             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    1988             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    1989             :       // MIs[0] dst
    1990             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8,
    1991             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    1992             :       // MIs[0] Operand 1
    1993             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_pblendvb,
    1994             :       // MIs[0] src1
    1995             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
    1996             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    1997             :       // MIs[0] src2
    1998             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8,
    1999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    2000             :       // MIs[0] src3
    2001             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v32s8,
    2002             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID,
    2003             :       // (intrinsic_wo_chain:v32i8 4762:iPTR, VR256:v32i8:$src1, VR256:v32i8:$src2, VR256:v32i8:$src3)  =>  (VPBLENDVBYrr:v32i8 VR256:v32i8:$src1, VR256:v32i8:$src2, VR256:v32i8:$src3)
    2004             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPBLENDVBYrr,
    2005             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2006             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2007             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2008             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2009             :       GIR_EraseFromParent, /*InsnID*/0,
    2010             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2011             :       GIR_Done,
    2012             :     // Label 46: @3533
    2013             :     GIM_Try, /*On fail goto*//*Label 47*/ 3603,
    2014             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2015             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2016             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2017             :       // MIs[0] dst
    2018             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2019             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2020             :       // MIs[0] Operand 1
    2021             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmadd_ss,
    2022             :       // MIs[0] src1
    2023             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2025             :       // MIs[0] src2
    2026             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2027             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2028             :       // MIs[0] src3
    2029             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    2030             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2031             :       // (intrinsic_wo_chain:v4f32 5663:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFMADD213SSr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    2032             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SSr_Int,
    2033             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2034             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2037             :       GIR_EraseFromParent, /*InsnID*/0,
    2038             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2039             :       GIR_Done,
    2040             :     // Label 47: @3603
    2041             :     GIM_Try, /*On fail goto*//*Label 48*/ 3673,
    2042             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2043             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2044             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2045             :       // MIs[0] dst
    2046             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2047             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2048             :       // MIs[0] Operand 1
    2049             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmadd_sd,
    2050             :       // MIs[0] src1
    2051             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2052             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2053             :       // MIs[0] src2
    2054             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2055             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2056             :       // MIs[0] src3
    2057             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    2058             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2059             :       // (intrinsic_wo_chain:v2f64 5662:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFMADD213SDr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    2060             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMADD213SDr_Int,
    2061             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2062             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2063             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2064             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2065             :       GIR_EraseFromParent, /*InsnID*/0,
    2066             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2067             :       GIR_Done,
    2068             :     // Label 48: @3673
    2069             :     GIM_Try, /*On fail goto*//*Label 49*/ 3743,
    2070             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2071             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2072             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2073             :       // MIs[0] dst
    2074             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2075             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2076             :       // MIs[0] Operand 1
    2077             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmsub_ss,
    2078             :       // MIs[0] src1
    2079             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2081             :       // MIs[0] src2
    2082             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2083             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2084             :       // MIs[0] src3
    2085             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    2086             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2087             :       // (intrinsic_wo_chain:v4f32 5673:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFMSUB213SSr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    2088             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMSUB213SSr_Int,
    2089             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2091             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2092             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2093             :       GIR_EraseFromParent, /*InsnID*/0,
    2094             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2095             :       GIR_Done,
    2096             :     // Label 49: @3743
    2097             :     GIM_Try, /*On fail goto*//*Label 50*/ 3813,
    2098             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2099             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2100             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2101             :       // MIs[0] dst
    2102             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2103             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2104             :       // MIs[0] Operand 1
    2105             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfmsub_sd,
    2106             :       // MIs[0] src1
    2107             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2108             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2109             :       // MIs[0] src2
    2110             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2112             :       // MIs[0] src3
    2113             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    2114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2115             :       // (intrinsic_wo_chain:v2f64 5672:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFMSUB213SDr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    2116             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFMSUB213SDr_Int,
    2117             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2118             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2119             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2120             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2121             :       GIR_EraseFromParent, /*InsnID*/0,
    2122             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2123             :       GIR_Done,
    2124             :     // Label 50: @3813
    2125             :     GIM_Try, /*On fail goto*//*Label 51*/ 3883,
    2126             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2127             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2128             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2129             :       // MIs[0] dst
    2130             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2131             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2132             :       // MIs[0] Operand 1
    2133             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmadd_ss,
    2134             :       // MIs[0] src1
    2135             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2136             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2137             :       // MIs[0] src2
    2138             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2139             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2140             :       // MIs[0] src3
    2141             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    2142             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2143             :       // (intrinsic_wo_chain:v4f32 5683:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFNMADD213SSr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    2144             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMADD213SSr_Int,
    2145             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2146             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2147             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2148             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2149             :       GIR_EraseFromParent, /*InsnID*/0,
    2150             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2151             :       GIR_Done,
    2152             :     // Label 51: @3883
    2153             :     GIM_Try, /*On fail goto*//*Label 52*/ 3953,
    2154             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2155             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2156             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2157             :       // MIs[0] dst
    2158             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2160             :       // MIs[0] Operand 1
    2161             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmadd_sd,
    2162             :       // MIs[0] src1
    2163             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2164             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2165             :       // MIs[0] src2
    2166             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2167             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2168             :       // MIs[0] src3
    2169             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    2170             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2171             :       // (intrinsic_wo_chain:v2f64 5682:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFNMADD213SDr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    2172             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMADD213SDr_Int,
    2173             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2174             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2175             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2176             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2177             :       GIR_EraseFromParent, /*InsnID*/0,
    2178             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2179             :       GIR_Done,
    2180             :     // Label 52: @3953
    2181             :     GIM_Try, /*On fail goto*//*Label 53*/ 4023,
    2182             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2183             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2184             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2185             :       // MIs[0] dst
    2186             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2187             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2188             :       // MIs[0] Operand 1
    2189             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmsub_ss,
    2190             :       // MIs[0] src1
    2191             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2193             :       // MIs[0] src2
    2194             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2195             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2196             :       // MIs[0] src3
    2197             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
    2198             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2199             :       // (intrinsic_wo_chain:v4f32 5689:iPTR, VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)  =>  (VFNMSUB213SSr_Int:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2, VR128:v4f32:$src3)
    2200             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMSUB213SSr_Int,
    2201             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2202             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2203             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2204             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2205             :       GIR_EraseFromParent, /*InsnID*/0,
    2206             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2207             :       GIR_Done,
    2208             :     // Label 53: @4023
    2209             :     GIM_Try, /*On fail goto*//*Label 54*/ 4093,
    2210             :       GIM_CheckFeatures, GIFBS_HasFMA,
    2211             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
    2212             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2213             :       // MIs[0] dst
    2214             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2215             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2216             :       // MIs[0] Operand 1
    2217             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_fma_vfnmsub_sd,
    2218             :       // MIs[0] src1
    2219             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2221             :       // MIs[0] src2
    2222             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2224             :       // MIs[0] src3
    2225             :       GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
    2226             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
    2227             :       // (intrinsic_wo_chain:v2f64 5688:iPTR, VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)  =>  (VFNMSUB213SDr_Int:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2, VR128:v2f64:$src3)
    2228             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFNMSUB213SDr_Int,
    2229             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2230             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2231             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2232             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
    2233             :       GIR_EraseFromParent, /*InsnID*/0,
    2234             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2235             :       GIR_Done,
    2236             :     // Label 54: @4093
    2237             :     GIM_Try, /*On fail goto*//*Label 55*/ 4162,
    2238             :       GIM_CheckFeatures, GIFBS_HasTBM,
    2239             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2240             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2241             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2242             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2243             :       // MIs[0] dst
    2244             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    2246             :       // MIs[0] Operand 1
    2247             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_tbm_bextri_u32,
    2248             :       // MIs[0] src1
    2249             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    2250             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    2251             :       // MIs[0] cntl
    2252             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2253             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2254             :       // MIs[1] Operand 0
    2255             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2256             :       // MIs[1] Operand 1
    2257             :       // No operand predicates
    2258             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2259             :       // (intrinsic_wo_chain:i32 5991:iPTR, GR32:i32:$src1, (imm:i32):$cntl)  =>  (BEXTRI32ri:i32:i32 GR32:i32:$src1, (imm:i32):$cntl)
    2260             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BEXTRI32ri,
    2261             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2262             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2263             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cntl
    2264             :       GIR_EraseFromParent, /*InsnID*/0,
    2265             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2266             :       GIR_Done,
    2267             :     // Label 55: @4162
    2268             :     GIM_Try, /*On fail goto*//*Label 56*/ 4234,
    2269             :       GIM_CheckFeatures, GIFBS_HasTBM,
    2270             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2271             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2272             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2273             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2274             :       // MIs[0] dst
    2275             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    2277             :       // MIs[0] Operand 1
    2278             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_tbm_bextri_u64,
    2279             :       // MIs[0] src1
    2280             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2281             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    2282             :       // MIs[0] cntl
    2283             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2284             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2285             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i64immSExt32,
    2286             :       // MIs[1] Operand 0
    2287             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    2288             :       // MIs[1] Operand 1
    2289             :       // No operand predicates
    2290             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2291             :       // (intrinsic_wo_chain:i64 5992:iPTR, GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt32>>:$cntl)  =>  (BEXTRI64ri:i64:i32 GR64:i64:$src1, (imm:i64):$cntl)
    2292             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BEXTRI64ri,
    2293             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2294             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2295             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cntl
    2296             :       GIR_EraseFromParent, /*InsnID*/0,
    2297             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2298             :       GIR_Done,
    2299             :     // Label 56: @4234
    2300             :     GIM_Try, /*On fail goto*//*Label 57*/ 4303,
    2301             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2302             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2303             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2304             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2305             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2306             :       // MIs[0] dst
    2307             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2308             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2309             :       // MIs[0] Operand 1
    2310             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_ps,
    2311             :       // MIs[0] src1
    2312             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2313             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2314             :       // MIs[0] src2
    2315             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2316             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2317             :       // MIs[1] Operand 0
    2318             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2319             :       // MIs[1] Operand 1
    2320             :       // No operand predicates
    2321             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2322             :       // (intrinsic_wo_chain:v4f32 5937:iPTR, VR128:v4f32:$src1, (imm:i32):$src2)  =>  (VROUNDPSr:v4f32 VR128:v4f32:$src1, (imm:i32):$src2)
    2323             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VROUNDPSr,
    2324             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2325             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2326             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2327             :       GIR_EraseFromParent, /*InsnID*/0,
    2328             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2329             :       GIR_Done,
    2330             :     // Label 57: @4303
    2331             :     GIM_Try, /*On fail goto*//*Label 58*/ 4372,
    2332             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2333             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2334             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2335             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2336             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2337             :       // MIs[0] dst
    2338             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2339             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2340             :       // MIs[0] Operand 1
    2341             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_pd,
    2342             :       // MIs[0] src1
    2343             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2345             :       // MIs[0] src2
    2346             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2347             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2348             :       // MIs[1] Operand 0
    2349             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2350             :       // MIs[1] Operand 1
    2351             :       // No operand predicates
    2352             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2353             :       // (intrinsic_wo_chain:v2f64 5936:iPTR, VR128:v2f64:$src1, (imm:i32):$src2)  =>  (VROUNDPDr:v2f64 VR128:v2f64:$src1, (imm:i32):$src2)
    2354             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VROUNDPDr,
    2355             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2356             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2357             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2358             :       GIR_EraseFromParent, /*InsnID*/0,
    2359             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2360             :       GIR_Done,
    2361             :     // Label 58: @4372
    2362             :     GIM_Try, /*On fail goto*//*Label 59*/ 4441,
    2363             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2364             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2365             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2366             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2367             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2368             :       // MIs[0] dst
    2369             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    2370             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    2371             :       // MIs[0] Operand 1
    2372             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_round_ps_256,
    2373             :       // MIs[0] src1
    2374             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    2375             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    2376             :       // MIs[0] src2
    2377             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2378             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2379             :       // MIs[1] Operand 0
    2380             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2381             :       // MIs[1] Operand 1
    2382             :       // No operand predicates
    2383             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2384             :       // (intrinsic_wo_chain:v8f32 4704:iPTR, VR256:v8f32:$src1, (imm:i32):$src2)  =>  (VROUNDYPSr:v8f32 VR256:v8f32:$src1, (imm:i32):$src2)
    2385             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VROUNDYPSr,
    2386             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2387             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2388             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2389             :       GIR_EraseFromParent, /*InsnID*/0,
    2390             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2391             :       GIR_Done,
    2392             :     // Label 59: @4441
    2393             :     GIM_Try, /*On fail goto*//*Label 60*/ 4510,
    2394             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2395             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2396             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2397             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2398             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2399             :       // MIs[0] dst
    2400             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    2401             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    2402             :       // MIs[0] Operand 1
    2403             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_round_pd_256,
    2404             :       // MIs[0] src1
    2405             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    2406             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    2407             :       // MIs[0] src2
    2408             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2409             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2410             :       // MIs[1] Operand 0
    2411             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2412             :       // MIs[1] Operand 1
    2413             :       // No operand predicates
    2414             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2415             :       // (intrinsic_wo_chain:v4f64 4703:iPTR, VR256:v4f64:$src1, (imm:i32):$src2)  =>  (VROUNDYPDr:v4f64 VR256:v4f64:$src1, (imm:i32):$src2)
    2416             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VROUNDYPDr,
    2417             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2418             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2419             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2420             :       GIR_EraseFromParent, /*InsnID*/0,
    2421             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2422             :       GIR_Done,
    2423             :     // Label 60: @4510
    2424             :     GIM_Try, /*On fail goto*//*Label 61*/ 4579,
    2425             :       GIM_CheckFeatures, GIFBS_UseSSE41,
    2426             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2427             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2428             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2429             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2430             :       // MIs[0] dst
    2431             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2433             :       // MIs[0] Operand 1
    2434             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_ps,
    2435             :       // MIs[0] src1
    2436             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2437             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2438             :       // MIs[0] src2
    2439             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2440             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2441             :       // MIs[1] Operand 0
    2442             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2443             :       // MIs[1] Operand 1
    2444             :       // No operand predicates
    2445             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2446             :       // (intrinsic_wo_chain:v4f32 5937:iPTR, VR128:v4f32:$src1, (imm:i32):$src2)  =>  (ROUNDPSr:v4f32 VR128:v4f32:$src1, (imm:i32):$src2)
    2447             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROUNDPSr,
    2448             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2449             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2450             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2451             :       GIR_EraseFromParent, /*InsnID*/0,
    2452             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2453             :       GIR_Done,
    2454             :     // Label 61: @4579
    2455             :     GIM_Try, /*On fail goto*//*Label 62*/ 4648,
    2456             :       GIM_CheckFeatures, GIFBS_UseSSE41,
    2457             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2458             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2459             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2460             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2461             :       // MIs[0] dst
    2462             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2463             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2464             :       // MIs[0] Operand 1
    2465             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_round_pd,
    2466             :       // MIs[0] src1
    2467             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2468             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2469             :       // MIs[0] src2
    2470             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2471             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2472             :       // MIs[1] Operand 0
    2473             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2474             :       // MIs[1] Operand 1
    2475             :       // No operand predicates
    2476             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2477             :       // (intrinsic_wo_chain:v2f64 5936:iPTR, VR128:v2f64:$src1, (imm:i32):$src2)  =>  (ROUNDPDr:v2f64 VR128:v2f64:$src1, (imm:i32):$src2)
    2478             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROUNDPDr,
    2479             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2480             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2481             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2482             :       GIR_EraseFromParent, /*InsnID*/0,
    2483             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2484             :       GIR_Done,
    2485             :     // Label 62: @4648
    2486             :     GIM_Try, /*On fail goto*//*Label 63*/ 4717,
    2487             :       GIM_CheckFeatures, GIFBS_HasAVX_HasAES,
    2488             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2489             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2490             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2491             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2492             :       // MIs[0] dst
    2493             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2495             :       // MIs[0] Operand 1
    2496             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist,
    2497             :       // MIs[0] src1
    2498             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2499             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2500             :       // MIs[0] src2
    2501             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8,
    2502             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2503             :       // MIs[1] Operand 0
    2504             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    2505             :       // MIs[1] Operand 1
    2506             :       // No operand predicates
    2507             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2508             :       // (intrinsic_wo_chain:v2i64 4666:iPTR, VR128:v2i64:$src1, (imm:i8):$src2)  =>  (VAESKEYGENASSIST128rr:v2i64 VR128:v2i64:$src1, (imm:i8):$src2)
    2509             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESKEYGENASSIST128rr,
    2510             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2511             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2512             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2513             :       GIR_EraseFromParent, /*InsnID*/0,
    2514             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2515             :       GIR_Done,
    2516             :     // Label 63: @4717
    2517             :     GIM_Try, /*On fail goto*//*Label 64*/ 4786,
    2518             :       GIM_CheckFeatures, GIFBS_HasAES,
    2519             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2520             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2521             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2522             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2523             :       // MIs[0] dst
    2524             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2525             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2526             :       // MIs[0] Operand 1
    2527             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist,
    2528             :       // MIs[0] src1
    2529             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2530             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2531             :       // MIs[0] src2
    2532             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8,
    2533             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2534             :       // MIs[1] Operand 0
    2535             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    2536             :       // MIs[1] Operand 1
    2537             :       // No operand predicates
    2538             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2539             :       // (intrinsic_wo_chain:v2i64 4666:iPTR, VR128:v2i64:$src1, (imm:i8):$src2)  =>  (AESKEYGENASSIST128rr:v2i64 VR128:v2i64:$src1, (imm:i8):$src2)
    2540             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESKEYGENASSIST128rr,
    2541             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2542             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2543             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2544             :       GIR_EraseFromParent, /*InsnID*/0,
    2545             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2546             :       GIR_Done,
    2547             :     // Label 64: @4786
    2548             :     GIM_Try, /*On fail goto*//*Label 65*/ 4855,
    2549             :       GIM_CheckFeatures, GIFBS_HasF16C,
    2550             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2551             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2552             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2553             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2554             :       // MIs[0] dst
    2555             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    2556             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2557             :       // MIs[0] Operand 1
    2558             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtps2ph_128,
    2559             :       // MIs[0] src1
    2560             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2561             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2562             :       // MIs[0] src2
    2563             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2564             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2565             :       // MIs[1] Operand 0
    2566             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2567             :       // MIs[1] Operand 1
    2568             :       // No operand predicates
    2569             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2570             :       // (intrinsic_wo_chain:v8i16 5995:iPTR, VR128:v4f32:$src1, (imm:i32):$src2)  =>  (VCVTPS2PHrr:v8i16 VR128:v4f32:$src1, (imm:i32):$src2)
    2571             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTPS2PHrr,
    2572             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2573             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2574             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2575             :       GIR_EraseFromParent, /*InsnID*/0,
    2576             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2577             :       GIR_Done,
    2578             :     // Label 65: @4855
    2579             :     GIM_Try, /*On fail goto*//*Label 66*/ 4924,
    2580             :       GIM_CheckFeatures, GIFBS_HasF16C,
    2581             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2582             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
    2583             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    2584             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2585             :       // MIs[0] dst
    2586             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    2587             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2588             :       // MIs[0] Operand 1
    2589             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtps2ph_256,
    2590             :       // MIs[0] src1
    2591             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    2592             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    2593             :       // MIs[0] src2
    2594             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2595             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    2596             :       // MIs[1] Operand 0
    2597             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    2598             :       // MIs[1] Operand 1
    2599             :       // No operand predicates
    2600             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    2601             :       // (intrinsic_wo_chain:v8i16 5996:iPTR, VR256:v8f32:$src1, (imm:i32):$src2)  =>  (VCVTPS2PHYrr:v8i16 VR256:v8f32:$src1, (imm:i32):$src2)
    2602             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTPS2PHYrr,
    2603             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2604             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2605             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    2606             :       GIR_EraseFromParent, /*InsnID*/0,
    2607             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2608             :       GIR_Done,
    2609             :     // Label 66: @4924
    2610             :     GIM_Try, /*On fail goto*//*Label 67*/ 4982,
    2611             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    2612             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2613             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2614             :       // MIs[0] dst
    2615             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2616             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    2617             :       // MIs[0] Operand 1
    2618             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_32,
    2619             :       // MIs[0] src1
    2620             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    2621             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    2622             :       // MIs[0] src2
    2623             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    2625             :       // (intrinsic_wo_chain:i32 5648:iPTR, GR32:i32:$src1, GR32:i32:$src2)  =>  (PDEP32rr:i32 GR32:i32:$src1, GR32:i32:$src2)
    2626             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP32rr,
    2627             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2629             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2630             :       GIR_EraseFromParent, /*InsnID*/0,
    2631             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2632             :       GIR_Done,
    2633             :     // Label 67: @4982
    2634             :     GIM_Try, /*On fail goto*//*Label 68*/ 5040,
    2635             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    2636             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2637             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2638             :       // MIs[0] dst
    2639             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2640             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    2641             :       // MIs[0] Operand 1
    2642             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_64,
    2643             :       // MIs[0] src1
    2644             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2645             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    2646             :       // MIs[0] src2
    2647             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2648             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    2649             :       // (intrinsic_wo_chain:i64 5649:iPTR, GR64:i64:$src1, GR64:i64:$src2)  =>  (PDEP64rr:i64 GR64:i64:$src1, GR64:i64:$src2)
    2650             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP64rr,
    2651             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2652             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2653             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2654             :       GIR_EraseFromParent, /*InsnID*/0,
    2655             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2656             :       GIR_Done,
    2657             :     // Label 68: @5040
    2658             :     GIM_Try, /*On fail goto*//*Label 69*/ 5098,
    2659             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    2660             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2661             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2662             :       // MIs[0] dst
    2663             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    2664             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    2665             :       // MIs[0] Operand 1
    2666             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_32,
    2667             :       // MIs[0] src1
    2668             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    2669             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    2670             :       // MIs[0] src2
    2671             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2672             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    2673             :       // (intrinsic_wo_chain:i32 5650:iPTR, GR32:i32:$src1, GR32:i32:$src2)  =>  (PEXT32rr:i32 GR32:i32:$src1, GR32:i32:$src2)
    2674             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT32rr,
    2675             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2676             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2677             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2678             :       GIR_EraseFromParent, /*InsnID*/0,
    2679             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2680             :       GIR_Done,
    2681             :     // Label 69: @5098
    2682             :     GIM_Try, /*On fail goto*//*Label 70*/ 5156,
    2683             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    2684             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2685             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2686             :       // MIs[0] dst
    2687             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    2688             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    2689             :       // MIs[0] Operand 1
    2690             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_64,
    2691             :       // MIs[0] src1
    2692             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    2693             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    2694             :       // MIs[0] src2
    2695             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2696             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    2697             :       // (intrinsic_wo_chain:i64 5651:iPTR, GR64:i64:$src1, GR64:i64:$src2)  =>  (PEXT64rr:i64 GR64:i64:$src1, GR64:i64:$src2)
    2698             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT64rr,
    2699             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2700             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2701             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2702             :       GIR_EraseFromParent, /*InsnID*/0,
    2703             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2704             :       GIR_Done,
    2705             :     // Label 70: @5156
    2706             :     GIM_Try, /*On fail goto*//*Label 71*/ 5214,
    2707             :       GIM_CheckFeatures, GIFBS_UseAVX,
    2708             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2709             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2710             :       // MIs[0] dst
    2711             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2712             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2713             :       // MIs[0] Operand 1
    2714             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtsi2ss,
    2715             :       // MIs[0] src1
    2716             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2717             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2718             :       // MIs[0] src2
    2719             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2720             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    2721             :       // (intrinsic_wo_chain:v4f32 5812:iPTR, VR128:v4f32:$src1, GR32:i32:$src2)  =>  (Int_VCVTSI2SSrr:v4f32 VR128:v4f32:$src1, GR32:i32:$src2)
    2722             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTSI2SSrr,
    2723             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2724             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2725             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2726             :       GIR_EraseFromParent, /*InsnID*/0,
    2727             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2728             :       GIR_Done,
    2729             :     // Label 71: @5214
    2730             :     GIM_Try, /*On fail goto*//*Label 72*/ 5272,
    2731             :       GIM_CheckFeatures, GIFBS_UseAVX,
    2732             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2733             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2734             :       // MIs[0] dst
    2735             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2736             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2737             :       // MIs[0] Operand 1
    2738             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtsi642ss,
    2739             :       // MIs[0] src1
    2740             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2741             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2742             :       // MIs[0] src2
    2743             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2744             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    2745             :       // (intrinsic_wo_chain:v4f32 5813:iPTR, VR128:v4f32:$src1, GR64:i64:$src2)  =>  (Int_VCVTSI2SS64rr:v4f32 VR128:v4f32:$src1, GR64:i64:$src2)
    2746             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTSI2SS64rr,
    2747             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2748             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2749             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2750             :       GIR_EraseFromParent, /*InsnID*/0,
    2751             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2752             :       GIR_Done,
    2753             :     // Label 72: @5272
    2754             :     GIM_Try, /*On fail goto*//*Label 73*/ 5330,
    2755             :       GIM_CheckFeatures, GIFBS_UseAVX,
    2756             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2757             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2758             :       // MIs[0] dst
    2759             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2760             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2761             :       // MIs[0] Operand 1
    2762             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsi2sd,
    2763             :       // MIs[0] src1
    2764             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2765             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2766             :       // MIs[0] src2
    2767             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    2769             :       // (intrinsic_wo_chain:v2f64 5857:iPTR, VR128:v2f64:$src1, GR32:i32:$src2)  =>  (Int_VCVTSI2SDrr:v2f64 VR128:v2f64:$src1, GR32:i32:$src2)
    2770             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTSI2SDrr,
    2771             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2772             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2773             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2774             :       GIR_EraseFromParent, /*InsnID*/0,
    2775             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2776             :       GIR_Done,
    2777             :     // Label 73: @5330
    2778             :     GIM_Try, /*On fail goto*//*Label 74*/ 5388,
    2779             :       GIM_CheckFeatures, GIFBS_UseAVX,
    2780             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2781             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2782             :       // MIs[0] dst
    2783             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2784             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2785             :       // MIs[0] Operand 1
    2786             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsi642sd,
    2787             :       // MIs[0] src1
    2788             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2789             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2790             :       // MIs[0] src2
    2791             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2792             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    2793             :       // (intrinsic_wo_chain:v2f64 5858:iPTR, VR128:v2f64:$src1, GR64:i64:$src2)  =>  (Int_VCVTSI2SD64rr:v2f64 VR128:v2f64:$src1, GR64:i64:$src2)
    2794             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTSI2SD64rr,
    2795             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2796             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2797             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2798             :       GIR_EraseFromParent, /*InsnID*/0,
    2799             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2800             :       GIR_Done,
    2801             :     // Label 74: @5388
    2802             :     GIM_Try, /*On fail goto*//*Label 75*/ 5446,
    2803             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    2804             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2805             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2806             :       // MIs[0] dst
    2807             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2808             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2809             :       // MIs[0] Operand 1
    2810             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtsi2ss,
    2811             :       // MIs[0] src1
    2812             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2813             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2814             :       // MIs[0] src2
    2815             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    2817             :       // (intrinsic_wo_chain:v4f32 5812:iPTR, VR128:v4f32:$src1, GR32:i32:$src2)  =>  (Int_CVTSI2SSrr:v4f32 VR128:v4f32:$src1, GR32:i32:$src2)
    2818             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTSI2SSrr,
    2819             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2820             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2821             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2822             :       GIR_EraseFromParent, /*InsnID*/0,
    2823             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2824             :       GIR_Done,
    2825             :     // Label 75: @5446
    2826             :     GIM_Try, /*On fail goto*//*Label 76*/ 5504,
    2827             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    2828             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2829             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2830             :       // MIs[0] dst
    2831             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2832             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2833             :       // MIs[0] Operand 1
    2834             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtsi642ss,
    2835             :       // MIs[0] src1
    2836             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2837             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2838             :       // MIs[0] src2
    2839             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    2841             :       // (intrinsic_wo_chain:v4f32 5813:iPTR, VR128:v4f32:$src1, GR64:i64:$src2)  =>  (Int_CVTSI2SS64rr:v4f32 VR128:v4f32:$src1, GR64:i64:$src2)
    2842             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTSI2SS64rr,
    2843             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2844             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2845             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2846             :       GIR_EraseFromParent, /*InsnID*/0,
    2847             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2848             :       GIR_Done,
    2849             :     // Label 76: @5504
    2850             :     GIM_Try, /*On fail goto*//*Label 77*/ 5562,
    2851             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    2852             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2853             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2854             :       // MIs[0] dst
    2855             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2856             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2857             :       // MIs[0] Operand 1
    2858             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsi2sd,
    2859             :       // MIs[0] src1
    2860             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2861             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2862             :       // MIs[0] src2
    2863             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    2864             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    2865             :       // (intrinsic_wo_chain:v2f64 5857:iPTR, VR128:v2f64:$src1, GR32:i32:$src2)  =>  (Int_CVTSI2SDrr:v2f64 VR128:v2f64:$src1, GR32:i32:$src2)
    2866             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTSI2SDrr,
    2867             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2868             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2869             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2870             :       GIR_EraseFromParent, /*InsnID*/0,
    2871             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2872             :       GIR_Done,
    2873             :     // Label 77: @5562
    2874             :     GIM_Try, /*On fail goto*//*Label 78*/ 5620,
    2875             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    2876             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2877             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2878             :       // MIs[0] dst
    2879             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2881             :       // MIs[0] Operand 1
    2882             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsi642sd,
    2883             :       // MIs[0] src1
    2884             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2885             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2886             :       // MIs[0] src2
    2887             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    2888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    2889             :       // (intrinsic_wo_chain:v2f64 5858:iPTR, VR128:v2f64:$src1, GR64:i64:$src2)  =>  (Int_CVTSI2SD64rr:v2f64 VR128:v2f64:$src1, GR64:i64:$src2)
    2890             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTSI2SD64rr,
    2891             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2892             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2893             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2894             :       GIR_EraseFromParent, /*InsnID*/0,
    2895             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2896             :       GIR_Done,
    2897             :     // Label 78: @5620
    2898             :     GIM_Try, /*On fail goto*//*Label 79*/ 5678,
    2899             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2900             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2901             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2902             :       // MIs[0] dst
    2903             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2904             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2905             :       // MIs[0] Operand 1
    2906             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2ss,
    2907             :       // MIs[0] src1
    2908             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2909             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2910             :       // MIs[0] src2
    2911             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2912             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2913             :       // (intrinsic_wo_chain:v4f32 5856:iPTR, VR128:v4f32:$src1, VR128:v2f64:$src2)  =>  (Int_VCVTSD2SSrr:v4f32 VR128:v4f32:$src1, VR128:v2f64:$src2)
    2914             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTSD2SSrr,
    2915             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2916             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2917             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2918             :       GIR_EraseFromParent, /*InsnID*/0,
    2919             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2920             :       GIR_Done,
    2921             :     // Label 79: @5678
    2922             :     GIM_Try, /*On fail goto*//*Label 80*/ 5736,
    2923             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    2924             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2925             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2926             :       // MIs[0] dst
    2927             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    2928             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2929             :       // MIs[0] Operand 1
    2930             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2ss,
    2931             :       // MIs[0] src1
    2932             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    2933             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2934             :       // MIs[0] src2
    2935             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    2936             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2937             :       // (intrinsic_wo_chain:v4f32 5856:iPTR, VR128:v4f32:$src1, VR128:v2f64:$src2)  =>  (Int_CVTSD2SSrr:v4f32 VR128:v4f32:$src1, VR128:v2f64:$src2)
    2938             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTSD2SSrr,
    2939             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2940             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2941             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2942             :       GIR_EraseFromParent, /*InsnID*/0,
    2943             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2944             :       GIR_Done,
    2945             :     // Label 80: @5736
    2946             :     GIM_Try, /*On fail goto*//*Label 81*/ 5794,
    2947             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2948             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2949             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2950             :       // MIs[0] dst
    2951             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2952             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2953             :       // MIs[0] Operand 1
    2954             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtss2sd,
    2955             :       // MIs[0] src1
    2956             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2957             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2958             :       // MIs[0] src2
    2959             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2961             :       // (intrinsic_wo_chain:v2f64 5859:iPTR, VR128:v2f64:$src1, VR128:v4f32:$src2)  =>  (Int_VCVTSS2SDrr:v2f64 VR128:v2f64:$src1, VR128:v4f32:$src2)
    2962             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTSS2SDrr,
    2963             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2964             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2965             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2966             :       GIR_EraseFromParent, /*InsnID*/0,
    2967             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2968             :       GIR_Done,
    2969             :     // Label 81: @5794
    2970             :     GIM_Try, /*On fail goto*//*Label 82*/ 5852,
    2971             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    2972             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2973             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2974             :       // MIs[0] dst
    2975             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    2976             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    2977             :       // MIs[0] Operand 1
    2978             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtss2sd,
    2979             :       // MIs[0] src1
    2980             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    2981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    2982             :       // MIs[0] src2
    2983             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    2984             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    2985             :       // (intrinsic_wo_chain:v2f64 5859:iPTR, VR128:v2f64:$src1, VR128:v4f32:$src2)  =>  (Int_CVTSS2SDrr:v2f64 VR128:v2f64:$src1, VR128:v4f32:$src2)
    2986             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTSS2SDrr,
    2987             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    2988             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    2989             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    2990             :       GIR_EraseFromParent, /*InsnID*/0,
    2991             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    2992             :       GIR_Done,
    2993             :     // Label 82: @5852
    2994             :     GIM_Try, /*On fail goto*//*Label 83*/ 5910,
    2995             :       GIM_CheckFeatures, GIFBS_HasAVX,
    2996             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    2997             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    2998             :       // MIs[0] dst
    2999             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    3000             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3001             :       // MIs[0] Operand 1
    3002             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128,
    3003             :       // MIs[0] src1
    3004             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    3005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3006             :       // MIs[0] src2
    3007             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    3008             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3009             :       // (intrinsic_wo_chain:v16i8 5984:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2)  =>  (VPSIGNBrr128:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2)
    3010             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBrr128,
    3011             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3012             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3013             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3014             :       GIR_EraseFromParent, /*InsnID*/0,
    3015             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3016             :       GIR_Done,
    3017             :     // Label 83: @5910
    3018             :     GIM_Try, /*On fail goto*//*Label 84*/ 5968,
    3019             :       GIM_CheckFeatures, GIFBS_HasAVX,
    3020             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3021             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3022             :       // MIs[0] dst
    3023             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3024             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3025             :       // MIs[0] Operand 1
    3026             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128,
    3027             :       // MIs[0] src1
    3028             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3029             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3030             :       // MIs[0] src2
    3031             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    3032             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3033             :       // (intrinsic_wo_chain:v8i16 5988:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (VPSIGNWrr128:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    3034             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWrr128,
    3035             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3036             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3037             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3038             :       GIR_EraseFromParent, /*InsnID*/0,
    3039             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3040             :       GIR_Done,
    3041             :     // Label 84: @5968
    3042             :     GIM_Try, /*On fail goto*//*Label 85*/ 6026,
    3043             :       GIM_CheckFeatures, GIFBS_HasAVX,
    3044             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3045             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3046             :       // MIs[0] dst
    3047             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3048             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3049             :       // MIs[0] Operand 1
    3050             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128,
    3051             :       // MIs[0] src1
    3052             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3053             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3054             :       // MIs[0] src2
    3055             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3056             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3057             :       // (intrinsic_wo_chain:v4i32 5986:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (VPSIGNDrr128:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3058             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDrr128,
    3059             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3060             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3061             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3062             :       GIR_EraseFromParent, /*InsnID*/0,
    3063             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3064             :       GIR_Done,
    3065             :     // Label 85: @6026
    3066             :     GIM_Try, /*On fail goto*//*Label 86*/ 6084,
    3067             :       GIM_CheckFeatures, GIFBS_HasAVX,
    3068             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3069             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3070             :       // MIs[0] dst
    3071             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3072             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3073             :       // MIs[0] Operand 1
    3074             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128,
    3075             :       // MIs[0] src1
    3076             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3077             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3078             :       // MIs[0] src2
    3079             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    3080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3081             :       // (intrinsic_wo_chain:v8i16 5968:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (VPHADDSWrr128:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    3082             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWrr128,
    3083             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3084             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3085             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3086             :       GIR_EraseFromParent, /*InsnID*/0,
    3087             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3088             :       GIR_Done,
    3089             :     // Label 86: @6084
    3090             :     GIM_Try, /*On fail goto*//*Label 87*/ 6142,
    3091             :       GIM_CheckFeatures, GIFBS_HasAVX,
    3092             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3093             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3094             :       // MIs[0] dst
    3095             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3096             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3097             :       // MIs[0] Operand 1
    3098             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128,
    3099             :       // MIs[0] src1
    3100             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3101             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3102             :       // MIs[0] src2
    3103             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    3104             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3105             :       // (intrinsic_wo_chain:v8i16 5974:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (VPHSUBSWrr128:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    3106             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWrr128,
    3107             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3108             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3109             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3110             :       GIR_EraseFromParent, /*InsnID*/0,
    3111             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3112             :       GIR_Done,
    3113             :     // Label 87: @6142
    3114             :     GIM_Try, /*On fail goto*//*Label 88*/ 6200,
    3115             :       GIM_CheckFeatures, GIFBS_HasAVX2,
    3116             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3117             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3118             :       // MIs[0] dst
    3119             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8,
    3120             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    3121             :       // MIs[0] Operand 1
    3122             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_b,
    3123             :       // MIs[0] src1
    3124             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
    3125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    3126             :       // MIs[0] src2
    3127             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8,
    3128             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    3129             :       // (intrinsic_wo_chain:v32i8 4781:iPTR, VR256:v32i8:$src1, VR256:v32i8:$src2)  =>  (VPSIGNBYrr256:v32i8 VR256:v32i8:$src1, VR256:v32i8:$src2)
    3130             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBYrr256,
    3131             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3132             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3133             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3134             :       GIR_EraseFromParent, /*InsnID*/0,
    3135             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3136             :       GIR_Done,
    3137             :     // Label 88: @6200
    3138             :     GIM_Try, /*On fail goto*//*Label 89*/ 6258,
    3139             :       GIM_CheckFeatures, GIFBS_HasAVX2,
    3140             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3141             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3142             :       // MIs[0] dst
    3143             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
    3144             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    3145             :       // MIs[0] Operand 1
    3146             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_w,
    3147             :       // MIs[0] src1
    3148             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
    3149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    3150             :       // MIs[0] src2
    3151             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16,
    3152             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    3153             :       // (intrinsic_wo_chain:v16i16 4783:iPTR, VR256:v16i16:$src1, VR256:v16i16:$src2)  =>  (VPSIGNWYrr256:v16i16 VR256:v16i16:$src1, VR256:v16i16:$src2)
    3154             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWYrr256,
    3155             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3156             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3157             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3158             :       GIR_EraseFromParent, /*InsnID*/0,
    3159             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3160             :       GIR_Done,
    3161             :     // Label 89: @6258
    3162             :     GIM_Try, /*On fail goto*//*Label 90*/ 6316,
    3163             :       GIM_CheckFeatures, GIFBS_HasAVX2,
    3164             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3165             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3166             :       // MIs[0] dst
    3167             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    3168             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    3169             :       // MIs[0] Operand 1
    3170             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_d,
    3171             :       // MIs[0] src1
    3172             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    3173             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    3174             :       // MIs[0] src2
    3175             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32,
    3176             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    3177             :       // (intrinsic_wo_chain:v8i32 4782:iPTR, VR256:v8i32:$src1, VR256:v8i32:$src2)  =>  (VPSIGNDYrr256:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)
    3178             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDYrr256,
    3179             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3180             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3181             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3182             :       GIR_EraseFromParent, /*InsnID*/0,
    3183             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3184             :       GIR_Done,
    3185             :     // Label 90: @6316
    3186             :     GIM_Try, /*On fail goto*//*Label 91*/ 6374,
    3187             :       GIM_CheckFeatures, GIFBS_HasAVX2,
    3188             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3189             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3190             :       // MIs[0] dst
    3191             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
    3192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    3193             :       // MIs[0] Operand 1
    3194             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phadd_sw,
    3195             :       // MIs[0] src1
    3196             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
    3197             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    3198             :       // MIs[0] src2
    3199             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16,
    3200             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    3201             :       // (intrinsic_wo_chain:v16i16 4766:iPTR, VR256:v16i16:$src1, VR256:v16i16:$src2)  =>  (VPHADDSWrr256:v16i16 VR256:v16i16:$src1, VR256:v16i16:$src2)
    3202             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWrr256,
    3203             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3204             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3205             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3206             :       GIR_EraseFromParent, /*InsnID*/0,
    3207             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3208             :       GIR_Done,
    3209             :     // Label 91: @6374
    3210             :     GIM_Try, /*On fail goto*//*Label 92*/ 6432,
    3211             :       GIM_CheckFeatures, GIFBS_HasAVX2,
    3212             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3213             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3214             :       // MIs[0] dst
    3215             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
    3216             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    3217             :       // MIs[0] Operand 1
    3218             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phsub_sw,
    3219             :       // MIs[0] src1
    3220             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
    3221             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    3222             :       // MIs[0] src2
    3223             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16,
    3224             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
    3225             :       // (intrinsic_wo_chain:v16i16 4769:iPTR, VR256:v16i16:$src1, VR256:v16i16:$src2)  =>  (VPHSUBSWrr256:v16i16 VR256:v16i16:$src1, VR256:v16i16:$src2)
    3226             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWrr256,
    3227             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3228             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3229             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3230             :       GIR_EraseFromParent, /*InsnID*/0,
    3231             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3232             :       GIR_Done,
    3233             :     // Label 92: @6432
    3234             :     GIM_Try, /*On fail goto*//*Label 93*/ 6490,
    3235             :       GIM_CheckFeatures, GIFBS_UseSSSE3,
    3236             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3237             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3238             :       // MIs[0] dst
    3239             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    3240             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3241             :       // MIs[0] Operand 1
    3242             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128,
    3243             :       // MIs[0] src1
    3244             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    3245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3246             :       // MIs[0] src2
    3247             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    3248             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3249             :       // (intrinsic_wo_chain:v16i8 5984:iPTR, VR128:v16i8:$src1, VR128:v16i8:$src2)  =>  (PSIGNBrr128:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2)
    3250             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNBrr128,
    3251             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3252             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3253             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3254             :       GIR_EraseFromParent, /*InsnID*/0,
    3255             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3256             :       GIR_Done,
    3257             :     // Label 93: @6490
    3258             :     GIM_Try, /*On fail goto*//*Label 94*/ 6548,
    3259             :       GIM_CheckFeatures, GIFBS_UseSSSE3,
    3260             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3261             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3262             :       // MIs[0] dst
    3263             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3264             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3265             :       // MIs[0] Operand 1
    3266             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128,
    3267             :       // MIs[0] src1
    3268             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3269             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3270             :       // MIs[0] src2
    3271             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    3272             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3273             :       // (intrinsic_wo_chain:v8i16 5988:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (PSIGNWrr128:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    3274             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNWrr128,
    3275             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3276             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3277             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3278             :       GIR_EraseFromParent, /*InsnID*/0,
    3279             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3280             :       GIR_Done,
    3281             :     // Label 94: @6548
    3282             :     GIM_Try, /*On fail goto*//*Label 95*/ 6606,
    3283             :       GIM_CheckFeatures, GIFBS_UseSSSE3,
    3284             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3285             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3286             :       // MIs[0] dst
    3287             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3289             :       // MIs[0] Operand 1
    3290             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128,
    3291             :       // MIs[0] src1
    3292             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3293             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3294             :       // MIs[0] src2
    3295             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3296             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3297             :       // (intrinsic_wo_chain:v4i32 5986:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (PSIGNDrr128:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3298             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNDrr128,
    3299             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3300             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3301             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3302             :       GIR_EraseFromParent, /*InsnID*/0,
    3303             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3304             :       GIR_Done,
    3305             :     // Label 95: @6606
    3306             :     GIM_Try, /*On fail goto*//*Label 96*/ 6664,
    3307             :       GIM_CheckFeatures, GIFBS_UseSSSE3,
    3308             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3309             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3310             :       // MIs[0] dst
    3311             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3312             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3313             :       // MIs[0] Operand 1
    3314             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128,
    3315             :       // MIs[0] src1
    3316             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3317             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3318             :       // MIs[0] src2
    3319             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    3320             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3321             :       // (intrinsic_wo_chain:v8i16 5968:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (PHADDSWrr128:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    3322             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHADDSWrr128,
    3323             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3324             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3325             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3326             :       GIR_EraseFromParent, /*InsnID*/0,
    3327             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3328             :       GIR_Done,
    3329             :     // Label 96: @6664
    3330             :     GIM_Try, /*On fail goto*//*Label 97*/ 6722,
    3331             :       GIM_CheckFeatures, GIFBS_UseSSSE3,
    3332             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3333             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3334             :       // MIs[0] dst
    3335             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3336             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3337             :       // MIs[0] Operand 1
    3338             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128,
    3339             :       // MIs[0] src1
    3340             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3341             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3342             :       // MIs[0] src2
    3343             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
    3344             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3345             :       // (intrinsic_wo_chain:v8i16 5974:iPTR, VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (PHSUBSWrr128:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    3346             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHSUBSWrr128,
    3347             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3349             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3350             :       GIR_EraseFromParent, /*InsnID*/0,
    3351             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3352             :       GIR_Done,
    3353             :     // Label 97: @6722
    3354             :     GIM_Try, /*On fail goto*//*Label 98*/ 6780,
    3355             :       GIM_CheckFeatures, GIFBS_HasSSE42,
    3356             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3357             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3358             :       // MIs[0] dst
    3359             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    3360             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    3361             :       // MIs[0] Operand 1
    3362             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_8,
    3363             :       // MIs[0] src1
    3364             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    3365             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    3366             :       // MIs[0] src2
    3367             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8,
    3368             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8RegClassID,
    3369             :       // (intrinsic_wo_chain:i32 5942:iPTR, GR32:i32:$src1, GR8:i8:$src2)  =>  (CRC32r32r8:i32 GR32:i32:$src1, GR8:i8:$src2)
    3370             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r8,
    3371             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3372             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3373             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3374             :       GIR_EraseFromParent, /*InsnID*/0,
    3375             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3376             :       GIR_Done,
    3377             :     // Label 98: @6780
    3378             :     GIM_Try, /*On fail goto*//*Label 99*/ 6838,
    3379             :       GIM_CheckFeatures, GIFBS_HasSSE42,
    3380             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3381             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3382             :       // MIs[0] dst
    3383             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    3384             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    3385             :       // MIs[0] Operand 1
    3386             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_16,
    3387             :       // MIs[0] src1
    3388             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    3389             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    3390             :       // MIs[0] src2
    3391             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
    3392             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR16RegClassID,
    3393             :       // (intrinsic_wo_chain:i32 5940:iPTR, GR32:i32:$src1, GR16:i16:$src2)  =>  (CRC32r32r16:i32 GR32:i32:$src1, GR16:i16:$src2)
    3394             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r16,
    3395             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3396             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3397             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3398             :       GIR_EraseFromParent, /*InsnID*/0,
    3399             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3400             :       GIR_Done,
    3401             :     // Label 99: @6838
    3402             :     GIM_Try, /*On fail goto*//*Label 100*/ 6896,
    3403             :       GIM_CheckFeatures, GIFBS_HasSSE42,
    3404             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3405             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3406             :       // MIs[0] dst
    3407             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    3408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    3409             :       // MIs[0] Operand 1
    3410             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_32,
    3411             :       // MIs[0] src1
    3412             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    3413             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    3414             :       // MIs[0] src2
    3415             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3416             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    3417             :       // (intrinsic_wo_chain:i32 5941:iPTR, GR32:i32:$src1, GR32:i32:$src2)  =>  (CRC32r32r32:i32 GR32:i32:$src1, GR32:i32:$src2)
    3418             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r32,
    3419             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3420             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3421             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3422             :       GIR_EraseFromParent, /*InsnID*/0,
    3423             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3424             :       GIR_Done,
    3425             :     // Label 100: @6896
    3426             :     GIM_Try, /*On fail goto*//*Label 101*/ 6954,
    3427             :       GIM_CheckFeatures, GIFBS_HasSSE42,
    3428             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3429             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3430             :       // MIs[0] dst
    3431             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    3432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    3433             :       // MIs[0] Operand 1
    3434             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_64_64,
    3435             :       // MIs[0] src1
    3436             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    3437             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    3438             :       // MIs[0] src2
    3439             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    3440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    3441             :       // (intrinsic_wo_chain:i64 5943:iPTR, GR64:i64:$src1, GR64:i64:$src2)  =>  (CRC32r64r64:i64 GR64:i64:$src1, GR64:i64:$src2)
    3442             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r64r64,
    3443             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3444             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3445             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3446             :       GIR_EraseFromParent, /*InsnID*/0,
    3447             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3448             :       GIR_Done,
    3449             :     // Label 101: @6954
    3450             :     GIM_Try, /*On fail goto*//*Label 102*/ 7012,
    3451             :       GIM_CheckFeatures, GIFBS_HasSHA,
    3452             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3453             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3454             :       // MIs[0] dst
    3455             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3456             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3457             :       // MIs[0] Operand 1
    3458             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1nexte,
    3459             :       // MIs[0] src1
    3460             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3462             :       // MIs[0] src2
    3463             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3464             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3465             :       // (intrinsic_wo_chain:v4i32 5794:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (SHA1NEXTErr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3466             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1NEXTErr,
    3467             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3468             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3469             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3470             :       GIR_EraseFromParent, /*InsnID*/0,
    3471             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3472             :       GIR_Done,
    3473             :     // Label 102: @7012
    3474             :     GIM_Try, /*On fail goto*//*Label 103*/ 7070,
    3475             :       GIM_CheckFeatures, GIFBS_HasSHA,
    3476             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3477             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3478             :       // MIs[0] dst
    3479             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3480             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3481             :       // MIs[0] Operand 1
    3482             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg1,
    3483             :       // MIs[0] src1
    3484             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3485             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3486             :       // MIs[0] src2
    3487             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3488             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3489             :       // (intrinsic_wo_chain:v4i32 5792:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (SHA1MSG1rr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3490             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG1rr,
    3491             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3492             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3493             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3494             :       GIR_EraseFromParent, /*InsnID*/0,
    3495             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3496             :       GIR_Done,
    3497             :     // Label 103: @7070
    3498             :     GIM_Try, /*On fail goto*//*Label 104*/ 7128,
    3499             :       GIM_CheckFeatures, GIFBS_HasSHA,
    3500             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3501             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3502             :       // MIs[0] dst
    3503             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3504             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3505             :       // MIs[0] Operand 1
    3506             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg2,
    3507             :       // MIs[0] src1
    3508             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3509             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3510             :       // MIs[0] src2
    3511             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3512             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3513             :       // (intrinsic_wo_chain:v4i32 5793:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (SHA1MSG2rr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3514             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG2rr,
    3515             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3516             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3517             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3518             :       GIR_EraseFromParent, /*InsnID*/0,
    3519             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3520             :       GIR_Done,
    3521             :     // Label 104: @7128
    3522             :     GIM_Try, /*On fail goto*//*Label 105*/ 7186,
    3523             :       GIM_CheckFeatures, GIFBS_HasSHA,
    3524             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3525             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3526             :       // MIs[0] dst
    3527             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3528             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3529             :       // MIs[0] Operand 1
    3530             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg1,
    3531             :       // MIs[0] src1
    3532             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3533             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3534             :       // MIs[0] src2
    3535             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3536             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3537             :       // (intrinsic_wo_chain:v4i32 5796:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (SHA256MSG1rr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3538             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG1rr,
    3539             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3540             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3541             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3542             :       GIR_EraseFromParent, /*InsnID*/0,
    3543             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3544             :       GIR_Done,
    3545             :     // Label 105: @7186
    3546             :     GIM_Try, /*On fail goto*//*Label 106*/ 7244,
    3547             :       GIM_CheckFeatures, GIFBS_HasSHA,
    3548             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3549             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3550             :       // MIs[0] dst
    3551             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3553             :       // MIs[0] Operand 1
    3554             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg2,
    3555             :       // MIs[0] src1
    3556             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3557             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3558             :       // MIs[0] src2
    3559             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
    3560             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3561             :       // (intrinsic_wo_chain:v4i32 5797:iPTR, VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (SHA256MSG2rr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    3562             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG2rr,
    3563             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3564             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3565             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3566             :       GIR_EraseFromParent, /*InsnID*/0,
    3567             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3568             :       GIR_Done,
    3569             :     // Label 106: @7244
    3570             :     GIM_Try, /*On fail goto*//*Label 107*/ 7302,
    3571             :       GIM_CheckFeatures, GIFBS_HasAVX_HasAES,
    3572             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3573             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3574             :       // MIs[0] dst
    3575             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3576             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3577             :       // MIs[0] Operand 1
    3578             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc,
    3579             :       // MIs[0] src1
    3580             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3581             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3582             :       // MIs[0] src2
    3583             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3584             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3585             :       // (intrinsic_wo_chain:v2i64 4663:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VAESENCrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3586             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCrr,
    3587             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3589             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3590             :       GIR_EraseFromParent, /*InsnID*/0,
    3591             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3592             :       GIR_Done,
    3593             :     // Label 107: @7302
    3594             :     GIM_Try, /*On fail goto*//*Label 108*/ 7360,
    3595             :       GIM_CheckFeatures, GIFBS_HasAVX_HasAES,
    3596             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3597             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3598             :       // MIs[0] dst
    3599             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3600             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3601             :       // MIs[0] Operand 1
    3602             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast,
    3603             :       // MIs[0] src1
    3604             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3606             :       // MIs[0] src2
    3607             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3609             :       // (intrinsic_wo_chain:v2i64 4664:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VAESENCLASTrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3610             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTrr,
    3611             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3612             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3613             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3614             :       GIR_EraseFromParent, /*InsnID*/0,
    3615             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3616             :       GIR_Done,
    3617             :     // Label 108: @7360
    3618             :     GIM_Try, /*On fail goto*//*Label 109*/ 7418,
    3619             :       GIM_CheckFeatures, GIFBS_HasAVX_HasAES,
    3620             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3621             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3622             :       // MIs[0] dst
    3623             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3624             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3625             :       // MIs[0] Operand 1
    3626             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec,
    3627             :       // MIs[0] src1
    3628             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3629             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3630             :       // MIs[0] src2
    3631             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3632             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3633             :       // (intrinsic_wo_chain:v2i64 4661:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VAESDECrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3634             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECrr,
    3635             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3636             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3637             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3638             :       GIR_EraseFromParent, /*InsnID*/0,
    3639             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3640             :       GIR_Done,
    3641             :     // Label 109: @7418
    3642             :     GIM_Try, /*On fail goto*//*Label 110*/ 7476,
    3643             :       GIM_CheckFeatures, GIFBS_HasAVX_HasAES,
    3644             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3645             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3646             :       // MIs[0] dst
    3647             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3648             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3649             :       // MIs[0] Operand 1
    3650             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast,
    3651             :       // MIs[0] src1
    3652             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3653             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3654             :       // MIs[0] src2
    3655             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3656             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3657             :       // (intrinsic_wo_chain:v2i64 4662:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VAESDECLASTrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3658             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTrr,
    3659             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3660             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3661             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3662             :       GIR_EraseFromParent, /*InsnID*/0,
    3663             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3664             :       GIR_Done,
    3665             :     // Label 110: @7476
    3666             :     GIM_Try, /*On fail goto*//*Label 111*/ 7534,
    3667             :       GIM_CheckFeatures, GIFBS_HasAES,
    3668             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3669             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3670             :       // MIs[0] dst
    3671             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3672             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3673             :       // MIs[0] Operand 1
    3674             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc,
    3675             :       // MIs[0] src1
    3676             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3677             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3678             :       // MIs[0] src2
    3679             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3680             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3681             :       // (intrinsic_wo_chain:v2i64 4663:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (AESENCrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3682             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCrr,
    3683             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3684             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3685             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3686             :       GIR_EraseFromParent, /*InsnID*/0,
    3687             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3688             :       GIR_Done,
    3689             :     // Label 111: @7534
    3690             :     GIM_Try, /*On fail goto*//*Label 112*/ 7592,
    3691             :       GIM_CheckFeatures, GIFBS_HasAES,
    3692             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3693             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3694             :       // MIs[0] dst
    3695             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3696             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3697             :       // MIs[0] Operand 1
    3698             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast,
    3699             :       // MIs[0] src1
    3700             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3701             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3702             :       // MIs[0] src2
    3703             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3704             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3705             :       // (intrinsic_wo_chain:v2i64 4664:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (AESENCLASTrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3706             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCLASTrr,
    3707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3709             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3710             :       GIR_EraseFromParent, /*InsnID*/0,
    3711             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3712             :       GIR_Done,
    3713             :     // Label 112: @7592
    3714             :     GIM_Try, /*On fail goto*//*Label 113*/ 7650,
    3715             :       GIM_CheckFeatures, GIFBS_HasAES,
    3716             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3717             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3718             :       // MIs[0] dst
    3719             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3720             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3721             :       // MIs[0] Operand 1
    3722             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec,
    3723             :       // MIs[0] src1
    3724             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3725             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3726             :       // MIs[0] src2
    3727             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3728             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3729             :       // (intrinsic_wo_chain:v2i64 4661:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (AESDECrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3730             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECrr,
    3731             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3732             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3733             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3734             :       GIR_EraseFromParent, /*InsnID*/0,
    3735             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3736             :       GIR_Done,
    3737             :     // Label 113: @7650
    3738             :     GIM_Try, /*On fail goto*//*Label 114*/ 7708,
    3739             :       GIM_CheckFeatures, GIFBS_HasAES,
    3740             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3741             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3742             :       // MIs[0] dst
    3743             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3744             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3745             :       // MIs[0] Operand 1
    3746             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast,
    3747             :       // MIs[0] src1
    3748             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3749             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3750             :       // MIs[0] src2
    3751             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3753             :       // (intrinsic_wo_chain:v2i64 4662:iPTR, VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (AESDECLASTrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    3754             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECLASTrr,
    3755             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3756             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3757             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3758             :       GIR_EraseFromParent, /*InsnID*/0,
    3759             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3760             :       GIR_Done,
    3761             :     // Label 114: @7708
    3762             :     GIM_Try, /*On fail goto*//*Label 115*/ 7766,
    3763             :       GIM_CheckFeatures, GIFBS_HasSSE4A,
    3764             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3765             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3766             :       // MIs[0] dst
    3767             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3769             :       // MIs[0] Operand 1
    3770             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_extrq,
    3771             :       // MIs[0] src
    3772             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3773             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3774             :       // MIs[0] mask
    3775             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
    3776             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3777             :       // (intrinsic_wo_chain:v2i64 5958:iPTR, VR128:v2i64:$src, VR128:v16i8:$mask)  =>  (EXTRQ:v2i64 VR128:v2i64:$src, VR128:v16i8:$mask)
    3778             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::EXTRQ,
    3779             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3780             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    3781             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask
    3782             :       GIR_EraseFromParent, /*InsnID*/0,
    3783             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3784             :       GIR_Done,
    3785             :     // Label 115: @7766
    3786             :     GIM_Try, /*On fail goto*//*Label 116*/ 7824,
    3787             :       GIM_CheckFeatures, GIFBS_HasSSE4A,
    3788             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3789             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3790             :       // MIs[0] dst
    3791             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3792             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3793             :       // MIs[0] Operand 1
    3794             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_insertq,
    3795             :       // MIs[0] src
    3796             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3797             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3798             :       // MIs[0] mask
    3799             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
    3800             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
    3801             :       // (intrinsic_wo_chain:v2i64 5960:iPTR, VR128:v2i64:$src, VR128:v2i64:$mask)  =>  (INSERTQ:v2i64 VR128:v2i64:$src, VR128:v2i64:$mask)
    3802             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INSERTQ,
    3803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3804             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    3805             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask
    3806             :       GIR_EraseFromParent, /*InsnID*/0,
    3807             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3808             :       GIR_Done,
    3809             :     // Label 116: @7824
    3810             :     GIM_Try, /*On fail goto*//*Label 117*/ 7882,
    3811             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    3812             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3813             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3814             :       // MIs[0] dst
    3815             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    3817             :       // MIs[0] Operand 1
    3818             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtsi2ss,
    3819             :       // MIs[0] src1
    3820             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3821             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    3822             :       // MIs[0] src2
    3823             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    3825             :       // (intrinsic_wo_chain:v4f32 5812:iPTR, VR128X:v4f32:$src1, GR32:i32:$src2)  =>  (VCVTSI2SSZrr_Int:v4f32 VR128X:v4f32:$src1, GR32:i32:$src2)
    3826             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSZrr_Int,
    3827             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3828             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3829             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3830             :       GIR_EraseFromParent, /*InsnID*/0,
    3831             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3832             :       GIR_Done,
    3833             :     // Label 117: @7882
    3834             :     GIM_Try, /*On fail goto*//*Label 118*/ 7940,
    3835             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    3836             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3837             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3838             :       // MIs[0] dst
    3839             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    3841             :       // MIs[0] Operand 1
    3842             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtsi642ss,
    3843             :       // MIs[0] src1
    3844             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3845             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    3846             :       // MIs[0] src2
    3847             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    3848             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    3849             :       // (intrinsic_wo_chain:v4f32 5813:iPTR, VR128X:v4f32:$src1, GR64:i64:$src2)  =>  (VCVTSI642SSZrr_Int:v4f32 VR128X:v4f32:$src1, GR64:i64:$src2)
    3850             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSZrr_Int,
    3851             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3852             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3853             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3854             :       GIR_EraseFromParent, /*InsnID*/0,
    3855             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3856             :       GIR_Done,
    3857             :     // Label 118: @7940
    3858             :     GIM_Try, /*On fail goto*//*Label 119*/ 7998,
    3859             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    3860             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3861             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3862             :       // MIs[0] dst
    3863             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3864             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    3865             :       // MIs[0] Operand 1
    3866             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsi2sd,
    3867             :       // MIs[0] src1
    3868             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3869             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    3870             :       // MIs[0] src2
    3871             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3872             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    3873             :       // (intrinsic_wo_chain:v2f64 5857:iPTR, VR128X:v2f64:$src1, GR32:i32:$src2)  =>  (VCVTSI2SDZrr_Int:v2f64 VR128X:v2f64:$src1, GR32:i32:$src2)
    3874             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDZrr_Int,
    3875             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3876             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3877             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3878             :       GIR_EraseFromParent, /*InsnID*/0,
    3879             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3880             :       GIR_Done,
    3881             :     // Label 119: @7998
    3882             :     GIM_Try, /*On fail goto*//*Label 120*/ 8056,
    3883             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    3884             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3885             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3886             :       // MIs[0] dst
    3887             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3888             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    3889             :       // MIs[0] Operand 1
    3890             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsi642sd,
    3891             :       // MIs[0] src1
    3892             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3893             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    3894             :       // MIs[0] src2
    3895             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
    3896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
    3897             :       // (intrinsic_wo_chain:v2f64 5858:iPTR, VR128X:v2f64:$src1, GR64:i64:$src2)  =>  (VCVTSI642SDZrr_Int:v2f64 VR128X:v2f64:$src1, GR64:i64:$src2)
    3898             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDZrr_Int,
    3899             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3900             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3901             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3902             :       GIR_EraseFromParent, /*InsnID*/0,
    3903             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3904             :       GIR_Done,
    3905             :     // Label 120: @8056
    3906             :     GIM_Try, /*On fail goto*//*Label 121*/ 8114,
    3907             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    3908             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
    3909             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    3910             :       // MIs[0] dst
    3911             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    3912             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    3913             :       // MIs[0] Operand 1
    3914             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx512_cvtusi2sd,
    3915             :       // MIs[0] src1
    3916             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    3917             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    3918             :       // MIs[0] src2
    3919             :       GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
    3920             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
    3921             :       // (intrinsic_wo_chain:v2f64 4841:iPTR, VR128X:v2f64:$src1, GR32:i32:$src2)  =>  (VCVTUSI2SDZrr_Int:v2f64 VR128X:v2f64:$src1, GR32:i32:$src2)
    3922             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SDZrr_Int,
    3923             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3924             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    3925             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
    3926             :       GIR_EraseFromParent, /*InsnID*/0,
    3927             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3928             :       GIR_Done,
    3929             :     // Label 121: @8114
    3930             :     GIM_Try, /*On fail goto*//*Label 122*/ 8200,
    3931             :       GIM_CheckFeatures, GIFBS_HasXOP,
    3932             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    3933             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3934             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3935             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    3936             :       // MIs[0] dst
    3937             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    3938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3939             :       // MIs[0] Operand 1
    3940             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    3941             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3942             :       // MIs[1] Operand 0
    3943             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8s16,
    3944             :       // MIs[1] src1
    3945             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    3946             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
    3947             :       // MIs[1] src2
    3948             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    3949             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3950             :       // MIs[0] src3
    3951             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    3952             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3953             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3954             :       // (add:v8i16 (mul:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2), VR128:v8i16:$src3)  =>  (VPMACSWWrr:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v8i16:$src3)
    3955             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr,
    3956             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3957             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    3958             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
    3959             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3
    3960             :       GIR_EraseFromParent, /*InsnID*/0,
    3961             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3962             :       GIR_Done,
    3963             :     // Label 122: @8200
    3964             :     GIM_Try, /*On fail goto*//*Label 123*/ 8286,
    3965             :       GIM_CheckFeatures, GIFBS_HasXOP,
    3966             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    3967             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    3968             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    3969             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    3970             :       // MIs[0] dst
    3971             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    3972             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    3973             :       // MIs[0] Operand 1
    3974             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    3975             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    3976             :       // MIs[1] Operand 0
    3977             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    3978             :       // MIs[1] src1
    3979             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    3980             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
    3981             :       // MIs[1] src2
    3982             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    3983             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3984             :       // MIs[0] src3
    3985             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    3986             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    3987             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    3988             :       // (add:v4i32 (mul:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2), VR128:v4i32:$src3)  =>  (VPMACSDDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v4i32:$src3)
    3989             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr,
    3990             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    3991             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    3992             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
    3993             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3
    3994             :       GIR_EraseFromParent, /*InsnID*/0,
    3995             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    3996             :       GIR_Done,
    3997             :     // Label 123: @8286
    3998             :     GIM_Try, /*On fail goto*//*Label 124*/ 8372,
    3999             :       GIM_CheckFeatures, GIFBS_HasXOP,
    4000             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4001             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4002             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    4003             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4004             :       // MIs[0] dst
    4005             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    4006             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4007             :       // MIs[0] src3
    4008             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4009             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4010             :       // MIs[0] Operand 2
    4011             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4012             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4013             :       // MIs[1] Operand 0
    4014             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v8s16,
    4015             :       // MIs[1] src1
    4016             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
    4017             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4018             :       // MIs[1] src2
    4019             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
    4020             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4021             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4022             :       // (add:v8i16 VR128:v8i16:$src3, (mul:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2))  =>  (VPMACSWWrr:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2, VR128:v8i16:$src3)
    4023             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr,
    4024             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4025             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    4026             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
    4027             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3
    4028             :       GIR_EraseFromParent, /*InsnID*/0,
    4029             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4030             :       GIR_Done,
    4031             :     // Label 124: @8372
    4032             :     GIM_Try, /*On fail goto*//*Label 125*/ 8458,
    4033             :       GIM_CheckFeatures, GIFBS_HasXOP,
    4034             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4035             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4036             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    4037             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4038             :       // MIs[0] dst
    4039             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    4040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4041             :       // MIs[0] src3
    4042             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4043             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4044             :       // MIs[0] Operand 2
    4045             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4046             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
    4047             :       // MIs[1] Operand 0
    4048             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_v4s32,
    4049             :       // MIs[1] src1
    4050             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
    4051             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4052             :       // MIs[1] src2
    4053             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
    4054             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4055             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4056             :       // (add:v4i32 VR128:v4i32:$src3, (mul:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2))  =>  (VPMACSDDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2, VR128:v4i32:$src3)
    4057             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr,
    4058             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4059             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    4060             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
    4061             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3
    4062             :       GIR_EraseFromParent, /*InsnID*/0,
    4063             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4064             :       GIR_Done,
    4065             :     // Label 125: @8458
    4066             :     GIM_Try, /*On fail goto*//*Label 126*/ 8508,
    4067             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4068             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4069             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4070             :       // MIs[0] dst
    4071             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    4072             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    4073             :       // MIs[0] src
    4074             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    4075             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    4076             :       // MIs[0] Operand 2
    4077             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    4078             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    4079             :       // (add:i8 GR8:i8:$src, 1:i8)  =>  (INC8r:i8:i32 GR8:i8:$src)
    4080             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r,
    4081             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4082             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4083             :       GIR_EraseFromParent, /*InsnID*/0,
    4084             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4085             :       GIR_Done,
    4086             :     // Label 126: @8508
    4087             :     GIM_Try, /*On fail goto*//*Label 127*/ 8558,
    4088             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4089             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4090             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4091             :       // MIs[0] dst
    4092             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    4093             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    4094             :       // MIs[0] src
    4095             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    4096             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    4097             :       // MIs[0] Operand 2
    4098             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    4099             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    4100             :       // (add:i16 GR16:i16:$src, 1:i16)  =>  (INC16r:i16:i32 GR16:i16:$src)
    4101             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r,
    4102             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4103             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4104             :       GIR_EraseFromParent, /*InsnID*/0,
    4105             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4106             :       GIR_Done,
    4107             :     // Label 127: @8558
    4108             :     GIM_Try, /*On fail goto*//*Label 128*/ 8608,
    4109             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4110             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4111             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4112             :       // MIs[0] dst
    4113             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    4115             :       // MIs[0] src
    4116             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4117             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    4118             :       // MIs[0] Operand 2
    4119             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4120             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    4121             :       // (add:i32 GR32:i32:$src, 1:i32)  =>  (INC32r:i32:i32 GR32:i32:$src)
    4122             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r,
    4123             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4124             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4125             :       GIR_EraseFromParent, /*InsnID*/0,
    4126             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4127             :       GIR_Done,
    4128             :     // Label 128: @8608
    4129             :     GIM_Try, /*On fail goto*//*Label 129*/ 8658,
    4130             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4131             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4132             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4133             :       // MIs[0] dst
    4134             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4135             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    4136             :       // MIs[0] src
    4137             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4138             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    4139             :       // MIs[0] Operand 2
    4140             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4141             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    4142             :       // (add:i64 GR64:i64:$src, 1:i64)  =>  (INC64r:i64:i32 GR64:i64:$src)
    4143             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC64r,
    4144             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4145             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4146             :       GIR_EraseFromParent, /*InsnID*/0,
    4147             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4148             :       GIR_Done,
    4149             :     // Label 129: @8658
    4150             :     GIM_Try, /*On fail goto*//*Label 130*/ 8708,
    4151             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4152             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4153             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4154             :       // MIs[0] dst
    4155             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    4156             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    4157             :       // MIs[0] src
    4158             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    4159             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    4160             :       // MIs[0] Operand 2
    4161             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    4162             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    4163             :       // (add:i8 GR8:i8:$src, -1:i8)  =>  (DEC8r:i8:i32 GR8:i8:$src)
    4164             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r,
    4165             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4166             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4167             :       GIR_EraseFromParent, /*InsnID*/0,
    4168             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4169             :       GIR_Done,
    4170             :     // Label 130: @8708
    4171             :     GIM_Try, /*On fail goto*//*Label 131*/ 8758,
    4172             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4173             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4174             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4175             :       // MIs[0] dst
    4176             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    4177             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    4178             :       // MIs[0] src
    4179             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    4180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    4181             :       // MIs[0] Operand 2
    4182             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    4183             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    4184             :       // (add:i16 GR16:i16:$src, -1:i16)  =>  (DEC16r:i16:i32 GR16:i16:$src)
    4185             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r,
    4186             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4187             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4188             :       GIR_EraseFromParent, /*InsnID*/0,
    4189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4190             :       GIR_Done,
    4191             :     // Label 131: @8758
    4192             :     GIM_Try, /*On fail goto*//*Label 132*/ 8808,
    4193             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4194             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4195             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4196             :       // MIs[0] dst
    4197             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4198             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    4199             :       // MIs[0] src
    4200             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4201             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    4202             :       // MIs[0] Operand 2
    4203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4204             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    4205             :       // (add:i32 GR32:i32:$src, -1:i32)  =>  (DEC32r:i32:i32 GR32:i32:$src)
    4206             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC32r,
    4207             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4208             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4209             :       GIR_EraseFromParent, /*InsnID*/0,
    4210             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4211             :       GIR_Done,
    4212             :     // Label 132: @8808
    4213             :     GIM_Try, /*On fail goto*//*Label 133*/ 8858,
    4214             :       GIM_CheckFeatures, GIFBS_UseIncDec,
    4215             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4216             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4217             :       // MIs[0] dst
    4218             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    4220             :       // MIs[0] src
    4221             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4222             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    4223             :       // MIs[0] Operand 2
    4224             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4225             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
    4226             :       // (add:i64 GR64:i64:$src, -1:i64)  =>  (DEC64r:i64:i32 GR64:i64:$src)
    4227             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r,
    4228             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4229             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    4230             :       GIR_EraseFromParent, /*InsnID*/0,
    4231             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4232             :       GIR_Done,
    4233             :     // Label 133: @8858
    4234             :     GIM_Try, /*On fail goto*//*Label 134*/ 8921,
    4235             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4236             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4237             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4238             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4239             :       // MIs[0] dst
    4240             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    4241             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    4242             :       // MIs[0] src1
    4243             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    4244             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    4245             :       // MIs[0] src2
    4246             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    4247             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4248             :       // MIs[1] Operand 0
    4249             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    4250             :       // MIs[1] Operand 1
    4251             :       // No operand predicates
    4252             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4253             :       // (add:i8 GR8:i8:$src1, (imm:i8):$src2)  =>  (ADD8ri:i8:i32 GR8:i8:$src1, (imm:i8):$src2)
    4254             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri,
    4255             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4256             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4257             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4258             :       GIR_EraseFromParent, /*InsnID*/0,
    4259             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4260             :       GIR_Done,
    4261             :     // Label 134: @8921
    4262             :     GIM_Try, /*On fail goto*//*Label 135*/ 8984,
    4263             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4264             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4265             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4266             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4267             :       // MIs[0] dst
    4268             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    4269             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    4270             :       // MIs[0] src1
    4271             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    4272             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    4273             :       // MIs[0] src2
    4274             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    4275             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4276             :       // MIs[1] Operand 0
    4277             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s16,
    4278             :       // MIs[1] Operand 1
    4279             :       // No operand predicates
    4280             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4281             :       // (add:i16 GR16:i16:$src1, (imm:i16):$src2)  =>  (ADD16ri:i16:i32 GR16:i16:$src1, (imm:i16):$src2)
    4282             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri,
    4283             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4284             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4285             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4286             :       GIR_EraseFromParent, /*InsnID*/0,
    4287             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4288             :       GIR_Done,
    4289             :     // Label 135: @8984
    4290             :     GIM_Try, /*On fail goto*//*Label 136*/ 9047,
    4291             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4292             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4293             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4294             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4295             :       // MIs[0] dst
    4296             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4297             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    4298             :       // MIs[0] src1
    4299             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4300             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    4301             :       // MIs[0] src2
    4302             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4303             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4304             :       // MIs[1] Operand 0
    4305             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4306             :       // MIs[1] Operand 1
    4307             :       // No operand predicates
    4308             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4309             :       // (add:i32 GR32:i32:$src1, (imm:i32):$src2)  =>  (ADD32ri:i32:i32 GR32:i32:$src1, (imm:i32):$src2)
    4310             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri,
    4311             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4312             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4313             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4314             :       GIR_EraseFromParent, /*InsnID*/0,
    4315             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4316             :       GIR_Done,
    4317             :     // Label 136: @9047
    4318             :     GIM_Try, /*On fail goto*//*Label 137*/ 9113,
    4319             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4320             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4321             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4322             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4323             :       // MIs[0] dst
    4324             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    4325             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    4326             :       // MIs[0] src1
    4327             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    4328             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    4329             :       // MIs[0] src2
    4330             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    4331             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4332             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i16immSExt8,
    4333             :       // MIs[1] Operand 0
    4334             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s16,
    4335             :       // MIs[1] Operand 1
    4336             :       // No operand predicates
    4337             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4338             :       // (add:i16 GR16:i16:$src1, (imm:i16)<<P:Predicate_i16immSExt8>>:$src2)  =>  (ADD16ri8:i16:i32 GR16:i16:$src1, (imm:i16)<<P:Predicate_i16immSExt8>>:$src2)
    4339             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8,
    4340             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4341             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4342             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4343             :       GIR_EraseFromParent, /*InsnID*/0,
    4344             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4345             :       GIR_Done,
    4346             :     // Label 137: @9113
    4347             :     GIM_Try, /*On fail goto*//*Label 138*/ 9179,
    4348             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4349             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4350             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4351             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4352             :       // MIs[0] dst
    4353             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4354             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    4355             :       // MIs[0] src1
    4356             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4357             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    4358             :       // MIs[0] src2
    4359             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4360             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4361             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i32immSExt8,
    4362             :       // MIs[1] Operand 0
    4363             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    4364             :       // MIs[1] Operand 1
    4365             :       // No operand predicates
    4366             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4367             :       // (add:i32 GR32:i32:$src1, (imm:i32)<<P:Predicate_i32immSExt8>>:$src2)  =>  (ADD32ri8:i32:i32 GR32:i32:$src1, (imm:i32)<<P:Predicate_i32immSExt8>>:$src2)
    4368             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri8,
    4369             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4370             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4371             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4372             :       GIR_EraseFromParent, /*InsnID*/0,
    4373             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4374             :       GIR_Done,
    4375             :     // Label 138: @9179
    4376             :     GIM_Try, /*On fail goto*//*Label 139*/ 9245,
    4377             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4378             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4379             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4380             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4381             :       // MIs[0] dst
    4382             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    4384             :       // MIs[0] src1
    4385             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4386             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    4387             :       // MIs[0] src2
    4388             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4389             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4390             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i64immSExt8,
    4391             :       // MIs[1] Operand 0
    4392             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    4393             :       // MIs[1] Operand 1
    4394             :       // No operand predicates
    4395             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4396             :       // (add:i64 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt8>>:$src2)  =>  (ADD64ri8:i64:i32 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt8>>:$src2)
    4397             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri8,
    4398             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4399             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4400             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4401             :       GIR_EraseFromParent, /*InsnID*/0,
    4402             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4403             :       GIR_Done,
    4404             :     // Label 139: @9245
    4405             :     GIM_Try, /*On fail goto*//*Label 140*/ 9311,
    4406             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4407             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    4408             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    4409             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4410             :       // MIs[0] dst
    4411             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4412             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    4413             :       // MIs[0] src1
    4414             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    4415             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    4416             :       // MIs[0] src2
    4417             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    4418             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    4419             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i64immSExt32,
    4420             :       // MIs[1] Operand 0
    4421             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    4422             :       // MIs[1] Operand 1
    4423             :       // No operand predicates
    4424             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    4425             :       // (add:i64 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt32>>:$src2)  =>  (ADD64ri32:i64:i32 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt32>>:$src2)
    4426             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri32,
    4427             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    4428             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    4429             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    4430             :       GIR_EraseFromParent, /*InsnID*/0,
    4431             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4432             :       GIR_Done,
    4433             :     // Label 140: @9311
    4434             :     GIM_Try, /*On fail goto*//*Label 141*/ 9352,
    4435             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
    4436             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4437             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4438             :       // MIs[0] dst
    4439             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    4440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4441             :       // MIs[0] src1
    4442             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4443             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4444             :       // MIs[0] src2
    4445             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4446             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4447             :       // (add:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2)  =>  (VPADDBrr:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2)
    4448             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBrr,
    4449             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4450             :       GIR_Done,
    4451             :     // Label 141: @9352
    4452             :     GIM_Try, /*On fail goto*//*Label 142*/ 9393,
    4453             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    4454             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4455             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4456             :       // MIs[0] dst
    4457             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    4458             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4459             :       // MIs[0] src1
    4460             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4461             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4462             :       // MIs[0] src2
    4463             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4464             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4465             :       // (add:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2)  =>  (PADDBrr:v16i8 VR128:v16i8:$src1, VR128:v16i8:$src2)
    4466             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDBrr,
    4467             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4468             :       GIR_Done,
    4469             :     // Label 142: @9393
    4470             :     GIM_Try, /*On fail goto*//*Label 143*/ 9434,
    4471             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
    4472             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4473             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4474             :       // MIs[0] dst
    4475             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8,
    4476             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    4477             :       // MIs[0] src1
    4478             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8,
    4479             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    4480             :       // MIs[0] src2
    4481             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
    4482             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    4483             :       // (add:v32i8 VR256:v32i8:$src1, VR256:v32i8:$src2)  =>  (VPADDBYrr:v32i8 VR256:v32i8:$src1, VR256:v32i8:$src2)
    4484             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBYrr,
    4485             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4486             :       GIR_Done,
    4487             :     // Label 143: @9434
    4488             :     GIM_Try, /*On fail goto*//*Label 144*/ 9475,
    4489             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
    4490             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4491             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4492             :       // MIs[0] dst
    4493             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    4494             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4495             :       // MIs[0] src1
    4496             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4497             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4498             :       // MIs[0] src2
    4499             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4500             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4501             :       // (add:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (VPADDWrr:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    4502             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWrr,
    4503             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4504             :       GIR_Done,
    4505             :     // Label 144: @9475
    4506             :     GIM_Try, /*On fail goto*//*Label 145*/ 9516,
    4507             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    4508             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4509             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4510             :       // MIs[0] dst
    4511             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    4512             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4513             :       // MIs[0] src1
    4514             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4515             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4516             :       // MIs[0] src2
    4517             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4518             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4519             :       // (add:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)  =>  (PADDWrr:v8i16 VR128:v8i16:$src1, VR128:v8i16:$src2)
    4520             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDWrr,
    4521             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4522             :       GIR_Done,
    4523             :     // Label 145: @9516
    4524             :     GIM_Try, /*On fail goto*//*Label 146*/ 9557,
    4525             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
    4526             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4527             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4528             :       // MIs[0] dst
    4529             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
    4530             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    4531             :       // MIs[0] src1
    4532             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
    4533             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    4534             :       // MIs[0] src2
    4535             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
    4536             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    4537             :       // (add:v16i16 VR256:v16i16:$src1, VR256:v16i16:$src2)  =>  (VPADDWYrr:v16i16 VR256:v16i16:$src1, VR256:v16i16:$src2)
    4538             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWYrr,
    4539             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4540             :       GIR_Done,
    4541             :     // Label 146: @9557
    4542             :     GIM_Try, /*On fail goto*//*Label 147*/ 9598,
    4543             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    4544             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4545             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4546             :       // MIs[0] dst
    4547             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    4548             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4549             :       // MIs[0] src1
    4550             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4551             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4552             :       // MIs[0] src2
    4553             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4554             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4555             :       // (add:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (VPADDDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    4556             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDrr,
    4557             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4558             :       GIR_Done,
    4559             :     // Label 147: @9598
    4560             :     GIM_Try, /*On fail goto*//*Label 148*/ 9639,
    4561             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    4562             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4563             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4564             :       // MIs[0] dst
    4565             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    4566             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4567             :       // MIs[0] src1
    4568             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4569             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4570             :       // MIs[0] src2
    4571             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4572             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4573             :       // (add:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (PADDDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    4574             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDDrr,
    4575             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4576             :       GIR_Done,
    4577             :     // Label 148: @9639
    4578             :     GIM_Try, /*On fail goto*//*Label 149*/ 9680,
    4579             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    4580             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4581             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4582             :       // MIs[0] dst
    4583             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    4584             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    4585             :       // MIs[0] src1
    4586             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    4587             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    4588             :       // MIs[0] src2
    4589             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    4590             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    4591             :       // (add:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)  =>  (VPADDDYrr:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)
    4592             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDYrr,
    4593             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4594             :       GIR_Done,
    4595             :     // Label 149: @9680
    4596             :     GIM_Try, /*On fail goto*//*Label 150*/ 9721,
    4597             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    4598             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4599             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4600             :       // MIs[0] dst
    4601             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    4602             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4603             :       // MIs[0] src1
    4604             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    4605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4606             :       // MIs[0] src2
    4607             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4609             :       // (add:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VPADDQrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    4610             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQrr,
    4611             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4612             :       GIR_Done,
    4613             :     // Label 150: @9721
    4614             :     GIM_Try, /*On fail goto*//*Label 151*/ 9762,
    4615             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    4616             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4617             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4618             :       // MIs[0] dst
    4619             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    4620             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    4621             :       // MIs[0] src1
    4622             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    4623             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    4624             :       // MIs[0] src2
    4625             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4626             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    4627             :       // (add:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (PADDQrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    4628             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDQrr,
    4629             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4630             :       GIR_Done,
    4631             :     // Label 151: @9762
    4632             :     GIM_Try, /*On fail goto*//*Label 152*/ 9803,
    4633             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    4634             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4635             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4636             :       // MIs[0] dst
    4637             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    4638             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    4639             :       // MIs[0] src1
    4640             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    4641             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    4642             :       // MIs[0] src2
    4643             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    4644             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    4645             :       // (add:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)  =>  (VPADDQYrr:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)
    4646             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQYrr,
    4647             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4648             :       GIR_Done,
    4649             :     // Label 152: @9803
    4650             :     GIM_Try, /*On fail goto*//*Label 153*/ 9844,
    4651             :       GIM_CheckFeatures, GIFBS_HasDQI,
    4652             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4653             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4654             :       // MIs[0] dst
    4655             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s1,
    4656             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID,
    4657             :       // MIs[0] src1
    4658             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
    4659             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
    4660             :       // MIs[0] src2
    4661             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1,
    4662             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID,
    4663             :       // (add:v8i1 VK8:v8i1:$src1, VK8:v8i1:$src2)  =>  (KADDBrr:v8i1 VK8:v8i1:$src1, VK8:v8i1:$src2)
    4664             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KADDBrr,
    4665             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4666             :       GIR_Done,
    4667             :     // Label 153: @9844
    4668             :     GIM_Try, /*On fail goto*//*Label 154*/ 9885,
    4669             :       GIM_CheckFeatures, GIFBS_HasDQI,
    4670             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4671             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4672             :       // MIs[0] dst
    4673             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s1,
    4674             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID,
    4675             :       // MIs[0] src1
    4676             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
    4677             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
    4678             :       // MIs[0] src2
    4679             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1,
    4680             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID,
    4681             :       // (add:v16i1 VK16:v16i1:$src1, VK16:v16i1:$src2)  =>  (KADDWrr:v16i1 VK16:v16i1:$src1, VK16:v16i1:$src2)
    4682             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KADDWrr,
    4683             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4684             :       GIR_Done,
    4685             :     // Label 154: @9885
    4686             :     GIM_Try, /*On fail goto*//*Label 155*/ 9926,
    4687             :       GIM_CheckFeatures, GIFBS_HasBWI,
    4688             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4689             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4690             :       // MIs[0] dst
    4691             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s1,
    4692             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID,
    4693             :       // MIs[0] src1
    4694             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
    4695             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
    4696             :       // MIs[0] src2
    4697             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1,
    4698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID,
    4699             :       // (add:v32i1 VK32:v32i1:$src1, VK32:v32i1:$src2)  =>  (KADDDrr:v32i1 VK32:v32i1:$src1, VK32:v32i1:$src2)
    4700             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KADDDrr,
    4701             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4702             :       GIR_Done,
    4703             :     // Label 155: @9926
    4704             :     GIM_Try, /*On fail goto*//*Label 156*/ 9967,
    4705             :       GIM_CheckFeatures, GIFBS_HasBWI,
    4706             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4707             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4708             :       // MIs[0] dst
    4709             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v64s1,
    4710             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID,
    4711             :       // MIs[0] src1
    4712             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
    4713             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
    4714             :       // MIs[0] src2
    4715             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1,
    4716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID,
    4717             :       // (add:v64i1 VK64:v64i1:$src1, VK64:v64i1:$src2)  =>  (KADDQrr:v64i1 VK64:v64i1:$src1, VK64:v64i1:$src2)
    4718             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KADDQrr,
    4719             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4720             :       GIR_Done,
    4721             :     // Label 156: @9967
    4722             :     GIM_Try, /*On fail goto*//*Label 157*/ 10008,
    4723             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    4724             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4725             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4726             :       // MIs[0] dst
    4727             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    4728             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    4729             :       // MIs[0] src1
    4730             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    4731             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    4732             :       // MIs[0] src2
    4733             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    4734             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    4735             :       // (add:v8i64 VR512:v8i64:$src1, VR512:v8i64:$src2)  =>  (VPADDQZrr:v8i64 VR512:v8i64:$src1, VR512:v8i64:$src2)
    4736             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZrr,
    4737             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4738             :       GIR_Done,
    4739             :     // Label 157: @10008
    4740             :     GIM_Try, /*On fail goto*//*Label 158*/ 10049,
    4741             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    4742             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4743             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4744             :       // MIs[0] dst
    4745             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    4746             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    4747             :       // MIs[0] src1
    4748             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    4749             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    4750             :       // MIs[0] src2
    4751             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    4752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    4753             :       // (add:v4i64 VR256X:v4i64:$src1, VR256X:v4i64:$src2)  =>  (VPADDQZ256rr:v4i64 VR256X:v4i64:$src1, VR256X:v4i64:$src2)
    4754             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ256rr,
    4755             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4756             :       GIR_Done,
    4757             :     // Label 158: @10049
    4758             :     GIM_Try, /*On fail goto*//*Label 159*/ 10090,
    4759             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    4760             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4761             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4762             :       // MIs[0] dst
    4763             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    4764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    4765             :       // MIs[0] src1
    4766             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    4767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    4768             :       // MIs[0] src2
    4769             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    4770             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    4771             :       // (add:v2i64 VR128X:v2i64:$src1, VR128X:v2i64:$src2)  =>  (VPADDQZ128rr:v2i64 VR128X:v2i64:$src1, VR128X:v2i64:$src2)
    4772             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ128rr,
    4773             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4774             :       GIR_Done,
    4775             :     // Label 159: @10090
    4776             :     GIM_Try, /*On fail goto*//*Label 160*/ 10131,
    4777             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    4778             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4779             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4780             :       // MIs[0] dst
    4781             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    4782             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    4783             :       // MIs[0] src1
    4784             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    4785             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    4786             :       // MIs[0] src2
    4787             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    4788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    4789             :       // (add:v16i32 VR512:v16i32:$src1, VR512:v16i32:$src2)  =>  (VPADDDZrr:v16i32 VR512:v16i32:$src1, VR512:v16i32:$src2)
    4790             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZrr,
    4791             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4792             :       GIR_Done,
    4793             :     // Label 160: @10131
    4794             :     GIM_Try, /*On fail goto*//*Label 161*/ 10172,
    4795             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    4796             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4797             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4798             :       // MIs[0] dst
    4799             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    4800             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    4801             :       // MIs[0] src1
    4802             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    4803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    4804             :       // MIs[0] src2
    4805             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    4806             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    4807             :       // (add:v8i32 VR256X:v8i32:$src1, VR256X:v8i32:$src2)  =>  (VPADDDZ256rr:v8i32 VR256X:v8i32:$src1, VR256X:v8i32:$src2)
    4808             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ256rr,
    4809             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4810             :       GIR_Done,
    4811             :     // Label 161: @10172
    4812             :     GIM_Try, /*On fail goto*//*Label 162*/ 10213,
    4813             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    4814             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4815             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4816             :       // MIs[0] dst
    4817             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    4818             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    4819             :       // MIs[0] src1
    4820             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    4821             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    4822             :       // MIs[0] src2
    4823             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    4824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    4825             :       // (add:v4i32 VR128X:v4i32:$src1, VR128X:v4i32:$src2)  =>  (VPADDDZ128rr:v4i32 VR128X:v4i32:$src1, VR128X:v4i32:$src2)
    4826             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ128rr,
    4827             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4828             :       GIR_Done,
    4829             :     // Label 162: @10213
    4830             :     GIM_Try, /*On fail goto*//*Label 163*/ 10254,
    4831             :       GIM_CheckFeatures, GIFBS_HasBWI,
    4832             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4833             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4834             :       // MIs[0] dst
    4835             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s16,
    4836             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    4837             :       // MIs[0] src1
    4838             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
    4839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    4840             :       // MIs[0] src2
    4841             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
    4842             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    4843             :       // (add:v32i16 VR512:v32i16:$src1, VR512:v32i16:$src2)  =>  (VPADDWZrr:v32i16 VR512:v32i16:$src1, VR512:v32i16:$src2)
    4844             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZrr,
    4845             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4846             :       GIR_Done,
    4847             :     // Label 163: @10254
    4848             :     GIM_Try, /*On fail goto*//*Label 164*/ 10295,
    4849             :       GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
    4850             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4851             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4852             :       // MIs[0] dst
    4853             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
    4854             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    4855             :       // MIs[0] src1
    4856             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
    4857             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    4858             :       // MIs[0] src2
    4859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
    4860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    4861             :       // (add:v16i16 VR256X:v16i16:$src1, VR256X:v16i16:$src2)  =>  (VPADDWZ256rr:v16i16 VR256X:v16i16:$src1, VR256X:v16i16:$src2)
    4862             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ256rr,
    4863             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4864             :       GIR_Done,
    4865             :     // Label 164: @10295
    4866             :     GIM_Try, /*On fail goto*//*Label 165*/ 10336,
    4867             :       GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
    4868             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4869             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4870             :       // MIs[0] dst
    4871             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    4872             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    4873             :       // MIs[0] src1
    4874             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    4875             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    4876             :       // MIs[0] src2
    4877             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    4878             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    4879             :       // (add:v8i16 VR128X:v8i16:$src1, VR128X:v8i16:$src2)  =>  (VPADDWZ128rr:v8i16 VR128X:v8i16:$src1, VR128X:v8i16:$src2)
    4880             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ128rr,
    4881             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4882             :       GIR_Done,
    4883             :     // Label 165: @10336
    4884             :     GIM_Try, /*On fail goto*//*Label 166*/ 10377,
    4885             :       GIM_CheckFeatures, GIFBS_HasBWI,
    4886             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4887             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4888             :       // MIs[0] dst
    4889             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v64s8,
    4890             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    4891             :       // MIs[0] src1
    4892             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8,
    4893             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    4894             :       // MIs[0] src2
    4895             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8,
    4896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    4897             :       // (add:v64i8 VR512:v64i8:$src1, VR512:v64i8:$src2)  =>  (VPADDBZrr:v64i8 VR512:v64i8:$src1, VR512:v64i8:$src2)
    4898             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZrr,
    4899             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4900             :       GIR_Done,
    4901             :     // Label 166: @10377
    4902             :     GIM_Try, /*On fail goto*//*Label 167*/ 10418,
    4903             :       GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
    4904             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4905             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4906             :       // MIs[0] dst
    4907             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8,
    4908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    4909             :       // MIs[0] src1
    4910             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8,
    4911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    4912             :       // MIs[0] src2
    4913             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
    4914             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    4915             :       // (add:v32i8 VR256X:v32i8:$src1, VR256X:v32i8:$src2)  =>  (VPADDBZ256rr:v32i8 VR256X:v32i8:$src1, VR256X:v32i8:$src2)
    4916             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ256rr,
    4917             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4918             :       GIR_Done,
    4919             :     // Label 167: @10418
    4920             :     GIM_Try, /*On fail goto*//*Label 168*/ 10459,
    4921             :       GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
    4922             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4923             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4924             :       // MIs[0] dst
    4925             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
    4926             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    4927             :       // MIs[0] src1
    4928             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
    4929             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    4930             :       // MIs[0] src2
    4931             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    4932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    4933             :       // (add:v16i8 VR128X:v16i8:$src1, VR128X:v16i8:$src2)  =>  (VPADDBZ128rr:v16i8 VR128X:v16i8:$src1, VR128X:v16i8:$src2)
    4934             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ128rr,
    4935             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4936             :       GIR_Done,
    4937             :     // Label 168: @10459
    4938             :     GIM_Try, /*On fail goto*//*Label 169*/ 10501,
    4939             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4940             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4941             :       // MIs[0] dst
    4942             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    4943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    4944             :       // MIs[0] src1
    4945             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    4946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    4947             :       // MIs[0] src2
    4948             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    4949             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
    4950             :       // (add:i8 GR8:i8:$src1, GR8:i8:$src2)  =>  (ADD8rr:i8:i32 GR8:i8:$src1, GR8:i8:$src2)
    4951             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD8rr,
    4952             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    4953             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4954             :       GIR_Done,
    4955             :     // Label 169: @10501
    4956             :     GIM_Try, /*On fail goto*//*Label 170*/ 10543,
    4957             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4958             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4959             :       // MIs[0] dst
    4960             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    4961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    4962             :       // MIs[0] src1
    4963             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    4964             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    4965             :       // MIs[0] src2
    4966             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    4967             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
    4968             :       // (add:i16 GR16:i16:$src1, GR16:i16:$src2)  =>  (ADD16rr:i16:i32 GR16:i16:$src1, GR16:i16:$src2)
    4969             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD16rr,
    4970             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    4971             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4972             :       GIR_Done,
    4973             :     // Label 170: @10543
    4974             :     GIM_Try, /*On fail goto*//*Label 171*/ 10585,
    4975             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4976             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4977             :       // MIs[0] dst
    4978             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    4979             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    4980             :       // MIs[0] src1
    4981             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    4982             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    4983             :       // MIs[0] src2
    4984             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    4985             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    4986             :       // (add:i32 GR32:i32:$src1, GR32:i32:$src2)  =>  (ADD32rr:i32:i32 GR32:i32:$src1, GR32:i32:$src2)
    4987             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr,
    4988             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    4989             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    4990             :       GIR_Done,
    4991             :     // Label 171: @10585
    4992             :     GIM_Try, /*On fail goto*//*Label 172*/ 10627,
    4993             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    4994             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ADD,
    4995             :       // MIs[0] dst
    4996             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    4997             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    4998             :       // MIs[0] src1
    4999             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5000             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5001             :       // MIs[0] src2
    5002             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5003             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5004             :       // (add:i64 GR64:i64:$src1, GR64:i64:$src2)  =>  (ADD64rr:i64:i32 GR64:i64:$src1, GR64:i64:$src2)
    5005             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD64rr,
    5006             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    5007             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5008             :       GIR_Done,
    5009             :     // Label 172: @10627
    5010             :     GIM_Try, /*On fail goto*//*Label 173*/ 10733,
    5011             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5012             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5013             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5014             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5015             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5016             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5017             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5018             :       // MIs[0] dst
    5019             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5021             :       // MIs[0] Operand 1
    5022             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5023             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5024             :       // MIs[1] Operand 0
    5025             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5026             :       // MIs[1] src
    5027             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5028             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5029             :       // MIs[1] Operand 2
    5030             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5031             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5032             :       // MIs[0] Operand 2
    5033             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5034             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
    5035             :       // MIs[2] Operand 0
    5036             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s32,
    5037             :       // MIs[2] src
    5038             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    5039             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5040             :       // MIs[2] Operand 2
    5041             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
    5042             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
    5043             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5044             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5045             :       // (and:i32 (xor:i32 GR32:i32:$src, -1:i32), (add:i32 GR32:i32:$src, 1:i32))  =>  (BLCIC32rr:i32:i32 GR32:i32:$src)
    5046             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr,
    5047             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5048             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5049             :       GIR_EraseFromParent, /*InsnID*/0,
    5050             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5051             :       GIR_Done,
    5052             :     // Label 173: @10733
    5053             :     GIM_Try, /*On fail goto*//*Label 174*/ 10839,
    5054             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5055             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5056             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5057             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5058             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5059             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5060             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5061             :       // MIs[0] dst
    5062             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5063             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5064             :       // MIs[0] Operand 1
    5065             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5066             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5067             :       // MIs[1] Operand 0
    5068             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5069             :       // MIs[1] src
    5070             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5071             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5072             :       // MIs[1] Operand 2
    5073             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5074             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5075             :       // MIs[0] Operand 2
    5076             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5077             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
    5078             :       // MIs[2] Operand 0
    5079             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
    5080             :       // MIs[2] src
    5081             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
    5082             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5083             :       // MIs[2] Operand 2
    5084             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
    5085             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
    5086             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5087             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5088             :       // (and:i64 (xor:i64 GR64:i64:$src, -1:i64), (add:i64 GR64:i64:$src, 1:i64))  =>  (BLCIC64rr:i64:i32 GR64:i64:$src)
    5089             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr,
    5090             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5091             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5092             :       GIR_EraseFromParent, /*InsnID*/0,
    5093             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5094             :       GIR_Done,
    5095             :     // Label 174: @10839
    5096             :     GIM_Try, /*On fail goto*//*Label 175*/ 10945,
    5097             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5098             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5099             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5100             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5101             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5102             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5103             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5104             :       // MIs[0] dst
    5105             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5106             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5107             :       // MIs[0] Operand 1
    5108             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5109             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5110             :       // MIs[1] Operand 0
    5111             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5112             :       // MIs[1] src
    5113             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5114             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5115             :       // MIs[1] Operand 2
    5116             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5117             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5118             :       // MIs[0] Operand 2
    5119             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5120             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
    5121             :       // MIs[2] Operand 0
    5122             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s32,
    5123             :       // MIs[2] src
    5124             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    5125             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5126             :       // MIs[2] Operand 2
    5127             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
    5128             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
    5129             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5130             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5131             :       // (and:i32 (xor:i32 GR32:i32:$src, -1:i32), (add:i32 GR32:i32:$src, -1:i32))  =>  (TZMSK32rr:i32:i32 GR32:i32:$src)
    5132             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr,
    5133             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5134             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5135             :       GIR_EraseFromParent, /*InsnID*/0,
    5136             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5137             :       GIR_Done,
    5138             :     // Label 175: @10945
    5139             :     GIM_Try, /*On fail goto*//*Label 176*/ 11051,
    5140             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5141             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5142             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5143             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5144             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5145             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5146             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5147             :       // MIs[0] dst
    5148             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5149             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5150             :       // MIs[0] Operand 1
    5151             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5152             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5153             :       // MIs[1] Operand 0
    5154             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5155             :       // MIs[1] src
    5156             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5157             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5158             :       // MIs[1] Operand 2
    5159             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5160             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5161             :       // MIs[0] Operand 2
    5162             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5163             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
    5164             :       // MIs[2] Operand 0
    5165             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
    5166             :       // MIs[2] src
    5167             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
    5168             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5169             :       // MIs[2] Operand 2
    5170             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
    5171             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
    5172             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5173             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5174             :       // (and:i64 (xor:i64 GR64:i64:$src, -1:i64), (add:i64 GR64:i64:$src, -1:i64))  =>  (TZMSK64rr:i64:i32 GR64:i64:$src)
    5175             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr,
    5176             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5177             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5178             :       GIR_EraseFromParent, /*InsnID*/0,
    5179             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5180             :       GIR_Done,
    5181             :     // Label 176: @11051
    5182             :     GIM_Try, /*On fail goto*//*Label 177*/ 11157,
    5183             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5184             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5185             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5186             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5187             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5188             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5189             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5190             :       // MIs[0] dst
    5191             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5192             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5193             :       // MIs[0] Operand 1
    5194             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5195             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5196             :       // MIs[1] Operand 0
    5197             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5198             :       // MIs[1] src
    5199             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5200             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5201             :       // MIs[1] Operand 2
    5202             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5203             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
    5204             :       // MIs[0] Operand 2
    5205             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5206             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
    5207             :       // MIs[2] Operand 0
    5208             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s32,
    5209             :       // MIs[2] src
    5210             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    5211             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5212             :       // MIs[2] Operand 2
    5213             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
    5214             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
    5215             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5216             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5217             :       // (and:i32 (add:i32 GR32:i32:$src, 1:i32), (xor:i32 GR32:i32:$src, -1:i32))  =>  (BLCIC32rr:i32:i32 GR32:i32:$src)
    5218             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr,
    5219             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5220             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5221             :       GIR_EraseFromParent, /*InsnID*/0,
    5222             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5223             :       GIR_Done,
    5224             :     // Label 177: @11157
    5225             :     GIM_Try, /*On fail goto*//*Label 178*/ 11263,
    5226             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5227             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5228             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5229             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5230             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5231             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5232             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5233             :       // MIs[0] dst
    5234             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5235             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5236             :       // MIs[0] Operand 1
    5237             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5238             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5239             :       // MIs[1] Operand 0
    5240             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5241             :       // MIs[1] src
    5242             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5243             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5244             :       // MIs[1] Operand 2
    5245             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5246             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
    5247             :       // MIs[0] Operand 2
    5248             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5249             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
    5250             :       // MIs[2] Operand 0
    5251             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
    5252             :       // MIs[2] src
    5253             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
    5254             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5255             :       // MIs[2] Operand 2
    5256             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
    5257             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
    5258             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5259             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5260             :       // (and:i64 (add:i64 GR64:i64:$src, 1:i64), (xor:i64 GR64:i64:$src, -1:i64))  =>  (BLCIC64rr:i64:i32 GR64:i64:$src)
    5261             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr,
    5262             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5263             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5264             :       GIR_EraseFromParent, /*InsnID*/0,
    5265             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5266             :       GIR_Done,
    5267             :     // Label 178: @11263
    5268             :     GIM_Try, /*On fail goto*//*Label 179*/ 11369,
    5269             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5270             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5271             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5272             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5273             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5274             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5275             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5276             :       // MIs[0] dst
    5277             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5278             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5279             :       // MIs[0] Operand 1
    5280             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5281             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5282             :       // MIs[1] Operand 0
    5283             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5284             :       // MIs[1] src
    5285             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5286             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5287             :       // MIs[1] Operand 2
    5288             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5289             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5290             :       // MIs[0] Operand 2
    5291             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5292             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
    5293             :       // MIs[2] Operand 0
    5294             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s32,
    5295             :       // MIs[2] src
    5296             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    5297             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5298             :       // MIs[2] Operand 2
    5299             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
    5300             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
    5301             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5302             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5303             :       // (and:i32 (add:i32 GR32:i32:$src, -1:i32), (xor:i32 GR32:i32:$src, -1:i32))  =>  (TZMSK32rr:i32:i32 GR32:i32:$src)
    5304             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr,
    5305             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5306             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5307             :       GIR_EraseFromParent, /*InsnID*/0,
    5308             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5309             :       GIR_Done,
    5310             :     // Label 179: @11369
    5311             :     GIM_Try, /*On fail goto*//*Label 180*/ 11475,
    5312             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5313             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5314             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5315             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5316             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
    5317             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/3,
    5318             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5319             :       // MIs[0] dst
    5320             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5321             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5322             :       // MIs[0] Operand 1
    5323             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5324             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5325             :       // MIs[1] Operand 0
    5326             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5327             :       // MIs[1] src
    5328             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5329             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5330             :       // MIs[1] Operand 2
    5331             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5332             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5333             :       // MIs[0] Operand 2
    5334             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5335             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
    5336             :       // MIs[2] Operand 0
    5337             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s64,
    5338             :       // MIs[2] src
    5339             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
    5340             :       GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5341             :       // MIs[2] Operand 2
    5342             :       GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
    5343             :       GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
    5344             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5345             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5346             :       // (and:i64 (add:i64 GR64:i64:$src, -1:i64), (xor:i64 GR64:i64:$src, -1:i64))  =>  (TZMSK64rr:i64:i32 GR64:i64:$src)
    5347             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr,
    5348             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5349             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5350             :       GIR_EraseFromParent, /*InsnID*/0,
    5351             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5352             :       GIR_Done,
    5353             :     // Label 180: @11475
    5354             :     GIM_Try, /*On fail goto*//*Label 181*/ 11557,
    5355             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5356             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5357             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5358             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5359             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5360             :       // MIs[0] dst
    5361             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5362             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5363             :       // MIs[0] Operand 1
    5364             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5365             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5366             :       // MIs[1] Operand 0
    5367             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5368             :       // MIs[1] src1
    5369             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5370             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5371             :       // MIs[1] Operand 2
    5372             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5373             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5374             :       // MIs[0] src2
    5375             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5376             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5377             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5378             :       // (and:i32 (xor:i32 GR32:i32:$src1, -1:i32), GR32:i32:$src2)  =>  (ANDN32rr:i32:i32 GR32:i32:$src1, GR32:i32:$src2)
    5379             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr,
    5380             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5381             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    5382             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2
    5383             :       GIR_EraseFromParent, /*InsnID*/0,
    5384             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5385             :       GIR_Done,
    5386             :     // Label 181: @11557
    5387             :     GIM_Try, /*On fail goto*//*Label 182*/ 11639,
    5388             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5389             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5390             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5391             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5392             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5393             :       // MIs[0] dst
    5394             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5396             :       // MIs[0] Operand 1
    5397             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5398             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5399             :       // MIs[1] Operand 0
    5400             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5401             :       // MIs[1] src1
    5402             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5403             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5404             :       // MIs[1] Operand 2
    5405             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5406             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5407             :       // MIs[0] src2
    5408             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5409             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5410             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5411             :       // (and:i64 (xor:i64 GR64:i64:$src1, -1:i64), GR64:i64:$src2)  =>  (ANDN64rr:i64:i32 GR64:i64:$src1, GR64:i64:$src2)
    5412             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr,
    5413             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5414             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    5415             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2
    5416             :       GIR_EraseFromParent, /*InsnID*/0,
    5417             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5418             :       GIR_Done,
    5419             :     // Label 182: @11639
    5420             :     GIM_Try, /*On fail goto*//*Label 183*/ 11717,
    5421             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5422             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5423             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5424             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5425             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5426             :       // MIs[0] dst
    5427             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5428             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5429             :       // MIs[0] Operand 1
    5430             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5431             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5432             :       // MIs[1] Operand 0
    5433             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5434             :       // MIs[1] src
    5435             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5436             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5437             :       // MIs[1] Operand 2
    5438             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5439             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5440             :       // MIs[0] src
    5441             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5442             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5443             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5444             :       // (and:i32 (add:i32 GR32:i32:$src, -1:i32), GR32:i32:$src)  =>  (BLSR32rr:i32:i32 GR32:i32:$src)
    5445             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr,
    5446             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5447             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5448             :       GIR_EraseFromParent, /*InsnID*/0,
    5449             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5450             :       GIR_Done,
    5451             :     // Label 183: @11717
    5452             :     GIM_Try, /*On fail goto*//*Label 184*/ 11795,
    5453             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5454             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5455             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5456             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5457             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5458             :       // MIs[0] dst
    5459             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5461             :       // MIs[0] Operand 1
    5462             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5463             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5464             :       // MIs[1] Operand 0
    5465             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5466             :       // MIs[1] src
    5467             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5468             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5469             :       // MIs[1] Operand 2
    5470             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5471             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5472             :       // MIs[0] src
    5473             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5474             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5475             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5476             :       // (and:i64 (add:i64 GR64:i64:$src, -1:i64), GR64:i64:$src)  =>  (BLSR64rr:i64:i32 GR64:i64:$src)
    5477             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr,
    5478             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5479             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5480             :       GIR_EraseFromParent, /*InsnID*/0,
    5481             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5482             :       GIR_Done,
    5483             :     // Label 184: @11795
    5484             :     GIM_Try, /*On fail goto*//*Label 185*/ 11873,
    5485             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5486             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5487             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5488             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5489             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5490             :       // MIs[0] dst
    5491             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5493             :       // MIs[0] Operand 1
    5494             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5495             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    5496             :       // MIs[1] Operand 0
    5497             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5498             :       // MIs[1] Operand 1
    5499             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5500             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    5501             :       // MIs[1] src
    5502             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5503             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5504             :       // MIs[0] src
    5505             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5506             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5507             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5508             :       // (and:i32 (sub:i32 0:i32, GR32:i32:$src), GR32:i32:$src)  =>  (BLSI32rr:i32:i32 GR32:i32:$src)
    5509             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr,
    5510             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5511             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
    5512             :       GIR_EraseFromParent, /*InsnID*/0,
    5513             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5514             :       GIR_Done,
    5515             :     // Label 185: @11873
    5516             :     GIM_Try, /*On fail goto*//*Label 186*/ 11951,
    5517             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5518             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5519             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5520             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5521             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5522             :       // MIs[0] dst
    5523             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5524             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5525             :       // MIs[0] Operand 1
    5526             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5527             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    5528             :       // MIs[1] Operand 0
    5529             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5530             :       // MIs[1] Operand 1
    5531             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5532             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    5533             :       // MIs[1] src
    5534             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5535             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5536             :       // MIs[0] src
    5537             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5538             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5539             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5540             :       // (and:i64 (sub:i64 0:i64, GR64:i64:$src), GR64:i64:$src)  =>  (BLSI64rr:i64:i32 GR64:i64:$src)
    5541             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr,
    5542             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5543             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
    5544             :       GIR_EraseFromParent, /*InsnID*/0,
    5545             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5546             :       GIR_Done,
    5547             :     // Label 186: @11951
    5548             :     GIM_Try, /*On fail goto*//*Label 187*/ 12081,
    5549             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    5550             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5551             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5552             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5553             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
    5554             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    5555             :       GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
    5556             :       GIM_CheckNumOperands, /*MI*/3, /*Expected*/3,
    5557             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5558             :       // MIs[0] dst
    5559             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5560             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5561             :       // MIs[0] Operand 1
    5562             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5563             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
    5564             :       // MIs[1] Operand 0
    5565             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5566             :       // MIs[1] Operand 1
    5567             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5568             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -1,
    5569             :       // MIs[1] Operand 2
    5570             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
    5571             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC,
    5572             :       // MIs[2] Operand 0
    5573             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s8,
    5574             :       // MIs[2] Operand 1
    5575             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    5576             :       GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB,
    5577             :       // MIs[3] Operand 0
    5578             :       GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_s32,
    5579             :       // MIs[3] Operand 1
    5580             :       GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    5581             :       GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32,
    5582             :       // MIs[3] lz
    5583             :       GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
    5584             :       GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5585             :       // MIs[0] src
    5586             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5587             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5588             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5589             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5590             :       GIM_CheckIsSafeToFold, /*InsnID*/3,
    5591             :       // (and:i32 (srl:i32 -1:i32, (trunc:i8 (sub:i32 32:i32, GR32:i32:$lz))), GR32:i32:$src)  =>  (BZHI32rr:i32:i32 GR32:i32:$src, GR32:i32:$lz)
    5592             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr,
    5593             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5594             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    5595             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz
    5596             :       GIR_EraseFromParent, /*InsnID*/0,
    5597             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5598             :       GIR_Done,
    5599             :     // Label 187: @12081
    5600             :     GIM_Try, /*On fail goto*//*Label 188*/ 12159,
    5601             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5602             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5603             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5604             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5605             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5606             :       // MIs[0] dst
    5607             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5608             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5609             :       // MIs[0] Operand 1
    5610             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5611             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5612             :       // MIs[1] Operand 0
    5613             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5614             :       // MIs[1] src
    5615             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5616             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5617             :       // MIs[1] Operand 2
    5618             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5619             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
    5620             :       // MIs[0] src
    5621             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5622             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5623             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5624             :       // (and:i32 (add:i32 GR32:i32:$src, 1:i32), GR32:i32:$src)  =>  (BLCFILL32rr:i32:i32 GR32:i32:$src)
    5625             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr,
    5626             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5627             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5628             :       GIR_EraseFromParent, /*InsnID*/0,
    5629             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5630             :       GIR_Done,
    5631             :     // Label 188: @12159
    5632             :     GIM_Try, /*On fail goto*//*Label 189*/ 12237,
    5633             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5634             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5635             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    5636             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5637             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5638             :       // MIs[0] dst
    5639             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5640             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5641             :       // MIs[0] Operand 1
    5642             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5643             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5644             :       // MIs[1] Operand 0
    5645             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5646             :       // MIs[1] src
    5647             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5648             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5649             :       // MIs[1] Operand 2
    5650             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5651             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
    5652             :       // MIs[0] src
    5653             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5654             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5655             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5656             :       // (and:i64 (add:i64 GR64:i64:$src, 1:i64), GR64:i64:$src)  =>  (BLCFILL64rr:i64:i32 GR64:i64:$src)
    5657             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr,
    5658             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5659             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    5660             :       GIR_EraseFromParent, /*InsnID*/0,
    5661             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5662             :       GIR_Done,
    5663             :     // Label 189: @12237
    5664             :     GIM_Try, /*On fail goto*//*Label 190*/ 12315,
    5665             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5666             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5667             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5668             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5669             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5670             :       // MIs[0] dst
    5671             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5672             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5673             :       // MIs[0] src
    5674             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5675             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5676             :       // MIs[0] Operand 2
    5677             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5678             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5679             :       // MIs[1] Operand 0
    5680             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5681             :       // MIs[1] src
    5682             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5683             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5684             :       // MIs[1] Operand 2
    5685             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5686             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5687             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5688             :       // (and:i32 GR32:i32:$src, (add:i32 GR32:i32:$src, -1:i32))  =>  (BLSR32rr:i32:i32 GR32:i32:$src)
    5689             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr,
    5690             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5691             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5692             :       GIR_EraseFromParent, /*InsnID*/0,
    5693             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5694             :       GIR_Done,
    5695             :     // Label 190: @12315
    5696             :     GIM_Try, /*On fail goto*//*Label 191*/ 12393,
    5697             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5698             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5699             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5700             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5701             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5702             :       // MIs[0] dst
    5703             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5704             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5705             :       // MIs[0] src
    5706             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5707             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5708             :       // MIs[0] Operand 2
    5709             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5710             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5711             :       // MIs[1] Operand 0
    5712             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5713             :       // MIs[1] src
    5714             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5715             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5716             :       // MIs[1] Operand 2
    5717             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5718             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5719             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5720             :       // (and:i64 GR64:i64:$src, (add:i64 GR64:i64:$src, -1:i64))  =>  (BLSR64rr:i64:i32 GR64:i64:$src)
    5721             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr,
    5722             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5723             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5724             :       GIR_EraseFromParent, /*InsnID*/0,
    5725             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5726             :       GIR_Done,
    5727             :     // Label 191: @12393
    5728             :     GIM_Try, /*On fail goto*//*Label 192*/ 12471,
    5729             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5730             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5731             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5732             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5733             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5734             :       // MIs[0] dst
    5735             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5736             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5737             :       // MIs[0] src
    5738             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5739             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5740             :       // MIs[0] Operand 2
    5741             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5742             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    5743             :       // MIs[1] Operand 0
    5744             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5745             :       // MIs[1] Operand 1
    5746             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5747             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    5748             :       // MIs[1] src
    5749             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5750             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5751             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5752             :       // (and:i32 GR32:i32:$src, (sub:i32 0:i32, GR32:i32:$src))  =>  (BLSI32rr:i32:i32 GR32:i32:$src)
    5753             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr,
    5754             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5755             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5756             :       GIR_EraseFromParent, /*InsnID*/0,
    5757             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5758             :       GIR_Done,
    5759             :     // Label 192: @12471
    5760             :     GIM_Try, /*On fail goto*//*Label 193*/ 12549,
    5761             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5762             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5763             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5764             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5765             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5766             :       // MIs[0] dst
    5767             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5769             :       // MIs[0] src
    5770             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5771             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5772             :       // MIs[0] Operand 2
    5773             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5774             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
    5775             :       // MIs[1] Operand 0
    5776             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5777             :       // MIs[1] Operand 1
    5778             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5779             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
    5780             :       // MIs[1] src
    5781             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5782             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID,
    5783             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5784             :       // (and:i64 GR64:i64:$src, (sub:i64 0:i64, GR64:i64:$src))  =>  (BLSI64rr:i64:i32 GR64:i64:$src)
    5785             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr,
    5786             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5787             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5788             :       GIR_EraseFromParent, /*InsnID*/0,
    5789             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5790             :       GIR_Done,
    5791             :     // Label 193: @12549
    5792             :     GIM_Try, /*On fail goto*//*Label 194*/ 12679,
    5793             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    5794             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5795             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5796             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5797             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
    5798             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    5799             :       GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
    5800             :       GIM_CheckNumOperands, /*MI*/3, /*Expected*/3,
    5801             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5802             :       // MIs[0] dst
    5803             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5804             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5805             :       // MIs[0] src
    5806             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5808             :       // MIs[0] Operand 2
    5809             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5810             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
    5811             :       // MIs[1] Operand 0
    5812             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5813             :       // MIs[1] Operand 1
    5814             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5815             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -1,
    5816             :       // MIs[1] Operand 2
    5817             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
    5818             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC,
    5819             :       // MIs[2] Operand 0
    5820             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s8,
    5821             :       // MIs[2] Operand 1
    5822             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    5823             :       GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB,
    5824             :       // MIs[3] Operand 0
    5825             :       GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_s32,
    5826             :       // MIs[3] Operand 1
    5827             :       GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    5828             :       GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32,
    5829             :       // MIs[3] lz
    5830             :       GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
    5831             :       GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID,
    5832             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5833             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    5834             :       GIM_CheckIsSafeToFold, /*InsnID*/3,
    5835             :       // (and:i32 GR32:i32:$src, (srl:i32 -1:i32, (trunc:i8 (sub:i32 32:i32, GR32:i32:$lz))))  =>  (BZHI32rr:i32:i32 GR32:i32:$src, GR32:i32:$lz)
    5836             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr,
    5837             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5838             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5839             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz
    5840             :       GIR_EraseFromParent, /*InsnID*/0,
    5841             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5842             :       GIR_Done,
    5843             :     // Label 194: @12679
    5844             :     GIM_Try, /*On fail goto*//*Label 195*/ 12757,
    5845             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5846             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5847             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5848             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5849             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5850             :       // MIs[0] dst
    5851             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5852             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5853             :       // MIs[0] src
    5854             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5855             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5856             :       // MIs[0] Operand 2
    5857             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5858             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5859             :       // MIs[1] Operand 0
    5860             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5861             :       // MIs[1] src
    5862             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5863             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5864             :       // MIs[1] Operand 2
    5865             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5866             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
    5867             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5868             :       // (and:i32 GR32:i32:$src, (add:i32 GR32:i32:$src, 1:i32))  =>  (BLCFILL32rr:i32:i32 GR32:i32:$src)
    5869             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr,
    5870             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5871             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5872             :       GIR_EraseFromParent, /*InsnID*/0,
    5873             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5874             :       GIR_Done,
    5875             :     // Label 195: @12757
    5876             :     GIM_Try, /*On fail goto*//*Label 196*/ 12835,
    5877             :       GIM_CheckFeatures, GIFBS_HasTBM,
    5878             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5879             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5880             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5881             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5882             :       // MIs[0] dst
    5883             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5884             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5885             :       // MIs[0] src
    5886             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5887             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5888             :       // MIs[0] Operand 2
    5889             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5890             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
    5891             :       // MIs[1] Operand 0
    5892             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5893             :       // MIs[1] src
    5894             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5895             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5896             :       // MIs[1] Operand 2
    5897             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5898             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
    5899             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5900             :       // (and:i64 GR64:i64:$src, (add:i64 GR64:i64:$src, 1:i64))  =>  (BLCFILL64rr:i64:i32 GR64:i64:$src)
    5901             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr,
    5902             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5903             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
    5904             :       GIR_EraseFromParent, /*InsnID*/0,
    5905             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5906             :       GIR_Done,
    5907             :     // Label 196: @12835
    5908             :     GIM_Try, /*On fail goto*//*Label 197*/ 12917,
    5909             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5910             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5911             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5912             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5913             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5914             :       // MIs[0] dst
    5915             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    5916             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    5917             :       // MIs[0] src2
    5918             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    5919             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5920             :       // MIs[0] Operand 2
    5921             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    5922             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5923             :       // MIs[1] Operand 0
    5924             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    5925             :       // MIs[1] src1
    5926             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    5927             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    5928             :       // MIs[1] Operand 2
    5929             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
    5930             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5931             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5932             :       // (and:i32 GR32:i32:$src2, (xor:i32 GR32:i32:$src1, -1:i32))  =>  (ANDN32rr:i32:i32 GR32:i32:$src1, GR32:i32:$src2)
    5933             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr,
    5934             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5935             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    5936             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2
    5937             :       GIR_EraseFromParent, /*InsnID*/0,
    5938             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5939             :       GIR_Done,
    5940             :     // Label 197: @12917
    5941             :     GIM_Try, /*On fail goto*//*Label 198*/ 12999,
    5942             :       GIM_CheckFeatures, GIFBS_HasBMI,
    5943             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5944             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5945             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    5946             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5947             :       // MIs[0] dst
    5948             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    5949             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    5950             :       // MIs[0] src2
    5951             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    5952             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5953             :       // MIs[0] Operand 2
    5954             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    5955             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
    5956             :       // MIs[1] Operand 0
    5957             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    5958             :       // MIs[1] src1
    5959             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
    5960             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
    5961             :       // MIs[1] Operand 2
    5962             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
    5963             :       GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
    5964             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5965             :       // (and:i64 GR64:i64:$src2, (xor:i64 GR64:i64:$src1, -1:i64))  =>  (ANDN64rr:i64:i32 GR64:i64:$src1, GR64:i64:$src2)
    5966             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr,
    5967             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5968             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
    5969             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2
    5970             :       GIR_EraseFromParent, /*InsnID*/0,
    5971             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    5972             :       GIR_Done,
    5973             :     // Label 198: @12999
    5974             :     GIM_Try, /*On fail goto*//*Label 199*/ 13062,
    5975             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    5976             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    5977             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    5978             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    5979             :       // MIs[0] dst
    5980             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    5981             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    5982             :       // MIs[0] src1
    5983             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    5984             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    5985             :       // MIs[0] src2
    5986             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    5987             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    5988             :       // MIs[1] Operand 0
    5989             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    5990             :       // MIs[1] Operand 1
    5991             :       // No operand predicates
    5992             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    5993             :       // (and:i8 GR8:i8:$src1, (imm:i8):$src2)  =>  (AND8ri:i8:i32 GR8:i8:$src1, (imm:i8):$src2)
    5994             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND8ri,
    5995             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    5996             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    5997             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    5998             :       GIR_EraseFromParent, /*InsnID*/0,
    5999             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6000             :       GIR_Done,
    6001             :     // Label 199: @13062
    6002             :     GIM_Try, /*On fail goto*//*Label 200*/ 13125,
    6003             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6004             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6005             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6006             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6007             :       // MIs[0] dst
    6008             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    6009             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    6010             :       // MIs[0] src1
    6011             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    6012             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    6013             :       // MIs[0] src2
    6014             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    6015             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6016             :       // MIs[1] Operand 0
    6017             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s16,
    6018             :       // MIs[1] Operand 1
    6019             :       // No operand predicates
    6020             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6021             :       // (and:i16 GR16:i16:$src1, (imm:i16):$src2)  =>  (AND16ri:i16:i32 GR16:i16:$src1, (imm:i16):$src2)
    6022             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri,
    6023             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6024             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6025             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6026             :       GIR_EraseFromParent, /*InsnID*/0,
    6027             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6028             :       GIR_Done,
    6029             :     // Label 200: @13125
    6030             :     GIM_Try, /*On fail goto*//*Label 201*/ 13188,
    6031             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6032             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6033             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6034             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6035             :       // MIs[0] dst
    6036             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    6037             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    6038             :       // MIs[0] src1
    6039             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    6040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    6041             :       // MIs[0] src2
    6042             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    6043             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6044             :       // MIs[1] Operand 0
    6045             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    6046             :       // MIs[1] Operand 1
    6047             :       // No operand predicates
    6048             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6049             :       // (and:i32 GR32:i32:$src1, (imm:i32):$src2)  =>  (AND32ri:i32:i32 GR32:i32:$src1, (imm:i32):$src2)
    6050             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri,
    6051             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6052             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6053             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6054             :       GIR_EraseFromParent, /*InsnID*/0,
    6055             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6056             :       GIR_Done,
    6057             :     // Label 201: @13188
    6058             :     GIM_Try, /*On fail goto*//*Label 202*/ 13254,
    6059             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6060             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6061             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6062             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6063             :       // MIs[0] dst
    6064             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    6065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    6066             :       // MIs[0] src1
    6067             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    6068             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    6069             :       // MIs[0] src2
    6070             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    6071             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6072             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i16immSExt8,
    6073             :       // MIs[1] Operand 0
    6074             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s16,
    6075             :       // MIs[1] Operand 1
    6076             :       // No operand predicates
    6077             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6078             :       // (and:i16 GR16:i16:$src1, (imm:i16)<<P:Predicate_i16immSExt8>>:$src2)  =>  (AND16ri8:i16:i32 GR16:i16:$src1, (imm:i16)<<P:Predicate_i16immSExt8>>:$src2)
    6079             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri8,
    6080             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6081             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6082             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6083             :       GIR_EraseFromParent, /*InsnID*/0,
    6084             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6085             :       GIR_Done,
    6086             :     // Label 202: @13254
    6087             :     GIM_Try, /*On fail goto*//*Label 203*/ 13320,
    6088             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6089             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6090             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6091             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6092             :       // MIs[0] dst
    6093             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    6094             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    6095             :       // MIs[0] src1
    6096             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    6097             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    6098             :       // MIs[0] src2
    6099             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    6100             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6101             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i32immSExt8,
    6102             :       // MIs[1] Operand 0
    6103             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    6104             :       // MIs[1] Operand 1
    6105             :       // No operand predicates
    6106             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6107             :       // (and:i32 GR32:i32:$src1, (imm:i32)<<P:Predicate_i32immSExt8>>:$src2)  =>  (AND32ri8:i32:i32 GR32:i32:$src1, (imm:i32)<<P:Predicate_i32immSExt8>>:$src2)
    6108             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri8,
    6109             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6110             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6111             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6112             :       GIR_EraseFromParent, /*InsnID*/0,
    6113             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6114             :       GIR_Done,
    6115             :     // Label 203: @13320
    6116             :     GIM_Try, /*On fail goto*//*Label 204*/ 13386,
    6117             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6118             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6119             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6120             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6121             :       // MIs[0] dst
    6122             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    6123             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    6124             :       // MIs[0] src1
    6125             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    6127             :       // MIs[0] src2
    6128             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    6129             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6130             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i64immSExt8,
    6131             :       // MIs[1] Operand 0
    6132             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    6133             :       // MIs[1] Operand 1
    6134             :       // No operand predicates
    6135             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6136             :       // (and:i64 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt8>>:$src2)  =>  (AND64ri8:i64:i32 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt8>>:$src2)
    6137             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri8,
    6138             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6139             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6140             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6141             :       GIR_EraseFromParent, /*InsnID*/0,
    6142             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6143             :       GIR_Done,
    6144             :     // Label 204: @13386
    6145             :     GIM_Try, /*On fail goto*//*Label 205*/ 13452,
    6146             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6147             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6148             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6149             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6150             :       // MIs[0] dst
    6151             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    6152             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    6153             :       // MIs[0] src1
    6154             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6155             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    6156             :       // MIs[0] src2
    6157             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    6158             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6159             :       GIM_CheckImmPredicate, /*MI*/1, /*Predicate*/GIPFP_Predicate_i64immSExt32,
    6160             :       // MIs[1] Operand 0
    6161             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s64,
    6162             :       // MIs[1] Operand 1
    6163             :       // No operand predicates
    6164             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6165             :       // (and:i64 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt32>>:$src2)  =>  (AND64ri32:i64:i32 GR64:i64:$src1, (imm:i64)<<P:Predicate_i64immSExt32>>:$src2)
    6166             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri32,
    6167             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6168             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6169             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6170             :       GIR_EraseFromParent, /*InsnID*/0,
    6171             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6172             :       GIR_Done,
    6173             :     // Label 205: @13452
    6174             :     GIM_Try, /*On fail goto*//*Label 206*/ 13493,
    6175             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    6176             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6177             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6178             :       // MIs[0] dst
    6179             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6181             :       // MIs[0] src1
    6182             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6184             :       // MIs[0] src2
    6185             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6187             :       // (and:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VPANDrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    6188             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr,
    6189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6190             :       GIR_Done,
    6191             :     // Label 206: @13493
    6192             :     GIM_Try, /*On fail goto*//*Label 207*/ 13534,
    6193             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    6194             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6195             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6196             :       // MIs[0] dst
    6197             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6198             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6199             :       // MIs[0] src1
    6200             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6201             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6202             :       // MIs[0] src2
    6203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6205             :       // (and:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (PANDrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    6206             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr,
    6207             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6208             :       GIR_Done,
    6209             :     // Label 207: @13534
    6210             :     GIM_Try, /*On fail goto*//*Label 208*/ 13575,
    6211             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    6212             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6213             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6214             :       // MIs[0] dst
    6215             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    6216             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    6217             :       // MIs[0] src1
    6218             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    6219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    6220             :       // MIs[0] src2
    6221             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    6222             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    6223             :       // (and:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)  =>  (VPANDYrr:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)
    6224             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr,
    6225             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6226             :       GIR_Done,
    6227             :     // Label 208: @13575
    6228             :     GIM_Try, /*On fail goto*//*Label 209*/ 13616,
    6229             :       GIM_CheckFeatures, GIFBS_HasDQI,
    6230             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6231             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6232             :       // MIs[0] dst
    6233             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s1,
    6234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID,
    6235             :       // MIs[0] src1
    6236             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
    6237             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
    6238             :       // MIs[0] src2
    6239             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1,
    6240             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID,
    6241             :       // (and:v8i1 VK8:v8i1:$src1, VK8:v8i1:$src2)  =>  (KANDBrr:v8i1 VK8:v8i1:$src1, VK8:v8i1:$src2)
    6242             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDBrr,
    6243             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6244             :       GIR_Done,
    6245             :     // Label 209: @13616
    6246             :     GIM_Try, /*On fail goto*//*Label 210*/ 13657,
    6247             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    6248             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6249             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6250             :       // MIs[0] dst
    6251             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s1,
    6252             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID,
    6253             :       // MIs[0] src1
    6254             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
    6255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
    6256             :       // MIs[0] src2
    6257             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1,
    6258             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID,
    6259             :       // (and:v16i1 VK16:v16i1:$src1, VK16:v16i1:$src2)  =>  (KANDWrr:v16i1 VK16:v16i1:$src1, VK16:v16i1:$src2)
    6260             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDWrr,
    6261             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6262             :       GIR_Done,
    6263             :     // Label 210: @13657
    6264             :     GIM_Try, /*On fail goto*//*Label 211*/ 13698,
    6265             :       GIM_CheckFeatures, GIFBS_HasBWI,
    6266             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6267             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6268             :       // MIs[0] dst
    6269             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s1,
    6270             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID,
    6271             :       // MIs[0] src1
    6272             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
    6273             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
    6274             :       // MIs[0] src2
    6275             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1,
    6276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID,
    6277             :       // (and:v32i1 VK32:v32i1:$src1, VK32:v32i1:$src2)  =>  (KANDDrr:v32i1 VK32:v32i1:$src1, VK32:v32i1:$src2)
    6278             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDDrr,
    6279             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6280             :       GIR_Done,
    6281             :     // Label 211: @13698
    6282             :     GIM_Try, /*On fail goto*//*Label 212*/ 13739,
    6283             :       GIM_CheckFeatures, GIFBS_HasBWI,
    6284             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6285             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6286             :       // MIs[0] dst
    6287             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v64s1,
    6288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID,
    6289             :       // MIs[0] src1
    6290             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
    6291             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
    6292             :       // MIs[0] src2
    6293             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1,
    6294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID,
    6295             :       // (and:v64i1 VK64:v64i1:$src1, VK64:v64i1:$src2)  =>  (KANDQrr:v64i1 VK64:v64i1:$src1, VK64:v64i1:$src2)
    6296             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDQrr,
    6297             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6298             :       GIR_Done,
    6299             :     // Label 212: @13739
    6300             :     GIM_Try, /*On fail goto*//*Label 213*/ 13780,
    6301             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    6302             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6303             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6304             :       // MIs[0] dst
    6305             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    6306             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    6307             :       // MIs[0] src1
    6308             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    6309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    6310             :       // MIs[0] src2
    6311             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    6312             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    6313             :       // (and:v8i64 VR512:v8i64:$src1, VR512:v8i64:$src2)  =>  (VPANDQZrr:v8i64 VR512:v8i64:$src1, VR512:v8i64:$src2)
    6314             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr,
    6315             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6316             :       GIR_Done,
    6317             :     // Label 213: @13780
    6318             :     GIM_Try, /*On fail goto*//*Label 214*/ 13821,
    6319             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    6320             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6321             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6322             :       // MIs[0] dst
    6323             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    6324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    6325             :       // MIs[0] src1
    6326             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    6327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    6328             :       // MIs[0] src2
    6329             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    6330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    6331             :       // (and:v4i64 VR256X:v4i64:$src1, VR256X:v4i64:$src2)  =>  (VPANDQZ256rr:v4i64 VR256X:v4i64:$src1, VR256X:v4i64:$src2)
    6332             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr,
    6333             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6334             :       GIR_Done,
    6335             :     // Label 214: @13821
    6336             :     GIM_Try, /*On fail goto*//*Label 215*/ 13862,
    6337             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    6338             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6339             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6340             :       // MIs[0] dst
    6341             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6342             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    6343             :       // MIs[0] src1
    6344             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6345             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    6346             :       // MIs[0] src2
    6347             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6348             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    6349             :       // (and:v2i64 VR128X:v2i64:$src1, VR128X:v2i64:$src2)  =>  (VPANDQZ128rr:v2i64 VR128X:v2i64:$src1, VR128X:v2i64:$src2)
    6350             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr,
    6351             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6352             :       GIR_Done,
    6353             :     // Label 215: @13862
    6354             :     GIM_Try, /*On fail goto*//*Label 216*/ 13903,
    6355             :       GIM_CheckFeatures, GIFBS_HasAVX1Only,
    6356             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6357             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6358             :       // MIs[0] dst
    6359             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    6360             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    6361             :       // MIs[0] src1
    6362             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    6363             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    6364             :       // MIs[0] src2
    6365             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    6366             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    6367             :       // (and:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)  =>  (VANDPSYrr:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)
    6368             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr,
    6369             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6370             :       GIR_Done,
    6371             :     // Label 216: @13903
    6372             :     GIM_Try, /*On fail goto*//*Label 217*/ 13945,
    6373             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6374             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6375             :       // MIs[0] dst
    6376             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    6377             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    6378             :       // MIs[0] src1
    6379             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    6380             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    6381             :       // MIs[0] src2
    6382             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6383             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
    6384             :       // (and:i8 GR8:i8:$src1, GR8:i8:$src2)  =>  (AND8rr:i8:i32 GR8:i8:$src1, GR8:i8:$src2)
    6385             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND8rr,
    6386             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    6387             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6388             :       GIR_Done,
    6389             :     // Label 217: @13945
    6390             :     GIM_Try, /*On fail goto*//*Label 218*/ 13987,
    6391             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6392             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6393             :       // MIs[0] dst
    6394             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    6395             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    6396             :       // MIs[0] src1
    6397             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    6398             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    6399             :       // MIs[0] src2
    6400             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
    6401             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
    6402             :       // (and:i16 GR16:i16:$src1, GR16:i16:$src2)  =>  (AND16rr:i16:i32 GR16:i16:$src1, GR16:i16:$src2)
    6403             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND16rr,
    6404             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    6405             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6406             :       GIR_Done,
    6407             :     // Label 218: @13987
    6408             :     GIM_Try, /*On fail goto*//*Label 219*/ 14029,
    6409             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6410             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6411             :       // MIs[0] dst
    6412             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    6413             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    6414             :       // MIs[0] src1
    6415             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    6416             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    6417             :       // MIs[0] src2
    6418             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    6419             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
    6420             :       // (and:i32 GR32:i32:$src1, GR32:i32:$src2)  =>  (AND32rr:i32:i32 GR32:i32:$src1, GR32:i32:$src2)
    6421             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND32rr,
    6422             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    6423             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6424             :       GIR_Done,
    6425             :     // Label 219: @14029
    6426             :     GIM_Try, /*On fail goto*//*Label 220*/ 14071,
    6427             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6428             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_AND,
    6429             :       // MIs[0] dst
    6430             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    6431             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    6432             :       // MIs[0] src1
    6433             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6434             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    6435             :       // MIs[0] src2
    6436             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    6437             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
    6438             :       // (and:i64 GR64:i64:$src1, GR64:i64:$src2)  =>  (AND64rr:i64:i32 GR64:i64:$src1, GR64:i64:$src2)
    6439             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND64rr,
    6440             :       GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
    6441             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6442             :       GIR_Done,
    6443             :     // Label 220: @14071
    6444             :     GIM_Try, /*On fail goto*//*Label 221*/ 14119,
    6445             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6446             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6447             :       // MIs[0] dst
    6448             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    6449             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    6450             :       // MIs[0] src1
    6451             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    6452             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    6453             :       // MIs[0] Operand 2
    6454             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6455             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    6456             :       // (sra:i8 GR8:i8:$src1, 1:i8)  =>  (SAR8r1:i8:i32 GR8:i8:$src1)
    6457             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8r1,
    6458             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6459             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6460             :       GIR_EraseFromParent, /*InsnID*/0,
    6461             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6462             :       GIR_Done,
    6463             :     // Label 221: @14119
    6464             :     GIM_Try, /*On fail goto*//*Label 222*/ 14167,
    6465             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6466             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6467             :       // MIs[0] dst
    6468             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    6469             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    6470             :       // MIs[0] src1
    6471             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    6472             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    6473             :       // MIs[0] Operand 2
    6474             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6475             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    6476             :       // (sra:i16 GR16:i16:$src1, 1:i8)  =>  (SAR16r1:i16:i32 GR16:i16:$src1)
    6477             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16r1,
    6478             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6479             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6480             :       GIR_EraseFromParent, /*InsnID*/0,
    6481             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6482             :       GIR_Done,
    6483             :     // Label 222: @14167
    6484             :     GIM_Try, /*On fail goto*//*Label 223*/ 14215,
    6485             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6486             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6487             :       // MIs[0] dst
    6488             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    6489             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    6490             :       // MIs[0] src1
    6491             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    6492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    6493             :       // MIs[0] Operand 2
    6494             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6495             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    6496             :       // (sra:i32 GR32:i32:$src1, 1:i8)  =>  (SAR32r1:i32:i32 GR32:i32:$src1)
    6497             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32r1,
    6498             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6499             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6500             :       GIR_EraseFromParent, /*InsnID*/0,
    6501             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6502             :       GIR_Done,
    6503             :     // Label 223: @14215
    6504             :     GIM_Try, /*On fail goto*//*Label 224*/ 14263,
    6505             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6506             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6507             :       // MIs[0] dst
    6508             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    6509             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    6510             :       // MIs[0] src1
    6511             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6512             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    6513             :       // MIs[0] Operand 2
    6514             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6515             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    6516             :       // (sra:i64 GR64:i64:$src1, 1:i8)  =>  (SAR64r1:i64:i32 GR64:i64:$src1)
    6517             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64r1,
    6518             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6519             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6520             :       GIR_EraseFromParent, /*InsnID*/0,
    6521             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6522             :       GIR_Done,
    6523             :     // Label 224: @14263
    6524             :     GIM_Try, /*On fail goto*//*Label 225*/ 14326,
    6525             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6526             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6527             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6528             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6529             :       // MIs[0] dst
    6530             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    6531             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    6532             :       // MIs[0] src1
    6533             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    6534             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    6535             :       // MIs[0] src2
    6536             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6537             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6538             :       // MIs[1] Operand 0
    6539             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    6540             :       // MIs[1] Operand 1
    6541             :       // No operand predicates
    6542             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6543             :       // (sra:i8 GR8:i8:$src1, (imm:i8):$src2)  =>  (SAR8ri:i8:i32 GR8:i8:$src1, (imm:i8):$src2)
    6544             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8ri,
    6545             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6546             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6547             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6548             :       GIR_EraseFromParent, /*InsnID*/0,
    6549             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6550             :       GIR_Done,
    6551             :     // Label 225: @14326
    6552             :     GIM_Try, /*On fail goto*//*Label 226*/ 14389,
    6553             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6554             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6555             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6556             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6557             :       // MIs[0] dst
    6558             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    6559             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    6560             :       // MIs[0] src1
    6561             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    6562             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    6563             :       // MIs[0] src2
    6564             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6565             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6566             :       // MIs[1] Operand 0
    6567             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    6568             :       // MIs[1] Operand 1
    6569             :       // No operand predicates
    6570             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6571             :       // (sra:i16 GR16:i16:$src1, (imm:i8):$src2)  =>  (SAR16ri:i16:i32 GR16:i16:$src1, (imm:i8):$src2)
    6572             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16ri,
    6573             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6574             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6575             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6576             :       GIR_EraseFromParent, /*InsnID*/0,
    6577             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6578             :       GIR_Done,
    6579             :     // Label 226: @14389
    6580             :     GIM_Try, /*On fail goto*//*Label 227*/ 14452,
    6581             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6582             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6583             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6584             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6585             :       // MIs[0] dst
    6586             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    6587             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    6588             :       // MIs[0] src1
    6589             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    6590             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    6591             :       // MIs[0] src2
    6592             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6593             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6594             :       // MIs[1] Operand 0
    6595             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    6596             :       // MIs[1] Operand 1
    6597             :       // No operand predicates
    6598             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6599             :       // (sra:i32 GR32:i32:$src1, (imm:i8):$src2)  =>  (SAR32ri:i32:i32 GR32:i32:$src1, (imm:i8):$src2)
    6600             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32ri,
    6601             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6602             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6603             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6604             :       GIR_EraseFromParent, /*InsnID*/0,
    6605             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6606             :       GIR_Done,
    6607             :     // Label 227: @14452
    6608             :     GIM_Try, /*On fail goto*//*Label 228*/ 14515,
    6609             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6610             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    6611             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    6612             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6613             :       // MIs[0] dst
    6614             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    6615             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    6616             :       // MIs[0] src1
    6617             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6618             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    6619             :       // MIs[0] src2
    6620             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    6621             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    6622             :       // MIs[1] Operand 0
    6623             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    6624             :       // MIs[1] Operand 1
    6625             :       // No operand predicates
    6626             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    6627             :       // (sra:i64 GR64:i64:$src1, (imm:i8):$src2)  =>  (SAR64ri:i64:i32 GR64:i64:$src1, (imm:i8):$src2)
    6628             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64ri,
    6629             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    6630             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    6631             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    6632             :       GIR_EraseFromParent, /*InsnID*/0,
    6633             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6634             :       GIR_Done,
    6635             :     // Label 228: @14515
    6636             :     GIM_Try, /*On fail goto*//*Label 229*/ 14556,
    6637             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    6638             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6639             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6640             :       // MIs[0] dst
    6641             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6642             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6643             :       // MIs[0] src1
    6644             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6645             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6646             :       // MIs[0] src2
    6647             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6648             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6649             :       // (sra:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (VPSRAVDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    6650             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDrr,
    6651             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6652             :       GIR_Done,
    6653             :     // Label 229: @14556
    6654             :     GIM_Try, /*On fail goto*//*Label 230*/ 14597,
    6655             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    6656             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6657             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6658             :       // MIs[0] dst
    6659             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    6660             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    6661             :       // MIs[0] src1
    6662             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    6663             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    6664             :       // MIs[0] src2
    6665             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    6666             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    6667             :       // (sra:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)  =>  (VPSRAVDYrr:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)
    6668             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDYrr,
    6669             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6670             :       GIR_Done,
    6671             :     // Label 230: @14597
    6672             :     GIM_Try, /*On fail goto*//*Label 231*/ 14638,
    6673             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    6674             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6675             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6676             :       // MIs[0] dst
    6677             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    6678             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    6679             :       // MIs[0] src1
    6680             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    6681             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    6682             :       // MIs[0] src2
    6683             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    6684             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    6685             :       // (sra:v16i32 VR512:v16i32:$src1, VR512:v16i32:$src2)  =>  (VPSRAVDZrr:v16i32 VR512:v16i32:$src1, VR512:v16i32:$src2)
    6686             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZrr,
    6687             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6688             :       GIR_Done,
    6689             :     // Label 231: @14638
    6690             :     GIM_Try, /*On fail goto*//*Label 232*/ 14679,
    6691             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    6692             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6693             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6694             :       // MIs[0] dst
    6695             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    6696             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    6697             :       // MIs[0] src1
    6698             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    6699             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    6700             :       // MIs[0] src2
    6701             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    6702             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    6703             :       // (sra:v8i32 VR256X:v8i32:$src1, VR256X:v8i32:$src2)  =>  (VPSRAVDZ256rr:v8i32 VR256X:v8i32:$src1, VR256X:v8i32:$src2)
    6704             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZ256rr,
    6705             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6706             :       GIR_Done,
    6707             :     // Label 232: @14679
    6708             :     GIM_Try, /*On fail goto*//*Label 233*/ 14720,
    6709             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    6710             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6711             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6712             :       // MIs[0] dst
    6713             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6714             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    6715             :       // MIs[0] src1
    6716             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6717             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    6718             :       // MIs[0] src2
    6719             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6720             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    6721             :       // (sra:v4i32 VR128X:v4i32:$src1, VR128X:v4i32:$src2)  =>  (VPSRAVDZ128rr:v4i32 VR128X:v4i32:$src1, VR128X:v4i32:$src2)
    6722             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZ128rr,
    6723             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6724             :       GIR_Done,
    6725             :     // Label 233: @14720
    6726             :     GIM_Try, /*On fail goto*//*Label 234*/ 14761,
    6727             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    6728             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6729             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6730             :       // MIs[0] dst
    6731             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    6732             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    6733             :       // MIs[0] src1
    6734             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    6735             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    6736             :       // MIs[0] src2
    6737             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    6738             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    6739             :       // (sra:v8i64 VR512:v8i64:$src1, VR512:v8i64:$src2)  =>  (VPSRAVQZrr:v8i64 VR512:v8i64:$src1, VR512:v8i64:$src2)
    6740             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZrr,
    6741             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6742             :       GIR_Done,
    6743             :     // Label 234: @14761
    6744             :     GIM_Try, /*On fail goto*//*Label 235*/ 14802,
    6745             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    6746             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6747             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6748             :       // MIs[0] dst
    6749             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    6750             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    6751             :       // MIs[0] src1
    6752             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    6753             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    6754             :       // MIs[0] src2
    6755             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    6756             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    6757             :       // (sra:v4i64 VR256X:v4i64:$src1, VR256X:v4i64:$src2)  =>  (VPSRAVQZ256rr:v4i64 VR256X:v4i64:$src1, VR256X:v4i64:$src2)
    6758             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZ256rr,
    6759             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6760             :       GIR_Done,
    6761             :     // Label 235: @14802
    6762             :     GIM_Try, /*On fail goto*//*Label 236*/ 14843,
    6763             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    6764             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6765             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6766             :       // MIs[0] dst
    6767             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6768             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    6769             :       // MIs[0] src1
    6770             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6771             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    6772             :       // MIs[0] src2
    6773             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6774             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    6775             :       // (sra:v2i64 VR128X:v2i64:$src1, VR128X:v2i64:$src2)  =>  (VPSRAVQZ128rr:v2i64 VR128X:v2i64:$src1, VR128X:v2i64:$src2)
    6776             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZ128rr,
    6777             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6778             :       GIR_Done,
    6779             :     // Label 236: @14843
    6780             :     GIM_Try, /*On fail goto*//*Label 237*/ 14884,
    6781             :       GIM_CheckFeatures, GIFBS_HasBWI,
    6782             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6783             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6784             :       // MIs[0] dst
    6785             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s16,
    6786             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    6787             :       // MIs[0] src1
    6788             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
    6789             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    6790             :       // MIs[0] src2
    6791             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
    6792             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    6793             :       // (sra:v32i16 VR512:v32i16:$src1, VR512:v32i16:$src2)  =>  (VPSRAVWZrr:v32i16 VR512:v32i16:$src1, VR512:v32i16:$src2)
    6794             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZrr,
    6795             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6796             :       GIR_Done,
    6797             :     // Label 237: @14884
    6798             :     GIM_Try, /*On fail goto*//*Label 238*/ 14925,
    6799             :       GIM_CheckFeatures, GIFBS_HasVLX_HasBWI,
    6800             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6801             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6802             :       // MIs[0] dst
    6803             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
    6804             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    6805             :       // MIs[0] src1
    6806             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
    6807             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    6808             :       // MIs[0] src2
    6809             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
    6810             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    6811             :       // (sra:v16i16 VR256X:v16i16:$src1, VR256X:v16i16:$src2)  =>  (VPSRAVWZ256rr:v16i16 VR256X:v16i16:$src1, VR256X:v16i16:$src2)
    6812             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZ256rr,
    6813             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6814             :       GIR_Done,
    6815             :     // Label 238: @14925
    6816             :     GIM_Try, /*On fail goto*//*Label 239*/ 14966,
    6817             :       GIM_CheckFeatures, GIFBS_HasVLX_HasBWI,
    6818             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6819             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ASHR,
    6820             :       // MIs[0] dst
    6821             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    6822             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    6823             :       // MIs[0] src1
    6824             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
    6825             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    6826             :       // MIs[0] src2
    6827             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    6828             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    6829             :       // (sra:v8i16 VR128X:v8i16:$src1, VR128X:v8i16:$src2)  =>  (VPSRAVWZ128rr:v8i16 VR128X:v8i16:$src1, VR128X:v8i16:$src2)
    6830             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZ128rr,
    6831             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6832             :       GIR_Done,
    6833             :     // Label 239: @14966
    6834             :     GIM_Try, /*On fail goto*//*Label 240*/ 15010,
    6835             :       GIM_CheckFeatures, GIFBS_FPStackf32,
    6836             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6837             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6838             :       // MIs[0] dst
    6839             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    6840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
    6841             :       // MIs[0] src1
    6842             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    6843             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
    6844             :       // MIs[0] src2
    6845             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    6846             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
    6847             :       // (fadd:f32 RFP32:f32:$src1, RFP32:f32:$src2)  =>  (ADD_Fp32:f32:i16 RFP32:f32:$src1, RFP32:f32:$src2)
    6848             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp32,
    6849             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    6850             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6851             :       GIR_Done,
    6852             :     // Label 240: @15010
    6853             :     GIM_Try, /*On fail goto*//*Label 241*/ 15054,
    6854             :       GIM_CheckFeatures, GIFBS_FPStackf64,
    6855             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6856             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6857             :       // MIs[0] dst
    6858             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    6859             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
    6860             :       // MIs[0] src1
    6861             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    6862             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
    6863             :       // MIs[0] src2
    6864             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    6865             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
    6866             :       // (fadd:f64 RFP64:f64:$src1, RFP64:f64:$src2)  =>  (ADD_Fp64:f64:i16 RFP64:f64:$src1, RFP64:f64:$src2)
    6867             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp64,
    6868             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    6869             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6870             :       GIR_Done,
    6871             :     // Label 241: @15054
    6872             :     GIM_Try, /*On fail goto*//*Label 242*/ 15096,
    6873             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6874             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6875             :       // MIs[0] dst
    6876             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s80,
    6877             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
    6878             :       // MIs[0] src1
    6879             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
    6880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
    6881             :       // MIs[0] src2
    6882             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
    6883             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
    6884             :       // (fadd:f80 RFP80:f80:$src1, RFP80:f80:$src2)  =>  (ADD_Fp80:f80:i16 RFP80:f80:$src1, RFP80:f80:$src2)
    6885             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp80,
    6886             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    6887             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6888             :       GIR_Done,
    6889             :     // Label 242: @15096
    6890             :     GIM_Try, /*On fail goto*//*Label 243*/ 15137,
    6891             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    6892             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6893             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6894             :       // MIs[0] dst
    6895             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6897             :       // MIs[0] src1
    6898             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6899             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6900             :       // MIs[0] src2
    6901             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6902             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6903             :       // (fadd:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (VADDPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    6904             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSrr,
    6905             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6906             :       GIR_Done,
    6907             :     // Label 243: @15137
    6908             :     GIM_Try, /*On fail goto*//*Label 244*/ 15178,
    6909             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    6910             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6911             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6912             :       // MIs[0] dst
    6913             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6914             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6915             :       // MIs[0] src1
    6916             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6917             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6918             :       // MIs[0] src2
    6919             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6920             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6921             :       // (fadd:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (VADDPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    6922             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDrr,
    6923             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6924             :       GIR_Done,
    6925             :     // Label 244: @15178
    6926             :     GIM_Try, /*On fail goto*//*Label 245*/ 15219,
    6927             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    6928             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6929             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6930             :       // MIs[0] dst
    6931             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    6932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    6933             :       // MIs[0] src1
    6934             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    6935             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    6936             :       // MIs[0] src2
    6937             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    6938             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    6939             :       // (fadd:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)  =>  (VADDPSYrr:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)
    6940             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSYrr,
    6941             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6942             :       GIR_Done,
    6943             :     // Label 245: @15219
    6944             :     GIM_Try, /*On fail goto*//*Label 246*/ 15260,
    6945             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    6946             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6947             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6948             :       // MIs[0] dst
    6949             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    6950             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    6951             :       // MIs[0] src1
    6952             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    6953             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    6954             :       // MIs[0] src2
    6955             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    6956             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    6957             :       // (fadd:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)  =>  (VADDPDYrr:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)
    6958             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDYrr,
    6959             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6960             :       GIR_Done,
    6961             :     // Label 246: @15260
    6962             :     GIM_Try, /*On fail goto*//*Label 247*/ 15301,
    6963             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    6964             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6965             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6966             :       // MIs[0] dst
    6967             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    6968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6969             :       // MIs[0] src1
    6970             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    6971             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6972             :       // MIs[0] src2
    6973             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    6974             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6975             :       // (fadd:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (ADDPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    6976             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPSrr,
    6977             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6978             :       GIR_Done,
    6979             :     // Label 247: @15301
    6980             :     GIM_Try, /*On fail goto*//*Label 248*/ 15342,
    6981             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    6982             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    6983             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    6984             :       // MIs[0] dst
    6985             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    6986             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    6987             :       // MIs[0] src1
    6988             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    6989             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    6990             :       // MIs[0] src2
    6991             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    6992             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    6993             :       // (fadd:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (ADDPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    6994             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPDrr,
    6995             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    6996             :       GIR_Done,
    6997             :     // Label 248: @15342
    6998             :     GIM_Try, /*On fail goto*//*Label 249*/ 15383,
    6999             :       GIM_CheckFeatures, GIFBS_UseAVX,
    7000             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7001             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7002             :       // MIs[0] dst
    7003             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7004             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    7005             :       // MIs[0] src1
    7006             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7007             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    7008             :       // MIs[0] src2
    7009             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7010             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    7011             :       // (fadd:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (VADDSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    7012             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSrr,
    7013             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7014             :       GIR_Done,
    7015             :     // Label 249: @15383
    7016             :     GIM_Try, /*On fail goto*//*Label 250*/ 15424,
    7017             :       GIM_CheckFeatures, GIFBS_UseAVX,
    7018             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7019             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7020             :       // MIs[0] dst
    7021             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7022             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    7023             :       // MIs[0] src1
    7024             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    7026             :       // MIs[0] src2
    7027             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7028             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    7029             :       // (fadd:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (VADDSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    7030             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDrr,
    7031             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7032             :       GIR_Done,
    7033             :     // Label 250: @15424
    7034             :     GIM_Try, /*On fail goto*//*Label 251*/ 15465,
    7035             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    7036             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7037             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7038             :       // MIs[0] dst
    7039             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    7041             :       // MIs[0] src1
    7042             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7043             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    7044             :       // MIs[0] src2
    7045             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7046             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    7047             :       // (fadd:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (ADDSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    7048             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSSrr,
    7049             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7050             :       GIR_Done,
    7051             :     // Label 251: @15465
    7052             :     GIM_Try, /*On fail goto*//*Label 252*/ 15506,
    7053             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    7054             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7055             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7056             :       // MIs[0] dst
    7057             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7058             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    7059             :       // MIs[0] src1
    7060             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7061             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    7062             :       // MIs[0] src2
    7063             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7064             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    7065             :       // (fadd:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (ADDSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    7066             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSDrr,
    7067             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7068             :       GIR_Done,
    7069             :     // Label 252: @15506
    7070             :     GIM_Try, /*On fail goto*//*Label 253*/ 15547,
    7071             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7072             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7073             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7074             :       // MIs[0] dst
    7075             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7076             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
    7077             :       // MIs[0] src1
    7078             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7079             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
    7080             :       // MIs[0] src2
    7081             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7082             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
    7083             :       // (fadd:f32 FR32X:f32:$src1, FR32X:f32:$src2)  =>  (VADDSSZrr:f32 FR32X:f32:$src1, FR32X:f32:$src2)
    7084             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSZrr,
    7085             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7086             :       GIR_Done,
    7087             :     // Label 253: @15547
    7088             :     GIM_Try, /*On fail goto*//*Label 254*/ 15588,
    7089             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7090             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7091             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7092             :       // MIs[0] dst
    7093             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7094             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
    7095             :       // MIs[0] src1
    7096             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7097             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
    7098             :       // MIs[0] src2
    7099             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
    7101             :       // (fadd:f64 FR64X:f64:$src1, FR64X:f64:$src2)  =>  (VADDSDZrr:f64 FR64X:f64:$src1, FR64X:f64:$src2)
    7102             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDZrr,
    7103             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7104             :       GIR_Done,
    7105             :     // Label 254: @15588
    7106             :     GIM_Try, /*On fail goto*//*Label 255*/ 15629,
    7107             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7108             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7109             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7110             :       // MIs[0] dst
    7111             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    7112             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    7113             :       // MIs[0] src1
    7114             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    7115             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    7116             :       // MIs[0] src2
    7117             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    7118             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    7119             :       // (fadd:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)  =>  (VADDPSZrr:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)
    7120             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZrr,
    7121             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7122             :       GIR_Done,
    7123             :     // Label 255: @15629
    7124             :     GIM_Try, /*On fail goto*//*Label 256*/ 15670,
    7125             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7126             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7127             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7128             :       // MIs[0] dst
    7129             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    7130             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    7131             :       // MIs[0] src1
    7132             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    7133             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    7134             :       // MIs[0] src2
    7135             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    7136             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    7137             :       // (fadd:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)  =>  (VADDPDZrr:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)
    7138             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZrr,
    7139             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7140             :       GIR_Done,
    7141             :     // Label 256: @15670
    7142             :     GIM_Try, /*On fail goto*//*Label 257*/ 15711,
    7143             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7144             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7145             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7146             :       // MIs[0] dst
    7147             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7148             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    7149             :       // MIs[0] src1
    7150             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7151             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    7152             :       // MIs[0] src2
    7153             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7154             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    7155             :       // (fadd:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)  =>  (VADDPSZ128rr:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)
    7156             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ128rr,
    7157             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7158             :       GIR_Done,
    7159             :     // Label 257: @15711
    7160             :     GIM_Try, /*On fail goto*//*Label 258*/ 15752,
    7161             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7162             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7163             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7164             :       // MIs[0] dst
    7165             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    7166             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    7167             :       // MIs[0] src1
    7168             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    7169             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    7170             :       // MIs[0] src2
    7171             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    7172             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    7173             :       // (fadd:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)  =>  (VADDPSZ256rr:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)
    7174             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ256rr,
    7175             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7176             :       GIR_Done,
    7177             :     // Label 258: @15752
    7178             :     GIM_Try, /*On fail goto*//*Label 259*/ 15793,
    7179             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7180             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7181             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7182             :       // MIs[0] dst
    7183             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7184             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    7185             :       // MIs[0] src1
    7186             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7187             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    7188             :       // MIs[0] src2
    7189             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7190             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    7191             :       // (fadd:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)  =>  (VADDPDZ128rr:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)
    7192             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ128rr,
    7193             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7194             :       GIR_Done,
    7195             :     // Label 259: @15793
    7196             :     GIM_Try, /*On fail goto*//*Label 260*/ 15834,
    7197             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7198             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7199             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FADD,
    7200             :       // MIs[0] dst
    7201             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    7202             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    7203             :       // MIs[0] src1
    7204             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    7205             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    7206             :       // MIs[0] src2
    7207             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    7208             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    7209             :       // (fadd:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)  =>  (VADDPDZ256rr:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)
    7210             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ256rr,
    7211             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7212             :       GIR_Done,
    7213             :     // Label 260: @15834
    7214             :     GIM_Try, /*On fail goto*//*Label 261*/ 15878,
    7215             :       GIM_CheckFeatures, GIFBS_FPStackf32,
    7216             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7217             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7218             :       // MIs[0] dst
    7219             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
    7221             :       // MIs[0] src1
    7222             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7223             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
    7224             :       // MIs[0] src2
    7225             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7226             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
    7227             :       // (fdiv:f32 RFP32:f32:$src1, RFP32:f32:$src2)  =>  (DIV_Fp32:f32:i16 RFP32:f32:$src1, RFP32:f32:$src2)
    7228             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp32,
    7229             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7230             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7231             :       GIR_Done,
    7232             :     // Label 261: @15878
    7233             :     GIM_Try, /*On fail goto*//*Label 262*/ 15922,
    7234             :       GIM_CheckFeatures, GIFBS_FPStackf64,
    7235             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7236             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7237             :       // MIs[0] dst
    7238             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7239             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
    7240             :       // MIs[0] src1
    7241             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7242             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
    7243             :       // MIs[0] src2
    7244             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
    7246             :       // (fdiv:f64 RFP64:f64:$src1, RFP64:f64:$src2)  =>  (DIV_Fp64:f64:i16 RFP64:f64:$src1, RFP64:f64:$src2)
    7247             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp64,
    7248             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7249             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7250             :       GIR_Done,
    7251             :     // Label 262: @15922
    7252             :     GIM_Try, /*On fail goto*//*Label 263*/ 15964,
    7253             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7254             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7255             :       // MIs[0] dst
    7256             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s80,
    7257             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
    7258             :       // MIs[0] src1
    7259             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
    7260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
    7261             :       // MIs[0] src2
    7262             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
    7263             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
    7264             :       // (fdiv:f80 RFP80:f80:$src1, RFP80:f80:$src2)  =>  (DIV_Fp80:f80:i16 RFP80:f80:$src1, RFP80:f80:$src2)
    7265             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp80,
    7266             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7267             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7268             :       GIR_Done,
    7269             :     // Label 263: @15964
    7270             :     GIM_Try, /*On fail goto*//*Label 264*/ 16005,
    7271             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7272             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7273             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7274             :       // MIs[0] dst
    7275             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7277             :       // MIs[0] src1
    7278             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7279             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7280             :       // MIs[0] src2
    7281             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7282             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7283             :       // (fdiv:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (VDIVPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    7284             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSrr,
    7285             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7286             :       GIR_Done,
    7287             :     // Label 264: @16005
    7288             :     GIM_Try, /*On fail goto*//*Label 265*/ 16046,
    7289             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7290             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7291             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7292             :       // MIs[0] dst
    7293             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7295             :       // MIs[0] src1
    7296             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7297             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7298             :       // MIs[0] src2
    7299             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7300             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7301             :       // (fdiv:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (VDIVPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    7302             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDrr,
    7303             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7304             :       GIR_Done,
    7305             :     // Label 265: @16046
    7306             :     GIM_Try, /*On fail goto*//*Label 266*/ 16087,
    7307             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7308             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7309             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7310             :       // MIs[0] dst
    7311             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    7312             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    7313             :       // MIs[0] src1
    7314             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    7315             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    7316             :       // MIs[0] src2
    7317             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    7318             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    7319             :       // (fdiv:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)  =>  (VDIVPSYrr:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)
    7320             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSYrr,
    7321             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7322             :       GIR_Done,
    7323             :     // Label 266: @16087
    7324             :     GIM_Try, /*On fail goto*//*Label 267*/ 16128,
    7325             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7326             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7327             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7328             :       // MIs[0] dst
    7329             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    7330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    7331             :       // MIs[0] src1
    7332             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    7333             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    7334             :       // MIs[0] src2
    7335             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    7336             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    7337             :       // (fdiv:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)  =>  (VDIVPDYrr:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)
    7338             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDYrr,
    7339             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7340             :       GIR_Done,
    7341             :     // Label 267: @16128
    7342             :     GIM_Try, /*On fail goto*//*Label 268*/ 16169,
    7343             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    7344             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7345             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7346             :       // MIs[0] dst
    7347             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7348             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7349             :       // MIs[0] src1
    7350             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7351             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7352             :       // MIs[0] src2
    7353             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7354             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7355             :       // (fdiv:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (DIVPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    7356             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPSrr,
    7357             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7358             :       GIR_Done,
    7359             :     // Label 268: @16169
    7360             :     GIM_Try, /*On fail goto*//*Label 269*/ 16210,
    7361             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    7362             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7363             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7364             :       // MIs[0] dst
    7365             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7366             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7367             :       // MIs[0] src1
    7368             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7369             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7370             :       // MIs[0] src2
    7371             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7372             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7373             :       // (fdiv:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (DIVPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    7374             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPDrr,
    7375             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7376             :       GIR_Done,
    7377             :     // Label 269: @16210
    7378             :     GIM_Try, /*On fail goto*//*Label 270*/ 16251,
    7379             :       GIM_CheckFeatures, GIFBS_UseAVX,
    7380             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7381             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7382             :       // MIs[0] dst
    7383             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7384             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    7385             :       // MIs[0] src1
    7386             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7387             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    7388             :       // MIs[0] src2
    7389             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7390             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    7391             :       // (fdiv:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (VDIVSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    7392             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSrr,
    7393             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7394             :       GIR_Done,
    7395             :     // Label 270: @16251
    7396             :     GIM_Try, /*On fail goto*//*Label 271*/ 16292,
    7397             :       GIM_CheckFeatures, GIFBS_UseAVX,
    7398             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7399             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7400             :       // MIs[0] dst
    7401             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7402             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    7403             :       // MIs[0] src1
    7404             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7405             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    7406             :       // MIs[0] src2
    7407             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7408             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    7409             :       // (fdiv:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (VDIVSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    7410             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDrr,
    7411             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7412             :       GIR_Done,
    7413             :     // Label 271: @16292
    7414             :     GIM_Try, /*On fail goto*//*Label 272*/ 16333,
    7415             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    7416             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7417             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7418             :       // MIs[0] dst
    7419             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7420             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    7421             :       // MIs[0] src1
    7422             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7423             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    7424             :       // MIs[0] src2
    7425             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7426             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    7427             :       // (fdiv:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (DIVSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    7428             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSSrr,
    7429             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7430             :       GIR_Done,
    7431             :     // Label 272: @16333
    7432             :     GIM_Try, /*On fail goto*//*Label 273*/ 16374,
    7433             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    7434             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7435             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7436             :       // MIs[0] dst
    7437             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7438             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    7439             :       // MIs[0] src1
    7440             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7441             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    7442             :       // MIs[0] src2
    7443             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7444             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    7445             :       // (fdiv:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (DIVSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    7446             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSDrr,
    7447             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7448             :       GIR_Done,
    7449             :     // Label 273: @16374
    7450             :     GIM_Try, /*On fail goto*//*Label 274*/ 16415,
    7451             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7452             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7453             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7454             :       // MIs[0] dst
    7455             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7456             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
    7457             :       // MIs[0] src1
    7458             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7459             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
    7460             :       // MIs[0] src2
    7461             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7462             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
    7463             :       // (fdiv:f32 FR32X:f32:$src1, FR32X:f32:$src2)  =>  (VDIVSSZrr:f32 FR32X:f32:$src1, FR32X:f32:$src2)
    7464             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSZrr,
    7465             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7466             :       GIR_Done,
    7467             :     // Label 274: @16415
    7468             :     GIM_Try, /*On fail goto*//*Label 275*/ 16456,
    7469             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7470             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7471             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7472             :       // MIs[0] dst
    7473             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7474             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
    7475             :       // MIs[0] src1
    7476             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7477             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
    7478             :       // MIs[0] src2
    7479             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7480             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
    7481             :       // (fdiv:f64 FR64X:f64:$src1, FR64X:f64:$src2)  =>  (VDIVSDZrr:f64 FR64X:f64:$src1, FR64X:f64:$src2)
    7482             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDZrr,
    7483             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7484             :       GIR_Done,
    7485             :     // Label 275: @16456
    7486             :     GIM_Try, /*On fail goto*//*Label 276*/ 16497,
    7487             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7488             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7489             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7490             :       // MIs[0] dst
    7491             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    7492             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    7493             :       // MIs[0] src1
    7494             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    7495             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    7496             :       // MIs[0] src2
    7497             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    7498             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    7499             :       // (fdiv:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)  =>  (VDIVPSZrr:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)
    7500             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZrr,
    7501             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7502             :       GIR_Done,
    7503             :     // Label 276: @16497
    7504             :     GIM_Try, /*On fail goto*//*Label 277*/ 16538,
    7505             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7506             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7507             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7508             :       // MIs[0] dst
    7509             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    7510             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    7511             :       // MIs[0] src1
    7512             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    7513             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    7514             :       // MIs[0] src2
    7515             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    7516             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    7517             :       // (fdiv:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)  =>  (VDIVPDZrr:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)
    7518             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZrr,
    7519             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7520             :       GIR_Done,
    7521             :     // Label 277: @16538
    7522             :     GIM_Try, /*On fail goto*//*Label 278*/ 16579,
    7523             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7524             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7525             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7526             :       // MIs[0] dst
    7527             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7528             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    7529             :       // MIs[0] src1
    7530             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7531             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    7532             :       // MIs[0] src2
    7533             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7534             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    7535             :       // (fdiv:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)  =>  (VDIVPSZ128rr:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)
    7536             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ128rr,
    7537             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7538             :       GIR_Done,
    7539             :     // Label 278: @16579
    7540             :     GIM_Try, /*On fail goto*//*Label 279*/ 16620,
    7541             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7542             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7543             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7544             :       // MIs[0] dst
    7545             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    7546             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    7547             :       // MIs[0] src1
    7548             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    7549             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    7550             :       // MIs[0] src2
    7551             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    7552             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    7553             :       // (fdiv:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)  =>  (VDIVPSZ256rr:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)
    7554             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ256rr,
    7555             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7556             :       GIR_Done,
    7557             :     // Label 279: @16620
    7558             :     GIM_Try, /*On fail goto*//*Label 280*/ 16661,
    7559             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7560             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7561             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7562             :       // MIs[0] dst
    7563             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7564             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    7565             :       // MIs[0] src1
    7566             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7567             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    7568             :       // MIs[0] src2
    7569             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7570             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    7571             :       // (fdiv:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)  =>  (VDIVPDZ128rr:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)
    7572             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ128rr,
    7573             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7574             :       GIR_Done,
    7575             :     // Label 280: @16661
    7576             :     GIM_Try, /*On fail goto*//*Label 281*/ 16702,
    7577             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7578             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7579             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FDIV,
    7580             :       // MIs[0] dst
    7581             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    7582             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    7583             :       // MIs[0] src1
    7584             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    7585             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    7586             :       // MIs[0] src2
    7587             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    7588             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    7589             :       // (fdiv:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)  =>  (VDIVPDZ256rr:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)
    7590             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ256rr,
    7591             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7592             :       GIR_Done,
    7593             :     // Label 281: @16702
    7594             :     GIM_Try, /*On fail goto*//*Label 282*/ 16746,
    7595             :       GIM_CheckFeatures, GIFBS_FPStackf32,
    7596             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7597             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7598             :       // MIs[0] dst
    7599             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7600             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
    7601             :       // MIs[0] src1
    7602             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7603             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
    7604             :       // MIs[0] src2
    7605             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7606             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
    7607             :       // (fmul:f32 RFP32:f32:$src1, RFP32:f32:$src2)  =>  (MUL_Fp32:f32:i16 RFP32:f32:$src1, RFP32:f32:$src2)
    7608             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp32,
    7609             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7610             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7611             :       GIR_Done,
    7612             :     // Label 282: @16746
    7613             :     GIM_Try, /*On fail goto*//*Label 283*/ 16790,
    7614             :       GIM_CheckFeatures, GIFBS_FPStackf64,
    7615             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7616             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7617             :       // MIs[0] dst
    7618             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7619             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
    7620             :       // MIs[0] src1
    7621             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7622             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
    7623             :       // MIs[0] src2
    7624             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
    7626             :       // (fmul:f64 RFP64:f64:$src1, RFP64:f64:$src2)  =>  (MUL_Fp64:f64:i16 RFP64:f64:$src1, RFP64:f64:$src2)
    7627             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp64,
    7628             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7629             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7630             :       GIR_Done,
    7631             :     // Label 283: @16790
    7632             :     GIM_Try, /*On fail goto*//*Label 284*/ 16832,
    7633             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7634             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7635             :       // MIs[0] dst
    7636             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s80,
    7637             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
    7638             :       // MIs[0] src1
    7639             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
    7640             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
    7641             :       // MIs[0] src2
    7642             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
    7643             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
    7644             :       // (fmul:f80 RFP80:f80:$src1, RFP80:f80:$src2)  =>  (MUL_Fp80:f80:i16 RFP80:f80:$src1, RFP80:f80:$src2)
    7645             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp80,
    7646             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7647             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7648             :       GIR_Done,
    7649             :     // Label 284: @16832
    7650             :     GIM_Try, /*On fail goto*//*Label 285*/ 16873,
    7651             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7652             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7653             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7654             :       // MIs[0] dst
    7655             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7656             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7657             :       // MIs[0] src1
    7658             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7659             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7660             :       // MIs[0] src2
    7661             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7662             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7663             :       // (fmul:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (VMULPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    7664             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSrr,
    7665             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7666             :       GIR_Done,
    7667             :     // Label 285: @16873
    7668             :     GIM_Try, /*On fail goto*//*Label 286*/ 16914,
    7669             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7670             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7671             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7672             :       // MIs[0] dst
    7673             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7674             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7675             :       // MIs[0] src1
    7676             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7677             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7678             :       // MIs[0] src2
    7679             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7680             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7681             :       // (fmul:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (VMULPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    7682             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDrr,
    7683             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7684             :       GIR_Done,
    7685             :     // Label 286: @16914
    7686             :     GIM_Try, /*On fail goto*//*Label 287*/ 16955,
    7687             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7688             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7689             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7690             :       // MIs[0] dst
    7691             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    7692             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    7693             :       // MIs[0] src1
    7694             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    7695             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    7696             :       // MIs[0] src2
    7697             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    7698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    7699             :       // (fmul:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)  =>  (VMULPSYrr:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)
    7700             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSYrr,
    7701             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7702             :       GIR_Done,
    7703             :     // Label 287: @16955
    7704             :     GIM_Try, /*On fail goto*//*Label 288*/ 16996,
    7705             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    7706             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7707             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7708             :       // MIs[0] dst
    7709             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    7710             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    7711             :       // MIs[0] src1
    7712             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    7713             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    7714             :       // MIs[0] src2
    7715             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    7716             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    7717             :       // (fmul:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)  =>  (VMULPDYrr:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)
    7718             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDYrr,
    7719             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7720             :       GIR_Done,
    7721             :     // Label 288: @16996
    7722             :     GIM_Try, /*On fail goto*//*Label 289*/ 17037,
    7723             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    7724             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7725             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7726             :       // MIs[0] dst
    7727             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7728             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7729             :       // MIs[0] src1
    7730             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7731             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7732             :       // MIs[0] src2
    7733             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7734             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7735             :       // (fmul:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (MULPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    7736             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPSrr,
    7737             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7738             :       GIR_Done,
    7739             :     // Label 289: @17037
    7740             :     GIM_Try, /*On fail goto*//*Label 290*/ 17078,
    7741             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    7742             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7743             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7744             :       // MIs[0] dst
    7745             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7746             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    7747             :       // MIs[0] src1
    7748             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7749             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    7750             :       // MIs[0] src2
    7751             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7752             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    7753             :       // (fmul:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (MULPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    7754             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPDrr,
    7755             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7756             :       GIR_Done,
    7757             :     // Label 290: @17078
    7758             :     GIM_Try, /*On fail goto*//*Label 291*/ 17119,
    7759             :       GIM_CheckFeatures, GIFBS_UseAVX,
    7760             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7761             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7762             :       // MIs[0] dst
    7763             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7764             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    7765             :       // MIs[0] src1
    7766             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7767             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    7768             :       // MIs[0] src2
    7769             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7770             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    7771             :       // (fmul:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (VMULSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    7772             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSrr,
    7773             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7774             :       GIR_Done,
    7775             :     // Label 291: @17119
    7776             :     GIM_Try, /*On fail goto*//*Label 292*/ 17160,
    7777             :       GIM_CheckFeatures, GIFBS_UseAVX,
    7778             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7779             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7780             :       // MIs[0] dst
    7781             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7782             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    7783             :       // MIs[0] src1
    7784             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7785             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    7786             :       // MIs[0] src2
    7787             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    7789             :       // (fmul:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (VMULSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    7790             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDrr,
    7791             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7792             :       GIR_Done,
    7793             :     // Label 292: @17160
    7794             :     GIM_Try, /*On fail goto*//*Label 293*/ 17201,
    7795             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    7796             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7797             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7798             :       // MIs[0] dst
    7799             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7800             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    7801             :       // MIs[0] src1
    7802             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7803             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    7804             :       // MIs[0] src2
    7805             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7806             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    7807             :       // (fmul:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (MULSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    7808             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSSrr,
    7809             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7810             :       GIR_Done,
    7811             :     // Label 293: @17201
    7812             :     GIM_Try, /*On fail goto*//*Label 294*/ 17242,
    7813             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    7814             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7815             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7816             :       // MIs[0] dst
    7817             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7818             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    7819             :       // MIs[0] src1
    7820             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7821             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    7822             :       // MIs[0] src2
    7823             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7824             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    7825             :       // (fmul:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (MULSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    7826             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSDrr,
    7827             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7828             :       GIR_Done,
    7829             :     // Label 294: @17242
    7830             :     GIM_Try, /*On fail goto*//*Label 295*/ 17283,
    7831             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7832             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7833             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7834             :       // MIs[0] dst
    7835             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7836             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
    7837             :       // MIs[0] src1
    7838             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7839             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
    7840             :       // MIs[0] src2
    7841             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7842             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
    7843             :       // (fmul:f32 FR32X:f32:$src1, FR32X:f32:$src2)  =>  (VMULSSZrr:f32 FR32X:f32:$src1, FR32X:f32:$src2)
    7844             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSZrr,
    7845             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7846             :       GIR_Done,
    7847             :     // Label 295: @17283
    7848             :     GIM_Try, /*On fail goto*//*Label 296*/ 17324,
    7849             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7850             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7851             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7852             :       // MIs[0] dst
    7853             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7854             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
    7855             :       // MIs[0] src1
    7856             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    7857             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
    7858             :       // MIs[0] src2
    7859             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    7860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
    7861             :       // (fmul:f64 FR64X:f64:$src1, FR64X:f64:$src2)  =>  (VMULSDZrr:f64 FR64X:f64:$src1, FR64X:f64:$src2)
    7862             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDZrr,
    7863             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7864             :       GIR_Done,
    7865             :     // Label 296: @17324
    7866             :     GIM_Try, /*On fail goto*//*Label 297*/ 17365,
    7867             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7868             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7869             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7870             :       // MIs[0] dst
    7871             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    7872             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    7873             :       // MIs[0] src1
    7874             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    7875             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    7876             :       // MIs[0] src2
    7877             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    7878             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    7879             :       // (fmul:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)  =>  (VMULPSZrr:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)
    7880             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZrr,
    7881             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7882             :       GIR_Done,
    7883             :     // Label 297: @17365
    7884             :     GIM_Try, /*On fail goto*//*Label 298*/ 17406,
    7885             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    7886             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7887             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7888             :       // MIs[0] dst
    7889             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    7890             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    7891             :       // MIs[0] src1
    7892             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    7893             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    7894             :       // MIs[0] src2
    7895             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    7896             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    7897             :       // (fmul:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)  =>  (VMULPDZrr:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)
    7898             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZrr,
    7899             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7900             :       GIR_Done,
    7901             :     // Label 298: @17406
    7902             :     GIM_Try, /*On fail goto*//*Label 299*/ 17447,
    7903             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7904             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7905             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7906             :       // MIs[0] dst
    7907             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    7908             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    7909             :       // MIs[0] src1
    7910             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    7911             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    7912             :       // MIs[0] src2
    7913             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    7914             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    7915             :       // (fmul:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)  =>  (VMULPSZ128rr:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)
    7916             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ128rr,
    7917             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7918             :       GIR_Done,
    7919             :     // Label 299: @17447
    7920             :     GIM_Try, /*On fail goto*//*Label 300*/ 17488,
    7921             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7922             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7923             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7924             :       // MIs[0] dst
    7925             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    7926             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    7927             :       // MIs[0] src1
    7928             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    7929             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    7930             :       // MIs[0] src2
    7931             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    7932             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    7933             :       // (fmul:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)  =>  (VMULPSZ256rr:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)
    7934             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ256rr,
    7935             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7936             :       GIR_Done,
    7937             :     // Label 300: @17488
    7938             :     GIM_Try, /*On fail goto*//*Label 301*/ 17529,
    7939             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7940             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7941             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7942             :       // MIs[0] dst
    7943             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    7944             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    7945             :       // MIs[0] src1
    7946             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    7947             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    7948             :       // MIs[0] src2
    7949             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    7950             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    7951             :       // (fmul:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)  =>  (VMULPDZ128rr:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)
    7952             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ128rr,
    7953             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7954             :       GIR_Done,
    7955             :     // Label 301: @17529
    7956             :     GIM_Try, /*On fail goto*//*Label 302*/ 17570,
    7957             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    7958             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7959             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FMUL,
    7960             :       // MIs[0] dst
    7961             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    7962             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    7963             :       // MIs[0] src1
    7964             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    7965             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    7966             :       // MIs[0] src2
    7967             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    7968             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    7969             :       // (fmul:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)  =>  (VMULPDZ256rr:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)
    7970             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ256rr,
    7971             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7972             :       GIR_Done,
    7973             :     // Label 302: @17570
    7974             :     GIM_Try, /*On fail goto*//*Label 303*/ 17614,
    7975             :       GIM_CheckFeatures, GIFBS_FPStackf32,
    7976             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7977             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    7978             :       // MIs[0] dst
    7979             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    7980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
    7981             :       // MIs[0] src1
    7982             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    7983             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
    7984             :       // MIs[0] src2
    7985             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    7986             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
    7987             :       // (fsub:f32 RFP32:f32:$src1, RFP32:f32:$src2)  =>  (SUB_Fp32:f32:i16 RFP32:f32:$src1, RFP32:f32:$src2)
    7988             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp32,
    7989             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    7990             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    7991             :       GIR_Done,
    7992             :     // Label 303: @17614
    7993             :     GIM_Try, /*On fail goto*//*Label 304*/ 17658,
    7994             :       GIM_CheckFeatures, GIFBS_FPStackf64,
    7995             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    7996             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    7997             :       // MIs[0] dst
    7998             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    7999             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
    8000             :       // MIs[0] src1
    8001             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8002             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
    8003             :       // MIs[0] src2
    8004             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    8005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
    8006             :       // (fsub:f64 RFP64:f64:$src1, RFP64:f64:$src2)  =>  (SUB_Fp64:f64:i16 RFP64:f64:$src1, RFP64:f64:$src2)
    8007             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp64,
    8008             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    8009             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8010             :       GIR_Done,
    8011             :     // Label 304: @17658
    8012             :     GIM_Try, /*On fail goto*//*Label 305*/ 17700,
    8013             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8014             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8015             :       // MIs[0] dst
    8016             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s80,
    8017             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
    8018             :       // MIs[0] src1
    8019             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
    8020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
    8021             :       // MIs[0] src2
    8022             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
    8023             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
    8024             :       // (fsub:f80 RFP80:f80:$src1, RFP80:f80:$src2)  =>  (SUB_Fp80:f80:i16 RFP80:f80:$src1, RFP80:f80:$src2)
    8025             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp80,
    8026             :       GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
    8027             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8028             :       GIR_Done,
    8029             :     // Label 305: @17700
    8030             :     GIM_Try, /*On fail goto*//*Label 306*/ 17741,
    8031             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    8032             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8033             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8034             :       // MIs[0] dst
    8035             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8036             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8037             :       // MIs[0] src1
    8038             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8039             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    8040             :       // MIs[0] src2
    8041             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8042             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8043             :       // (fsub:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (VSUBPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    8044             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSrr,
    8045             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8046             :       GIR_Done,
    8047             :     // Label 306: @17741
    8048             :     GIM_Try, /*On fail goto*//*Label 307*/ 17782,
    8049             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    8050             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8051             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8052             :       // MIs[0] dst
    8053             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8054             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8055             :       // MIs[0] src1
    8056             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8057             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    8058             :       // MIs[0] src2
    8059             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8060             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8061             :       // (fsub:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (VSUBPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    8062             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDrr,
    8063             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8064             :       GIR_Done,
    8065             :     // Label 307: @17782
    8066             :     GIM_Try, /*On fail goto*//*Label 308*/ 17823,
    8067             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    8068             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8069             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8070             :       // MIs[0] dst
    8071             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    8072             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    8073             :       // MIs[0] src1
    8074             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    8075             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    8076             :       // MIs[0] src2
    8077             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    8078             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    8079             :       // (fsub:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)  =>  (VSUBPSYrr:v8f32 VR256:v8f32:$src1, VR256:v8f32:$src2)
    8080             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSYrr,
    8081             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8082             :       GIR_Done,
    8083             :     // Label 308: @17823
    8084             :     GIM_Try, /*On fail goto*//*Label 309*/ 17864,
    8085             :       GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
    8086             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8087             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8088             :       // MIs[0] dst
    8089             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    8090             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    8091             :       // MIs[0] src1
    8092             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    8093             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    8094             :       // MIs[0] src2
    8095             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    8096             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    8097             :       // (fsub:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)  =>  (VSUBPDYrr:v4f64 VR256:v4f64:$src1, VR256:v4f64:$src2)
    8098             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDYrr,
    8099             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8100             :       GIR_Done,
    8101             :     // Label 309: @17864
    8102             :     GIM_Try, /*On fail goto*//*Label 310*/ 17905,
    8103             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    8104             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8105             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8106             :       // MIs[0] dst
    8107             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8108             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8109             :       // MIs[0] src1
    8110             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8111             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    8112             :       // MIs[0] src2
    8113             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8114             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8115             :       // (fsub:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)  =>  (SUBPSrr:v4f32 VR128:v4f32:$src1, VR128:v4f32:$src2)
    8116             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPSrr,
    8117             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8118             :       GIR_Done,
    8119             :     // Label 310: @17905
    8120             :     GIM_Try, /*On fail goto*//*Label 311*/ 17946,
    8121             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    8122             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8123             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8124             :       // MIs[0] dst
    8125             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8126             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8127             :       // MIs[0] src1
    8128             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8129             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    8130             :       // MIs[0] src2
    8131             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8132             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8133             :       // (fsub:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)  =>  (SUBPDrr:v2f64 VR128:v2f64:$src1, VR128:v2f64:$src2)
    8134             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPDrr,
    8135             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8136             :       GIR_Done,
    8137             :     // Label 311: @17946
    8138             :     GIM_Try, /*On fail goto*//*Label 312*/ 17987,
    8139             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8140             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8141             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8142             :       // MIs[0] dst
    8143             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8144             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    8145             :       // MIs[0] src1
    8146             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    8147             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    8148             :       // MIs[0] src2
    8149             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    8150             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    8151             :       // (fsub:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (VSUBSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    8152             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSrr,
    8153             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8154             :       GIR_Done,
    8155             :     // Label 312: @17987
    8156             :     GIM_Try, /*On fail goto*//*Label 313*/ 18028,
    8157             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8158             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8159             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8160             :       // MIs[0] dst
    8161             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8162             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    8163             :       // MIs[0] src1
    8164             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8165             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    8166             :       // MIs[0] src2
    8167             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    8168             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    8169             :       // (fsub:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (VSUBSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    8170             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDrr,
    8171             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8172             :       GIR_Done,
    8173             :     // Label 313: @18028
    8174             :     GIM_Try, /*On fail goto*//*Label 314*/ 18069,
    8175             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    8176             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8177             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8178             :       // MIs[0] dst
    8179             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
    8181             :       // MIs[0] src1
    8182             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    8183             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
    8184             :       // MIs[0] src2
    8185             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    8186             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
    8187             :       // (fsub:f32 FR32:f32:$src1, FR32:f32:$src2)  =>  (SUBSSrr:f32 FR32:f32:$src1, FR32:f32:$src2)
    8188             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSSrr,
    8189             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8190             :       GIR_Done,
    8191             :     // Label 314: @18069
    8192             :     GIM_Try, /*On fail goto*//*Label 315*/ 18110,
    8193             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    8194             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8195             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8196             :       // MIs[0] dst
    8197             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8198             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
    8199             :       // MIs[0] src1
    8200             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8201             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
    8202             :       // MIs[0] src2
    8203             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    8204             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
    8205             :       // (fsub:f64 FR64:f64:$src1, FR64:f64:$src2)  =>  (SUBSDrr:f64 FR64:f64:$src1, FR64:f64:$src2)
    8206             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSDrr,
    8207             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8208             :       GIR_Done,
    8209             :     // Label 315: @18110
    8210             :     GIM_Try, /*On fail goto*//*Label 316*/ 18151,
    8211             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    8212             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8213             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8214             :       // MIs[0] dst
    8215             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8216             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
    8217             :       // MIs[0] src1
    8218             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    8219             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
    8220             :       // MIs[0] src2
    8221             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
    8222             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
    8223             :       // (fsub:f32 FR32X:f32:$src1, FR32X:f32:$src2)  =>  (VSUBSSZrr:f32 FR32X:f32:$src1, FR32X:f32:$src2)
    8224             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSZrr,
    8225             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8226             :       GIR_Done,
    8227             :     // Label 316: @18151
    8228             :     GIM_Try, /*On fail goto*//*Label 317*/ 18192,
    8229             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    8230             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8231             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8232             :       // MIs[0] dst
    8233             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8234             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
    8235             :       // MIs[0] src1
    8236             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    8237             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
    8238             :       // MIs[0] src2
    8239             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
    8240             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
    8241             :       // (fsub:f64 FR64X:f64:$src1, FR64X:f64:$src2)  =>  (VSUBSDZrr:f64 FR64X:f64:$src1, FR64X:f64:$src2)
    8242             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDZrr,
    8243             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8244             :       GIR_Done,
    8245             :     // Label 317: @18192
    8246             :     GIM_Try, /*On fail goto*//*Label 318*/ 18233,
    8247             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    8248             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8249             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8250             :       // MIs[0] dst
    8251             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    8252             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    8253             :       // MIs[0] src1
    8254             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    8255             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    8256             :       // MIs[0] src2
    8257             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    8258             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    8259             :       // (fsub:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)  =>  (VSUBPSZrr:v16f32 VR512:v16f32:$src1, VR512:v16f32:$src2)
    8260             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZrr,
    8261             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8262             :       GIR_Done,
    8263             :     // Label 318: @18233
    8264             :     GIM_Try, /*On fail goto*//*Label 319*/ 18274,
    8265             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    8266             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8267             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8268             :       // MIs[0] dst
    8269             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
    8270             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    8271             :       // MIs[0] src1
    8272             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
    8273             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    8274             :       // MIs[0] src2
    8275             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
    8276             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    8277             :       // (fsub:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)  =>  (VSUBPDZrr:v8f64 VR512:v8f64:$src1, VR512:v8f64:$src2)
    8278             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZrr,
    8279             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8280             :       GIR_Done,
    8281             :     // Label 319: @18274
    8282             :     GIM_Try, /*On fail goto*//*Label 320*/ 18315,
    8283             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    8284             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8285             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8286             :       // MIs[0] dst
    8287             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8288             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    8289             :       // MIs[0] src1
    8290             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    8291             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    8292             :       // MIs[0] src2
    8293             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8294             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    8295             :       // (fsub:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)  =>  (VSUBPSZ128rr:v4f32 VR128X:v4f32:$src1, VR128X:v4f32:$src2)
    8296             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ128rr,
    8297             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8298             :       GIR_Done,
    8299             :     // Label 320: @18315
    8300             :     GIM_Try, /*On fail goto*//*Label 321*/ 18356,
    8301             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    8302             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8303             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8304             :       // MIs[0] dst
    8305             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    8306             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    8307             :       // MIs[0] src1
    8308             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    8309             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    8310             :       // MIs[0] src2
    8311             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    8312             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    8313             :       // (fsub:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)  =>  (VSUBPSZ256rr:v8f32 VR256X:v8f32:$src1, VR256X:v8f32:$src2)
    8314             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ256rr,
    8315             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8316             :       GIR_Done,
    8317             :     // Label 321: @18356
    8318             :     GIM_Try, /*On fail goto*//*Label 322*/ 18397,
    8319             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    8320             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8321             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8322             :       // MIs[0] dst
    8323             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8324             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
    8325             :       // MIs[0] src1
    8326             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    8327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
    8328             :       // MIs[0] src2
    8329             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8330             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    8331             :       // (fsub:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)  =>  (VSUBPDZ128rr:v2f64 VR128X:v2f64:$src1, VR128X:v2f64:$src2)
    8332             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ128rr,
    8333             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8334             :       GIR_Done,
    8335             :     // Label 322: @18397
    8336             :     GIM_Try, /*On fail goto*//*Label 323*/ 18438,
    8337             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    8338             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8339             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FSUB,
    8340             :       // MIs[0] dst
    8341             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    8342             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    8343             :       // MIs[0] src1
    8344             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    8345             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
    8346             :       // MIs[0] src2
    8347             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    8348             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
    8349             :       // (fsub:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)  =>  (VSUBPDZ256rr:v4f64 VR256X:v4f64:$src1, VR256X:v4f64:$src2)
    8350             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ256rr,
    8351             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8352             :       GIR_Done,
    8353             :     // Label 323: @18438
    8354             :     GIM_Try, /*On fail goto*//*Label 324*/ 18484,
    8355             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8356             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8357             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8358             :       // MIs[0] dst
    8359             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8360             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8361             :       // MIs[0] Operand 1
    8362             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubwd,
    8363             :       // MIs[0] src
    8364             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8365             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8366             :       // (intrinsic_wo_chain:v4i32 6038:iPTR, VR128:v8i16:$src)  =>  (VPHSUBWDrr:v4i32 VR128:v8i16:$src)
    8367             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBWDrr,
    8368             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8369             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8370             :       GIR_EraseFromParent, /*InsnID*/0,
    8371             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8372             :       GIR_Done,
    8373             :     // Label 324: @18484
    8374             :     GIM_Try, /*On fail goto*//*Label 325*/ 18530,
    8375             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8376             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8377             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8378             :       // MIs[0] dst
    8379             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8380             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8381             :       // MIs[0] Operand 1
    8382             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubdq,
    8383             :       // MIs[0] src
    8384             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8386             :       // (intrinsic_wo_chain:v2i64 6037:iPTR, VR128:v4i32:$src)  =>  (VPHSUBDQrr:v2i64 VR128:v4i32:$src)
    8387             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBDQrr,
    8388             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8389             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8390             :       GIR_EraseFromParent, /*InsnID*/0,
    8391             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8392             :       GIR_Done,
    8393             :     // Label 325: @18530
    8394             :     GIM_Try, /*On fail goto*//*Label 326*/ 18576,
    8395             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8396             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8397             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8398             :       // MIs[0] dst
    8399             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8400             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8401             :       // MIs[0] Operand 1
    8402             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubbw,
    8403             :       // MIs[0] src
    8404             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8405             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8406             :       // (intrinsic_wo_chain:v8i16 6036:iPTR, VR128:v16i8:$src)  =>  (VPHSUBBWrr:v8i16 VR128:v16i8:$src)
    8407             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBBWrr,
    8408             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8409             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8410             :       GIR_EraseFromParent, /*InsnID*/0,
    8411             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8412             :       GIR_Done,
    8413             :     // Label 326: @18576
    8414             :     GIM_Try, /*On fail goto*//*Label 327*/ 18622,
    8415             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8416             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8417             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8418             :       // MIs[0] dst
    8419             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8420             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8421             :       // MIs[0] Operand 1
    8422             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwq,
    8423             :       // MIs[0] src
    8424             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8425             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8426             :       // (intrinsic_wo_chain:v2i64 6035:iPTR, VR128:v8i16:$src)  =>  (VPHADDWQrr:v2i64 VR128:v8i16:$src)
    8427             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWQrr,
    8428             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8429             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8430             :       GIR_EraseFromParent, /*InsnID*/0,
    8431             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8432             :       GIR_Done,
    8433             :     // Label 327: @18622
    8434             :     GIM_Try, /*On fail goto*//*Label 328*/ 18668,
    8435             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8436             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8437             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8438             :       // MIs[0] dst
    8439             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8440             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8441             :       // MIs[0] Operand 1
    8442             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwd,
    8443             :       // MIs[0] src
    8444             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8445             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8446             :       // (intrinsic_wo_chain:v4i32 6034:iPTR, VR128:v8i16:$src)  =>  (VPHADDWDrr:v4i32 VR128:v8i16:$src)
    8447             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWDrr,
    8448             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8449             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8450             :       GIR_EraseFromParent, /*InsnID*/0,
    8451             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8452             :       GIR_Done,
    8453             :     // Label 328: @18668
    8454             :     GIM_Try, /*On fail goto*//*Label 329*/ 18714,
    8455             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8456             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8457             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8458             :       // MIs[0] dst
    8459             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8460             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8461             :       // MIs[0] Operand 1
    8462             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwq,
    8463             :       // MIs[0] src
    8464             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8465             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8466             :       // (intrinsic_wo_chain:v2i64 6033:iPTR, VR128:v8i16:$src)  =>  (VPHADDUWQrr:v2i64 VR128:v8i16:$src)
    8467             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWQrr,
    8468             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8469             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8470             :       GIR_EraseFromParent, /*InsnID*/0,
    8471             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8472             :       GIR_Done,
    8473             :     // Label 329: @18714
    8474             :     GIM_Try, /*On fail goto*//*Label 330*/ 18760,
    8475             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8476             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8477             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8478             :       // MIs[0] dst
    8479             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8480             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8481             :       // MIs[0] Operand 1
    8482             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwd,
    8483             :       // MIs[0] src
    8484             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    8485             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8486             :       // (intrinsic_wo_chain:v4i32 6032:iPTR, VR128:v8i16:$src)  =>  (VPHADDUWDrr:v4i32 VR128:v8i16:$src)
    8487             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWDrr,
    8488             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8489             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8490             :       GIR_EraseFromParent, /*InsnID*/0,
    8491             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8492             :       GIR_Done,
    8493             :     // Label 330: @18760
    8494             :     GIM_Try, /*On fail goto*//*Label 331*/ 18806,
    8495             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8496             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8497             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8498             :       // MIs[0] dst
    8499             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8500             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8501             :       // MIs[0] Operand 1
    8502             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddudq,
    8503             :       // MIs[0] src
    8504             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8505             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8506             :       // (intrinsic_wo_chain:v2i64 6031:iPTR, VR128:v4i32:$src)  =>  (VPHADDUDQrr:v2i64 VR128:v4i32:$src)
    8507             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUDQrr,
    8508             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8509             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8510             :       GIR_EraseFromParent, /*InsnID*/0,
    8511             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8512             :       GIR_Done,
    8513             :     // Label 331: @18806
    8514             :     GIM_Try, /*On fail goto*//*Label 332*/ 18852,
    8515             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8516             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8517             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8518             :       // MIs[0] dst
    8519             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8520             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8521             :       // MIs[0] Operand 1
    8522             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubw,
    8523             :       // MIs[0] src
    8524             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8525             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8526             :       // (intrinsic_wo_chain:v8i16 6030:iPTR, VR128:v16i8:$src)  =>  (VPHADDUBWrr:v8i16 VR128:v16i8:$src)
    8527             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBWrr,
    8528             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8529             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8530             :       GIR_EraseFromParent, /*InsnID*/0,
    8531             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8532             :       GIR_Done,
    8533             :     // Label 332: @18852
    8534             :     GIM_Try, /*On fail goto*//*Label 333*/ 18898,
    8535             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8536             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8537             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8538             :       // MIs[0] dst
    8539             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8540             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8541             :       // MIs[0] Operand 1
    8542             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubq,
    8543             :       // MIs[0] src
    8544             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8545             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8546             :       // (intrinsic_wo_chain:v2i64 6029:iPTR, VR128:v16i8:$src)  =>  (VPHADDUBQrr:v2i64 VR128:v16i8:$src)
    8547             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBQrr,
    8548             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8549             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8550             :       GIR_EraseFromParent, /*InsnID*/0,
    8551             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8552             :       GIR_Done,
    8553             :     // Label 333: @18898
    8554             :     GIM_Try, /*On fail goto*//*Label 334*/ 18944,
    8555             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8556             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8557             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8558             :       // MIs[0] dst
    8559             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8560             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8561             :       // MIs[0] Operand 1
    8562             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubd,
    8563             :       // MIs[0] src
    8564             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8565             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8566             :       // (intrinsic_wo_chain:v4i32 6028:iPTR, VR128:v16i8:$src)  =>  (VPHADDUBDrr:v4i32 VR128:v16i8:$src)
    8567             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBDrr,
    8568             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8569             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8570             :       GIR_EraseFromParent, /*InsnID*/0,
    8571             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8572             :       GIR_Done,
    8573             :     // Label 334: @18944
    8574             :     GIM_Try, /*On fail goto*//*Label 335*/ 18990,
    8575             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8576             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8577             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8578             :       // MIs[0] dst
    8579             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8580             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8581             :       // MIs[0] Operand 1
    8582             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadddq,
    8583             :       // MIs[0] src
    8584             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8585             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8586             :       // (intrinsic_wo_chain:v2i64 6027:iPTR, VR128:v4i32:$src)  =>  (VPHADDDQrr:v2i64 VR128:v4i32:$src)
    8587             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDDQrr,
    8588             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8589             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8590             :       GIR_EraseFromParent, /*InsnID*/0,
    8591             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8592             :       GIR_Done,
    8593             :     // Label 335: @18990
    8594             :     GIM_Try, /*On fail goto*//*Label 336*/ 19036,
    8595             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8596             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8597             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8598             :       // MIs[0] dst
    8599             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    8600             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8601             :       // MIs[0] Operand 1
    8602             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbw,
    8603             :       // MIs[0] src
    8604             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8605             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8606             :       // (intrinsic_wo_chain:v8i16 6026:iPTR, VR128:v16i8:$src)  =>  (VPHADDBWrr:v8i16 VR128:v16i8:$src)
    8607             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBWrr,
    8608             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8609             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8610             :       GIR_EraseFromParent, /*InsnID*/0,
    8611             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8612             :       GIR_Done,
    8613             :     // Label 336: @19036
    8614             :     GIM_Try, /*On fail goto*//*Label 337*/ 19082,
    8615             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8616             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8617             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8618             :       // MIs[0] dst
    8619             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8620             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8621             :       // MIs[0] Operand 1
    8622             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbq,
    8623             :       // MIs[0] src
    8624             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8625             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8626             :       // (intrinsic_wo_chain:v2i64 6025:iPTR, VR128:v16i8:$src)  =>  (VPHADDBQrr:v2i64 VR128:v16i8:$src)
    8627             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBQrr,
    8628             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8629             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8630             :       GIR_EraseFromParent, /*InsnID*/0,
    8631             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8632             :       GIR_Done,
    8633             :     // Label 337: @19082
    8634             :     GIM_Try, /*On fail goto*//*Label 338*/ 19128,
    8635             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8636             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8637             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8638             :       // MIs[0] dst
    8639             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8640             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8641             :       // MIs[0] Operand 1
    8642             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbd,
    8643             :       // MIs[0] src
    8644             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
    8645             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8646             :       // (intrinsic_wo_chain:v4i32 6024:iPTR, VR128:v16i8:$src)  =>  (VPHADDBDrr:v4i32 VR128:v16i8:$src)
    8647             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBDrr,
    8648             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8649             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8650             :       GIR_EraseFromParent, /*InsnID*/0,
    8651             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8652             :       GIR_Done,
    8653             :     // Label 338: @19128
    8654             :     GIM_Try, /*On fail goto*//*Label 339*/ 19174,
    8655             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8656             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8657             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8658             :       // MIs[0] dst
    8659             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8660             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8661             :       // MIs[0] Operand 1
    8662             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ss,
    8663             :       // MIs[0] src
    8664             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8665             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8666             :       // (intrinsic_wo_chain:v4f32 6011:iPTR, VR128:v4f32:$src)  =>  (VFRCZSSrr:v4f32 VR128:v4f32:$src)
    8667             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSSrr,
    8668             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8669             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8670             :       GIR_EraseFromParent, /*InsnID*/0,
    8671             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8672             :       GIR_Done,
    8673             :     // Label 339: @19174
    8674             :     GIM_Try, /*On fail goto*//*Label 340*/ 19220,
    8675             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8676             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8677             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8678             :       // MIs[0] dst
    8679             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    8680             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8681             :       // MIs[0] Operand 1
    8682             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps,
    8683             :       // MIs[0] src
    8684             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8685             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8686             :       // (intrinsic_wo_chain:v4f32 6008:iPTR, VR128:v4f32:$src)  =>  (VFRCZPSrr:v4f32 VR128:v4f32:$src)
    8687             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSrr,
    8688             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8689             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8690             :       GIR_EraseFromParent, /*InsnID*/0,
    8691             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8692             :       GIR_Done,
    8693             :     // Label 340: @19220
    8694             :     GIM_Try, /*On fail goto*//*Label 341*/ 19266,
    8695             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8696             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8697             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8698             :       // MIs[0] dst
    8699             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    8700             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    8701             :       // MIs[0] Operand 1
    8702             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps_256,
    8703             :       // MIs[0] src
    8704             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    8705             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    8706             :       // (intrinsic_wo_chain:v8f32 6009:iPTR, VR256:v8f32:$src)  =>  (VFRCZPSrrY:v8f32 VR256:v8f32:$src)
    8707             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSrrY,
    8708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8709             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8710             :       GIR_EraseFromParent, /*InsnID*/0,
    8711             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8712             :       GIR_Done,
    8713             :     // Label 341: @19266
    8714             :     GIM_Try, /*On fail goto*//*Label 342*/ 19312,
    8715             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8716             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8717             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8718             :       // MIs[0] dst
    8719             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8720             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8721             :       // MIs[0] Operand 1
    8722             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_sd,
    8723             :       // MIs[0] src
    8724             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8725             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8726             :       // (intrinsic_wo_chain:v2f64 6010:iPTR, VR128:v2f64:$src)  =>  (VFRCZSDrr:v2f64 VR128:v2f64:$src)
    8727             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSDrr,
    8728             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8729             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8730             :       GIR_EraseFromParent, /*InsnID*/0,
    8731             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8732             :       GIR_Done,
    8733             :     // Label 342: @19312
    8734             :     GIM_Try, /*On fail goto*//*Label 343*/ 19358,
    8735             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8736             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8737             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8738             :       // MIs[0] dst
    8739             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    8740             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    8741             :       // MIs[0] Operand 1
    8742             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd,
    8743             :       // MIs[0] src
    8744             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8745             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8746             :       // (intrinsic_wo_chain:v2f64 6006:iPTR, VR128:v2f64:$src)  =>  (VFRCZPDrr:v2f64 VR128:v2f64:$src)
    8747             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDrr,
    8748             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8749             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8750             :       GIR_EraseFromParent, /*InsnID*/0,
    8751             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8752             :       GIR_Done,
    8753             :     // Label 343: @19358
    8754             :     GIM_Try, /*On fail goto*//*Label 344*/ 19404,
    8755             :       GIM_CheckFeatures, GIFBS_HasXOP,
    8756             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8757             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8758             :       // MIs[0] dst
    8759             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    8760             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    8761             :       // MIs[0] Operand 1
    8762             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd_256,
    8763             :       // MIs[0] src
    8764             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    8765             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    8766             :       // (intrinsic_wo_chain:v4f64 6007:iPTR, VR256:v4f64:$src)  =>  (VFRCZPDrrY:v4f64 VR256:v4f64:$src)
    8767             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDrrY,
    8768             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8769             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8770             :       GIR_EraseFromParent, /*InsnID*/0,
    8771             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8772             :       GIR_Done,
    8773             :     // Label 344: @19404
    8774             :     GIM_Try, /*On fail goto*//*Label 345*/ 19450,
    8775             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8776             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8777             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8778             :       // MIs[0] dst
    8779             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8780             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    8781             :       // MIs[0] Operand 1
    8782             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si,
    8783             :       // MIs[0] src
    8784             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8785             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8786             :       // (intrinsic_wo_chain:i32 5854:iPTR, VR128:v2f64:$src)  =>  (VCVTSD2SIrr:i32 VR128:v2f64:$src)
    8787             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SIrr,
    8788             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8789             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8790             :       GIR_EraseFromParent, /*InsnID*/0,
    8791             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8792             :       GIR_Done,
    8793             :     // Label 345: @19450
    8794             :     GIM_Try, /*On fail goto*//*Label 346*/ 19496,
    8795             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8796             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8797             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8798             :       // MIs[0] dst
    8799             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8800             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    8801             :       // MIs[0] Operand 1
    8802             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si64,
    8803             :       // MIs[0] src
    8804             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8805             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8806             :       // (intrinsic_wo_chain:i64 5855:iPTR, VR128:v2f64:$src)  =>  (VCVTSD2SI64rr:i64 VR128:v2f64:$src)
    8807             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SI64rr,
    8808             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8809             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8810             :       GIR_EraseFromParent, /*InsnID*/0,
    8811             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8812             :       GIR_Done,
    8813             :     // Label 346: @19496
    8814             :     GIM_Try, /*On fail goto*//*Label 347*/ 19542,
    8815             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    8816             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8817             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8818             :       // MIs[0] dst
    8819             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8820             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    8821             :       // MIs[0] Operand 1
    8822             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si,
    8823             :       // MIs[0] src
    8824             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8825             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8826             :       // (intrinsic_wo_chain:i32 5854:iPTR, VR128:v2f64:$src)  =>  (CVTSD2SIrr:i32 VR128:v2f64:$src)
    8827             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSD2SIrr,
    8828             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8829             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8830             :       GIR_EraseFromParent, /*InsnID*/0,
    8831             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8832             :       GIR_Done,
    8833             :     // Label 347: @19542
    8834             :     GIM_Try, /*On fail goto*//*Label 348*/ 19588,
    8835             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    8836             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8837             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8838             :       // MIs[0] dst
    8839             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8840             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    8841             :       // MIs[0] Operand 1
    8842             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si64,
    8843             :       // MIs[0] src
    8844             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8845             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8846             :       // (intrinsic_wo_chain:i64 5855:iPTR, VR128:v2f64:$src)  =>  (CVTSD2SI64rr:i64 VR128:v2f64:$src)
    8847             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSD2SI64rr,
    8848             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8849             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8850             :       GIR_EraseFromParent, /*InsnID*/0,
    8851             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8852             :       GIR_Done,
    8853             :     // Label 348: @19588
    8854             :     GIM_Try, /*On fail goto*//*Label 349*/ 19634,
    8855             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8856             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8857             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8858             :       // MIs[0] dst
    8859             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8860             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    8861             :       // MIs[0] Operand 1
    8862             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si,
    8863             :       // MIs[0] src
    8864             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8865             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8866             :       // (intrinsic_wo_chain:i32 5818:iPTR, VR128:v4f32:$src)  =>  (Int_VCVTTSS2SIrr:i32 VR128:v4f32:$src)
    8867             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTTSS2SIrr,
    8868             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8869             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8870             :       GIR_EraseFromParent, /*InsnID*/0,
    8871             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8872             :       GIR_Done,
    8873             :     // Label 349: @19634
    8874             :     GIM_Try, /*On fail goto*//*Label 350*/ 19680,
    8875             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8876             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8877             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8878             :       // MIs[0] dst
    8879             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8880             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    8881             :       // MIs[0] Operand 1
    8882             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si64,
    8883             :       // MIs[0] src
    8884             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8885             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8886             :       // (intrinsic_wo_chain:i64 5819:iPTR, VR128:v4f32:$src)  =>  (Int_VCVTTSS2SI64rr:i64 VR128:v4f32:$src)
    8887             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTTSS2SI64rr,
    8888             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8889             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8890             :       GIR_EraseFromParent, /*InsnID*/0,
    8891             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8892             :       GIR_Done,
    8893             :     // Label 350: @19680
    8894             :     GIM_Try, /*On fail goto*//*Label 351*/ 19726,
    8895             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8896             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8897             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8898             :       // MIs[0] dst
    8899             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8900             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    8901             :       // MIs[0] Operand 1
    8902             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si,
    8903             :       // MIs[0] src
    8904             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8905             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8906             :       // (intrinsic_wo_chain:i32 5862:iPTR, VR128:v2f64:$src)  =>  (Int_VCVTTSD2SIrr:i32 VR128:v2f64:$src)
    8907             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTTSD2SIrr,
    8908             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8909             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8910             :       GIR_EraseFromParent, /*InsnID*/0,
    8911             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8912             :       GIR_Done,
    8913             :     // Label 351: @19726
    8914             :     GIM_Try, /*On fail goto*//*Label 352*/ 19772,
    8915             :       GIM_CheckFeatures, GIFBS_UseAVX,
    8916             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8917             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8918             :       // MIs[0] dst
    8919             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8920             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    8921             :       // MIs[0] Operand 1
    8922             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si64,
    8923             :       // MIs[0] src
    8924             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8926             :       // (intrinsic_wo_chain:i64 5863:iPTR, VR128:v2f64:$src)  =>  (Int_VCVTTSD2SI64rr:i64 VR128:v2f64:$src)
    8927             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_VCVTTSD2SI64rr,
    8928             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8929             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8930             :       GIR_EraseFromParent, /*InsnID*/0,
    8931             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8932             :       GIR_Done,
    8933             :     // Label 352: @19772
    8934             :     GIM_Try, /*On fail goto*//*Label 353*/ 19818,
    8935             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    8936             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8937             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8938             :       // MIs[0] dst
    8939             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8940             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    8941             :       // MIs[0] Operand 1
    8942             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si,
    8943             :       // MIs[0] src
    8944             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8945             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8946             :       // (intrinsic_wo_chain:i32 5818:iPTR, VR128:v4f32:$src)  =>  (Int_CVTTSS2SIrr:i32 VR128:v4f32:$src)
    8947             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTTSS2SIrr,
    8948             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8949             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8950             :       GIR_EraseFromParent, /*InsnID*/0,
    8951             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8952             :       GIR_Done,
    8953             :     // Label 353: @19818
    8954             :     GIM_Try, /*On fail goto*//*Label 354*/ 19864,
    8955             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    8956             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8957             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8958             :       // MIs[0] dst
    8959             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    8960             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    8961             :       // MIs[0] Operand 1
    8962             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si64,
    8963             :       // MIs[0] src
    8964             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    8965             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8966             :       // (intrinsic_wo_chain:i64 5819:iPTR, VR128:v4f32:$src)  =>  (Int_CVTTSS2SI64rr:i64 VR128:v4f32:$src)
    8967             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTTSS2SI64rr,
    8968             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8969             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8970             :       GIR_EraseFromParent, /*InsnID*/0,
    8971             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8972             :       GIR_Done,
    8973             :     // Label 354: @19864
    8974             :     GIM_Try, /*On fail goto*//*Label 355*/ 19910,
    8975             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    8976             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8977             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8978             :       // MIs[0] dst
    8979             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    8980             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    8981             :       // MIs[0] Operand 1
    8982             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si,
    8983             :       // MIs[0] src
    8984             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    8985             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    8986             :       // (intrinsic_wo_chain:i32 5862:iPTR, VR128:v2f64:$src)  =>  (Int_CVTTSD2SIrr:i32 VR128:v2f64:$src)
    8987             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTTSD2SIrr,
    8988             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    8989             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    8990             :       GIR_EraseFromParent, /*InsnID*/0,
    8991             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    8992             :       GIR_Done,
    8993             :     // Label 355: @19910
    8994             :     GIM_Try, /*On fail goto*//*Label 356*/ 19956,
    8995             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    8996             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    8997             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    8998             :       // MIs[0] dst
    8999             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9000             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9001             :       // MIs[0] Operand 1
    9002             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si64,
    9003             :       // MIs[0] src
    9004             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9005             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9006             :       // (intrinsic_wo_chain:i64 5863:iPTR, VR128:v2f64:$src)  =>  (Int_CVTTSD2SI64rr:i64 VR128:v2f64:$src)
    9007             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::Int_CVTTSD2SI64rr,
    9008             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9009             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9010             :       GIR_EraseFromParent, /*InsnID*/0,
    9011             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9012             :       GIR_Done,
    9013             :     // Label 356: @19956
    9014             :     GIM_Try, /*On fail goto*//*Label 357*/ 20002,
    9015             :       GIM_CheckFeatures, GIFBS_UseAVX,
    9016             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9017             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9018             :       // MIs[0] dst
    9019             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9020             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9021             :       // MIs[0] Operand 1
    9022             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si,
    9023             :       // MIs[0] src
    9024             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9025             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9026             :       // (intrinsic_wo_chain:i32 5814:iPTR, VR128:v4f32:$src)  =>  (VCVTSS2SIrr:i32 VR128:v4f32:$src)
    9027             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SIrr,
    9028             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9029             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9030             :       GIR_EraseFromParent, /*InsnID*/0,
    9031             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9032             :       GIR_Done,
    9033             :     // Label 357: @20002
    9034             :     GIM_Try, /*On fail goto*//*Label 358*/ 20048,
    9035             :       GIM_CheckFeatures, GIFBS_UseAVX,
    9036             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9037             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9038             :       // MIs[0] dst
    9039             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9040             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9041             :       // MIs[0] Operand 1
    9042             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si64,
    9043             :       // MIs[0] src
    9044             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9045             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9046             :       // (intrinsic_wo_chain:i64 5815:iPTR, VR128:v4f32:$src)  =>  (VCVTSS2SI64rr:i64 VR128:v4f32:$src)
    9047             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SI64rr,
    9048             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9049             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9050             :       GIR_EraseFromParent, /*InsnID*/0,
    9051             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9052             :       GIR_Done,
    9053             :     // Label 358: @20048
    9054             :     GIM_Try, /*On fail goto*//*Label 359*/ 20094,
    9055             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    9056             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9057             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9058             :       // MIs[0] dst
    9059             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9060             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9061             :       // MIs[0] Operand 1
    9062             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si,
    9063             :       // MIs[0] src
    9064             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9065             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9066             :       // (intrinsic_wo_chain:i32 5814:iPTR, VR128:v4f32:$src)  =>  (CVTSS2SIrr:i32 VR128:v4f32:$src)
    9067             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSS2SIrr,
    9068             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9069             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9070             :       GIR_EraseFromParent, /*InsnID*/0,
    9071             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9072             :       GIR_Done,
    9073             :     // Label 359: @20094
    9074             :     GIM_Try, /*On fail goto*//*Label 360*/ 20140,
    9075             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    9076             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9077             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9078             :       // MIs[0] dst
    9079             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9080             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9081             :       // MIs[0] Operand 1
    9082             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si64,
    9083             :       // MIs[0] src
    9084             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9085             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9086             :       // (intrinsic_wo_chain:i64 5815:iPTR, VR128:v4f32:$src)  =>  (CVTSS2SI64rr:i64 VR128:v4f32:$src)
    9087             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSS2SI64rr,
    9088             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9089             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9090             :       GIR_EraseFromParent, /*InsnID*/0,
    9091             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9092             :       GIR_Done,
    9093             :     // Label 360: @20140
    9094             :     GIM_Try, /*On fail goto*//*Label 361*/ 20186,
    9095             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9096             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9097             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9098             :       // MIs[0] dst
    9099             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9100             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9101             :       // MIs[0] Operand 1
    9102             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtps2dq,
    9103             :       // MIs[0] src
    9104             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9105             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9106             :       // (intrinsic_wo_chain:v4i32 5853:iPTR, VR128:v4f32:$src)  =>  (VCVTPS2DQrr:v4i32 VR128:v4f32:$src)
    9107             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTPS2DQrr,
    9108             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9109             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9110             :       GIR_EraseFromParent, /*InsnID*/0,
    9111             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9112             :       GIR_Done,
    9113             :     // Label 361: @20186
    9114             :     GIM_Try, /*On fail goto*//*Label 362*/ 20232,
    9115             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9116             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9117             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9118             :       // MIs[0] dst
    9119             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    9120             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    9121             :       // MIs[0] Operand 1
    9122             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_cvt_ps2dq_256,
    9123             :       // MIs[0] src
    9124             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    9125             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    9126             :       // (intrinsic_wo_chain:v8i32 4675:iPTR, VR256:v8f32:$src)  =>  (VCVTPS2DQYrr:v8i32 VR256:v8f32:$src)
    9127             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTPS2DQYrr,
    9128             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9129             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9130             :       GIR_EraseFromParent, /*InsnID*/0,
    9131             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9132             :       GIR_Done,
    9133             :     // Label 362: @20232
    9134             :     GIM_Try, /*On fail goto*//*Label 363*/ 20278,
    9135             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    9136             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9137             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9138             :       // MIs[0] dst
    9139             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9140             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9141             :       // MIs[0] Operand 1
    9142             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtps2dq,
    9143             :       // MIs[0] src
    9144             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9145             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9146             :       // (intrinsic_wo_chain:v4i32 5853:iPTR, VR128:v4f32:$src)  =>  (CVTPS2DQrr:v4i32 VR128:v4f32:$src)
    9147             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTPS2DQrr,
    9148             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9149             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9150             :       GIR_EraseFromParent, /*InsnID*/0,
    9151             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9152             :       GIR_Done,
    9153             :     // Label 363: @20278
    9154             :     GIM_Try, /*On fail goto*//*Label 364*/ 20324,
    9155             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9156             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9157             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9158             :       // MIs[0] dst
    9159             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9160             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9161             :       // MIs[0] Operand 1
    9162             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_phminposuw,
    9163             :       // MIs[0] src
    9164             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9165             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9166             :       // (intrinsic_wo_chain:v8i16 5931:iPTR, VR128:v8i16:$src)  =>  (VPHMINPOSUWrr128:v8i16 VR128:v8i16:$src)
    9167             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHMINPOSUWrr128,
    9168             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9169             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9170             :       GIR_EraseFromParent, /*InsnID*/0,
    9171             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9172             :       GIR_Done,
    9173             :     // Label 364: @20324
    9174             :     GIM_Try, /*On fail goto*//*Label 365*/ 20370,
    9175             :       GIM_CheckFeatures, GIFBS_UseSSE41,
    9176             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9177             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9178             :       // MIs[0] dst
    9179             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
    9180             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9181             :       // MIs[0] Operand 1
    9182             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_phminposuw,
    9183             :       // MIs[0] src
    9184             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9185             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9186             :       // (intrinsic_wo_chain:v8i16 5931:iPTR, VR128:v8i16:$src)  =>  (PHMINPOSUWrr128:v8i16 VR128:v8i16:$src)
    9187             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHMINPOSUWrr128,
    9188             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9189             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9190             :       GIR_EraseFromParent, /*InsnID*/0,
    9191             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9192             :       GIR_Done,
    9193             :     // Label 365: @20370
    9194             :     GIM_Try, /*On fail goto*//*Label 366*/ 20416,
    9195             :       GIM_CheckFeatures, GIFBS_HasAVX_HasAES,
    9196             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9197             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9198             :       // MIs[0] dst
    9199             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    9200             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9201             :       // MIs[0] Operand 1
    9202             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc,
    9203             :       // MIs[0] src1
    9204             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9205             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9206             :       // (intrinsic_wo_chain:v2i64 4665:iPTR, VR128:v2i64:$src1)  =>  (VAESIMCrr:v2i64 VR128:v2i64:$src1)
    9207             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESIMCrr,
    9208             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9209             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    9210             :       GIR_EraseFromParent, /*InsnID*/0,
    9211             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9212             :       GIR_Done,
    9213             :     // Label 366: @20416
    9214             :     GIM_Try, /*On fail goto*//*Label 367*/ 20462,
    9215             :       GIM_CheckFeatures, GIFBS_HasAES,
    9216             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9217             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9218             :       // MIs[0] dst
    9219             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    9220             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9221             :       // MIs[0] Operand 1
    9222             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc,
    9223             :       // MIs[0] src1
    9224             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9225             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9226             :       // (intrinsic_wo_chain:v2i64 4665:iPTR, VR128:v2i64:$src1)  =>  (AESIMCrr:v2i64 VR128:v2i64:$src1)
    9227             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESIMCrr,
    9228             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9229             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
    9230             :       GIR_EraseFromParent, /*InsnID*/0,
    9231             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9232             :       GIR_Done,
    9233             :     // Label 367: @20462
    9234             :     GIM_Try, /*On fail goto*//*Label 368*/ 20508,
    9235             :       GIM_CheckFeatures, GIFBS_HasF16C,
    9236             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9237             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9238             :       // MIs[0] dst
    9239             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9240             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9241             :       // MIs[0] Operand 1
    9242             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtph2ps_128,
    9243             :       // MIs[0] src
    9244             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9245             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9246             :       // (intrinsic_wo_chain:v4f32 5993:iPTR, VR128:v8i16:$src)  =>  (VCVTPH2PSrr:v4f32 VR128:v8i16:$src)
    9247             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTPH2PSrr,
    9248             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9249             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9250             :       GIR_EraseFromParent, /*InsnID*/0,
    9251             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9252             :       GIR_Done,
    9253             :     // Label 368: @20508
    9254             :     GIM_Try, /*On fail goto*//*Label 369*/ 20554,
    9255             :       GIM_CheckFeatures, GIFBS_HasF16C,
    9256             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9257             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9258             :       // MIs[0] dst
    9259             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    9260             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    9261             :       // MIs[0] Operand 1
    9262             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_vcvtph2ps_256,
    9263             :       // MIs[0] src
    9264             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
    9265             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9266             :       // (intrinsic_wo_chain:v8f32 5994:iPTR, VR128:v8i16:$src)  =>  (VCVTPH2PSYrr:v8f32 VR128:v8i16:$src)
    9267             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTPH2PSYrr,
    9268             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9269             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9270             :       GIR_EraseFromParent, /*InsnID*/0,
    9271             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9272             :       GIR_Done,
    9273             :     // Label 369: @20554
    9274             :     GIM_Try, /*On fail goto*//*Label 370*/ 20604,
    9275             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    9276             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9277             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9278             :       // MIs[0] dst
    9279             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9280             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9281             :       // MIs[0] Operand 1
    9282             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss,
    9283             :       // MIs[0] src
    9284             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9285             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9286             :       // (intrinsic_wo_chain:v4f32 5828:iPTR, VR128:v4f32:$src)  =>  (RCPSSr_Int:v4f32 VR128:v4f32:$src, VR128:v4f32:$src)
    9287             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RCPSSr_Int,
    9288             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9289             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9290             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9291             :       GIR_EraseFromParent, /*InsnID*/0,
    9292             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9293             :       GIR_Done,
    9294             :     // Label 370: @20604
    9295             :     GIM_Try, /*On fail goto*//*Label 371*/ 20654,
    9296             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    9297             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9298             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9299             :       // MIs[0] dst
    9300             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9301             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9302             :       // MIs[0] Operand 1
    9303             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss,
    9304             :       // MIs[0] src
    9305             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9306             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9307             :       // (intrinsic_wo_chain:v4f32 5830:iPTR, VR128:v4f32:$src)  =>  (RSQRTSSr_Int:v4f32 VR128:v4f32:$src, VR128:v4f32:$src)
    9308             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RSQRTSSr_Int,
    9309             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9310             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9311             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9312             :       GIR_EraseFromParent, /*InsnID*/0,
    9313             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9314             :       GIR_Done,
    9315             :     // Label 371: @20654
    9316             :     GIM_Try, /*On fail goto*//*Label 372*/ 20704,
    9317             :       GIM_CheckFeatures, GIFBS_UseSSE2,
    9318             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9319             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9320             :       // MIs[0] dst
    9321             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    9322             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9323             :       // MIs[0] Operand 1
    9324             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_sqrt_sd,
    9325             :       // MIs[0] src
    9326             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9327             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9328             :       // (intrinsic_wo_chain:v2f64 5907:iPTR, VR128:v2f64:$src)  =>  (SQRTSDr_Int:v2f64 VR128:v2f64:$src, VR128:v2f64:$src)
    9329             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SQRTSDr_Int,
    9330             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9331             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9332             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9333             :       GIR_EraseFromParent, /*InsnID*/0,
    9334             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9335             :       GIR_Done,
    9336             :     // Label 372: @20704
    9337             :     GIM_Try, /*On fail goto*//*Label 373*/ 20754,
    9338             :       GIM_CheckFeatures, GIFBS_UseSSE1,
    9339             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9340             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9341             :       // MIs[0] dst
    9342             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9343             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9344             :       // MIs[0] Operand 1
    9345             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_sqrt_ss,
    9346             :       // MIs[0] src
    9347             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9348             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9349             :       // (intrinsic_wo_chain:v4f32 5833:iPTR, VR128:v4f32:$src)  =>  (SQRTSSr_Int:v4f32 VR128:v4f32:$src, VR128:v4f32:$src)
    9350             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SQRTSSr_Int,
    9351             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9352             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9353             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9354             :       GIR_EraseFromParent, /*InsnID*/0,
    9355             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9356             :       GIR_Done,
    9357             :     // Label 373: @20754
    9358             :     GIM_Try, /*On fail goto*//*Label 374*/ 20804,
    9359             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9360             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9361             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9362             :       // MIs[0] dst
    9363             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9364             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9365             :       // MIs[0] Operand 1
    9366             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss,
    9367             :       // MIs[0] src
    9368             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9369             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9370             :       // (intrinsic_wo_chain:v4f32 5828:iPTR, VR128:v4f32:$src)  =>  (VRCPSSr_Int:v4f32 VR128:v4f32:$src, VR128:v4f32:$src)
    9371             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRCPSSr_Int,
    9372             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9373             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9374             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9375             :       GIR_EraseFromParent, /*InsnID*/0,
    9376             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9377             :       GIR_Done,
    9378             :     // Label 374: @20804
    9379             :     GIM_Try, /*On fail goto*//*Label 375*/ 20854,
    9380             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9381             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9382             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9383             :       // MIs[0] dst
    9384             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9385             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9386             :       // MIs[0] Operand 1
    9387             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss,
    9388             :       // MIs[0] src
    9389             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9390             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9391             :       // (intrinsic_wo_chain:v4f32 5830:iPTR, VR128:v4f32:$src)  =>  (VRSQRTSSr_Int:v4f32 VR128:v4f32:$src, VR128:v4f32:$src)
    9392             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRSQRTSSr_Int,
    9393             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9394             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9395             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9396             :       GIR_EraseFromParent, /*InsnID*/0,
    9397             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9398             :       GIR_Done,
    9399             :     // Label 375: @20854
    9400             :     GIM_Try, /*On fail goto*//*Label 376*/ 20904,
    9401             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9402             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9403             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9404             :       // MIs[0] dst
    9405             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    9406             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9407             :       // MIs[0] Operand 1
    9408             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_sqrt_sd,
    9409             :       // MIs[0] src
    9410             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9411             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9412             :       // (intrinsic_wo_chain:v2f64 5907:iPTR, VR128:v2f64:$src)  =>  (VSQRTSDr_Int:v2f64 VR128:v2f64:$src, VR128:v2f64:$src)
    9413             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSDr_Int,
    9414             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9415             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9416             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9417             :       GIR_EraseFromParent, /*InsnID*/0,
    9418             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9419             :       GIR_Done,
    9420             :     // Label 376: @20904
    9421             :     GIM_Try, /*On fail goto*//*Label 377*/ 20954,
    9422             :       GIM_CheckFeatures, GIFBS_HasAVX,
    9423             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9424             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9425             :       // MIs[0] dst
    9426             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9427             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9428             :       // MIs[0] Operand 1
    9429             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_sqrt_ss,
    9430             :       // MIs[0] src
    9431             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9432             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9433             :       // (intrinsic_wo_chain:v4f32 5833:iPTR, VR128:v4f32:$src)  =>  (VSQRTSSr_Int:v4f32 VR128:v4f32:$src, VR128:v4f32:$src)
    9434             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VSQRTSSr_Int,
    9435             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9436             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9437             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9438             :       GIR_EraseFromParent, /*InsnID*/0,
    9439             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9440             :       GIR_Done,
    9441             :     // Label 377: @20954
    9442             :     GIM_Try, /*On fail goto*//*Label 378*/ 21000,
    9443             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9444             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9445             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9446             :       // MIs[0] dst
    9447             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9448             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9449             :       // MIs[0] Operand 1
    9450             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si,
    9451             :       // MIs[0] src
    9452             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9453             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9454             :       // (intrinsic_wo_chain:i32 5814:iPTR, VR128X:v4f32:$src)  =>  (VCVTSS2SIZrr:i32 VR128X:v4f32:$src)
    9455             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SIZrr,
    9456             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9457             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9458             :       GIR_EraseFromParent, /*InsnID*/0,
    9459             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9460             :       GIR_Done,
    9461             :     // Label 378: @21000
    9462             :     GIM_Try, /*On fail goto*//*Label 379*/ 21046,
    9463             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9464             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9465             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9466             :       // MIs[0] dst
    9467             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9468             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9469             :       // MIs[0] Operand 1
    9470             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvtss2si64,
    9471             :       // MIs[0] src
    9472             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9473             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9474             :       // (intrinsic_wo_chain:i64 5815:iPTR, VR128X:v4f32:$src)  =>  (VCVTSS2SI64Zrr:i64 VR128X:v4f32:$src)
    9475             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SI64Zrr,
    9476             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9477             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9478             :       GIR_EraseFromParent, /*InsnID*/0,
    9479             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9480             :       GIR_Done,
    9481             :     // Label 379: @21046
    9482             :     GIM_Try, /*On fail goto*//*Label 380*/ 21092,
    9483             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9484             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9485             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9486             :       // MIs[0] dst
    9487             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9488             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9489             :       // MIs[0] Operand 1
    9490             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si,
    9491             :       // MIs[0] src
    9492             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9493             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9494             :       // (intrinsic_wo_chain:i32 5854:iPTR, VR128X:v2f64:$src)  =>  (VCVTSD2SIZrr:i32 VR128X:v2f64:$src)
    9495             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SIZrr,
    9496             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9497             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9498             :       GIR_EraseFromParent, /*InsnID*/0,
    9499             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9500             :       GIR_Done,
    9501             :     // Label 380: @21092
    9502             :     GIM_Try, /*On fail goto*//*Label 381*/ 21138,
    9503             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9504             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9505             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9506             :       // MIs[0] dst
    9507             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9508             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9509             :       // MIs[0] Operand 1
    9510             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2si64,
    9511             :       // MIs[0] src
    9512             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9513             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9514             :       // (intrinsic_wo_chain:i64 5855:iPTR, VR128X:v2f64:$src)  =>  (VCVTSD2SI64Zrr:i64 VR128X:v2f64:$src)
    9515             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SI64Zrr,
    9516             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9517             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9518             :       GIR_EraseFromParent, /*InsnID*/0,
    9519             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9520             :       GIR_Done,
    9521             :     // Label 381: @21138
    9522             :     GIM_Try, /*On fail goto*//*Label 382*/ 21184,
    9523             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9524             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9525             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9526             :       // MIs[0] dst
    9527             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9528             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9529             :       // MIs[0] Operand 1
    9530             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si,
    9531             :       // MIs[0] src
    9532             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9533             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9534             :       // (intrinsic_wo_chain:i32 5818:iPTR, VR128X:v4f32:$src)  =>  (VCVTTSS2SIZrr_Int:i32 VR128X:v4f32:$src)
    9535             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSS2SIZrr_Int,
    9536             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9537             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9538             :       GIR_EraseFromParent, /*InsnID*/0,
    9539             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9540             :       GIR_Done,
    9541             :     // Label 382: @21184
    9542             :     GIM_Try, /*On fail goto*//*Label 383*/ 21230,
    9543             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9544             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9545             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9546             :       // MIs[0] dst
    9547             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9548             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9549             :       // MIs[0] Operand 1
    9550             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cvttss2si64,
    9551             :       // MIs[0] src
    9552             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9553             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9554             :       // (intrinsic_wo_chain:i64 5819:iPTR, VR128X:v4f32:$src)  =>  (VCVTTSS2SI64Zrr_Int:i64 VR128X:v4f32:$src)
    9555             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSS2SI64Zrr_Int,
    9556             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9557             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9558             :       GIR_EraseFromParent, /*InsnID*/0,
    9559             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9560             :       GIR_Done,
    9561             :     // Label 383: @21230
    9562             :     GIM_Try, /*On fail goto*//*Label 384*/ 21276,
    9563             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9564             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9565             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9566             :       // MIs[0] dst
    9567             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9568             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9569             :       // MIs[0] Operand 1
    9570             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si,
    9571             :       // MIs[0] src
    9572             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9573             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9574             :       // (intrinsic_wo_chain:i32 5862:iPTR, VR128X:v2f64:$src)  =>  (VCVTTSD2SIZrr_Int:i32 VR128X:v2f64:$src)
    9575             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSD2SIZrr_Int,
    9576             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9577             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9578             :       GIR_EraseFromParent, /*InsnID*/0,
    9579             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9580             :       GIR_Done,
    9581             :     // Label 384: @21276
    9582             :     GIM_Try, /*On fail goto*//*Label 385*/ 21322,
    9583             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9584             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9585             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_INTRINSIC,
    9586             :       // MIs[0] dst
    9587             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9588             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9589             :       // MIs[0] Operand 1
    9590             :       GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvttsd2si64,
    9591             :       // MIs[0] src
    9592             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9593             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
    9594             :       // (intrinsic_wo_chain:i64 5863:iPTR, VR128X:v2f64:$src)  =>  (VCVTTSD2SI64Zrr_Int:i64 VR128X:v2f64:$src)
    9595             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTTSD2SI64Zrr_Int,
    9596             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9597             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
    9598             :       GIR_EraseFromParent, /*InsnID*/0,
    9599             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9600             :       GIR_Done,
    9601             :     // Label 385: @21322
    9602             :     GIM_Try, /*On fail goto*//*Label 386*/ 21500,
    9603             :       GIM_CheckFeatures, GIFBS_HasBMI2,
    9604             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9605             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
    9606             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/3,
    9607             :       GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
    9608             :       GIM_CheckNumOperands, /*MI*/2, /*Expected*/2,
    9609             :       GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
    9610             :       GIM_CheckNumOperands, /*MI*/3, /*Expected*/3,
    9611             :       GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
    9612             :       GIM_CheckNumOperands, /*MI*/4, /*Expected*/2,
    9613             :       GIM_RecordInsn, /*DefineMI*/5, /*MI*/4, /*OpIdx*/1, // MIs[5]
    9614             :       GIM_CheckNumOperands, /*MI*/5, /*Expected*/3,
    9615             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9616             :       // MIs[0] dst
    9617             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9618             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9619             :       // MIs[0] Operand 1
    9620             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    9621             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL,
    9622             :       // MIs[1] Operand 0
    9623             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s32,
    9624             :       // MIs[1] src
    9625             :       GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
    9626             :       GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
    9627             :       // MIs[1] Operand 2
    9628             :       GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
    9629             :       GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC,
    9630             :       // MIs[2] Operand 0
    9631             :       GIM_CheckType, /*MI*/2, /*Op*/0, /*Type*/GILLT_s8,
    9632             :       // MIs[2] Operand 1
    9633             :       GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
    9634             :       GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB,
    9635             :       // MIs[3] Operand 0
    9636             :       GIM_CheckType, /*MI*/3, /*Op*/0, /*Type*/GILLT_s32,
    9637             :       // MIs[3] Operand 1
    9638             :       GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
    9639             :       GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32,
    9640             :       // MIs[3] lz
    9641             :       GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
    9642             :       GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID,
    9643             :       // MIs[0] Operand 2
    9644             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9645             :       GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_TRUNC,
    9646             :       // MIs[4] Operand 0
    9647             :       GIM_CheckType, /*MI*/4, /*Op*/0, /*Type*/GILLT_s8,
    9648             :       // MIs[4] Operand 1
    9649             :       GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_s32,
    9650             :       GIM_CheckOpcode, /*MI*/5, TargetOpcode::G_SUB,
    9651             :       // MIs[5] Operand 0
    9652             :       GIM_CheckType, /*MI*/5, /*Op*/0, /*Type*/GILLT_s32,
    9653             :       // MIs[5] Operand 1
    9654             :       GIM_CheckType, /*MI*/5, /*Op*/1, /*Type*/GILLT_s32,
    9655             :       GIM_CheckConstantInt, /*MI*/5, /*Op*/1, 32,
    9656             :       // MIs[5] lz
    9657             :       GIM_CheckType, /*MI*/5, /*Op*/2, /*Type*/GILLT_s32,
    9658             :       GIM_CheckRegBankForClass, /*MI*/5, /*Op*/2, /*RC*/X86::GR32RegClassID,
    9659             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    9660             :       GIM_CheckIsSafeToFold, /*InsnID*/2,
    9661             :       GIM_CheckIsSafeToFold, /*InsnID*/3,
    9662             :       GIM_CheckIsSafeToFold, /*InsnID*/4,
    9663             :       GIM_CheckIsSafeToFold, /*InsnID*/5,
    9664             :       // (srl:i32 (shl:i32 GR32:i32:$src, (trunc:i8 (sub:i32 32:i32, GR32:i32:$lz))), (trunc:i8 (sub:i32 32:i32, GR32:i32:$lz)))  =>  (BZHI32rr:i32:i32 GR32:i32:$src, GR32:i32:$lz)
    9665             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr,
    9666             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9667             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
    9668             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz
    9669             :       GIR_EraseFromParent, /*InsnID*/0,
    9670             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9671             :       GIR_Done,
    9672             :     // Label 386: @21500
    9673             :     GIM_Try, /*On fail goto*//*Label 387*/ 21548,
    9674             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9675             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9676             :       // MIs[0] dst
    9677             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    9678             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    9679             :       // MIs[0] src1
    9680             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    9681             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    9682             :       // MIs[0] Operand 2
    9683             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9684             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    9685             :       // (srl:i8 GR8:i8:$src1, 1:i8)  =>  (SHR8r1:i8:i32 GR8:i8:$src1)
    9686             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8r1,
    9687             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9688             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9689             :       GIR_EraseFromParent, /*InsnID*/0,
    9690             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9691             :       GIR_Done,
    9692             :     // Label 387: @21548
    9693             :     GIM_Try, /*On fail goto*//*Label 388*/ 21596,
    9694             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9695             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9696             :       // MIs[0] dst
    9697             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    9698             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    9699             :       // MIs[0] src1
    9700             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    9701             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    9702             :       // MIs[0] Operand 2
    9703             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9704             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    9705             :       // (srl:i16 GR16:i16:$src1, 1:i8)  =>  (SHR16r1:i16:i32 GR16:i16:$src1)
    9706             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16r1,
    9707             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9708             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9709             :       GIR_EraseFromParent, /*InsnID*/0,
    9710             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9711             :       GIR_Done,
    9712             :     // Label 388: @21596
    9713             :     GIM_Try, /*On fail goto*//*Label 389*/ 21644,
    9714             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9715             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9716             :       // MIs[0] dst
    9717             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9718             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9719             :       // MIs[0] src1
    9720             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    9721             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    9722             :       // MIs[0] Operand 2
    9723             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9724             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    9725             :       // (srl:i32 GR32:i32:$src1, 1:i8)  =>  (SHR32r1:i32:i32 GR32:i32:$src1)
    9726             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32r1,
    9727             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9728             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9729             :       GIR_EraseFromParent, /*InsnID*/0,
    9730             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9731             :       GIR_Done,
    9732             :     // Label 389: @21644
    9733             :     GIM_Try, /*On fail goto*//*Label 390*/ 21692,
    9734             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9735             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9736             :       // MIs[0] dst
    9737             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9738             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9739             :       // MIs[0] src1
    9740             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    9741             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    9742             :       // MIs[0] Operand 2
    9743             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9744             :       GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
    9745             :       // (srl:i64 GR64:i64:$src1, 1:i8)  =>  (SHR64r1:i64:i32 GR64:i64:$src1)
    9746             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64r1,
    9747             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9748             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9749             :       GIR_EraseFromParent, /*InsnID*/0,
    9750             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9751             :       GIR_Done,
    9752             :     // Label 390: @21692
    9753             :     GIM_Try, /*On fail goto*//*Label 391*/ 21755,
    9754             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9755             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    9756             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    9757             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9758             :       // MIs[0] dst
    9759             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s8,
    9760             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
    9761             :       // MIs[0] src1
    9762             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
    9763             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
    9764             :       // MIs[0] src2
    9765             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9766             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    9767             :       // MIs[1] Operand 0
    9768             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    9769             :       // MIs[1] Operand 1
    9770             :       // No operand predicates
    9771             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    9772             :       // (srl:i8 GR8:i8:$src1, (imm:i8):$src2)  =>  (SHR8ri:i8:i32 GR8:i8:$src1, (imm:i8):$src2)
    9773             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8ri,
    9774             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9775             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9776             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    9777             :       GIR_EraseFromParent, /*InsnID*/0,
    9778             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9779             :       GIR_Done,
    9780             :     // Label 391: @21755
    9781             :     GIM_Try, /*On fail goto*//*Label 392*/ 21818,
    9782             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9783             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    9784             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    9785             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9786             :       // MIs[0] dst
    9787             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s16,
    9788             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
    9789             :       // MIs[0] src1
    9790             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
    9791             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
    9792             :       // MIs[0] src2
    9793             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9794             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    9795             :       // MIs[1] Operand 0
    9796             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    9797             :       // MIs[1] Operand 1
    9798             :       // No operand predicates
    9799             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    9800             :       // (srl:i16 GR16:i16:$src1, (imm:i8):$src2)  =>  (SHR16ri:i16:i32 GR16:i16:$src1, (imm:i8):$src2)
    9801             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16ri,
    9802             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9803             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9804             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    9805             :       GIR_EraseFromParent, /*InsnID*/0,
    9806             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9807             :       GIR_Done,
    9808             :     // Label 392: @21818
    9809             :     GIM_Try, /*On fail goto*//*Label 393*/ 21881,
    9810             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9811             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    9812             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    9813             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9814             :       // MIs[0] dst
    9815             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
    9816             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
    9817             :       // MIs[0] src1
    9818             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
    9819             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
    9820             :       // MIs[0] src2
    9821             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9822             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    9823             :       // MIs[1] Operand 0
    9824             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    9825             :       // MIs[1] Operand 1
    9826             :       // No operand predicates
    9827             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    9828             :       // (srl:i32 GR32:i32:$src1, (imm:i8):$src2)  =>  (SHR32ri:i32:i32 GR32:i32:$src1, (imm:i8):$src2)
    9829             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32ri,
    9830             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9831             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9832             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    9833             :       GIR_EraseFromParent, /*InsnID*/0,
    9834             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9835             :       GIR_Done,
    9836             :     // Label 393: @21881
    9837             :     GIM_Try, /*On fail goto*//*Label 394*/ 21944,
    9838             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9839             :       GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
    9840             :       GIM_CheckNumOperands, /*MI*/1, /*Expected*/2,
    9841             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9842             :       // MIs[0] dst
    9843             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
    9844             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
    9845             :       // MIs[0] src1
    9846             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
    9847             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
    9848             :       // MIs[0] src2
    9849             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
    9850             :       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
    9851             :       // MIs[1] Operand 0
    9852             :       GIM_CheckType, /*MI*/1, /*Op*/0, /*Type*/GILLT_s8,
    9853             :       // MIs[1] Operand 1
    9854             :       // No operand predicates
    9855             :       GIM_CheckIsSafeToFold, /*InsnID*/1,
    9856             :       // (srl:i64 GR64:i64:$src1, (imm:i8):$src2)  =>  (SHR64ri:i64:i32 GR64:i64:$src1, (imm:i8):$src2)
    9857             :       GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64ri,
    9858             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
    9859             :       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
    9860             :       GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
    9861             :       GIR_EraseFromParent, /*InsnID*/0,
    9862             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9863             :       GIR_Done,
    9864             :     // Label 394: @21944
    9865             :     GIM_Try, /*On fail goto*//*Label 395*/ 21985,
    9866             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    9867             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9868             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9869             :       // MIs[0] dst
    9870             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
    9871             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9872             :       // MIs[0] src1
    9873             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
    9874             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    9875             :       // MIs[0] src2
    9876             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
    9877             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9878             :       // (srl:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)  =>  (VPSRLVDrr:v4i32 VR128:v4i32:$src1, VR128:v4i32:$src2)
    9879             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDrr,
    9880             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9881             :       GIR_Done,
    9882             :     // Label 395: @21985
    9883             :     GIM_Try, /*On fail goto*//*Label 396*/ 22026,
    9884             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    9885             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9886             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9887             :       // MIs[0] dst
    9888             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    9889             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    9890             :       // MIs[0] src1
    9891             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
    9892             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    9893             :       // MIs[0] src2
    9894             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
    9895             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    9896             :       // (srl:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)  =>  (VPSRLVDYrr:v8i32 VR256:v8i32:$src1, VR256:v8i32:$src2)
    9897             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDYrr,
    9898             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9899             :       GIR_Done,
    9900             :     // Label 396: @22026
    9901             :     GIM_Try, /*On fail goto*//*Label 397*/ 22067,
    9902             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    9903             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9904             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9905             :       // MIs[0] dst
    9906             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
    9907             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
    9908             :       // MIs[0] src1
    9909             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
    9910             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
    9911             :       // MIs[0] src2
    9912             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
    9913             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
    9914             :       // (srl:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)  =>  (VPSRLVQrr:v2i64 VR128:v2i64:$src1, VR128:v2i64:$src2)
    9915             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQrr,
    9916             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9917             :       GIR_Done,
    9918             :     // Label 397: @22067
    9919             :     GIM_Try, /*On fail goto*//*Label 398*/ 22108,
    9920             :       GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
    9921             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9922             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9923             :       // MIs[0] dst
    9924             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
    9925             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
    9926             :       // MIs[0] src1
    9927             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
    9928             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
    9929             :       // MIs[0] src2
    9930             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
    9931             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
    9932             :       // (srl:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)  =>  (VPSRLVQYrr:v4i64 VR256:v4i64:$src1, VR256:v4i64:$src2)
    9933             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQYrr,
    9934             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9935             :       GIR_Done,
    9936             :     // Label 398: @22108
    9937             :     GIM_Try, /*On fail goto*//*Label 399*/ 22149,
    9938             :       GIM_CheckFeatures, GIFBS_HasAVX512,
    9939             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9940             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9941             :       // MIs[0] dst
    9942             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s32,
    9943             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
    9944             :       // MIs[0] src1
    9945             :       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
    9946             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
    9947             :       // MIs[0] src2
    9948             :       GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
    9949             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
    9950             :       // (srl:v16i32 VR512:v16i32:$src1, VR512:v16i32:$src2)  =>  (VPSRLVDZrr:v16i32 VR512:v16i32:$src1, VR512:v16i32:$src2)
    9951             :       GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZrr,
    9952             :       GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
    9953             :       GIR_Done,
    9954             :     // Label 399: @22149
    9955             :     GIM_Try, /*On fail goto*//*Label 400*/ 22190,
    9956             :       GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
    9957             :       GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
    9958             :       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_LSHR,
    9959             :       // MIs[0] dst
    9960             :       GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
    9961             :       GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
    9962             :       // MIs[0] src1