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1 : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
2 : |* *|
3 : |* Global Instruction Selector for the X86 target *|
4 : |* *|
5 : |* Automatically generated file, do not edit! *|
6 : |* *|
7 : \*===----------------------------------------------------------------------===*/
8 :
9 : #ifdef GET_GLOBALISEL_PREDICATE_BITSET
10 : const unsigned MAX_SUBTARGET_PREDICATES = 113;
11 : using PredicateBitset = llvm::PredicateBitsetImpl<MAX_SUBTARGET_PREDICATES>;
12 : #endif // ifdef GET_GLOBALISEL_PREDICATE_BITSET
13 :
14 : #ifdef GET_GLOBALISEL_TEMPORARIES_DECL
15 : mutable MatcherState State;
16 : typedef ComplexRendererFns(X86InstructionSelector::*ComplexMatcherMemFn)(MachineOperand &) const;
17 : typedef void(X86InstructionSelector::*CustomRendererFn)(MachineInstrBuilder &, const MachineInstr&) const;
18 : const ISelInfoTy<PredicateBitset, ComplexMatcherMemFn, CustomRendererFn> ISelInfo;
19 : static X86InstructionSelector::ComplexMatcherMemFn ComplexPredicateFns[];
20 : static X86InstructionSelector::CustomRendererFn CustomRenderers[];
21 : bool testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const override;
22 : bool testImmPredicate_APInt(unsigned PredicateID, const APInt &Imm) const override;
23 : bool testImmPredicate_APFloat(unsigned PredicateID, const APFloat &Imm) const override;
24 : const int64_t *getMatchTable() const override;
25 : bool testMIPredicate_MI(unsigned PredicateID, const MachineInstr &MI) const override;
26 : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_DECL
27 :
28 : #ifdef GET_GLOBALISEL_TEMPORARIES_INIT
29 : , State(0),
30 48849 : ISelInfo(TypeObjects, NumTypeObjects, FeatureBitsets, ComplexPredicateFns, CustomRenderers)
31 : #endif // ifdef GET_GLOBALISEL_TEMPORARIES_INIT
32 :
33 : #ifdef GET_GLOBALISEL_IMPL
34 : // Bits for subtarget features that participate in instruction matching.
35 : enum SubtargetFeatureBits : uint8_t {
36 : Feature_TruePredicateBit = 48,
37 : Feature_HasCMovBit = 20,
38 : Feature_NoCMovBit = 100,
39 : Feature_HasMMXBit = 81,
40 : Feature_Has3DNowBit = 83,
41 : Feature_HasSSE1Bit = 34,
42 : Feature_UseSSE1Bit = 42,
43 : Feature_HasSSE2Bit = 35,
44 : Feature_UseSSE2Bit = 43,
45 : Feature_HasSSE3Bit = 26,
46 : Feature_UseSSE3Bit = 51,
47 : Feature_HasSSSE3Bit = 82,
48 : Feature_UseSSSE3Bit = 52,
49 : Feature_UseSSE41Bit = 49,
50 : Feature_HasSSE42Bit = 56,
51 : Feature_UseSSE42Bit = 55,
52 : Feature_HasSSE4ABit = 65,
53 : Feature_NoAVXBit = 61,
54 : Feature_HasAVXBit = 44,
55 : Feature_HasAVX2Bit = 38,
56 : Feature_HasAVX1OnlyBit = 36,
57 : Feature_HasAVX512Bit = 69,
58 : Feature_UseAVXBit = 40,
59 : Feature_UseAVX2Bit = 67,
60 : Feature_NoAVX512Bit = 31,
61 : Feature_HasCDIBit = 73,
62 : Feature_HasVPOPCNTDQBit = 77,
63 : Feature_HasERIBit = 76,
64 : Feature_HasDQIBit = 71,
65 : Feature_NoDQIBit = 53,
66 : Feature_HasBWIBit = 72,
67 : Feature_NoBWIBit = 50,
68 : Feature_HasVLXBit = 70,
69 : Feature_NoVLXBit = 30,
70 : Feature_NoVLX_Or_NoBWIBit = 47,
71 : Feature_NoVLX_Or_NoDQIBit = 104,
72 : Feature_HasVNNIBit = 79,
73 : Feature_HasBITALGBit = 80,
74 : Feature_HasPOPCNTBit = 54,
75 : Feature_HasAESBit = 58,
76 : Feature_HasVAESBit = 60,
77 : Feature_NoVLX_Or_NoVAESBit = 59,
78 : Feature_HasFXSRBit = 27,
79 : Feature_HasXSAVEBit = 89,
80 : Feature_HasXSAVEOPTBit = 90,
81 : Feature_HasXSAVECBit = 91,
82 : Feature_HasXSAVESBit = 92,
83 : Feature_HasPCLMULBit = 62,
84 : Feature_NoVLX_Or_NoVPCLMULQDQBit = 63,
85 : Feature_HasVPCLMULQDQBit = 64,
86 : Feature_HasGFNIBit = 68,
87 : Feature_HasFMABit = 28,
88 : Feature_HasFMA4Bit = 32,
89 : Feature_NoFMA4Bit = 29,
90 : Feature_HasXOPBit = 33,
91 : Feature_HasTBMBit = 9,
92 : Feature_NoTBMBit = 112,
93 : Feature_HasLWPBit = 10,
94 : Feature_HasMOVBEBit = 3,
95 : Feature_HasRDRANDBit = 4,
96 : Feature_HasF16CBit = 66,
97 : Feature_HasFSGSBaseBit = 93,
98 : Feature_HasLZCNTBit = 6,
99 : Feature_HasBMIBit = 7,
100 : Feature_HasBMI2Bit = 8,
101 : Feature_NoBMI2Bit = 111,
102 : Feature_HasVBMIBit = 74,
103 : Feature_HasVBMI2Bit = 78,
104 : Feature_HasIFMABit = 75,
105 : Feature_HasRTMBit = 87,
106 : Feature_HasSHABit = 57,
107 : Feature_HasRDSEEDBit = 5,
108 : Feature_HasSSEPrefetchBit = 45,
109 : Feature_NoSSEPrefetchBit = 84,
110 : Feature_HasPrefetchWBit = 85,
111 : Feature_HasPREFETCHWT1Bit = 86,
112 : Feature_HasLAHFSAHFBit = 2,
113 : Feature_HasMWAITXBit = 11,
114 : Feature_HasCLZEROBit = 15,
115 : Feature_HasCLDEMOTEBit = 18,
116 : Feature_HasMOVDIRIBit = 13,
117 : Feature_HasMOVDIR64BBit = 14,
118 : Feature_HasPTWRITEBit = 96,
119 : Feature_FPStackf32Bit = 24,
120 : Feature_FPStackf64Bit = 25,
121 : Feature_HasCLFLUSHOPTBit = 16,
122 : Feature_HasCLWBBit = 17,
123 : Feature_HasWBNOINVDBit = 88,
124 : Feature_HasRDPIDBit = 95,
125 : Feature_HasWAITPKGBit = 12,
126 : Feature_HasINVPCIDBit = 94,
127 : Feature_HasCmpxchg16bBit = 101,
128 : Feature_Not64BitModeBit = 0,
129 : Feature_In64BitModeBit = 1,
130 : Feature_IsLP64Bit = 98,
131 : Feature_NotLP64Bit = 97,
132 : Feature_NotWin64WithoutFPBit = 99,
133 : Feature_IsPS4Bit = 106,
134 : Feature_NotPS4Bit = 105,
135 : Feature_KernelCodeBit = 107,
136 : Feature_NearDataBit = 109,
137 : Feature_IsNotPICBit = 108,
138 : Feature_OptForSizeBit = 39,
139 : Feature_OptForMinSizeBit = 37,
140 : Feature_OptForSpeedBit = 103,
141 : Feature_UseIncDecBit = 19,
142 : Feature_NoSSE41_Or_OptForSizeBit = 41,
143 : Feature_CallImmAddrBit = 110,
144 : Feature_FavorMemIndirectCallBit = 21,
145 : Feature_HasFastSHLDRotateBit = 102,
146 : Feature_HasMFenceBit = 46,
147 : Feature_UseRetpolineIndirectCallsBit = 23,
148 : Feature_NotUseRetpolineIndirectCallsBit = 22,
149 : };
150 :
151 0 : PredicateBitset X86InstructionSelector::
152 : computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const {
153 0 : PredicateBitset Features;
154 : if (true)
155 0 : Features[Feature_TruePredicateBit] = 1;
156 : if (Subtarget->hasCMov())
157 0 : Features[Feature_HasCMovBit] = 1;
158 : if (!Subtarget->hasCMov())
159 0 : Features[Feature_NoCMovBit] = 1;
160 0 : if (Subtarget->hasMMX())
161 0 : Features[Feature_HasMMXBit] = 1;
162 0 : if (Subtarget->has3DNow())
163 0 : Features[Feature_Has3DNowBit] = 1;
164 0 : if (Subtarget->hasSSE1())
165 0 : Features[Feature_HasSSE1Bit] = 1;
166 0 : if (Subtarget->hasSSE1() && !Subtarget->hasAVX())
167 0 : Features[Feature_UseSSE1Bit] = 1;
168 0 : if (Subtarget->hasSSE2())
169 0 : Features[Feature_HasSSE2Bit] = 1;
170 0 : if (Subtarget->hasSSE2() && !Subtarget->hasAVX())
171 0 : Features[Feature_UseSSE2Bit] = 1;
172 0 : if (Subtarget->hasSSE3())
173 0 : Features[Feature_HasSSE3Bit] = 1;
174 0 : if (Subtarget->hasSSE3() && !Subtarget->hasAVX())
175 0 : Features[Feature_UseSSE3Bit] = 1;
176 0 : if (Subtarget->hasSSSE3())
177 0 : Features[Feature_HasSSSE3Bit] = 1;
178 0 : if (Subtarget->hasSSSE3() && !Subtarget->hasAVX())
179 0 : Features[Feature_UseSSSE3Bit] = 1;
180 0 : if (Subtarget->hasSSE41() && !Subtarget->hasAVX())
181 0 : Features[Feature_UseSSE41Bit] = 1;
182 0 : if (Subtarget->hasSSE42())
183 0 : Features[Feature_HasSSE42Bit] = 1;
184 0 : if (Subtarget->hasSSE42() && !Subtarget->hasAVX())
185 0 : Features[Feature_UseSSE42Bit] = 1;
186 0 : if (Subtarget->hasSSE4A())
187 0 : Features[Feature_HasSSE4ABit] = 1;
188 0 : if (!Subtarget->hasAVX())
189 0 : Features[Feature_NoAVXBit] = 1;
190 0 : if (Subtarget->hasAVX())
191 0 : Features[Feature_HasAVXBit] = 1;
192 0 : if (Subtarget->hasAVX2())
193 0 : Features[Feature_HasAVX2Bit] = 1;
194 0 : if (Subtarget->hasAVX() && !Subtarget->hasAVX2())
195 0 : Features[Feature_HasAVX1OnlyBit] = 1;
196 0 : if (Subtarget->hasAVX512())
197 0 : Features[Feature_HasAVX512Bit] = 1;
198 0 : if (Subtarget->hasAVX() && !Subtarget->hasAVX512())
199 0 : Features[Feature_UseAVXBit] = 1;
200 0 : if (Subtarget->hasAVX2() && !Subtarget->hasAVX512())
201 0 : Features[Feature_UseAVX2Bit] = 1;
202 0 : if (!Subtarget->hasAVX512())
203 0 : Features[Feature_NoAVX512Bit] = 1;
204 0 : if (Subtarget->hasCDI())
205 0 : Features[Feature_HasCDIBit] = 1;
206 0 : if (Subtarget->hasVPOPCNTDQ())
207 0 : Features[Feature_HasVPOPCNTDQBit] = 1;
208 0 : if (Subtarget->hasERI())
209 0 : Features[Feature_HasERIBit] = 1;
210 0 : if (Subtarget->hasDQI())
211 0 : Features[Feature_HasDQIBit] = 1;
212 0 : if (!Subtarget->hasDQI())
213 0 : Features[Feature_NoDQIBit] = 1;
214 0 : if (Subtarget->hasBWI())
215 0 : Features[Feature_HasBWIBit] = 1;
216 0 : if (!Subtarget->hasBWI())
217 0 : Features[Feature_NoBWIBit] = 1;
218 0 : if (Subtarget->hasVLX())
219 0 : Features[Feature_HasVLXBit] = 1;
220 0 : if (!Subtarget->hasVLX())
221 0 : Features[Feature_NoVLXBit] = 1;
222 0 : if (!Subtarget->hasVLX() || !Subtarget->hasBWI())
223 0 : Features[Feature_NoVLX_Or_NoBWIBit] = 1;
224 0 : if (!Subtarget->hasVLX() || !Subtarget->hasDQI())
225 0 : Features[Feature_NoVLX_Or_NoDQIBit] = 1;
226 0 : if (Subtarget->hasVNNI())
227 0 : Features[Feature_HasVNNIBit] = 1;
228 0 : if (Subtarget->hasBITALG())
229 0 : Features[Feature_HasBITALGBit] = 1;
230 0 : if (Subtarget->hasPOPCNT())
231 0 : Features[Feature_HasPOPCNTBit] = 1;
232 0 : if (Subtarget->hasAES())
233 0 : Features[Feature_HasAESBit] = 1;
234 0 : if (Subtarget->hasVAES())
235 0 : Features[Feature_HasVAESBit] = 1;
236 0 : if (!Subtarget->hasVLX() || !Subtarget->hasVAES())
237 0 : Features[Feature_NoVLX_Or_NoVAESBit] = 1;
238 0 : if (Subtarget->hasFXSR())
239 0 : Features[Feature_HasFXSRBit] = 1;
240 0 : if (Subtarget->hasXSAVE())
241 0 : Features[Feature_HasXSAVEBit] = 1;
242 0 : if (Subtarget->hasXSAVEOPT())
243 0 : Features[Feature_HasXSAVEOPTBit] = 1;
244 0 : if (Subtarget->hasXSAVEC())
245 0 : Features[Feature_HasXSAVECBit] = 1;
246 0 : if (Subtarget->hasXSAVES())
247 0 : Features[Feature_HasXSAVESBit] = 1;
248 0 : if (Subtarget->hasPCLMUL())
249 0 : Features[Feature_HasPCLMULBit] = 1;
250 0 : if (!Subtarget->hasVLX() || !Subtarget->hasVPCLMULQDQ())
251 0 : Features[Feature_NoVLX_Or_NoVPCLMULQDQBit] = 1;
252 0 : if (Subtarget->hasVPCLMULQDQ())
253 0 : Features[Feature_HasVPCLMULQDQBit] = 1;
254 0 : if (Subtarget->hasGFNI())
255 0 : Features[Feature_HasGFNIBit] = 1;
256 0 : if (Subtarget->hasFMA())
257 0 : Features[Feature_HasFMABit] = 1;
258 0 : if (Subtarget->hasFMA4())
259 0 : Features[Feature_HasFMA4Bit] = 1;
260 0 : if (!Subtarget->hasFMA4())
261 0 : Features[Feature_NoFMA4Bit] = 1;
262 0 : if (Subtarget->hasXOP())
263 0 : Features[Feature_HasXOPBit] = 1;
264 0 : if (Subtarget->hasTBM())
265 0 : Features[Feature_HasTBMBit] = 1;
266 0 : if (!Subtarget->hasTBM())
267 0 : Features[Feature_NoTBMBit] = 1;
268 0 : if (Subtarget->hasLWP())
269 0 : Features[Feature_HasLWPBit] = 1;
270 0 : if (Subtarget->hasMOVBE())
271 0 : Features[Feature_HasMOVBEBit] = 1;
272 0 : if (Subtarget->hasRDRAND())
273 0 : Features[Feature_HasRDRANDBit] = 1;
274 0 : if (Subtarget->hasF16C())
275 0 : Features[Feature_HasF16CBit] = 1;
276 0 : if (Subtarget->hasFSGSBase())
277 0 : Features[Feature_HasFSGSBaseBit] = 1;
278 0 : if (Subtarget->hasLZCNT())
279 0 : Features[Feature_HasLZCNTBit] = 1;
280 0 : if (Subtarget->hasBMI())
281 0 : Features[Feature_HasBMIBit] = 1;
282 0 : if (Subtarget->hasBMI2())
283 0 : Features[Feature_HasBMI2Bit] = 1;
284 0 : if (!Subtarget->hasBMI2())
285 0 : Features[Feature_NoBMI2Bit] = 1;
286 0 : if (Subtarget->hasVBMI())
287 0 : Features[Feature_HasVBMIBit] = 1;
288 0 : if (Subtarget->hasVBMI2())
289 0 : Features[Feature_HasVBMI2Bit] = 1;
290 0 : if (Subtarget->hasIFMA())
291 0 : Features[Feature_HasIFMABit] = 1;
292 0 : if (Subtarget->hasRTM())
293 0 : Features[Feature_HasRTMBit] = 1;
294 0 : if (Subtarget->hasSHA())
295 0 : Features[Feature_HasSHABit] = 1;
296 0 : if (Subtarget->hasRDSEED())
297 0 : Features[Feature_HasRDSEEDBit] = 1;
298 : if (Subtarget->hasSSEPrefetch())
299 0 : Features[Feature_HasSSEPrefetchBit] = 1;
300 : if (!Subtarget->hasSSEPrefetch())
301 0 : Features[Feature_NoSSEPrefetchBit] = 1;
302 0 : if (Subtarget->hasPRFCHW())
303 0 : Features[Feature_HasPrefetchWBit] = 1;
304 0 : if (Subtarget->hasPREFETCHWT1())
305 0 : Features[Feature_HasPREFETCHWT1Bit] = 1;
306 0 : if (Subtarget->hasLAHFSAHF())
307 0 : Features[Feature_HasLAHFSAHFBit] = 1;
308 0 : if (Subtarget->hasMWAITX())
309 0 : Features[Feature_HasMWAITXBit] = 1;
310 0 : if (Subtarget->hasCLZERO())
311 0 : Features[Feature_HasCLZEROBit] = 1;
312 0 : if (Subtarget->hasCLDEMOTE())
313 0 : Features[Feature_HasCLDEMOTEBit] = 1;
314 0 : if (Subtarget->hasMOVDIRI())
315 0 : Features[Feature_HasMOVDIRIBit] = 1;
316 0 : if (Subtarget->hasMOVDIR64B())
317 0 : Features[Feature_HasMOVDIR64BBit] = 1;
318 0 : if (Subtarget->hasPTWRITE())
319 0 : Features[Feature_HasPTWRITEBit] = 1;
320 0 : if (!Subtarget->hasSSE1())
321 0 : Features[Feature_FPStackf32Bit] = 1;
322 0 : if (!Subtarget->hasSSE2())
323 0 : Features[Feature_FPStackf64Bit] = 1;
324 0 : if (Subtarget->hasCLFLUSHOPT())
325 0 : Features[Feature_HasCLFLUSHOPTBit] = 1;
326 0 : if (Subtarget->hasCLWB())
327 0 : Features[Feature_HasCLWBBit] = 1;
328 0 : if (Subtarget->hasWBNOINVD())
329 0 : Features[Feature_HasWBNOINVDBit] = 1;
330 0 : if (Subtarget->hasRDPID())
331 0 : Features[Feature_HasRDPIDBit] = 1;
332 0 : if (Subtarget->hasWAITPKG())
333 0 : Features[Feature_HasWAITPKGBit] = 1;
334 0 : if (Subtarget->hasINVPCID())
335 0 : Features[Feature_HasINVPCIDBit] = 1;
336 0 : if (Subtarget->hasCmpxchg16b())
337 0 : Features[Feature_HasCmpxchg16bBit] = 1;
338 0 : if (!Subtarget->is64Bit())
339 0 : Features[Feature_Not64BitModeBit] = 1;
340 0 : if (Subtarget->is64Bit())
341 0 : Features[Feature_In64BitModeBit] = 1;
342 : if (Subtarget->isTarget64BitLP64())
343 0 : Features[Feature_IsLP64Bit] = 1;
344 : if (!Subtarget->isTarget64BitLP64())
345 0 : Features[Feature_NotLP64Bit] = 1;
346 : if (Subtarget->isTargetPS4())
347 0 : Features[Feature_IsPS4Bit] = 1;
348 : if (!Subtarget->isTargetPS4())
349 0 : Features[Feature_NotPS4Bit] = 1;
350 0 : if (TM.getCodeModel() == CodeModel::Kernel)
351 0 : Features[Feature_KernelCodeBit] = 1;
352 0 : if (TM.getCodeModel() == CodeModel::Small ||TM.getCodeModel() == CodeModel::Kernel)
353 0 : Features[Feature_NearDataBit] = 1;
354 0 : if (!TM.isPositionIndependent())
355 0 : Features[Feature_IsNotPICBit] = 1;
356 0 : if (Subtarget->isLegalToCallImmediateAddr())
357 0 : Features[Feature_CallImmAddrBit] = 1;
358 0 : if (!Subtarget->slowTwoMemOps())
359 0 : Features[Feature_FavorMemIndirectCallBit] = 1;
360 0 : if (Subtarget->hasFastSHLDRotate())
361 0 : Features[Feature_HasFastSHLDRotateBit] = 1;
362 : if (Subtarget->hasMFence())
363 0 : Features[Feature_HasMFenceBit] = 1;
364 0 : if (Subtarget->useRetpolineIndirectCalls())
365 0 : Features[Feature_UseRetpolineIndirectCallsBit] = 1;
366 0 : if (!Subtarget->useRetpolineIndirectCalls())
367 0 : Features[Feature_NotUseRetpolineIndirectCallsBit] = 1;
368 0 : return Features;
369 : }
370 :
371 0 : PredicateBitset X86InstructionSelector::
372 : computeAvailableFunctionFeatures(const X86Subtarget *Subtarget, const MachineFunction *MF) const {
373 0 : PredicateBitset Features;
374 0 : if (!Subtarget->isTargetWin64() ||Subtarget->getFrameLowering()->hasFP(*MF))
375 0 : Features[Feature_NotWin64WithoutFPBit] = 1;
376 0 : if (MF->getFunction().optForSize())
377 0 : Features[Feature_OptForSizeBit] = 1;
378 0 : if (MF->getFunction().optForMinSize())
379 0 : Features[Feature_OptForMinSizeBit] = 1;
380 0 : if (!MF->getFunction().optForSize())
381 0 : Features[Feature_OptForSpeedBit] = 1;
382 0 : if (!Subtarget->slowIncDec() || MF->getFunction().optForSize())
383 0 : Features[Feature_UseIncDecBit] = 1;
384 0 : if (MF->getFunction().optForSize() || !Subtarget->hasSSE41())
385 0 : Features[Feature_NoSSE41_Or_OptForSizeBit] = 1;
386 0 : return Features;
387 : }
388 :
389 : // LLT Objects.
390 : enum {
391 : GILLT_s1,
392 : GILLT_s8,
393 : GILLT_s16,
394 : GILLT_s32,
395 : GILLT_s64,
396 : GILLT_s80,
397 : GILLT_s128,
398 : GILLT_v2s1,
399 : GILLT_v2s64,
400 : GILLT_v4s1,
401 : GILLT_v4s32,
402 : GILLT_v4s64,
403 : GILLT_v8s1,
404 : GILLT_v8s16,
405 : GILLT_v8s32,
406 : GILLT_v8s64,
407 : GILLT_v16s1,
408 : GILLT_v16s8,
409 : GILLT_v16s16,
410 : GILLT_v16s32,
411 : GILLT_v32s1,
412 : GILLT_v32s8,
413 : GILLT_v32s16,
414 : GILLT_v64s1,
415 : GILLT_v64s8,
416 : };
417 : const static size_t NumTypeObjects = 25;
418 : const static LLT TypeObjects[] = {
419 : LLT::scalar(1),
420 : LLT::scalar(8),
421 : LLT::scalar(16),
422 : LLT::scalar(32),
423 : LLT::scalar(64),
424 : LLT::scalar(80),
425 : LLT::scalar(128),
426 : LLT::vector(2, 1),
427 : LLT::vector(2, 64),
428 : LLT::vector(4, 1),
429 : LLT::vector(4, 32),
430 : LLT::vector(4, 64),
431 : LLT::vector(8, 1),
432 : LLT::vector(8, 16),
433 : LLT::vector(8, 32),
434 : LLT::vector(8, 64),
435 : LLT::vector(16, 1),
436 : LLT::vector(16, 8),
437 : LLT::vector(16, 16),
438 : LLT::vector(16, 32),
439 : LLT::vector(32, 1),
440 : LLT::vector(32, 8),
441 : LLT::vector(32, 16),
442 : LLT::vector(64, 1),
443 : LLT::vector(64, 8),
444 : };
445 :
446 : // Feature bitsets.
447 : enum {
448 : GIFBS_Invalid,
449 : GIFBS_FPStackf32,
450 : GIFBS_FPStackf64,
451 : GIFBS_Has3DNow,
452 : GIFBS_HasAVX,
453 : GIFBS_HasAVX1Only,
454 : GIFBS_HasAVX2,
455 : GIFBS_HasAVX512,
456 : GIFBS_HasBITALG,
457 : GIFBS_HasBMI,
458 : GIFBS_HasBMI2,
459 : GIFBS_HasBWI,
460 : GIFBS_HasCDI,
461 : GIFBS_HasDQI,
462 : GIFBS_HasLWP,
463 : GIFBS_HasMFence,
464 : GIFBS_HasMMX,
465 : GIFBS_HasMOVBE,
466 : GIFBS_HasPTWRITE,
467 : GIFBS_HasRTM,
468 : GIFBS_HasSHA,
469 : GIFBS_HasSSE1,
470 : GIFBS_HasSSE2,
471 : GIFBS_HasSSE42,
472 : GIFBS_HasSSE4A,
473 : GIFBS_HasTBM,
474 : GIFBS_HasVLX,
475 : GIFBS_HasVPOPCNTDQ,
476 : GIFBS_HasWAITPKG,
477 : GIFBS_HasWBNOINVD,
478 : GIFBS_HasXOP,
479 : GIFBS_In64BitMode,
480 : GIFBS_NoDQI,
481 : GIFBS_Not64BitMode,
482 : GIFBS_UseAVX,
483 : GIFBS_UseIncDec,
484 : GIFBS_UseSSE1,
485 : GIFBS_UseSSE2,
486 : GIFBS_UseSSE41,
487 : GIFBS_UseSSSE3,
488 : GIFBS_HasAES_HasAVX,
489 : GIFBS_HasAES_NoAVX,
490 : GIFBS_HasAVX_NoVLX,
491 : GIFBS_HasAVX_NoVLX_Or_NoBWI,
492 : GIFBS_HasAVX2_NoVLX,
493 : GIFBS_HasAVX2_NoVLX_Or_NoBWI,
494 : GIFBS_HasAVX512_HasVAES,
495 : GIFBS_HasAVX512_HasVLX,
496 : GIFBS_HasAVX512_HasVPCLMULQDQ,
497 : GIFBS_HasBITALG_HasVLX,
498 : GIFBS_HasBWI_HasVLX,
499 : GIFBS_HasCDI_HasVLX,
500 : GIFBS_HasDQI_HasVLX,
501 : GIFBS_HasDQI_NoBWI,
502 : GIFBS_HasFSGSBase_In64BitMode,
503 : GIFBS_HasPCLMUL_NoAVX,
504 : GIFBS_HasPTWRITE_In64BitMode,
505 : GIFBS_HasRDPID_Not64BitMode,
506 : GIFBS_HasSSE2_NoAVX512,
507 : GIFBS_HasVAES_HasVLX,
508 : GIFBS_HasVAES_NoVLX,
509 : GIFBS_HasVLX_HasVPCLMULQDQ,
510 : GIFBS_HasVLX_HasVPOPCNTDQ,
511 : GIFBS_HasVPCLMULQDQ_NoVLX,
512 : GIFBS_HasWAITPKG_In64BitMode,
513 : GIFBS_HasWAITPKG_Not64BitMode,
514 : GIFBS_Not64BitMode_OptForSize,
515 : GIFBS_NotWin64WithoutFP_OptForMinSize,
516 : GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES,
517 : GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ,
518 : GIFBS_HasDQI_HasVLX_NoBWI,
519 : };
520 : const static PredicateBitset FeatureBitsets[] {
521 : {}, // GIFBS_Invalid
522 : {Feature_FPStackf32Bit, },
523 : {Feature_FPStackf64Bit, },
524 : {Feature_Has3DNowBit, },
525 : {Feature_HasAVXBit, },
526 : {Feature_HasAVX1OnlyBit, },
527 : {Feature_HasAVX2Bit, },
528 : {Feature_HasAVX512Bit, },
529 : {Feature_HasBITALGBit, },
530 : {Feature_HasBMIBit, },
531 : {Feature_HasBMI2Bit, },
532 : {Feature_HasBWIBit, },
533 : {Feature_HasCDIBit, },
534 : {Feature_HasDQIBit, },
535 : {Feature_HasLWPBit, },
536 : {Feature_HasMFenceBit, },
537 : {Feature_HasMMXBit, },
538 : {Feature_HasMOVBEBit, },
539 : {Feature_HasPTWRITEBit, },
540 : {Feature_HasRTMBit, },
541 : {Feature_HasSHABit, },
542 : {Feature_HasSSE1Bit, },
543 : {Feature_HasSSE2Bit, },
544 : {Feature_HasSSE42Bit, },
545 : {Feature_HasSSE4ABit, },
546 : {Feature_HasTBMBit, },
547 : {Feature_HasVLXBit, },
548 : {Feature_HasVPOPCNTDQBit, },
549 : {Feature_HasWAITPKGBit, },
550 : {Feature_HasWBNOINVDBit, },
551 : {Feature_HasXOPBit, },
552 : {Feature_In64BitModeBit, },
553 : {Feature_NoDQIBit, },
554 : {Feature_Not64BitModeBit, },
555 : {Feature_UseAVXBit, },
556 : {Feature_UseIncDecBit, },
557 : {Feature_UseSSE1Bit, },
558 : {Feature_UseSSE2Bit, },
559 : {Feature_UseSSE41Bit, },
560 : {Feature_UseSSSE3Bit, },
561 : {Feature_HasAESBit, Feature_HasAVXBit, },
562 : {Feature_HasAESBit, Feature_NoAVXBit, },
563 : {Feature_HasAVXBit, Feature_NoVLXBit, },
564 : {Feature_HasAVXBit, Feature_NoVLX_Or_NoBWIBit, },
565 : {Feature_HasAVX2Bit, Feature_NoVLXBit, },
566 : {Feature_HasAVX2Bit, Feature_NoVLX_Or_NoBWIBit, },
567 : {Feature_HasAVX512Bit, Feature_HasVAESBit, },
568 : {Feature_HasAVX512Bit, Feature_HasVLXBit, },
569 : {Feature_HasAVX512Bit, Feature_HasVPCLMULQDQBit, },
570 : {Feature_HasBITALGBit, Feature_HasVLXBit, },
571 : {Feature_HasBWIBit, Feature_HasVLXBit, },
572 : {Feature_HasCDIBit, Feature_HasVLXBit, },
573 : {Feature_HasDQIBit, Feature_HasVLXBit, },
574 : {Feature_HasDQIBit, Feature_NoBWIBit, },
575 : {Feature_HasFSGSBaseBit, Feature_In64BitModeBit, },
576 : {Feature_HasPCLMULBit, Feature_NoAVXBit, },
577 : {Feature_HasPTWRITEBit, Feature_In64BitModeBit, },
578 : {Feature_HasRDPIDBit, Feature_Not64BitModeBit, },
579 : {Feature_HasSSE2Bit, Feature_NoAVX512Bit, },
580 : {Feature_HasVAESBit, Feature_HasVLXBit, },
581 : {Feature_HasVAESBit, Feature_NoVLXBit, },
582 : {Feature_HasVLXBit, Feature_HasVPCLMULQDQBit, },
583 : {Feature_HasVLXBit, Feature_HasVPOPCNTDQBit, },
584 : {Feature_HasVPCLMULQDQBit, Feature_NoVLXBit, },
585 : {Feature_HasWAITPKGBit, Feature_In64BitModeBit, },
586 : {Feature_HasWAITPKGBit, Feature_Not64BitModeBit, },
587 : {Feature_Not64BitModeBit, Feature_OptForSizeBit, },
588 : {Feature_NotWin64WithoutFPBit, Feature_OptForMinSizeBit, },
589 : {Feature_HasAESBit, Feature_HasAVXBit, Feature_NoVLX_Or_NoVAESBit, },
590 : {Feature_HasAVXBit, Feature_HasPCLMULBit, Feature_NoVLX_Or_NoVPCLMULQDQBit, },
591 : {Feature_HasDQIBit, Feature_HasVLXBit, Feature_NoBWIBit, },
592 : };
593 :
594 : // ComplexPattern predicates.
595 : enum {
596 : GICP_Invalid,
597 : };
598 : // See constructor for table contents
599 :
600 : // PatFrag predicates.
601 : enum {
602 : GIPFP_I64_Predicate_AndMask64 = GIPFP_I64_Invalid + 1,
603 : GIPFP_I64_Predicate_BTCBTSMask64,
604 : GIPFP_I64_Predicate_BTRMask64,
605 : GIPFP_I64_Predicate_PrefetchWT1Level,
606 : GIPFP_I64_Predicate_i16immSExt8,
607 : GIPFP_I64_Predicate_i32immSExt8,
608 : GIPFP_I64_Predicate_i64immSExt32,
609 : GIPFP_I64_Predicate_i64immSExt8,
610 : GIPFP_I64_Predicate_i64immZExt32,
611 : GIPFP_I64_Predicate_i64immZExt32SExt8,
612 : GIPFP_I64_Predicate_immShift16,
613 : GIPFP_I64_Predicate_immShift32,
614 : GIPFP_I64_Predicate_immShift64,
615 : GIPFP_I64_Predicate_immShift8,
616 : GIPFP_I64_Predicate_immff00_ffff,
617 : };
618 79 : bool X86InstructionSelector::testImmPredicate_I64(unsigned PredicateID, int64_t Imm) const {
619 79 : switch (PredicateID) {
620 0 : case GIPFP_I64_Predicate_AndMask64: {
621 :
622 0 : return isMask_64(Imm) && !isUInt<32>(Imm);
623 :
624 : llvm_unreachable("ImmediateCode should have returned");
625 : return false;
626 : }
627 : case GIPFP_I64_Predicate_BTCBTSMask64: {
628 :
629 0 : return !isInt<32>(Imm) && isPowerOf2_64(Imm);
630 :
631 : llvm_unreachable("ImmediateCode should have returned");
632 : return false;
633 : }
634 0 : case GIPFP_I64_Predicate_BTRMask64: {
635 :
636 0 : return !isUInt<32>(Imm) && !isInt<32>(Imm) && isPowerOf2_64(~Imm);
637 :
638 : llvm_unreachable("ImmediateCode should have returned");
639 : return false;
640 : }
641 0 : case GIPFP_I64_Predicate_PrefetchWT1Level: {
642 :
643 0 : return Imm < 3;
644 :
645 : llvm_unreachable("ImmediateCode should have returned");
646 : return false;
647 : }
648 : case GIPFP_I64_Predicate_i16immSExt8: {
649 5 : return isInt<8>(Imm);
650 : llvm_unreachable("ImmediateCode should have returned");
651 : return false;
652 : }
653 : case GIPFP_I64_Predicate_i32immSExt8: {
654 21 : return isInt<8>(Imm);
655 : llvm_unreachable("ImmediateCode should have returned");
656 : return false;
657 : }
658 : case GIPFP_I64_Predicate_i64immSExt32: {
659 48 : return isInt<32>(Imm);
660 : llvm_unreachable("ImmediateCode should have returned");
661 : return false;
662 : }
663 : case GIPFP_I64_Predicate_i64immSExt8: {
664 5 : return isInt<8>(Imm);
665 : llvm_unreachable("ImmediateCode should have returned");
666 : return false;
667 : }
668 0 : case GIPFP_I64_Predicate_i64immZExt32: {
669 0 : return isUInt<32>(Imm);
670 : llvm_unreachable("ImmediateCode should have returned");
671 : return false;
672 : }
673 0 : case GIPFP_I64_Predicate_i64immZExt32SExt8: {
674 :
675 0 : return isUInt<32>(Imm) && isInt<8>(static_cast<int32_t>(Imm));
676 :
677 : llvm_unreachable("ImmediateCode should have returned");
678 : return false;
679 : }
680 0 : case GIPFP_I64_Predicate_immShift16: {
681 :
682 0 : return countTrailingOnes<uint64_t>(Imm) >= 4;
683 :
684 : llvm_unreachable("ImmediateCode should have returned");
685 : return false;
686 : }
687 0 : case GIPFP_I64_Predicate_immShift32: {
688 :
689 0 : return countTrailingOnes<uint64_t>(Imm) >= 5;
690 :
691 : llvm_unreachable("ImmediateCode should have returned");
692 : return false;
693 : }
694 0 : case GIPFP_I64_Predicate_immShift64: {
695 :
696 0 : return countTrailingOnes<uint64_t>(Imm) >= 6;
697 :
698 : llvm_unreachable("ImmediateCode should have returned");
699 : return false;
700 : }
701 0 : case GIPFP_I64_Predicate_immShift8: {
702 :
703 0 : return countTrailingOnes<uint64_t>(Imm) >= 3;
704 :
705 : llvm_unreachable("ImmediateCode should have returned");
706 : return false;
707 : }
708 0 : case GIPFP_I64_Predicate_immff00_ffff: {
709 :
710 0 : return Imm >= 0xff00 && Imm <= 0xffff;
711 :
712 : llvm_unreachable("ImmediateCode should have returned");
713 : return false;
714 : }
715 : }
716 0 : llvm_unreachable("Unknown predicate");
717 : return false;
718 : }
719 : // PatFrag predicates.
720 : enum {
721 : GIPFP_APFloat_Predicate_fpimm0 = GIPFP_APFloat_Invalid + 1,
722 : GIPFP_APFloat_Predicate_fpimm1,
723 : GIPFP_APFloat_Predicate_fpimmneg0,
724 : GIPFP_APFloat_Predicate_fpimmneg1,
725 : };
726 5 : bool X86InstructionSelector::testImmPredicate_APFloat(unsigned PredicateID, const APFloat & Imm) const {
727 5 : switch (PredicateID) {
728 5 : case GIPFP_APFloat_Predicate_fpimm0: {
729 :
730 5 : return Imm.isExactlyValue(+0.0);
731 :
732 : llvm_unreachable("ImmediateCode should have returned");
733 : return false;
734 : }
735 0 : case GIPFP_APFloat_Predicate_fpimm1: {
736 :
737 0 : return Imm.isExactlyValue(+1.0);
738 :
739 : llvm_unreachable("ImmediateCode should have returned");
740 : return false;
741 : }
742 0 : case GIPFP_APFloat_Predicate_fpimmneg0: {
743 :
744 0 : return Imm.isExactlyValue(-0.0);
745 :
746 : llvm_unreachable("ImmediateCode should have returned");
747 : return false;
748 : }
749 0 : case GIPFP_APFloat_Predicate_fpimmneg1: {
750 :
751 0 : return Imm.isExactlyValue(-1.0);
752 :
753 : llvm_unreachable("ImmediateCode should have returned");
754 : return false;
755 : }
756 : }
757 0 : llvm_unreachable("Unknown predicate");
758 : return false;
759 : }
760 0 : bool X86InstructionSelector::testImmPredicate_APInt(unsigned PredicateID, const APInt & Imm) const {
761 0 : llvm_unreachable("Unknown predicate");
762 : return false;
763 : }
764 0 : bool X86InstructionSelector::testMIPredicate_MI(unsigned PredicateID, const MachineInstr & MI) const {
765 : const MachineFunction &MF = *MI.getParent()->getParent();
766 : const MachineRegisterInfo &MRI = MF.getRegInfo();
767 : (void)MRI;
768 0 : llvm_unreachable("Unknown predicate");
769 : return false;
770 : }
771 :
772 : X86InstructionSelector::ComplexMatcherMemFn
773 : X86InstructionSelector::ComplexPredicateFns[] = {
774 : nullptr, // GICP_Invalid
775 : };
776 :
777 : // Custom renderers.
778 : enum {
779 : GICR_Invalid,
780 : };
781 : X86InstructionSelector::CustomRendererFn
782 : X86InstructionSelector::CustomRenderers[] = {
783 : nullptr, // GICP_Invalid
784 : };
785 :
786 2038 : bool X86InstructionSelector::selectImpl(MachineInstr &I, CodeGenCoverage &CoverageInfo) const {
787 2038 : MachineFunction &MF = *I.getParent()->getParent();
788 2038 : MachineRegisterInfo &MRI = MF.getRegInfo();
789 : // FIXME: This should be computed on a per-function basis rather than per-insn.
790 2038 : AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);
791 2038 : const PredicateBitset AvailableFeatures = getAvailableFeatures();
792 : NewMIVector OutMIs;
793 : State.MIs.clear();
794 2038 : State.MIs.push_back(&I);
795 :
796 2038 : if (executeMatchTable(*this, OutMIs, State, ISelInfo, getMatchTable(), TII, MRI, TRI, RBI, AvailableFeatures, CoverageInfo)) {
797 740 : return true;
798 : }
799 :
800 : return false;
801 : }
802 :
803 0 : const int64_t *X86InstructionSelector::getMatchTable() const {
804 : constexpr static int64_t MatchTable0[] = {
805 : GIM_SwitchOpcode, /*MI*/0, /*[*/34, 135, /*)*//*default:*//*Label 34*/ 29511,
806 : /*TargetOpcode::G_ADD*//*Label 0*/ 106,
807 : /*TargetOpcode::G_SUB*//*Label 1*/ 1723,
808 : /*TargetOpcode::G_MUL*//*Label 2*/ 2804, 0, 0, 0, 0,
809 : /*TargetOpcode::G_AND*//*Label 3*/ 3570,
810 : /*TargetOpcode::G_OR*//*Label 4*/ 6682,
811 : /*TargetOpcode::G_XOR*//*Label 5*/ 9353, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
812 : /*TargetOpcode::G_BITCAST*//*Label 6*/ 11326, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
813 : /*TargetOpcode::G_INTRINSIC*//*Label 7*/ 11726,
814 : /*TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS*//*Label 8*/ 18309,
815 : /*TargetOpcode::G_ANYEXT*//*Label 9*/ 19740,
816 : /*TargetOpcode::G_TRUNC*//*Label 10*/ 19856,
817 : /*TargetOpcode::G_CONSTANT*//*Label 11*/ 20191,
818 : /*TargetOpcode::G_FCONSTANT*//*Label 12*/ 20394, 0, 0,
819 : /*TargetOpcode::G_SEXT*//*Label 13*/ 20587,
820 : /*TargetOpcode::G_ZEXT*//*Label 14*/ 21130,
821 : /*TargetOpcode::G_SHL*//*Label 15*/ 21265,
822 : /*TargetOpcode::G_LSHR*//*Label 16*/ 21990,
823 : /*TargetOpcode::G_ASHR*//*Label 17*/ 22821, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
824 : /*TargetOpcode::G_FADD*//*Label 18*/ 23478,
825 : /*TargetOpcode::G_FSUB*//*Label 19*/ 24091,
826 : /*TargetOpcode::G_FMUL*//*Label 20*/ 24704, 0,
827 : /*TargetOpcode::G_FDIV*//*Label 21*/ 25317, 0, 0, 0, 0, 0, 0,
828 : /*TargetOpcode::G_FNEG*//*Label 22*/ 25930,
829 : /*TargetOpcode::G_FPEXT*//*Label 23*/ 26019,
830 : /*TargetOpcode::G_FPTRUNC*//*Label 24*/ 26295,
831 : /*TargetOpcode::G_FPTOSI*//*Label 25*/ 26580,
832 : /*TargetOpcode::G_FPTOUI*//*Label 26*/ 27210,
833 : /*TargetOpcode::G_SITOFP*//*Label 27*/ 27564,
834 : /*TargetOpcode::G_UITOFP*//*Label 28*/ 28394, 0, 0, 0,
835 : /*TargetOpcode::G_BR*//*Label 29*/ 28848, 0, 0, 0, 0,
836 : /*TargetOpcode::G_CTTZ_ZERO_UNDEF*//*Label 30*/ 28861,
837 : /*TargetOpcode::G_CTLZ*//*Label 31*/ 28946, 0,
838 : /*TargetOpcode::G_CTPOP*//*Label 32*/ 29109,
839 : /*TargetOpcode::G_BSWAP*//*Label 33*/ 29421,
840 : // Label 0: @106
841 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 51*/ 1722,
842 : /*GILLT_s8*//*Label 35*/ 136,
843 : /*GILLT_s16*//*Label 36*/ 250,
844 : /*GILLT_s32*//*Label 37*/ 422,
845 : /*GILLT_s64*//*Label 38*/ 594, 0, 0, 0,
846 : /*GILLT_v2s64*//*Label 39*/ 794, 0,
847 : /*GILLT_v4s32*//*Label 40*/ 875,
848 : /*GILLT_v4s64*//*Label 41*/ 1078, 0,
849 : /*GILLT_v8s16*//*Label 42*/ 1136,
850 : /*GILLT_v8s32*//*Label 43*/ 1339,
851 : /*GILLT_v8s64*//*Label 44*/ 1397, 0,
852 : /*GILLT_v16s8*//*Label 45*/ 1429,
853 : /*GILLT_v16s16*//*Label 46*/ 1510,
854 : /*GILLT_v16s32*//*Label 47*/ 1568, 0,
855 : /*GILLT_v32s8*//*Label 48*/ 1600,
856 : /*GILLT_v32s16*//*Label 49*/ 1658, 0,
857 : /*GILLT_v64s8*//*Label 50*/ 1690,
858 : // Label 35: @136
859 : GIM_Try, /*On fail goto*//*Label 52*/ 249,
860 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
861 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
862 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
863 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
864 : GIM_Try, /*On fail goto*//*Label 53*/ 178, // Rule ID 16168 //
865 : GIM_CheckFeatures, GIFBS_UseIncDec,
866 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
867 : // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, 1:{ *:[i8] }) => (INC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src)
868 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC8r,
869 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
870 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
871 : GIR_EraseFromParent, /*InsnID*/0,
872 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
873 : // GIR_Coverage, 16168,
874 : GIR_Done,
875 : // Label 53: @178
876 : GIM_Try, /*On fail goto*//*Label 54*/ 202, // Rule ID 16172 //
877 : GIM_CheckFeatures, GIFBS_UseIncDec,
878 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
879 : // (add:{ *:[i8] } GR8:{ *:[i8] }:$src, -1:{ *:[i8] }) => (DEC8r:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src)
880 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC8r,
881 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
882 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
883 : GIR_EraseFromParent, /*InsnID*/0,
884 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
885 : // GIR_Coverage, 16172,
886 : GIR_Done,
887 : // Label 54: @202
888 : GIM_Try, /*On fail goto*//*Label 55*/ 232, // Rule ID 16122 //
889 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
890 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
891 : // MIs[1] Operand 1
892 : // No operand predicates
893 : GIM_CheckIsSafeToFold, /*InsnID*/1,
894 : // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (ADD8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
895 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8ri,
896 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
897 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
898 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
899 : GIR_EraseFromParent, /*InsnID*/0,
900 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
901 : // GIR_Coverage, 16122,
902 : GIR_Done,
903 : // Label 55: @232
904 : GIM_Try, /*On fail goto*//*Label 56*/ 248, // Rule ID 16114 //
905 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
906 : // (add:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
907 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD8rr,
908 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
909 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
910 : // GIR_Coverage, 16114,
911 : GIR_Done,
912 : // Label 56: @248
913 : GIM_Reject,
914 : // Label 52: @249
915 : GIM_Reject,
916 : // Label 36: @250
917 : GIM_Try, /*On fail goto*//*Label 57*/ 421,
918 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
919 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
920 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
921 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
922 : GIM_Try, /*On fail goto*//*Label 58*/ 293, // Rule ID 15980 //
923 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128,
924 : // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, 128:{ *:[i16] }) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, -128:{ *:[i16] })
925 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8,
926 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
927 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
928 : GIR_AddImm, /*InsnID*/0, /*Imm*/-128,
929 : GIR_EraseFromParent, /*InsnID*/0,
930 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
931 : // GIR_Coverage, 15980,
932 : GIR_Done,
933 : // Label 58: @293
934 : GIM_Try, /*On fail goto*//*Label 59*/ 317, // Rule ID 16169 //
935 : GIM_CheckFeatures, GIFBS_UseIncDec,
936 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
937 : // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, 1:{ *:[i16] }) => (INC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
938 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC16r,
939 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
940 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
941 : GIR_EraseFromParent, /*InsnID*/0,
942 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
943 : // GIR_Coverage, 16169,
944 : GIR_Done,
945 : // Label 59: @317
946 : GIM_Try, /*On fail goto*//*Label 60*/ 341, // Rule ID 16173 //
947 : GIM_CheckFeatures, GIFBS_UseIncDec,
948 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
949 : // (add:{ *:[i16] } GR16:{ *:[i16] }:$src, -1:{ *:[i16] }) => (DEC16r:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
950 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC16r,
951 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
952 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
953 : GIR_EraseFromParent, /*InsnID*/0,
954 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
955 : // GIR_Coverage, 16173,
956 : GIR_Done,
957 : // Label 60: @341
958 : GIM_Try, /*On fail goto*//*Label 61*/ 374, // Rule ID 16125 //
959 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
960 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
961 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8,
962 : // MIs[1] Operand 1
963 : // No operand predicates
964 : GIM_CheckIsSafeToFold, /*InsnID*/1,
965 : // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (ADD16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2)
966 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri8,
967 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
968 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
969 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
970 : GIR_EraseFromParent, /*InsnID*/0,
971 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
972 : // GIR_Coverage, 16125,
973 : GIR_Done,
974 : // Label 61: @374
975 : GIM_Try, /*On fail goto*//*Label 62*/ 404, // Rule ID 16123 //
976 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
977 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
978 : // MIs[1] Operand 1
979 : // No operand predicates
980 : GIM_CheckIsSafeToFold, /*InsnID*/1,
981 : // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (ADD16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
982 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16ri,
983 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
984 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
985 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
986 : GIR_EraseFromParent, /*InsnID*/0,
987 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
988 : // GIR_Coverage, 16123,
989 : GIR_Done,
990 : // Label 62: @404
991 : GIM_Try, /*On fail goto*//*Label 63*/ 420, // Rule ID 16115 //
992 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
993 : // (add:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
994 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD16rr,
995 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
996 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
997 : // GIR_Coverage, 16115,
998 : GIR_Done,
999 : // Label 63: @420
1000 : GIM_Reject,
1001 : // Label 57: @421
1002 : GIM_Reject,
1003 : // Label 37: @422
1004 : GIM_Try, /*On fail goto*//*Label 64*/ 593,
1005 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
1006 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
1007 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
1008 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
1009 : GIM_Try, /*On fail goto*//*Label 65*/ 465, // Rule ID 15982 //
1010 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128,
1011 : // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, 128:{ *:[i32] }) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, -128:{ *:[i32] })
1012 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8,
1013 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1014 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1015 : GIR_AddImm, /*InsnID*/0, /*Imm*/-128,
1016 : GIR_EraseFromParent, /*InsnID*/0,
1017 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1018 : // GIR_Coverage, 15982,
1019 : GIR_Done,
1020 : // Label 65: @465
1021 : GIM_Try, /*On fail goto*//*Label 66*/ 489, // Rule ID 16170 //
1022 : GIM_CheckFeatures, GIFBS_UseIncDec,
1023 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
1024 : // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }) => (INC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
1025 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC32r,
1026 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1027 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
1028 : GIR_EraseFromParent, /*InsnID*/0,
1029 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1030 : // GIR_Coverage, 16170,
1031 : GIR_Done,
1032 : // Label 66: @489
1033 : GIM_Try, /*On fail goto*//*Label 67*/ 513, // Rule ID 16174 //
1034 : GIM_CheckFeatures, GIFBS_UseIncDec,
1035 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
1036 : // (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }) => (DEC32r:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
1037 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC32r,
1038 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1039 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
1040 : GIR_EraseFromParent, /*InsnID*/0,
1041 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1042 : // GIR_Coverage, 16174,
1043 : GIR_Done,
1044 : // Label 67: @513
1045 : GIM_Try, /*On fail goto*//*Label 68*/ 546, // Rule ID 16126 //
1046 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1047 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1048 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
1049 : // MIs[1] Operand 1
1050 : // No operand predicates
1051 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1052 : // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (ADD32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2)
1053 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri8,
1054 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1055 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1056 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1057 : GIR_EraseFromParent, /*InsnID*/0,
1058 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1059 : // GIR_Coverage, 16126,
1060 : GIR_Done,
1061 : // Label 68: @546
1062 : GIM_Try, /*On fail goto*//*Label 69*/ 576, // Rule ID 16124 //
1063 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1064 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1065 : // MIs[1] Operand 1
1066 : // No operand predicates
1067 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1068 : // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (ADD32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
1069 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32ri,
1070 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1071 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1072 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1073 : GIR_EraseFromParent, /*InsnID*/0,
1074 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1075 : // GIR_Coverage, 16124,
1076 : GIR_Done,
1077 : // Label 69: @576
1078 : GIM_Try, /*On fail goto*//*Label 70*/ 592, // Rule ID 16116 //
1079 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
1080 : // (add:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
1081 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD32rr,
1082 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
1083 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1084 : // GIR_Coverage, 16116,
1085 : GIR_Done,
1086 : // Label 70: @592
1087 : GIM_Reject,
1088 : // Label 64: @593
1089 : GIM_Reject,
1090 : // Label 38: @594
1091 : GIM_Try, /*On fail goto*//*Label 71*/ 793,
1092 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
1093 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
1094 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
1095 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
1096 : GIM_Try, /*On fail goto*//*Label 72*/ 637, // Rule ID 15984 //
1097 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 128,
1098 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 128:{ *:[i64] }) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -128:{ *:[i64] })
1099 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8,
1100 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1101 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1102 : GIR_AddImm, /*InsnID*/0, /*Imm*/-128,
1103 : GIR_EraseFromParent, /*InsnID*/0,
1104 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1105 : // GIR_Coverage, 15984,
1106 : GIR_Done,
1107 : // Label 72: @637
1108 : GIM_Try, /*On fail goto*//*Label 73*/ 662, // Rule ID 15986 //
1109 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 2147483648,
1110 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, 2147483648:{ *:[i64] }) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, -2147483648:{ *:[i64] })
1111 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32,
1112 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1113 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1114 : GIR_AddImm, /*InsnID*/0, /*Imm*/-2147483648,
1115 : GIR_EraseFromParent, /*InsnID*/0,
1116 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1117 : // GIR_Coverage, 15986,
1118 : GIR_Done,
1119 : // Label 73: @662
1120 : GIM_Try, /*On fail goto*//*Label 74*/ 686, // Rule ID 16171 //
1121 : GIM_CheckFeatures, GIFBS_UseIncDec,
1122 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
1123 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }) => (INC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
1124 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INC64r,
1125 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1126 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
1127 : GIR_EraseFromParent, /*InsnID*/0,
1128 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1129 : // GIR_Coverage, 16171,
1130 : GIR_Done,
1131 : // Label 74: @686
1132 : GIM_Try, /*On fail goto*//*Label 75*/ 710, // Rule ID 16175 //
1133 : GIM_CheckFeatures, GIFBS_UseIncDec,
1134 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
1135 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }) => (DEC64r:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
1136 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DEC64r,
1137 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1138 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
1139 : GIR_EraseFromParent, /*InsnID*/0,
1140 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1141 : // GIR_Coverage, 16175,
1142 : GIR_Done,
1143 : // Label 75: @710
1144 : GIM_Try, /*On fail goto*//*Label 76*/ 743, // Rule ID 16127 //
1145 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1146 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1147 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
1148 : // MIs[1] Operand 1
1149 : // No operand predicates
1150 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1151 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (ADD64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2)
1152 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri8,
1153 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1154 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1155 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1156 : GIR_EraseFromParent, /*InsnID*/0,
1157 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1158 : // GIR_Coverage, 16127,
1159 : GIR_Done,
1160 : // Label 76: @743
1161 : GIM_Try, /*On fail goto*//*Label 77*/ 776, // Rule ID 16128 //
1162 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1163 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1164 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
1165 : // MIs[1] Operand 1
1166 : // No operand predicates
1167 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1168 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (ADD64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
1169 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64ri32,
1170 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1171 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1172 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1173 : GIR_EraseFromParent, /*InsnID*/0,
1174 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1175 : // GIR_Coverage, 16128,
1176 : GIR_Done,
1177 : // Label 77: @776
1178 : GIM_Try, /*On fail goto*//*Label 78*/ 792, // Rule ID 16117 //
1179 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
1180 : // (add:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
1181 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD64rr,
1182 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
1183 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1184 : // GIR_Coverage, 16117,
1185 : GIR_Done,
1186 : // Label 78: @792
1187 : GIM_Reject,
1188 : // Label 71: @793
1189 : GIM_Reject,
1190 : // Label 39: @794
1191 : GIM_Try, /*On fail goto*//*Label 79*/ 874,
1192 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
1193 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
1194 : GIM_Try, /*On fail goto*//*Label 80*/ 827, // Rule ID 1819 //
1195 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
1196 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1197 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1198 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1199 : // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
1200 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQrr,
1201 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1202 : // GIR_Coverage, 1819,
1203 : GIR_Done,
1204 : // Label 80: @827
1205 : GIM_Try, /*On fail goto*//*Label 81*/ 850, // Rule ID 1821 //
1206 : GIM_CheckFeatures, GIFBS_UseSSE2,
1207 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1208 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1209 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1210 : // (add:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PADDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
1211 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDQrr,
1212 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1213 : // GIR_Coverage, 1821,
1214 : GIR_Done,
1215 : // Label 81: @850
1216 : GIM_Try, /*On fail goto*//*Label 82*/ 873, // Rule ID 3833 //
1217 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1218 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1219 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1220 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1221 : // (add:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPADDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
1222 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ128rr,
1223 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1224 : // GIR_Coverage, 3833,
1225 : GIR_Done,
1226 : // Label 82: @873
1227 : GIM_Reject,
1228 : // Label 79: @874
1229 : GIM_Reject,
1230 : // Label 40: @875
1231 : GIM_Try, /*On fail goto*//*Label 83*/ 1077,
1232 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
1233 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
1234 : GIM_Try, /*On fail goto*//*Label 84*/ 946, // Rule ID 12361 //
1235 : GIM_CheckFeatures, GIFBS_HasXOP,
1236 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1237 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1238 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
1239 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1240 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1241 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
1242 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
1243 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1244 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1245 : // (add:{ *:[v4i32] } (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2), VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
1246 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr,
1247 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1248 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1249 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1250 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3
1251 : GIR_EraseFromParent, /*InsnID*/0,
1252 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1253 : // GIR_Coverage, 12361,
1254 : GIR_Done,
1255 : // Label 84: @946
1256 : GIM_Try, /*On fail goto*//*Label 85*/ 1007, // Rule ID 18229 //
1257 : GIM_CheckFeatures, GIFBS_HasXOP,
1258 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1259 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1260 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1261 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
1262 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v4s32,
1263 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v4s32,
1264 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
1265 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
1266 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1267 : // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src3, (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
1268 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr,
1269 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1270 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1271 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1272 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3
1273 : GIR_EraseFromParent, /*InsnID*/0,
1274 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1275 : // GIR_Coverage, 18229,
1276 : GIR_Done,
1277 : // Label 85: @1007
1278 : GIM_Try, /*On fail goto*//*Label 86*/ 1030, // Rule ID 1813 //
1279 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
1280 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1281 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1282 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1283 : // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
1284 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDrr,
1285 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1286 : // GIR_Coverage, 1813,
1287 : GIR_Done,
1288 : // Label 86: @1030
1289 : GIM_Try, /*On fail goto*//*Label 87*/ 1053, // Rule ID 1815 //
1290 : GIM_CheckFeatures, GIFBS_UseSSE2,
1291 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1292 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1293 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1294 : // (add:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PADDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
1295 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDDrr,
1296 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1297 : // GIR_Coverage, 1815,
1298 : GIR_Done,
1299 : // Label 87: @1053
1300 : GIM_Try, /*On fail goto*//*Label 88*/ 1076, // Rule ID 3860 //
1301 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1302 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1303 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1304 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1305 : // (add:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPADDDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
1306 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ128rr,
1307 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1308 : // GIR_Coverage, 3860,
1309 : GIR_Done,
1310 : // Label 88: @1076
1311 : GIM_Reject,
1312 : // Label 83: @1077
1313 : GIM_Reject,
1314 : // Label 41: @1078
1315 : GIM_Try, /*On fail goto*//*Label 89*/ 1135,
1316 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
1317 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
1318 : GIM_Try, /*On fail goto*//*Label 90*/ 1111, // Rule ID 1823 //
1319 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
1320 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
1321 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
1322 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
1323 : // (add:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPADDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
1324 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQYrr,
1325 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1326 : // GIR_Coverage, 1823,
1327 : GIR_Done,
1328 : // Label 90: @1111
1329 : GIM_Try, /*On fail goto*//*Label 91*/ 1134, // Rule ID 3824 //
1330 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1331 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
1332 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
1333 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
1334 : // (add:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPADDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
1335 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZ256rr,
1336 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1337 : // GIR_Coverage, 3824,
1338 : GIR_Done,
1339 : // Label 91: @1134
1340 : GIM_Reject,
1341 : // Label 89: @1135
1342 : GIM_Reject,
1343 : // Label 42: @1136
1344 : GIM_Try, /*On fail goto*//*Label 92*/ 1338,
1345 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
1346 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
1347 : GIM_Try, /*On fail goto*//*Label 93*/ 1207, // Rule ID 12360 //
1348 : GIM_CheckFeatures, GIFBS_HasXOP,
1349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1350 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
1351 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
1352 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1353 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1354 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
1355 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
1356 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1357 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1358 : // (add:{ *:[v8i16] } (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2), VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
1359 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr,
1360 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1361 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1362 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1363 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src3
1364 : GIR_EraseFromParent, /*InsnID*/0,
1365 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1366 : // GIR_Coverage, 12360,
1367 : GIR_Done,
1368 : // Label 93: @1207
1369 : GIM_Try, /*On fail goto*//*Label 94*/ 1268, // Rule ID 18228 //
1370 : GIM_CheckFeatures, GIFBS_HasXOP,
1371 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1372 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1373 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1374 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_MUL,
1375 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s16,
1376 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_v8s16,
1377 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VR128RegClassID,
1378 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VR128RegClassID,
1379 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1380 : // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src3, (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
1381 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr,
1382 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1383 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
1384 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src2
1385 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src3
1386 : GIR_EraseFromParent, /*InsnID*/0,
1387 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1388 : // GIR_Coverage, 18228,
1389 : GIR_Done,
1390 : // Label 94: @1268
1391 : GIM_Try, /*On fail goto*//*Label 95*/ 1291, // Rule ID 1807 //
1392 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
1393 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1394 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1395 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1396 : // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
1397 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWrr,
1398 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1399 : // GIR_Coverage, 1807,
1400 : GIR_Done,
1401 : // Label 95: @1291
1402 : GIM_Try, /*On fail goto*//*Label 96*/ 1314, // Rule ID 1809 //
1403 : GIM_CheckFeatures, GIFBS_UseSSE2,
1404 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1405 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1406 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1407 : // (add:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PADDWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
1408 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDWrr,
1409 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1410 : // GIR_Coverage, 1809,
1411 : GIR_Done,
1412 : // Label 96: @1314
1413 : GIM_Try, /*On fail goto*//*Label 97*/ 1337, // Rule ID 3881 //
1414 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
1415 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1416 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1417 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1418 : // (add:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPADDWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
1419 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ128rr,
1420 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1421 : // GIR_Coverage, 3881,
1422 : GIR_Done,
1423 : // Label 97: @1337
1424 : GIM_Reject,
1425 : // Label 92: @1338
1426 : GIM_Reject,
1427 : // Label 43: @1339
1428 : GIM_Try, /*On fail goto*//*Label 98*/ 1396,
1429 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
1430 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
1431 : GIM_Try, /*On fail goto*//*Label 99*/ 1372, // Rule ID 1817 //
1432 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
1433 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
1434 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
1435 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
1436 : // (add:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPADDDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
1437 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDYrr,
1438 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1439 : // GIR_Coverage, 1817,
1440 : GIR_Done,
1441 : // Label 99: @1372
1442 : GIM_Try, /*On fail goto*//*Label 100*/ 1395, // Rule ID 3851 //
1443 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1444 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
1445 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
1446 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
1447 : // (add:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPADDDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
1448 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZ256rr,
1449 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1450 : // GIR_Coverage, 3851,
1451 : GIR_Done,
1452 : // Label 100: @1395
1453 : GIM_Reject,
1454 : // Label 98: @1396
1455 : GIM_Reject,
1456 : // Label 44: @1397
1457 : GIM_Try, /*On fail goto*//*Label 101*/ 1428, // Rule ID 3815 //
1458 : GIM_CheckFeatures, GIFBS_HasAVX512,
1459 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
1460 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
1461 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
1462 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
1463 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
1464 : // (add:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPADDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
1465 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDQZrr,
1466 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1467 : // GIR_Coverage, 3815,
1468 : GIR_Done,
1469 : // Label 101: @1428
1470 : GIM_Reject,
1471 : // Label 45: @1429
1472 : GIM_Try, /*On fail goto*//*Label 102*/ 1509,
1473 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
1474 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
1475 : GIM_Try, /*On fail goto*//*Label 103*/ 1462, // Rule ID 1801 //
1476 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
1477 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1478 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1479 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1480 : // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
1481 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBrr,
1482 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1483 : // GIR_Coverage, 1801,
1484 : GIR_Done,
1485 : // Label 103: @1462
1486 : GIM_Try, /*On fail goto*//*Label 104*/ 1485, // Rule ID 1803 //
1487 : GIM_CheckFeatures, GIFBS_UseSSE2,
1488 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1489 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1490 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1491 : // (add:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PADDBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
1492 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PADDBrr,
1493 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1494 : // GIR_Coverage, 1803,
1495 : GIR_Done,
1496 : // Label 104: @1485
1497 : GIM_Try, /*On fail goto*//*Label 105*/ 1508, // Rule ID 3899 //
1498 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
1499 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1500 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1501 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1502 : // (add:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPADDBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
1503 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ128rr,
1504 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1505 : // GIR_Coverage, 3899,
1506 : GIR_Done,
1507 : // Label 105: @1508
1508 : GIM_Reject,
1509 : // Label 102: @1509
1510 : GIM_Reject,
1511 : // Label 46: @1510
1512 : GIM_Try, /*On fail goto*//*Label 106*/ 1567,
1513 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
1514 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
1515 : GIM_Try, /*On fail goto*//*Label 107*/ 1543, // Rule ID 1811 //
1516 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
1517 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
1518 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
1519 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
1520 : // (add:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPADDWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
1521 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWYrr,
1522 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1523 : // GIR_Coverage, 1811,
1524 : GIR_Done,
1525 : // Label 107: @1543
1526 : GIM_Try, /*On fail goto*//*Label 108*/ 1566, // Rule ID 3875 //
1527 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
1528 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
1529 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
1530 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
1531 : // (add:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPADDWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
1532 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZ256rr,
1533 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1534 : // GIR_Coverage, 3875,
1535 : GIR_Done,
1536 : // Label 108: @1566
1537 : GIM_Reject,
1538 : // Label 106: @1567
1539 : GIM_Reject,
1540 : // Label 47: @1568
1541 : GIM_Try, /*On fail goto*//*Label 109*/ 1599, // Rule ID 3842 //
1542 : GIM_CheckFeatures, GIFBS_HasAVX512,
1543 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
1544 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
1545 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
1546 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
1547 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
1548 : // (add:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPADDDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
1549 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDDZrr,
1550 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1551 : // GIR_Coverage, 3842,
1552 : GIR_Done,
1553 : // Label 109: @1599
1554 : GIM_Reject,
1555 : // Label 48: @1600
1556 : GIM_Try, /*On fail goto*//*Label 110*/ 1657,
1557 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8,
1558 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
1559 : GIM_Try, /*On fail goto*//*Label 111*/ 1633, // Rule ID 1805 //
1560 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
1561 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
1562 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
1563 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
1564 : // (add:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPADDBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
1565 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBYrr,
1566 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1567 : // GIR_Coverage, 1805,
1568 : GIR_Done,
1569 : // Label 111: @1633
1570 : GIM_Try, /*On fail goto*//*Label 112*/ 1656, // Rule ID 3893 //
1571 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
1572 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
1573 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
1574 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
1575 : // (add:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPADDBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
1576 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZ256rr,
1577 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1578 : // GIR_Coverage, 3893,
1579 : GIR_Done,
1580 : // Label 112: @1656
1581 : GIM_Reject,
1582 : // Label 110: @1657
1583 : GIM_Reject,
1584 : // Label 49: @1658
1585 : GIM_Try, /*On fail goto*//*Label 113*/ 1689, // Rule ID 3869 //
1586 : GIM_CheckFeatures, GIFBS_HasBWI,
1587 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
1588 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
1589 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
1590 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
1591 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
1592 : // (add:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPADDWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
1593 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDWZrr,
1594 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1595 : // GIR_Coverage, 3869,
1596 : GIR_Done,
1597 : // Label 113: @1689
1598 : GIM_Reject,
1599 : // Label 50: @1690
1600 : GIM_Try, /*On fail goto*//*Label 114*/ 1721, // Rule ID 3887 //
1601 : GIM_CheckFeatures, GIFBS_HasBWI,
1602 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8,
1603 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8,
1604 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
1605 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
1606 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
1607 : // (add:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPADDBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
1608 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPADDBZrr,
1609 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1610 : // GIR_Coverage, 3887,
1611 : GIR_Done,
1612 : // Label 114: @1721
1613 : GIM_Reject,
1614 : // Label 51: @1722
1615 : GIM_Reject,
1616 : // Label 1: @1723
1617 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 25, /*)*//*default:*//*Label 131*/ 2803,
1618 : /*GILLT_s8*//*Label 115*/ 1753,
1619 : /*GILLT_s16*//*Label 116*/ 1819,
1620 : /*GILLT_s32*//*Label 117*/ 1918,
1621 : /*GILLT_s64*//*Label 118*/ 2017, 0, 0, 0,
1622 : /*GILLT_v2s64*//*Label 119*/ 2119, 0,
1623 : /*GILLT_v4s32*//*Label 120*/ 2200,
1624 : /*GILLT_v4s64*//*Label 121*/ 2281, 0,
1625 : /*GILLT_v8s16*//*Label 122*/ 2339,
1626 : /*GILLT_v8s32*//*Label 123*/ 2420,
1627 : /*GILLT_v8s64*//*Label 124*/ 2478, 0,
1628 : /*GILLT_v16s8*//*Label 125*/ 2510,
1629 : /*GILLT_v16s16*//*Label 126*/ 2591,
1630 : /*GILLT_v16s32*//*Label 127*/ 2649, 0,
1631 : /*GILLT_v32s8*//*Label 128*/ 2681,
1632 : /*GILLT_v32s16*//*Label 129*/ 2739, 0,
1633 : /*GILLT_v64s8*//*Label 130*/ 2771,
1634 : // Label 115: @1753
1635 : GIM_Try, /*On fail goto*//*Label 132*/ 1818,
1636 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
1637 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
1638 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
1639 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
1640 : GIM_Try, /*On fail goto*//*Label 133*/ 1801, // Rule ID 16137 //
1641 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1642 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1643 : // MIs[1] Operand 1
1644 : // No operand predicates
1645 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1646 : // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SUB8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
1647 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB8ri,
1648 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1649 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1650 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1651 : GIR_EraseFromParent, /*InsnID*/0,
1652 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1653 : // GIR_Coverage, 16137,
1654 : GIR_Done,
1655 : // Label 133: @1801
1656 : GIM_Try, /*On fail goto*//*Label 134*/ 1817, // Rule ID 16129 //
1657 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
1658 : // (sub:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (SUB8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
1659 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB8rr,
1660 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
1661 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1662 : // GIR_Coverage, 16129,
1663 : GIR_Done,
1664 : // Label 134: @1817
1665 : GIM_Reject,
1666 : // Label 132: @1818
1667 : GIM_Reject,
1668 : // Label 116: @1819
1669 : GIM_Try, /*On fail goto*//*Label 135*/ 1917,
1670 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
1671 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
1672 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
1673 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
1674 : GIM_Try, /*On fail goto*//*Label 136*/ 1870, // Rule ID 16140 //
1675 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1676 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1677 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8,
1678 : // MIs[1] Operand 1
1679 : // No operand predicates
1680 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1681 : // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (SUB16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2)
1682 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri8,
1683 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1684 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1685 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1686 : GIR_EraseFromParent, /*InsnID*/0,
1687 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1688 : // GIR_Coverage, 16140,
1689 : GIR_Done,
1690 : // Label 136: @1870
1691 : GIM_Try, /*On fail goto*//*Label 137*/ 1900, // Rule ID 16138 //
1692 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1693 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1694 : // MIs[1] Operand 1
1695 : // No operand predicates
1696 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1697 : // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (SUB16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
1698 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB16ri,
1699 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1700 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1701 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1702 : GIR_EraseFromParent, /*InsnID*/0,
1703 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1704 : // GIR_Coverage, 16138,
1705 : GIR_Done,
1706 : // Label 137: @1900
1707 : GIM_Try, /*On fail goto*//*Label 138*/ 1916, // Rule ID 16130 //
1708 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
1709 : // (sub:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (SUB16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
1710 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB16rr,
1711 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
1712 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1713 : // GIR_Coverage, 16130,
1714 : GIR_Done,
1715 : // Label 138: @1916
1716 : GIM_Reject,
1717 : // Label 135: @1917
1718 : GIM_Reject,
1719 : // Label 117: @1918
1720 : GIM_Try, /*On fail goto*//*Label 139*/ 2016,
1721 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
1722 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
1723 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
1724 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
1725 : GIM_Try, /*On fail goto*//*Label 140*/ 1969, // Rule ID 16141 //
1726 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1727 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1728 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
1729 : // MIs[1] Operand 1
1730 : // No operand predicates
1731 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1732 : // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (SUB32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2)
1733 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri8,
1734 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1735 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1736 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1737 : GIR_EraseFromParent, /*InsnID*/0,
1738 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1739 : // GIR_Coverage, 16141,
1740 : GIR_Done,
1741 : // Label 140: @1969
1742 : GIM_Try, /*On fail goto*//*Label 141*/ 1999, // Rule ID 16139 //
1743 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1744 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1745 : // MIs[1] Operand 1
1746 : // No operand predicates
1747 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1748 : // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (SUB32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
1749 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB32ri,
1750 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1751 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1752 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1753 : GIR_EraseFromParent, /*InsnID*/0,
1754 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1755 : // GIR_Coverage, 16139,
1756 : GIR_Done,
1757 : // Label 141: @1999
1758 : GIM_Try, /*On fail goto*//*Label 142*/ 2015, // Rule ID 16131 //
1759 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
1760 : // (sub:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (SUB32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
1761 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB32rr,
1762 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
1763 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1764 : // GIR_Coverage, 16131,
1765 : GIR_Done,
1766 : // Label 142: @2015
1767 : GIM_Reject,
1768 : // Label 139: @2016
1769 : GIM_Reject,
1770 : // Label 118: @2017
1771 : GIM_Try, /*On fail goto*//*Label 143*/ 2118,
1772 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
1773 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
1774 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
1775 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
1776 : GIM_Try, /*On fail goto*//*Label 144*/ 2068, // Rule ID 16142 //
1777 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1778 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1779 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
1780 : // MIs[1] Operand 1
1781 : // No operand predicates
1782 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1783 : // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (SUB64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2)
1784 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri8,
1785 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1786 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1787 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1788 : GIR_EraseFromParent, /*InsnID*/0,
1789 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1790 : // GIR_Coverage, 16142,
1791 : GIR_Done,
1792 : // Label 144: @2068
1793 : GIM_Try, /*On fail goto*//*Label 145*/ 2101, // Rule ID 16143 //
1794 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
1795 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
1796 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
1797 : // MIs[1] Operand 1
1798 : // No operand predicates
1799 : GIM_CheckIsSafeToFold, /*InsnID*/1,
1800 : // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (SUB64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
1801 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SUB64ri32,
1802 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
1803 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
1804 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
1805 : GIR_EraseFromParent, /*InsnID*/0,
1806 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1807 : // GIR_Coverage, 16143,
1808 : GIR_Done,
1809 : // Label 145: @2101
1810 : GIM_Try, /*On fail goto*//*Label 146*/ 2117, // Rule ID 16132 //
1811 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
1812 : // (sub:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (SUB64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
1813 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB64rr,
1814 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
1815 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1816 : // GIR_Coverage, 16132,
1817 : GIR_Done,
1818 : // Label 146: @2117
1819 : GIM_Reject,
1820 : // Label 143: @2118
1821 : GIM_Reject,
1822 : // Label 119: @2119
1823 : GIM_Try, /*On fail goto*//*Label 147*/ 2199,
1824 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
1825 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
1826 : GIM_Try, /*On fail goto*//*Label 148*/ 2152, // Rule ID 1885 //
1827 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
1828 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1829 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1830 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1831 : // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
1832 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQrr,
1833 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1834 : // GIR_Coverage, 1885,
1835 : GIR_Done,
1836 : // Label 148: @2152
1837 : GIM_Try, /*On fail goto*//*Label 149*/ 2175, // Rule ID 1887 //
1838 : GIM_CheckFeatures, GIFBS_UseSSE2,
1839 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1840 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1841 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1842 : // (sub:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PSUBQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
1843 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBQrr,
1844 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1845 : // GIR_Coverage, 1887,
1846 : GIR_Done,
1847 : // Label 149: @2175
1848 : GIM_Try, /*On fail goto*//*Label 150*/ 2198, // Rule ID 3923 //
1849 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1850 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1851 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1852 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1853 : // (sub:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSUBQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
1854 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ128rr,
1855 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1856 : // GIR_Coverage, 3923,
1857 : GIR_Done,
1858 : // Label 150: @2198
1859 : GIM_Reject,
1860 : // Label 147: @2199
1861 : GIM_Reject,
1862 : // Label 120: @2200
1863 : GIM_Try, /*On fail goto*//*Label 151*/ 2280,
1864 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
1865 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
1866 : GIM_Try, /*On fail goto*//*Label 152*/ 2233, // Rule ID 1879 //
1867 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
1868 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1869 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1870 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1871 : // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
1872 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDrr,
1873 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1874 : // GIR_Coverage, 1879,
1875 : GIR_Done,
1876 : // Label 152: @2233
1877 : GIM_Try, /*On fail goto*//*Label 153*/ 2256, // Rule ID 1881 //
1878 : GIM_CheckFeatures, GIFBS_UseSSE2,
1879 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1880 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1881 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1882 : // (sub:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSUBDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
1883 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBDrr,
1884 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1885 : // GIR_Coverage, 1881,
1886 : GIR_Done,
1887 : // Label 153: @2256
1888 : GIM_Try, /*On fail goto*//*Label 154*/ 2279, // Rule ID 3950 //
1889 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1890 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1891 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1892 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1893 : // (sub:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSUBDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
1894 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ128rr,
1895 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1896 : // GIR_Coverage, 3950,
1897 : GIR_Done,
1898 : // Label 154: @2279
1899 : GIM_Reject,
1900 : // Label 151: @2280
1901 : GIM_Reject,
1902 : // Label 121: @2281
1903 : GIM_Try, /*On fail goto*//*Label 155*/ 2338,
1904 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
1905 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
1906 : GIM_Try, /*On fail goto*//*Label 156*/ 2314, // Rule ID 1889 //
1907 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
1908 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
1909 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
1910 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
1911 : // (sub:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSUBQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
1912 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQYrr,
1913 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1914 : // GIR_Coverage, 1889,
1915 : GIR_Done,
1916 : // Label 156: @2314
1917 : GIM_Try, /*On fail goto*//*Label 157*/ 2337, // Rule ID 3914 //
1918 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1919 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
1920 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
1921 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
1922 : // (sub:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSUBQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
1923 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZ256rr,
1924 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1925 : // GIR_Coverage, 3914,
1926 : GIR_Done,
1927 : // Label 157: @2337
1928 : GIM_Reject,
1929 : // Label 155: @2338
1930 : GIM_Reject,
1931 : // Label 122: @2339
1932 : GIM_Try, /*On fail goto*//*Label 158*/ 2419,
1933 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
1934 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
1935 : GIM_Try, /*On fail goto*//*Label 159*/ 2372, // Rule ID 1873 //
1936 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
1937 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1938 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1939 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1940 : // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
1941 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWrr,
1942 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1943 : // GIR_Coverage, 1873,
1944 : GIR_Done,
1945 : // Label 159: @2372
1946 : GIM_Try, /*On fail goto*//*Label 160*/ 2395, // Rule ID 1875 //
1947 : GIM_CheckFeatures, GIFBS_UseSSE2,
1948 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
1949 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
1950 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
1951 : // (sub:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSUBWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
1952 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBWrr,
1953 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1954 : // GIR_Coverage, 1875,
1955 : GIR_Done,
1956 : // Label 160: @2395
1957 : GIM_Try, /*On fail goto*//*Label 161*/ 2418, // Rule ID 3971 //
1958 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
1959 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
1960 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
1961 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
1962 : // (sub:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSUBWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
1963 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ128rr,
1964 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1965 : // GIR_Coverage, 3971,
1966 : GIR_Done,
1967 : // Label 161: @2418
1968 : GIM_Reject,
1969 : // Label 158: @2419
1970 : GIM_Reject,
1971 : // Label 123: @2420
1972 : GIM_Try, /*On fail goto*//*Label 162*/ 2477,
1973 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
1974 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
1975 : GIM_Try, /*On fail goto*//*Label 163*/ 2453, // Rule ID 1883 //
1976 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
1977 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
1978 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
1979 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
1980 : // (sub:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSUBDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
1981 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDYrr,
1982 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1983 : // GIR_Coverage, 1883,
1984 : GIR_Done,
1985 : // Label 163: @2453
1986 : GIM_Try, /*On fail goto*//*Label 164*/ 2476, // Rule ID 3941 //
1987 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
1988 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
1989 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
1990 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
1991 : // (sub:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSUBDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
1992 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZ256rr,
1993 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
1994 : // GIR_Coverage, 3941,
1995 : GIR_Done,
1996 : // Label 164: @2476
1997 : GIM_Reject,
1998 : // Label 162: @2477
1999 : GIM_Reject,
2000 : // Label 124: @2478
2001 : GIM_Try, /*On fail goto*//*Label 165*/ 2509, // Rule ID 3905 //
2002 : GIM_CheckFeatures, GIFBS_HasAVX512,
2003 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
2004 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
2005 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2006 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2007 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2008 : // (sub:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSUBQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
2009 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBQZrr,
2010 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2011 : // GIR_Coverage, 3905,
2012 : GIR_Done,
2013 : // Label 165: @2509
2014 : GIM_Reject,
2015 : // Label 125: @2510
2016 : GIM_Try, /*On fail goto*//*Label 166*/ 2590,
2017 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
2018 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
2019 : GIM_Try, /*On fail goto*//*Label 167*/ 2543, // Rule ID 1867 //
2020 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
2021 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
2022 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
2023 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
2024 : // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
2025 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBrr,
2026 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2027 : // GIR_Coverage, 1867,
2028 : GIR_Done,
2029 : // Label 167: @2543
2030 : GIM_Try, /*On fail goto*//*Label 168*/ 2566, // Rule ID 1869 //
2031 : GIM_CheckFeatures, GIFBS_UseSSE2,
2032 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
2033 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
2034 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
2035 : // (sub:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSUBBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
2036 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PSUBBrr,
2037 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2038 : // GIR_Coverage, 1869,
2039 : GIR_Done,
2040 : // Label 168: @2566
2041 : GIM_Try, /*On fail goto*//*Label 169*/ 2589, // Rule ID 3989 //
2042 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
2043 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
2044 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
2045 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
2046 : // (sub:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2) => (VPSUBBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1, VR128X:{ *:[v16i8] }:$src2)
2047 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ128rr,
2048 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2049 : // GIR_Coverage, 3989,
2050 : GIR_Done,
2051 : // Label 169: @2589
2052 : GIM_Reject,
2053 : // Label 166: @2590
2054 : GIM_Reject,
2055 : // Label 126: @2591
2056 : GIM_Try, /*On fail goto*//*Label 170*/ 2648,
2057 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
2058 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
2059 : GIM_Try, /*On fail goto*//*Label 171*/ 2624, // Rule ID 1877 //
2060 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
2061 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
2062 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
2063 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
2064 : // (sub:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSUBWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
2065 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWYrr,
2066 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2067 : // GIR_Coverage, 1877,
2068 : GIR_Done,
2069 : // Label 171: @2624
2070 : GIM_Try, /*On fail goto*//*Label 172*/ 2647, // Rule ID 3965 //
2071 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
2072 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
2073 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
2074 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
2075 : // (sub:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSUBWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
2076 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZ256rr,
2077 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2078 : // GIR_Coverage, 3965,
2079 : GIR_Done,
2080 : // Label 172: @2647
2081 : GIM_Reject,
2082 : // Label 170: @2648
2083 : GIM_Reject,
2084 : // Label 127: @2649
2085 : GIM_Try, /*On fail goto*//*Label 173*/ 2680, // Rule ID 3932 //
2086 : GIM_CheckFeatures, GIFBS_HasAVX512,
2087 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
2088 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
2089 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2090 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2091 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2092 : // (sub:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSUBDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
2093 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBDZrr,
2094 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2095 : // GIR_Coverage, 3932,
2096 : GIR_Done,
2097 : // Label 173: @2680
2098 : GIM_Reject,
2099 : // Label 128: @2681
2100 : GIM_Try, /*On fail goto*//*Label 174*/ 2738,
2101 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8,
2102 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
2103 : GIM_Try, /*On fail goto*//*Label 175*/ 2714, // Rule ID 1871 //
2104 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
2105 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
2106 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
2107 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
2108 : // (sub:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSUBBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
2109 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBYrr,
2110 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2111 : // GIR_Coverage, 1871,
2112 : GIR_Done,
2113 : // Label 175: @2714
2114 : GIM_Try, /*On fail goto*//*Label 176*/ 2737, // Rule ID 3983 //
2115 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
2116 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
2117 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
2118 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
2119 : // (sub:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2) => (VPSUBBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1, VR256X:{ *:[v32i8] }:$src2)
2120 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZ256rr,
2121 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2122 : // GIR_Coverage, 3983,
2123 : GIR_Done,
2124 : // Label 176: @2737
2125 : GIM_Reject,
2126 : // Label 174: @2738
2127 : GIM_Reject,
2128 : // Label 129: @2739
2129 : GIM_Try, /*On fail goto*//*Label 177*/ 2770, // Rule ID 3959 //
2130 : GIM_CheckFeatures, GIFBS_HasBWI,
2131 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
2132 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
2133 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2134 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2135 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2136 : // (sub:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSUBWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
2137 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBWZrr,
2138 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2139 : // GIR_Coverage, 3959,
2140 : GIR_Done,
2141 : // Label 177: @2770
2142 : GIM_Reject,
2143 : // Label 130: @2771
2144 : GIM_Try, /*On fail goto*//*Label 178*/ 2802, // Rule ID 3977 //
2145 : GIM_CheckFeatures, GIFBS_HasBWI,
2146 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8,
2147 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s8,
2148 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2149 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2150 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2151 : // (sub:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2) => (VPSUBBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1, VR512:{ *:[v64i8] }:$src2)
2152 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSUBBZrr,
2153 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2154 : // GIR_Coverage, 3977,
2155 : GIR_Done,
2156 : // Label 178: @2802
2157 : GIM_Reject,
2158 : // Label 131: @2803
2159 : GIM_Reject,
2160 : // Label 2: @2804
2161 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 23, /*)*//*default:*//*Label 191*/ 3569,
2162 : /*GILLT_s16*//*Label 179*/ 2831,
2163 : /*GILLT_s32*//*Label 180*/ 2930,
2164 : /*GILLT_s64*//*Label 181*/ 3029, 0, 0, 0,
2165 : /*GILLT_v2s64*//*Label 182*/ 3131, 0,
2166 : /*GILLT_v4s32*//*Label 183*/ 3163,
2167 : /*GILLT_v4s64*//*Label 184*/ 3244, 0,
2168 : /*GILLT_v8s16*//*Label 185*/ 3276,
2169 : /*GILLT_v8s32*//*Label 186*/ 3357,
2170 : /*GILLT_v8s64*//*Label 187*/ 3415, 0, 0,
2171 : /*GILLT_v16s16*//*Label 188*/ 3447,
2172 : /*GILLT_v16s32*//*Label 189*/ 3505, 0, 0,
2173 : /*GILLT_v32s16*//*Label 190*/ 3537,
2174 : // Label 179: @2831
2175 : GIM_Try, /*On fail goto*//*Label 192*/ 2929,
2176 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
2177 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
2178 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
2179 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
2180 : GIM_Try, /*On fail goto*//*Label 193*/ 2882, // Rule ID 16158 //
2181 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2182 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2183 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8,
2184 : // MIs[1] Operand 1
2185 : // No operand predicates
2186 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2187 : // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (IMUL16rri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2)
2188 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri8,
2189 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2190 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2191 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2192 : GIR_EraseFromParent, /*InsnID*/0,
2193 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2194 : // GIR_Coverage, 16158,
2195 : GIR_Done,
2196 : // Label 193: @2882
2197 : GIM_Try, /*On fail goto*//*Label 194*/ 2912, // Rule ID 16156 //
2198 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2199 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2200 : // MIs[1] Operand 1
2201 : // No operand predicates
2202 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2203 : // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (IMUL16rri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
2204 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL16rri,
2205 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2206 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2207 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2208 : GIR_EraseFromParent, /*InsnID*/0,
2209 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2210 : // GIR_Coverage, 16156,
2211 : GIR_Done,
2212 : // Label 194: @2912
2213 : GIM_Try, /*On fail goto*//*Label 195*/ 2928, // Rule ID 16150 //
2214 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
2215 : // (mul:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (IMUL16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
2216 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL16rr,
2217 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
2218 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2219 : // GIR_Coverage, 16150,
2220 : GIR_Done,
2221 : // Label 195: @2928
2222 : GIM_Reject,
2223 : // Label 192: @2929
2224 : GIM_Reject,
2225 : // Label 180: @2930
2226 : GIM_Try, /*On fail goto*//*Label 196*/ 3028,
2227 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
2228 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2229 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2230 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
2231 : GIM_Try, /*On fail goto*//*Label 197*/ 2981, // Rule ID 16159 //
2232 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2233 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2234 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
2235 : // MIs[1] Operand 1
2236 : // No operand predicates
2237 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2238 : // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (IMUL32rri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2)
2239 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri8,
2240 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2241 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2242 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2243 : GIR_EraseFromParent, /*InsnID*/0,
2244 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2245 : // GIR_Coverage, 16159,
2246 : GIR_Done,
2247 : // Label 197: @2981
2248 : GIM_Try, /*On fail goto*//*Label 198*/ 3011, // Rule ID 16157 //
2249 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2250 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2251 : // MIs[1] Operand 1
2252 : // No operand predicates
2253 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2254 : // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (IMUL32rri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
2255 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL32rri,
2256 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2257 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2258 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2259 : GIR_EraseFromParent, /*InsnID*/0,
2260 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2261 : // GIR_Coverage, 16157,
2262 : GIR_Done,
2263 : // Label 198: @3011
2264 : GIM_Try, /*On fail goto*//*Label 199*/ 3027, // Rule ID 16151 //
2265 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
2266 : // (mul:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (IMUL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
2267 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL32rr,
2268 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
2269 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2270 : // GIR_Coverage, 16151,
2271 : GIR_Done,
2272 : // Label 199: @3027
2273 : GIM_Reject,
2274 : // Label 196: @3028
2275 : GIM_Reject,
2276 : // Label 181: @3029
2277 : GIM_Try, /*On fail goto*//*Label 200*/ 3130,
2278 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
2279 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
2280 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
2281 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
2282 : GIM_Try, /*On fail goto*//*Label 201*/ 3080, // Rule ID 16160 //
2283 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2284 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2285 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
2286 : // MIs[1] Operand 1
2287 : // No operand predicates
2288 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2289 : // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (IMUL64rri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2)
2290 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri8,
2291 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2292 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2293 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2294 : GIR_EraseFromParent, /*InsnID*/0,
2295 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2296 : // GIR_Coverage, 16160,
2297 : GIR_Done,
2298 : // Label 201: @3080
2299 : GIM_Try, /*On fail goto*//*Label 202*/ 3113, // Rule ID 16161 //
2300 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2301 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2302 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
2303 : // MIs[1] Operand 1
2304 : // No operand predicates
2305 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2306 : // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (IMUL64rri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
2307 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::IMUL64rri32,
2308 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2309 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2310 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2311 : GIR_EraseFromParent, /*InsnID*/0,
2312 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2313 : // GIR_Coverage, 16161,
2314 : GIR_Done,
2315 : // Label 202: @3113
2316 : GIM_Try, /*On fail goto*//*Label 203*/ 3129, // Rule ID 16152 //
2317 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
2318 : // (mul:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (IMUL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
2319 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::IMUL64rr,
2320 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
2321 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2322 : // GIR_Coverage, 16152,
2323 : GIR_Done,
2324 : // Label 203: @3129
2325 : GIM_Reject,
2326 : // Label 200: @3130
2327 : GIM_Reject,
2328 : // Label 182: @3131
2329 : GIM_Try, /*On fail goto*//*Label 204*/ 3162, // Rule ID 4202 //
2330 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
2331 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
2332 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
2333 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
2334 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
2335 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
2336 : // (mul:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPMULLQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
2337 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ128rr,
2338 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2339 : // GIR_Coverage, 4202,
2340 : GIR_Done,
2341 : // Label 204: @3162
2342 : GIM_Reject,
2343 : // Label 183: @3163
2344 : GIM_Try, /*On fail goto*//*Label 205*/ 3243,
2345 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
2346 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
2347 : GIM_Try, /*On fail goto*//*Label 206*/ 3196, // Rule ID 2507 //
2348 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
2349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
2350 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
2351 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
2352 : // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
2353 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDrr,
2354 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2355 : // GIR_Coverage, 2507,
2356 : GIR_Done,
2357 : // Label 206: @3196
2358 : GIM_Try, /*On fail goto*//*Label 207*/ 3219, // Rule ID 2515 //
2359 : GIM_CheckFeatures, GIFBS_UseSSE41,
2360 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
2361 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
2362 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
2363 : // (mul:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PMULLDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
2364 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLDrr,
2365 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2366 : // GIR_Coverage, 2515,
2367 : GIR_Done,
2368 : // Label 207: @3219
2369 : GIM_Try, /*On fail goto*//*Label 208*/ 3242, // Rule ID 4157 //
2370 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
2371 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
2372 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
2373 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
2374 : // (mul:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPMULLDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
2375 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ128rr,
2376 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2377 : // GIR_Coverage, 4157,
2378 : GIR_Done,
2379 : // Label 208: @3242
2380 : GIM_Reject,
2381 : // Label 205: @3243
2382 : GIM_Reject,
2383 : // Label 184: @3244
2384 : GIM_Try, /*On fail goto*//*Label 209*/ 3275, // Rule ID 4193 //
2385 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
2386 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
2387 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
2388 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
2389 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
2390 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
2391 : // (mul:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPMULLQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
2392 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZ256rr,
2393 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2394 : // GIR_Coverage, 4193,
2395 : GIR_Done,
2396 : // Label 209: @3275
2397 : GIM_Reject,
2398 : // Label 185: @3276
2399 : GIM_Try, /*On fail goto*//*Label 210*/ 3356,
2400 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
2401 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
2402 : GIM_Try, /*On fail goto*//*Label 211*/ 3309, // Rule ID 1849 //
2403 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX_Or_NoBWI,
2404 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
2405 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
2406 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
2407 : // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
2408 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWrr,
2409 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2410 : // GIR_Coverage, 1849,
2411 : GIR_Done,
2412 : // Label 211: @3309
2413 : GIM_Try, /*On fail goto*//*Label 212*/ 3332, // Rule ID 1851 //
2414 : GIM_CheckFeatures, GIFBS_UseSSE2,
2415 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
2416 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
2417 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
2418 : // (mul:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PMULLWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
2419 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PMULLWrr,
2420 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2421 : // GIR_Coverage, 1851,
2422 : GIR_Done,
2423 : // Label 212: @3332
2424 : GIM_Try, /*On fail goto*//*Label 213*/ 3355, // Rule ID 4178 //
2425 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
2426 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
2427 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
2428 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
2429 : // (mul:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPMULLWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
2430 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ128rr,
2431 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2432 : // GIR_Coverage, 4178,
2433 : GIR_Done,
2434 : // Label 213: @3355
2435 : GIM_Reject,
2436 : // Label 210: @3356
2437 : GIM_Reject,
2438 : // Label 186: @3357
2439 : GIM_Try, /*On fail goto*//*Label 214*/ 3414,
2440 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
2441 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
2442 : GIM_Try, /*On fail goto*//*Label 215*/ 3390, // Rule ID 2511 //
2443 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
2444 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
2445 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
2446 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
2447 : // (mul:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPMULLDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
2448 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDYrr,
2449 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2450 : // GIR_Coverage, 2511,
2451 : GIR_Done,
2452 : // Label 215: @3390
2453 : GIM_Try, /*On fail goto*//*Label 216*/ 3413, // Rule ID 4148 //
2454 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
2455 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
2456 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
2457 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
2458 : // (mul:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPMULLDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
2459 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZ256rr,
2460 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2461 : // GIR_Coverage, 4148,
2462 : GIR_Done,
2463 : // Label 216: @3413
2464 : GIM_Reject,
2465 : // Label 214: @3414
2466 : GIM_Reject,
2467 : // Label 187: @3415
2468 : GIM_Try, /*On fail goto*//*Label 217*/ 3446, // Rule ID 4184 //
2469 : GIM_CheckFeatures, GIFBS_HasDQI,
2470 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
2471 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
2472 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2473 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2474 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2475 : // (mul:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPMULLQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
2476 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLQZrr,
2477 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2478 : // GIR_Coverage, 4184,
2479 : GIR_Done,
2480 : // Label 217: @3446
2481 : GIM_Reject,
2482 : // Label 188: @3447
2483 : GIM_Try, /*On fail goto*//*Label 218*/ 3504,
2484 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
2485 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
2486 : GIM_Try, /*On fail goto*//*Label 219*/ 3480, // Rule ID 1853 //
2487 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX_Or_NoBWI,
2488 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
2489 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
2490 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
2491 : // (mul:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPMULLWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
2492 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWYrr,
2493 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2494 : // GIR_Coverage, 1853,
2495 : GIR_Done,
2496 : // Label 219: @3480
2497 : GIM_Try, /*On fail goto*//*Label 220*/ 3503, // Rule ID 4172 //
2498 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
2499 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
2500 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
2501 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
2502 : // (mul:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPMULLWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
2503 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZ256rr,
2504 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2505 : // GIR_Coverage, 4172,
2506 : GIR_Done,
2507 : // Label 220: @3503
2508 : GIM_Reject,
2509 : // Label 218: @3504
2510 : GIM_Reject,
2511 : // Label 189: @3505
2512 : GIM_Try, /*On fail goto*//*Label 221*/ 3536, // Rule ID 4139 //
2513 : GIM_CheckFeatures, GIFBS_HasAVX512,
2514 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
2515 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
2516 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2517 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2518 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2519 : // (mul:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPMULLDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
2520 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLDZrr,
2521 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2522 : // GIR_Coverage, 4139,
2523 : GIR_Done,
2524 : // Label 221: @3536
2525 : GIM_Reject,
2526 : // Label 190: @3537
2527 : GIM_Try, /*On fail goto*//*Label 222*/ 3568, // Rule ID 4166 //
2528 : GIM_CheckFeatures, GIFBS_HasBWI,
2529 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
2530 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
2531 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
2532 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
2533 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
2534 : // (mul:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPMULLWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
2535 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMULLWZrr,
2536 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2537 : // GIR_Coverage, 4166,
2538 : GIR_Done,
2539 : // Label 222: @3568
2540 : GIM_Reject,
2541 : // Label 191: @3569
2542 : GIM_Reject,
2543 : // Label 3: @3570
2544 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 24, /*)*//*default:*//*Label 237*/ 6681,
2545 : /*GILLT_s1*//*Label 223*/ 3600,
2546 : /*GILLT_s8*//*Label 224*/ 3898,
2547 : /*GILLT_s16*//*Label 225*/ 3964,
2548 : /*GILLT_s32*//*Label 226*/ 4063,
2549 : /*GILLT_s64*//*Label 227*/ 5224, 0, 0,
2550 : /*GILLT_v2s1*//*Label 228*/ 6096,
2551 : /*GILLT_v2s64*//*Label 229*/ 6189,
2552 : /*GILLT_v4s1*//*Label 230*/ 6270, 0,
2553 : /*GILLT_v4s64*//*Label 231*/ 6363,
2554 : /*GILLT_v8s1*//*Label 232*/ 6444, 0, 0,
2555 : /*GILLT_v8s64*//*Label 233*/ 6553,
2556 : /*GILLT_v16s1*//*Label 234*/ 6585, 0, 0, 0,
2557 : /*GILLT_v32s1*//*Label 235*/ 6617, 0, 0,
2558 : /*GILLT_v64s1*//*Label 236*/ 6649,
2559 : // Label 223: @3600
2560 : GIM_Try, /*On fail goto*//*Label 238*/ 3897,
2561 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1,
2562 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1,
2563 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
2564 : GIM_Try, /*On fail goto*//*Label 239*/ 3715, // Rule ID 13730 //
2565 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2566 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
2567 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
2568 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
2569 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID,
2570 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
2571 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID,
2572 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2573 : // (and:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
2574 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
2575 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
2576 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
2577 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
2578 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
2579 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
2580 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
2581 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
2582 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
2583 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
2584 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
2585 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr,
2586 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
2587 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
2588 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
2589 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
2590 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
2591 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2592 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
2593 : GIR_EraseFromParent, /*InsnID*/0,
2594 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
2595 : // GIR_Coverage, 13730,
2596 : GIR_Done,
2597 : // Label 239: @3715
2598 : GIM_Try, /*On fail goto*//*Label 240*/ 3816, // Rule ID 18301 //
2599 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID,
2600 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2601 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
2602 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
2603 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
2604 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID,
2605 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
2606 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2607 : // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDNWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
2608 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
2609 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
2610 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
2611 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
2612 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
2613 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
2614 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
2615 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
2616 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
2617 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
2618 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
2619 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDNWrr,
2620 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
2621 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
2622 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
2623 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
2624 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
2625 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2626 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
2627 : GIR_EraseFromParent, /*InsnID*/0,
2628 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
2629 : // GIR_Coverage, 18301,
2630 : GIR_Done,
2631 : // Label 240: @3816
2632 : GIM_Try, /*On fail goto*//*Label 241*/ 3896, // Rule ID 13726 //
2633 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID,
2634 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID,
2635 : // (and:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
2636 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
2637 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
2638 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
2639 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
2640 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
2641 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
2642 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
2643 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
2644 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
2645 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
2646 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
2647 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr,
2648 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
2649 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
2650 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
2651 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
2652 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
2653 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2654 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
2655 : GIR_EraseFromParent, /*InsnID*/0,
2656 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
2657 : // GIR_Coverage, 13726,
2658 : GIR_Done,
2659 : // Label 241: @3896
2660 : GIM_Reject,
2661 : // Label 238: @3897
2662 : GIM_Reject,
2663 : // Label 224: @3898
2664 : GIM_Try, /*On fail goto*//*Label 242*/ 3963,
2665 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
2666 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
2667 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
2668 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
2669 : GIM_Try, /*On fail goto*//*Label 243*/ 3946, // Rule ID 16214 //
2670 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2671 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2672 : // MIs[1] Operand 1
2673 : // No operand predicates
2674 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2675 : // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (AND8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
2676 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND8ri,
2677 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2678 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2679 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2680 : GIR_EraseFromParent, /*InsnID*/0,
2681 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2682 : // GIR_Coverage, 16214,
2683 : GIR_Done,
2684 : // Label 243: @3946
2685 : GIM_Try, /*On fail goto*//*Label 244*/ 3962, // Rule ID 16206 //
2686 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
2687 : // (and:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (AND8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
2688 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND8rr,
2689 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
2690 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2691 : // GIR_Coverage, 16206,
2692 : GIR_Done,
2693 : // Label 244: @3962
2694 : GIM_Reject,
2695 : // Label 242: @3963
2696 : GIM_Reject,
2697 : // Label 225: @3964
2698 : GIM_Try, /*On fail goto*//*Label 245*/ 4062,
2699 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
2700 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
2701 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
2702 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
2703 : GIM_Try, /*On fail goto*//*Label 246*/ 4015, // Rule ID 16217 //
2704 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2705 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2706 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8,
2707 : // MIs[1] Operand 1
2708 : // No operand predicates
2709 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2710 : // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (AND16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2)
2711 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri8,
2712 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2713 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2714 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2715 : GIR_EraseFromParent, /*InsnID*/0,
2716 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2717 : // GIR_Coverage, 16217,
2718 : GIR_Done,
2719 : // Label 246: @4015
2720 : GIM_Try, /*On fail goto*//*Label 247*/ 4045, // Rule ID 16215 //
2721 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2722 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
2723 : // MIs[1] Operand 1
2724 : // No operand predicates
2725 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2726 : // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (AND16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
2727 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND16ri,
2728 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2729 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
2730 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
2731 : GIR_EraseFromParent, /*InsnID*/0,
2732 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2733 : // GIR_Coverage, 16215,
2734 : GIR_Done,
2735 : // Label 247: @4045
2736 : GIM_Try, /*On fail goto*//*Label 248*/ 4061, // Rule ID 16207 //
2737 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
2738 : // (and:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (AND16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
2739 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND16rr,
2740 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
2741 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2742 : // GIR_Coverage, 16207,
2743 : GIR_Done,
2744 : // Label 248: @4061
2745 : GIM_Reject,
2746 : // Label 245: @4062
2747 : GIM_Reject,
2748 : // Label 226: @4063
2749 : GIM_Try, /*On fail goto*//*Label 249*/ 5223,
2750 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
2751 : GIM_Try, /*On fail goto*//*Label 250*/ 4164, // Rule ID 18160 //
2752 : GIM_CheckFeatures, GIFBS_HasBMI2,
2753 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2754 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2755 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2756 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
2757 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2758 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
2759 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -1,
2760 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2761 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC,
2762 : GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
2763 : GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2764 : GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB,
2765 : GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
2766 : GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
2767 : GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32,
2768 : GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID,
2769 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
2770 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2771 : GIM_CheckIsSafeToFold, /*InsnID*/2,
2772 : GIM_CheckIsSafeToFold, /*InsnID*/3,
2773 : // (and:{ *:[i32] } (srl:{ *:[i32] } -1:{ *:[i32] }, (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz))), GR32:{ *:[i32] }:$src) => (BZHI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32:{ *:[i32] }:$lz)
2774 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr,
2775 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2776 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
2777 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz
2778 : GIR_EraseFromParent, /*InsnID*/0,
2779 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2780 : // GIR_Coverage, 18160,
2781 : GIR_Done,
2782 : // Label 250: @4164
2783 : GIM_Try, /*On fail goto*//*Label 251*/ 4259, // Rule ID 12208 //
2784 : GIM_CheckFeatures, GIFBS_HasBMI2,
2785 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2786 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2787 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
2788 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2789 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_LSHR,
2790 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2791 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
2792 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -1,
2793 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
2794 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC,
2795 : GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
2796 : GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
2797 : GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB,
2798 : GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
2799 : GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
2800 : GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32,
2801 : GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID,
2802 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2803 : GIM_CheckIsSafeToFold, /*InsnID*/2,
2804 : GIM_CheckIsSafeToFold, /*InsnID*/3,
2805 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (srl:{ *:[i32] } -1:{ *:[i32] }, (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz)))) => (BZHI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32:{ *:[i32] }:$lz)
2806 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr,
2807 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2808 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
2809 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz
2810 : GIR_EraseFromParent, /*InsnID*/0,
2811 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2812 : // GIR_Coverage, 12208,
2813 : GIR_Done,
2814 : // Label 251: @4259
2815 : GIM_Try, /*On fail goto*//*Label 252*/ 4334, // Rule ID 18170 //
2816 : GIM_CheckFeatures, GIFBS_HasTBM,
2817 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2818 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2819 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2820 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2821 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2822 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2823 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
2824 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
2825 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2826 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
2827 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
2828 : // MIs[2] src
2829 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2830 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
2831 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2832 : GIM_CheckIsSafeToFold, /*InsnID*/2,
2833 : // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2834 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr,
2835 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2836 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
2837 : GIR_EraseFromParent, /*InsnID*/0,
2838 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2839 : // GIR_Coverage, 18170,
2840 : GIR_Done,
2841 : // Label 252: @4334
2842 : GIM_Try, /*On fail goto*//*Label 253*/ 4409, // Rule ID 18182 //
2843 : GIM_CheckFeatures, GIFBS_HasTBM,
2844 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2845 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2846 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2847 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2848 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2849 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2850 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
2851 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
2852 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2853 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
2854 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
2855 : // MIs[2] src
2856 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2857 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
2858 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2859 : GIM_CheckIsSafeToFold, /*InsnID*/2,
2860 : // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2861 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr,
2862 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2863 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
2864 : GIR_EraseFromParent, /*InsnID*/0,
2865 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2866 : // GIR_Coverage, 18182,
2867 : GIR_Done,
2868 : // Label 253: @4409
2869 : GIM_Try, /*On fail goto*//*Label 254*/ 4484, // Rule ID 12224 //
2870 : GIM_CheckFeatures, GIFBS_HasTBM,
2871 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2872 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2873 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2874 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
2875 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2876 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2877 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
2878 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
2879 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2880 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
2881 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
2882 : // MIs[2] src
2883 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2884 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
2885 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2886 : GIM_CheckIsSafeToFold, /*InsnID*/2,
2887 : // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2888 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC32rr,
2889 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2890 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
2891 : GIR_EraseFromParent, /*InsnID*/0,
2892 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2893 : // GIR_Coverage, 12224,
2894 : GIR_Done,
2895 : // Label 254: @4484
2896 : GIM_Try, /*On fail goto*//*Label 255*/ 4559, // Rule ID 12236 //
2897 : GIM_CheckFeatures, GIFBS_HasTBM,
2898 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2899 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2900 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2901 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
2902 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2903 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2904 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
2905 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
2906 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
2907 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
2908 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
2909 : // MIs[2] src
2910 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
2911 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
2912 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2913 : GIM_CheckIsSafeToFold, /*InsnID*/2,
2914 : // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (TZMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2915 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK32rr,
2916 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2917 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
2918 : GIR_EraseFromParent, /*InsnID*/0,
2919 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2920 : // GIR_Coverage, 12236,
2921 : GIR_Done,
2922 : // Label 255: @4559
2923 : GIM_Try, /*On fail goto*//*Label 256*/ 4613, // Rule ID 18164 //
2924 : GIM_CheckFeatures, GIFBS_HasTBM,
2925 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2926 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2927 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2928 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2929 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2930 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
2931 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
2932 : // MIs[0] src
2933 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
2934 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2935 : // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2936 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr,
2937 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2938 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
2939 : GIR_EraseFromParent, /*InsnID*/0,
2940 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2941 : // GIR_Coverage, 18164,
2942 : GIR_Done,
2943 : // Label 256: @4613
2944 : GIM_Try, /*On fail goto*//*Label 257*/ 4667, // Rule ID 18690 //
2945 : GIM_CheckFeatures, GIFBS_HasBMI,
2946 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2947 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2948 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2949 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2950 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2951 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
2952 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
2953 : // MIs[0] src
2954 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
2955 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2956 : // (and:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2957 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr,
2958 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2959 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
2960 : GIR_EraseFromParent, /*InsnID*/0,
2961 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2962 : // GIR_Coverage, 18690,
2963 : GIR_Done,
2964 : // Label 257: @4667
2965 : GIM_Try, /*On fail goto*//*Label 258*/ 4721, // Rule ID 18694 //
2966 : GIM_CheckFeatures, GIFBS_HasBMI,
2967 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2968 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
2969 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
2970 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
2971 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2972 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
2973 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID,
2974 : // MIs[0] src
2975 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
2976 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2977 : // (and:{ *:[i32] } (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2978 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr,
2979 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
2980 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
2981 : GIR_EraseFromParent, /*InsnID*/0,
2982 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
2983 : // GIR_Coverage, 18694,
2984 : GIR_Done,
2985 : // Label 258: @4721
2986 : GIM_Try, /*On fail goto*//*Label 259*/ 4775, // Rule ID 12218 //
2987 : GIM_CheckFeatures, GIFBS_HasTBM,
2988 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
2989 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
2990 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
2991 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
2992 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
2993 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
2994 : // MIs[1] src
2995 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
2996 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
2997 : GIM_CheckIsSafeToFold, /*InsnID*/1,
2998 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
2999 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL32rr,
3000 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3001 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
3002 : GIR_EraseFromParent, /*InsnID*/0,
3003 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3004 : // GIR_Coverage, 12218,
3005 : GIR_Done,
3006 : // Label 259: @4775
3007 : GIM_Try, /*On fail goto*//*Label 260*/ 4829, // Rule ID 16409 //
3008 : GIM_CheckFeatures, GIFBS_HasBMI,
3009 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3010 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3011 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3012 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3013 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3014 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3015 : // MIs[1] src
3016 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3017 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3018 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3019 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3020 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR32rr,
3021 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3022 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
3023 : GIR_EraseFromParent, /*InsnID*/0,
3024 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3025 : // GIR_Coverage, 16409,
3026 : GIR_Done,
3027 : // Label 260: @4829
3028 : GIM_Try, /*On fail goto*//*Label 261*/ 4883, // Rule ID 16413 //
3029 : GIM_CheckFeatures, GIFBS_HasBMI,
3030 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3031 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3032 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3033 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3034 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
3035 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3036 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
3037 : // MIs[1] src
3038 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3039 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3040 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } 0:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLSI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3041 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI32rr,
3042 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3043 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
3044 : GIR_EraseFromParent, /*InsnID*/0,
3045 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3046 : // GIR_Coverage, 16413,
3047 : GIR_Done,
3048 : // Label 261: @4883
3049 : GIM_Try, /*On fail goto*//*Label 262*/ 4934, // Rule ID 15990 //
3050 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3051 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3052 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3053 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 65535,
3054 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 65535:{ *:[i32] }) => (MOVZX32rr16:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src1, sub_16bit:{ *:[i32] }))
3055 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s16,
3056 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
3057 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
3058 : GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src1
3059 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3060 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr16,
3061 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3062 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
3063 : GIR_EraseFromParent, /*InsnID*/0,
3064 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3065 : // GIR_Coverage, 15990,
3066 : GIR_Done,
3067 : // Label 262: @4934
3068 : GIM_Try, /*On fail goto*//*Label 263*/ 4985, // Rule ID 15991 //
3069 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3070 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3071 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3072 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 255,
3073 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, 255:{ *:[i32] }) => (MOVZX32rr8:{ *:[i32] } (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src1, sub_8bit:{ *:[i32] }))
3074 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s8,
3075 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::COPY,
3076 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
3077 : GIR_CopySubReg, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src1
3078 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3079 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOVZX32rr8,
3080 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3081 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
3082 : GIR_EraseFromParent, /*InsnID*/0,
3083 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3084 : // GIR_Coverage, 15991,
3085 : GIR_Done,
3086 : // Label 263: @4985
3087 : GIM_Try, /*On fail goto*//*Label 264*/ 5030, // Rule ID 16218 //
3088 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3089 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3090 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3091 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3092 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3093 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
3094 : // MIs[1] Operand 1
3095 : // No operand predicates
3096 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3097 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (AND32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2)
3098 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri8,
3099 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3100 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3101 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3102 : GIR_EraseFromParent, /*InsnID*/0,
3103 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3104 : // GIR_Coverage, 16218,
3105 : GIR_Done,
3106 : // Label 264: @5030
3107 : GIM_Try, /*On fail goto*//*Label 265*/ 5072, // Rule ID 16216 //
3108 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3109 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3110 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3111 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3112 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3113 : // MIs[1] Operand 1
3114 : // No operand predicates
3115 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3116 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (AND32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
3117 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND32ri,
3118 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3119 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3120 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3121 : GIR_EraseFromParent, /*InsnID*/0,
3122 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3123 : // GIR_Coverage, 16216,
3124 : GIR_Done,
3125 : // Label 265: @5072
3126 : GIM_Try, /*On fail goto*//*Label 266*/ 5133, // Rule ID 12246 //
3127 : GIM_CheckFeatures, GIFBS_HasBMI,
3128 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3129 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3130 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3131 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3132 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3133 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3134 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
3135 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3136 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
3137 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3138 : // (and:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src2) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3139 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr,
3140 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3141 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3142 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2
3143 : GIR_EraseFromParent, /*InsnID*/0,
3144 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3145 : // GIR_Coverage, 12246,
3146 : GIR_Done,
3147 : // Label 266: @5133
3148 : GIM_Try, /*On fail goto*//*Label 267*/ 5194, // Rule ID 18184 //
3149 : GIM_CheckFeatures, GIFBS_HasBMI,
3150 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3151 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3152 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3153 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3154 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3155 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3156 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3157 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
3158 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3159 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3160 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src2, (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] })) => (ANDN32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3161 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN32rr,
3162 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3163 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3164 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2
3165 : GIR_EraseFromParent, /*InsnID*/0,
3166 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3167 : // GIR_Coverage, 18184,
3168 : GIR_Done,
3169 : // Label 267: @5194
3170 : GIM_Try, /*On fail goto*//*Label 268*/ 5222, // Rule ID 16208 //
3171 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3172 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3173 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
3174 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
3175 : // (and:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (AND32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
3176 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND32rr,
3177 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
3178 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3179 : // GIR_Coverage, 16208,
3180 : GIR_Done,
3181 : // Label 268: @5222
3182 : GIM_Reject,
3183 : // Label 249: @5223
3184 : GIM_Reject,
3185 : // Label 227: @5224
3186 : GIM_Try, /*On fail goto*//*Label 269*/ 6095,
3187 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
3188 : GIM_Try, /*On fail goto*//*Label 270*/ 5305, // Rule ID 18171 //
3189 : GIM_CheckFeatures, GIFBS_HasTBM,
3190 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3191 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3192 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3193 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3194 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3195 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3196 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3197 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
3198 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3199 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
3200 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3201 : // MIs[2] src
3202 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3203 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
3204 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3205 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3206 : // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3207 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr,
3208 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3209 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3210 : GIR_EraseFromParent, /*InsnID*/0,
3211 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3212 : // GIR_Coverage, 18171,
3213 : GIR_Done,
3214 : // Label 270: @5305
3215 : GIM_Try, /*On fail goto*//*Label 271*/ 5380, // Rule ID 18183 //
3216 : GIM_CheckFeatures, GIFBS_HasTBM,
3217 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3218 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3219 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3220 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3221 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3222 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3223 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3224 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3225 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3226 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
3227 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3228 : // MIs[2] src
3229 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3230 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
3231 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3232 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3233 : // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3234 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr,
3235 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3236 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3237 : GIR_EraseFromParent, /*InsnID*/0,
3238 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3239 : // GIR_Coverage, 18183,
3240 : GIR_Done,
3241 : // Label 271: @5380
3242 : GIM_Try, /*On fail goto*//*Label 272*/ 5455, // Rule ID 12225 //
3243 : GIM_CheckFeatures, GIFBS_HasTBM,
3244 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3245 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3246 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3247 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3248 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3249 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3250 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3251 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3252 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3253 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
3254 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3255 : // MIs[2] src
3256 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3257 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
3258 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3259 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3260 : // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3261 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCIC64rr,
3262 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3263 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3264 : GIR_EraseFromParent, /*InsnID*/0,
3265 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3266 : // GIR_Coverage, 12225,
3267 : GIR_Done,
3268 : // Label 272: @5455
3269 : GIM_Try, /*On fail goto*//*Label 273*/ 5530, // Rule ID 12237 //
3270 : GIM_CheckFeatures, GIFBS_HasTBM,
3271 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3272 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3273 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3274 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3275 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3276 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3277 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3278 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3279 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3280 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
3281 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
3282 : // MIs[2] src
3283 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3284 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
3285 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3286 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3287 : // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (TZMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3288 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::TZMSK64rr,
3289 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3290 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3291 : GIR_EraseFromParent, /*InsnID*/0,
3292 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3293 : // GIR_Coverage, 12237,
3294 : GIR_Done,
3295 : // Label 273: @5530
3296 : GIM_Try, /*On fail goto*//*Label 274*/ 5584, // Rule ID 18165 //
3297 : GIM_CheckFeatures, GIFBS_HasTBM,
3298 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3299 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3300 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3301 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3302 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3303 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3304 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
3305 : // MIs[0] src
3306 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
3307 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3308 : // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3309 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr,
3310 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3311 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3312 : GIR_EraseFromParent, /*InsnID*/0,
3313 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3314 : // GIR_Coverage, 18165,
3315 : GIR_Done,
3316 : // Label 274: @5584
3317 : GIM_Try, /*On fail goto*//*Label 275*/ 5638, // Rule ID 18691 //
3318 : GIM_CheckFeatures, GIFBS_HasBMI,
3319 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3320 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3321 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3322 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3323 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3324 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3325 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3326 : // MIs[0] src
3327 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
3328 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3329 : // (and:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3330 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr,
3331 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3332 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3333 : GIR_EraseFromParent, /*InsnID*/0,
3334 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3335 : // GIR_Coverage, 18691,
3336 : GIR_Done,
3337 : // Label 275: @5638
3338 : GIM_Try, /*On fail goto*//*Label 276*/ 5692, // Rule ID 18695 //
3339 : GIM_CheckFeatures, GIFBS_HasBMI,
3340 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3341 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3342 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
3343 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3344 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3345 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
3346 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID,
3347 : // MIs[0] src
3348 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
3349 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3350 : // (and:{ *:[i64] } (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3351 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr,
3352 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3353 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
3354 : GIR_EraseFromParent, /*InsnID*/0,
3355 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3356 : // GIR_Coverage, 18695,
3357 : GIR_Done,
3358 : // Label 276: @5692
3359 : GIM_Try, /*On fail goto*//*Label 277*/ 5746, // Rule ID 12219 //
3360 : GIM_CheckFeatures, GIFBS_HasTBM,
3361 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3362 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3363 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3364 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3365 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3366 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3367 : // MIs[1] src
3368 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3369 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
3370 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3371 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3372 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCFILL64rr,
3373 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3374 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
3375 : GIR_EraseFromParent, /*InsnID*/0,
3376 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3377 : // GIR_Coverage, 12219,
3378 : GIR_Done,
3379 : // Label 277: @5746
3380 : GIM_Try, /*On fail goto*//*Label 278*/ 5800, // Rule ID 16410 //
3381 : GIM_CheckFeatures, GIFBS_HasBMI,
3382 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3383 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3384 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3385 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3386 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3387 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3388 : // MIs[1] src
3389 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
3390 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3391 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3392 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3393 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSR64rr,
3394 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3395 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
3396 : GIR_EraseFromParent, /*InsnID*/0,
3397 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3398 : // GIR_Coverage, 16410,
3399 : GIR_Done,
3400 : // Label 278: @5800
3401 : GIM_Try, /*On fail goto*//*Label 279*/ 5854, // Rule ID 16414 //
3402 : GIM_CheckFeatures, GIFBS_HasBMI,
3403 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3404 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3405 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3406 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3407 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
3408 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3409 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, 0,
3410 : // MIs[1] src
3411 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
3412 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3413 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } 0:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLSI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
3414 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSI64rr,
3415 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3416 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
3417 : GIR_EraseFromParent, /*InsnID*/0,
3418 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3419 : // GIR_Coverage, 16414,
3420 : GIR_Done,
3421 : // Label 279: @5854
3422 : GIM_Try, /*On fail goto*//*Label 280*/ 5899, // Rule ID 16219 //
3423 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3424 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3425 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3426 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3427 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3428 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
3429 : // MIs[1] Operand 1
3430 : // No operand predicates
3431 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3432 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (AND64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2)
3433 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri8,
3434 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3435 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3436 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3437 : GIR_EraseFromParent, /*InsnID*/0,
3438 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3439 : // GIR_Coverage, 16219,
3440 : GIR_Done,
3441 : // Label 280: @5899
3442 : GIM_Try, /*On fail goto*//*Label 281*/ 5944, // Rule ID 16220 //
3443 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3444 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3445 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3446 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3447 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3448 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
3449 : // MIs[1] Operand 1
3450 : // No operand predicates
3451 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3452 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (AND64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
3453 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AND64ri32,
3454 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3455 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3456 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3457 : GIR_EraseFromParent, /*InsnID*/0,
3458 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3459 : // GIR_Coverage, 16220,
3460 : GIR_Done,
3461 : // Label 281: @5944
3462 : GIM_Try, /*On fail goto*//*Label 282*/ 6005, // Rule ID 12247 //
3463 : GIM_CheckFeatures, GIFBS_HasBMI,
3464 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3465 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3466 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3467 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3468 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3469 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3470 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3471 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3472 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
3473 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3474 : // (and:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src2) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
3475 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr,
3476 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3477 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3478 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src2
3479 : GIR_EraseFromParent, /*InsnID*/0,
3480 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3481 : // GIR_Coverage, 12247,
3482 : GIR_Done,
3483 : // Label 282: @6005
3484 : GIM_Try, /*On fail goto*//*Label 283*/ 6066, // Rule ID 18185 //
3485 : GIM_CheckFeatures, GIFBS_HasBMI,
3486 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3487 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3488 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3489 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3490 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3491 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
3492 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
3493 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
3494 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3495 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3496 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src2, (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] })) => (ANDN64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
3497 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ANDN64rr,
3498 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3499 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src1
3500 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src2
3501 : GIR_EraseFromParent, /*InsnID*/0,
3502 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3503 : // GIR_Coverage, 18185,
3504 : GIR_Done,
3505 : // Label 283: @6066
3506 : GIM_Try, /*On fail goto*//*Label 284*/ 6094, // Rule ID 16209 //
3507 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
3508 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
3509 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
3510 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
3511 : // (and:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (AND64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
3512 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::AND64rr,
3513 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
3514 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3515 : // GIR_Coverage, 16209,
3516 : GIR_Done,
3517 : // Label 284: @6094
3518 : GIM_Reject,
3519 : // Label 269: @6095
3520 : GIM_Reject,
3521 : // Label 228: @6096
3522 : GIM_Try, /*On fail goto*//*Label 285*/ 6188, // Rule ID 13727 //
3523 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1,
3524 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1,
3525 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
3526 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID,
3527 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID,
3528 : // (and:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
3529 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3530 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3531 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3532 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
3533 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
3534 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
3535 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3536 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
3537 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
3538 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
3539 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3540 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr,
3541 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
3542 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
3543 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
3544 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3545 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
3546 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3547 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
3548 : GIR_EraseFromParent, /*InsnID*/0,
3549 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
3550 : // GIR_Coverage, 13727,
3551 : GIR_Done,
3552 : // Label 285: @6188
3553 : GIM_Reject,
3554 : // Label 229: @6189
3555 : GIM_Try, /*On fail goto*//*Label 286*/ 6269,
3556 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
3557 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
3558 : GIM_Try, /*On fail goto*//*Label 287*/ 6222, // Rule ID 1541 //
3559 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
3560 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
3561 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
3562 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
3563 : // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
3564 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDrr,
3565 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3566 : // GIR_Coverage, 1541,
3567 : GIR_Done,
3568 : // Label 287: @6222
3569 : GIM_Try, /*On fail goto*//*Label 288*/ 6245, // Rule ID 1543 //
3570 : GIM_CheckFeatures, GIFBS_UseSSE2,
3571 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
3572 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
3573 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
3574 : // (and:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PANDrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
3575 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PANDrr,
3576 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3577 : // GIR_Coverage, 1543,
3578 : GIR_Done,
3579 : // Label 288: @6245
3580 : GIM_Try, /*On fail goto*//*Label 289*/ 6268, // Rule ID 4886 //
3581 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
3582 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
3583 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
3584 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
3585 : // (and:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPANDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
3586 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ128rr,
3587 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3588 : // GIR_Coverage, 4886,
3589 : GIR_Done,
3590 : // Label 289: @6268
3591 : GIM_Reject,
3592 : // Label 286: @6269
3593 : GIM_Reject,
3594 : // Label 230: @6270
3595 : GIM_Try, /*On fail goto*//*Label 290*/ 6362, // Rule ID 13728 //
3596 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1,
3597 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1,
3598 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
3599 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID,
3600 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID,
3601 : // (and:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
3602 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3603 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3604 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3605 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
3606 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
3607 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
3608 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3609 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
3610 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
3611 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
3612 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3613 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr,
3614 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
3615 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
3616 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
3617 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3618 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
3619 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3620 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
3621 : GIR_EraseFromParent, /*InsnID*/0,
3622 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
3623 : // GIR_Coverage, 13728,
3624 : GIR_Done,
3625 : // Label 290: @6362
3626 : GIM_Reject,
3627 : // Label 231: @6363
3628 : GIM_Try, /*On fail goto*//*Label 291*/ 6443,
3629 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
3630 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
3631 : GIM_Try, /*On fail goto*//*Label 292*/ 6396, // Rule ID 1545 //
3632 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
3633 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
3634 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
3635 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
3636 : // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPANDYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
3637 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDYrr,
3638 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3639 : // GIR_Coverage, 1545,
3640 : GIR_Done,
3641 : // Label 292: @6396
3642 : GIM_Try, /*On fail goto*//*Label 293*/ 6419, // Rule ID 4877 //
3643 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
3644 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
3645 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
3646 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
3647 : // (and:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPANDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
3648 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZ256rr,
3649 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3650 : // GIR_Coverage, 4877,
3651 : GIR_Done,
3652 : // Label 293: @6419
3653 : GIM_Try, /*On fail goto*//*Label 294*/ 6442, // Rule ID 12510 //
3654 : GIM_CheckFeatures, GIFBS_HasAVX1Only,
3655 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
3656 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
3657 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
3658 : // (and:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VANDPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
3659 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VANDPSYrr,
3660 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3661 : // GIR_Coverage, 12510,
3662 : GIR_Done,
3663 : // Label 294: @6442
3664 : GIM_Reject,
3665 : // Label 291: @6443
3666 : GIM_Reject,
3667 : // Label 232: @6444
3668 : GIM_Try, /*On fail goto*//*Label 295*/ 6552,
3669 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
3670 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1,
3671 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID,
3672 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
3673 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID,
3674 : GIM_Try, /*On fail goto*//*Label 296*/ 6477, // Rule ID 3601 //
3675 : GIM_CheckFeatures, GIFBS_HasDQI,
3676 : // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KANDBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
3677 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDBrr,
3678 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3679 : // GIR_Coverage, 3601,
3680 : GIR_Done,
3681 : // Label 296: @6477
3682 : GIM_Try, /*On fail goto*//*Label 297*/ 6551, // Rule ID 13725 //
3683 : GIM_CheckFeatures, GIFBS_NoDQI,
3684 : // (and:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KANDWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
3685 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3686 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3687 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3688 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
3689 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
3690 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
3691 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3692 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
3693 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
3694 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
3695 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3696 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KANDWrr,
3697 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
3698 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
3699 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
3700 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3701 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
3702 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3703 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
3704 : GIR_EraseFromParent, /*InsnID*/0,
3705 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12,
3706 : // GIR_Coverage, 13725,
3707 : GIR_Done,
3708 : // Label 297: @6551
3709 : GIM_Reject,
3710 : // Label 295: @6552
3711 : GIM_Reject,
3712 : // Label 233: @6553
3713 : GIM_Try, /*On fail goto*//*Label 298*/ 6584, // Rule ID 4868 //
3714 : GIM_CheckFeatures, GIFBS_HasAVX512,
3715 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
3716 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
3717 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
3718 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
3719 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
3720 : // (and:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPANDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
3721 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPANDQZrr,
3722 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3723 : // GIR_Coverage, 4868,
3724 : GIR_Done,
3725 : // Label 298: @6584
3726 : GIM_Reject,
3727 : // Label 234: @6585
3728 : GIM_Try, /*On fail goto*//*Label 299*/ 6616, // Rule ID 3602 //
3729 : GIM_CheckFeatures, GIFBS_HasAVX512,
3730 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
3731 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1,
3732 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID,
3733 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
3734 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID,
3735 : // (and:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KANDWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
3736 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDWrr,
3737 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3738 : // GIR_Coverage, 3602,
3739 : GIR_Done,
3740 : // Label 299: @6616
3741 : GIM_Reject,
3742 : // Label 235: @6617
3743 : GIM_Try, /*On fail goto*//*Label 300*/ 6648, // Rule ID 3603 //
3744 : GIM_CheckFeatures, GIFBS_HasBWI,
3745 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
3746 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1,
3747 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID,
3748 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
3749 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID,
3750 : // (and:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KANDDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
3751 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDDrr,
3752 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3753 : // GIR_Coverage, 3603,
3754 : GIR_Done,
3755 : // Label 300: @6648
3756 : GIM_Reject,
3757 : // Label 236: @6649
3758 : GIM_Try, /*On fail goto*//*Label 301*/ 6680, // Rule ID 3604 //
3759 : GIM_CheckFeatures, GIFBS_HasBWI,
3760 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
3761 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1,
3762 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID,
3763 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
3764 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID,
3765 : // (and:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KANDQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
3766 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KANDQrr,
3767 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3768 : // GIR_Coverage, 3604,
3769 : GIR_Done,
3770 : // Label 301: @6680
3771 : GIM_Reject,
3772 : // Label 237: @6681
3773 : GIM_Reject,
3774 : // Label 4: @6682
3775 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 24, /*)*//*default:*//*Label 316*/ 9352,
3776 : /*GILLT_s1*//*Label 302*/ 6712,
3777 : /*GILLT_s8*//*Label 303*/ 6805,
3778 : /*GILLT_s16*//*Label 304*/ 6871,
3779 : /*GILLT_s32*//*Label 305*/ 6970,
3780 : /*GILLT_s64*//*Label 306*/ 7867, 0, 0,
3781 : /*GILLT_v2s1*//*Label 307*/ 8767,
3782 : /*GILLT_v2s64*//*Label 308*/ 8860,
3783 : /*GILLT_v4s1*//*Label 309*/ 8941, 0,
3784 : /*GILLT_v4s64*//*Label 310*/ 9034,
3785 : /*GILLT_v8s1*//*Label 311*/ 9115, 0, 0,
3786 : /*GILLT_v8s64*//*Label 312*/ 9224,
3787 : /*GILLT_v16s1*//*Label 313*/ 9256, 0, 0, 0,
3788 : /*GILLT_v32s1*//*Label 314*/ 9288, 0, 0,
3789 : /*GILLT_v64s1*//*Label 315*/ 9320,
3790 : // Label 302: @6712
3791 : GIM_Try, /*On fail goto*//*Label 317*/ 6804, // Rule ID 13734 //
3792 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1,
3793 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1,
3794 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
3795 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID,
3796 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID,
3797 : // (or:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
3798 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
3799 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
3800 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
3801 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
3802 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
3803 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
3804 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
3805 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
3806 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
3807 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
3808 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
3809 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr,
3810 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
3811 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
3812 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
3813 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
3814 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
3815 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3816 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
3817 : GIR_EraseFromParent, /*InsnID*/0,
3818 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
3819 : // GIR_Coverage, 13734,
3820 : GIR_Done,
3821 : // Label 317: @6804
3822 : GIM_Reject,
3823 : // Label 303: @6805
3824 : GIM_Try, /*On fail goto*//*Label 318*/ 6870,
3825 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
3826 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
3827 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
3828 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
3829 : GIM_Try, /*On fail goto*//*Label 319*/ 6853, // Rule ID 16184 //
3830 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3831 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3832 : // MIs[1] Operand 1
3833 : // No operand predicates
3834 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3835 : // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (OR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
3836 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR8ri,
3837 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3838 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3839 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3840 : GIR_EraseFromParent, /*InsnID*/0,
3841 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3842 : // GIR_Coverage, 16184,
3843 : GIR_Done,
3844 : // Label 319: @6853
3845 : GIM_Try, /*On fail goto*//*Label 320*/ 6869, // Rule ID 16176 //
3846 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
3847 : // (or:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (OR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
3848 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR8rr,
3849 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
3850 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3851 : // GIR_Coverage, 16176,
3852 : GIR_Done,
3853 : // Label 320: @6869
3854 : GIM_Reject,
3855 : // Label 318: @6870
3856 : GIM_Reject,
3857 : // Label 304: @6871
3858 : GIM_Try, /*On fail goto*//*Label 321*/ 6969,
3859 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
3860 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
3861 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
3862 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
3863 : GIM_Try, /*On fail goto*//*Label 322*/ 6922, // Rule ID 16187 //
3864 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3865 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3866 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8,
3867 : // MIs[1] Operand 1
3868 : // No operand predicates
3869 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3870 : // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (OR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2)
3871 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri8,
3872 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3873 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3874 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3875 : GIR_EraseFromParent, /*InsnID*/0,
3876 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3877 : // GIR_Coverage, 16187,
3878 : GIR_Done,
3879 : // Label 322: @6922
3880 : GIM_Try, /*On fail goto*//*Label 323*/ 6952, // Rule ID 16185 //
3881 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
3882 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
3883 : // MIs[1] Operand 1
3884 : // No operand predicates
3885 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3886 : // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (OR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
3887 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR16ri,
3888 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3889 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
3890 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
3891 : GIR_EraseFromParent, /*InsnID*/0,
3892 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3893 : // GIR_Coverage, 16185,
3894 : GIR_Done,
3895 : // Label 323: @6952
3896 : GIM_Try, /*On fail goto*//*Label 324*/ 6968, // Rule ID 16177 //
3897 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
3898 : // (or:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (OR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
3899 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR16rr,
3900 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
3901 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3902 : // GIR_Coverage, 16177,
3903 : GIR_Done,
3904 : // Label 324: @6968
3905 : GIM_Reject,
3906 : // Label 321: @6969
3907 : GIM_Reject,
3908 : // Label 305: @6970
3909 : GIM_Try, /*On fail goto*//*Label 325*/ 7866,
3910 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
3911 : GIM_Try, /*On fail goto*//*Label 326*/ 7051, // Rule ID 18178 //
3912 : GIM_CheckFeatures, GIFBS_HasTBM,
3913 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3914 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3915 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3916 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3917 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3918 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3919 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
3920 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3921 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3922 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
3923 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3924 : // MIs[2] src
3925 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3926 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
3927 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3928 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3929 : // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3930 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr,
3931 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3932 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3933 : GIR_EraseFromParent, /*InsnID*/0,
3934 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3935 : // GIR_Coverage, 18178,
3936 : GIR_Done,
3937 : // Label 326: @7051
3938 : GIM_Try, /*On fail goto*//*Label 327*/ 7126, // Rule ID 18180 //
3939 : GIM_CheckFeatures, GIFBS_HasTBM,
3940 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3941 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3942 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3943 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
3944 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3945 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3946 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
3947 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
3948 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
3949 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
3950 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3951 : // MIs[2] src
3952 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
3953 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
3954 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3955 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3956 : // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3957 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr,
3958 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3959 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
3960 : GIR_EraseFromParent, /*InsnID*/0,
3961 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3962 : // GIR_Coverage, 18180,
3963 : GIR_Done,
3964 : // Label 327: @7126
3965 : GIM_Try, /*On fail goto*//*Label 328*/ 7201, // Rule ID 18166 //
3966 : GIM_CheckFeatures, GIFBS_HasTBM,
3967 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3968 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3969 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3970 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3971 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
3972 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
3973 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
3974 : GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
3975 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
3976 : GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR32RegClassID,
3977 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
3978 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
3979 : // MIs[0] src
3980 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
3981 : GIM_CheckIsSafeToFold, /*InsnID*/1,
3982 : GIM_CheckIsSafeToFold, /*InsnID*/2,
3983 : // (or:{ *:[i32] } (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
3984 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr,
3985 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
3986 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src
3987 : GIR_EraseFromParent, /*InsnID*/0,
3988 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
3989 : // GIR_Coverage, 18166,
3990 : GIR_Done,
3991 : // Label 328: @7201
3992 : GIM_Try, /*On fail goto*//*Label 329*/ 7276, // Rule ID 12232 //
3993 : GIM_CheckFeatures, GIFBS_HasTBM,
3994 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
3995 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
3996 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
3997 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
3998 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
3999 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4000 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
4001 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4002 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4003 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4004 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
4005 : // MIs[2] src
4006 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
4007 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
4008 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4009 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4010 : // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSIC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4011 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC32rr,
4012 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4013 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4014 : GIR_EraseFromParent, /*InsnID*/0,
4015 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4016 : // GIR_Coverage, 12232,
4017 : GIR_Done,
4018 : // Label 329: @7276
4019 : GIM_Try, /*On fail goto*//*Label 330*/ 7351, // Rule ID 12234 //
4020 : GIM_CheckFeatures, GIFBS_HasTBM,
4021 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4022 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4023 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4024 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4025 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
4026 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4027 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
4028 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4029 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4030 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4031 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
4032 : // MIs[2] src
4033 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
4034 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
4035 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4036 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4037 : // (or:{ *:[i32] } (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (T1MSKC32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4038 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC32rr,
4039 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4040 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4041 : GIR_EraseFromParent, /*InsnID*/0,
4042 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4043 : // GIR_Coverage, 12234,
4044 : GIR_Done,
4045 : // Label 330: @7351
4046 : GIM_Try, /*On fail goto*//*Label 331*/ 7426, // Rule ID 12220 //
4047 : GIM_CheckFeatures, GIFBS_HasTBM,
4048 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4049 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4050 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4051 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4052 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4053 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
4054 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4055 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4056 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4057 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s32,
4058 : // MIs[2] src
4059 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4060 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
4061 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4062 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4063 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4064 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), -1:{ *:[i32] })) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4065 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr,
4066 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4067 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4068 : GIR_EraseFromParent, /*InsnID*/0,
4069 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4070 : // GIR_Coverage, 12220,
4071 : GIR_Done,
4072 : // Label 331: @7426
4073 : GIM_Try, /*On fail goto*//*Label 332*/ 7480, // Rule ID 18174 //
4074 : GIM_CheckFeatures, GIFBS_HasTBM,
4075 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4076 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4077 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4078 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
4079 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4080 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
4081 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
4082 : // MIs[0] src
4083 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
4084 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4085 : // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4086 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr,
4087 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4088 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4089 : GIR_EraseFromParent, /*InsnID*/0,
4090 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4091 : // GIR_Coverage, 18174,
4092 : GIR_Done,
4093 : // Label 332: @7480
4094 : GIM_Try, /*On fail goto*//*Label 333*/ 7534, // Rule ID 18176 //
4095 : GIM_CheckFeatures, GIFBS_HasTBM,
4096 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4097 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4098 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4099 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
4100 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4101 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
4102 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4103 : // MIs[0] src
4104 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
4105 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4106 : // (or:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4107 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr,
4108 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4109 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4110 : GIR_EraseFromParent, /*InsnID*/0,
4111 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4112 : // GIR_Coverage, 18176,
4113 : GIR_Done,
4114 : // Label 333: @7534
4115 : GIM_Try, /*On fail goto*//*Label 334*/ 7588, // Rule ID 18168 //
4116 : GIM_CheckFeatures, GIFBS_HasTBM,
4117 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4118 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4119 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
4120 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
4121 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4122 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2,
4123 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR32RegClassID,
4124 : // MIs[0] src
4125 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
4126 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4127 : // (or:{ *:[i32] } (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src), GR32:{ *:[i32] }:$src) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4128 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr,
4129 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4130 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
4131 : GIR_EraseFromParent, /*InsnID*/0,
4132 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4133 : // GIR_Coverage, 18168,
4134 : GIR_Done,
4135 : // Label 334: @7588
4136 : GIM_Try, /*On fail goto*//*Label 335*/ 7642, // Rule ID 12228 //
4137 : GIM_CheckFeatures, GIFBS_HasTBM,
4138 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4139 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4140 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4141 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4142 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4143 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4144 : // MIs[1] src
4145 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4146 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
4147 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4148 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCS32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4149 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS32rr,
4150 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4151 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4152 : GIR_EraseFromParent, /*InsnID*/0,
4153 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4154 : // GIR_Coverage, 12228,
4155 : GIR_Done,
4156 : // Label 335: @7642
4157 : GIM_Try, /*On fail goto*//*Label 336*/ 7696, // Rule ID 12230 //
4158 : GIM_CheckFeatures, GIFBS_HasTBM,
4159 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4160 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4161 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4162 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4163 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4164 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
4165 : // MIs[1] src
4166 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4167 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4168 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4169 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSFILL32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4170 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL32rr,
4171 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4172 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4173 : GIR_EraseFromParent, /*InsnID*/0,
4174 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4175 : // GIR_Coverage, 12230,
4176 : GIR_Done,
4177 : // Label 336: @7696
4178 : GIM_Try, /*On fail goto*//*Label 337*/ 7750, // Rule ID 12222 //
4179 : GIM_CheckFeatures, GIFBS_HasTBM,
4180 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4181 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4182 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4183 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4184 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
4185 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
4186 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2,
4187 : // MIs[1] src
4188 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4189 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4190 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src, (sub:{ *:[i32] } -2:{ *:[i32] }, GR32:{ *:[i32] }:$src)) => (BLCI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
4191 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI32rr,
4192 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4193 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4194 : GIR_EraseFromParent, /*InsnID*/0,
4195 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4196 : // GIR_Coverage, 12222,
4197 : GIR_Done,
4198 : // Label 337: @7750
4199 : GIM_Try, /*On fail goto*//*Label 338*/ 7795, // Rule ID 16188 //
4200 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4201 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4202 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4203 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4204 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
4205 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
4206 : // MIs[1] Operand 1
4207 : // No operand predicates
4208 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4209 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (OR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2)
4210 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri8,
4211 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4212 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
4213 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
4214 : GIR_EraseFromParent, /*InsnID*/0,
4215 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4216 : // GIR_Coverage, 16188,
4217 : GIR_Done,
4218 : // Label 338: @7795
4219 : GIM_Try, /*On fail goto*//*Label 339*/ 7837, // Rule ID 16186 //
4220 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4221 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4222 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4223 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4224 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
4225 : // MIs[1] Operand 1
4226 : // No operand predicates
4227 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4228 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (OR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
4229 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR32ri,
4230 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4231 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
4232 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
4233 : GIR_EraseFromParent, /*InsnID*/0,
4234 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4235 : // GIR_Coverage, 16186,
4236 : GIR_Done,
4237 : // Label 339: @7837
4238 : GIM_Try, /*On fail goto*//*Label 340*/ 7865, // Rule ID 16178 //
4239 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
4240 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
4241 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
4242 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
4243 : // (or:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (OR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
4244 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR32rr,
4245 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
4246 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4247 : // GIR_Coverage, 16178,
4248 : GIR_Done,
4249 : // Label 340: @7865
4250 : GIM_Reject,
4251 : // Label 325: @7866
4252 : GIM_Reject,
4253 : // Label 306: @7867
4254 : GIM_Try, /*On fail goto*//*Label 341*/ 8766,
4255 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
4256 : GIM_Try, /*On fail goto*//*Label 342*/ 7948, // Rule ID 18179 //
4257 : GIM_CheckFeatures, GIFBS_HasTBM,
4258 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4259 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4260 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4261 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4262 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4263 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4264 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
4265 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4266 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4267 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
4268 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
4269 : // MIs[2] src
4270 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
4271 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
4272 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4273 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4274 : // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4275 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr,
4276 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4277 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4278 : GIR_EraseFromParent, /*InsnID*/0,
4279 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4280 : // GIR_Coverage, 18179,
4281 : GIR_Done,
4282 : // Label 342: @7948
4283 : GIM_Try, /*On fail goto*//*Label 343*/ 8023, // Rule ID 18181 //
4284 : GIM_CheckFeatures, GIFBS_HasTBM,
4285 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4286 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4287 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4288 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4289 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4290 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4291 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
4292 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
4293 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4294 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_XOR,
4295 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
4296 : // MIs[2] src
4297 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
4298 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
4299 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4300 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4301 : // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4302 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr,
4303 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4304 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4305 : GIR_EraseFromParent, /*InsnID*/0,
4306 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4307 : // GIR_Coverage, 18181,
4308 : GIR_Done,
4309 : // Label 343: @8023
4310 : GIM_Try, /*On fail goto*//*Label 344*/ 8098, // Rule ID 18167 //
4311 : GIM_CheckFeatures, GIFBS_HasTBM,
4312 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4313 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4314 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4315 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4316 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4317 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4318 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4319 : GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s64,
4320 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
4321 : GIM_CheckRegBankForClass, /*MI*/2, /*Op*/1, /*RC*/X86::GR64RegClassID,
4322 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
4323 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4324 : // MIs[0] src
4325 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/2, /*OtherOpIdx*/1,
4326 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4327 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4328 : // (or:{ *:[i64] } (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4329 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr,
4330 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4331 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/2, /*OpIdx*/1, // src
4332 : GIR_EraseFromParent, /*InsnID*/0,
4333 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4334 : // GIR_Coverage, 18167,
4335 : GIR_Done,
4336 : // Label 344: @8098
4337 : GIM_Try, /*On fail goto*//*Label 345*/ 8173, // Rule ID 12233 //
4338 : GIM_CheckFeatures, GIFBS_HasTBM,
4339 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4340 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4341 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4342 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4343 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4344 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4345 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
4346 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4347 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4348 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4349 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
4350 : // MIs[2] src
4351 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
4352 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, -1,
4353 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4354 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4355 : // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSIC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4356 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSIC64rr,
4357 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4358 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4359 : GIR_EraseFromParent, /*InsnID*/0,
4360 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4361 : // GIR_Coverage, 12233,
4362 : GIR_Done,
4363 : // Label 345: @8173
4364 : GIM_Try, /*On fail goto*//*Label 346*/ 8248, // Rule ID 12235 //
4365 : GIM_CheckFeatures, GIFBS_HasTBM,
4366 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4367 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4368 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4369 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4370 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4371 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4372 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
4373 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4374 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/0, /*OpIdx*/2, // MIs[2]
4375 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4376 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
4377 : // MIs[2] src
4378 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/1, /*OtherOpIdx*/1,
4379 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
4380 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4381 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4382 : // (or:{ *:[i64] } (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (T1MSKC64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4383 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::T1MSKC64rr,
4384 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4385 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4386 : GIR_EraseFromParent, /*InsnID*/0,
4387 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4388 : // GIR_Coverage, 12235,
4389 : GIR_Done,
4390 : // Label 346: @8248
4391 : GIM_Try, /*On fail goto*//*Label 347*/ 8323, // Rule ID 12221 //
4392 : GIM_CheckFeatures, GIFBS_HasTBM,
4393 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4394 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4395 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4396 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4397 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4398 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4399 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4400 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/1, // MIs[2]
4401 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_ADD,
4402 : GIM_CheckType, /*MI*/2, /*Op*/2, /*Type*/GILLT_s64,
4403 : // MIs[2] src
4404 : GIM_CheckIsSameOperand, /*MI*/2, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4405 : GIM_CheckConstantInt, /*MI*/2, /*Op*/2, 1,
4406 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4407 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4408 : GIM_CheckIsSafeToFold, /*InsnID*/2,
4409 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), -1:{ *:[i64] })) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4410 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr,
4411 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4412 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4413 : GIR_EraseFromParent, /*InsnID*/0,
4414 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4415 : // GIR_Coverage, 12221,
4416 : GIR_Done,
4417 : // Label 347: @8323
4418 : GIM_Try, /*On fail goto*//*Label 348*/ 8377, // Rule ID 18175 //
4419 : GIM_CheckFeatures, GIFBS_HasTBM,
4420 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4421 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4422 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4423 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4424 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4425 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
4426 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
4427 : // MIs[0] src
4428 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
4429 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4430 : // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4431 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr,
4432 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4433 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4434 : GIR_EraseFromParent, /*InsnID*/0,
4435 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4436 : // GIR_Coverage, 18175,
4437 : GIR_Done,
4438 : // Label 348: @8377
4439 : GIM_Try, /*On fail goto*//*Label 349*/ 8431, // Rule ID 18177 //
4440 : GIM_CheckFeatures, GIFBS_HasTBM,
4441 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4442 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4443 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4444 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4445 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4446 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
4447 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4448 : // MIs[0] src
4449 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
4450 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4451 : // (or:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4452 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr,
4453 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4454 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
4455 : GIR_EraseFromParent, /*InsnID*/0,
4456 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4457 : // GIR_Coverage, 18177,
4458 : GIR_Done,
4459 : // Label 349: @8431
4460 : GIM_Try, /*On fail goto*//*Label 350*/ 8485, // Rule ID 18169 //
4461 : GIM_CheckFeatures, GIFBS_HasTBM,
4462 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4463 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4464 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
4465 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4466 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4467 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2,
4468 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::GR64RegClassID,
4469 : // MIs[0] src
4470 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/2,
4471 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4472 : // (or:{ *:[i64] } (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src), GR64:{ *:[i64] }:$src) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4473 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr,
4474 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4475 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/2, // src
4476 : GIR_EraseFromParent, /*InsnID*/0,
4477 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4478 : // GIR_Coverage, 18169,
4479 : GIR_Done,
4480 : // Label 350: @8485
4481 : GIM_Try, /*On fail goto*//*Label 351*/ 8539, // Rule ID 12229 //
4482 : GIM_CheckFeatures, GIFBS_HasTBM,
4483 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4484 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4485 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4486 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4487 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4488 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4489 : // MIs[1] src
4490 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4491 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
4492 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4493 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCS64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4494 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCS64rr,
4495 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4496 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4497 : GIR_EraseFromParent, /*InsnID*/0,
4498 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4499 : // GIR_Coverage, 12229,
4500 : GIR_Done,
4501 : // Label 351: @8539
4502 : GIM_Try, /*On fail goto*//*Label 352*/ 8593, // Rule ID 12231 //
4503 : GIM_CheckFeatures, GIFBS_HasTBM,
4504 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4505 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4506 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4507 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4508 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
4509 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
4510 : // MIs[1] src
4511 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
4512 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4513 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4514 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSFILL64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4515 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSFILL64rr,
4516 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4517 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4518 : GIR_EraseFromParent, /*InsnID*/0,
4519 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4520 : // GIR_Coverage, 12231,
4521 : GIR_Done,
4522 : // Label 352: @8593
4523 : GIM_Try, /*On fail goto*//*Label 353*/ 8647, // Rule ID 12223 //
4524 : GIM_CheckFeatures, GIFBS_HasTBM,
4525 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4526 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4527 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4528 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4529 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SUB,
4530 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
4531 : GIM_CheckConstantInt, /*MI*/1, /*Op*/1, -2,
4532 : // MIs[1] src
4533 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/2, /*OtherMI*/0, /*OtherOpIdx*/1,
4534 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4535 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src, (sub:{ *:[i64] } -2:{ *:[i64] }, GR64:{ *:[i64] }:$src)) => (BLCI64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
4536 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCI64rr,
4537 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4538 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
4539 : GIR_EraseFromParent, /*InsnID*/0,
4540 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4541 : // GIR_Coverage, 12223,
4542 : GIR_Done,
4543 : // Label 353: @8647
4544 : GIM_Try, /*On fail goto*//*Label 354*/ 8692, // Rule ID 16189 //
4545 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4546 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4547 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4548 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4549 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
4550 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
4551 : // MIs[1] Operand 1
4552 : // No operand predicates
4553 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4554 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (OR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2)
4555 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri8,
4556 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4557 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
4558 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
4559 : GIR_EraseFromParent, /*InsnID*/0,
4560 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4561 : // GIR_Coverage, 16189,
4562 : GIR_Done,
4563 : // Label 354: @8692
4564 : GIM_Try, /*On fail goto*//*Label 355*/ 8737, // Rule ID 16190 //
4565 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4566 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4567 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4568 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4569 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
4570 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
4571 : // MIs[1] Operand 1
4572 : // No operand predicates
4573 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4574 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (OR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
4575 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::OR64ri32,
4576 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4577 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
4578 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
4579 : GIR_EraseFromParent, /*InsnID*/0,
4580 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4581 : // GIR_Coverage, 16190,
4582 : GIR_Done,
4583 : // Label 355: @8737
4584 : GIM_Try, /*On fail goto*//*Label 356*/ 8765, // Rule ID 16179 //
4585 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
4586 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
4587 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
4588 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
4589 : // (or:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (OR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
4590 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::OR64rr,
4591 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
4592 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4593 : // GIR_Coverage, 16179,
4594 : GIR_Done,
4595 : // Label 356: @8765
4596 : GIM_Reject,
4597 : // Label 341: @8766
4598 : GIM_Reject,
4599 : // Label 307: @8767
4600 : GIM_Try, /*On fail goto*//*Label 357*/ 8859, // Rule ID 13735 //
4601 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1,
4602 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1,
4603 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
4604 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID,
4605 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID,
4606 : // (or:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
4607 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4608 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4609 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4610 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4611 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4612 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4613 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4614 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4615 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4616 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4617 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4618 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr,
4619 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4620 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4621 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4622 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4623 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4624 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4625 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4626 : GIR_EraseFromParent, /*InsnID*/0,
4627 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
4628 : // GIR_Coverage, 13735,
4629 : GIR_Done,
4630 : // Label 357: @8859
4631 : GIM_Reject,
4632 : // Label 308: @8860
4633 : GIM_Try, /*On fail goto*//*Label 358*/ 8940,
4634 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
4635 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
4636 : GIM_Try, /*On fail goto*//*Label 359*/ 8893, // Rule ID 1547 //
4637 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
4638 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
4639 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
4640 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
4641 : // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
4642 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORrr,
4643 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4644 : // GIR_Coverage, 1547,
4645 : GIR_Done,
4646 : // Label 359: @8893
4647 : GIM_Try, /*On fail goto*//*Label 360*/ 8916, // Rule ID 1549 //
4648 : GIM_CheckFeatures, GIFBS_UseSSE2,
4649 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
4650 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
4651 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
4652 : // (or:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
4653 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PORrr,
4654 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4655 : // GIR_Coverage, 1549,
4656 : GIR_Done,
4657 : // Label 360: @8916
4658 : GIM_Try, /*On fail goto*//*Label 361*/ 8939, // Rule ID 4934 //
4659 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
4660 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
4661 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
4662 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
4663 : // (or:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
4664 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ128rr,
4665 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4666 : // GIR_Coverage, 4934,
4667 : GIR_Done,
4668 : // Label 361: @8939
4669 : GIM_Reject,
4670 : // Label 358: @8940
4671 : GIM_Reject,
4672 : // Label 309: @8941
4673 : GIM_Try, /*On fail goto*//*Label 362*/ 9033, // Rule ID 13736 //
4674 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1,
4675 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1,
4676 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
4677 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID,
4678 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID,
4679 : // (or:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
4680 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4681 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4682 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4683 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4684 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4685 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4686 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4687 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4688 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4689 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4690 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4691 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr,
4692 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4693 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4694 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4695 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4696 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4697 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4698 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4699 : GIR_EraseFromParent, /*InsnID*/0,
4700 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
4701 : // GIR_Coverage, 13736,
4702 : GIR_Done,
4703 : // Label 362: @9033
4704 : GIM_Reject,
4705 : // Label 310: @9034
4706 : GIM_Try, /*On fail goto*//*Label 363*/ 9114,
4707 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
4708 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
4709 : GIM_Try, /*On fail goto*//*Label 364*/ 9067, // Rule ID 1551 //
4710 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
4711 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
4712 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
4713 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
4714 : // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
4715 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORYrr,
4716 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4717 : // GIR_Coverage, 1551,
4718 : GIR_Done,
4719 : // Label 364: @9067
4720 : GIM_Try, /*On fail goto*//*Label 365*/ 9090, // Rule ID 4925 //
4721 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
4722 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
4723 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
4724 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
4725 : // (or:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
4726 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZ256rr,
4727 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4728 : // GIR_Coverage, 4925,
4729 : GIR_Done,
4730 : // Label 365: @9090
4731 : GIM_Try, /*On fail goto*//*Label 366*/ 9113, // Rule ID 12511 //
4732 : GIM_CheckFeatures, GIFBS_HasAVX1Only,
4733 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
4734 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
4735 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
4736 : // (or:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
4737 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VORPSYrr,
4738 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4739 : // GIR_Coverage, 12511,
4740 : GIR_Done,
4741 : // Label 366: @9113
4742 : GIM_Reject,
4743 : // Label 363: @9114
4744 : GIM_Reject,
4745 : // Label 311: @9115
4746 : GIM_Try, /*On fail goto*//*Label 367*/ 9223,
4747 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
4748 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1,
4749 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID,
4750 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
4751 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID,
4752 : GIM_Try, /*On fail goto*//*Label 368*/ 9148, // Rule ID 3605 //
4753 : GIM_CheckFeatures, GIFBS_HasDQI,
4754 : // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
4755 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORBrr,
4756 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4757 : // GIR_Coverage, 3605,
4758 : GIR_Done,
4759 : // Label 368: @9148
4760 : GIM_Try, /*On fail goto*//*Label 369*/ 9222, // Rule ID 13733 //
4761 : GIM_CheckFeatures, GIFBS_NoDQI,
4762 : // (or:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
4763 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4764 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4765 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4766 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4767 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4768 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4769 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4770 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4771 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4772 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4773 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4774 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KORWrr,
4775 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4776 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4777 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4778 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4779 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4780 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4781 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4782 : GIR_EraseFromParent, /*InsnID*/0,
4783 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12,
4784 : // GIR_Coverage, 13733,
4785 : GIR_Done,
4786 : // Label 369: @9222
4787 : GIM_Reject,
4788 : // Label 367: @9223
4789 : GIM_Reject,
4790 : // Label 312: @9224
4791 : GIM_Try, /*On fail goto*//*Label 370*/ 9255, // Rule ID 4916 //
4792 : GIM_CheckFeatures, GIFBS_HasAVX512,
4793 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
4794 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
4795 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
4796 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
4797 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
4798 : // (or:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
4799 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPORQZrr,
4800 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4801 : // GIR_Coverage, 4916,
4802 : GIR_Done,
4803 : // Label 370: @9255
4804 : GIM_Reject,
4805 : // Label 313: @9256
4806 : GIM_Try, /*On fail goto*//*Label 371*/ 9287, // Rule ID 3606 //
4807 : GIM_CheckFeatures, GIFBS_HasAVX512,
4808 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
4809 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1,
4810 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID,
4811 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
4812 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID,
4813 : // (or:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
4814 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORWrr,
4815 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4816 : // GIR_Coverage, 3606,
4817 : GIR_Done,
4818 : // Label 371: @9287
4819 : GIM_Reject,
4820 : // Label 314: @9288
4821 : GIM_Try, /*On fail goto*//*Label 372*/ 9319, // Rule ID 3607 //
4822 : GIM_CheckFeatures, GIFBS_HasBWI,
4823 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
4824 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1,
4825 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID,
4826 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
4827 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID,
4828 : // (or:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
4829 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORDrr,
4830 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4831 : // GIR_Coverage, 3607,
4832 : GIR_Done,
4833 : // Label 372: @9319
4834 : GIM_Reject,
4835 : // Label 315: @9320
4836 : GIM_Try, /*On fail goto*//*Label 373*/ 9351, // Rule ID 3608 //
4837 : GIM_CheckFeatures, GIFBS_HasBWI,
4838 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
4839 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1,
4840 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID,
4841 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
4842 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID,
4843 : // (or:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
4844 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KORQrr,
4845 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
4846 : // GIR_Coverage, 3608,
4847 : GIR_Done,
4848 : // Label 373: @9351
4849 : GIM_Reject,
4850 : // Label 316: @9352
4851 : GIM_Reject,
4852 : // Label 5: @9353
4853 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/0, 24, /*)*//*default:*//*Label 388*/ 11325,
4854 : /*GILLT_s1*//*Label 374*/ 9383,
4855 : /*GILLT_s8*//*Label 375*/ 9782,
4856 : /*GILLT_s16*//*Label 376*/ 9870,
4857 : /*GILLT_s32*//*Label 377*/ 9991,
4858 : /*GILLT_s64*//*Label 378*/ 10364, 0, 0,
4859 : /*GILLT_v2s1*//*Label 379*/ 10740,
4860 : /*GILLT_v2s64*//*Label 380*/ 10833,
4861 : /*GILLT_v4s1*//*Label 381*/ 10914, 0,
4862 : /*GILLT_v4s64*//*Label 382*/ 11007,
4863 : /*GILLT_v8s1*//*Label 383*/ 11088, 0, 0,
4864 : /*GILLT_v8s64*//*Label 384*/ 11197,
4865 : /*GILLT_v16s1*//*Label 385*/ 11229, 0, 0, 0,
4866 : /*GILLT_v32s1*//*Label 386*/ 11261, 0, 0,
4867 : /*GILLT_v64s1*//*Label 387*/ 11293,
4868 : // Label 374: @9383
4869 : GIM_Try, /*On fail goto*//*Label 389*/ 9781,
4870 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s1,
4871 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s1,
4872 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
4873 : GIM_Try, /*On fail goto*//*Label 390*/ 9498, // Rule ID 18313 //
4874 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4875 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4876 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
4877 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
4878 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID,
4879 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4880 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID,
4881 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4882 : // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] }), VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
4883 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4884 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4885 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4886 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4887 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4888 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4889 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4890 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4891 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4892 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4893 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4894 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr,
4895 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4896 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4897 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4898 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4899 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4900 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4901 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4902 : GIR_EraseFromParent, /*InsnID*/0,
4903 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
4904 : // GIR_Coverage, 18313,
4905 : GIR_Done,
4906 : // Label 390: @9498
4907 : GIM_Try, /*On fail goto*//*Label 391*/ 9599, // Rule ID 13738 //
4908 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
4909 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4910 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
4911 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
4912 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID,
4913 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/2, /*RC*/X86::VK1RegClassID,
4914 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
4915 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4916 : // (xor:{ *:[v1i1] } (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2), -1:{ *:[v1i1] }) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
4917 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4918 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4919 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4920 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4921 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4922 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/1, /*OpIdx*/2, // src2
4923 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4924 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4925 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4926 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4927 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4928 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr,
4929 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4930 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4931 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4932 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4933 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4934 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4935 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4936 : GIR_EraseFromParent, /*InsnID*/0,
4937 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
4938 : // GIR_Coverage, 13738,
4939 : GIR_Done,
4940 : // Label 391: @9599
4941 : GIM_Try, /*On fail goto*//*Label 392*/ 9700, // Rule ID 18314 //
4942 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID,
4943 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
4944 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_XOR,
4945 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s1,
4946 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s1,
4947 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK1RegClassID,
4948 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
4949 : GIM_CheckIsSafeToFold, /*InsnID*/1,
4950 : // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src2, (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, -1:{ *:[v1i1] })) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXNORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
4951 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4952 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4953 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4954 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4955 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4956 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/1, // src2
4957 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4958 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4959 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4960 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/1, /*OpIdx*/1, // src1
4961 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4962 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXNORWrr,
4963 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4964 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4965 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4966 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4967 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4968 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4969 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4970 : GIR_EraseFromParent, /*InsnID*/0,
4971 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
4972 : // GIR_Coverage, 18314,
4973 : GIR_Done,
4974 : // Label 392: @9700
4975 : GIM_Try, /*On fail goto*//*Label 393*/ 9780, // Rule ID 13742 //
4976 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK1RegClassID,
4977 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK1RegClassID,
4978 : // (xor:{ *:[v1i1] } VK1:{ *:[v1i1] }:$src1, VK1:{ *:[v1i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v1i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK1:{ *:[v1i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
4979 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
4980 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
4981 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
4982 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
4983 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
4984 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
4985 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
4986 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
4987 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
4988 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
4989 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
4990 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr,
4991 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
4992 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
4993 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
4994 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
4995 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
4996 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
4997 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
4998 : GIR_EraseFromParent, /*InsnID*/0,
4999 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
5000 : // GIR_Coverage, 13742,
5001 : GIR_Done,
5002 : // Label 393: @9780
5003 : GIM_Reject,
5004 : // Label 389: @9781
5005 : GIM_Reject,
5006 : // Label 375: @9782
5007 : GIM_Try, /*On fail goto*//*Label 394*/ 9869,
5008 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
5009 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
5010 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
5011 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
5012 : GIM_Try, /*On fail goto*//*Label 395*/ 9822, // Rule ID 152 //
5013 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
5014 : // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, -1:{ *:[i8] }) => (NOT8r:{ *:[i8] } GR8:{ *:[i8] }:$src1)
5015 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT8r,
5016 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5017 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5018 : GIR_EraseFromParent, /*InsnID*/0,
5019 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5020 : // GIR_Coverage, 152,
5021 : GIR_Done,
5022 : // Label 395: @9822
5023 : GIM_Try, /*On fail goto*//*Label 396*/ 9852, // Rule ID 16199 //
5024 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5025 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5026 : // MIs[1] Operand 1
5027 : // No operand predicates
5028 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5029 : // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (XOR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
5030 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR8ri,
5031 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5032 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5033 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5034 : GIR_EraseFromParent, /*InsnID*/0,
5035 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5036 : // GIR_Coverage, 16199,
5037 : GIR_Done,
5038 : // Label 396: @9852
5039 : GIM_Try, /*On fail goto*//*Label 397*/ 9868, // Rule ID 16191 //
5040 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR8RegClassID,
5041 : // (xor:{ *:[i8] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2) => (XOR8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src2)
5042 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR8rr,
5043 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
5044 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5045 : // GIR_Coverage, 16191,
5046 : GIR_Done,
5047 : // Label 397: @9868
5048 : GIM_Reject,
5049 : // Label 394: @9869
5050 : GIM_Reject,
5051 : // Label 376: @9870
5052 : GIM_Try, /*On fail goto*//*Label 398*/ 9990,
5053 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
5054 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s16,
5055 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
5056 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
5057 : GIM_Try, /*On fail goto*//*Label 399*/ 9910, // Rule ID 153 //
5058 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
5059 : // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, -1:{ *:[i16] }) => (NOT16r:{ *:[i16] } GR16:{ *:[i16] }:$src1)
5060 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT16r,
5061 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5062 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5063 : GIR_EraseFromParent, /*InsnID*/0,
5064 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5065 : // GIR_Coverage, 153,
5066 : GIR_Done,
5067 : // Label 399: @9910
5068 : GIM_Try, /*On fail goto*//*Label 400*/ 9943, // Rule ID 16202 //
5069 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5070 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5071 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i16immSExt8,
5072 : // MIs[1] Operand 1
5073 : // No operand predicates
5074 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5075 : // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2) => (XOR16ri8:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] })<<P:Predicate_i16immSExt8>>:$src2)
5076 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri8,
5077 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5078 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5079 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5080 : GIR_EraseFromParent, /*InsnID*/0,
5081 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5082 : // GIR_Coverage, 16202,
5083 : GIR_Done,
5084 : // Label 400: @9943
5085 : GIM_Try, /*On fail goto*//*Label 401*/ 9973, // Rule ID 16200 //
5086 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5087 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5088 : // MIs[1] Operand 1
5089 : // No operand predicates
5090 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5091 : // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2) => (XOR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i16] }):$src2)
5092 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR16ri,
5093 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5094 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5095 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5096 : GIR_EraseFromParent, /*InsnID*/0,
5097 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5098 : // GIR_Coverage, 16200,
5099 : GIR_Done,
5100 : // Label 401: @9973
5101 : GIM_Try, /*On fail goto*//*Label 402*/ 9989, // Rule ID 16192 //
5102 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR16RegClassID,
5103 : // (xor:{ *:[i16] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2) => (XOR16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src2)
5104 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR16rr,
5105 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
5106 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5107 : // GIR_Coverage, 16192,
5108 : GIR_Done,
5109 : // Label 402: @9989
5110 : GIM_Reject,
5111 : // Label 398: @9990
5112 : GIM_Reject,
5113 : // Label 377: @9991
5114 : GIM_Try, /*On fail goto*//*Label 403*/ 10363,
5115 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5116 : GIM_Try, /*On fail goto*//*Label 404*/ 10051, // Rule ID 18172 //
5117 : GIM_CheckFeatures, GIFBS_HasTBM,
5118 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5119 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5120 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5121 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5122 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5123 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
5124 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
5125 : // MIs[0] src
5126 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
5127 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5128 : // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5129 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr,
5130 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5131 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5132 : GIR_EraseFromParent, /*InsnID*/0,
5133 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5134 : // GIR_Coverage, 18172,
5135 : GIR_Done,
5136 : // Label 404: @10051
5137 : GIM_Try, /*On fail goto*//*Label 405*/ 10105, // Rule ID 18692 //
5138 : GIM_CheckFeatures, GIFBS_HasBMI,
5139 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5140 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5141 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5142 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
5143 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5144 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
5145 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
5146 : // MIs[0] src
5147 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
5148 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5149 : // (xor:{ *:[i32] } (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] }), GR32:{ *:[i32] }:$src) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5150 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr,
5151 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5152 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5153 : GIR_EraseFromParent, /*InsnID*/0,
5154 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5155 : // GIR_Coverage, 18692,
5156 : GIR_Done,
5157 : // Label 405: @10105
5158 : GIM_Try, /*On fail goto*//*Label 406*/ 10159, // Rule ID 12226 //
5159 : GIM_CheckFeatures, GIFBS_HasTBM,
5160 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
5161 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5162 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5163 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5164 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5165 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5166 : // MIs[1] src
5167 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5168 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
5169 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5170 : // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, 1:{ *:[i32] })) => (BLCMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5171 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK32rr,
5172 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5173 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
5174 : GIR_EraseFromParent, /*InsnID*/0,
5175 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5176 : // GIR_Coverage, 12226,
5177 : GIR_Done,
5178 : // Label 406: @10159
5179 : GIM_Try, /*On fail goto*//*Label 407*/ 10213, // Rule ID 16411 //
5180 : GIM_CheckFeatures, GIFBS_HasBMI,
5181 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
5182 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5183 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5184 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5185 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5186 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s32,
5187 : // MIs[1] src
5188 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5189 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
5190 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5191 : // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src, (add:{ *:[i32] } GR32:{ *:[i32] }:$src, -1:{ *:[i32] })) => (BLSMSK32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
5192 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK32rr,
5193 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5194 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
5195 : GIR_EraseFromParent, /*InsnID*/0,
5196 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5197 : // GIR_Coverage, 16411,
5198 : GIR_Done,
5199 : // Label 407: @10213
5200 : GIM_Try, /*On fail goto*//*Label 408*/ 10247, // Rule ID 154 //
5201 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
5202 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5203 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5204 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
5205 : // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, -1:{ *:[i32] }) => (NOT32r:{ *:[i32] } GR32:{ *:[i32] }:$src1)
5206 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT32r,
5207 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5208 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5209 : GIR_EraseFromParent, /*InsnID*/0,
5210 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5211 : // GIR_Coverage, 154,
5212 : GIR_Done,
5213 : // Label 408: @10247
5214 : GIM_Try, /*On fail goto*//*Label 409*/ 10292, // Rule ID 16203 //
5215 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
5216 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5217 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5218 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5219 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5220 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
5221 : // MIs[1] Operand 1
5222 : // No operand predicates
5223 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5224 : // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2) => (XOR32ri8:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src2)
5225 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri8,
5226 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5227 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5228 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5229 : GIR_EraseFromParent, /*InsnID*/0,
5230 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5231 : // GIR_Coverage, 16203,
5232 : GIR_Done,
5233 : // Label 409: @10292
5234 : GIM_Try, /*On fail goto*//*Label 410*/ 10334, // Rule ID 16201 //
5235 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
5236 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5237 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5238 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5239 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5240 : // MIs[1] Operand 1
5241 : // No operand predicates
5242 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5243 : // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2) => (XOR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$src2)
5244 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR32ri,
5245 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5246 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5247 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5248 : GIR_EraseFromParent, /*InsnID*/0,
5249 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5250 : // GIR_Coverage, 16201,
5251 : GIR_Done,
5252 : // Label 410: @10334
5253 : GIM_Try, /*On fail goto*//*Label 411*/ 10362, // Rule ID 16193 //
5254 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
5255 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5256 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5257 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
5258 : // (xor:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (XOR32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
5259 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR32rr,
5260 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
5261 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5262 : // GIR_Coverage, 16193,
5263 : GIR_Done,
5264 : // Label 411: @10362
5265 : GIM_Reject,
5266 : // Label 403: @10363
5267 : GIM_Reject,
5268 : // Label 378: @10364
5269 : GIM_Try, /*On fail goto*//*Label 412*/ 10739,
5270 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5271 : GIM_Try, /*On fail goto*//*Label 413*/ 10424, // Rule ID 18173 //
5272 : GIM_CheckFeatures, GIFBS_HasTBM,
5273 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5274 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5275 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5276 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5277 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5278 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
5279 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
5280 : // MIs[0] src
5281 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
5282 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5283 : // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5284 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr,
5285 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5286 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5287 : GIR_EraseFromParent, /*InsnID*/0,
5288 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5289 : // GIR_Coverage, 18173,
5290 : GIR_Done,
5291 : // Label 413: @10424
5292 : GIM_Try, /*On fail goto*//*Label 414*/ 10478, // Rule ID 18693 //
5293 : GIM_CheckFeatures, GIFBS_HasBMI,
5294 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5295 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
5296 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5297 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s64,
5298 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5299 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR64RegClassID,
5300 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
5301 : // MIs[0] src
5302 : GIM_CheckIsSameOperand, /*MI*/0, /*OpIdx*/2, /*OtherMI*/1, /*OtherOpIdx*/1,
5303 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5304 : // (xor:{ *:[i64] } (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] }), GR64:{ *:[i64] }:$src) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5305 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr,
5306 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5307 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
5308 : GIR_EraseFromParent, /*InsnID*/0,
5309 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5310 : // GIR_Coverage, 18693,
5311 : GIR_Done,
5312 : // Label 414: @10478
5313 : GIM_Try, /*On fail goto*//*Label 415*/ 10532, // Rule ID 12227 //
5314 : GIM_CheckFeatures, GIFBS_HasTBM,
5315 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
5316 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5317 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5318 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5319 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5320 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5321 : // MIs[1] src
5322 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5323 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, 1,
5324 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5325 : // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, 1:{ *:[i64] })) => (BLCMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5326 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLCMSK64rr,
5327 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5328 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
5329 : GIR_EraseFromParent, /*InsnID*/0,
5330 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5331 : // GIR_Coverage, 12227,
5332 : GIR_Done,
5333 : // Label 415: @10532
5334 : GIM_Try, /*On fail goto*//*Label 416*/ 10586, // Rule ID 16412 //
5335 : GIM_CheckFeatures, GIFBS_HasBMI,
5336 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
5337 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5338 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5339 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5340 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_ADD,
5341 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s64,
5342 : // MIs[1] src
5343 : GIM_CheckIsSameOperand, /*MI*/1, /*OpIdx*/1, /*OtherMI*/0, /*OtherOpIdx*/1,
5344 : GIM_CheckConstantInt, /*MI*/1, /*Op*/2, -1,
5345 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5346 : // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src, (add:{ *:[i64] } GR64:{ *:[i64] }:$src, -1:{ *:[i64] })) => (BLSMSK64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
5347 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BLSMSK64rr,
5348 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5349 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
5350 : GIR_EraseFromParent, /*InsnID*/0,
5351 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5352 : // GIR_Coverage, 16412,
5353 : GIR_Done,
5354 : // Label 416: @10586
5355 : GIM_Try, /*On fail goto*//*Label 417*/ 10620, // Rule ID 155 //
5356 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
5357 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5358 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5359 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, -1,
5360 : // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, -1:{ *:[i64] }) => (NOT64r:{ *:[i64] } GR64:{ *:[i64] }:$src1)
5361 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::NOT64r,
5362 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5363 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5364 : GIR_EraseFromParent, /*InsnID*/0,
5365 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5366 : // GIR_Coverage, 155,
5367 : GIR_Done,
5368 : // Label 417: @10620
5369 : GIM_Try, /*On fail goto*//*Label 418*/ 10665, // Rule ID 16204 //
5370 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
5371 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5372 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5373 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5374 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5375 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
5376 : // MIs[1] Operand 1
5377 : // No operand predicates
5378 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5379 : // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2) => (XOR64ri8:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src2)
5380 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri8,
5381 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5382 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5383 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5384 : GIR_EraseFromParent, /*InsnID*/0,
5385 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5386 : // GIR_Coverage, 16204,
5387 : GIR_Done,
5388 : // Label 418: @10665
5389 : GIM_Try, /*On fail goto*//*Label 419*/ 10710, // Rule ID 16205 //
5390 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
5391 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5392 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5393 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
5394 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
5395 : GIM_CheckI64ImmPredicate, /*MI*/1, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
5396 : // MIs[1] Operand 1
5397 : // No operand predicates
5398 : GIM_CheckIsSafeToFold, /*InsnID*/1,
5399 : // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2) => (XOR64ri32:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src2)
5400 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XOR64ri32,
5401 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5402 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
5403 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
5404 : GIR_EraseFromParent, /*InsnID*/0,
5405 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5406 : // GIR_Coverage, 16205,
5407 : GIR_Done,
5408 : // Label 419: @10710
5409 : GIM_Try, /*On fail goto*//*Label 420*/ 10738, // Rule ID 16194 //
5410 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
5411 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5412 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5413 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
5414 : // (xor:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (XOR64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
5415 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::XOR64rr,
5416 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
5417 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5418 : // GIR_Coverage, 16194,
5419 : GIR_Done,
5420 : // Label 420: @10738
5421 : GIM_Reject,
5422 : // Label 412: @10739
5423 : GIM_Reject,
5424 : // Label 379: @10740
5425 : GIM_Try, /*On fail goto*//*Label 421*/ 10832, // Rule ID 13743 //
5426 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1,
5427 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s1,
5428 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
5429 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID,
5430 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK2RegClassID,
5431 : // (xor:{ *:[v2i1] } VK2:{ *:[v2i1] }:$src1, VK2:{ *:[v2i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v2i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK2:{ *:[v2i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
5432 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
5433 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
5434 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
5435 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
5436 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
5437 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
5438 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
5439 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
5440 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
5441 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
5442 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5443 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr,
5444 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
5445 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
5446 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
5447 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5448 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
5449 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5450 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
5451 : GIR_EraseFromParent, /*InsnID*/0,
5452 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
5453 : // GIR_Coverage, 13743,
5454 : GIR_Done,
5455 : // Label 421: @10832
5456 : GIM_Reject,
5457 : // Label 380: @10833
5458 : GIM_Try, /*On fail goto*//*Label 422*/ 10913,
5459 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
5460 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
5461 : GIM_Try, /*On fail goto*//*Label 423*/ 10866, // Rule ID 1553 //
5462 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
5463 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5464 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
5465 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5466 : // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
5467 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORrr,
5468 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5469 : // GIR_Coverage, 1553,
5470 : GIR_Done,
5471 : // Label 423: @10866
5472 : GIM_Try, /*On fail goto*//*Label 424*/ 10889, // Rule ID 1555 //
5473 : GIM_CheckFeatures, GIFBS_UseSSE2,
5474 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5475 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
5476 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5477 : // (xor:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (PXORrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
5478 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::PXORrr,
5479 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5480 : // GIR_Coverage, 1555,
5481 : GIR_Done,
5482 : // Label 424: @10889
5483 : GIM_Try, /*On fail goto*//*Label 425*/ 10912, // Rule ID 4982 //
5484 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
5485 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
5486 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
5487 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
5488 : // (xor:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPXORQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
5489 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ128rr,
5490 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5491 : // GIR_Coverage, 4982,
5492 : GIR_Done,
5493 : // Label 425: @10912
5494 : GIM_Reject,
5495 : // Label 422: @10913
5496 : GIM_Reject,
5497 : // Label 381: @10914
5498 : GIM_Try, /*On fail goto*//*Label 426*/ 11006, // Rule ID 13744 //
5499 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1,
5500 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s1,
5501 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK1RegClassID,
5502 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID,
5503 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK4RegClassID,
5504 : // (xor:{ *:[v4i1] } VK4:{ *:[v4i1] }:$src1, VK4:{ *:[v4i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v4i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK4:{ *:[v4i1] }:$src2, VK16:{ *:[i32] })), VK1:{ *:[i32] })
5505 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
5506 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
5507 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
5508 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
5509 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
5510 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
5511 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
5512 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
5513 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
5514 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
5515 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5516 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr,
5517 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
5518 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
5519 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
5520 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5521 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
5522 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5523 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
5524 : GIR_EraseFromParent, /*InsnID*/0,
5525 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK1*/8,
5526 : // GIR_Coverage, 13744,
5527 : GIR_Done,
5528 : // Label 426: @11006
5529 : GIM_Reject,
5530 : // Label 382: @11007
5531 : GIM_Try, /*On fail goto*//*Label 427*/ 11087,
5532 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
5533 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
5534 : GIM_Try, /*On fail goto*//*Label 428*/ 11040, // Rule ID 1557 //
5535 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
5536 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
5537 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
5538 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
5539 : // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPXORYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
5540 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORYrr,
5541 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5542 : // GIR_Coverage, 1557,
5543 : GIR_Done,
5544 : // Label 428: @11040
5545 : GIM_Try, /*On fail goto*//*Label 429*/ 11063, // Rule ID 4973 //
5546 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
5547 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
5548 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
5549 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
5550 : // (xor:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPXORQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
5551 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZ256rr,
5552 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5553 : // GIR_Coverage, 4973,
5554 : GIR_Done,
5555 : // Label 429: @11063
5556 : GIM_Try, /*On fail goto*//*Label 430*/ 11086, // Rule ID 12512 //
5557 : GIM_CheckFeatures, GIFBS_HasAVX1Only,
5558 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
5559 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
5560 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
5561 : // (xor:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VXORPSYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
5562 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VXORPSYrr,
5563 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5564 : // GIR_Coverage, 12512,
5565 : GIR_Done,
5566 : // Label 430: @11086
5567 : GIM_Reject,
5568 : // Label 427: @11087
5569 : GIM_Reject,
5570 : // Label 383: @11088
5571 : GIM_Try, /*On fail goto*//*Label 431*/ 11196,
5572 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
5573 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s1,
5574 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK8RegClassID,
5575 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
5576 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK8RegClassID,
5577 : GIM_Try, /*On fail goto*//*Label 432*/ 11121, // Rule ID 3613 //
5578 : GIM_CheckFeatures, GIFBS_HasDQI,
5579 : // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (KXORBrr:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2)
5580 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORBrr,
5581 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5582 : // GIR_Coverage, 3613,
5583 : GIR_Done,
5584 : // Label 432: @11121
5585 : GIM_Try, /*On fail goto*//*Label 433*/ 11195, // Rule ID 13741 //
5586 : GIM_CheckFeatures, GIFBS_NoDQI,
5587 : // (xor:{ *:[v8i1] } VK8:{ *:[v8i1] }:$src1, VK8:{ *:[v8i1] }:$src2) => (COPY_TO_REGCLASS:{ *:[v8i1] } (KXORWrr:{ *:[v16i1] } (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src1, VK16:{ *:[i32] }), (COPY_TO_REGCLASS:{ *:[v16i1] } VK8:{ *:[v8i1] }:$src2, VK16:{ *:[i32] })), VK8:{ *:[i32] })
5588 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s1,
5589 : GIR_MakeTempReg, /*TempRegID*/1, /*TypeID*/GILLT_v16s1,
5590 : GIR_MakeTempReg, /*TempRegID*/2, /*TypeID*/GILLT_v16s1,
5591 : GIR_BuildMI, /*InsnID*/3, /*Opcode*/TargetOpcode::COPY,
5592 : GIR_AddTempRegister, /*InsnID*/3, /*TempRegID*/2, /*TempRegFlags*/RegState::Define,
5593 : GIR_Copy, /*NewInsnID*/3, /*OldInsnID*/0, /*OpIdx*/2, // src2
5594 : GIR_ConstrainSelectedInstOperands, /*InsnID*/3,
5595 : GIR_BuildMI, /*InsnID*/2, /*Opcode*/TargetOpcode::COPY,
5596 : GIR_AddTempRegister, /*InsnID*/2, /*TempRegID*/1, /*TempRegFlags*/RegState::Define,
5597 : GIR_Copy, /*NewInsnID*/2, /*OldInsnID*/0, /*OpIdx*/1, // src1
5598 : GIR_ConstrainSelectedInstOperands, /*InsnID*/2,
5599 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::KXORWrr,
5600 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
5601 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/1, /*TempRegFlags*/0,
5602 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/2, /*TempRegFlags*/0,
5603 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
5604 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
5605 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5606 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
5607 : GIR_EraseFromParent, /*InsnID*/0,
5608 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK8*/12,
5609 : // GIR_Coverage, 13741,
5610 : GIR_Done,
5611 : // Label 433: @11195
5612 : GIM_Reject,
5613 : // Label 431: @11196
5614 : GIM_Reject,
5615 : // Label 384: @11197
5616 : GIM_Try, /*On fail goto*//*Label 434*/ 11228, // Rule ID 4964 //
5617 : GIM_CheckFeatures, GIFBS_HasAVX512,
5618 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
5619 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
5620 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
5621 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
5622 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
5623 : // (xor:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPXORQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
5624 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPXORQZrr,
5625 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5626 : // GIR_Coverage, 4964,
5627 : GIR_Done,
5628 : // Label 434: @11228
5629 : GIM_Reject,
5630 : // Label 385: @11229
5631 : GIM_Try, /*On fail goto*//*Label 435*/ 11260, // Rule ID 3614 //
5632 : GIM_CheckFeatures, GIFBS_HasAVX512,
5633 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
5634 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s1,
5635 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK16RegClassID,
5636 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
5637 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK16RegClassID,
5638 : // (xor:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2) => (KXORWrr:{ *:[v16i1] } VK16:{ *:[v16i1] }:$src1, VK16:{ *:[v16i1] }:$src2)
5639 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORWrr,
5640 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5641 : // GIR_Coverage, 3614,
5642 : GIR_Done,
5643 : // Label 435: @11260
5644 : GIM_Reject,
5645 : // Label 386: @11261
5646 : GIM_Try, /*On fail goto*//*Label 436*/ 11292, // Rule ID 3615 //
5647 : GIM_CheckFeatures, GIFBS_HasBWI,
5648 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
5649 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s1,
5650 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID,
5651 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
5652 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK32RegClassID,
5653 : // (xor:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2) => (KXORDrr:{ *:[v32i1] } VK32:{ *:[v32i1] }:$src1, VK32:{ *:[v32i1] }:$src2)
5654 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORDrr,
5655 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5656 : // GIR_Coverage, 3615,
5657 : GIR_Done,
5658 : // Label 436: @11292
5659 : GIM_Reject,
5660 : // Label 387: @11293
5661 : GIM_Try, /*On fail goto*//*Label 437*/ 11324, // Rule ID 3616 //
5662 : GIM_CheckFeatures, GIFBS_HasBWI,
5663 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
5664 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v64s1,
5665 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID,
5666 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
5667 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VK64RegClassID,
5668 : // (xor:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2) => (KXORQrr:{ *:[v64i1] } VK64:{ *:[v64i1] }:$src1, VK64:{ *:[v64i1] }:$src2)
5669 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::KXORQrr,
5670 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5671 : // GIR_Coverage, 3616,
5672 : GIR_Done,
5673 : // Label 437: @11324
5674 : GIM_Reject,
5675 : // Label 388: @11325
5676 : GIM_Reject,
5677 : // Label 6: @11326
5678 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 24, /*)*//*default:*//*Label 442*/ 11725,
5679 : /*GILLT_s32*//*Label 438*/ 11353,
5680 : /*GILLT_s64*//*Label 439*/ 11515, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
5681 : /*GILLT_v32s1*//*Label 440*/ 11677, 0, 0,
5682 : /*GILLT_v64s1*//*Label 441*/ 11701,
5683 : // Label 438: @11353
5684 : GIM_Try, /*On fail goto*//*Label 443*/ 11376, // Rule ID 2194 //
5685 : GIM_CheckFeatures, GIFBS_UseAVX,
5686 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5687 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
5688 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5689 : // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
5690 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSrr,
5691 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5692 : // GIR_Coverage, 2194,
5693 : GIR_Done,
5694 : // Label 443: @11376
5695 : GIM_Try, /*On fail goto*//*Label 444*/ 11399, // Rule ID 2196 //
5696 : GIM_CheckFeatures, GIFBS_UseSSE2,
5697 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5698 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
5699 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5700 : // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (MOVDI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
5701 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVDI2SSrr,
5702 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5703 : // GIR_Coverage, 2196,
5704 : GIR_Done,
5705 : // Label 444: @11399
5706 : GIM_Try, /*On fail goto*//*Label 445*/ 11422, // Rule ID 2210 //
5707 : GIM_CheckFeatures, GIFBS_UseAVX,
5708 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5709 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5710 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
5711 : // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VMOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
5712 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIrr,
5713 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5714 : // GIR_Coverage, 2210,
5715 : GIR_Done,
5716 : // Label 445: @11422
5717 : GIM_Try, /*On fail goto*//*Label 446*/ 11445, // Rule ID 2212 //
5718 : GIM_CheckFeatures, GIFBS_UseSSE2,
5719 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5720 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5721 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
5722 : // (bitconvert:{ *:[i32] } FR32:{ *:[f32] }:$src) => (MOVSS2DIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
5723 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSS2DIrr,
5724 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5725 : // GIR_Coverage, 2212,
5726 : GIR_Done,
5727 : // Label 446: @11445
5728 : GIM_Try, /*On fail goto*//*Label 447*/ 11468, // Rule ID 3786 //
5729 : GIM_CheckFeatures, GIFBS_HasAVX512,
5730 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5731 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
5732 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5733 : // (bitconvert:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VMOVDI2SSZrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
5734 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVDI2SSZrr,
5735 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5736 : // GIR_Coverage, 3786,
5737 : GIR_Done,
5738 : // Label 447: @11468
5739 : GIM_Try, /*On fail goto*//*Label 448*/ 11491, // Rule ID 3792 //
5740 : GIM_CheckFeatures, GIFBS_HasAVX512,
5741 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5742 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5743 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
5744 : // (bitconvert:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VMOVSS2DIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
5745 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSS2DIZrr,
5746 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5747 : // GIR_Coverage, 3792,
5748 : GIR_Done,
5749 : // Label 448: @11491
5750 : GIM_Try, /*On fail goto*//*Label 449*/ 11514, // Rule ID 13699 //
5751 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
5752 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
5753 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
5754 : // (bitconvert:{ *:[i32] } VK32:{ *:[v32i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i32] } VK32:{ *:[v32i1] }:$src, GR32:{ *:[i32] })
5755 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
5756 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/27,
5757 : // GIR_Coverage, 13699,
5758 : GIR_Done,
5759 : // Label 449: @11514
5760 : GIM_Reject,
5761 : // Label 439: @11515
5762 : GIM_Try, /*On fail goto*//*Label 450*/ 11538, // Rule ID 2189 //
5763 : GIM_CheckFeatures, GIFBS_UseAVX,
5764 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5765 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
5766 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5767 : // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
5768 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDrr,
5769 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5770 : // GIR_Coverage, 2189,
5771 : GIR_Done,
5772 : // Label 450: @11538
5773 : GIM_Try, /*On fail goto*//*Label 451*/ 11561, // Rule ID 2193 //
5774 : GIM_CheckFeatures, GIFBS_UseSSE2,
5775 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5776 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
5777 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5778 : // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (MOV64toSDrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
5779 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOV64toSDrr,
5780 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5781 : // GIR_Coverage, 2193,
5782 : GIR_Done,
5783 : // Label 451: @11561
5784 : GIM_Try, /*On fail goto*//*Label 452*/ 11584, // Rule ID 2205 //
5785 : GIM_CheckFeatures, GIFBS_UseAVX,
5786 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5787 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5788 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
5789 : // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VMOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
5790 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64rr,
5791 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5792 : // GIR_Coverage, 2205,
5793 : GIR_Done,
5794 : // Label 452: @11584
5795 : GIM_Try, /*On fail goto*//*Label 453*/ 11607, // Rule ID 2208 //
5796 : GIM_CheckFeatures, GIFBS_UseSSE2,
5797 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5798 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5799 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
5800 : // (bitconvert:{ *:[i64] } FR64:{ *:[f64] }:$src) => (MOVSDto64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
5801 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSDto64rr,
5802 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5803 : // GIR_Coverage, 2208,
5804 : GIR_Done,
5805 : // Label 453: @11607
5806 : GIM_Try, /*On fail goto*//*Label 454*/ 11630, // Rule ID 3782 //
5807 : GIM_CheckFeatures, GIFBS_HasAVX512,
5808 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5809 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
5810 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5811 : // (bitconvert:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VMOV64toSDZrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
5812 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOV64toSDZrr,
5813 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5814 : // GIR_Coverage, 3782,
5815 : GIR_Done,
5816 : // Label 454: @11630
5817 : GIM_Try, /*On fail goto*//*Label 455*/ 11653, // Rule ID 3784 //
5818 : GIM_CheckFeatures, GIFBS_HasAVX512,
5819 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5820 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5821 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
5822 : // (bitconvert:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VMOVSDto64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
5823 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMOVSDto64Zrr,
5824 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5825 : // GIR_Coverage, 3784,
5826 : GIR_Done,
5827 : // Label 455: @11653
5828 : GIM_Try, /*On fail goto*//*Label 456*/ 11676, // Rule ID 13701 //
5829 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
5830 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
5831 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
5832 : // (bitconvert:{ *:[i64] } VK64:{ *:[v64i1] }:$src) => (COPY_TO_REGCLASS:{ *:[i64] } VK64:{ *:[v64i1] }:$src, GR64:{ *:[i32] })
5833 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
5834 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR64*/57,
5835 : // GIR_Coverage, 13701,
5836 : GIR_Done,
5837 : // Label 456: @11676
5838 : GIM_Reject,
5839 : // Label 440: @11677
5840 : GIM_Try, /*On fail goto*//*Label 457*/ 11700, // Rule ID 13698 //
5841 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
5842 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK32RegClassID,
5843 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
5844 : // (bitconvert:{ *:[v32i1] } GR32:{ *:[i32] }:$src) => (COPY_TO_REGCLASS:{ *:[v32i1] } GR32:{ *:[i32] }:$src, VK32:{ *:[i32] })
5845 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
5846 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK32*/31,
5847 : // GIR_Coverage, 13698,
5848 : GIR_Done,
5849 : // Label 457: @11700
5850 : GIM_Reject,
5851 : // Label 441: @11701
5852 : GIM_Try, /*On fail goto*//*Label 458*/ 11724, // Rule ID 13700 //
5853 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
5854 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VK64RegClassID,
5855 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
5856 : // (bitconvert:{ *:[v64i1] } GR64:{ *:[i64] }:$src) => (COPY_TO_REGCLASS:{ *:[v64i1] } GR64:{ *:[i64] }:$src, VK64:{ *:[i32] })
5857 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
5858 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC VK64*/67,
5859 : // GIR_Coverage, 13700,
5860 : GIR_Done,
5861 : // Label 458: @11724
5862 : GIM_Reject,
5863 : // Label 442: @11725
5864 : GIM_Reject,
5865 : // Label 7: @11726
5866 : GIM_Try, /*On fail goto*//*Label 459*/ 12828,
5867 : GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
5868 : GIM_Try, /*On fail goto*//*Label 460*/ 11771, // Rule ID 1129 //
5869 : GIM_CheckFeatures, GIFBS_HasXOP,
5870 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubwd,
5871 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
5872 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
5873 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5874 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5875 : // (intrinsic_wo_chain:{ *:[v4i32] } 6657:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHSUBWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src)
5876 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBWDrr,
5877 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5878 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5879 : GIR_EraseFromParent, /*InsnID*/0,
5880 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5881 : // GIR_Coverage, 1129,
5882 : GIR_Done,
5883 : // Label 460: @11771
5884 : GIM_Try, /*On fail goto*//*Label 461*/ 11811, // Rule ID 1131 //
5885 : GIM_CheckFeatures, GIFBS_HasXOP,
5886 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubdq,
5887 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
5888 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
5889 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5890 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5891 : // (intrinsic_wo_chain:{ *:[v2i64] } 6656:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHSUBDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src)
5892 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBDQrr,
5893 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5894 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5895 : GIR_EraseFromParent, /*InsnID*/0,
5896 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5897 : // GIR_Coverage, 1131,
5898 : GIR_Done,
5899 : // Label 461: @11811
5900 : GIM_Try, /*On fail goto*//*Label 462*/ 11851, // Rule ID 1133 //
5901 : GIM_CheckFeatures, GIFBS_HasXOP,
5902 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphsubbw,
5903 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
5904 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
5905 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5906 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5907 : // (intrinsic_wo_chain:{ *:[v8i16] } 6655:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHSUBBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src)
5908 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBBWrr,
5909 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5910 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5911 : GIR_EraseFromParent, /*InsnID*/0,
5912 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5913 : // GIR_Coverage, 1133,
5914 : GIR_Done,
5915 : // Label 462: @11851
5916 : GIM_Try, /*On fail goto*//*Label 463*/ 11891, // Rule ID 1135 //
5917 : GIM_CheckFeatures, GIFBS_HasXOP,
5918 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwq,
5919 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
5920 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
5921 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5922 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5923 : // (intrinsic_wo_chain:{ *:[v2i64] } 6654:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src)
5924 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWQrr,
5925 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5926 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5927 : GIR_EraseFromParent, /*InsnID*/0,
5928 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5929 : // GIR_Coverage, 1135,
5930 : GIR_Done,
5931 : // Label 463: @11891
5932 : GIM_Try, /*On fail goto*//*Label 464*/ 11931, // Rule ID 1137 //
5933 : GIM_CheckFeatures, GIFBS_HasXOP,
5934 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddwd,
5935 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
5936 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
5937 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5938 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5939 : // (intrinsic_wo_chain:{ *:[v4i32] } 6653:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src)
5940 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDWDrr,
5941 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5942 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5943 : GIR_EraseFromParent, /*InsnID*/0,
5944 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5945 : // GIR_Coverage, 1137,
5946 : GIR_Done,
5947 : // Label 464: @11931
5948 : GIM_Try, /*On fail goto*//*Label 465*/ 11971, // Rule ID 1139 //
5949 : GIM_CheckFeatures, GIFBS_HasXOP,
5950 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwq,
5951 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
5952 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
5953 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5954 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5955 : // (intrinsic_wo_chain:{ *:[v2i64] } 6652:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWQrr:{ *:[v2i64] } VR128:{ *:[v8i16] }:$src)
5956 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWQrr,
5957 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5958 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5959 : GIR_EraseFromParent, /*InsnID*/0,
5960 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5961 : // GIR_Coverage, 1139,
5962 : GIR_Done,
5963 : // Label 465: @11971
5964 : GIM_Try, /*On fail goto*//*Label 466*/ 12011, // Rule ID 1141 //
5965 : GIM_CheckFeatures, GIFBS_HasXOP,
5966 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadduwd,
5967 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
5968 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
5969 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5970 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5971 : // (intrinsic_wo_chain:{ *:[v4i32] } 6651:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src) => (VPHADDUWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src)
5972 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUWDrr,
5973 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5974 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5975 : GIR_EraseFromParent, /*InsnID*/0,
5976 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5977 : // GIR_Coverage, 1141,
5978 : GIR_Done,
5979 : // Label 466: @12011
5980 : GIM_Try, /*On fail goto*//*Label 467*/ 12051, // Rule ID 1143 //
5981 : GIM_CheckFeatures, GIFBS_HasXOP,
5982 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddudq,
5983 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
5984 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
5985 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
5986 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
5987 : // (intrinsic_wo_chain:{ *:[v2i64] } 6650:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDUDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src)
5988 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUDQrr,
5989 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
5990 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
5991 : GIR_EraseFromParent, /*InsnID*/0,
5992 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
5993 : // GIR_Coverage, 1143,
5994 : GIR_Done,
5995 : // Label 467: @12051
5996 : GIM_Try, /*On fail goto*//*Label 468*/ 12091, // Rule ID 1145 //
5997 : GIM_CheckFeatures, GIFBS_HasXOP,
5998 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubw,
5999 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6000 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6001 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6002 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6003 : // (intrinsic_wo_chain:{ *:[v8i16] } 6649:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src)
6004 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBWrr,
6005 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6006 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6007 : GIR_EraseFromParent, /*InsnID*/0,
6008 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6009 : // GIR_Coverage, 1145,
6010 : GIR_Done,
6011 : // Label 468: @12091
6012 : GIM_Try, /*On fail goto*//*Label 469*/ 12131, // Rule ID 1147 //
6013 : GIM_CheckFeatures, GIFBS_HasXOP,
6014 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubq,
6015 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6016 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6017 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6018 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6019 : // (intrinsic_wo_chain:{ *:[v2i64] } 6648:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src)
6020 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBQrr,
6021 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6022 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6023 : GIR_EraseFromParent, /*InsnID*/0,
6024 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6025 : // GIR_Coverage, 1147,
6026 : GIR_Done,
6027 : // Label 469: @12131
6028 : GIM_Try, /*On fail goto*//*Label 470*/ 12171, // Rule ID 1149 //
6029 : GIM_CheckFeatures, GIFBS_HasXOP,
6030 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddubd,
6031 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6032 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6033 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6034 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6035 : // (intrinsic_wo_chain:{ *:[v4i32] } 6647:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDUBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src)
6036 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDUBDrr,
6037 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6038 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6039 : GIR_EraseFromParent, /*InsnID*/0,
6040 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6041 : // GIR_Coverage, 1149,
6042 : GIR_Done,
6043 : // Label 470: @12171
6044 : GIM_Try, /*On fail goto*//*Label 471*/ 12211, // Rule ID 1151 //
6045 : GIM_CheckFeatures, GIFBS_HasXOP,
6046 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphadddq,
6047 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6048 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6049 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6050 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6051 : // (intrinsic_wo_chain:{ *:[v2i64] } 6646:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src) => (VPHADDDQrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src)
6052 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDDQrr,
6053 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6054 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6055 : GIR_EraseFromParent, /*InsnID*/0,
6056 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6057 : // GIR_Coverage, 1151,
6058 : GIR_Done,
6059 : // Label 471: @12211
6060 : GIM_Try, /*On fail goto*//*Label 472*/ 12251, // Rule ID 1153 //
6061 : GIM_CheckFeatures, GIFBS_HasXOP,
6062 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbw,
6063 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6064 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6065 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6066 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6067 : // (intrinsic_wo_chain:{ *:[v8i16] } 6645:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBWrr:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src)
6068 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBWrr,
6069 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6070 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6071 : GIR_EraseFromParent, /*InsnID*/0,
6072 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6073 : // GIR_Coverage, 1153,
6074 : GIR_Done,
6075 : // Label 472: @12251
6076 : GIM_Try, /*On fail goto*//*Label 473*/ 12291, // Rule ID 1155 //
6077 : GIM_CheckFeatures, GIFBS_HasXOP,
6078 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbq,
6079 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6080 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6081 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6082 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6083 : // (intrinsic_wo_chain:{ *:[v2i64] } 6644:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBQrr:{ *:[v2i64] } VR128:{ *:[v16i8] }:$src)
6084 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBQrr,
6085 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6086 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6087 : GIR_EraseFromParent, /*InsnID*/0,
6088 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6089 : // GIR_Coverage, 1155,
6090 : GIR_Done,
6091 : // Label 473: @12291
6092 : GIM_Try, /*On fail goto*//*Label 474*/ 12331, // Rule ID 1157 //
6093 : GIM_CheckFeatures, GIFBS_HasXOP,
6094 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vphaddbd,
6095 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6096 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6097 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6098 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6099 : // (intrinsic_wo_chain:{ *:[v4i32] } 6643:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src) => (VPHADDBDrr:{ *:[v4i32] } VR128:{ *:[v16i8] }:$src)
6100 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDBDrr,
6101 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6102 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6103 : GIR_EraseFromParent, /*InsnID*/0,
6104 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6105 : // GIR_Coverage, 1157,
6106 : GIR_Done,
6107 : // Label 474: @12331
6108 : GIM_Try, /*On fail goto*//*Label 475*/ 12371, // Rule ID 1159 //
6109 : GIM_CheckFeatures, GIFBS_HasXOP,
6110 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ss,
6111 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6112 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6113 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6114 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6115 : // (intrinsic_wo_chain:{ *:[v4f32] } 6630:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZSSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
6116 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSSrr,
6117 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6118 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6119 : GIR_EraseFromParent, /*InsnID*/0,
6120 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6121 : // GIR_Coverage, 1159,
6122 : GIR_Done,
6123 : // Label 475: @12371
6124 : GIM_Try, /*On fail goto*//*Label 476*/ 12411, // Rule ID 1161 //
6125 : GIM_CheckFeatures, GIFBS_HasXOP,
6126 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps,
6127 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6128 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6129 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6130 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6131 : // (intrinsic_wo_chain:{ *:[v4f32] } 6627:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VFRCZPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src)
6132 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSrr,
6133 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6134 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6135 : GIR_EraseFromParent, /*InsnID*/0,
6136 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6137 : // GIR_Coverage, 1161,
6138 : GIR_Done,
6139 : // Label 476: @12411
6140 : GIM_Try, /*On fail goto*//*Label 477*/ 12451, // Rule ID 1163 //
6141 : GIM_CheckFeatures, GIFBS_HasXOP,
6142 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_ps_256,
6143 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
6144 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
6145 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6146 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6147 : // (intrinsic_wo_chain:{ *:[v8f32] } 6628:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src) => (VFRCZPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src)
6148 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPSYrr,
6149 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6150 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6151 : GIR_EraseFromParent, /*InsnID*/0,
6152 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6153 : // GIR_Coverage, 1163,
6154 : GIR_Done,
6155 : // Label 477: @12451
6156 : GIM_Try, /*On fail goto*//*Label 478*/ 12491, // Rule ID 1165 //
6157 : GIM_CheckFeatures, GIFBS_HasXOP,
6158 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_sd,
6159 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6160 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6161 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6162 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6163 : // (intrinsic_wo_chain:{ *:[v2f64] } 6629:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZSDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
6164 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZSDrr,
6165 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6166 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6167 : GIR_EraseFromParent, /*InsnID*/0,
6168 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6169 : // GIR_Coverage, 1165,
6170 : GIR_Done,
6171 : // Label 478: @12491
6172 : GIM_Try, /*On fail goto*//*Label 479*/ 12531, // Rule ID 1167 //
6173 : GIM_CheckFeatures, GIFBS_HasXOP,
6174 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd,
6175 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6176 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6177 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6178 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6179 : // (intrinsic_wo_chain:{ *:[v2f64] } 6625:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src) => (VFRCZPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src)
6180 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDrr,
6181 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6182 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6183 : GIR_EraseFromParent, /*InsnID*/0,
6184 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6185 : // GIR_Coverage, 1167,
6186 : GIR_Done,
6187 : // Label 479: @12531
6188 : GIM_Try, /*On fail goto*//*Label 480*/ 12571, // Rule ID 1169 //
6189 : GIM_CheckFeatures, GIFBS_HasXOP,
6190 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vfrcz_pd_256,
6191 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
6192 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
6193 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6194 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6195 : // (intrinsic_wo_chain:{ *:[v4f64] } 6626:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src) => (VFRCZPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src)
6196 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VFRCZPDYrr,
6197 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6198 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6199 : GIR_EraseFromParent, /*InsnID*/0,
6200 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6201 : // GIR_Coverage, 1169,
6202 : GIR_Done,
6203 : // Label 480: @12571
6204 : GIM_Try, /*On fail goto*//*Label 481*/ 12611, // Rule ID 2623 //
6205 : GIM_CheckFeatures, GIFBS_HasAES_HasAVX,
6206 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc,
6207 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6208 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6209 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6210 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6211 : // (intrinsic_wo_chain:{ *:[v2i64] } 5487:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (VAESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1)
6212 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESIMCrr,
6213 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6214 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6215 : GIR_EraseFromParent, /*InsnID*/0,
6216 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6217 : // GIR_Coverage, 2623,
6218 : GIR_Done,
6219 : // Label 481: @12611
6220 : GIM_Try, /*On fail goto*//*Label 482*/ 12651, // Rule ID 2625 //
6221 : GIM_CheckFeatures, GIFBS_HasAES_NoAVX,
6222 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesimc,
6223 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6224 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6225 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6226 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6227 : // (intrinsic_wo_chain:{ *:[v2i64] } 5487:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1) => (AESIMCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1)
6228 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESIMCrr,
6229 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6230 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6231 : GIR_EraseFromParent, /*InsnID*/0,
6232 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6233 : // GIR_Coverage, 2625,
6234 : GIR_Done,
6235 : // Label 482: @12651
6236 : GIM_Try, /*On fail goto*//*Label 483*/ 12695, // Rule ID 12558 //
6237 : GIM_CheckFeatures, GIFBS_UseSSE1,
6238 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss,
6239 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6240 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6241 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6242 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6243 : // (intrinsic_wo_chain:{ *:[v4f32] } 6445:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
6244 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RSQRTSSr_Int,
6245 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6246 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6247 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6248 : GIR_EraseFromParent, /*InsnID*/0,
6249 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6250 : // GIR_Coverage, 12558,
6251 : GIR_Done,
6252 : // Label 483: @12695
6253 : GIM_Try, /*On fail goto*//*Label 484*/ 12739, // Rule ID 12560 //
6254 : GIM_CheckFeatures, GIFBS_HasAVX,
6255 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rsqrt_ss,
6256 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6257 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6258 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6259 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6260 : // (intrinsic_wo_chain:{ *:[v4f32] } 6445:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRSQRTSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
6261 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRSQRTSSr_Int,
6262 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6263 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6264 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6265 : GIR_EraseFromParent, /*InsnID*/0,
6266 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6267 : // GIR_Coverage, 12560,
6268 : GIR_Done,
6269 : // Label 484: @12739
6270 : GIM_Try, /*On fail goto*//*Label 485*/ 12783, // Rule ID 12570 //
6271 : GIM_CheckFeatures, GIFBS_UseSSE1,
6272 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss,
6273 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6274 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6275 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6276 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6277 : // (intrinsic_wo_chain:{ *:[v4f32] } 6443:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (RCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
6278 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RCPSSr_Int,
6279 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6280 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6281 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6282 : GIR_EraseFromParent, /*InsnID*/0,
6283 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6284 : // GIR_Coverage, 12570,
6285 : GIR_Done,
6286 : // Label 485: @12783
6287 : GIM_Try, /*On fail goto*//*Label 486*/ 12827, // Rule ID 12572 //
6288 : GIM_CheckFeatures, GIFBS_HasAVX,
6289 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_rcp_ss,
6290 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6291 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6292 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6293 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6294 : // (intrinsic_wo_chain:{ *:[v4f32] } 6443:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src) => (VRCPSSr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src, VR128:{ *:[v4f32] }:$src)
6295 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VRCPSSr_Int,
6296 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6297 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6298 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
6299 : GIR_EraseFromParent, /*InsnID*/0,
6300 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6301 : // GIR_Coverage, 12572,
6302 : GIR_Done,
6303 : // Label 486: @12827
6304 : GIM_Reject,
6305 : // Label 459: @12828
6306 : GIM_Try, /*On fail goto*//*Label 487*/ 15858,
6307 : GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
6308 : GIM_Try, /*On fail goto*//*Label 488*/ 12889, // Rule ID 2627 //
6309 : GIM_CheckFeatures, GIFBS_HasAES_HasAVX,
6310 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist,
6311 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6312 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6313 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8,
6314 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6315 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6316 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6317 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
6318 : // MIs[1] Operand 1
6319 : // No operand predicates
6320 : GIM_CheckIsSafeToFold, /*InsnID*/1,
6321 : // (intrinsic_wo_chain:{ *:[v2i64] } 5488:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2) => (VAESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2)
6322 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESKEYGENASSIST128rr,
6323 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6324 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6325 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
6326 : GIR_EraseFromParent, /*InsnID*/0,
6327 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6328 : // GIR_Coverage, 2627,
6329 : GIR_Done,
6330 : // Label 488: @12889
6331 : GIM_Try, /*On fail goto*//*Label 489*/ 12945, // Rule ID 2629 //
6332 : GIM_CheckFeatures, GIFBS_HasAES_NoAVX,
6333 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aeskeygenassist,
6334 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6335 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6336 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8,
6337 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6338 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6339 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
6340 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
6341 : // MIs[1] Operand 1
6342 : // No operand predicates
6343 : GIM_CheckIsSafeToFold, /*InsnID*/1,
6344 : // (intrinsic_wo_chain:{ *:[v2i64] } 5488:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2) => (AESKEYGENASSIST128rr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, (imm:{ *:[i8] }):$src2)
6345 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESKEYGENASSIST128rr,
6346 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6347 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6348 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
6349 : GIR_EraseFromParent, /*InsnID*/0,
6350 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6351 : // GIR_Coverage, 2629,
6352 : GIR_Done,
6353 : // Label 489: @12945
6354 : GIM_Try, /*On fail goto*//*Label 490*/ 12997, // Rule ID 82 //
6355 : GIM_CheckFeatures, GIFBS_HasBMI2,
6356 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_32,
6357 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
6358 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
6359 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
6360 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
6361 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
6362 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
6363 : // (intrinsic_wo_chain:{ *:[i32] } 6278:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (PDEP32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
6364 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP32rr,
6365 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6366 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6367 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6368 : GIR_EraseFromParent, /*InsnID*/0,
6369 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6370 : // GIR_Coverage, 82,
6371 : GIR_Done,
6372 : // Label 490: @12997
6373 : GIM_Try, /*On fail goto*//*Label 491*/ 13049, // Rule ID 84 //
6374 : GIM_CheckFeatures, GIFBS_HasBMI2,
6375 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pdep_64,
6376 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
6377 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
6378 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
6379 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
6380 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
6381 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
6382 : // (intrinsic_wo_chain:{ *:[i64] } 6279:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (PDEP64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
6383 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PDEP64rr,
6384 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6385 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6386 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6387 : GIR_EraseFromParent, /*InsnID*/0,
6388 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6389 : // GIR_Coverage, 84,
6390 : GIR_Done,
6391 : // Label 491: @13049
6392 : GIM_Try, /*On fail goto*//*Label 492*/ 13101, // Rule ID 86 //
6393 : GIM_CheckFeatures, GIFBS_HasBMI2,
6394 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_32,
6395 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
6396 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
6397 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
6398 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
6399 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
6400 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
6401 : // (intrinsic_wo_chain:{ *:[i32] } 6280:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (PEXT32rr:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
6402 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT32rr,
6403 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6404 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6405 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6406 : GIR_EraseFromParent, /*InsnID*/0,
6407 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6408 : // GIR_Coverage, 86,
6409 : GIR_Done,
6410 : // Label 492: @13101
6411 : GIM_Try, /*On fail goto*//*Label 493*/ 13153, // Rule ID 88 //
6412 : GIM_CheckFeatures, GIFBS_HasBMI2,
6413 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_bmi_pext_64,
6414 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
6415 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
6416 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
6417 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
6418 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
6419 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
6420 : // (intrinsic_wo_chain:{ *:[i64] } 6281:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (PEXT64rr:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
6421 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PEXT64rr,
6422 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6423 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6424 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6425 : GIR_EraseFromParent, /*InsnID*/0,
6426 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6427 : // GIR_Coverage, 88,
6428 : GIR_Done,
6429 : // Label 493: @13153
6430 : GIM_Try, /*On fail goto*//*Label 494*/ 13205, // Rule ID 1399 //
6431 : GIM_CheckFeatures, GIFBS_HasAVX,
6432 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2ss,
6433 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6434 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6435 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
6436 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6437 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6438 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6439 : // (intrinsic_wo_chain:{ *:[v4f32] } 6468:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VCVTSD2SSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2)
6440 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSrr_Int,
6441 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6442 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6443 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6444 : GIR_EraseFromParent, /*InsnID*/0,
6445 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6446 : // GIR_Coverage, 1399,
6447 : GIR_Done,
6448 : // Label 494: @13205
6449 : GIM_Try, /*On fail goto*//*Label 495*/ 13257, // Rule ID 1401 //
6450 : GIM_CheckFeatures, GIFBS_UseSSE2,
6451 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cvtsd2ss,
6452 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6453 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6454 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
6455 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6456 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6457 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6458 : // (intrinsic_wo_chain:{ *:[v4f32] } 6468:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2) => (CVTSD2SSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v2f64] }:$src2)
6459 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CVTSD2SSrr_Int,
6460 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6461 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6462 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6463 : GIR_EraseFromParent, /*InsnID*/0,
6464 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6465 : // GIR_Coverage, 1401,
6466 : GIR_Done,
6467 : // Label 495: @13257
6468 : GIM_Try, /*On fail goto*//*Label 496*/ 13309, // Rule ID 2309 //
6469 : GIM_CheckFeatures, GIFBS_HasAVX,
6470 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128,
6471 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
6472 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6473 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
6474 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6475 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6476 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6477 : // (intrinsic_wo_chain:{ *:[v16i8] } 6585:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (VPSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
6478 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBrr,
6479 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6480 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6481 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6482 : GIR_EraseFromParent, /*InsnID*/0,
6483 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6484 : // GIR_Coverage, 2309,
6485 : GIR_Done,
6486 : // Label 496: @13309
6487 : GIM_Try, /*On fail goto*//*Label 497*/ 13361, // Rule ID 2311 //
6488 : GIM_CheckFeatures, GIFBS_HasAVX,
6489 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128,
6490 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6491 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
6492 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
6493 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6494 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6495 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6496 : // (intrinsic_wo_chain:{ *:[v8i16] } 6589:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6497 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWrr,
6498 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6499 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6500 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6501 : GIR_EraseFromParent, /*InsnID*/0,
6502 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6503 : // GIR_Coverage, 2311,
6504 : GIR_Done,
6505 : // Label 497: @13361
6506 : GIM_Try, /*On fail goto*//*Label 498*/ 13413, // Rule ID 2313 //
6507 : GIM_CheckFeatures, GIFBS_HasAVX,
6508 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128,
6509 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6510 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6511 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6512 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6513 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6514 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6515 : // (intrinsic_wo_chain:{ *:[v4i32] } 6587:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6516 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDrr,
6517 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6518 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6519 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6520 : GIR_EraseFromParent, /*InsnID*/0,
6521 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6522 : // GIR_Coverage, 2313,
6523 : GIR_Done,
6524 : // Label 498: @13413
6525 : GIM_Try, /*On fail goto*//*Label 499*/ 13465, // Rule ID 2315 //
6526 : GIM_CheckFeatures, GIFBS_HasAVX,
6527 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128,
6528 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6529 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
6530 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
6531 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6532 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6533 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6534 : // (intrinsic_wo_chain:{ *:[v8i16] } 6569:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6535 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWrr,
6536 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6537 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6538 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6539 : GIR_EraseFromParent, /*InsnID*/0,
6540 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6541 : // GIR_Coverage, 2315,
6542 : GIR_Done,
6543 : // Label 499: @13465
6544 : GIM_Try, /*On fail goto*//*Label 500*/ 13517, // Rule ID 2317 //
6545 : GIM_CheckFeatures, GIFBS_HasAVX,
6546 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128,
6547 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6548 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
6549 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
6550 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6551 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6552 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6553 : // (intrinsic_wo_chain:{ *:[v8i16] } 6575:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (VPHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6554 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWrr,
6555 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6556 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6557 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6558 : GIR_EraseFromParent, /*InsnID*/0,
6559 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6560 : // GIR_Coverage, 2317,
6561 : GIR_Done,
6562 : // Label 500: @13517
6563 : GIM_Try, /*On fail goto*//*Label 501*/ 13569, // Rule ID 2333 //
6564 : GIM_CheckFeatures, GIFBS_HasAVX2,
6565 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_b,
6566 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8,
6567 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
6568 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8,
6569 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6570 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6571 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
6572 : // (intrinsic_wo_chain:{ *:[v32i8] } 5593:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2) => (VPSIGNBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2)
6573 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNBYrr,
6574 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6575 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6576 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6577 : GIR_EraseFromParent, /*InsnID*/0,
6578 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6579 : // GIR_Coverage, 2333,
6580 : GIR_Done,
6581 : // Label 501: @13569
6582 : GIM_Try, /*On fail goto*//*Label 502*/ 13621, // Rule ID 2335 //
6583 : GIM_CheckFeatures, GIFBS_HasAVX2,
6584 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_w,
6585 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
6586 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
6587 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16,
6588 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6589 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6590 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
6591 : // (intrinsic_wo_chain:{ *:[v16i16] } 5595:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPSIGNWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
6592 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNWYrr,
6593 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6594 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6595 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6596 : GIR_EraseFromParent, /*InsnID*/0,
6597 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6598 : // GIR_Coverage, 2335,
6599 : GIR_Done,
6600 : // Label 502: @13621
6601 : GIM_Try, /*On fail goto*//*Label 503*/ 13673, // Rule ID 2337 //
6602 : GIM_CheckFeatures, GIFBS_HasAVX2,
6603 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_psign_d,
6604 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
6605 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
6606 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32,
6607 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6608 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6609 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
6610 : // (intrinsic_wo_chain:{ *:[v8i32] } 5594:{ *:[iPTR] }, VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSIGNDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
6611 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPSIGNDYrr,
6612 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6613 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6614 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6615 : GIR_EraseFromParent, /*InsnID*/0,
6616 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6617 : // GIR_Coverage, 2337,
6618 : GIR_Done,
6619 : // Label 503: @13673
6620 : GIM_Try, /*On fail goto*//*Label 504*/ 13725, // Rule ID 2339 //
6621 : GIM_CheckFeatures, GIFBS_HasAVX2,
6622 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phadd_sw,
6623 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
6624 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
6625 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16,
6626 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6627 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6628 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
6629 : // (intrinsic_wo_chain:{ *:[v16i16] } 5580:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHADDSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
6630 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHADDSWYrr,
6631 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6632 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6633 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6634 : GIR_EraseFromParent, /*InsnID*/0,
6635 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6636 : // GIR_Coverage, 2339,
6637 : GIR_Done,
6638 : // Label 504: @13725
6639 : GIM_Try, /*On fail goto*//*Label 505*/ 13777, // Rule ID 2341 //
6640 : GIM_CheckFeatures, GIFBS_HasAVX2,
6641 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_phsub_sw,
6642 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
6643 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
6644 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s16,
6645 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
6646 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
6647 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
6648 : // (intrinsic_wo_chain:{ *:[v16i16] } 5583:{ *:[iPTR] }, VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2) => (VPHSUBSWYrr:{ *:[v16i16] } VR256:{ *:[v16i16] }:$src1, VR256:{ *:[v16i16] }:$src2)
6649 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPHSUBSWYrr,
6650 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6651 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6652 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6653 : GIR_EraseFromParent, /*InsnID*/0,
6654 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6655 : // GIR_Coverage, 2341,
6656 : GIR_Done,
6657 : // Label 505: @13777
6658 : GIM_Try, /*On fail goto*//*Label 506*/ 13829, // Rule ID 2351 //
6659 : GIM_CheckFeatures, GIFBS_UseSSSE3,
6660 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_b_128,
6661 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
6662 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
6663 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
6664 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6665 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6666 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6667 : // (intrinsic_wo_chain:{ *:[v16i8] } 6585:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2) => (PSIGNBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2)
6668 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNBrr,
6669 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6670 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6671 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6672 : GIR_EraseFromParent, /*InsnID*/0,
6673 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6674 : // GIR_Coverage, 2351,
6675 : GIR_Done,
6676 : // Label 506: @13829
6677 : GIM_Try, /*On fail goto*//*Label 507*/ 13881, // Rule ID 2353 //
6678 : GIM_CheckFeatures, GIFBS_UseSSSE3,
6679 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_w_128,
6680 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6681 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
6682 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
6683 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6684 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6685 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6686 : // (intrinsic_wo_chain:{ *:[v8i16] } 6589:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PSIGNWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6687 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNWrr,
6688 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6689 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6690 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6691 : GIR_EraseFromParent, /*InsnID*/0,
6692 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6693 : // GIR_Coverage, 2353,
6694 : GIR_Done,
6695 : // Label 507: @13881
6696 : GIM_Try, /*On fail goto*//*Label 508*/ 13933, // Rule ID 2355 //
6697 : GIM_CheckFeatures, GIFBS_UseSSSE3,
6698 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_psign_d_128,
6699 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6700 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6701 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6702 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6703 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6704 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6705 : // (intrinsic_wo_chain:{ *:[v4i32] } 6587:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (PSIGNDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6706 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PSIGNDrr,
6707 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6708 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6709 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6710 : GIR_EraseFromParent, /*InsnID*/0,
6711 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6712 : // GIR_Coverage, 2355,
6713 : GIR_Done,
6714 : // Label 508: @13933
6715 : GIM_Try, /*On fail goto*//*Label 509*/ 13985, // Rule ID 2359 //
6716 : GIM_CheckFeatures, GIFBS_UseSSSE3,
6717 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phadd_sw_128,
6718 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6719 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
6720 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
6721 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6722 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6723 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6724 : // (intrinsic_wo_chain:{ *:[v8i16] } 6569:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHADDSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6725 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHADDSWrr,
6726 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6727 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6728 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6729 : GIR_EraseFromParent, /*InsnID*/0,
6730 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6731 : // GIR_Coverage, 2359,
6732 : GIR_Done,
6733 : // Label 509: @13985
6734 : GIM_Try, /*On fail goto*//*Label 510*/ 14037, // Rule ID 2361 //
6735 : GIM_CheckFeatures, GIFBS_UseSSSE3,
6736 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_ssse3_phsub_sw_128,
6737 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
6738 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
6739 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
6740 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6741 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6742 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6743 : // (intrinsic_wo_chain:{ *:[v8i16] } 6575:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2) => (PHSUBSWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2)
6744 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PHSUBSWrr,
6745 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6746 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6747 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6748 : GIR_EraseFromParent, /*InsnID*/0,
6749 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6750 : // GIR_Coverage, 2361,
6751 : GIR_Done,
6752 : // Label 510: @14037
6753 : GIM_Try, /*On fail goto*//*Label 511*/ 14089, // Rule ID 2578 //
6754 : GIM_CheckFeatures, GIFBS_HasSSE42,
6755 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_8,
6756 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
6757 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
6758 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s8,
6759 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
6760 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
6761 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR8RegClassID,
6762 : // (intrinsic_wo_chain:{ *:[i32] } 6543:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2) => (CRC32r32r8:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR8:{ *:[i8] }:$src2)
6763 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r8,
6764 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6765 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6766 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6767 : GIR_EraseFromParent, /*InsnID*/0,
6768 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6769 : // GIR_Coverage, 2578,
6770 : GIR_Done,
6771 : // Label 511: @14089
6772 : GIM_Try, /*On fail goto*//*Label 512*/ 14141, // Rule ID 2580 //
6773 : GIM_CheckFeatures, GIFBS_HasSSE42,
6774 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_16,
6775 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
6776 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
6777 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s16,
6778 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
6779 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
6780 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR16RegClassID,
6781 : // (intrinsic_wo_chain:{ *:[i32] } 6541:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2) => (CRC32r32r16:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR16:{ *:[i16] }:$src2)
6782 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r16,
6783 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6784 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6785 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6786 : GIR_EraseFromParent, /*InsnID*/0,
6787 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6788 : // GIR_Coverage, 2580,
6789 : GIR_Done,
6790 : // Label 512: @14141
6791 : GIM_Try, /*On fail goto*//*Label 513*/ 14193, // Rule ID 2582 //
6792 : GIM_CheckFeatures, GIFBS_HasSSE42,
6793 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_32_32,
6794 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
6795 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
6796 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
6797 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
6798 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
6799 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR32RegClassID,
6800 : // (intrinsic_wo_chain:{ *:[i32] } 6542:{ *:[iPTR] }, GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2) => (CRC32r32r32:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src2)
6801 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r32r32,
6802 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6803 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6804 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6805 : GIR_EraseFromParent, /*InsnID*/0,
6806 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6807 : // GIR_Coverage, 2582,
6808 : GIR_Done,
6809 : // Label 513: @14193
6810 : GIM_Try, /*On fail goto*//*Label 514*/ 14245, // Rule ID 2584 //
6811 : GIM_CheckFeatures, GIFBS_HasSSE42,
6812 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse42_crc32_64_64,
6813 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
6814 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
6815 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s64,
6816 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
6817 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
6818 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::GR64RegClassID,
6819 : // (intrinsic_wo_chain:{ *:[i64] } 6544:{ *:[iPTR] }, GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2) => (CRC32r64r64:{ *:[i64] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src2)
6820 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CRC32r64r64,
6821 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6822 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6823 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6824 : GIR_EraseFromParent, /*InsnID*/0,
6825 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6826 : // GIR_Coverage, 2584,
6827 : GIR_Done,
6828 : // Label 514: @14245
6829 : GIM_Try, /*On fail goto*//*Label 515*/ 14297, // Rule ID 2587 //
6830 : GIM_CheckFeatures, GIFBS_HasSHA,
6831 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1nexte,
6832 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6833 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6834 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6835 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6836 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6837 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6838 : // (intrinsic_wo_chain:{ *:[v4i32] } 6411:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1NEXTErr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6839 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1NEXTErr,
6840 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6841 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6842 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6843 : GIR_EraseFromParent, /*InsnID*/0,
6844 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6845 : // GIR_Coverage, 2587,
6846 : GIR_Done,
6847 : // Label 515: @14297
6848 : GIM_Try, /*On fail goto*//*Label 516*/ 14349, // Rule ID 2589 //
6849 : GIM_CheckFeatures, GIFBS_HasSHA,
6850 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg1,
6851 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6852 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6853 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6854 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6855 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6856 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6857 : // (intrinsic_wo_chain:{ *:[v4i32] } 6409:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6858 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG1rr,
6859 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6860 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6861 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6862 : GIR_EraseFromParent, /*InsnID*/0,
6863 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6864 : // GIR_Coverage, 2589,
6865 : GIR_Done,
6866 : // Label 516: @14349
6867 : GIM_Try, /*On fail goto*//*Label 517*/ 14401, // Rule ID 2591 //
6868 : GIM_CheckFeatures, GIFBS_HasSHA,
6869 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1msg2,
6870 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6871 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6872 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6873 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6874 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6875 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6876 : // (intrinsic_wo_chain:{ *:[v4i32] } 6410:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA1MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6877 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1MSG2rr,
6878 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6879 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6880 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6881 : GIR_EraseFromParent, /*InsnID*/0,
6882 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6883 : // GIR_Coverage, 2591,
6884 : GIR_Done,
6885 : // Label 517: @14401
6886 : GIM_Try, /*On fail goto*//*Label 518*/ 14453, // Rule ID 2595 //
6887 : GIM_CheckFeatures, GIFBS_HasSHA,
6888 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg1,
6889 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6890 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6891 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6892 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6893 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6894 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6895 : // (intrinsic_wo_chain:{ *:[v4i32] } 6413:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG1rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6896 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG1rr,
6897 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6898 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6899 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6900 : GIR_EraseFromParent, /*InsnID*/0,
6901 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6902 : // GIR_Coverage, 2595,
6903 : GIR_Done,
6904 : // Label 518: @14453
6905 : GIM_Try, /*On fail goto*//*Label 519*/ 14505, // Rule ID 2597 //
6906 : GIM_CheckFeatures, GIFBS_HasSHA,
6907 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha256msg2,
6908 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
6909 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
6910 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
6911 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6912 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6913 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6914 : // (intrinsic_wo_chain:{ *:[v4i32] } 6414:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (SHA256MSG2rr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
6915 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA256MSG2rr,
6916 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6917 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6918 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6919 : GIR_EraseFromParent, /*InsnID*/0,
6920 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6921 : // GIR_Coverage, 2597,
6922 : GIR_Done,
6923 : // Label 519: @14505
6924 : GIM_Try, /*On fail goto*//*Label 520*/ 14557, // Rule ID 2599 //
6925 : GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES,
6926 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc,
6927 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6928 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6929 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
6930 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6931 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6932 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6933 : // (intrinsic_wo_chain:{ *:[v2i64] } 5481:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
6934 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCrr,
6935 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6936 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6937 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6938 : GIR_EraseFromParent, /*InsnID*/0,
6939 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6940 : // GIR_Coverage, 2599,
6941 : GIR_Done,
6942 : // Label 520: @14557
6943 : GIM_Try, /*On fail goto*//*Label 521*/ 14609, // Rule ID 2601 //
6944 : GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES,
6945 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast,
6946 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6947 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6948 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
6949 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6950 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6951 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6952 : // (intrinsic_wo_chain:{ *:[v2i64] } 5484:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
6953 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTrr,
6954 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6955 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6956 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6957 : GIR_EraseFromParent, /*InsnID*/0,
6958 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6959 : // GIR_Coverage, 2601,
6960 : GIR_Done,
6961 : // Label 521: @14609
6962 : GIM_Try, /*On fail goto*//*Label 522*/ 14661, // Rule ID 2603 //
6963 : GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES,
6964 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec,
6965 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6966 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6967 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
6968 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6969 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6970 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6971 : // (intrinsic_wo_chain:{ *:[v2i64] } 5475:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
6972 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECrr,
6973 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6974 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6975 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6976 : GIR_EraseFromParent, /*InsnID*/0,
6977 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6978 : // GIR_Coverage, 2603,
6979 : GIR_Done,
6980 : // Label 522: @14661
6981 : GIM_Try, /*On fail goto*//*Label 523*/ 14713, // Rule ID 2605 //
6982 : GIM_CheckFeatures, GIFBS_HasAES_HasAVX_NoVLX_Or_NoVAES,
6983 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast,
6984 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
6985 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
6986 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
6987 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
6988 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
6989 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
6990 : // (intrinsic_wo_chain:{ *:[v2i64] } 5478:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VAESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
6991 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTrr,
6992 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
6993 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
6994 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
6995 : GIR_EraseFromParent, /*InsnID*/0,
6996 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
6997 : // GIR_Coverage, 2605,
6998 : GIR_Done,
6999 : // Label 523: @14713
7000 : GIM_Try, /*On fail goto*//*Label 524*/ 14765, // Rule ID 2607 //
7001 : GIM_CheckFeatures, GIFBS_HasVAES_NoVLX,
7002 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256,
7003 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7004 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7005 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7006 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7007 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7008 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7009 : // (intrinsic_wo_chain:{ *:[v4i64] } 5482:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
7010 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCYrr,
7011 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7012 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7013 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7014 : GIR_EraseFromParent, /*InsnID*/0,
7015 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7016 : // GIR_Coverage, 2607,
7017 : GIR_Done,
7018 : // Label 524: @14765
7019 : GIM_Try, /*On fail goto*//*Label 525*/ 14817, // Rule ID 2609 //
7020 : GIM_CheckFeatures, GIFBS_HasVAES_NoVLX,
7021 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256,
7022 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7023 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7024 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7025 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7026 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7027 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7028 : // (intrinsic_wo_chain:{ *:[v4i64] } 5485:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESENCLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
7029 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTYrr,
7030 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7031 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7032 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7033 : GIR_EraseFromParent, /*InsnID*/0,
7034 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7035 : // GIR_Coverage, 2609,
7036 : GIR_Done,
7037 : // Label 525: @14817
7038 : GIM_Try, /*On fail goto*//*Label 526*/ 14869, // Rule ID 2611 //
7039 : GIM_CheckFeatures, GIFBS_HasVAES_NoVLX,
7040 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256,
7041 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7042 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7043 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7044 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7045 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7046 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7047 : // (intrinsic_wo_chain:{ *:[v4i64] } 5476:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
7048 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECYrr,
7049 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7050 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7051 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7052 : GIR_EraseFromParent, /*InsnID*/0,
7053 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7054 : // GIR_Coverage, 2611,
7055 : GIR_Done,
7056 : // Label 526: @14869
7057 : GIM_Try, /*On fail goto*//*Label 527*/ 14921, // Rule ID 2613 //
7058 : GIM_CheckFeatures, GIFBS_HasVAES_NoVLX,
7059 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256,
7060 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7061 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7062 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7063 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7064 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7065 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7066 : // (intrinsic_wo_chain:{ *:[v4i64] } 5479:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VAESDECLASTYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
7067 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTYrr,
7068 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7069 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7070 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7071 : GIR_EraseFromParent, /*InsnID*/0,
7072 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7073 : // GIR_Coverage, 2613,
7074 : GIR_Done,
7075 : // Label 527: @14921
7076 : GIM_Try, /*On fail goto*//*Label 528*/ 14973, // Rule ID 2615 //
7077 : GIM_CheckFeatures, GIFBS_HasAES_NoAVX,
7078 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc,
7079 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7080 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7081 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7082 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7083 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7084 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7085 : // (intrinsic_wo_chain:{ *:[v2i64] } 5481:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
7086 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCrr,
7087 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7088 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7089 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7090 : GIR_EraseFromParent, /*InsnID*/0,
7091 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7092 : // GIR_Coverage, 2615,
7093 : GIR_Done,
7094 : // Label 528: @14973
7095 : GIM_Try, /*On fail goto*//*Label 529*/ 15025, // Rule ID 2617 //
7096 : GIM_CheckFeatures, GIFBS_HasAES_NoAVX,
7097 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast,
7098 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7099 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7100 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7101 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7102 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7103 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7104 : // (intrinsic_wo_chain:{ *:[v2i64] } 5484:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESENCLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
7105 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESENCLASTrr,
7106 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7107 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7108 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7109 : GIR_EraseFromParent, /*InsnID*/0,
7110 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7111 : // GIR_Coverage, 2617,
7112 : GIR_Done,
7113 : // Label 529: @15025
7114 : GIM_Try, /*On fail goto*//*Label 530*/ 15077, // Rule ID 2619 //
7115 : GIM_CheckFeatures, GIFBS_HasAES_NoAVX,
7116 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec,
7117 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7118 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7119 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7120 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7121 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7122 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7123 : // (intrinsic_wo_chain:{ *:[v2i64] } 5475:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
7124 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECrr,
7125 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7126 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7127 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7128 : GIR_EraseFromParent, /*InsnID*/0,
7129 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7130 : // GIR_Coverage, 2619,
7131 : GIR_Done,
7132 : // Label 530: @15077
7133 : GIM_Try, /*On fail goto*//*Label 531*/ 15129, // Rule ID 2621 //
7134 : GIM_CheckFeatures, GIFBS_HasAES_NoAVX,
7135 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast,
7136 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7137 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7138 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7139 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7140 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7141 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7142 : // (intrinsic_wo_chain:{ *:[v2i64] } 5478:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (AESDECLASTrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
7143 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AESDECLASTrr,
7144 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7145 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7146 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7147 : GIR_EraseFromParent, /*InsnID*/0,
7148 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7149 : // GIR_Coverage, 2621,
7150 : GIR_Done,
7151 : // Label 531: @15129
7152 : GIM_Try, /*On fail goto*//*Label 532*/ 15181, // Rule ID 2638 //
7153 : GIM_CheckFeatures, GIFBS_HasSSE4A,
7154 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_extrq,
7155 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7156 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7157 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
7158 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7159 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7160 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7161 : // (intrinsic_wo_chain:{ *:[v2i64] } 6559:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask) => (EXTRQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v16i8] }:$mask)
7162 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::EXTRQ,
7163 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7164 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
7165 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask
7166 : GIR_EraseFromParent, /*InsnID*/0,
7167 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7168 : // GIR_Coverage, 2638,
7169 : GIR_Done,
7170 : // Label 532: @15181
7171 : GIM_Try, /*On fail goto*//*Label 533*/ 15233, // Rule ID 2640 //
7172 : GIM_CheckFeatures, GIFBS_HasSSE4A,
7173 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse4a_insertq,
7174 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7175 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7176 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7177 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7178 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7179 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7180 : // (intrinsic_wo_chain:{ *:[v2i64] } 6561:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask) => (INSERTQ:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src, VR128:{ *:[v2i64] }:$mask)
7181 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INSERTQ,
7182 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7183 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
7184 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // mask
7185 : GIR_EraseFromParent, /*InsnID*/0,
7186 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7187 : // GIR_Coverage, 2640,
7188 : GIR_Done,
7189 : // Label 533: @15233
7190 : GIM_Try, /*On fail goto*//*Label 534*/ 15285, // Rule ID 11162 //
7191 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7192 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc,
7193 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7194 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7195 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7196 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
7197 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
7198 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID,
7199 : // (intrinsic_wo_chain:{ *:[v2i64] } 5481:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
7200 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ128rr,
7201 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7202 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7203 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7204 : GIR_EraseFromParent, /*InsnID*/0,
7205 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7206 : // GIR_Coverage, 11162,
7207 : GIR_Done,
7208 : // Label 534: @15285
7209 : GIM_Try, /*On fail goto*//*Label 535*/ 15337, // Rule ID 11164 //
7210 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7211 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_256,
7212 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7213 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7214 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7215 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
7216 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
7217 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID,
7218 : // (intrinsic_wo_chain:{ *:[v4i64] } 5482:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
7219 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZ256rr,
7220 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7221 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7222 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7223 : GIR_EraseFromParent, /*InsnID*/0,
7224 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7225 : // GIR_Coverage, 11164,
7226 : GIR_Done,
7227 : // Label 535: @15337
7228 : GIM_Try, /*On fail goto*//*Label 536*/ 15389, // Rule ID 11166 //
7229 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES,
7230 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenc_512,
7231 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
7232 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
7233 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64,
7234 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
7235 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
7236 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
7237 : // (intrinsic_wo_chain:{ *:[v8i64] } 5483:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
7238 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCZrr,
7239 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7240 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7241 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7242 : GIR_EraseFromParent, /*InsnID*/0,
7243 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7244 : // GIR_Coverage, 11166,
7245 : GIR_Done,
7246 : // Label 536: @15389
7247 : GIM_Try, /*On fail goto*//*Label 537*/ 15441, // Rule ID 11168 //
7248 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7249 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast,
7250 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7251 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7252 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7253 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
7254 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
7255 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID,
7256 : // (intrinsic_wo_chain:{ *:[v2i64] } 5484:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESENCLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
7257 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ128rr,
7258 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7259 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7260 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7261 : GIR_EraseFromParent, /*InsnID*/0,
7262 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7263 : // GIR_Coverage, 11168,
7264 : GIR_Done,
7265 : // Label 537: @15441
7266 : GIM_Try, /*On fail goto*//*Label 538*/ 15493, // Rule ID 11170 //
7267 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7268 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_256,
7269 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7270 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7271 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7272 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
7273 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
7274 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID,
7275 : // (intrinsic_wo_chain:{ *:[v4i64] } 5485:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESENCLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
7276 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZ256rr,
7277 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7278 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7279 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7280 : GIR_EraseFromParent, /*InsnID*/0,
7281 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7282 : // GIR_Coverage, 11170,
7283 : GIR_Done,
7284 : // Label 538: @15493
7285 : GIM_Try, /*On fail goto*//*Label 539*/ 15545, // Rule ID 11172 //
7286 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES,
7287 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesenclast_512,
7288 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
7289 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
7290 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64,
7291 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
7292 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
7293 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
7294 : // (intrinsic_wo_chain:{ *:[v8i64] } 5486:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESENCLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
7295 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESENCLASTZrr,
7296 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7297 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7298 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7299 : GIR_EraseFromParent, /*InsnID*/0,
7300 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7301 : // GIR_Coverage, 11172,
7302 : GIR_Done,
7303 : // Label 539: @15545
7304 : GIM_Try, /*On fail goto*//*Label 540*/ 15597, // Rule ID 11174 //
7305 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7306 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec,
7307 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7308 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7309 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7310 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
7311 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
7312 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID,
7313 : // (intrinsic_wo_chain:{ *:[v2i64] } 5475:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
7314 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ128rr,
7315 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7316 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7317 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7318 : GIR_EraseFromParent, /*InsnID*/0,
7319 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7320 : // GIR_Coverage, 11174,
7321 : GIR_Done,
7322 : // Label 540: @15597
7323 : GIM_Try, /*On fail goto*//*Label 541*/ 15649, // Rule ID 11176 //
7324 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7325 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_256,
7326 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7327 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7328 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7329 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
7330 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
7331 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID,
7332 : // (intrinsic_wo_chain:{ *:[v4i64] } 5476:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
7333 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZ256rr,
7334 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7335 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7336 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7337 : GIR_EraseFromParent, /*InsnID*/0,
7338 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7339 : // GIR_Coverage, 11176,
7340 : GIR_Done,
7341 : // Label 541: @15649
7342 : GIM_Try, /*On fail goto*//*Label 542*/ 15701, // Rule ID 11178 //
7343 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES,
7344 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdec_512,
7345 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
7346 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
7347 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64,
7348 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
7349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
7350 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
7351 : // (intrinsic_wo_chain:{ *:[v8i64] } 5477:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
7352 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECZrr,
7353 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7354 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7355 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7356 : GIR_EraseFromParent, /*InsnID*/0,
7357 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7358 : // GIR_Coverage, 11178,
7359 : GIR_Done,
7360 : // Label 542: @15701
7361 : GIM_Try, /*On fail goto*//*Label 543*/ 15753, // Rule ID 11180 //
7362 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7363 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast,
7364 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7365 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7366 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7367 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
7368 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
7369 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID,
7370 : // (intrinsic_wo_chain:{ *:[v2i64] } 5478:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VAESDECLASTZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
7371 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ128rr,
7372 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7373 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7374 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7375 : GIR_EraseFromParent, /*InsnID*/0,
7376 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7377 : // GIR_Coverage, 11180,
7378 : GIR_Done,
7379 : // Label 543: @15753
7380 : GIM_Try, /*On fail goto*//*Label 544*/ 15805, // Rule ID 11182 //
7381 : GIM_CheckFeatures, GIFBS_HasVAES_HasVLX,
7382 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_256,
7383 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7384 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7385 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7386 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
7387 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
7388 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID,
7389 : // (intrinsic_wo_chain:{ *:[v4i64] } 5479:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VAESDECLASTZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
7390 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZ256rr,
7391 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7392 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7393 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7394 : GIR_EraseFromParent, /*InsnID*/0,
7395 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7396 : // GIR_Coverage, 11182,
7397 : GIR_Done,
7398 : // Label 544: @15805
7399 : GIM_Try, /*On fail goto*//*Label 545*/ 15857, // Rule ID 11184 //
7400 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVAES,
7401 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_aesni_aesdeclast_512,
7402 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
7403 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
7404 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64,
7405 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
7406 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
7407 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
7408 : // (intrinsic_wo_chain:{ *:[v8i64] } 5480:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VAESDECLASTZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
7409 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VAESDECLASTZrr,
7410 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7411 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7412 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7413 : GIR_EraseFromParent, /*InsnID*/0,
7414 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7415 : // GIR_Coverage, 11184,
7416 : GIR_Done,
7417 : // Label 545: @15857
7418 : GIM_Reject,
7419 : // Label 487: @15858
7420 : GIM_Try, /*On fail goto*//*Label 546*/ 18308,
7421 : GIM_CheckNumOperands, /*MI*/0, /*Expected*/5,
7422 : GIM_Try, /*On fail goto*//*Label 547*/ 15931, // Rule ID 1455 //
7423 : GIM_CheckFeatures, GIFBS_HasAVX,
7424 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss,
7425 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7426 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
7427 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
7428 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7429 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7430 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7431 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7432 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7433 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7434 : // MIs[1] Operand 1
7435 : // No operand predicates
7436 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7437 : // (intrinsic_wo_chain:{ *:[v4f32] } 6418:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc) => (VCMPSSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc)
7438 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCMPSSrr_Int,
7439 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7440 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7441 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
7442 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
7443 : GIR_EraseFromParent, /*InsnID*/0,
7444 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7445 : // GIR_Coverage, 1455,
7446 : GIR_Done,
7447 : // Label 547: @15931
7448 : GIM_Try, /*On fail goto*//*Label 548*/ 15999, // Rule ID 1457 //
7449 : GIM_CheckFeatures, GIFBS_HasAVX,
7450 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd,
7451 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7452 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7453 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7454 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7455 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7456 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7457 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7458 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7459 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7460 : // MIs[1] Operand 1
7461 : // No operand predicates
7462 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7463 : // (intrinsic_wo_chain:{ *:[v2f64] } 6456:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc) => (VCMPSDrr_Int:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc)
7464 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCMPSDrr_Int,
7465 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7466 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7467 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
7468 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
7469 : GIR_EraseFromParent, /*InsnID*/0,
7470 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7471 : // GIR_Coverage, 1457,
7472 : GIR_Done,
7473 : // Label 548: @15999
7474 : GIM_Try, /*On fail goto*//*Label 549*/ 16067, // Rule ID 1459 //
7475 : GIM_CheckFeatures, GIFBS_UseSSE1,
7476 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse_cmp_ss,
7477 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7478 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
7479 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
7480 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7481 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7482 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7483 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7484 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7485 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7486 : // MIs[1] Operand 1
7487 : // No operand predicates
7488 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7489 : // (intrinsic_wo_chain:{ *:[v4f32] } 6418:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc) => (CMPSSrr_Int:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src, (imm:{ *:[i8] }):$cc)
7490 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CMPSSrr_Int,
7491 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7492 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7493 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
7494 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
7495 : GIR_EraseFromParent, /*InsnID*/0,
7496 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7497 : // GIR_Coverage, 1459,
7498 : GIR_Done,
7499 : // Label 549: @16067
7500 : GIM_Try, /*On fail goto*//*Label 550*/ 16135, // Rule ID 1461 //
7501 : GIM_CheckFeatures, GIFBS_UseSSE2,
7502 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse2_cmp_sd,
7503 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7504 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7505 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7506 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7507 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7508 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7509 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7510 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7511 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7512 : // MIs[1] Operand 1
7513 : // No operand predicates
7514 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7515 : // (intrinsic_wo_chain:{ *:[v2f64] } 6456:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc) => (CMPSDrr_Int:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src, (imm:{ *:[i8] }):$cc)
7516 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::CMPSDrr_Int,
7517 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7518 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7519 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src
7520 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cc
7521 : GIR_EraseFromParent, /*InsnID*/0,
7522 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7523 : // GIR_Coverage, 1461,
7524 : GIR_Done,
7525 : // Label 550: @16135
7526 : GIM_Try, /*On fail goto*//*Label 551*/ 16203, // Rule ID 2519 //
7527 : GIM_CheckFeatures, GIFBS_HasAVX,
7528 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw,
7529 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
7530 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
7531 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
7532 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7533 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7534 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7535 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7536 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7537 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7538 : // MIs[1] Operand 1
7539 : // No operand predicates
7540 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7541 : // (intrinsic_wo_chain:{ *:[v8i16] } 6530:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3) => (VMPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3)
7542 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWrri,
7543 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7544 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7545 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7546 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7547 : GIR_EraseFromParent, /*InsnID*/0,
7548 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7549 : // GIR_Coverage, 2519,
7550 : GIR_Done,
7551 : // Label 551: @16203
7552 : GIM_Try, /*On fail goto*//*Label 552*/ 16271, // Rule ID 2521 //
7553 : GIM_CheckFeatures, GIFBS_HasAVX,
7554 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps,
7555 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7556 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
7557 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
7558 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7559 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7560 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7561 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7562 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7563 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7564 : // MIs[1] Operand 1
7565 : // No operand predicates
7566 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7567 : // (intrinsic_wo_chain:{ *:[v4f32] } 6528:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3) => (VDPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3)
7568 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSrri,
7569 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7570 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7571 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7572 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7573 : GIR_EraseFromParent, /*InsnID*/0,
7574 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7575 : // GIR_Coverage, 2521,
7576 : GIR_Done,
7577 : // Label 552: @16271
7578 : GIM_Try, /*On fail goto*//*Label 553*/ 16339, // Rule ID 2523 //
7579 : GIM_CheckFeatures, GIFBS_HasAVX,
7580 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd,
7581 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7582 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7583 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7584 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7585 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7586 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7587 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7588 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7589 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7590 : // MIs[1] Operand 1
7591 : // No operand predicates
7592 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7593 : // (intrinsic_wo_chain:{ *:[v2f64] } 6527:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3) => (VDPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3)
7594 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPDrri,
7595 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7596 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7597 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7598 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7599 : GIR_EraseFromParent, /*InsnID*/0,
7600 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7601 : // GIR_Coverage, 2523,
7602 : GIR_Done,
7603 : // Label 553: @16339
7604 : GIM_Try, /*On fail goto*//*Label 554*/ 16407, // Rule ID 2525 //
7605 : GIM_CheckFeatures, GIFBS_HasAVX,
7606 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_dp_ps_256,
7607 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
7608 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
7609 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32,
7610 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7611 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7612 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7613 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7614 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7615 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7616 : // MIs[1] Operand 1
7617 : // No operand predicates
7618 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7619 : // (intrinsic_wo_chain:{ *:[v8f32] } 5500:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (imm:{ *:[i8] }):$src3) => (VDPPSYrri:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, (imm:{ *:[i8] }):$src3)
7620 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VDPPSYrri,
7621 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7622 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7623 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7624 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7625 : GIR_EraseFromParent, /*InsnID*/0,
7626 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7627 : // GIR_Coverage, 2525,
7628 : GIR_Done,
7629 : // Label 554: @16407
7630 : GIM_Try, /*On fail goto*//*Label 555*/ 16475, // Rule ID 2527 //
7631 : GIM_CheckFeatures, GIFBS_HasAVX2,
7632 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_mpsadbw,
7633 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s16,
7634 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
7635 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8,
7636 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7637 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7638 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7639 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7640 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7641 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7642 : // MIs[1] Operand 1
7643 : // No operand predicates
7644 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7645 : // (intrinsic_wo_chain:{ *:[v16i16] } 5569:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (imm:{ *:[i8] }):$src3) => (VMPSADBWYrri:{ *:[v16i16] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, (imm:{ *:[i8] }):$src3)
7646 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VMPSADBWYrri,
7647 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7648 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7649 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7650 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7651 : GIR_EraseFromParent, /*InsnID*/0,
7652 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7653 : // GIR_Coverage, 2527,
7654 : GIR_Done,
7655 : // Label 555: @16475
7656 : GIM_Try, /*On fail goto*//*Label 556*/ 16543, // Rule ID 2529 //
7657 : GIM_CheckFeatures, GIFBS_UseSSE41,
7658 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_mpsadbw,
7659 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
7660 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
7661 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
7662 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7663 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7664 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7665 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7666 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7667 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7668 : // MIs[1] Operand 1
7669 : // No operand predicates
7670 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7671 : // (intrinsic_wo_chain:{ *:[v8i16] } 6530:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3) => (MPSADBWrri:{ *:[v8i16] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, (imm:{ *:[i8] }):$src3)
7672 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MPSADBWrri,
7673 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7674 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7675 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7676 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7677 : GIR_EraseFromParent, /*InsnID*/0,
7678 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7679 : // GIR_Coverage, 2529,
7680 : GIR_Done,
7681 : // Label 556: @16543
7682 : GIM_Try, /*On fail goto*//*Label 557*/ 16611, // Rule ID 2531 //
7683 : GIM_CheckFeatures, GIFBS_UseSSE41,
7684 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dpps,
7685 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7686 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
7687 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
7688 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7689 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7690 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7691 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7692 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7693 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7694 : // MIs[1] Operand 1
7695 : // No operand predicates
7696 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7697 : // (intrinsic_wo_chain:{ *:[v4f32] } 6528:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3) => (DPPSrri:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, (imm:{ *:[i8] }):$src3)
7698 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPSrri,
7699 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7700 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7701 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7702 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7703 : GIR_EraseFromParent, /*InsnID*/0,
7704 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7705 : // GIR_Coverage, 2531,
7706 : GIR_Done,
7707 : // Label 557: @16611
7708 : GIM_Try, /*On fail goto*//*Label 558*/ 16679, // Rule ID 2533 //
7709 : GIM_CheckFeatures, GIFBS_UseSSE41,
7710 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_dppd,
7711 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7712 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7713 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7714 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7715 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7716 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7717 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7718 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7719 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7720 : // MIs[1] Operand 1
7721 : // No operand predicates
7722 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7723 : // (intrinsic_wo_chain:{ *:[v2f64] } 6527:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3) => (DPPDrri:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, (imm:{ *:[i8] }):$src3)
7724 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::DPPDrri,
7725 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7726 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7727 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7728 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7729 : GIR_EraseFromParent, /*InsnID*/0,
7730 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7731 : // GIR_Coverage, 2533,
7732 : GIR_Done,
7733 : // Label 558: @16679
7734 : GIM_Try, /*On fail goto*//*Label 559*/ 16747, // Rule ID 2585 //
7735 : GIM_CheckFeatures, GIFBS_HasSHA,
7736 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sha1rnds4,
7737 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7738 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
7739 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
7740 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7741 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7742 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7743 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7744 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7745 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7746 : // MIs[1] Operand 1
7747 : // No operand predicates
7748 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7749 : // (intrinsic_wo_chain:{ *:[v4i32] } 6412:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (imm:{ *:[i8] }):$src3) => (SHA1RNDS4rri:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, (imm:{ *:[i8] }):$src3)
7750 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHA1RNDS4rri,
7751 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7752 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7753 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7754 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7755 : GIR_EraseFromParent, /*InsnID*/0,
7756 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7757 : // GIR_Coverage, 2585,
7758 : GIR_Done,
7759 : // Label 559: @16747
7760 : GIM_Try, /*On fail goto*//*Label 560*/ 16815, // Rule ID 2631 //
7761 : GIM_CheckFeatures, GIFBS_HasPCLMUL_NoAVX,
7762 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq,
7763 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7764 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7765 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7766 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7767 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7768 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7769 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7770 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7771 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7772 : // MIs[1] Operand 1
7773 : // No operand predicates
7774 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7775 : // (intrinsic_wo_chain:{ *:[v2i64] } 6380:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) => (PCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3)
7776 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PCLMULQDQrr,
7777 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7778 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7779 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7780 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7781 : GIR_EraseFromParent, /*InsnID*/0,
7782 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7783 : // GIR_Coverage, 2631,
7784 : GIR_Done,
7785 : // Label 560: @16815
7786 : GIM_Try, /*On fail goto*//*Label 561*/ 16883, // Rule ID 2633 //
7787 : GIM_CheckFeatures, GIFBS_HasAVX_HasPCLMUL_NoVLX_Or_NoVPCLMULQDQ,
7788 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq,
7789 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7790 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7791 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7792 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7793 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7794 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7795 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7796 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7797 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7798 : // MIs[1] Operand 1
7799 : // No operand predicates
7800 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7801 : // (intrinsic_wo_chain:{ *:[v2i64] } 6380:{ *:[iPTR] }, VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3)
7802 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQrr,
7803 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7804 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7805 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7806 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7807 : GIR_EraseFromParent, /*InsnID*/0,
7808 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7809 : // GIR_Coverage, 2633,
7810 : GIR_Done,
7811 : // Label 561: @16883
7812 : GIM_Try, /*On fail goto*//*Label 562*/ 16951, // Rule ID 2635 //
7813 : GIM_CheckFeatures, GIFBS_HasVPCLMULQDQ_NoVLX,
7814 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256,
7815 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7816 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7817 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7818 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7819 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
7820 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
7821 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
7822 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7823 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7824 : // MIs[1] Operand 1
7825 : // No operand predicates
7826 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7827 : // (intrinsic_wo_chain:{ *:[v4i64] } 6381:{ *:[iPTR] }, VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3)
7828 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQYrr,
7829 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7830 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7831 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7832 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7833 : GIR_EraseFromParent, /*InsnID*/0,
7834 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7835 : // GIR_Coverage, 2635,
7836 : GIR_Done,
7837 : // Label 562: @16951
7838 : GIM_Try, /*On fail goto*//*Label 563*/ 17019, // Rule ID 11186 //
7839 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVPCLMULQDQ,
7840 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_512,
7841 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s64,
7842 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
7843 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s64,
7844 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7845 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
7846 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
7847 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR512RegClassID,
7848 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7849 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7850 : // MIs[1] Operand 1
7851 : // No operand predicates
7852 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7853 : // (intrinsic_wo_chain:{ *:[v8i64] } 6382:{ *:[iPTR] }, VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2, (imm:{ *:[i8] }):$src3)
7854 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZrr,
7855 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7856 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7857 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7858 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7859 : GIR_EraseFromParent, /*InsnID*/0,
7860 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7861 : // GIR_Coverage, 11186,
7862 : GIR_Done,
7863 : // Label 563: @17019
7864 : GIM_Try, /*On fail goto*//*Label 564*/ 17087, // Rule ID 11188 //
7865 : GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ,
7866 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq,
7867 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
7868 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
7869 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
7870 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7871 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
7872 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
7873 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128XRegClassID,
7874 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7875 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7876 : // MIs[1] Operand 1
7877 : // No operand predicates
7878 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7879 : // (intrinsic_wo_chain:{ *:[v2i64] } 6380:{ *:[iPTR] }, VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2, (imm:{ *:[i8] }):$src3)
7880 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ128rr,
7881 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7882 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7883 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7884 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7885 : GIR_EraseFromParent, /*InsnID*/0,
7886 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7887 : // GIR_Coverage, 11188,
7888 : GIR_Done,
7889 : // Label 564: @17087
7890 : GIM_Try, /*On fail goto*//*Label 565*/ 17155, // Rule ID 11190 //
7891 : GIM_CheckFeatures, GIFBS_HasVLX_HasVPCLMULQDQ,
7892 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_pclmulqdq_256,
7893 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
7894 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
7895 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
7896 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_s8,
7897 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
7898 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
7899 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256XRegClassID,
7900 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/4, // MIs[1]
7901 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
7902 : // MIs[1] Operand 1
7903 : // No operand predicates
7904 : GIM_CheckIsSafeToFold, /*InsnID*/1,
7905 : // (intrinsic_wo_chain:{ *:[v4i64] } 6381:{ *:[iPTR] }, VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3) => (VPCLMULQDQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2, (imm:{ *:[i8] }):$src3)
7906 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPCLMULQDQZ256rr,
7907 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7908 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7909 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7910 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src3
7911 : GIR_EraseFromParent, /*InsnID*/0,
7912 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7913 : // GIR_Coverage, 11190,
7914 : GIR_Done,
7915 : // Label 565: @17155
7916 : GIM_Try, /*On fail goto*//*Label 566*/ 17219, // Rule ID 1215 //
7917 : GIM_CheckFeatures, GIFBS_HasXOP,
7918 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcswd,
7919 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7920 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
7921 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
7922 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
7923 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7924 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7925 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7926 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
7927 : // (intrinsic_wo_chain:{ *:[v4i32] } 6669:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
7928 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSWDrr,
7929 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7930 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7931 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7932 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
7933 : GIR_EraseFromParent, /*InsnID*/0,
7934 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7935 : // GIR_Coverage, 1215,
7936 : GIR_Done,
7937 : // Label 566: @17219
7938 : GIM_Try, /*On fail goto*//*Label 567*/ 17283, // Rule ID 1217 //
7939 : GIM_CheckFeatures, GIFBS_HasXOP,
7940 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmadcsswd,
7941 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7942 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
7943 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
7944 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
7945 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7946 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7947 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7948 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
7949 : // (intrinsic_wo_chain:{ *:[v4i32] } 6668:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMADCSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
7950 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMADCSSWDrr,
7951 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7952 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7953 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7954 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
7955 : GIR_EraseFromParent, /*InsnID*/0,
7956 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7957 : // GIR_Coverage, 1217,
7958 : GIR_Done,
7959 : // Label 567: @17283
7960 : GIM_Try, /*On fail goto*//*Label 568*/ 17347, // Rule ID 1219 //
7961 : GIM_CheckFeatures, GIFBS_HasXOP,
7962 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsww,
7963 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
7964 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
7965 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
7966 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16,
7967 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7968 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7969 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7970 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
7971 : // (intrinsic_wo_chain:{ *:[v8i16] } 6667:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
7972 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWWrr,
7973 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7974 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7975 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7976 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
7977 : GIR_EraseFromParent, /*InsnID*/0,
7978 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
7979 : // GIR_Coverage, 1219,
7980 : GIR_Done,
7981 : // Label 568: @17347
7982 : GIM_Try, /*On fail goto*//*Label 569*/ 17411, // Rule ID 1221 //
7983 : GIM_CheckFeatures, GIFBS_HasXOP,
7984 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacswd,
7985 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
7986 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
7987 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
7988 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
7989 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
7990 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
7991 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
7992 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
7993 : // (intrinsic_wo_chain:{ *:[v4i32] } 6666:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
7994 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSWDrr,
7995 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
7996 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
7997 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
7998 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
7999 : GIR_EraseFromParent, /*InsnID*/0,
8000 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8001 : // GIR_Coverage, 1221,
8002 : GIR_Done,
8003 : // Label 569: @17411
8004 : GIM_Try, /*On fail goto*//*Label 570*/ 17475, // Rule ID 1223 //
8005 : GIM_CheckFeatures, GIFBS_HasXOP,
8006 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssww,
8007 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s16,
8008 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
8009 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
8010 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s16,
8011 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8012 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8013 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8014 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8015 : // (intrinsic_wo_chain:{ *:[v8i16] } 6665:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3) => (VPMACSSWWrr:{ *:[v8i16] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v8i16] }:$src3)
8016 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWWrr,
8017 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8018 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8019 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8020 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8021 : GIR_EraseFromParent, /*InsnID*/0,
8022 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8023 : // GIR_Coverage, 1223,
8024 : GIR_Done,
8025 : // Label 570: @17475
8026 : GIM_Try, /*On fail goto*//*Label 571*/ 17539, // Rule ID 1225 //
8027 : GIM_CheckFeatures, GIFBS_HasXOP,
8028 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsswd,
8029 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
8030 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
8031 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s16,
8032 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
8033 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8034 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8035 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8036 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8037 : // (intrinsic_wo_chain:{ *:[v4i32] } 6664:{ *:[iPTR] }, VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSWDrr:{ *:[v4i32] } VR128:{ *:[v8i16] }:$src1, VR128:{ *:[v8i16] }:$src2, VR128:{ *:[v4i32] }:$src3)
8038 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSWDrr,
8039 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8040 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8041 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8042 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8043 : GIR_EraseFromParent, /*InsnID*/0,
8044 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8045 : // GIR_Coverage, 1225,
8046 : GIR_Done,
8047 : // Label 571: @17539
8048 : GIM_Try, /*On fail goto*//*Label 572*/ 17603, // Rule ID 1227 //
8049 : GIM_CheckFeatures, GIFBS_HasXOP,
8050 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdql,
8051 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
8052 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8053 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8054 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
8055 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8056 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8057 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8058 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8059 : // (intrinsic_wo_chain:{ *:[v2i64] } 6663:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
8060 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQLrr,
8061 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8062 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8063 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8064 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8065 : GIR_EraseFromParent, /*InsnID*/0,
8066 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8067 : // GIR_Coverage, 1227,
8068 : GIR_Done,
8069 : // Label 572: @17603
8070 : GIM_Try, /*On fail goto*//*Label 573*/ 17667, // Rule ID 1229 //
8071 : GIM_CheckFeatures, GIFBS_HasXOP,
8072 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdqh,
8073 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
8074 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8075 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8076 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
8077 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8078 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8079 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8080 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8081 : // (intrinsic_wo_chain:{ *:[v2i64] } 6662:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
8082 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDQHrr,
8083 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8084 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8085 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8086 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8087 : GIR_EraseFromParent, /*InsnID*/0,
8088 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8089 : // GIR_Coverage, 1229,
8090 : GIR_Done,
8091 : // Label 573: @17667
8092 : GIM_Try, /*On fail goto*//*Label 574*/ 17731, // Rule ID 1231 //
8093 : GIM_CheckFeatures, GIFBS_HasXOP,
8094 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacssdd,
8095 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
8096 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8097 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8098 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
8099 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8100 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8101 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8102 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8103 : // (intrinsic_wo_chain:{ *:[v4i32] } 6661:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
8104 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSSDDrr,
8105 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8106 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8107 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8108 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8109 : GIR_EraseFromParent, /*InsnID*/0,
8110 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8111 : // GIR_Coverage, 1231,
8112 : GIR_Done,
8113 : // Label 574: @17731
8114 : GIM_Try, /*On fail goto*//*Label 575*/ 17795, // Rule ID 1233 //
8115 : GIM_CheckFeatures, GIFBS_HasXOP,
8116 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdql,
8117 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
8118 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8119 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8120 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
8121 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8122 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8123 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8124 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8125 : // (intrinsic_wo_chain:{ *:[v2i64] } 6660:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQLrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
8126 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQLrr,
8127 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8128 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8129 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8130 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8131 : GIR_EraseFromParent, /*InsnID*/0,
8132 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8133 : // GIR_Coverage, 1233,
8134 : GIR_Done,
8135 : // Label 575: @17795
8136 : GIM_Try, /*On fail goto*//*Label 576*/ 17859, // Rule ID 1235 //
8137 : GIM_CheckFeatures, GIFBS_HasXOP,
8138 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdqh,
8139 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
8140 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8141 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8142 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
8143 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8144 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8145 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8146 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8147 : // (intrinsic_wo_chain:{ *:[v2i64] } 6659:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3) => (VPMACSDQHrr:{ *:[v2i64] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v2i64] }:$src3)
8148 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDQHrr,
8149 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8150 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8151 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8152 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8153 : GIR_EraseFromParent, /*InsnID*/0,
8154 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8155 : // GIR_Coverage, 1235,
8156 : GIR_Done,
8157 : // Label 576: @17859
8158 : GIM_Try, /*On fail goto*//*Label 577*/ 17923, // Rule ID 1237 //
8159 : GIM_CheckFeatures, GIFBS_HasXOP,
8160 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xop_vpmacsdd,
8161 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
8162 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8163 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8164 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
8165 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8166 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8167 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8168 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8169 : // (intrinsic_wo_chain:{ *:[v4i32] } 6658:{ *:[iPTR] }, VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3) => (VPMACSDDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2, VR128:{ *:[v4i32] }:$src3)
8170 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMACSDDrr,
8171 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8172 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8173 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8174 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8175 : GIR_EraseFromParent, /*InsnID*/0,
8176 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8177 : // GIR_Coverage, 1237,
8178 : GIR_Done,
8179 : // Label 577: @17923
8180 : GIM_Try, /*On fail goto*//*Label 578*/ 17987, // Rule ID 2553 //
8181 : GIM_CheckFeatures, GIFBS_HasAVX,
8182 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_blendvpd,
8183 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v2s64,
8184 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
8185 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v2s64,
8186 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v2s64,
8187 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8188 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8189 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8190 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8191 : // (intrinsic_wo_chain:{ *:[v2f64] } 6525:{ *:[iPTR] }, VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3) => (VBLENDVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2, VR128:{ *:[v2f64] }:$src3)
8192 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPDrr,
8193 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8194 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8195 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8196 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8197 : GIR_EraseFromParent, /*InsnID*/0,
8198 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8199 : // GIR_Coverage, 2553,
8200 : GIR_Done,
8201 : // Label 578: @17987
8202 : GIM_Try, /*On fail goto*//*Label 579*/ 18051, // Rule ID 2555 //
8203 : GIM_CheckFeatures, GIFBS_HasAVX,
8204 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_blendv_pd_256,
8205 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s64,
8206 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
8207 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s64,
8208 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s64,
8209 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
8210 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
8211 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
8212 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID,
8213 : // (intrinsic_wo_chain:{ *:[v4f64] } 5491:{ *:[iPTR] }, VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3) => (VBLENDVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2, VR256:{ *:[v4f64] }:$src3)
8214 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPDYrr,
8215 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8216 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8217 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8218 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8219 : GIR_EraseFromParent, /*InsnID*/0,
8220 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8221 : // GIR_Coverage, 2555,
8222 : GIR_Done,
8223 : // Label 579: @18051
8224 : GIM_Try, /*On fail goto*//*Label 580*/ 18115, // Rule ID 2557 //
8225 : GIM_CheckFeatures, GIFBS_HasAVX,
8226 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_blendvps,
8227 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v4s32,
8228 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
8229 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v4s32,
8230 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v4s32,
8231 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8232 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8233 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8234 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8235 : // (intrinsic_wo_chain:{ *:[v4f32] } 6526:{ *:[iPTR] }, VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3) => (VBLENDVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2, VR128:{ *:[v4f32] }:$src3)
8236 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPSrr,
8237 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8238 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8239 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8240 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8241 : GIR_EraseFromParent, /*InsnID*/0,
8242 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8243 : // GIR_Coverage, 2557,
8244 : GIR_Done,
8245 : // Label 580: @18115
8246 : GIM_Try, /*On fail goto*//*Label 581*/ 18179, // Rule ID 2559 //
8247 : GIM_CheckFeatures, GIFBS_HasAVX,
8248 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx_blendv_ps_256,
8249 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v8s32,
8250 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
8251 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v8s32,
8252 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v8s32,
8253 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
8254 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
8255 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
8256 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID,
8257 : // (intrinsic_wo_chain:{ *:[v8f32] } 5492:{ *:[iPTR] }, VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3) => (VBLENDVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2, VR256:{ *:[v8f32] }:$src3)
8258 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VBLENDVPSYrr,
8259 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8260 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8261 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8262 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8263 : GIR_EraseFromParent, /*InsnID*/0,
8264 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8265 : // GIR_Coverage, 2559,
8266 : GIR_Done,
8267 : // Label 581: @18179
8268 : GIM_Try, /*On fail goto*//*Label 582*/ 18243, // Rule ID 2561 //
8269 : GIM_CheckFeatures, GIFBS_HasAVX,
8270 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_sse41_pblendvb,
8271 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v16s8,
8272 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s8,
8273 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v16s8,
8274 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v16s8,
8275 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
8276 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
8277 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR128RegClassID,
8278 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR128RegClassID,
8279 : // (intrinsic_wo_chain:{ *:[v16i8] } 6532:{ *:[iPTR] }, VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, VR128:{ *:[v16i8] }:$src3) => (VPBLENDVBrr:{ *:[v16i8] } VR128:{ *:[v16i8] }:$src1, VR128:{ *:[v16i8] }:$src2, VR128:{ *:[v16i8] }:$src3)
8280 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPBLENDVBrr,
8281 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8282 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8283 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8284 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8285 : GIR_EraseFromParent, /*InsnID*/0,
8286 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8287 : // GIR_Coverage, 2561,
8288 : GIR_Done,
8289 : // Label 582: @18243
8290 : GIM_Try, /*On fail goto*//*Label 583*/ 18307, // Rule ID 2563 //
8291 : GIM_CheckFeatures, GIFBS_HasAVX2,
8292 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_avx2_pblendvb,
8293 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_v32s8,
8294 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s8,
8295 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_v32s8,
8296 : GIM_CheckType, /*MI*/0, /*Op*/4, /*Type*/GILLT_v32s8,
8297 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
8298 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
8299 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/3, /*RC*/X86::VR256RegClassID,
8300 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/4, /*RC*/X86::VR256RegClassID,
8301 : // (intrinsic_wo_chain:{ *:[v32i8] } 5576:{ *:[iPTR] }, VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, VR256:{ *:[v32i8] }:$src3) => (VPBLENDVBYrr:{ *:[v32i8] } VR256:{ *:[v32i8] }:$src1, VR256:{ *:[v32i8] }:$src2, VR256:{ *:[v32i8] }:$src3)
8302 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPBLENDVBYrr,
8303 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8304 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8305 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/3, // src2
8306 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/4, // src3
8307 : GIR_EraseFromParent, /*InsnID*/0,
8308 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8309 : // GIR_Coverage, 2563,
8310 : GIR_Done,
8311 : // Label 583: @18307
8312 : GIM_Reject,
8313 : // Label 546: @18308
8314 : GIM_Reject,
8315 : // Label 8: @18309
8316 : GIM_Try, /*On fail goto*//*Label 584*/ 18327, // Rule ID 1789 //
8317 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_pause,
8318 : // (intrinsic_void 6486:{ *:[iPTR] }) => (PAUSE)
8319 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PAUSE,
8320 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8321 : GIR_EraseFromParent, /*InsnID*/0,
8322 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8323 : // GIR_Coverage, 1789,
8324 : GIR_Done,
8325 : // Label 584: @18327
8326 : GIM_Try, /*On fail goto*//*Label 585*/ 18347, // Rule ID 1790 //
8327 : GIM_CheckFeatures, GIFBS_HasSSE1,
8328 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse_sfence,
8329 : // (intrinsic_void 6446:{ *:[iPTR] }) => (SFENCE)
8330 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SFENCE,
8331 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8332 : GIR_EraseFromParent, /*InsnID*/0,
8333 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8334 : // GIR_Coverage, 1790,
8335 : GIR_Done,
8336 : // Label 585: @18347
8337 : GIM_Try, /*On fail goto*//*Label 586*/ 18367, // Rule ID 1791 //
8338 : GIM_CheckFeatures, GIFBS_HasSSE2,
8339 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_lfence,
8340 : // (intrinsic_void 6473:{ *:[iPTR] }) => (LFENCE)
8341 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LFENCE,
8342 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8343 : GIR_EraseFromParent, /*InsnID*/0,
8344 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8345 : // GIR_Coverage, 1791,
8346 : GIR_Done,
8347 : // Label 586: @18367
8348 : GIM_Try, /*On fail goto*//*Label 587*/ 18387, // Rule ID 1792 //
8349 : GIM_CheckFeatures, GIFBS_HasMFence,
8350 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_sse2_mfence,
8351 : // (intrinsic_void 6477:{ *:[iPTR] }) => (MFENCE)
8352 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MFENCE,
8353 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8354 : GIR_EraseFromParent, /*InsnID*/0,
8355 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8356 : // GIR_Coverage, 1792,
8357 : GIR_Done,
8358 : // Label 587: @18387
8359 : GIM_Try, /*On fail goto*//*Label 588*/ 18407, // Rule ID 2673 //
8360 : GIM_CheckFeatures, GIFBS_HasAVX,
8361 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroall,
8362 : // (intrinsic_void 5543:{ *:[iPTR] }) => (VZEROALL)
8363 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROALL,
8364 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8365 : GIR_EraseFromParent, /*InsnID*/0,
8366 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8367 : // GIR_Coverage, 2673,
8368 : GIR_Done,
8369 : // Label 588: @18407
8370 : GIM_Try, /*On fail goto*//*Label 589*/ 18427, // Rule ID 2674 //
8371 : GIM_CheckFeatures, GIFBS_HasAVX,
8372 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_avx_vzeroupper,
8373 : // (intrinsic_void 5544:{ *:[iPTR] }) => (VZEROUPPER)
8374 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VZEROUPPER,
8375 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8376 : GIR_EraseFromParent, /*InsnID*/0,
8377 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8378 : // GIR_Coverage, 2674,
8379 : GIR_Done,
8380 : // Label 589: @18427
8381 : GIM_Try, /*On fail goto*//*Label 590*/ 18447, // Rule ID 11762 //
8382 : GIM_CheckFeatures, GIFBS_HasMMX,
8383 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_emms,
8384 : // (intrinsic_void 6306:{ *:[iPTR] }) => (MMX_EMMS)
8385 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MMX_EMMS,
8386 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8387 : GIR_EraseFromParent, /*InsnID*/0,
8388 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8389 : // GIR_Coverage, 11762,
8390 : GIR_Done,
8391 : // Label 590: @18447
8392 : GIM_Try, /*On fail goto*//*Label 591*/ 18467, // Rule ID 11981 //
8393 : GIM_CheckFeatures, GIFBS_Has3DNow,
8394 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_mmx_femms,
8395 : // (intrinsic_void 6307:{ *:[iPTR] }) => (FEMMS)
8396 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::FEMMS,
8397 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8398 : GIR_EraseFromParent, /*InsnID*/0,
8399 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8400 : // GIR_Coverage, 11981,
8401 : GIR_Done,
8402 : // Label 591: @18467
8403 : GIM_Try, /*On fail goto*//*Label 592*/ 18487, // Rule ID 11996 //
8404 : GIM_CheckFeatures, GIFBS_HasRTM,
8405 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xend,
8406 : // (intrinsic_void 6623:{ *:[iPTR] }) => (XEND)
8407 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XEND,
8408 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8409 : GIR_EraseFromParent, /*InsnID*/0,
8410 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8411 : // GIR_Coverage, 11996,
8412 : GIR_Done,
8413 : // Label 592: @18487
8414 : GIM_Try, /*On fail goto*//*Label 593*/ 18505, // Rule ID 12005 //
8415 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbinvd,
8416 : // (intrinsic_void 6610:{ *:[iPTR] }) => (WBINVD)
8417 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBINVD,
8418 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8419 : GIR_EraseFromParent, /*InsnID*/0,
8420 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8421 : // GIR_Coverage, 12005,
8422 : GIR_Done,
8423 : // Label 593: @18505
8424 : GIM_Try, /*On fail goto*//*Label 594*/ 18525, // Rule ID 12006 //
8425 : GIM_CheckFeatures, GIFBS_HasWBNOINVD,
8426 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wbnoinvd,
8427 : // (intrinsic_void 6611:{ *:[iPTR] }) => (WBNOINVD)
8428 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WBNOINVD,
8429 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8430 : GIR_EraseFromParent, /*InsnID*/0,
8431 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8432 : // GIR_Coverage, 12006,
8433 : GIR_Done,
8434 : // Label 594: @18525
8435 : GIM_Try, /*On fail goto*//*Label 595*/ 18543, // Rule ID 12011 //
8436 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_saveprevssp,
8437 : // (intrinsic_void 6403:{ *:[iPTR] }) => (SAVEPREVSSP)
8438 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAVEPREVSSP,
8439 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8440 : GIR_EraseFromParent, /*InsnID*/0,
8441 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8442 : // GIR_Coverage, 12011,
8443 : GIR_Done,
8444 : // Label 595: @18543
8445 : GIM_Try, /*On fail goto*//*Label 596*/ 18561, // Rule ID 12017 //
8446 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_setssbsy,
8447 : // (intrinsic_void 6408:{ *:[iPTR] }) => (SETSSBSY)
8448 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SETSSBSY,
8449 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8450 : GIR_EraseFromParent, /*InsnID*/0,
8451 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8452 : // GIR_Coverage, 12017,
8453 : GIR_Done,
8454 : // Label 596: @18561
8455 : GIM_Try, /*On fail goto*//*Label 597*/ 19521,
8456 : GIM_CheckNumOperands, /*MI*/0, /*Expected*/2,
8457 : GIM_Try, /*On fail goto*//*Label 598*/ 18592, // Rule ID 12002 //
8458 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int,
8459 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
8460 : GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 3,
8461 : // (intrinsic_void 6299:{ *:[iPTR] }, 3:{ *:[i8] }) => (INT3)
8462 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT3,
8463 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8464 : GIR_EraseFromParent, /*InsnID*/0,
8465 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8466 : // GIR_Coverage, 12002,
8467 : GIR_Done,
8468 : // Label 598: @18592
8469 : GIM_Try, /*On fail goto*//*Label 599*/ 18629, // Rule ID 11998 //
8470 : GIM_CheckFeatures, GIFBS_HasRTM,
8471 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_xabort,
8472 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
8473 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8474 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
8475 : // MIs[1] Operand 1
8476 : // No operand predicates
8477 : GIM_CheckIsSafeToFold, /*InsnID*/1,
8478 : // (intrinsic_void 6621:{ *:[iPTR] }, (imm:{ *:[i8] }):$imm) => (XABORT (imm:{ *:[i8] }):$imm)
8479 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XABORT,
8480 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // imm
8481 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
8482 : GIR_EraseFromParent, /*InsnID*/0,
8483 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8484 : // GIR_Coverage, 11998,
8485 : GIR_Done,
8486 : // Label 599: @18629
8487 : GIM_Try, /*On fail goto*//*Label 600*/ 18664, // Rule ID 12003 //
8488 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_int,
8489 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
8490 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8491 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
8492 : // MIs[1] Operand 1
8493 : // No operand predicates
8494 : GIM_CheckIsSafeToFold, /*InsnID*/1,
8495 : // (intrinsic_void 6299:{ *:[iPTR] }, (imm:{ *:[i8] }):$trap) => (INT (imm:{ *:[i8] }):$trap)
8496 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INT,
8497 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // trap
8498 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
8499 : GIR_EraseFromParent, /*InsnID*/0,
8500 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8501 : // GIR_Coverage, 12003,
8502 : GIR_Done,
8503 : // Label 600: @18664
8504 : GIM_Try, /*On fail goto*//*Label 601*/ 18696, // Rule ID 1 //
8505 : GIM_CheckFeatures, GIFBS_Not64BitMode,
8506 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u32,
8507 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8508 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8509 : // (intrinsic_w_chain:{ *:[i32] } 6289:{ *:[iPTR] }) => (RDFLAGS32:{ *:[i32] }:{ *:[i32] })
8510 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS32,
8511 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8512 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8513 : GIR_EraseFromParent, /*InsnID*/0,
8514 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8515 : // GIR_Coverage, 1,
8516 : GIR_Done,
8517 : // Label 601: @18696
8518 : GIM_Try, /*On fail goto*//*Label 602*/ 18728, // Rule ID 2 //
8519 : GIM_CheckFeatures, GIFBS_In64BitMode,
8520 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_flags_read_u64,
8521 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
8522 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
8523 : // (intrinsic_w_chain:{ *:[i64] } 6290:{ *:[iPTR] }) => (RDFLAGS64:{ *:[i64] }:{ *:[i32] })
8524 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFLAGS64,
8525 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8526 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8527 : GIR_EraseFromParent, /*InsnID*/0,
8528 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8529 : // GIR_Coverage, 2,
8530 : GIR_Done,
8531 : // Label 602: @18728
8532 : GIM_Try, /*On fail goto*//*Label 603*/ 18760, // Rule ID 95 //
8533 : GIM_CheckFeatures, GIFBS_HasLWP,
8534 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb,
8535 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8536 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8537 : // (intrinsic_w_chain:{ *:[i32] } 6416:{ *:[iPTR] }) => (SLWPCB:{ *:[i32] })
8538 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB,
8539 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8540 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8541 : GIR_EraseFromParent, /*InsnID*/0,
8542 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8543 : // GIR_Coverage, 95,
8544 : GIR_Done,
8545 : // Label 603: @18760
8546 : GIM_Try, /*On fail goto*//*Label 604*/ 18792, // Rule ID 97 //
8547 : GIM_CheckFeatures, GIFBS_HasLWP,
8548 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_slwpcb,
8549 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
8550 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
8551 : // (intrinsic_w_chain:{ *:[i64] } 6416:{ *:[iPTR] }) => (SLWPCB64:{ *:[i64] })
8552 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SLWPCB64,
8553 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8554 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8555 : GIR_EraseFromParent, /*InsnID*/0,
8556 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8557 : // GIR_Coverage, 97,
8558 : GIR_Done,
8559 : // Label 604: @18792
8560 : GIM_Try, /*On fail goto*//*Label 605*/ 18824, // Rule ID 11995 //
8561 : GIM_CheckFeatures, GIFBS_HasRTM,
8562 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_xbegin,
8563 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8564 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8565 : // (intrinsic_w_chain:{ *:[i32] } 6622:{ *:[iPTR] }) => (XBEGIN:{ *:[i32] })
8566 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::XBEGIN,
8567 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8568 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8569 : GIR_EraseFromParent, /*InsnID*/0,
8570 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8571 : // GIR_Coverage, 11995,
8572 : GIR_Done,
8573 : // Label 605: @18824
8574 : GIM_Try, /*On fail goto*//*Label 606*/ 18854, // Rule ID 12033 //
8575 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpkru,
8576 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8577 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8578 : // (intrinsic_w_chain:{ *:[i32] } 6390:{ *:[iPTR] }) => (RDPKRU:{ *:[i32] })
8579 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDPKRU,
8580 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8581 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8582 : GIR_EraseFromParent, /*InsnID*/0,
8583 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8584 : // GIR_Coverage, 12033,
8585 : GIR_Done,
8586 : // Label 606: @18854
8587 : GIM_Try, /*On fail goto*//*Label 607*/ 18886, // Rule ID 12034 //
8588 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8589 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_32,
8590 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8591 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8592 : // (intrinsic_w_chain:{ *:[i32] } 6385:{ *:[iPTR] }) => (RDFSBASE:{ *:[i32] })
8593 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE,
8594 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8595 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8596 : GIR_EraseFromParent, /*InsnID*/0,
8597 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8598 : // GIR_Coverage, 12034,
8599 : GIR_Done,
8600 : // Label 607: @18886
8601 : GIM_Try, /*On fail goto*//*Label 608*/ 18918, // Rule ID 12035 //
8602 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8603 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdfsbase_64,
8604 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
8605 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
8606 : // (intrinsic_w_chain:{ *:[i64] } 6386:{ *:[iPTR] }) => (RDFSBASE64:{ *:[i64] })
8607 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDFSBASE64,
8608 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8609 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8610 : GIR_EraseFromParent, /*InsnID*/0,
8611 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8612 : // GIR_Coverage, 12035,
8613 : GIR_Done,
8614 : // Label 608: @18918
8615 : GIM_Try, /*On fail goto*//*Label 609*/ 18950, // Rule ID 12036 //
8616 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8617 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_32,
8618 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8619 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8620 : // (intrinsic_w_chain:{ *:[i32] } 6387:{ *:[iPTR] }) => (RDGSBASE:{ *:[i32] })
8621 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE,
8622 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8623 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8624 : GIR_EraseFromParent, /*InsnID*/0,
8625 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8626 : // GIR_Coverage, 12036,
8627 : GIR_Done,
8628 : // Label 609: @18950
8629 : GIM_Try, /*On fail goto*//*Label 610*/ 18982, // Rule ID 12037 //
8630 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8631 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdgsbase_64,
8632 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
8633 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
8634 : // (intrinsic_w_chain:{ *:[i64] } 6388:{ *:[iPTR] }) => (RDGSBASE64:{ *:[i64] })
8635 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDGSBASE64,
8636 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8637 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8638 : GIR_EraseFromParent, /*InsnID*/0,
8639 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8640 : // GIR_Coverage, 12037,
8641 : GIR_Done,
8642 : // Label 610: @18982
8643 : GIM_Try, /*On fail goto*//*Label 611*/ 19014, // Rule ID 12043 //
8644 : GIM_CheckFeatures, GIFBS_HasRDPID_Not64BitMode,
8645 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdpid,
8646 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8647 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8648 : // (intrinsic_w_chain:{ *:[i32] } 6389:{ *:[iPTR] }) => (RDPID32:{ *:[i32] })
8649 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDPID32,
8650 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8651 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8652 : GIR_EraseFromParent, /*InsnID*/0,
8653 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8654 : // GIR_Coverage, 12043,
8655 : GIR_Done,
8656 : // Label 611: @19014
8657 : GIM_Try, /*On fail goto*//*Label 612*/ 19046, // Rule ID 3 //
8658 : GIM_CheckFeatures, GIFBS_Not64BitMode,
8659 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u32,
8660 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8661 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8662 : // (intrinsic_void 6291:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFLAGS32:{ *:[i32] } GR32:{ *:[i32] }:$src)
8663 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS32,
8664 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8665 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8666 : GIR_EraseFromParent, /*InsnID*/0,
8667 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8668 : // GIR_Coverage, 3,
8669 : GIR_Done,
8670 : // Label 612: @19046
8671 : GIM_Try, /*On fail goto*//*Label 613*/ 19078, // Rule ID 4 //
8672 : GIM_CheckFeatures, GIFBS_In64BitMode,
8673 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_flags_write_u64,
8674 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8675 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8676 : // (intrinsic_void 6292:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFLAGS64:{ *:[i64] } GR64:{ *:[i64] }:$src)
8677 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFLAGS64,
8678 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8679 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8680 : GIR_EraseFromParent, /*InsnID*/0,
8681 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8682 : // GIR_Coverage, 4,
8683 : GIR_Done,
8684 : // Label 613: @19078
8685 : GIM_Try, /*On fail goto*//*Label 614*/ 19110, // Rule ID 94 //
8686 : GIM_CheckFeatures, GIFBS_HasLWP,
8687 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb,
8688 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8689 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8690 : // (intrinsic_void 6301:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (LLWPCB GR32:{ *:[i32] }:$src)
8691 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB,
8692 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8693 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8694 : GIR_EraseFromParent, /*InsnID*/0,
8695 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8696 : // GIR_Coverage, 94,
8697 : GIR_Done,
8698 : // Label 614: @19110
8699 : GIM_Try, /*On fail goto*//*Label 615*/ 19142, // Rule ID 96 //
8700 : GIM_CheckFeatures, GIFBS_HasLWP,
8701 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_llwpcb,
8702 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8703 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8704 : // (intrinsic_void 6301:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (LLWPCB64 GR64:{ *:[i64] }:$src)
8705 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LLWPCB64,
8706 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8707 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8708 : GIR_EraseFromParent, /*InsnID*/0,
8709 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8710 : // GIR_Coverage, 96,
8711 : GIR_Done,
8712 : // Label 615: @19142
8713 : GIM_Try, /*On fail goto*//*Label 616*/ 19174, // Rule ID 108 //
8714 : GIM_CheckFeatures, GIFBS_HasWAITPKG_Not64BitMode,
8715 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor,
8716 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
8717 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
8718 : // (intrinsic_void 6595:{ *:[iPTR] }, GR16:{ *:[i16] }:$src) => (UMONITOR16 GR16:{ *:[i16] }:$src)
8719 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR16,
8720 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8721 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8722 : GIR_EraseFromParent, /*InsnID*/0,
8723 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8724 : // GIR_Coverage, 108,
8725 : GIR_Done,
8726 : // Label 616: @19174
8727 : GIM_Try, /*On fail goto*//*Label 617*/ 19206, // Rule ID 109 //
8728 : GIM_CheckFeatures, GIFBS_HasWAITPKG,
8729 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor,
8730 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8731 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8732 : // (intrinsic_void 6595:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (UMONITOR32 GR32:{ *:[i32] }:$src)
8733 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR32,
8734 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8735 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8736 : GIR_EraseFromParent, /*InsnID*/0,
8737 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8738 : // GIR_Coverage, 109,
8739 : GIR_Done,
8740 : // Label 617: @19206
8741 : GIM_Try, /*On fail goto*//*Label 618*/ 19238, // Rule ID 110 //
8742 : GIM_CheckFeatures, GIFBS_HasWAITPKG_In64BitMode,
8743 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_umonitor,
8744 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8745 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8746 : // (intrinsic_void 6595:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (UMONITOR64 GR64:{ *:[i64] }:$src)
8747 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::UMONITOR64,
8748 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8749 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8750 : GIR_EraseFromParent, /*InsnID*/0,
8751 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8752 : // GIR_Coverage, 110,
8753 : GIR_Done,
8754 : // Label 618: @19238
8755 : GIM_Try, /*On fail goto*//*Label 619*/ 19268, // Rule ID 12007 //
8756 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspd,
8757 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8758 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8759 : // (intrinsic_void 6297:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (INCSSPD GR32:{ *:[i32] }:$src)
8760 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPD,
8761 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8762 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8763 : GIR_EraseFromParent, /*InsnID*/0,
8764 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8765 : // GIR_Coverage, 12007,
8766 : GIR_Done,
8767 : // Label 619: @19268
8768 : GIM_Try, /*On fail goto*//*Label 620*/ 19298, // Rule ID 12008 //
8769 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_incsspq,
8770 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8771 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8772 : // (intrinsic_void 6298:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (INCSSPQ GR64:{ *:[i64] }:$src)
8773 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::INCSSPQ,
8774 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8775 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8776 : GIR_EraseFromParent, /*InsnID*/0,
8777 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8778 : // GIR_Coverage, 12008,
8779 : GIR_Done,
8780 : // Label 620: @19298
8781 : GIM_Try, /*On fail goto*//*Label 621*/ 19328, // Rule ID 12032 //
8782 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrpkru,
8783 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8784 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8785 : // (intrinsic_void 6616:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRPKRU GR32:{ *:[i32] }:$src)
8786 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRPKRU,
8787 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8788 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8789 : GIR_EraseFromParent, /*InsnID*/0,
8790 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8791 : // GIR_Coverage, 12032,
8792 : GIR_Done,
8793 : // Label 621: @19328
8794 : GIM_Try, /*On fail goto*//*Label 622*/ 19360, // Rule ID 12038 //
8795 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8796 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_32,
8797 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8798 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8799 : // (intrinsic_void 6612:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRFSBASE GR32:{ *:[i32] }:$src)
8800 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE,
8801 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8802 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8803 : GIR_EraseFromParent, /*InsnID*/0,
8804 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8805 : // GIR_Coverage, 12038,
8806 : GIR_Done,
8807 : // Label 622: @19360
8808 : GIM_Try, /*On fail goto*//*Label 623*/ 19392, // Rule ID 12039 //
8809 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8810 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrfsbase_64,
8811 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8812 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8813 : // (intrinsic_void 6613:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRFSBASE64 GR64:{ *:[i64] }:$src)
8814 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRFSBASE64,
8815 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8816 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8817 : GIR_EraseFromParent, /*InsnID*/0,
8818 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8819 : // GIR_Coverage, 12039,
8820 : GIR_Done,
8821 : // Label 623: @19392
8822 : GIM_Try, /*On fail goto*//*Label 624*/ 19424, // Rule ID 12040 //
8823 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8824 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_32,
8825 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8826 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8827 : // (intrinsic_void 6614:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (WRGSBASE GR32:{ *:[i32] }:$src)
8828 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE,
8829 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8830 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8831 : GIR_EraseFromParent, /*InsnID*/0,
8832 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8833 : // GIR_Coverage, 12040,
8834 : GIR_Done,
8835 : // Label 624: @19424
8836 : GIM_Try, /*On fail goto*//*Label 625*/ 19456, // Rule ID 12041 //
8837 : GIM_CheckFeatures, GIFBS_HasFSGSBase_In64BitMode,
8838 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_wrgsbase_64,
8839 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8840 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8841 : // (intrinsic_void 6615:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (WRGSBASE64 GR64:{ *:[i64] }:$src)
8842 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::WRGSBASE64,
8843 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
8844 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8845 : GIR_EraseFromParent, /*InsnID*/0,
8846 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8847 : // GIR_Coverage, 12041,
8848 : GIR_Done,
8849 : // Label 625: @19456
8850 : GIM_Try, /*On fail goto*//*Label 626*/ 19488, // Rule ID 12046 //
8851 : GIM_CheckFeatures, GIFBS_HasPTWRITE,
8852 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite32,
8853 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8854 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8855 : // (intrinsic_void 6383:{ *:[iPTR] }, GR32:{ *:[i32] }:$dst) => (PTWRITEr GR32:{ *:[i32] }:$dst)
8856 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITEr,
8857 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst
8858 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8859 : GIR_EraseFromParent, /*InsnID*/0,
8860 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8861 : // GIR_Coverage, 12046,
8862 : GIR_Done,
8863 : // Label 626: @19488
8864 : GIM_Try, /*On fail goto*//*Label 627*/ 19520, // Rule ID 12047 //
8865 : GIM_CheckFeatures, GIFBS_HasPTWRITE_In64BitMode,
8866 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_ptwrite64,
8867 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8868 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8869 : // (intrinsic_void 6384:{ *:[iPTR] }, GR64:{ *:[i64] }:$dst) => (PTWRITE64r GR64:{ *:[i64] }:$dst)
8870 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::PTWRITE64r,
8871 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // dst
8872 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8873 : GIR_EraseFromParent, /*InsnID*/0,
8874 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8875 : // GIR_Coverage, 12047,
8876 : GIR_Done,
8877 : // Label 627: @19520
8878 : GIM_Reject,
8879 : // Label 597: @19521
8880 : GIM_Try, /*On fail goto*//*Label 628*/ 19611,
8881 : GIM_CheckNumOperands, /*MI*/0, /*Expected*/3,
8882 : GIM_Try, /*On fail goto*//*Label 629*/ 19568, // Rule ID 12009 //
8883 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspd,
8884 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8885 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
8886 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8887 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
8888 : // (intrinsic_w_chain:{ *:[i32] } 6398:{ *:[iPTR] }, GR32:{ *:[i32] }:$src) => (RDSSPD:{ *:[i32] } GR32:{ *:[i32] }:$src)
8889 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPD,
8890 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8891 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
8892 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8893 : GIR_EraseFromParent, /*InsnID*/0,
8894 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8895 : // GIR_Coverage, 12009,
8896 : GIR_Done,
8897 : // Label 629: @19568
8898 : GIM_Try, /*On fail goto*//*Label 630*/ 19610, // Rule ID 12010 //
8899 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/1, Intrinsic::x86_rdsspq,
8900 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s64,
8901 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
8902 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
8903 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR64RegClassID,
8904 : // (intrinsic_w_chain:{ *:[i64] } 6399:{ *:[iPTR] }, GR64:{ *:[i64] }:$src) => (RDSSPQ:{ *:[i64] } GR64:{ *:[i64] }:$src)
8905 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::RDSSPQ,
8906 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8907 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src
8908 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, GIU_MergeMemOperands_EndOfList,
8909 : GIR_EraseFromParent, /*InsnID*/0,
8910 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8911 : // GIR_Coverage, 12010,
8912 : GIR_Done,
8913 : // Label 630: @19610
8914 : GIM_Reject,
8915 : // Label 628: @19611
8916 : GIM_Try, /*On fail goto*//*Label 631*/ 19739,
8917 : GIM_CheckNumOperands, /*MI*/0, /*Expected*/4,
8918 : GIM_Try, /*On fail goto*//*Label 632*/ 19677, // Rule ID 102 //
8919 : GIM_CheckFeatures, GIFBS_HasLWP,
8920 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval32,
8921 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
8922 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
8923 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
8924 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
8925 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
8926 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
8927 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
8928 : // MIs[1] Operand 1
8929 : // No operand predicates
8930 : GIM_CheckIsSafeToFold, /*InsnID*/1,
8931 : // (intrinsic_void 6304:{ *:[iPTR] }, GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl) => (LWPVAL32rri GR32:{ *:[i32] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl)
8932 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL32rri,
8933 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0
8934 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8935 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cntl
8936 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
8937 : GIR_EraseFromParent, /*InsnID*/0,
8938 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8939 : // GIR_Coverage, 102,
8940 : GIR_Done,
8941 : // Label 632: @19677
8942 : GIM_Try, /*On fail goto*//*Label 633*/ 19738, // Rule ID 104 //
8943 : GIM_CheckFeatures, GIFBS_HasLWP,
8944 : GIM_CheckIntrinsicID, /*MI*/0, /*Op*/0, Intrinsic::x86_lwpval64,
8945 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
8946 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
8947 : GIM_CheckType, /*MI*/0, /*Op*/3, /*Type*/GILLT_s32,
8948 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
8949 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::GR32RegClassID,
8950 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/3, // MIs[1]
8951 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
8952 : // MIs[1] Operand 1
8953 : // No operand predicates
8954 : GIM_CheckIsSafeToFold, /*InsnID*/1,
8955 : // (intrinsic_void 6305:{ *:[iPTR] }, GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl) => (LWPVAL64rri GR64:{ *:[i64] }:$src0, GR32:{ *:[i32] }:$src1, (imm:{ *:[i32] }):$cntl)
8956 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LWPVAL64rri,
8957 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src0
8958 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/2, // src1
8959 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // cntl
8960 : GIR_MergeMemOperands, /*InsnID*/0, /*MergeInsnID's*/0, 1, GIU_MergeMemOperands_EndOfList,
8961 : GIR_EraseFromParent, /*InsnID*/0,
8962 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8963 : // GIR_Coverage, 104,
8964 : GIR_Done,
8965 : // Label 633: @19738
8966 : GIM_Reject,
8967 : // Label 631: @19739
8968 : GIM_Reject,
8969 : // Label 9: @19740
8970 : GIM_Try, /*On fail goto*//*Label 634*/ 19855,
8971 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
8972 : GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/1, 3, /*)*//*default:*//*Label 637*/ 19854,
8973 : /*GILLT_s8*//*Label 635*/ 19754,
8974 : /*GILLT_s16*//*Label 636*/ 19812,
8975 : // Label 635: @19754
8976 : GIM_Try, /*On fail goto*//*Label 638*/ 19811,
8977 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
8978 : GIM_Try, /*On fail goto*//*Label 639*/ 19797, // Rule ID 13697 //
8979 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
8980 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST,
8981 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
8982 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID,
8983 : GIM_CheckIsSafeToFold, /*InsnID*/1,
8984 : // (anyext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK8:{ *:[v8i1] }:$src, GR32:{ *:[i32] })
8985 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
8986 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
8987 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
8988 : GIR_EraseFromParent, /*InsnID*/0,
8989 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/27,
8990 : // GIR_Coverage, 13697,
8991 : GIR_Done,
8992 : // Label 639: @19797
8993 : GIM_Try, /*On fail goto*//*Label 640*/ 19810, // Rule ID 15967 //
8994 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
8995 : // (anyext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src)
8996 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8,
8997 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
8998 : // GIR_Coverage, 15967,
8999 : GIR_Done,
9000 : // Label 640: @19810
9001 : GIM_Reject,
9002 : // Label 638: @19811
9003 : GIM_Reject,
9004 : // Label 636: @19812
9005 : GIM_Try, /*On fail goto*//*Label 641*/ 19853, // Rule ID 13695 //
9006 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9007 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9008 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST,
9009 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
9010 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID,
9011 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9012 : // (anyext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (COPY_TO_REGCLASS:{ *:[i32] } VK16:{ *:[v16i1] }:$src, GR32:{ *:[i32] })
9013 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
9014 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9015 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
9016 : GIR_EraseFromParent, /*InsnID*/0,
9017 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR32*/27,
9018 : // GIR_Coverage, 13695,
9019 : GIR_Done,
9020 : // Label 641: @19853
9021 : GIM_Reject,
9022 : // Label 637: @19854
9023 : GIM_Reject,
9024 : // Label 634: @19855
9025 : GIM_Reject,
9026 : // Label 10: @19856
9027 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 22, /*)*//*default:*//*Label 650*/ 20190,
9028 : /*GILLT_s8*//*Label 642*/ 19883,
9029 : /*GILLT_s16*//*Label 643*/ 19962, 0, 0, 0, 0, 0, 0, 0,
9030 : /*GILLT_v4s32*//*Label 644*/ 20000, 0, 0,
9031 : /*GILLT_v8s16*//*Label 645*/ 20024,
9032 : /*GILLT_v8s32*//*Label 646*/ 20071, 0, 0,
9033 : /*GILLT_v16s8*//*Label 647*/ 20095,
9034 : /*GILLT_v16s16*//*Label 648*/ 20142, 0, 0,
9035 : /*GILLT_v32s8*//*Label 649*/ 20166,
9036 : // Label 642: @19883
9037 : GIM_Try, /*On fail goto*//*Label 651*/ 19922, // Rule ID 16015 //
9038 : GIM_CheckFeatures, GIFBS_In64BitMode,
9039 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
9040 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9041 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
9042 : // (trunc:{ *:[i8] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR32:{ *:[i32] }:$src, sub_8bit:{ *:[i32] })
9043 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
9044 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9045 : GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src
9046 : GIR_EraseFromParent, /*InsnID*/0,
9047 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR8*/0,
9048 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR32*/27,
9049 : // GIR_Coverage, 16015,
9050 : GIR_Done,
9051 : // Label 651: @19922
9052 : GIM_Try, /*On fail goto*//*Label 652*/ 19961, // Rule ID 16016 //
9053 : GIM_CheckFeatures, GIFBS_In64BitMode,
9054 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
9055 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
9056 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
9057 : // (trunc:{ *:[i8] } GR16:{ *:[i16] }:$src) => (EXTRACT_SUBREG:{ *:[i8] } GR16:{ *:[i16] }:$src, sub_8bit:{ *:[i32] })
9058 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
9059 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9060 : GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/1, // src
9061 : GIR_EraseFromParent, /*InsnID*/0,
9062 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR8*/0,
9063 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR16*/6,
9064 : // GIR_Coverage, 16016,
9065 : GIR_Done,
9066 : // Label 652: @19961
9067 : GIM_Reject,
9068 : // Label 643: @19962
9069 : GIM_Try, /*On fail goto*//*Label 653*/ 19999, // Rule ID 16009 //
9070 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
9071 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9072 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
9073 : // (trunc:{ *:[i16] } GR32:{ *:[i32] }:$src) => (EXTRACT_SUBREG:{ *:[i16] } GR32:{ *:[i32] }:$src, sub_16bit:{ *:[i32] })
9074 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
9075 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9076 : GIR_CopySubReg, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, /*SubRegIdx*/4, // src
9077 : GIR_EraseFromParent, /*InsnID*/0,
9078 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC GR16*/6,
9079 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/1, /*RC GR32*/27,
9080 : // GIR_Coverage, 16009,
9081 : GIR_Done,
9082 : // Label 653: @19999
9083 : GIM_Reject,
9084 : // Label 644: @20000
9085 : GIM_Try, /*On fail goto*//*Label 654*/ 20023, // Rule ID 9391 //
9086 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
9087 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
9088 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9089 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
9090 : // (trunc:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src1) => (VPMOVQDZ256rr:{ *:[v4i32] } VR256X:{ *:[v4i64] }:$src1)
9091 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZ256rr,
9092 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9093 : // GIR_Coverage, 9391,
9094 : GIR_Done,
9095 : // Label 654: @20023
9096 : GIM_Reject,
9097 : // Label 645: @20024
9098 : GIM_Try, /*On fail goto*//*Label 655*/ 20047, // Rule ID 9367 //
9099 : GIM_CheckFeatures, GIFBS_HasAVX512,
9100 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
9101 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9102 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
9103 : // (trunc:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src1) => (VPMOVQWZrr:{ *:[v8i16] } VR512:{ *:[v8i64] }:$src1)
9104 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQWZrr,
9105 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9106 : // GIR_Coverage, 9367,
9107 : GIR_Done,
9108 : // Label 655: @20047
9109 : GIM_Try, /*On fail goto*//*Label 656*/ 20070, // Rule ID 9445 //
9110 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
9111 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
9112 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9113 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
9114 : // (trunc:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src1) => (VPMOVDWZ256rr:{ *:[v8i16] } VR256X:{ *:[v8i32] }:$src1)
9115 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr,
9116 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9117 : // GIR_Coverage, 9445,
9118 : GIR_Done,
9119 : // Label 656: @20070
9120 : GIM_Reject,
9121 : // Label 646: @20071
9122 : GIM_Try, /*On fail goto*//*Label 657*/ 20094, // Rule ID 9394 //
9123 : GIM_CheckFeatures, GIFBS_HasAVX512,
9124 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
9125 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9126 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
9127 : // (trunc:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src1) => (VPMOVQDZrr:{ *:[v8i32] } VR512:{ *:[v8i64] }:$src1)
9128 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVQDZrr,
9129 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9130 : // GIR_Coverage, 9394,
9131 : GIR_Done,
9132 : // Label 657: @20094
9133 : GIM_Reject,
9134 : // Label 647: @20095
9135 : GIM_Try, /*On fail goto*//*Label 658*/ 20118, // Rule ID 9421 //
9136 : GIM_CheckFeatures, GIFBS_HasAVX512,
9137 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
9138 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9139 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
9140 : // (trunc:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src1) => (VPMOVDBZrr:{ *:[v16i8] } VR512:{ *:[v16i32] }:$src1)
9141 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDBZrr,
9142 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9143 : // GIR_Coverage, 9421,
9144 : GIR_Done,
9145 : // Label 658: @20118
9146 : GIM_Try, /*On fail goto*//*Label 659*/ 20141, // Rule ID 9472 //
9147 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
9148 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
9149 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9150 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
9151 : // (trunc:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src1) => (VPMOVWBZ256rr:{ *:[v16i8] } VR256X:{ *:[v16i16] }:$src1)
9152 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZ256rr,
9153 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9154 : // GIR_Coverage, 9472,
9155 : GIR_Done,
9156 : // Label 659: @20141
9157 : GIM_Reject,
9158 : // Label 648: @20142
9159 : GIM_Try, /*On fail goto*//*Label 660*/ 20165, // Rule ID 9448 //
9160 : GIM_CheckFeatures, GIFBS_HasAVX512,
9161 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
9162 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9163 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
9164 : // (trunc:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src1) => (VPMOVDWZrr:{ *:[v16i16] } VR512:{ *:[v16i32] }:$src1)
9165 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVDWZrr,
9166 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9167 : // GIR_Coverage, 9448,
9168 : GIR_Done,
9169 : // Label 660: @20165
9170 : GIM_Reject,
9171 : // Label 649: @20166
9172 : GIM_Try, /*On fail goto*//*Label 661*/ 20189, // Rule ID 9475 //
9173 : GIM_CheckFeatures, GIFBS_HasBWI,
9174 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
9175 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9176 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
9177 : // (trunc:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src1) => (VPMOVWBZrr:{ *:[v32i8] } VR512:{ *:[v32i16] }:$src1)
9178 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVWBZrr,
9179 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9180 : // GIR_Coverage, 9475,
9181 : GIR_Done,
9182 : // Label 661: @20189
9183 : GIM_Reject,
9184 : // Label 650: @20190
9185 : GIM_Reject,
9186 : // Label 11: @20191
9187 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 5, /*)*//*default:*//*Label 666*/ 20393,
9188 : /*GILLT_s8*//*Label 662*/ 20201,
9189 : /*GILLT_s16*//*Label 663*/ 20223,
9190 : /*GILLT_s32*//*Label 664*/ 20245,
9191 : /*GILLT_s64*//*Label 665*/ 20342,
9192 : // Label 662: @20201
9193 : GIM_Try, /*On fail goto*//*Label 667*/ 20222, // Rule ID 19 //
9194 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
9195 : // MIs[0] Operand 1
9196 : // No operand predicates
9197 : // (imm:{ *:[i8] }):$src => (MOV8ri:{ *:[i8] } (imm:{ *:[i8] }):$src)
9198 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV8ri,
9199 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9200 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
9201 : GIR_EraseFromParent, /*InsnID*/0,
9202 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9203 : // GIR_Coverage, 19,
9204 : GIR_Done,
9205 : // Label 667: @20222
9206 : GIM_Reject,
9207 : // Label 663: @20223
9208 : GIM_Try, /*On fail goto*//*Label 668*/ 20244, // Rule ID 20 //
9209 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
9210 : // MIs[0] Operand 1
9211 : // No operand predicates
9212 : // (imm:{ *:[i16] }):$src => (MOV16ri:{ *:[i16] } (imm:{ *:[i16] }):$src)
9213 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV16ri,
9214 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9215 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
9216 : GIR_EraseFromParent, /*InsnID*/0,
9217 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9218 : // GIR_Coverage, 20,
9219 : GIR_Done,
9220 : // Label 668: @20244
9221 : GIM_Reject,
9222 : // Label 664: @20245
9223 : GIM_Try, /*On fail goto*//*Label 669*/ 20267, // Rule ID 12065 //
9224 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9225 : // MIs[0] Operand 1
9226 : GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0,
9227 : // 0:{ *:[i32] } => (MOV32r0:{ *:[i32] }:{ *:[i32] })
9228 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r0,
9229 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9230 : GIR_EraseFromParent, /*InsnID*/0,
9231 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9232 : // GIR_Coverage, 12065,
9233 : GIR_Done,
9234 : // Label 669: @20267
9235 : GIM_Try, /*On fail goto*//*Label 670*/ 20291, // Rule ID 12066 //
9236 : GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize,
9237 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9238 : // MIs[0] Operand 1
9239 : GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 1,
9240 : // 1:{ *:[i32] } => (MOV32r1:{ *:[i32] }:{ *:[i32] })
9241 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r1,
9242 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9243 : GIR_EraseFromParent, /*InsnID*/0,
9244 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9245 : // GIR_Coverage, 12066,
9246 : GIR_Done,
9247 : // Label 670: @20291
9248 : GIM_Try, /*On fail goto*//*Label 671*/ 20315, // Rule ID 12067 //
9249 : GIM_CheckFeatures, GIFBS_Not64BitMode_OptForSize,
9250 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9251 : // MIs[0] Operand 1
9252 : GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, -1,
9253 : // -1:{ *:[i32] } => (MOV32r_1:{ *:[i32] }:{ *:[i32] })
9254 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32r_1,
9255 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9256 : GIR_EraseFromParent, /*InsnID*/0,
9257 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9258 : // GIR_Coverage, 12067,
9259 : GIR_Done,
9260 : // Label 671: @20315
9261 : GIM_Try, /*On fail goto*//*Label 672*/ 20341, // Rule ID 12068 //
9262 : GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize,
9263 : GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i32immSExt8,
9264 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9265 : // MIs[0] Operand 1
9266 : // No operand predicates
9267 : // (imm:{ *:[i32] })<<P:Predicate_i32immSExt8>>:$src => (MOV32ImmSExti8:{ *:[i32] } (imm:{ *:[i32] }):$src)
9268 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV32ImmSExti8,
9269 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9270 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
9271 : GIR_EraseFromParent, /*InsnID*/0,
9272 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9273 : // GIR_Coverage, 12068,
9274 : GIR_Done,
9275 : // Label 672: @20341
9276 : GIM_Reject,
9277 : // Label 665: @20342
9278 : GIM_Try, /*On fail goto*//*Label 673*/ 20368, // Rule ID 12069 //
9279 : GIM_CheckFeatures, GIFBS_NotWin64WithoutFP_OptForMinSize,
9280 : GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt8,
9281 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
9282 : // MIs[0] Operand 1
9283 : // No operand predicates
9284 : // (imm:{ *:[i64] })<<P:Predicate_i64immSExt8>>:$src => (MOV64ImmSExti8:{ *:[i64] } (imm:{ *:[i64] }):$src)
9285 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ImmSExti8,
9286 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9287 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
9288 : GIR_EraseFromParent, /*InsnID*/0,
9289 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9290 : // GIR_Coverage, 12069,
9291 : GIR_Done,
9292 : // Label 673: @20368
9293 : GIM_Try, /*On fail goto*//*Label 674*/ 20392, // Rule ID 22 //
9294 : GIM_CheckI64ImmPredicate, /*MI*/0, /*Predicate*/GIPFP_I64_Predicate_i64immSExt32,
9295 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
9296 : // MIs[0] Operand 1
9297 : // No operand predicates
9298 : // (imm:{ *:[i64] })<<P:Predicate_i64immSExt32>>:$src => (MOV64ri32:{ *:[i64] } (imm:{ *:[i64] }):$src)
9299 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::MOV64ri32,
9300 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9301 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/0, // src
9302 : GIR_EraseFromParent, /*InsnID*/0,
9303 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9304 : // GIR_Coverage, 22,
9305 : GIR_Done,
9306 : // Label 674: @20392
9307 : GIM_Reject,
9308 : // Label 666: @20393
9309 : GIM_Reject,
9310 : // Label 12: @20394
9311 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 678*/ 20586,
9312 : /*GILLT_s32*//*Label 675*/ 20403,
9313 : /*GILLT_s64*//*Label 676*/ 20450,
9314 : /*GILLT_s80*//*Label 677*/ 20543,
9315 : // Label 675: @20403
9316 : GIM_Try, /*On fail goto*//*Label 679*/ 20426, // Rule ID 887 //
9317 : GIM_CheckFeatures, GIFBS_FPStackf32,
9318 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
9319 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
9320 : // MIs[0] Operand 1
9321 : // No operand predicates
9322 : // (fpimm:{ *:[f32] })<<P:Predicate_fpimm0>> => (LD_Fp032:{ *:[f32] }:{ *:[i16] })
9323 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp032,
9324 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9325 : GIR_EraseFromParent, /*InsnID*/0,
9326 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9327 : // GIR_Coverage, 887,
9328 : GIR_Done,
9329 : // Label 679: @20426
9330 : GIM_Try, /*On fail goto*//*Label 680*/ 20449, // Rule ID 888 //
9331 : GIM_CheckFeatures, GIFBS_FPStackf32,
9332 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1,
9333 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
9334 : // MIs[0] Operand 1
9335 : // No operand predicates
9336 : // (fpimm:{ *:[f32] })<<P:Predicate_fpimm1>> => (LD_Fp132:{ *:[f32] }:{ *:[i16] })
9337 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp132,
9338 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9339 : GIR_EraseFromParent, /*InsnID*/0,
9340 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9341 : // GIR_Coverage, 888,
9342 : GIR_Done,
9343 : // Label 680: @20449
9344 : GIM_Reject,
9345 : // Label 676: @20450
9346 : GIM_Try, /*On fail goto*//*Label 681*/ 20473, // Rule ID 889 //
9347 : GIM_CheckFeatures, GIFBS_FPStackf64,
9348 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
9349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
9350 : // MIs[0] Operand 1
9351 : // No operand predicates
9352 : // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (LD_Fp064:{ *:[f64] }:{ *:[i16] })
9353 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp064,
9354 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9355 : GIR_EraseFromParent, /*InsnID*/0,
9356 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9357 : // GIR_Coverage, 889,
9358 : GIR_Done,
9359 : // Label 681: @20473
9360 : GIM_Try, /*On fail goto*//*Label 682*/ 20496, // Rule ID 890 //
9361 : GIM_CheckFeatures, GIFBS_FPStackf64,
9362 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1,
9363 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
9364 : // MIs[0] Operand 1
9365 : // No operand predicates
9366 : // (fpimm:{ *:[f64] })<<P:Predicate_fpimm1>> => (LD_Fp164:{ *:[f64] }:{ *:[i16] })
9367 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp164,
9368 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9369 : GIR_EraseFromParent, /*InsnID*/0,
9370 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9371 : // GIR_Coverage, 890,
9372 : GIR_Done,
9373 : // Label 682: @20496
9374 : GIM_Try, /*On fail goto*//*Label 683*/ 20519, // Rule ID 1277 //
9375 : GIM_CheckFeatures, GIFBS_HasSSE2_NoAVX512,
9376 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
9377 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
9378 : // MIs[0] Operand 1
9379 : // No operand predicates
9380 : // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (FsFLD0SD:{ *:[f64] })
9381 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::FsFLD0SD,
9382 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9383 : GIR_EraseFromParent, /*InsnID*/0,
9384 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9385 : // GIR_Coverage, 1277,
9386 : GIR_Done,
9387 : // Label 683: @20519
9388 : GIM_Try, /*On fail goto*//*Label 684*/ 20542, // Rule ID 2780 //
9389 : GIM_CheckFeatures, GIFBS_HasAVX512,
9390 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
9391 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
9392 : // MIs[0] Operand 1
9393 : // No operand predicates
9394 : // (fpimm:{ *:[f64] })<<P:Predicate_fpimm0>> => (AVX512_FsFLD0SD:{ *:[f64] })
9395 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::AVX512_FsFLD0SD,
9396 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9397 : GIR_EraseFromParent, /*InsnID*/0,
9398 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9399 : // GIR_Coverage, 2780,
9400 : GIR_Done,
9401 : // Label 684: @20542
9402 : GIM_Reject,
9403 : // Label 677: @20543
9404 : GIM_Try, /*On fail goto*//*Label 685*/ 20564, // Rule ID 891 //
9405 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm0,
9406 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
9407 : // MIs[0] Operand 1
9408 : // No operand predicates
9409 : // (fpimm:{ *:[f80] })<<P:Predicate_fpimm0>> => (LD_Fp080:{ *:[f80] }:{ *:[i16] })
9410 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp080,
9411 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9412 : GIR_EraseFromParent, /*InsnID*/0,
9413 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9414 : // GIR_Coverage, 891,
9415 : GIR_Done,
9416 : // Label 685: @20564
9417 : GIM_Try, /*On fail goto*//*Label 686*/ 20585, // Rule ID 892 //
9418 : GIM_CheckAPFloatImmPredicate, /*MI*/0, /*Predicate*/GIPFP_APFloat_Predicate_fpimm1,
9419 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
9420 : // MIs[0] Operand 1
9421 : // No operand predicates
9422 : // (fpimm:{ *:[f80] })<<P:Predicate_fpimm1>> => (LD_Fp180:{ *:[f80] }:{ *:[i16] })
9423 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::LD_Fp180,
9424 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9425 : GIR_EraseFromParent, /*InsnID*/0,
9426 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9427 : // GIR_Coverage, 892,
9428 : GIR_Done,
9429 : // Label 686: @20585
9430 : GIM_Reject,
9431 : // Label 678: @20586
9432 : GIM_Reject,
9433 : // Label 13: @20587
9434 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 25, /*)*//*default:*//*Label 701*/ 21129,
9435 : /*GILLT_s32*//*Label 687*/ 20615,
9436 : /*GILLT_s64*//*Label 688*/ 20658, 0, 0, 0,
9437 : /*GILLT_v2s64*//*Label 689*/ 20724, 0,
9438 : /*GILLT_v4s32*//*Label 690*/ 20748,
9439 : /*GILLT_v4s64*//*Label 691*/ 20772, 0,
9440 : /*GILLT_v8s16*//*Label 692*/ 20796,
9441 : /*GILLT_v8s32*//*Label 693*/ 20859,
9442 : /*GILLT_v8s64*//*Label 694*/ 20883, 0,
9443 : /*GILLT_v16s8*//*Label 695*/ 20907,
9444 : /*GILLT_v16s16*//*Label 696*/ 20970,
9445 : /*GILLT_v16s32*//*Label 697*/ 21033, 0,
9446 : /*GILLT_v32s8*//*Label 698*/ 21057,
9447 : /*GILLT_v32s16*//*Label 699*/ 21081, 0,
9448 : /*GILLT_v64s8*//*Label 700*/ 21105,
9449 : // Label 687: @20615
9450 : GIM_Try, /*On fail goto*//*Label 702*/ 20636, // Rule ID 532 //
9451 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
9452 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9453 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
9454 : // (sext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVSX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src)
9455 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr8,
9456 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9457 : // GIR_Coverage, 532,
9458 : GIR_Done,
9459 : // Label 702: @20636
9460 : GIM_Try, /*On fail goto*//*Label 703*/ 20657, // Rule ID 534 //
9461 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
9462 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9463 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
9464 : // (sext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVSX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src)
9465 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX32rr16,
9466 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9467 : // GIR_Coverage, 534,
9468 : GIR_Done,
9469 : // Label 703: @20657
9470 : GIM_Reject,
9471 : // Label 688: @20658
9472 : GIM_Try, /*On fail goto*//*Label 704*/ 20679, // Rule ID 540 //
9473 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
9474 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
9475 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
9476 : // (sext:{ *:[i64] } GR8:{ *:[i8] }:$src) => (MOVSX64rr8:{ *:[i64] } GR8:{ *:[i8] }:$src)
9477 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr8,
9478 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9479 : // GIR_Coverage, 540,
9480 : GIR_Done,
9481 : // Label 704: @20679
9482 : GIM_Try, /*On fail goto*//*Label 705*/ 20700, // Rule ID 542 //
9483 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
9484 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
9485 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
9486 : // (sext:{ *:[i64] } GR16:{ *:[i16] }:$src) => (MOVSX64rr16:{ *:[i64] } GR16:{ *:[i16] }:$src)
9487 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr16,
9488 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9489 : // GIR_Coverage, 542,
9490 : GIR_Done,
9491 : // Label 705: @20700
9492 : GIM_Try, /*On fail goto*//*Label 706*/ 20723, // Rule ID 544 //
9493 : GIM_CheckFeatures, GIFBS_In64BitMode,
9494 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
9495 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
9496 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
9497 : // (sext:{ *:[i64] } GR32:{ *:[i32] }:$src) => (MOVSX64rr32:{ *:[i64] } GR32:{ *:[i32] }:$src)
9498 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVSX64rr32,
9499 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9500 : // GIR_Coverage, 544,
9501 : GIR_Done,
9502 : // Label 706: @20723
9503 : GIM_Reject,
9504 : // Label 689: @20724
9505 : GIM_Try, /*On fail goto*//*Label 707*/ 20747, // Rule ID 9771 //
9506 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
9507 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s1,
9508 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9509 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK2RegClassID,
9510 : // (sext:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src) => (VPMOVM2QZ128rr:{ *:[v2i64] } VK2:{ *:[v2i1] }:$src)
9511 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ128rr,
9512 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9513 : // GIR_Coverage, 9771,
9514 : GIR_Done,
9515 : // Label 707: @20747
9516 : GIM_Reject,
9517 : // Label 690: @20748
9518 : GIM_Try, /*On fail goto*//*Label 708*/ 20771, // Rule ID 9768 //
9519 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
9520 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1,
9521 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9522 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID,
9523 : // (sext:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2DZ128rr:{ *:[v4i32] } VK4:{ *:[v4i1] }:$src)
9524 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ128rr,
9525 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9526 : // GIR_Coverage, 9768,
9527 : GIR_Done,
9528 : // Label 708: @20771
9529 : GIM_Reject,
9530 : // Label 691: @20772
9531 : GIM_Try, /*On fail goto*//*Label 709*/ 20795, // Rule ID 9770 //
9532 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
9533 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s1,
9534 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9535 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK4RegClassID,
9536 : // (sext:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src) => (VPMOVM2QZ256rr:{ *:[v4i64] } VK4:{ *:[v4i1] }:$src)
9537 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZ256rr,
9538 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9539 : // GIR_Coverage, 9770,
9540 : GIR_Done,
9541 : // Label 709: @20795
9542 : GIM_Reject,
9543 : // Label 692: @20796
9544 : GIM_Try, /*On fail goto*//*Label 710*/ 20858,
9545 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
9546 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9547 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
9548 : GIM_Try, /*On fail goto*//*Label 711*/ 20821, // Rule ID 9765 //
9549 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
9550 : // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2WZ128rr:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src)
9551 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ128rr,
9552 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9553 : // GIR_Coverage, 9765,
9554 : GIR_Done,
9555 : // Label 711: @20821
9556 : GIM_Try, /*On fail goto*//*Label 712*/ 20857, // Rule ID 15168 //
9557 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX_NoBWI,
9558 : // (sext:{ *:[v8i16] } VK8:{ *:[v8i1] }:$src) => (VPMOVDWZ256rr:{ *:[v8i16] } (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src))
9559 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v8s32,
9560 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZ256rr,
9561 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
9562 : GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
9563 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9564 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZ256rr,
9565 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9566 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
9567 : GIR_EraseFromParent, /*InsnID*/0,
9568 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9569 : // GIR_Coverage, 15168,
9570 : GIR_Done,
9571 : // Label 712: @20857
9572 : GIM_Reject,
9573 : // Label 710: @20858
9574 : GIM_Reject,
9575 : // Label 693: @20859
9576 : GIM_Try, /*On fail goto*//*Label 713*/ 20882, // Rule ID 9767 //
9577 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
9578 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
9579 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9580 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
9581 : // (sext:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2DZ256rr:{ *:[v8i32] } VK8:{ *:[v8i1] }:$src)
9582 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZ256rr,
9583 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9584 : // GIR_Coverage, 9767,
9585 : GIR_Done,
9586 : // Label 713: @20882
9587 : GIM_Reject,
9588 : // Label 694: @20883
9589 : GIM_Try, /*On fail goto*//*Label 714*/ 20906, // Rule ID 9769 //
9590 : GIM_CheckFeatures, GIFBS_HasDQI,
9591 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s1,
9592 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
9593 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK8RegClassID,
9594 : // (sext:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src) => (VPMOVM2QZrr:{ *:[v8i64] } VK8:{ *:[v8i1] }:$src)
9595 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2QZrr,
9596 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9597 : // GIR_Coverage, 9769,
9598 : GIR_Done,
9599 : // Label 714: @20906
9600 : GIM_Reject,
9601 : // Label 695: @20907
9602 : GIM_Try, /*On fail goto*//*Label 715*/ 20969,
9603 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
9604 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9605 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
9606 : GIM_Try, /*On fail goto*//*Label 716*/ 20932, // Rule ID 9762 //
9607 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
9608 : // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2BZ128rr:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src)
9609 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ128rr,
9610 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9611 : // GIR_Coverage, 9762,
9612 : GIR_Done,
9613 : // Label 716: @20932
9614 : GIM_Try, /*On fail goto*//*Label 717*/ 20968, // Rule ID 15166 //
9615 : GIM_CheckFeatures, GIFBS_HasDQI_NoBWI,
9616 : // (sext:{ *:[v16i8] } VK16:{ *:[v16i1] }:$src) => (VPMOVDBZrr:{ *:[v16i8] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src))
9617 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
9618 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr,
9619 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
9620 : GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
9621 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9622 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDBZrr,
9623 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9624 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
9625 : GIR_EraseFromParent, /*InsnID*/0,
9626 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9627 : // GIR_Coverage, 15166,
9628 : GIR_Done,
9629 : // Label 717: @20968
9630 : GIM_Reject,
9631 : // Label 715: @20969
9632 : GIM_Reject,
9633 : // Label 696: @20970
9634 : GIM_Try, /*On fail goto*//*Label 718*/ 21032,
9635 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
9636 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9637 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
9638 : GIM_Try, /*On fail goto*//*Label 719*/ 20995, // Rule ID 9764 //
9639 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
9640 : // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2WZ256rr:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src)
9641 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZ256rr,
9642 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9643 : // GIR_Coverage, 9764,
9644 : GIR_Done,
9645 : // Label 719: @20995
9646 : GIM_Try, /*On fail goto*//*Label 720*/ 21031, // Rule ID 15167 //
9647 : GIM_CheckFeatures, GIFBS_HasDQI_NoBWI,
9648 : // (sext:{ *:[v16i16] } VK16:{ *:[v16i1] }:$src) => (VPMOVDWZrr:{ *:[v16i16] } (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src))
9649 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_v16s32,
9650 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/X86::VPMOVM2DZrr,
9651 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
9652 : GIR_Copy, /*NewInsnID*/1, /*OldInsnID*/0, /*OpIdx*/1, // src
9653 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
9654 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VPMOVDWZrr,
9655 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9656 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
9657 : GIR_EraseFromParent, /*InsnID*/0,
9658 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9659 : // GIR_Coverage, 15167,
9660 : GIR_Done,
9661 : // Label 720: @21031
9662 : GIM_Reject,
9663 : // Label 718: @21032
9664 : GIM_Reject,
9665 : // Label 697: @21033
9666 : GIM_Try, /*On fail goto*//*Label 721*/ 21056, // Rule ID 9766 //
9667 : GIM_CheckFeatures, GIFBS_HasDQI,
9668 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s1,
9669 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
9670 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK16RegClassID,
9671 : // (sext:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src) => (VPMOVM2DZrr:{ *:[v16i32] } VK16:{ *:[v16i1] }:$src)
9672 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2DZrr,
9673 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9674 : // GIR_Coverage, 9766,
9675 : GIR_Done,
9676 : // Label 721: @21056
9677 : GIM_Reject,
9678 : // Label 698: @21057
9679 : GIM_Try, /*On fail goto*//*Label 722*/ 21080, // Rule ID 9761 //
9680 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
9681 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
9682 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
9683 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
9684 : // (sext:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2BZ256rr:{ *:[v32i8] } VK32:{ *:[v32i1] }:$src)
9685 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZ256rr,
9686 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9687 : // GIR_Coverage, 9761,
9688 : GIR_Done,
9689 : // Label 722: @21080
9690 : GIM_Reject,
9691 : // Label 699: @21081
9692 : GIM_Try, /*On fail goto*//*Label 723*/ 21104, // Rule ID 9763 //
9693 : GIM_CheckFeatures, GIFBS_HasBWI,
9694 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s1,
9695 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
9696 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK32RegClassID,
9697 : // (sext:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src) => (VPMOVM2WZrr:{ *:[v32i16] } VK32:{ *:[v32i1] }:$src)
9698 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2WZrr,
9699 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9700 : // GIR_Coverage, 9763,
9701 : GIR_Done,
9702 : // Label 723: @21104
9703 : GIM_Reject,
9704 : // Label 700: @21105
9705 : GIM_Try, /*On fail goto*//*Label 724*/ 21128, // Rule ID 9760 //
9706 : GIM_CheckFeatures, GIFBS_HasBWI,
9707 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s1,
9708 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
9709 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VK64RegClassID,
9710 : // (sext:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src) => (VPMOVM2BZrr:{ *:[v64i8] } VK64:{ *:[v64i1] }:$src)
9711 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPMOVM2BZrr,
9712 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9713 : // GIR_Coverage, 9760,
9714 : GIR_Done,
9715 : // Label 724: @21128
9716 : GIM_Reject,
9717 : // Label 701: @21129
9718 : GIM_Reject,
9719 : // Label 14: @21130
9720 : GIM_Try, /*On fail goto*//*Label 725*/ 21264,
9721 : GIM_CheckType, /*MI*/0, /*Op*/0, /*Type*/GILLT_s32,
9722 : GIM_SwitchType, /*MI*/0, /*Op*/1, /*[*/1, 3, /*)*//*default:*//*Label 728*/ 21242,
9723 : /*GILLT_s8*//*Label 726*/ 21144,
9724 : /*GILLT_s16*//*Label 727*/ 21202,
9725 : // Label 726: @21144
9726 : GIM_Try, /*On fail goto*//*Label 729*/ 21201,
9727 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9728 : GIM_Try, /*On fail goto*//*Label 730*/ 21187, // Rule ID 13696 //
9729 : GIM_CheckFeatures, GIFBS_HasDQI,
9730 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9731 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST,
9732 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v8s1,
9733 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK8RegClassID,
9734 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9735 : // (zext:{ *:[i32] } (bitconvert:{ *:[i8] } VK8:{ *:[v8i1] }:$src)) => (KMOVBrk:{ *:[i32] } VK8:{ *:[v8i1] }:$src)
9736 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVBrk,
9737 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9738 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
9739 : GIR_EraseFromParent, /*InsnID*/0,
9740 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9741 : // GIR_Coverage, 13696,
9742 : GIR_Done,
9743 : // Label 730: @21187
9744 : GIM_Try, /*On fail goto*//*Label 731*/ 21200, // Rule ID 536 //
9745 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
9746 : // (zext:{ *:[i32] } GR8:{ *:[i8] }:$src) => (MOVZX32rr8:{ *:[i32] } GR8:{ *:[i8] }:$src)
9747 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr8,
9748 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9749 : // GIR_Coverage, 536,
9750 : GIR_Done,
9751 : // Label 731: @21200
9752 : GIM_Reject,
9753 : // Label 729: @21201
9754 : GIM_Reject,
9755 : // Label 727: @21202
9756 : GIM_Try, /*On fail goto*//*Label 732*/ 21241, // Rule ID 13694 //
9757 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9758 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
9759 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_BITCAST,
9760 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_v16s1,
9761 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::VK16RegClassID,
9762 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9763 : // (zext:{ *:[i32] } (bitconvert:{ *:[i16] } VK16:{ *:[v16i1] }:$src)) => (KMOVWrk:{ *:[i32] } VK16:{ *:[v16i1] }:$src)
9764 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::KMOVWrk,
9765 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9766 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
9767 : GIR_EraseFromParent, /*InsnID*/0,
9768 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9769 : // GIR_Coverage, 13694,
9770 : GIR_Done,
9771 : // Label 732: @21241
9772 : GIM_Reject,
9773 : // Label 728: @21242
9774 : GIM_Try, /*On fail goto*//*Label 733*/ 21263, // Rule ID 538 //
9775 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
9776 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9777 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
9778 : // (zext:{ *:[i32] } GR16:{ *:[i16] }:$src) => (MOVZX32rr16:{ *:[i32] } GR16:{ *:[i16] }:$src)
9779 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MOVZX32rr16,
9780 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9781 : // GIR_Coverage, 538,
9782 : GIR_Done,
9783 : // Label 733: @21263
9784 : GIM_Reject,
9785 : // Label 725: @21264
9786 : GIM_Reject,
9787 : // Label 15: @21265
9788 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 23, /*)*//*default:*//*Label 747*/ 21989,
9789 : /*GILLT_s8*//*Label 734*/ 21293,
9790 : /*GILLT_s16*//*Label 735*/ 21369,
9791 : /*GILLT_s32*//*Label 736*/ 21445,
9792 : /*GILLT_s64*//*Label 737*/ 21521, 0, 0, 0,
9793 : /*GILLT_v2s64*//*Label 738*/ 21597, 0,
9794 : /*GILLT_v4s32*//*Label 739*/ 21655,
9795 : /*GILLT_v4s64*//*Label 740*/ 21713, 0,
9796 : /*GILLT_v8s16*//*Label 741*/ 21771,
9797 : /*GILLT_v8s32*//*Label 742*/ 21803,
9798 : /*GILLT_v8s64*//*Label 743*/ 21861, 0, 0,
9799 : /*GILLT_v16s16*//*Label 744*/ 21893,
9800 : /*GILLT_v16s32*//*Label 745*/ 21925, 0, 0,
9801 : /*GILLT_v32s16*//*Label 746*/ 21957,
9802 : // Label 734: @21293
9803 : GIM_Try, /*On fail goto*//*Label 748*/ 21368,
9804 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
9805 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
9806 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
9807 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
9808 : GIM_Try, /*On fail goto*//*Label 749*/ 21337, // Rule ID 16031 //
9809 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
9810 : // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (ADD8rr:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, GR8:{ *:[i8] }:$src1)
9811 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD8rr,
9812 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9813 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9814 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9815 : GIR_EraseFromParent, /*InsnID*/0,
9816 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9817 : // GIR_Coverage, 16031,
9818 : GIR_Done,
9819 : // Label 749: @21337
9820 : GIM_Try, /*On fail goto*//*Label 750*/ 21367, // Rule ID 595 //
9821 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9822 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
9823 : // MIs[1] Operand 1
9824 : // No operand predicates
9825 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9826 : // (shl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
9827 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL8ri,
9828 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9829 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9830 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
9831 : GIR_EraseFromParent, /*InsnID*/0,
9832 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9833 : // GIR_Coverage, 595,
9834 : GIR_Done,
9835 : // Label 750: @21367
9836 : GIM_Reject,
9837 : // Label 748: @21368
9838 : GIM_Reject,
9839 : // Label 735: @21369
9840 : GIM_Try, /*On fail goto*//*Label 751*/ 21444,
9841 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
9842 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
9843 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
9844 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
9845 : GIM_Try, /*On fail goto*//*Label 752*/ 21413, // Rule ID 16032 //
9846 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
9847 : // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (ADD16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, GR16:{ *:[i16] }:$src1)
9848 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD16rr,
9849 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9850 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9851 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9852 : GIR_EraseFromParent, /*InsnID*/0,
9853 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9854 : // GIR_Coverage, 16032,
9855 : GIR_Done,
9856 : // Label 752: @21413
9857 : GIM_Try, /*On fail goto*//*Label 753*/ 21443, // Rule ID 596 //
9858 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9859 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
9860 : // MIs[1] Operand 1
9861 : // No operand predicates
9862 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9863 : // (shl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
9864 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL16ri,
9865 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9866 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9867 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
9868 : GIR_EraseFromParent, /*InsnID*/0,
9869 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9870 : // GIR_Coverage, 596,
9871 : GIR_Done,
9872 : // Label 753: @21443
9873 : GIM_Reject,
9874 : // Label 751: @21444
9875 : GIM_Reject,
9876 : // Label 736: @21445
9877 : GIM_Try, /*On fail goto*//*Label 754*/ 21520,
9878 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
9879 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
9880 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
9881 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
9882 : GIM_Try, /*On fail goto*//*Label 755*/ 21489, // Rule ID 16033 //
9883 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
9884 : // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (ADD32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, GR32:{ *:[i32] }:$src1)
9885 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD32rr,
9886 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9887 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9888 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9889 : GIR_EraseFromParent, /*InsnID*/0,
9890 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9891 : // GIR_Coverage, 16033,
9892 : GIR_Done,
9893 : // Label 755: @21489
9894 : GIM_Try, /*On fail goto*//*Label 756*/ 21519, // Rule ID 597 //
9895 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9896 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
9897 : // MIs[1] Operand 1
9898 : // No operand predicates
9899 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9900 : // (shl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
9901 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL32ri,
9902 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9903 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9904 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
9905 : GIR_EraseFromParent, /*InsnID*/0,
9906 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9907 : // GIR_Coverage, 597,
9908 : GIR_Done,
9909 : // Label 756: @21519
9910 : GIM_Reject,
9911 : // Label 754: @21520
9912 : GIM_Reject,
9913 : // Label 737: @21521
9914 : GIM_Try, /*On fail goto*//*Label 757*/ 21596,
9915 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
9916 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
9917 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
9918 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
9919 : GIM_Try, /*On fail goto*//*Label 758*/ 21565, // Rule ID 16034 //
9920 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
9921 : // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (ADD64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, GR64:{ *:[i64] }:$src1)
9922 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ADD64rr,
9923 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9924 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9925 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9926 : GIR_EraseFromParent, /*InsnID*/0,
9927 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9928 : // GIR_Coverage, 16034,
9929 : GIR_Done,
9930 : // Label 758: @21565
9931 : GIM_Try, /*On fail goto*//*Label 759*/ 21595, // Rule ID 598 //
9932 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
9933 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
9934 : // MIs[1] Operand 1
9935 : // No operand predicates
9936 : GIM_CheckIsSafeToFold, /*InsnID*/1,
9937 : // (shl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHL64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
9938 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHL64ri,
9939 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
9940 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
9941 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
9942 : GIR_EraseFromParent, /*InsnID*/0,
9943 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9944 : // GIR_Coverage, 598,
9945 : GIR_Done,
9946 : // Label 759: @21595
9947 : GIM_Reject,
9948 : // Label 757: @21596
9949 : GIM_Reject,
9950 : // Label 738: @21597
9951 : GIM_Try, /*On fail goto*//*Label 760*/ 21654,
9952 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
9953 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
9954 : GIM_Try, /*On fail goto*//*Label 761*/ 21630, // Rule ID 2723 //
9955 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
9956 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
9957 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
9958 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
9959 : // (shl:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSLLVQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
9960 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQrr,
9961 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9962 : // GIR_Coverage, 2723,
9963 : GIR_Done,
9964 : // Label 761: @21630
9965 : GIM_Try, /*On fail goto*//*Label 762*/ 21653, // Rule ID 6397 //
9966 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
9967 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9968 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
9969 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
9970 : // (shl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSLLVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
9971 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQZ128rr,
9972 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9973 : // GIR_Coverage, 6397,
9974 : GIR_Done,
9975 : // Label 762: @21653
9976 : GIM_Reject,
9977 : // Label 760: @21654
9978 : GIM_Reject,
9979 : // Label 739: @21655
9980 : GIM_Try, /*On fail goto*//*Label 763*/ 21712,
9981 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
9982 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
9983 : GIM_Try, /*On fail goto*//*Label 764*/ 21688, // Rule ID 2719 //
9984 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
9985 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
9986 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
9987 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
9988 : // (shl:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSLLVDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
9989 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDrr,
9990 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
9991 : // GIR_Coverage, 2719,
9992 : GIR_Done,
9993 : // Label 764: @21688
9994 : GIM_Try, /*On fail goto*//*Label 765*/ 21711, // Rule ID 6370 //
9995 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
9996 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
9997 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
9998 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
9999 : // (shl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSLLVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
10000 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDZ128rr,
10001 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10002 : // GIR_Coverage, 6370,
10003 : GIR_Done,
10004 : // Label 765: @21711
10005 : GIM_Reject,
10006 : // Label 763: @21712
10007 : GIM_Reject,
10008 : // Label 740: @21713
10009 : GIM_Try, /*On fail goto*//*Label 766*/ 21770,
10010 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
10011 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
10012 : GIM_Try, /*On fail goto*//*Label 767*/ 21746, // Rule ID 2725 //
10013 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10014 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
10015 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
10016 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
10017 : // (shl:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSLLVQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
10018 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQYrr,
10019 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10020 : // GIR_Coverage, 2725,
10021 : GIR_Done,
10022 : // Label 767: @21746
10023 : GIM_Try, /*On fail goto*//*Label 768*/ 21769, // Rule ID 6388 //
10024 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10025 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10026 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10027 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10028 : // (shl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSLLVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
10029 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQZ256rr,
10030 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10031 : // GIR_Coverage, 6388,
10032 : GIR_Done,
10033 : // Label 768: @21769
10034 : GIM_Reject,
10035 : // Label 766: @21770
10036 : GIM_Reject,
10037 : // Label 741: @21771
10038 : GIM_Try, /*On fail goto*//*Label 769*/ 21802, // Rule ID 6418 //
10039 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
10040 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
10041 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
10042 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10043 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10044 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10045 : // (shl:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSLLVWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
10046 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVWZ128rr,
10047 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10048 : // GIR_Coverage, 6418,
10049 : GIR_Done,
10050 : // Label 769: @21802
10051 : GIM_Reject,
10052 : // Label 742: @21803
10053 : GIM_Try, /*On fail goto*//*Label 770*/ 21860,
10054 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
10055 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
10056 : GIM_Try, /*On fail goto*//*Label 771*/ 21836, // Rule ID 2721 //
10057 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10058 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
10059 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
10060 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
10061 : // (shl:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSLLVDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
10062 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDYrr,
10063 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10064 : // GIR_Coverage, 2721,
10065 : GIR_Done,
10066 : // Label 771: @21836
10067 : GIM_Try, /*On fail goto*//*Label 772*/ 21859, // Rule ID 6361 //
10068 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10069 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10070 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10071 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10072 : // (shl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSLLVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
10073 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDZ256rr,
10074 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10075 : // GIR_Coverage, 6361,
10076 : GIR_Done,
10077 : // Label 772: @21859
10078 : GIM_Reject,
10079 : // Label 770: @21860
10080 : GIM_Reject,
10081 : // Label 743: @21861
10082 : GIM_Try, /*On fail goto*//*Label 773*/ 21892, // Rule ID 6379 //
10083 : GIM_CheckFeatures, GIFBS_HasAVX512,
10084 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
10085 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
10086 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10087 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10088 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10089 : // (shl:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSLLVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
10090 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVQZrr,
10091 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10092 : // GIR_Coverage, 6379,
10093 : GIR_Done,
10094 : // Label 773: @21892
10095 : GIM_Reject,
10096 : // Label 744: @21893
10097 : GIM_Try, /*On fail goto*//*Label 774*/ 21924, // Rule ID 6412 //
10098 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
10099 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
10100 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
10101 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10102 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10103 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10104 : // (shl:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSLLVWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
10105 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVWZ256rr,
10106 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10107 : // GIR_Coverage, 6412,
10108 : GIR_Done,
10109 : // Label 774: @21924
10110 : GIM_Reject,
10111 : // Label 745: @21925
10112 : GIM_Try, /*On fail goto*//*Label 775*/ 21956, // Rule ID 6352 //
10113 : GIM_CheckFeatures, GIFBS_HasAVX512,
10114 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
10115 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
10116 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10117 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10118 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10119 : // (shl:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSLLVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
10120 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVDZrr,
10121 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10122 : // GIR_Coverage, 6352,
10123 : GIR_Done,
10124 : // Label 775: @21956
10125 : GIM_Reject,
10126 : // Label 746: @21957
10127 : GIM_Try, /*On fail goto*//*Label 776*/ 21988, // Rule ID 6406 //
10128 : GIM_CheckFeatures, GIFBS_HasBWI,
10129 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
10130 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
10131 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10132 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10133 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10134 : // (shl:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSLLVWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
10135 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSLLVWZrr,
10136 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10137 : // GIR_Coverage, 6406,
10138 : GIR_Done,
10139 : // Label 776: @21988
10140 : GIM_Reject,
10141 : // Label 747: @21989
10142 : GIM_Reject,
10143 : // Label 16: @21990
10144 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 23, /*)*//*default:*//*Label 790*/ 22820,
10145 : /*GILLT_s8*//*Label 777*/ 22018,
10146 : /*GILLT_s16*//*Label 778*/ 22090,
10147 : /*GILLT_s32*//*Label 779*/ 22162,
10148 : /*GILLT_s64*//*Label 780*/ 22356, 0, 0, 0,
10149 : /*GILLT_v2s64*//*Label 781*/ 22428, 0,
10150 : /*GILLT_v4s32*//*Label 782*/ 22486,
10151 : /*GILLT_v4s64*//*Label 783*/ 22544, 0,
10152 : /*GILLT_v8s16*//*Label 784*/ 22602,
10153 : /*GILLT_v8s32*//*Label 785*/ 22634,
10154 : /*GILLT_v8s64*//*Label 786*/ 22692, 0, 0,
10155 : /*GILLT_v16s16*//*Label 787*/ 22724,
10156 : /*GILLT_v16s32*//*Label 788*/ 22756, 0, 0,
10157 : /*GILLT_v32s16*//*Label 789*/ 22788,
10158 : // Label 777: @22018
10159 : GIM_Try, /*On fail goto*//*Label 791*/ 22089,
10160 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
10161 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10162 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
10163 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
10164 : GIM_Try, /*On fail goto*//*Label 792*/ 22058, // Rule ID 619 //
10165 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10166 : // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SHR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
10167 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8r1,
10168 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10169 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10170 : GIR_EraseFromParent, /*InsnID*/0,
10171 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10172 : // GIR_Coverage, 619,
10173 : GIR_Done,
10174 : // Label 792: @22058
10175 : GIM_Try, /*On fail goto*//*Label 793*/ 22088, // Rule ID 615 //
10176 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10177 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10178 : // MIs[1] Operand 1
10179 : // No operand predicates
10180 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10181 : // (srl:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
10182 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR8ri,
10183 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10184 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10185 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10186 : GIR_EraseFromParent, /*InsnID*/0,
10187 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10188 : // GIR_Coverage, 615,
10189 : GIR_Done,
10190 : // Label 793: @22088
10191 : GIM_Reject,
10192 : // Label 791: @22089
10193 : GIM_Reject,
10194 : // Label 778: @22090
10195 : GIM_Try, /*On fail goto*//*Label 794*/ 22161,
10196 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
10197 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10198 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
10199 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
10200 : GIM_Try, /*On fail goto*//*Label 795*/ 22130, // Rule ID 620 //
10201 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10202 : // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SHR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
10203 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16r1,
10204 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10205 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10206 : GIR_EraseFromParent, /*InsnID*/0,
10207 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10208 : // GIR_Coverage, 620,
10209 : GIR_Done,
10210 : // Label 795: @22130
10211 : GIM_Try, /*On fail goto*//*Label 796*/ 22160, // Rule ID 616 //
10212 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10213 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10214 : // MIs[1] Operand 1
10215 : // No operand predicates
10216 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10217 : // (srl:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
10218 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR16ri,
10219 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10220 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10221 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10222 : GIR_EraseFromParent, /*InsnID*/0,
10223 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10224 : // GIR_Coverage, 616,
10225 : GIR_Done,
10226 : // Label 796: @22160
10227 : GIM_Reject,
10228 : // Label 794: @22161
10229 : GIM_Reject,
10230 : // Label 779: @22162
10231 : GIM_Try, /*On fail goto*//*Label 797*/ 22355,
10232 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
10233 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10234 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
10235 : GIM_Try, /*On fail goto*//*Label 798*/ 22294, // Rule ID 12212 //
10236 : GIM_CheckFeatures, GIFBS_HasBMI2,
10237 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
10238 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_SHL,
10239 : GIM_CheckType, /*MI*/1, /*Op*/1, /*Type*/GILLT_s32,
10240 : GIM_CheckType, /*MI*/1, /*Op*/2, /*Type*/GILLT_s8,
10241 : GIM_CheckRegBankForClass, /*MI*/1, /*Op*/1, /*RC*/X86::GR32RegClassID,
10242 : GIM_RecordInsn, /*DefineMI*/2, /*MI*/1, /*OpIdx*/2, // MIs[2]
10243 : GIM_CheckOpcode, /*MI*/2, TargetOpcode::G_TRUNC,
10244 : GIM_CheckType, /*MI*/2, /*Op*/1, /*Type*/GILLT_s32,
10245 : GIM_RecordInsn, /*DefineMI*/3, /*MI*/2, /*OpIdx*/1, // MIs[3]
10246 : GIM_CheckOpcode, /*MI*/3, TargetOpcode::G_SUB,
10247 : GIM_CheckType, /*MI*/3, /*Op*/1, /*Type*/GILLT_s32,
10248 : GIM_CheckType, /*MI*/3, /*Op*/2, /*Type*/GILLT_s32,
10249 : GIM_CheckConstantInt, /*MI*/3, /*Op*/1, 32,
10250 : GIM_CheckRegBankForClass, /*MI*/3, /*Op*/2, /*RC*/X86::GR32RegClassID,
10251 : GIM_RecordInsn, /*DefineMI*/4, /*MI*/0, /*OpIdx*/2, // MIs[4]
10252 : GIM_CheckOpcode, /*MI*/4, TargetOpcode::G_TRUNC,
10253 : GIM_CheckType, /*MI*/4, /*Op*/1, /*Type*/GILLT_s32,
10254 : GIM_RecordInsn, /*DefineMI*/5, /*MI*/4, /*OpIdx*/1, // MIs[5]
10255 : GIM_CheckOpcode, /*MI*/5, TargetOpcode::G_SUB,
10256 : GIM_CheckType, /*MI*/5, /*Op*/1, /*Type*/GILLT_s32,
10257 : GIM_CheckConstantInt, /*MI*/5, /*Op*/1, 32,
10258 : // MIs[5] lz
10259 : GIM_CheckIsSameOperand, /*MI*/5, /*OpIdx*/2, /*OtherMI*/3, /*OtherOpIdx*/2,
10260 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10261 : GIM_CheckIsSafeToFold, /*InsnID*/2,
10262 : GIM_CheckIsSafeToFold, /*InsnID*/3,
10263 : GIM_CheckIsSafeToFold, /*InsnID*/4,
10264 : GIM_CheckIsSafeToFold, /*InsnID*/5,
10265 : // (srl:{ *:[i32] } (shl:{ *:[i32] } GR32:{ *:[i32] }:$src, (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz))), (trunc:{ *:[i8] } (sub:{ *:[i32] } 32:{ *:[i32] }, GR32:{ *:[i32] }:$lz))) => (BZHI32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src, GR32:{ *:[i32] }:$lz)
10266 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::BZHI32rr,
10267 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10268 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/1, /*OpIdx*/1, // src
10269 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/3, /*OpIdx*/2, // lz
10270 : GIR_EraseFromParent, /*InsnID*/0,
10271 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10272 : // GIR_Coverage, 12212,
10273 : GIR_Done,
10274 : // Label 798: @22294
10275 : GIM_Try, /*On fail goto*//*Label 799*/ 22320, // Rule ID 621 //
10276 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
10277 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10278 : // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SHR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
10279 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32r1,
10280 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10281 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10282 : GIR_EraseFromParent, /*InsnID*/0,
10283 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10284 : // GIR_Coverage, 621,
10285 : GIR_Done,
10286 : // Label 799: @22320
10287 : GIM_Try, /*On fail goto*//*Label 800*/ 22354, // Rule ID 617 //
10288 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
10289 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10290 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10291 : // MIs[1] Operand 1
10292 : // No operand predicates
10293 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10294 : // (srl:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
10295 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR32ri,
10296 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10297 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10298 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10299 : GIR_EraseFromParent, /*InsnID*/0,
10300 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10301 : // GIR_Coverage, 617,
10302 : GIR_Done,
10303 : // Label 800: @22354
10304 : GIM_Reject,
10305 : // Label 797: @22355
10306 : GIM_Reject,
10307 : // Label 780: @22356
10308 : GIM_Try, /*On fail goto*//*Label 801*/ 22427,
10309 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
10310 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10311 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
10312 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
10313 : GIM_Try, /*On fail goto*//*Label 802*/ 22396, // Rule ID 622 //
10314 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10315 : // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SHR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
10316 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64r1,
10317 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10318 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10319 : GIR_EraseFromParent, /*InsnID*/0,
10320 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10321 : // GIR_Coverage, 622,
10322 : GIR_Done,
10323 : // Label 802: @22396
10324 : GIM_Try, /*On fail goto*//*Label 803*/ 22426, // Rule ID 618 //
10325 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10326 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10327 : // MIs[1] Operand 1
10328 : // No operand predicates
10329 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10330 : // (srl:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SHR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
10331 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SHR64ri,
10332 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10333 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10334 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10335 : GIR_EraseFromParent, /*InsnID*/0,
10336 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10337 : // GIR_Coverage, 618,
10338 : GIR_Done,
10339 : // Label 803: @22426
10340 : GIM_Reject,
10341 : // Label 801: @22427
10342 : GIM_Reject,
10343 : // Label 781: @22428
10344 : GIM_Try, /*On fail goto*//*Label 804*/ 22485,
10345 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
10346 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
10347 : GIM_Try, /*On fail goto*//*Label 805*/ 22461, // Rule ID 2731 //
10348 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
10350 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
10351 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
10352 : // (srl:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2) => (VPSRLVQrr:{ *:[v2i64] } VR128:{ *:[v2i64] }:$src1, VR128:{ *:[v2i64] }:$src2)
10353 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQrr,
10354 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10355 : // GIR_Coverage, 2731,
10356 : GIR_Done,
10357 : // Label 805: @22461
10358 : GIM_Try, /*On fail goto*//*Label 806*/ 22484, // Rule ID 6541 //
10359 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10360 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10361 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10362 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10363 : // (srl:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSRLVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
10364 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQZ128rr,
10365 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10366 : // GIR_Coverage, 6541,
10367 : GIR_Done,
10368 : // Label 806: @22484
10369 : GIM_Reject,
10370 : // Label 804: @22485
10371 : GIM_Reject,
10372 : // Label 782: @22486
10373 : GIM_Try, /*On fail goto*//*Label 807*/ 22543,
10374 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
10375 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
10376 : GIM_Try, /*On fail goto*//*Label 808*/ 22519, // Rule ID 2727 //
10377 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10378 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
10379 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
10380 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
10381 : // (srl:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSRLVDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
10382 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDrr,
10383 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10384 : // GIR_Coverage, 2727,
10385 : GIR_Done,
10386 : // Label 808: @22519
10387 : GIM_Try, /*On fail goto*//*Label 809*/ 22542, // Rule ID 6514 //
10388 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10389 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10390 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10391 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10392 : // (srl:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSRLVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
10393 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZ128rr,
10394 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10395 : // GIR_Coverage, 6514,
10396 : GIR_Done,
10397 : // Label 809: @22542
10398 : GIM_Reject,
10399 : // Label 807: @22543
10400 : GIM_Reject,
10401 : // Label 783: @22544
10402 : GIM_Try, /*On fail goto*//*Label 810*/ 22601,
10403 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
10404 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
10405 : GIM_Try, /*On fail goto*//*Label 811*/ 22577, // Rule ID 2733 //
10406 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10407 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
10408 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
10409 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
10410 : // (srl:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2) => (VPSRLVQYrr:{ *:[v4i64] } VR256:{ *:[v4i64] }:$src1, VR256:{ *:[v4i64] }:$src2)
10411 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQYrr,
10412 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10413 : // GIR_Coverage, 2733,
10414 : GIR_Done,
10415 : // Label 811: @22577
10416 : GIM_Try, /*On fail goto*//*Label 812*/ 22600, // Rule ID 6532 //
10417 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10418 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10419 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10420 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10421 : // (srl:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSRLVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
10422 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQZ256rr,
10423 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10424 : // GIR_Coverage, 6532,
10425 : GIR_Done,
10426 : // Label 812: @22600
10427 : GIM_Reject,
10428 : // Label 810: @22601
10429 : GIM_Reject,
10430 : // Label 784: @22602
10431 : GIM_Try, /*On fail goto*//*Label 813*/ 22633, // Rule ID 6562 //
10432 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
10433 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
10434 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
10435 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10436 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10437 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10438 : // (srl:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSRLVWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
10439 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVWZ128rr,
10440 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10441 : // GIR_Coverage, 6562,
10442 : GIR_Done,
10443 : // Label 813: @22633
10444 : GIM_Reject,
10445 : // Label 785: @22634
10446 : GIM_Try, /*On fail goto*//*Label 814*/ 22691,
10447 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
10448 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
10449 : GIM_Try, /*On fail goto*//*Label 815*/ 22667, // Rule ID 2729 //
10450 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10451 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
10452 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
10453 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
10454 : // (srl:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSRLVDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
10455 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDYrr,
10456 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10457 : // GIR_Coverage, 2729,
10458 : GIR_Done,
10459 : // Label 815: @22667
10460 : GIM_Try, /*On fail goto*//*Label 816*/ 22690, // Rule ID 6505 //
10461 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10462 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10463 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10464 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10465 : // (srl:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSRLVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
10466 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZ256rr,
10467 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10468 : // GIR_Coverage, 6505,
10469 : GIR_Done,
10470 : // Label 816: @22690
10471 : GIM_Reject,
10472 : // Label 814: @22691
10473 : GIM_Reject,
10474 : // Label 786: @22692
10475 : GIM_Try, /*On fail goto*//*Label 817*/ 22723, // Rule ID 6523 //
10476 : GIM_CheckFeatures, GIFBS_HasAVX512,
10477 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
10478 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
10479 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10480 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10481 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10482 : // (srl:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSRLVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
10483 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVQZrr,
10484 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10485 : // GIR_Coverage, 6523,
10486 : GIR_Done,
10487 : // Label 817: @22723
10488 : GIM_Reject,
10489 : // Label 787: @22724
10490 : GIM_Try, /*On fail goto*//*Label 818*/ 22755, // Rule ID 6556 //
10491 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
10492 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
10493 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
10494 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10495 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10496 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10497 : // (srl:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSRLVWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
10498 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVWZ256rr,
10499 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10500 : // GIR_Coverage, 6556,
10501 : GIR_Done,
10502 : // Label 818: @22755
10503 : GIM_Reject,
10504 : // Label 788: @22756
10505 : GIM_Try, /*On fail goto*//*Label 819*/ 22787, // Rule ID 6496 //
10506 : GIM_CheckFeatures, GIFBS_HasAVX512,
10507 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
10508 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
10509 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10510 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10511 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10512 : // (srl:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSRLVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
10513 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVDZrr,
10514 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10515 : // GIR_Coverage, 6496,
10516 : GIR_Done,
10517 : // Label 819: @22787
10518 : GIM_Reject,
10519 : // Label 789: @22788
10520 : GIM_Try, /*On fail goto*//*Label 820*/ 22819, // Rule ID 6550 //
10521 : GIM_CheckFeatures, GIFBS_HasBWI,
10522 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
10523 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
10524 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10525 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10526 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10527 : // (srl:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSRLVWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
10528 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRLVWZrr,
10529 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10530 : // GIR_Coverage, 6550,
10531 : GIR_Done,
10532 : // Label 820: @22819
10533 : GIM_Reject,
10534 : // Label 790: @22820
10535 : GIM_Reject,
10536 : // Label 17: @22821
10537 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/1, 23, /*)*//*default:*//*Label 834*/ 23477,
10538 : /*GILLT_s8*//*Label 821*/ 22849,
10539 : /*GILLT_s16*//*Label 822*/ 22921,
10540 : /*GILLT_s32*//*Label 823*/ 22993,
10541 : /*GILLT_s64*//*Label 824*/ 23065, 0, 0, 0,
10542 : /*GILLT_v2s64*//*Label 825*/ 23137, 0,
10543 : /*GILLT_v4s32*//*Label 826*/ 23169,
10544 : /*GILLT_v4s64*//*Label 827*/ 23227, 0,
10545 : /*GILLT_v8s16*//*Label 828*/ 23259,
10546 : /*GILLT_v8s32*//*Label 829*/ 23291,
10547 : /*GILLT_v8s64*//*Label 830*/ 23349, 0, 0,
10548 : /*GILLT_v16s16*//*Label 831*/ 23381,
10549 : /*GILLT_v16s32*//*Label 832*/ 23413, 0, 0,
10550 : /*GILLT_v32s16*//*Label 833*/ 23445,
10551 : // Label 821: @22849
10552 : GIM_Try, /*On fail goto*//*Label 835*/ 22920,
10553 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s8,
10554 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10555 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR8RegClassID,
10556 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR8RegClassID,
10557 : GIM_Try, /*On fail goto*//*Label 836*/ 22889, // Rule ID 643 //
10558 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10559 : // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, 1:{ *:[i8] }) => (SAR8r1:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1)
10560 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8r1,
10561 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10562 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10563 : GIR_EraseFromParent, /*InsnID*/0,
10564 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10565 : // GIR_Coverage, 643,
10566 : GIR_Done,
10567 : // Label 836: @22889
10568 : GIM_Try, /*On fail goto*//*Label 837*/ 22919, // Rule ID 639 //
10569 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10570 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10571 : // MIs[1] Operand 1
10572 : // No operand predicates
10573 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10574 : // (sra:{ *:[i8] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR8ri:{ *:[i8] }:{ *:[i32] } GR8:{ *:[i8] }:$src1, (imm:{ *:[i8] }):$src2)
10575 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR8ri,
10576 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10577 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10578 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10579 : GIR_EraseFromParent, /*InsnID*/0,
10580 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10581 : // GIR_Coverage, 639,
10582 : GIR_Done,
10583 : // Label 837: @22919
10584 : GIM_Reject,
10585 : // Label 835: @22920
10586 : GIM_Reject,
10587 : // Label 822: @22921
10588 : GIM_Try, /*On fail goto*//*Label 838*/ 22992,
10589 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
10590 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10591 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
10592 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
10593 : GIM_Try, /*On fail goto*//*Label 839*/ 22961, // Rule ID 644 //
10594 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10595 : // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, 1:{ *:[i8] }) => (SAR16r1:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1)
10596 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16r1,
10597 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10598 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10599 : GIR_EraseFromParent, /*InsnID*/0,
10600 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10601 : // GIR_Coverage, 644,
10602 : GIR_Done,
10603 : // Label 839: @22961
10604 : GIM_Try, /*On fail goto*//*Label 840*/ 22991, // Rule ID 640 //
10605 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10606 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10607 : // MIs[1] Operand 1
10608 : // No operand predicates
10609 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10610 : // (sra:{ *:[i16] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src1, (imm:{ *:[i8] }):$src2)
10611 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR16ri,
10612 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10613 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10614 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10615 : GIR_EraseFromParent, /*InsnID*/0,
10616 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10617 : // GIR_Coverage, 640,
10618 : GIR_Done,
10619 : // Label 840: @22991
10620 : GIM_Reject,
10621 : // Label 838: @22992
10622 : GIM_Reject,
10623 : // Label 823: @22993
10624 : GIM_Try, /*On fail goto*//*Label 841*/ 23064,
10625 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
10626 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10627 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
10628 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
10629 : GIM_Try, /*On fail goto*//*Label 842*/ 23033, // Rule ID 645 //
10630 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10631 : // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, 1:{ *:[i8] }) => (SAR32r1:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1)
10632 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32r1,
10633 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10634 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10635 : GIR_EraseFromParent, /*InsnID*/0,
10636 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10637 : // GIR_Coverage, 645,
10638 : GIR_Done,
10639 : // Label 842: @23033
10640 : GIM_Try, /*On fail goto*//*Label 843*/ 23063, // Rule ID 641 //
10641 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10642 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10643 : // MIs[1] Operand 1
10644 : // No operand predicates
10645 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10646 : // (sra:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR32ri:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src1, (imm:{ *:[i8] }):$src2)
10647 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR32ri,
10648 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10649 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10650 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10651 : GIR_EraseFromParent, /*InsnID*/0,
10652 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10653 : // GIR_Coverage, 641,
10654 : GIR_Done,
10655 : // Label 843: @23063
10656 : GIM_Reject,
10657 : // Label 841: @23064
10658 : GIM_Reject,
10659 : // Label 824: @23065
10660 : GIM_Try, /*On fail goto*//*Label 844*/ 23136,
10661 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
10662 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s8,
10663 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
10664 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
10665 : GIM_Try, /*On fail goto*//*Label 845*/ 23105, // Rule ID 646 //
10666 : GIM_CheckConstantInt, /*MI*/0, /*Op*/2, 1,
10667 : // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, 1:{ *:[i8] }) => (SAR64r1:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1)
10668 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64r1,
10669 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10670 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10671 : GIR_EraseFromParent, /*InsnID*/0,
10672 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10673 : // GIR_Coverage, 646,
10674 : GIR_Done,
10675 : // Label 845: @23105
10676 : GIM_Try, /*On fail goto*//*Label 846*/ 23135, // Rule ID 642 //
10677 : GIM_RecordInsn, /*DefineMI*/1, /*MI*/0, /*OpIdx*/2, // MIs[1]
10678 : GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_CONSTANT,
10679 : // MIs[1] Operand 1
10680 : // No operand predicates
10681 : GIM_CheckIsSafeToFold, /*InsnID*/1,
10682 : // (sra:{ *:[i64] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2) => (SAR64ri:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src1, (imm:{ *:[i8] }):$src2)
10683 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::SAR64ri,
10684 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
10685 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src1
10686 : GIR_CopyConstantAsSImm, /*NewInsnID*/0, /*OldInsnID*/1, // src2
10687 : GIR_EraseFromParent, /*InsnID*/0,
10688 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10689 : // GIR_Coverage, 642,
10690 : GIR_Done,
10691 : // Label 846: @23135
10692 : GIM_Reject,
10693 : // Label 844: @23136
10694 : GIM_Reject,
10695 : // Label 825: @23137
10696 : GIM_Try, /*On fail goto*//*Label 847*/ 23168, // Rule ID 6469 //
10697 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10698 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
10699 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
10700 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10701 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10702 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10703 : // (sra:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2) => (VPSRAVQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1, VR128X:{ *:[v2i64] }:$src2)
10704 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZ128rr,
10705 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10706 : // GIR_Coverage, 6469,
10707 : GIR_Done,
10708 : // Label 847: @23168
10709 : GIM_Reject,
10710 : // Label 826: @23169
10711 : GIM_Try, /*On fail goto*//*Label 848*/ 23226,
10712 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
10713 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
10714 : GIM_Try, /*On fail goto*//*Label 849*/ 23202, // Rule ID 2735 //
10715 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10716 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
10717 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
10718 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
10719 : // (sra:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2) => (VPSRAVDrr:{ *:[v4i32] } VR128:{ *:[v4i32] }:$src1, VR128:{ *:[v4i32] }:$src2)
10720 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDrr,
10721 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10722 : // GIR_Coverage, 2735,
10723 : GIR_Done,
10724 : // Label 849: @23202
10725 : GIM_Try, /*On fail goto*//*Label 850*/ 23225, // Rule ID 6442 //
10726 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10727 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10728 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10729 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10730 : // (sra:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2) => (VPSRAVDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1, VR128X:{ *:[v4i32] }:$src2)
10731 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZ128rr,
10732 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10733 : // GIR_Coverage, 6442,
10734 : GIR_Done,
10735 : // Label 850: @23225
10736 : GIM_Reject,
10737 : // Label 848: @23226
10738 : GIM_Reject,
10739 : // Label 827: @23227
10740 : GIM_Try, /*On fail goto*//*Label 851*/ 23258, // Rule ID 6460 //
10741 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10742 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
10743 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
10744 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10745 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10746 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10747 : // (sra:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2) => (VPSRAVQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1, VR256X:{ *:[v4i64] }:$src2)
10748 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZ256rr,
10749 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10750 : // GIR_Coverage, 6460,
10751 : GIR_Done,
10752 : // Label 851: @23258
10753 : GIM_Reject,
10754 : // Label 828: @23259
10755 : GIM_Try, /*On fail goto*//*Label 852*/ 23290, // Rule ID 6490 //
10756 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
10757 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
10758 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s16,
10759 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
10760 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
10761 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
10762 : // (sra:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2) => (VPSRAVWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1, VR128X:{ *:[v8i16] }:$src2)
10763 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZ128rr,
10764 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10765 : // GIR_Coverage, 6490,
10766 : GIR_Done,
10767 : // Label 852: @23290
10768 : GIM_Reject,
10769 : // Label 829: @23291
10770 : GIM_Try, /*On fail goto*//*Label 853*/ 23348,
10771 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
10772 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
10773 : GIM_Try, /*On fail goto*//*Label 854*/ 23324, // Rule ID 2737 //
10774 : GIM_CheckFeatures, GIFBS_HasAVX2_NoVLX,
10775 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
10776 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
10777 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
10778 : // (sra:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2) => (VPSRAVDYrr:{ *:[v8i32] } VR256:{ *:[v8i32] }:$src1, VR256:{ *:[v8i32] }:$src2)
10779 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDYrr,
10780 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10781 : // GIR_Coverage, 2737,
10782 : GIR_Done,
10783 : // Label 854: @23324
10784 : GIM_Try, /*On fail goto*//*Label 855*/ 23347, // Rule ID 6433 //
10785 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
10786 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10787 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10788 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10789 : // (sra:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2) => (VPSRAVDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1, VR256X:{ *:[v8i32] }:$src2)
10790 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZ256rr,
10791 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10792 : // GIR_Coverage, 6433,
10793 : GIR_Done,
10794 : // Label 855: @23347
10795 : GIM_Reject,
10796 : // Label 853: @23348
10797 : GIM_Reject,
10798 : // Label 830: @23349
10799 : GIM_Try, /*On fail goto*//*Label 856*/ 23380, // Rule ID 6451 //
10800 : GIM_CheckFeatures, GIFBS_HasAVX512,
10801 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
10802 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
10803 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10804 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10805 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10806 : // (sra:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2) => (VPSRAVQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1, VR512:{ *:[v8i64] }:$src2)
10807 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVQZrr,
10808 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10809 : // GIR_Coverage, 6451,
10810 : GIR_Done,
10811 : // Label 856: @23380
10812 : GIM_Reject,
10813 : // Label 831: @23381
10814 : GIM_Try, /*On fail goto*//*Label 857*/ 23412, // Rule ID 6484 //
10815 : GIM_CheckFeatures, GIFBS_HasBWI_HasVLX,
10816 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
10817 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s16,
10818 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
10819 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
10820 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
10821 : // (sra:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2) => (VPSRAVWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1, VR256X:{ *:[v16i16] }:$src2)
10822 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZ256rr,
10823 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10824 : // GIR_Coverage, 6484,
10825 : GIR_Done,
10826 : // Label 857: @23412
10827 : GIM_Reject,
10828 : // Label 832: @23413
10829 : GIM_Try, /*On fail goto*//*Label 858*/ 23444, // Rule ID 6424 //
10830 : GIM_CheckFeatures, GIFBS_HasAVX512,
10831 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
10832 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
10833 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10834 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10835 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10836 : // (sra:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2) => (VPSRAVDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1, VR512:{ *:[v16i32] }:$src2)
10837 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVDZrr,
10838 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10839 : // GIR_Coverage, 6424,
10840 : GIR_Done,
10841 : // Label 858: @23444
10842 : GIM_Reject,
10843 : // Label 833: @23445
10844 : GIM_Try, /*On fail goto*//*Label 859*/ 23476, // Rule ID 6478 //
10845 : GIM_CheckFeatures, GIFBS_HasBWI,
10846 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
10847 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v32s16,
10848 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
10849 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
10850 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
10851 : // (sra:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2) => (VPSRAVWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1, VR512:{ *:[v32i16] }:$src2)
10852 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPSRAVWZrr,
10853 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10854 : // GIR_Coverage, 6478,
10855 : GIR_Done,
10856 : // Label 859: @23476
10857 : GIM_Reject,
10858 : // Label 834: @23477
10859 : GIM_Reject,
10860 : // Label 18: @23478
10861 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 869*/ 24090,
10862 : /*GILLT_s32*//*Label 860*/ 23501,
10863 : /*GILLT_s64*//*Label 861*/ 23608,
10864 : /*GILLT_s80*//*Label 862*/ 23715, 0, 0,
10865 : /*GILLT_v2s64*//*Label 863*/ 23748, 0,
10866 : /*GILLT_v4s32*//*Label 864*/ 23829,
10867 : /*GILLT_v4s64*//*Label 865*/ 23910, 0, 0,
10868 : /*GILLT_v8s32*//*Label 866*/ 23968,
10869 : /*GILLT_v8s64*//*Label 867*/ 24026, 0, 0, 0,
10870 : /*GILLT_v16s32*//*Label 868*/ 24058,
10871 : // Label 860: @23501
10872 : GIM_Try, /*On fail goto*//*Label 870*/ 23607,
10873 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
10874 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
10875 : GIM_Try, /*On fail goto*//*Label 871*/ 23537, // Rule ID 740 //
10876 : GIM_CheckFeatures, GIFBS_FPStackf32,
10877 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
10878 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
10879 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
10880 : // (fadd:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (ADD_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
10881 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp32,
10882 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
10883 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10884 : // GIR_Coverage, 740,
10885 : GIR_Done,
10886 : // Label 871: @23537
10887 : GIM_Try, /*On fail goto*//*Label 872*/ 23560, // Rule ID 1577 //
10888 : GIM_CheckFeatures, GIFBS_UseAVX,
10889 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
10890 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
10891 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
10892 : // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
10893 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSrr,
10894 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10895 : // GIR_Coverage, 1577,
10896 : GIR_Done,
10897 : // Label 872: @23560
10898 : GIM_Try, /*On fail goto*//*Label 873*/ 23583, // Rule ID 1581 //
10899 : GIM_CheckFeatures, GIFBS_UseSSE1,
10900 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
10901 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
10902 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
10903 : // (fadd:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (ADDSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
10904 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSSrr,
10905 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10906 : // GIR_Coverage, 1581,
10907 : GIR_Done,
10908 : // Label 873: @23583
10909 : GIM_Try, /*On fail goto*//*Label 874*/ 23606, // Rule ID 5066 //
10910 : GIM_CheckFeatures, GIFBS_HasAVX512,
10911 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
10912 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
10913 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
10914 : // (fadd:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VADDSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
10915 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSSZrr,
10916 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10917 : // GIR_Coverage, 5066,
10918 : GIR_Done,
10919 : // Label 874: @23606
10920 : GIM_Reject,
10921 : // Label 870: @23607
10922 : GIM_Reject,
10923 : // Label 861: @23608
10924 : GIM_Try, /*On fail goto*//*Label 875*/ 23714,
10925 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
10926 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
10927 : GIM_Try, /*On fail goto*//*Label 876*/ 23644, // Rule ID 741 //
10928 : GIM_CheckFeatures, GIFBS_FPStackf64,
10929 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
10930 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
10931 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
10932 : // (fadd:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (ADD_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
10933 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp64,
10934 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
10935 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10936 : // GIR_Coverage, 741,
10937 : GIR_Done,
10938 : // Label 876: @23644
10939 : GIM_Try, /*On fail goto*//*Label 877*/ 23667, // Rule ID 1579 //
10940 : GIM_CheckFeatures, GIFBS_UseAVX,
10941 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
10942 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
10943 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
10944 : // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
10945 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDrr,
10946 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10947 : // GIR_Coverage, 1579,
10948 : GIR_Done,
10949 : // Label 877: @23667
10950 : GIM_Try, /*On fail goto*//*Label 878*/ 23690, // Rule ID 1583 //
10951 : GIM_CheckFeatures, GIFBS_UseSSE2,
10952 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
10953 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
10954 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
10955 : // (fadd:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (ADDSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
10956 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDSDrr,
10957 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10958 : // GIR_Coverage, 1583,
10959 : GIR_Done,
10960 : // Label 878: @23690
10961 : GIM_Try, /*On fail goto*//*Label 879*/ 23713, // Rule ID 5077 //
10962 : GIM_CheckFeatures, GIFBS_HasAVX512,
10963 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
10964 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
10965 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
10966 : // (fadd:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VADDSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
10967 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDSDZrr,
10968 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10969 : // GIR_Coverage, 5077,
10970 : GIR_Done,
10971 : // Label 879: @23713
10972 : GIM_Reject,
10973 : // Label 875: @23714
10974 : GIM_Reject,
10975 : // Label 862: @23715
10976 : GIM_Try, /*On fail goto*//*Label 880*/ 23747, // Rule ID 742 //
10977 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
10978 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
10979 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
10980 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
10981 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
10982 : // (fadd:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (ADD_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
10983 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADD_Fp80,
10984 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
10985 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
10986 : // GIR_Coverage, 742,
10987 : GIR_Done,
10988 : // Label 880: @23747
10989 : GIM_Reject,
10990 : // Label 863: @23748
10991 : GIM_Try, /*On fail goto*//*Label 881*/ 23828,
10992 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
10993 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
10994 : GIM_Try, /*On fail goto*//*Label 882*/ 23781, // Rule ID 1567 //
10995 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
10996 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
10997 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
10998 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
10999 : // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11000 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDrr,
11001 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11002 : // GIR_Coverage, 1567,
11003 : GIR_Done,
11004 : // Label 882: @23781
11005 : GIM_Try, /*On fail goto*//*Label 883*/ 23804, // Rule ID 1575 //
11006 : GIM_CheckFeatures, GIFBS_UseSSE2,
11007 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11008 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11009 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11010 : // (fadd:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (ADDPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11011 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPDrr,
11012 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11013 : // GIR_Coverage, 1575,
11014 : GIR_Done,
11015 : // Label 883: @23804
11016 : GIM_Try, /*On fail goto*//*Label 884*/ 23827, // Rule ID 5236 //
11017 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11018 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11019 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11020 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11021 : // (fadd:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VADDPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
11022 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ128rr,
11023 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11024 : // GIR_Coverage, 5236,
11025 : GIR_Done,
11026 : // Label 884: @23827
11027 : GIM_Reject,
11028 : // Label 881: @23828
11029 : GIM_Reject,
11030 : // Label 864: @23829
11031 : GIM_Try, /*On fail goto*//*Label 885*/ 23909,
11032 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
11033 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
11034 : GIM_Try, /*On fail goto*//*Label 886*/ 23862, // Rule ID 1565 //
11035 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11036 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11037 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11038 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11039 : // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11040 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSrr,
11041 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11042 : // GIR_Coverage, 1565,
11043 : GIR_Done,
11044 : // Label 886: @23862
11045 : GIM_Try, /*On fail goto*//*Label 887*/ 23885, // Rule ID 1573 //
11046 : GIM_CheckFeatures, GIFBS_UseSSE1,
11047 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11048 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11049 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11050 : // (fadd:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (ADDPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11051 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::ADDPSrr,
11052 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11053 : // GIR_Coverage, 1573,
11054 : GIR_Done,
11055 : // Label 887: @23885
11056 : GIM_Try, /*On fail goto*//*Label 888*/ 23908, // Rule ID 5218 //
11057 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11058 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11059 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11060 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11061 : // (fadd:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VADDPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
11062 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ128rr,
11063 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11064 : // GIR_Coverage, 5218,
11065 : GIR_Done,
11066 : // Label 888: @23908
11067 : GIM_Reject,
11068 : // Label 885: @23909
11069 : GIM_Reject,
11070 : // Label 865: @23910
11071 : GIM_Try, /*On fail goto*//*Label 889*/ 23967,
11072 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
11073 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
11074 : GIM_Try, /*On fail goto*//*Label 890*/ 23943, // Rule ID 1571 //
11075 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11076 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11077 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11078 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11079 : // (fadd:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VADDPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
11080 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDYrr,
11081 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11082 : // GIR_Coverage, 1571,
11083 : GIR_Done,
11084 : // Label 890: @23943
11085 : GIM_Try, /*On fail goto*//*Label 891*/ 23966, // Rule ID 5245 //
11086 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11087 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11088 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11089 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11090 : // (fadd:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VADDPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
11091 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZ256rr,
11092 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11093 : // GIR_Coverage, 5245,
11094 : GIR_Done,
11095 : // Label 891: @23966
11096 : GIM_Reject,
11097 : // Label 889: @23967
11098 : GIM_Reject,
11099 : // Label 866: @23968
11100 : GIM_Try, /*On fail goto*//*Label 892*/ 24025,
11101 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
11102 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
11103 : GIM_Try, /*On fail goto*//*Label 893*/ 24001, // Rule ID 1569 //
11104 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11105 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11106 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11107 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11108 : // (fadd:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VADDPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
11109 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSYrr,
11110 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11111 : // GIR_Coverage, 1569,
11112 : GIR_Done,
11113 : // Label 893: @24001
11114 : GIM_Try, /*On fail goto*//*Label 894*/ 24024, // Rule ID 5227 //
11115 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11116 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11117 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11118 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11119 : // (fadd:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VADDPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
11120 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZ256rr,
11121 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11122 : // GIR_Coverage, 5227,
11123 : GIR_Done,
11124 : // Label 894: @24024
11125 : GIM_Reject,
11126 : // Label 892: @24025
11127 : GIM_Reject,
11128 : // Label 867: @24026
11129 : GIM_Try, /*On fail goto*//*Label 895*/ 24057, // Rule ID 5209 //
11130 : GIM_CheckFeatures, GIFBS_HasAVX512,
11131 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
11132 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
11133 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11134 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11135 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
11136 : // (fadd:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VADDPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
11137 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPDZrr,
11138 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11139 : // GIR_Coverage, 5209,
11140 : GIR_Done,
11141 : // Label 895: @24057
11142 : GIM_Reject,
11143 : // Label 868: @24058
11144 : GIM_Try, /*On fail goto*//*Label 896*/ 24089, // Rule ID 5200 //
11145 : GIM_CheckFeatures, GIFBS_HasAVX512,
11146 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
11147 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
11148 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11149 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11150 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
11151 : // (fadd:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VADDPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
11152 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VADDPSZrr,
11153 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11154 : // GIR_Coverage, 5200,
11155 : GIR_Done,
11156 : // Label 896: @24089
11157 : GIM_Reject,
11158 : // Label 869: @24090
11159 : GIM_Reject,
11160 : // Label 19: @24091
11161 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 906*/ 24703,
11162 : /*GILLT_s32*//*Label 897*/ 24114,
11163 : /*GILLT_s64*//*Label 898*/ 24221,
11164 : /*GILLT_s80*//*Label 899*/ 24328, 0, 0,
11165 : /*GILLT_v2s64*//*Label 900*/ 24361, 0,
11166 : /*GILLT_v4s32*//*Label 901*/ 24442,
11167 : /*GILLT_v4s64*//*Label 902*/ 24523, 0, 0,
11168 : /*GILLT_v8s32*//*Label 903*/ 24581,
11169 : /*GILLT_v8s64*//*Label 904*/ 24639, 0, 0, 0,
11170 : /*GILLT_v16s32*//*Label 905*/ 24671,
11171 : // Label 897: @24114
11172 : GIM_Try, /*On fail goto*//*Label 907*/ 24220,
11173 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
11174 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
11175 : GIM_Try, /*On fail goto*//*Label 908*/ 24150, // Rule ID 743 //
11176 : GIM_CheckFeatures, GIFBS_FPStackf32,
11177 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
11178 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
11179 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
11180 : // (fsub:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (SUB_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
11181 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp32,
11182 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11183 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11184 : // GIR_Coverage, 743,
11185 : GIR_Done,
11186 : // Label 908: @24150
11187 : GIM_Try, /*On fail goto*//*Label 909*/ 24173, // Rule ID 1617 //
11188 : GIM_CheckFeatures, GIFBS_UseAVX,
11189 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
11190 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
11191 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
11192 : // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VSUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
11193 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSrr,
11194 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11195 : // GIR_Coverage, 1617,
11196 : GIR_Done,
11197 : // Label 909: @24173
11198 : GIM_Try, /*On fail goto*//*Label 910*/ 24196, // Rule ID 1621 //
11199 : GIM_CheckFeatures, GIFBS_UseSSE1,
11200 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
11201 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
11202 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
11203 : // (fsub:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (SUBSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
11204 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSSrr,
11205 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11206 : // GIR_Coverage, 1621,
11207 : GIR_Done,
11208 : // Label 910: @24196
11209 : GIM_Try, /*On fail goto*//*Label 911*/ 24219, // Rule ID 5110 //
11210 : GIM_CheckFeatures, GIFBS_HasAVX512,
11211 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
11212 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
11213 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
11214 : // (fsub:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VSUBSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
11215 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSSZrr,
11216 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11217 : // GIR_Coverage, 5110,
11218 : GIR_Done,
11219 : // Label 911: @24219
11220 : GIM_Reject,
11221 : // Label 907: @24220
11222 : GIM_Reject,
11223 : // Label 898: @24221
11224 : GIM_Try, /*On fail goto*//*Label 912*/ 24327,
11225 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
11226 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
11227 : GIM_Try, /*On fail goto*//*Label 913*/ 24257, // Rule ID 744 //
11228 : GIM_CheckFeatures, GIFBS_FPStackf64,
11229 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
11230 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
11231 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
11232 : // (fsub:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (SUB_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
11233 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp64,
11234 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11235 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11236 : // GIR_Coverage, 744,
11237 : GIR_Done,
11238 : // Label 913: @24257
11239 : GIM_Try, /*On fail goto*//*Label 914*/ 24280, // Rule ID 1619 //
11240 : GIM_CheckFeatures, GIFBS_UseAVX,
11241 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
11242 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
11243 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
11244 : // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VSUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
11245 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDrr,
11246 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11247 : // GIR_Coverage, 1619,
11248 : GIR_Done,
11249 : // Label 914: @24280
11250 : GIM_Try, /*On fail goto*//*Label 915*/ 24303, // Rule ID 1623 //
11251 : GIM_CheckFeatures, GIFBS_UseSSE2,
11252 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
11253 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
11254 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
11255 : // (fsub:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (SUBSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
11256 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBSDrr,
11257 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11258 : // GIR_Coverage, 1623,
11259 : GIR_Done,
11260 : // Label 915: @24303
11261 : GIM_Try, /*On fail goto*//*Label 916*/ 24326, // Rule ID 5121 //
11262 : GIM_CheckFeatures, GIFBS_HasAVX512,
11263 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
11264 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
11265 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
11266 : // (fsub:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VSUBSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
11267 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBSDZrr,
11268 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11269 : // GIR_Coverage, 5121,
11270 : GIR_Done,
11271 : // Label 916: @24326
11272 : GIM_Reject,
11273 : // Label 912: @24327
11274 : GIM_Reject,
11275 : // Label 899: @24328
11276 : GIM_Try, /*On fail goto*//*Label 917*/ 24360, // Rule ID 745 //
11277 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
11278 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
11279 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
11280 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
11281 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
11282 : // (fsub:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (SUB_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
11283 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUB_Fp80,
11284 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11285 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11286 : // GIR_Coverage, 745,
11287 : GIR_Done,
11288 : // Label 917: @24360
11289 : GIM_Reject,
11290 : // Label 900: @24361
11291 : GIM_Try, /*On fail goto*//*Label 918*/ 24441,
11292 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
11293 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
11294 : GIM_Try, /*On fail goto*//*Label 919*/ 24394, // Rule ID 1607 //
11295 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11296 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11297 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11298 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11299 : // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VSUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11300 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDrr,
11301 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11302 : // GIR_Coverage, 1607,
11303 : GIR_Done,
11304 : // Label 919: @24394
11305 : GIM_Try, /*On fail goto*//*Label 920*/ 24417, // Rule ID 1615 //
11306 : GIM_CheckFeatures, GIFBS_UseSSE2,
11307 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11308 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11309 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11310 : // (fsub:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (SUBPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11311 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPDrr,
11312 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11313 : // GIR_Coverage, 1615,
11314 : GIR_Done,
11315 : // Label 920: @24417
11316 : GIM_Try, /*On fail goto*//*Label 921*/ 24440, // Rule ID 5356 //
11317 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11318 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11319 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11320 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11321 : // (fsub:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VSUBPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
11322 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ128rr,
11323 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11324 : // GIR_Coverage, 5356,
11325 : GIR_Done,
11326 : // Label 921: @24440
11327 : GIM_Reject,
11328 : // Label 918: @24441
11329 : GIM_Reject,
11330 : // Label 901: @24442
11331 : GIM_Try, /*On fail goto*//*Label 922*/ 24522,
11332 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
11333 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
11334 : GIM_Try, /*On fail goto*//*Label 923*/ 24475, // Rule ID 1605 //
11335 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11336 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11337 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11338 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11339 : // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VSUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11340 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSrr,
11341 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11342 : // GIR_Coverage, 1605,
11343 : GIR_Done,
11344 : // Label 923: @24475
11345 : GIM_Try, /*On fail goto*//*Label 924*/ 24498, // Rule ID 1613 //
11346 : GIM_CheckFeatures, GIFBS_UseSSE1,
11347 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11348 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11350 : // (fsub:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (SUBPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11351 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::SUBPSrr,
11352 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11353 : // GIR_Coverage, 1613,
11354 : GIR_Done,
11355 : // Label 924: @24498
11356 : GIM_Try, /*On fail goto*//*Label 925*/ 24521, // Rule ID 5338 //
11357 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11358 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11359 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11360 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11361 : // (fsub:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VSUBPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
11362 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ128rr,
11363 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11364 : // GIR_Coverage, 5338,
11365 : GIR_Done,
11366 : // Label 925: @24521
11367 : GIM_Reject,
11368 : // Label 922: @24522
11369 : GIM_Reject,
11370 : // Label 902: @24523
11371 : GIM_Try, /*On fail goto*//*Label 926*/ 24580,
11372 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
11373 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
11374 : GIM_Try, /*On fail goto*//*Label 927*/ 24556, // Rule ID 1611 //
11375 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11376 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11377 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11378 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11379 : // (fsub:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VSUBPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
11380 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDYrr,
11381 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11382 : // GIR_Coverage, 1611,
11383 : GIR_Done,
11384 : // Label 927: @24556
11385 : GIM_Try, /*On fail goto*//*Label 928*/ 24579, // Rule ID 5365 //
11386 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11387 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11388 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11389 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11390 : // (fsub:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VSUBPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
11391 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZ256rr,
11392 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11393 : // GIR_Coverage, 5365,
11394 : GIR_Done,
11395 : // Label 928: @24579
11396 : GIM_Reject,
11397 : // Label 926: @24580
11398 : GIM_Reject,
11399 : // Label 903: @24581
11400 : GIM_Try, /*On fail goto*//*Label 929*/ 24638,
11401 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
11402 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
11403 : GIM_Try, /*On fail goto*//*Label 930*/ 24614, // Rule ID 1609 //
11404 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11405 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11406 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11407 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11408 : // (fsub:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VSUBPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
11409 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSYrr,
11410 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11411 : // GIR_Coverage, 1609,
11412 : GIR_Done,
11413 : // Label 930: @24614
11414 : GIM_Try, /*On fail goto*//*Label 931*/ 24637, // Rule ID 5347 //
11415 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11416 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11417 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11418 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11419 : // (fsub:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VSUBPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
11420 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZ256rr,
11421 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11422 : // GIR_Coverage, 5347,
11423 : GIR_Done,
11424 : // Label 931: @24637
11425 : GIM_Reject,
11426 : // Label 929: @24638
11427 : GIM_Reject,
11428 : // Label 904: @24639
11429 : GIM_Try, /*On fail goto*//*Label 932*/ 24670, // Rule ID 5329 //
11430 : GIM_CheckFeatures, GIFBS_HasAVX512,
11431 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
11432 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
11433 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11434 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11435 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
11436 : // (fsub:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VSUBPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
11437 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPDZrr,
11438 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11439 : // GIR_Coverage, 5329,
11440 : GIR_Done,
11441 : // Label 932: @24670
11442 : GIM_Reject,
11443 : // Label 905: @24671
11444 : GIM_Try, /*On fail goto*//*Label 933*/ 24702, // Rule ID 5320 //
11445 : GIM_CheckFeatures, GIFBS_HasAVX512,
11446 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
11447 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
11448 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11449 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11450 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
11451 : // (fsub:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VSUBPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
11452 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VSUBPSZrr,
11453 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11454 : // GIR_Coverage, 5320,
11455 : GIR_Done,
11456 : // Label 933: @24702
11457 : GIM_Reject,
11458 : // Label 906: @24703
11459 : GIM_Reject,
11460 : // Label 20: @24704
11461 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 943*/ 25316,
11462 : /*GILLT_s32*//*Label 934*/ 24727,
11463 : /*GILLT_s64*//*Label 935*/ 24834,
11464 : /*GILLT_s80*//*Label 936*/ 24941, 0, 0,
11465 : /*GILLT_v2s64*//*Label 937*/ 24974, 0,
11466 : /*GILLT_v4s32*//*Label 938*/ 25055,
11467 : /*GILLT_v4s64*//*Label 939*/ 25136, 0, 0,
11468 : /*GILLT_v8s32*//*Label 940*/ 25194,
11469 : /*GILLT_v8s64*//*Label 941*/ 25252, 0, 0, 0,
11470 : /*GILLT_v16s32*//*Label 942*/ 25284,
11471 : // Label 934: @24727
11472 : GIM_Try, /*On fail goto*//*Label 944*/ 24833,
11473 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
11474 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
11475 : GIM_Try, /*On fail goto*//*Label 945*/ 24763, // Rule ID 746 //
11476 : GIM_CheckFeatures, GIFBS_FPStackf32,
11477 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
11478 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
11479 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
11480 : // (fmul:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (MUL_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
11481 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp32,
11482 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11483 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11484 : // GIR_Coverage, 746,
11485 : GIR_Done,
11486 : // Label 945: @24763
11487 : GIM_Try, /*On fail goto*//*Label 946*/ 24786, // Rule ID 1597 //
11488 : GIM_CheckFeatures, GIFBS_UseAVX,
11489 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
11490 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
11491 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
11492 : // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VMULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
11493 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSrr,
11494 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11495 : // GIR_Coverage, 1597,
11496 : GIR_Done,
11497 : // Label 946: @24786
11498 : GIM_Try, /*On fail goto*//*Label 947*/ 24809, // Rule ID 1601 //
11499 : GIM_CheckFeatures, GIFBS_UseSSE1,
11500 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
11501 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
11502 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
11503 : // (fmul:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (MULSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
11504 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSSrr,
11505 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11506 : // GIR_Coverage, 1601,
11507 : GIR_Done,
11508 : // Label 947: @24809
11509 : GIM_Try, /*On fail goto*//*Label 948*/ 24832, // Rule ID 5088 //
11510 : GIM_CheckFeatures, GIFBS_HasAVX512,
11511 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
11512 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
11513 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
11514 : // (fmul:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VMULSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
11515 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSSZrr,
11516 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11517 : // GIR_Coverage, 5088,
11518 : GIR_Done,
11519 : // Label 948: @24832
11520 : GIM_Reject,
11521 : // Label 944: @24833
11522 : GIM_Reject,
11523 : // Label 935: @24834
11524 : GIM_Try, /*On fail goto*//*Label 949*/ 24940,
11525 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
11526 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
11527 : GIM_Try, /*On fail goto*//*Label 950*/ 24870, // Rule ID 747 //
11528 : GIM_CheckFeatures, GIFBS_FPStackf64,
11529 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
11530 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
11531 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
11532 : // (fmul:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (MUL_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
11533 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp64,
11534 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11535 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11536 : // GIR_Coverage, 747,
11537 : GIR_Done,
11538 : // Label 950: @24870
11539 : GIM_Try, /*On fail goto*//*Label 951*/ 24893, // Rule ID 1599 //
11540 : GIM_CheckFeatures, GIFBS_UseAVX,
11541 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
11542 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
11543 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
11544 : // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VMULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
11545 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDrr,
11546 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11547 : // GIR_Coverage, 1599,
11548 : GIR_Done,
11549 : // Label 951: @24893
11550 : GIM_Try, /*On fail goto*//*Label 952*/ 24916, // Rule ID 1603 //
11551 : GIM_CheckFeatures, GIFBS_UseSSE2,
11552 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
11553 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
11554 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
11555 : // (fmul:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (MULSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
11556 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULSDrr,
11557 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11558 : // GIR_Coverage, 1603,
11559 : GIR_Done,
11560 : // Label 952: @24916
11561 : GIM_Try, /*On fail goto*//*Label 953*/ 24939, // Rule ID 5099 //
11562 : GIM_CheckFeatures, GIFBS_HasAVX512,
11563 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
11564 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
11565 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
11566 : // (fmul:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VMULSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
11567 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULSDZrr,
11568 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11569 : // GIR_Coverage, 5099,
11570 : GIR_Done,
11571 : // Label 953: @24939
11572 : GIM_Reject,
11573 : // Label 949: @24940
11574 : GIM_Reject,
11575 : // Label 936: @24941
11576 : GIM_Try, /*On fail goto*//*Label 954*/ 24973, // Rule ID 748 //
11577 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
11578 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
11579 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
11580 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
11581 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
11582 : // (fmul:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (MUL_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
11583 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MUL_Fp80,
11584 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11585 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11586 : // GIR_Coverage, 748,
11587 : GIR_Done,
11588 : // Label 954: @24973
11589 : GIM_Reject,
11590 : // Label 937: @24974
11591 : GIM_Try, /*On fail goto*//*Label 955*/ 25054,
11592 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
11593 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
11594 : GIM_Try, /*On fail goto*//*Label 956*/ 25007, // Rule ID 1587 //
11595 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11596 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11597 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11598 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11599 : // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VMULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11600 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDrr,
11601 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11602 : // GIR_Coverage, 1587,
11603 : GIR_Done,
11604 : // Label 956: @25007
11605 : GIM_Try, /*On fail goto*//*Label 957*/ 25030, // Rule ID 1595 //
11606 : GIM_CheckFeatures, GIFBS_UseSSE2,
11607 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11608 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11609 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11610 : // (fmul:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (MULPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11611 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPDrr,
11612 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11613 : // GIR_Coverage, 1595,
11614 : GIR_Done,
11615 : // Label 957: @25030
11616 : GIM_Try, /*On fail goto*//*Label 958*/ 25053, // Rule ID 5296 //
11617 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11618 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11619 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11620 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11621 : // (fmul:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VMULPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
11622 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ128rr,
11623 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11624 : // GIR_Coverage, 5296,
11625 : GIR_Done,
11626 : // Label 958: @25053
11627 : GIM_Reject,
11628 : // Label 955: @25054
11629 : GIM_Reject,
11630 : // Label 938: @25055
11631 : GIM_Try, /*On fail goto*//*Label 959*/ 25135,
11632 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
11633 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
11634 : GIM_Try, /*On fail goto*//*Label 960*/ 25088, // Rule ID 1585 //
11635 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11636 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11637 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11638 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11639 : // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VMULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11640 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSrr,
11641 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11642 : // GIR_Coverage, 1585,
11643 : GIR_Done,
11644 : // Label 960: @25088
11645 : GIM_Try, /*On fail goto*//*Label 961*/ 25111, // Rule ID 1593 //
11646 : GIM_CheckFeatures, GIFBS_UseSSE1,
11647 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11648 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11649 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11650 : // (fmul:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (MULPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11651 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::MULPSrr,
11652 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11653 : // GIR_Coverage, 1593,
11654 : GIR_Done,
11655 : // Label 961: @25111
11656 : GIM_Try, /*On fail goto*//*Label 962*/ 25134, // Rule ID 5278 //
11657 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11658 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11659 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11660 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11661 : // (fmul:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VMULPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
11662 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ128rr,
11663 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11664 : // GIR_Coverage, 5278,
11665 : GIR_Done,
11666 : // Label 962: @25134
11667 : GIM_Reject,
11668 : // Label 959: @25135
11669 : GIM_Reject,
11670 : // Label 939: @25136
11671 : GIM_Try, /*On fail goto*//*Label 963*/ 25193,
11672 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
11673 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
11674 : GIM_Try, /*On fail goto*//*Label 964*/ 25169, // Rule ID 1591 //
11675 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11676 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11677 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11678 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11679 : // (fmul:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VMULPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
11680 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDYrr,
11681 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11682 : // GIR_Coverage, 1591,
11683 : GIR_Done,
11684 : // Label 964: @25169
11685 : GIM_Try, /*On fail goto*//*Label 965*/ 25192, // Rule ID 5305 //
11686 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11687 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11688 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11689 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11690 : // (fmul:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VMULPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
11691 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZ256rr,
11692 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11693 : // GIR_Coverage, 5305,
11694 : GIR_Done,
11695 : // Label 965: @25192
11696 : GIM_Reject,
11697 : // Label 963: @25193
11698 : GIM_Reject,
11699 : // Label 940: @25194
11700 : GIM_Try, /*On fail goto*//*Label 966*/ 25251,
11701 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
11702 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
11703 : GIM_Try, /*On fail goto*//*Label 967*/ 25227, // Rule ID 1589 //
11704 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11705 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11706 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11707 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11708 : // (fmul:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VMULPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
11709 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSYrr,
11710 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11711 : // GIR_Coverage, 1589,
11712 : GIR_Done,
11713 : // Label 967: @25227
11714 : GIM_Try, /*On fail goto*//*Label 968*/ 25250, // Rule ID 5287 //
11715 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11716 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11717 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11718 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11719 : // (fmul:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VMULPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
11720 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZ256rr,
11721 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11722 : // GIR_Coverage, 5287,
11723 : GIR_Done,
11724 : // Label 968: @25250
11725 : GIM_Reject,
11726 : // Label 966: @25251
11727 : GIM_Reject,
11728 : // Label 941: @25252
11729 : GIM_Try, /*On fail goto*//*Label 969*/ 25283, // Rule ID 5269 //
11730 : GIM_CheckFeatures, GIFBS_HasAVX512,
11731 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
11732 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
11733 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11734 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11735 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
11736 : // (fmul:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VMULPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
11737 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPDZrr,
11738 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11739 : // GIR_Coverage, 5269,
11740 : GIR_Done,
11741 : // Label 969: @25283
11742 : GIM_Reject,
11743 : // Label 942: @25284
11744 : GIM_Try, /*On fail goto*//*Label 970*/ 25315, // Rule ID 5260 //
11745 : GIM_CheckFeatures, GIFBS_HasAVX512,
11746 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
11747 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
11748 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
11749 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
11750 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
11751 : // (fmul:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VMULPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
11752 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VMULPSZrr,
11753 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11754 : // GIR_Coverage, 5260,
11755 : GIR_Done,
11756 : // Label 970: @25315
11757 : GIM_Reject,
11758 : // Label 943: @25316
11759 : GIM_Reject,
11760 : // Label 21: @25317
11761 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 980*/ 25929,
11762 : /*GILLT_s32*//*Label 971*/ 25340,
11763 : /*GILLT_s64*//*Label 972*/ 25447,
11764 : /*GILLT_s80*//*Label 973*/ 25554, 0, 0,
11765 : /*GILLT_v2s64*//*Label 974*/ 25587, 0,
11766 : /*GILLT_v4s32*//*Label 975*/ 25668,
11767 : /*GILLT_v4s64*//*Label 976*/ 25749, 0, 0,
11768 : /*GILLT_v8s32*//*Label 977*/ 25807,
11769 : /*GILLT_v8s64*//*Label 978*/ 25865, 0, 0, 0,
11770 : /*GILLT_v16s32*//*Label 979*/ 25897,
11771 : // Label 971: @25340
11772 : GIM_Try, /*On fail goto*//*Label 981*/ 25446,
11773 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
11774 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s32,
11775 : GIM_Try, /*On fail goto*//*Label 982*/ 25376, // Rule ID 749 //
11776 : GIM_CheckFeatures, GIFBS_FPStackf32,
11777 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
11778 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
11779 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP32RegClassID,
11780 : // (fdiv:{ *:[f32] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2) => (DIV_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src1, RFP32:{ *:[f32] }:$src2)
11781 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp32,
11782 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11783 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11784 : // GIR_Coverage, 749,
11785 : GIR_Done,
11786 : // Label 982: @25376
11787 : GIM_Try, /*On fail goto*//*Label 983*/ 25399, // Rule ID 1637 //
11788 : GIM_CheckFeatures, GIFBS_UseAVX,
11789 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
11790 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
11791 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
11792 : // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (VDIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
11793 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSrr,
11794 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11795 : // GIR_Coverage, 1637,
11796 : GIR_Done,
11797 : // Label 983: @25399
11798 : GIM_Try, /*On fail goto*//*Label 984*/ 25422, // Rule ID 1641 //
11799 : GIM_CheckFeatures, GIFBS_UseSSE1,
11800 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
11801 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
11802 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32RegClassID,
11803 : // (fdiv:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2) => (DIVSSrr:{ *:[f32] } FR32:{ *:[f32] }:$src1, FR32:{ *:[f32] }:$src2)
11804 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSSrr,
11805 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11806 : // GIR_Coverage, 1641,
11807 : GIR_Done,
11808 : // Label 984: @25422
11809 : GIM_Try, /*On fail goto*//*Label 985*/ 25445, // Rule ID 5132 //
11810 : GIM_CheckFeatures, GIFBS_HasAVX512,
11811 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
11812 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
11813 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR32XRegClassID,
11814 : // (fdiv:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2) => (VDIVSSZrr:{ *:[f32] } FR32X:{ *:[f32] }:$src1, FR32X:{ *:[f32] }:$src2)
11815 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSSZrr,
11816 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11817 : // GIR_Coverage, 5132,
11818 : GIR_Done,
11819 : // Label 985: @25445
11820 : GIM_Reject,
11821 : // Label 981: @25446
11822 : GIM_Reject,
11823 : // Label 972: @25447
11824 : GIM_Try, /*On fail goto*//*Label 986*/ 25553,
11825 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
11826 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s64,
11827 : GIM_Try, /*On fail goto*//*Label 987*/ 25483, // Rule ID 750 //
11828 : GIM_CheckFeatures, GIFBS_FPStackf64,
11829 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
11830 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
11831 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP64RegClassID,
11832 : // (fdiv:{ *:[f64] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2) => (DIV_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src1, RFP64:{ *:[f64] }:$src2)
11833 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp64,
11834 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11835 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11836 : // GIR_Coverage, 750,
11837 : GIR_Done,
11838 : // Label 987: @25483
11839 : GIM_Try, /*On fail goto*//*Label 988*/ 25506, // Rule ID 1639 //
11840 : GIM_CheckFeatures, GIFBS_UseAVX,
11841 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
11842 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
11843 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
11844 : // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (VDIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
11845 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDrr,
11846 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11847 : // GIR_Coverage, 1639,
11848 : GIR_Done,
11849 : // Label 988: @25506
11850 : GIM_Try, /*On fail goto*//*Label 989*/ 25529, // Rule ID 1643 //
11851 : GIM_CheckFeatures, GIFBS_UseSSE2,
11852 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
11853 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
11854 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64RegClassID,
11855 : // (fdiv:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2) => (DIVSDrr:{ *:[f64] } FR64:{ *:[f64] }:$src1, FR64:{ *:[f64] }:$src2)
11856 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVSDrr,
11857 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11858 : // GIR_Coverage, 1643,
11859 : GIR_Done,
11860 : // Label 989: @25529
11861 : GIM_Try, /*On fail goto*//*Label 990*/ 25552, // Rule ID 5143 //
11862 : GIM_CheckFeatures, GIFBS_HasAVX512,
11863 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
11864 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
11865 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::FR64XRegClassID,
11866 : // (fdiv:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2) => (VDIVSDZrr:{ *:[f64] } FR64X:{ *:[f64] }:$src1, FR64X:{ *:[f64] }:$src2)
11867 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVSDZrr,
11868 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11869 : // GIR_Coverage, 5143,
11870 : GIR_Done,
11871 : // Label 990: @25552
11872 : GIM_Reject,
11873 : // Label 986: @25553
11874 : GIM_Reject,
11875 : // Label 973: @25554
11876 : GIM_Try, /*On fail goto*//*Label 991*/ 25586, // Rule ID 751 //
11877 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
11878 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_s80,
11879 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
11880 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
11881 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::RFP80RegClassID,
11882 : // (fdiv:{ *:[f80] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2) => (DIV_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src1, RFP80:{ *:[f80] }:$src2)
11883 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIV_Fp80,
11884 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
11885 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11886 : // GIR_Coverage, 751,
11887 : GIR_Done,
11888 : // Label 991: @25586
11889 : GIM_Reject,
11890 : // Label 974: @25587
11891 : GIM_Try, /*On fail goto*//*Label 992*/ 25667,
11892 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
11893 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v2s64,
11894 : GIM_Try, /*On fail goto*//*Label 993*/ 25620, // Rule ID 1627 //
11895 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11896 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11897 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11898 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11899 : // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (VDIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11900 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDrr,
11901 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11902 : // GIR_Coverage, 1627,
11903 : GIR_Done,
11904 : // Label 993: @25620
11905 : GIM_Try, /*On fail goto*//*Label 994*/ 25643, // Rule ID 1635 //
11906 : GIM_CheckFeatures, GIFBS_UseSSE2,
11907 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11908 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11909 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11910 : // (fdiv:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2) => (DIVPDrr:{ *:[v2f64] } VR128:{ *:[v2f64] }:$src1, VR128:{ *:[v2f64] }:$src2)
11911 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPDrr,
11912 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11913 : // GIR_Coverage, 1635,
11914 : GIR_Done,
11915 : // Label 994: @25643
11916 : GIM_Try, /*On fail goto*//*Label 995*/ 25666, // Rule ID 5416 //
11917 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11918 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11919 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11920 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11921 : // (fdiv:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2) => (VDIVPDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2f64] }:$src1, VR128X:{ *:[v2f64] }:$src2)
11922 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ128rr,
11923 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11924 : // GIR_Coverage, 5416,
11925 : GIR_Done,
11926 : // Label 995: @25666
11927 : GIM_Reject,
11928 : // Label 992: @25667
11929 : GIM_Reject,
11930 : // Label 975: @25668
11931 : GIM_Try, /*On fail goto*//*Label 996*/ 25748,
11932 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
11933 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s32,
11934 : GIM_Try, /*On fail goto*//*Label 997*/ 25701, // Rule ID 1625 //
11935 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11936 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11937 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11938 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11939 : // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (VDIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11940 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSrr,
11941 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11942 : // GIR_Coverage, 1625,
11943 : GIR_Done,
11944 : // Label 997: @25701
11945 : GIM_Try, /*On fail goto*//*Label 998*/ 25724, // Rule ID 1633 //
11946 : GIM_CheckFeatures, GIFBS_UseSSE1,
11947 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
11948 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
11949 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128RegClassID,
11950 : // (fdiv:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2) => (DIVPSrr:{ *:[v4f32] } VR128:{ *:[v4f32] }:$src1, VR128:{ *:[v4f32] }:$src2)
11951 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::DIVPSrr,
11952 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11953 : // GIR_Coverage, 1633,
11954 : GIR_Done,
11955 : // Label 998: @25724
11956 : GIM_Try, /*On fail goto*//*Label 999*/ 25747, // Rule ID 5398 //
11957 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11958 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
11959 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
11960 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR128XRegClassID,
11961 : // (fdiv:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2) => (VDIVPSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4f32] }:$src1, VR128X:{ *:[v4f32] }:$src2)
11962 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ128rr,
11963 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11964 : // GIR_Coverage, 5398,
11965 : GIR_Done,
11966 : // Label 999: @25747
11967 : GIM_Reject,
11968 : // Label 996: @25748
11969 : GIM_Reject,
11970 : // Label 976: @25749
11971 : GIM_Try, /*On fail goto*//*Label 1000*/ 25806,
11972 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
11973 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v4s64,
11974 : GIM_Try, /*On fail goto*//*Label 1001*/ 25782, // Rule ID 1631 //
11975 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
11976 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
11977 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
11978 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
11979 : // (fdiv:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2) => (VDIVPDYrr:{ *:[v4f64] } VR256:{ *:[v4f64] }:$src1, VR256:{ *:[v4f64] }:$src2)
11980 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDYrr,
11981 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11982 : // GIR_Coverage, 1631,
11983 : GIR_Done,
11984 : // Label 1001: @25782
11985 : GIM_Try, /*On fail goto*//*Label 1002*/ 25805, // Rule ID 5425 //
11986 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
11987 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
11988 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
11989 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
11990 : // (fdiv:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2) => (VDIVPDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4f64] }:$src1, VR256X:{ *:[v4f64] }:$src2)
11991 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZ256rr,
11992 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
11993 : // GIR_Coverage, 5425,
11994 : GIR_Done,
11995 : // Label 1002: @25805
11996 : GIM_Reject,
11997 : // Label 1000: @25806
11998 : GIM_Reject,
11999 : // Label 977: @25807
12000 : GIM_Try, /*On fail goto*//*Label 1003*/ 25864,
12001 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12002 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s32,
12003 : GIM_Try, /*On fail goto*//*Label 1004*/ 25840, // Rule ID 1629 //
12004 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
12005 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
12006 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
12007 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256RegClassID,
12008 : // (fdiv:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2) => (VDIVPSYrr:{ *:[v8f32] } VR256:{ *:[v8f32] }:$src1, VR256:{ *:[v8f32] }:$src2)
12009 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSYrr,
12010 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12011 : // GIR_Coverage, 1629,
12012 : GIR_Done,
12013 : // Label 1004: @25840
12014 : GIM_Try, /*On fail goto*//*Label 1005*/ 25863, // Rule ID 5407 //
12015 : GIM_CheckFeatures, GIFBS_HasAVX512_HasVLX,
12016 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12017 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12018 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR256XRegClassID,
12019 : // (fdiv:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2) => (VDIVPSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8f32] }:$src1, VR256X:{ *:[v8f32] }:$src2)
12020 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZ256rr,
12021 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12022 : // GIR_Coverage, 5407,
12023 : GIR_Done,
12024 : // Label 1005: @25863
12025 : GIM_Reject,
12026 : // Label 1003: @25864
12027 : GIM_Reject,
12028 : // Label 978: @25865
12029 : GIM_Try, /*On fail goto*//*Label 1006*/ 25896, // Rule ID 5389 //
12030 : GIM_CheckFeatures, GIFBS_HasAVX512,
12031 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
12032 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v8s64,
12033 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12034 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12035 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
12036 : // (fdiv:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2) => (VDIVPDZrr:{ *:[v8f64] } VR512:{ *:[v8f64] }:$src1, VR512:{ *:[v8f64] }:$src2)
12037 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPDZrr,
12038 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12039 : // GIR_Coverage, 5389,
12040 : GIR_Done,
12041 : // Label 1006: @25896
12042 : GIM_Reject,
12043 : // Label 979: @25897
12044 : GIM_Try, /*On fail goto*//*Label 1007*/ 25928, // Rule ID 5380 //
12045 : GIM_CheckFeatures, GIFBS_HasAVX512,
12046 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
12047 : GIM_CheckType, /*MI*/0, /*Op*/2, /*Type*/GILLT_v16s32,
12048 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12049 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12050 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/2, /*RC*/X86::VR512RegClassID,
12051 : // (fdiv:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2) => (VDIVPSZrr:{ *:[v16f32] } VR512:{ *:[v16f32] }:$src1, VR512:{ *:[v16f32] }:$src2)
12052 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VDIVPSZrr,
12053 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12054 : // GIR_Coverage, 5380,
12055 : GIR_Done,
12056 : // Label 1007: @25928
12057 : GIM_Reject,
12058 : // Label 980: @25929
12059 : GIM_Reject,
12060 : // Label 22: @25930
12061 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 6, /*)*//*default:*//*Label 1011*/ 26018,
12062 : /*GILLT_s32*//*Label 1008*/ 25939,
12063 : /*GILLT_s64*//*Label 1009*/ 25966,
12064 : /*GILLT_s80*//*Label 1010*/ 25993,
12065 : // Label 1008: @25939
12066 : GIM_Try, /*On fail goto*//*Label 1012*/ 25965, // Rule ID 818 //
12067 : GIM_CheckFeatures, GIFBS_FPStackf32,
12068 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12069 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
12070 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
12071 : // (fneg:{ *:[f32] } RFP32:{ *:[f32] }:$src) => (CHS_Fp32:{ *:[f32] }:{ *:[i16] } RFP32:{ *:[f32] }:$src)
12072 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp32,
12073 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
12074 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12075 : // GIR_Coverage, 818,
12076 : GIR_Done,
12077 : // Label 1012: @25965
12078 : GIM_Reject,
12079 : // Label 1009: @25966
12080 : GIM_Try, /*On fail goto*//*Label 1013*/ 25992, // Rule ID 819 //
12081 : GIM_CheckFeatures, GIFBS_FPStackf64,
12082 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12083 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
12084 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
12085 : // (fneg:{ *:[f64] } RFP64:{ *:[f64] }:$src) => (CHS_Fp64:{ *:[f64] }:{ *:[i16] } RFP64:{ *:[f64] }:$src)
12086 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp64,
12087 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
12088 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12089 : // GIR_Coverage, 819,
12090 : GIR_Done,
12091 : // Label 1013: @25992
12092 : GIM_Reject,
12093 : // Label 1010: @25993
12094 : GIM_Try, /*On fail goto*//*Label 1014*/ 26017, // Rule ID 820 //
12095 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
12096 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
12097 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
12098 : // (fneg:{ *:[f80] } RFP80:{ *:[f80] }:$src) => (CHS_Fp80:{ *:[f80] }:{ *:[i16] } RFP80:{ *:[f80] }:$src)
12099 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CHS_Fp80,
12100 : GIR_AddImplicitDef, /*InsnID*/0, X86::FPSW,
12101 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12102 : // GIR_Coverage, 820,
12103 : GIR_Done,
12104 : // Label 1014: @26017
12105 : GIM_Reject,
12106 : // Label 1011: @26018
12107 : GIM_Reject,
12108 : // Label 23: @26019
12109 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/4, 16, /*)*//*default:*//*Label 1019*/ 26294,
12110 : /*GILLT_s64*//*Label 1015*/ 26037,
12111 : /*GILLT_s80*//*Label 1016*/ 26173, 0, 0, 0, 0, 0,
12112 : /*GILLT_v4s64*//*Label 1017*/ 26224, 0, 0, 0,
12113 : /*GILLT_v8s64*//*Label 1018*/ 26270,
12114 : // Label 1015: @26037
12115 : GIM_Try, /*On fail goto*//*Label 1020*/ 26172,
12116 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12117 : GIM_Try, /*On fail goto*//*Label 1021*/ 26062, // Rule ID 1403 //
12118 : GIM_CheckFeatures, GIFBS_UseSSE2,
12119 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
12120 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12121 : // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (CVTSS2SDrr:{ *:[f64] } FR32:{ *:[f32] }:$src)
12122 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSS2SDrr,
12123 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12124 : // GIR_Coverage, 1403,
12125 : GIR_Done,
12126 : // Label 1021: @26062
12127 : GIM_Try, /*On fail goto*//*Label 1022*/ 26083, // Rule ID 12290 //
12128 : GIM_CheckFeatures, GIFBS_FPStackf32,
12129 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
12130 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
12131 : // (fpextend:{ *:[f64] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP32:{ *:[f32] }:$src, RFP64:{ *:[i32] })
12132 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
12133 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP64*/55,
12134 : // GIR_Coverage, 12290,
12135 : GIR_Done,
12136 : // Label 1022: @26083
12137 : GIM_Try, /*On fail goto*//*Label 1023*/ 26127, // Rule ID 12436 //
12138 : GIM_CheckFeatures, GIFBS_UseAVX,
12139 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
12140 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12141 : // (fpextend:{ *:[f64] } FR32:{ *:[f32] }:$src) => (VCVTSS2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32:{ *:[f32] }:$src)
12142 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
12143 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12144 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12145 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12146 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDrr,
12147 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12148 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12149 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12150 : GIR_EraseFromParent, /*InsnID*/0,
12151 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12152 : // GIR_Coverage, 12436,
12153 : GIR_Done,
12154 : // Label 1023: @26127
12155 : GIM_Try, /*On fail goto*//*Label 1024*/ 26171, // Rule ID 14806 //
12156 : GIM_CheckFeatures, GIFBS_HasAVX512,
12157 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
12158 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
12159 : // (fpextend:{ *:[f64] } FR32X:{ *:[f32] }:$src) => (VCVTSS2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), FR32X:{ *:[f32] }:$src)
12160 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
12161 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12162 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12163 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12164 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSS2SDZrr,
12165 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12166 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12167 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12168 : GIR_EraseFromParent, /*InsnID*/0,
12169 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12170 : // GIR_Coverage, 14806,
12171 : GIR_Done,
12172 : // Label 1024: @26171
12173 : GIM_Reject,
12174 : // Label 1020: @26172
12175 : GIM_Reject,
12176 : // Label 1016: @26173
12177 : GIM_Try, /*On fail goto*//*Label 1025*/ 26198, // Rule ID 12291 //
12178 : GIM_CheckFeatures, GIFBS_FPStackf32,
12179 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12180 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
12181 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP32RegClassID,
12182 : // (fpextend:{ *:[f80] } RFP32:{ *:[f32] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP32:{ *:[f32] }:$src, RFP80:{ *:[i32] })
12183 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
12184 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP80*/95,
12185 : // GIR_Coverage, 12291,
12186 : GIR_Done,
12187 : // Label 1025: @26198
12188 : GIM_Try, /*On fail goto*//*Label 1026*/ 26223, // Rule ID 12292 //
12189 : GIM_CheckFeatures, GIFBS_FPStackf64,
12190 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12191 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP80RegClassID,
12192 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
12193 : // (fpextend:{ *:[f80] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f80] } RFP64:{ *:[f64] }:$src, RFP80:{ *:[i32] })
12194 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
12195 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP80*/95,
12196 : // GIR_Coverage, 12292,
12197 : GIR_Done,
12198 : // Label 1026: @26223
12199 : GIM_Reject,
12200 : // Label 1017: @26224
12201 : GIM_Try, /*On fail goto*//*Label 1027*/ 26269,
12202 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12203 : GIM_Try, /*On fail goto*//*Label 1028*/ 26249, // Rule ID 1431 //
12204 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
12205 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
12206 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
12207 : // (fpextend:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src) => (VCVTPS2PDYrr:{ *:[v4f64] } VR128:{ *:[v4f32] }:$src)
12208 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDYrr,
12209 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12210 : // GIR_Coverage, 1431,
12211 : GIR_Done,
12212 : // Label 1028: @26249
12213 : GIM_Try, /*On fail goto*//*Label 1029*/ 26268, // Rule ID 8155 //
12214 : GIM_CheckFeatures, GIFBS_HasVLX,
12215 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12216 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12217 : // (fpextend:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src) => (VCVTPS2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4f32] }:$src)
12218 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZ256rr,
12219 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12220 : // GIR_Coverage, 8155,
12221 : GIR_Done,
12222 : // Label 1029: @26268
12223 : GIM_Reject,
12224 : // Label 1027: @26269
12225 : GIM_Reject,
12226 : // Label 1018: @26270
12227 : GIM_Try, /*On fail goto*//*Label 1030*/ 26293, // Rule ID 8134 //
12228 : GIM_CheckFeatures, GIFBS_HasAVX512,
12229 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12230 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12231 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12232 : // (fpextend:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src) => (VCVTPS2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8f32] }:$src)
12233 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPS2PDZrr,
12234 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12235 : // GIR_Coverage, 8134,
12236 : GIR_Done,
12237 : // Label 1030: @26293
12238 : GIM_Reject,
12239 : // Label 1019: @26294
12240 : GIM_Reject,
12241 : // Label 24: @26295
12242 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 15, /*)*//*default:*//*Label 1035*/ 26579,
12243 : /*GILLT_s32*//*Label 1031*/ 26313,
12244 : /*GILLT_s64*//*Label 1032*/ 26483, 0, 0, 0, 0, 0,
12245 : /*GILLT_v4s32*//*Label 1033*/ 26509, 0, 0, 0,
12246 : /*GILLT_v8s32*//*Label 1034*/ 26555,
12247 : // Label 1031: @26313
12248 : GIM_Try, /*On fail goto*//*Label 1036*/ 26336, // Rule ID 1397 //
12249 : GIM_CheckFeatures, GIFBS_UseSSE2,
12250 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12251 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12252 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
12253 : // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (CVTSD2SSrr:{ *:[f32] } FR64:{ *:[f64] }:$src)
12254 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSD2SSrr,
12255 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12256 : // GIR_Coverage, 1397,
12257 : GIR_Done,
12258 : // Label 1036: @26336
12259 : GIM_Try, /*On fail goto*//*Label 1037*/ 26361, // Rule ID 12293 //
12260 : GIM_CheckFeatures, GIFBS_FPStackf32,
12261 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12262 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
12263 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP64RegClassID,
12264 : // (fpround:{ *:[f32] } RFP64:{ *:[f64] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP64:{ *:[f64] }:$src, RFP32:{ *:[i32] })
12265 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
12266 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP32*/33,
12267 : // GIR_Coverage, 12293,
12268 : GIR_Done,
12269 : // Label 1037: @26361
12270 : GIM_Try, /*On fail goto*//*Label 1038*/ 26386, // Rule ID 12294 //
12271 : GIM_CheckFeatures, GIFBS_FPStackf32,
12272 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
12273 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP32RegClassID,
12274 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
12275 : // (fpround:{ *:[f32] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f32] } RFP80:{ *:[f80] }:$src, RFP32:{ *:[i32] })
12276 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
12277 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP32*/33,
12278 : // GIR_Coverage, 12294,
12279 : GIR_Done,
12280 : // Label 1038: @26386
12281 : GIM_Try, /*On fail goto*//*Label 1039*/ 26434, // Rule ID 12435 //
12282 : GIM_CheckFeatures, GIFBS_UseAVX,
12283 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12284 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12285 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
12286 : // (fpround:{ *:[f32] } FR64:{ *:[f64] }:$src) => (VCVTSD2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64:{ *:[f64] }:$src)
12287 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12288 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12289 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12290 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12291 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSrr,
12292 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12293 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12294 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12295 : GIR_EraseFromParent, /*InsnID*/0,
12296 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12297 : // GIR_Coverage, 12435,
12298 : GIR_Done,
12299 : // Label 1039: @26434
12300 : GIM_Try, /*On fail goto*//*Label 1040*/ 26482, // Rule ID 14810 //
12301 : GIM_CheckFeatures, GIFBS_HasAVX512,
12302 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12303 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
12304 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
12305 : // (fpround:{ *:[f32] } FR64X:{ *:[f64] }:$src) => (VCVTSD2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), FR64X:{ *:[f64] }:$src)
12306 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12307 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12308 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12309 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12310 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSD2SSZrr,
12311 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12312 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12313 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12314 : GIR_EraseFromParent, /*InsnID*/0,
12315 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12316 : // GIR_Coverage, 14810,
12317 : GIR_Done,
12318 : // Label 1040: @26482
12319 : GIM_Reject,
12320 : // Label 1032: @26483
12321 : GIM_Try, /*On fail goto*//*Label 1041*/ 26508, // Rule ID 12295 //
12322 : GIM_CheckFeatures, GIFBS_FPStackf64,
12323 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s80,
12324 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::RFP64RegClassID,
12325 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::RFP80RegClassID,
12326 : // (fpround:{ *:[f64] } RFP80:{ *:[f80] }:$src) => (COPY_TO_REGCLASS:{ *:[f64] } RFP80:{ *:[f80] }:$src, RFP64:{ *:[i32] })
12327 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/TargetOpcode::COPY,
12328 : GIR_ConstrainOperandRC, /*InsnID*/0, /*Op*/0, /*RC RFP64*/55,
12329 : // GIR_Coverage, 12295,
12330 : GIR_Done,
12331 : // Label 1041: @26508
12332 : GIM_Reject,
12333 : // Label 1033: @26509
12334 : GIM_Try, /*On fail goto*//*Label 1042*/ 26554,
12335 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
12336 : GIM_Try, /*On fail goto*//*Label 1043*/ 26534, // Rule ID 1443 //
12337 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
12338 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
12339 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
12340 : // (fpround:{ *:[v4f32] } VR256:{ *:[v4f64] }:$src) => (VCVTPD2PSYrr:{ *:[v4f32] } VR256:{ *:[v4f64] }:$src)
12341 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPD2PSYrr,
12342 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12343 : // GIR_Coverage, 1443,
12344 : GIR_Done,
12345 : // Label 1043: @26534
12346 : GIM_Try, /*On fail goto*//*Label 1044*/ 26553, // Rule ID 8125 //
12347 : GIM_CheckFeatures, GIFBS_HasVLX,
12348 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12349 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12350 : // (fpround:{ *:[v4f32] } VR256X:{ *:[v4f64] }:$src) => (VCVTPD2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4f64] }:$src)
12351 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPD2PSZ256rr,
12352 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12353 : // GIR_Coverage, 8125,
12354 : GIR_Done,
12355 : // Label 1044: @26553
12356 : GIM_Reject,
12357 : // Label 1042: @26554
12358 : GIM_Reject,
12359 : // Label 1034: @26555
12360 : GIM_Try, /*On fail goto*//*Label 1045*/ 26578, // Rule ID 8104 //
12361 : GIM_CheckFeatures, GIFBS_HasAVX512,
12362 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
12363 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12364 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12365 : // (fpround:{ *:[v8f32] } VR512:{ *:[v8f64] }:$src) => (VCVTPD2PSZrr:{ *:[v8f32] } VR512:{ *:[v8f64] }:$src)
12366 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTPD2PSZrr,
12367 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12368 : // GIR_Coverage, 8104,
12369 : GIR_Done,
12370 : // Label 1045: @26578
12371 : GIM_Reject,
12372 : // Label 1035: @26579
12373 : GIM_Reject,
12374 : // Label 25: @26580
12375 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1054*/ 27209,
12376 : /*GILLT_s32*//*Label 1046*/ 26603,
12377 : /*GILLT_s64*//*Label 1047*/ 26742, 0, 0, 0,
12378 : /*GILLT_v2s64*//*Label 1048*/ 26881, 0,
12379 : /*GILLT_v4s32*//*Label 1049*/ 26905,
12380 : /*GILLT_v4s64*//*Label 1050*/ 27021, 0, 0,
12381 : /*GILLT_v8s32*//*Label 1051*/ 27068,
12382 : /*GILLT_v8s64*//*Label 1052*/ 27138, 0, 0, 0,
12383 : /*GILLT_v16s32*//*Label 1053*/ 27185,
12384 : // Label 1046: @26603
12385 : GIM_Try, /*On fail goto*//*Label 1055*/ 26626, // Rule ID 1335 //
12386 : GIM_CheckFeatures, GIFBS_UseAVX,
12387 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12388 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12389 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12390 : // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
12391 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIrr,
12392 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12393 : // GIR_Coverage, 1335,
12394 : GIR_Done,
12395 : // Label 1055: @26626
12396 : GIM_Try, /*On fail goto*//*Label 1056*/ 26649, // Rule ID 1339 //
12397 : GIM_CheckFeatures, GIFBS_UseAVX,
12398 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12399 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12400 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
12401 : // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src)
12402 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIrr,
12403 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12404 : // GIR_Coverage, 1339,
12405 : GIR_Done,
12406 : // Label 1056: @26649
12407 : GIM_Try, /*On fail goto*//*Label 1057*/ 26672, // Rule ID 1343 //
12408 : GIM_CheckFeatures, GIFBS_UseSSE1,
12409 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12410 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12411 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12412 : // (fp_to_sint:{ *:[i32] } FR32:{ *:[f32] }:$src) => (CVTTSS2SIrr:{ *:[i32] } FR32:{ *:[f32] }:$src)
12413 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SIrr,
12414 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12415 : // GIR_Coverage, 1343,
12416 : GIR_Done,
12417 : // Label 1057: @26672
12418 : GIM_Try, /*On fail goto*//*Label 1058*/ 26695, // Rule ID 1347 //
12419 : GIM_CheckFeatures, GIFBS_UseSSE2,
12420 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12421 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12422 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
12423 : // (fp_to_sint:{ *:[i32] } FR64:{ *:[f64] }:$src) => (CVTTSD2SIrr:{ *:[i32] } FR64:{ *:[f64] }:$src)
12424 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SIrr,
12425 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12426 : // GIR_Coverage, 1347,
12427 : GIR_Done,
12428 : // Label 1058: @26695
12429 : GIM_Try, /*On fail goto*//*Label 1059*/ 26718, // Rule ID 8046 //
12430 : GIM_CheckFeatures, GIFBS_HasAVX512,
12431 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12432 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12433 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
12434 : // (fp_to_sint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
12435 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SIZrr,
12436 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12437 : // GIR_Coverage, 8046,
12438 : GIR_Done,
12439 : // Label 1059: @26718
12440 : GIM_Try, /*On fail goto*//*Label 1060*/ 26741, // Rule ID 8056 //
12441 : GIM_CheckFeatures, GIFBS_HasAVX512,
12442 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12443 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12444 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
12445 : // (fp_to_sint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src)
12446 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SIZrr,
12447 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12448 : // GIR_Coverage, 8056,
12449 : GIR_Done,
12450 : // Label 1060: @26741
12451 : GIM_Reject,
12452 : // Label 1047: @26742
12453 : GIM_Try, /*On fail goto*//*Label 1061*/ 26765, // Rule ID 1337 //
12454 : GIM_CheckFeatures, GIFBS_UseAVX,
12455 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12456 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12457 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12458 : // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (VCVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
12459 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64rr,
12460 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12461 : // GIR_Coverage, 1337,
12462 : GIR_Done,
12463 : // Label 1061: @26765
12464 : GIM_Try, /*On fail goto*//*Label 1062*/ 26788, // Rule ID 1341 //
12465 : GIM_CheckFeatures, GIFBS_UseAVX,
12466 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12467 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12468 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
12469 : // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (VCVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
12470 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64rr,
12471 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12472 : // GIR_Coverage, 1341,
12473 : GIR_Done,
12474 : // Label 1062: @26788
12475 : GIM_Try, /*On fail goto*//*Label 1063*/ 26811, // Rule ID 1345 //
12476 : GIM_CheckFeatures, GIFBS_UseSSE1,
12477 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12478 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12479 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32RegClassID,
12480 : // (fp_to_sint:{ *:[i64] } FR32:{ *:[f32] }:$src) => (CVTTSS2SI64rr:{ *:[i64] } FR32:{ *:[f32] }:$src)
12481 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSS2SI64rr,
12482 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12483 : // GIR_Coverage, 1345,
12484 : GIR_Done,
12485 : // Label 1063: @26811
12486 : GIM_Try, /*On fail goto*//*Label 1064*/ 26834, // Rule ID 1349 //
12487 : GIM_CheckFeatures, GIFBS_UseSSE2,
12488 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12489 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12490 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64RegClassID,
12491 : // (fp_to_sint:{ *:[i64] } FR64:{ *:[f64] }:$src) => (CVTTSD2SI64rr:{ *:[i64] } FR64:{ *:[f64] }:$src)
12492 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTSD2SI64rr,
12493 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12494 : // GIR_Coverage, 1349,
12495 : GIR_Done,
12496 : // Label 1064: @26834
12497 : GIM_Try, /*On fail goto*//*Label 1065*/ 26857, // Rule ID 8051 //
12498 : GIM_CheckFeatures, GIFBS_HasAVX512,
12499 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12500 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12501 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
12502 : // (fp_to_sint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2SI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src)
12503 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2SI64Zrr,
12504 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12505 : // GIR_Coverage, 8051,
12506 : GIR_Done,
12507 : // Label 1065: @26857
12508 : GIM_Try, /*On fail goto*//*Label 1066*/ 26880, // Rule ID 8061 //
12509 : GIM_CheckFeatures, GIFBS_HasAVX512,
12510 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12511 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12512 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
12513 : // (fp_to_sint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2SI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
12514 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2SI64Zrr,
12515 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12516 : // GIR_Coverage, 8061,
12517 : GIR_Done,
12518 : // Label 1066: @26880
12519 : GIM_Reject,
12520 : // Label 1048: @26881
12521 : GIM_Try, /*On fail goto*//*Label 1067*/ 26904, // Rule ID 14850 //
12522 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
12523 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
12524 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12525 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12526 : // (fp_to_sint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTTPD2QQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src)
12527 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2QQZ128rr,
12528 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12529 : // GIR_Coverage, 14850,
12530 : GIR_Done,
12531 : // Label 1067: @26904
12532 : GIM_Reject,
12533 : // Label 1049: @26905
12534 : GIM_Try, /*On fail goto*//*Label 1068*/ 26928, // Rule ID 12462 //
12535 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
12536 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12537 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
12538 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
12539 : // (fp_to_sint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (VCVTTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src)
12540 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQrr,
12541 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12542 : // GIR_Coverage, 12462,
12543 : GIR_Done,
12544 : // Label 1068: @26928
12545 : GIM_Try, /*On fail goto*//*Label 1069*/ 26951, // Rule ID 12466 //
12546 : GIM_CheckFeatures, GIFBS_UseSSE2,
12547 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12548 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
12549 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
12550 : // (fp_to_sint:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src) => (CVTTPS2DQrr:{ *:[v4i32] } VR128:{ *:[v4f32] }:$src)
12551 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTTPS2DQrr,
12552 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12553 : // GIR_Coverage, 12466,
12554 : GIR_Done,
12555 : // Label 1069: @26951
12556 : GIM_Try, /*On fail goto*//*Label 1070*/ 26974, // Rule ID 12468 //
12557 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
12558 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
12559 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
12560 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
12561 : // (fp_to_sint:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src) => (VCVTTPD2DQYrr:{ *:[v4i32] } VR256:{ *:[v4f64] }:$src)
12562 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQYrr,
12563 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12564 : // GIR_Coverage, 12468,
12565 : GIR_Done,
12566 : // Label 1070: @26974
12567 : GIM_Try, /*On fail goto*//*Label 1071*/ 26997, // Rule ID 14826 //
12568 : GIM_CheckFeatures, GIFBS_HasVLX,
12569 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12570 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12571 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12572 : // (fp_to_sint:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2DQZ128rr:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src)
12573 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQZ128rr,
12574 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12575 : // GIR_Coverage, 14826,
12576 : GIR_Done,
12577 : // Label 1071: @26997
12578 : GIM_Try, /*On fail goto*//*Label 1072*/ 27020, // Rule ID 14834 //
12579 : GIM_CheckFeatures, GIFBS_HasVLX,
12580 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
12581 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12582 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12583 : // (fp_to_sint:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2DQZ256rr:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src)
12584 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQZ256rr,
12585 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12586 : // GIR_Coverage, 14834,
12587 : GIR_Done,
12588 : // Label 1072: @27020
12589 : GIM_Reject,
12590 : // Label 1050: @27021
12591 : GIM_Try, /*On fail goto*//*Label 1073*/ 27044, // Rule ID 14846 //
12592 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
12593 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12594 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12595 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12596 : // (fp_to_sint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2QQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src)
12597 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2QQZ256rr,
12598 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12599 : // GIR_Coverage, 14846,
12600 : GIR_Done,
12601 : // Label 1073: @27044
12602 : GIM_Try, /*On fail goto*//*Label 1074*/ 27067, // Rule ID 14854 //
12603 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
12604 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
12605 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12606 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12607 : // (fp_to_sint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2QQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src)
12608 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2QQZ256rr,
12609 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12610 : // GIR_Coverage, 14854,
12611 : GIR_Done,
12612 : // Label 1074: @27067
12613 : GIM_Reject,
12614 : // Label 1051: @27068
12615 : GIM_Try, /*On fail goto*//*Label 1075*/ 27091, // Rule ID 12464 //
12616 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
12617 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12618 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
12619 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
12620 : // (fp_to_sint:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src) => (VCVTTPS2DQYrr:{ *:[v8i32] } VR256:{ *:[v8f32] }:$src)
12621 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQYrr,
12622 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12623 : // GIR_Coverage, 12464,
12624 : GIR_Done,
12625 : // Label 1075: @27091
12626 : GIM_Try, /*On fail goto*//*Label 1076*/ 27114, // Rule ID 14822 //
12627 : GIM_CheckFeatures, GIFBS_HasAVX512,
12628 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
12629 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12630 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12631 : // (fp_to_sint:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2DQZrr:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src)
12632 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2DQZrr,
12633 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12634 : // GIR_Coverage, 14822,
12635 : GIR_Done,
12636 : // Label 1076: @27114
12637 : GIM_Try, /*On fail goto*//*Label 1077*/ 27137, // Rule ID 14830 //
12638 : GIM_CheckFeatures, GIFBS_HasVLX,
12639 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12640 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12641 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12642 : // (fp_to_sint:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2DQZ256rr:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src)
12643 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQZ256rr,
12644 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12645 : // GIR_Coverage, 14830,
12646 : GIR_Done,
12647 : // Label 1077: @27137
12648 : GIM_Reject,
12649 : // Label 1052: @27138
12650 : GIM_Try, /*On fail goto*//*Label 1078*/ 27161, // Rule ID 14838 //
12651 : GIM_CheckFeatures, GIFBS_HasDQI,
12652 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12653 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12654 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12655 : // (fp_to_sint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2QQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src)
12656 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2QQZrr,
12657 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12658 : // GIR_Coverage, 14838,
12659 : GIR_Done,
12660 : // Label 1078: @27161
12661 : GIM_Try, /*On fail goto*//*Label 1079*/ 27184, // Rule ID 14842 //
12662 : GIM_CheckFeatures, GIFBS_HasDQI,
12663 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
12664 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12665 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12666 : // (fp_to_sint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2QQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src)
12667 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2QQZrr,
12668 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12669 : // GIR_Coverage, 14842,
12670 : GIR_Done,
12671 : // Label 1079: @27184
12672 : GIM_Reject,
12673 : // Label 1053: @27185
12674 : GIM_Try, /*On fail goto*//*Label 1080*/ 27208, // Rule ID 14818 //
12675 : GIM_CheckFeatures, GIFBS_HasAVX512,
12676 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
12677 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12678 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12679 : // (fp_to_sint:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => (VCVTTPS2DQZrr:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src)
12680 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2DQZrr,
12681 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12682 : // GIR_Coverage, 14818,
12683 : GIR_Done,
12684 : // Label 1080: @27208
12685 : GIM_Reject,
12686 : // Label 1054: @27209
12687 : GIM_Reject,
12688 : // Label 26: @27210
12689 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1089*/ 27563,
12690 : /*GILLT_s32*//*Label 1081*/ 27233,
12691 : /*GILLT_s64*//*Label 1082*/ 27280, 0, 0, 0,
12692 : /*GILLT_v2s64*//*Label 1083*/ 27327, 0,
12693 : /*GILLT_v4s32*//*Label 1084*/ 27351,
12694 : /*GILLT_v4s64*//*Label 1085*/ 27398, 0, 0,
12695 : /*GILLT_v8s32*//*Label 1086*/ 27445,
12696 : /*GILLT_v8s64*//*Label 1087*/ 27492, 0, 0, 0,
12697 : /*GILLT_v16s32*//*Label 1088*/ 27539,
12698 : // Label 1081: @27233
12699 : GIM_Try, /*On fail goto*//*Label 1090*/ 27256, // Rule ID 8066 //
12700 : GIM_CheckFeatures, GIFBS_HasAVX512,
12701 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12702 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12703 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
12704 : // (fp_to_uint:{ *:[i32] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USIZrr:{ *:[i32] } FR32X:{ *:[f32] }:$src)
12705 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USIZrr,
12706 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12707 : // GIR_Coverage, 8066,
12708 : GIR_Done,
12709 : // Label 1090: @27256
12710 : GIM_Try, /*On fail goto*//*Label 1091*/ 27279, // Rule ID 8076 //
12711 : GIM_CheckFeatures, GIFBS_HasAVX512,
12712 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12713 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
12714 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
12715 : // (fp_to_uint:{ *:[i32] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USIZrr:{ *:[i32] } FR64X:{ *:[f64] }:$src)
12716 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USIZrr,
12717 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12718 : // GIR_Coverage, 8076,
12719 : GIR_Done,
12720 : // Label 1091: @27279
12721 : GIM_Reject,
12722 : // Label 1082: @27280
12723 : GIM_Try, /*On fail goto*//*Label 1092*/ 27303, // Rule ID 8071 //
12724 : GIM_CheckFeatures, GIFBS_HasAVX512,
12725 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12726 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12727 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR32XRegClassID,
12728 : // (fp_to_uint:{ *:[i64] } FR32X:{ *:[f32] }:$src) => (VCVTTSS2USI64Zrr:{ *:[i64] } FR32X:{ *:[f32] }:$src)
12729 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSS2USI64Zrr,
12730 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12731 : // GIR_Coverage, 8071,
12732 : GIR_Done,
12733 : // Label 1092: @27303
12734 : GIM_Try, /*On fail goto*//*Label 1093*/ 27326, // Rule ID 8081 //
12735 : GIM_CheckFeatures, GIFBS_HasAVX512,
12736 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12737 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
12738 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::FR64XRegClassID,
12739 : // (fp_to_uint:{ *:[i64] } FR64X:{ *:[f64] }:$src) => (VCVTTSD2USI64Zrr:{ *:[i64] } FR64X:{ *:[f64] }:$src)
12740 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTSD2USI64Zrr,
12741 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12742 : // GIR_Coverage, 8081,
12743 : GIR_Done,
12744 : // Label 1093: @27326
12745 : GIM_Reject,
12746 : // Label 1083: @27327
12747 : GIM_Try, /*On fail goto*//*Label 1094*/ 27350, // Rule ID 14852 //
12748 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
12749 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
12750 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12751 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12752 : // (fp_to_uint:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src) => (VCVTTPD2UQQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2f64] }:$src)
12753 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UQQZ128rr,
12754 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12755 : // GIR_Coverage, 14852,
12756 : GIR_Done,
12757 : // Label 1094: @27350
12758 : GIM_Reject,
12759 : // Label 1084: @27351
12760 : GIM_Try, /*On fail goto*//*Label 1095*/ 27374, // Rule ID 14828 //
12761 : GIM_CheckFeatures, GIFBS_HasVLX,
12762 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12763 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12764 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12765 : // (fp_to_uint:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2UDQZ128rr:{ *:[v4i32] } VR128X:{ *:[v4f32] }:$src)
12766 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UDQZ128rr,
12767 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12768 : // GIR_Coverage, 14828,
12769 : GIR_Done,
12770 : // Label 1095: @27374
12771 : GIM_Try, /*On fail goto*//*Label 1096*/ 27397, // Rule ID 14836 //
12772 : GIM_CheckFeatures, GIFBS_HasVLX,
12773 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
12774 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
12775 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12776 : // (fp_to_uint:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2UDQZ256rr:{ *:[v4i32] } VR256X:{ *:[v4f64] }:$src)
12777 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UDQZ256rr,
12778 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12779 : // GIR_Coverage, 14836,
12780 : GIR_Done,
12781 : // Label 1096: @27397
12782 : GIM_Reject,
12783 : // Label 1085: @27398
12784 : GIM_Try, /*On fail goto*//*Label 1097*/ 27421, // Rule ID 14848 //
12785 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
12786 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
12787 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12788 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
12789 : // (fp_to_uint:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src) => (VCVTTPS2UQQZ256rr:{ *:[v4i64] } VR128X:{ *:[v4f32] }:$src)
12790 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UQQZ256rr,
12791 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12792 : // GIR_Coverage, 14848,
12793 : GIR_Done,
12794 : // Label 1097: @27421
12795 : GIM_Try, /*On fail goto*//*Label 1098*/ 27444, // Rule ID 14856 //
12796 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
12797 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
12798 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12799 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12800 : // (fp_to_uint:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src) => (VCVTTPD2UQQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4f64] }:$src)
12801 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UQQZ256rr,
12802 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12803 : // GIR_Coverage, 14856,
12804 : GIR_Done,
12805 : // Label 1098: @27444
12806 : GIM_Reject,
12807 : // Label 1086: @27445
12808 : GIM_Try, /*On fail goto*//*Label 1099*/ 27468, // Rule ID 14824 //
12809 : GIM_CheckFeatures, GIFBS_HasAVX512,
12810 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
12811 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12812 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12813 : // (fp_to_uint:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2UDQZrr:{ *:[v8i32] } VR512:{ *:[v8f64] }:$src)
12814 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UDQZrr,
12815 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12816 : // GIR_Coverage, 14824,
12817 : GIR_Done,
12818 : // Label 1099: @27468
12819 : GIM_Try, /*On fail goto*//*Label 1100*/ 27491, // Rule ID 14832 //
12820 : GIM_CheckFeatures, GIFBS_HasVLX,
12821 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12822 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
12823 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12824 : // (fp_to_uint:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2UDQZ256rr:{ *:[v8i32] } VR256X:{ *:[v8f32] }:$src)
12825 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UDQZ256rr,
12826 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12827 : // GIR_Coverage, 14832,
12828 : GIR_Done,
12829 : // Label 1100: @27491
12830 : GIM_Reject,
12831 : // Label 1087: @27492
12832 : GIM_Try, /*On fail goto*//*Label 1101*/ 27515, // Rule ID 14840 //
12833 : GIM_CheckFeatures, GIFBS_HasDQI,
12834 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
12835 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12836 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
12837 : // (fp_to_uint:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src) => (VCVTTPS2UQQZrr:{ *:[v8i64] } VR256X:{ *:[v8f32] }:$src)
12838 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UQQZrr,
12839 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12840 : // GIR_Coverage, 14840,
12841 : GIR_Done,
12842 : // Label 1101: @27515
12843 : GIM_Try, /*On fail goto*//*Label 1102*/ 27538, // Rule ID 14844 //
12844 : GIM_CheckFeatures, GIFBS_HasDQI,
12845 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
12846 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12847 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12848 : // (fp_to_uint:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src) => (VCVTTPD2UQQZrr:{ *:[v8i64] } VR512:{ *:[v8f64] }:$src)
12849 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPD2UQQZrr,
12850 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12851 : // GIR_Coverage, 14844,
12852 : GIR_Done,
12853 : // Label 1102: @27538
12854 : GIM_Reject,
12855 : // Label 1088: @27539
12856 : GIM_Try, /*On fail goto*//*Label 1103*/ 27562, // Rule ID 14820 //
12857 : GIM_CheckFeatures, GIFBS_HasAVX512,
12858 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
12859 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
12860 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
12861 : // (fp_to_uint:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src) => (VCVTTPS2UDQZrr:{ *:[v16i32] } VR512:{ *:[v16f32] }:$src)
12862 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTTPS2UDQZrr,
12863 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12864 : // GIR_Coverage, 14820,
12865 : GIR_Done,
12866 : // Label 1103: @27562
12867 : GIM_Reject,
12868 : // Label 1089: @27563
12869 : GIM_Reject,
12870 : // Label 27: @27564
12871 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1112*/ 28393,
12872 : /*GILLT_s32*//*Label 1104*/ 27587,
12873 : /*GILLT_s64*//*Label 1105*/ 27826, 0, 0, 0,
12874 : /*GILLT_v2s64*//*Label 1106*/ 28065, 0,
12875 : /*GILLT_v4s32*//*Label 1107*/ 28089,
12876 : /*GILLT_v4s64*//*Label 1108*/ 28182, 0, 0,
12877 : /*GILLT_v8s32*//*Label 1109*/ 28252,
12878 : /*GILLT_v8s64*//*Label 1110*/ 28322, 0, 0, 0,
12879 : /*GILLT_v16s32*//*Label 1111*/ 28369,
12880 : // Label 1104: @27587
12881 : GIM_Try, /*On fail goto*//*Label 1113*/ 27610, // Rule ID 1351 //
12882 : GIM_CheckFeatures, GIFBS_UseSSE1,
12883 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12884 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12885 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
12886 : // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (CVTSI2SSrr:{ *:[f32] } GR32:{ *:[i32] }:$src)
12887 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SSrr,
12888 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12889 : // GIR_Coverage, 1351,
12890 : GIR_Done,
12891 : // Label 1113: @27610
12892 : GIM_Try, /*On fail goto*//*Label 1114*/ 27633, // Rule ID 1353 //
12893 : GIM_CheckFeatures, GIFBS_UseSSE1,
12894 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12895 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12896 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
12897 : // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (CVTSI642SSrr:{ *:[f32] } GR64:{ *:[i64] }:$src)
12898 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SSrr,
12899 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12900 : // GIR_Coverage, 1353,
12901 : GIR_Done,
12902 : // Label 1114: @27633
12903 : GIM_Try, /*On fail goto*//*Label 1115*/ 27681, // Rule ID 12431 //
12904 : GIM_CheckFeatures, GIFBS_UseAVX,
12905 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12906 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12907 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
12908 : // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src)
12909 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12910 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12911 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12912 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12913 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSrr,
12914 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12915 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12916 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12917 : GIR_EraseFromParent, /*InsnID*/0,
12918 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12919 : // GIR_Coverage, 12431,
12920 : GIR_Done,
12921 : // Label 1115: @27681
12922 : GIM_Try, /*On fail goto*//*Label 1116*/ 27729, // Rule ID 12432 //
12923 : GIM_CheckFeatures, GIFBS_UseAVX,
12924 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12925 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32RegClassID,
12926 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
12927 : // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src)
12928 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12929 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12930 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12931 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12932 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSrr,
12933 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12934 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12935 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12936 : GIR_EraseFromParent, /*InsnID*/0,
12937 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12938 : // GIR_Coverage, 12432,
12939 : GIR_Done,
12940 : // Label 1116: @27729
12941 : GIM_Try, /*On fail goto*//*Label 1117*/ 27777, // Rule ID 14778 //
12942 : GIM_CheckFeatures, GIFBS_HasAVX512,
12943 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12944 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
12945 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
12946 : // (sint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src)
12947 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12948 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12949 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12950 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12951 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SSZrr,
12952 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12953 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12954 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12955 : GIR_EraseFromParent, /*InsnID*/0,
12956 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12957 : // GIR_Coverage, 14778,
12958 : GIR_Done,
12959 : // Label 1117: @27777
12960 : GIM_Try, /*On fail goto*//*Label 1118*/ 27825, // Rule ID 14779 //
12961 : GIM_CheckFeatures, GIFBS_HasAVX512,
12962 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12963 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
12964 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
12965 : // (sint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src)
12966 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
12967 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
12968 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
12969 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
12970 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SSZrr,
12971 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
12972 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
12973 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
12974 : GIR_EraseFromParent, /*InsnID*/0,
12975 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12976 : // GIR_Coverage, 14779,
12977 : GIR_Done,
12978 : // Label 1118: @27825
12979 : GIM_Reject,
12980 : // Label 1105: @27826
12981 : GIM_Try, /*On fail goto*//*Label 1119*/ 27849, // Rule ID 1355 //
12982 : GIM_CheckFeatures, GIFBS_UseSSE2,
12983 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
12984 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
12985 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
12986 : // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (CVTSI2SDrr:{ *:[f64] } GR32:{ *:[i32] }:$src)
12987 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI2SDrr,
12988 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
12989 : // GIR_Coverage, 1355,
12990 : GIR_Done,
12991 : // Label 1119: @27849
12992 : GIM_Try, /*On fail goto*//*Label 1120*/ 27872, // Rule ID 1357 //
12993 : GIM_CheckFeatures, GIFBS_UseSSE2,
12994 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
12995 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
12996 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
12997 : // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (CVTSI642SDrr:{ *:[f64] } GR64:{ *:[i64] }:$src)
12998 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTSI642SDrr,
12999 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13000 : // GIR_Coverage, 1357,
13001 : GIR_Done,
13002 : // Label 1120: @27872
13003 : GIM_Try, /*On fail goto*//*Label 1121*/ 27920, // Rule ID 12433 //
13004 : GIM_CheckFeatures, GIFBS_UseAVX,
13005 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
13006 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
13007 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
13008 : // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src)
13009 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13010 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13011 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13012 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13013 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDrr,
13014 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13015 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13016 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13017 : GIR_EraseFromParent, /*InsnID*/0,
13018 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13019 : // GIR_Coverage, 12433,
13020 : GIR_Done,
13021 : // Label 1121: @27920
13022 : GIM_Try, /*On fail goto*//*Label 1122*/ 27968, // Rule ID 12434 //
13023 : GIM_CheckFeatures, GIFBS_UseAVX,
13024 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
13025 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64RegClassID,
13026 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
13027 : // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src)
13028 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13029 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13030 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13031 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13032 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDrr,
13033 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13034 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13035 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13036 : GIR_EraseFromParent, /*InsnID*/0,
13037 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13038 : // GIR_Coverage, 12434,
13039 : GIR_Done,
13040 : // Label 1122: @27968
13041 : GIM_Try, /*On fail goto*//*Label 1123*/ 28016, // Rule ID 14780 //
13042 : GIM_CheckFeatures, GIFBS_HasAVX512,
13043 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
13044 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
13045 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
13046 : // (sint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src)
13047 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13048 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13049 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13050 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13051 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI2SDZrr,
13052 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13053 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13054 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13055 : GIR_EraseFromParent, /*InsnID*/0,
13056 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13057 : // GIR_Coverage, 14780,
13058 : GIR_Done,
13059 : // Label 1123: @28016
13060 : GIM_Try, /*On fail goto*//*Label 1124*/ 28064, // Rule ID 14781 //
13061 : GIM_CheckFeatures, GIFBS_HasAVX512,
13062 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
13063 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
13064 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
13065 : // (sint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src)
13066 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13067 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13068 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13069 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13070 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTSI642SDZrr,
13071 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13072 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13073 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13074 : GIR_EraseFromParent, /*InsnID*/0,
13075 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13076 : // GIR_Coverage, 14781,
13077 : GIR_Done,
13078 : // Label 1124: @28064
13079 : GIM_Reject,
13080 : // Label 1106: @28065
13081 : GIM_Try, /*On fail goto*//*Label 1125*/ 28088, // Rule ID 8770 //
13082 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
13083 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
13084 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13085 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13086 : // (sint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src)
13087 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ128rr,
13088 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13089 : // GIR_Coverage, 8770,
13090 : GIR_Done,
13091 : // Label 1125: @28088
13092 : GIM_Reject,
13093 : // Label 1107: @28089
13094 : GIM_Try, /*On fail goto*//*Label 1126*/ 28112, // Rule ID 1391 //
13095 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
13096 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13097 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
13098 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
13099 : // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src)
13100 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSrr,
13101 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13102 : // GIR_Coverage, 1391,
13103 : GIR_Done,
13104 : // Label 1126: @28112
13105 : GIM_Try, /*On fail goto*//*Label 1127*/ 28135, // Rule ID 1395 //
13106 : GIM_CheckFeatures, GIFBS_UseSSE2,
13107 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13108 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128RegClassID,
13109 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
13110 : // (sint_to_fp:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src) => (CVTDQ2PSrr:{ *:[v4f32] } VR128:{ *:[v4i32] }:$src)
13111 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::CVTDQ2PSrr,
13112 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13113 : // GIR_Coverage, 1395,
13114 : GIR_Done,
13115 : // Label 1127: @28135
13116 : GIM_Try, /*On fail goto*//*Label 1128*/ 28158, // Rule ID 8203 //
13117 : GIM_CheckFeatures, GIFBS_HasVLX,
13118 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13119 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13120 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13121 : // (sint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src)
13122 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ128rr,
13123 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13124 : // GIR_Coverage, 8203,
13125 : GIR_Done,
13126 : // Label 1128: @28158
13127 : GIM_Try, /*On fail goto*//*Label 1129*/ 28181, // Rule ID 8839 //
13128 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
13129 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
13130 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13131 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13132 : // (sint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src)
13133 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZ256rr,
13134 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13135 : // GIR_Coverage, 8839,
13136 : GIR_Done,
13137 : // Label 1129: @28181
13138 : GIM_Reject,
13139 : // Label 1108: @28182
13140 : GIM_Try, /*On fail goto*//*Label 1130*/ 28205, // Rule ID 1438 //
13141 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
13142 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13143 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
13144 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128RegClassID,
13145 : // (sint_to_fp:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src) => (VCVTDQ2PDYrr:{ *:[v4f64] } VR128:{ *:[v4i32] }:$src)
13146 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDYrr,
13147 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13148 : // GIR_Coverage, 1438,
13149 : GIR_Done,
13150 : // Label 1130: @28205
13151 : GIM_Try, /*On fail goto*//*Label 1131*/ 28228, // Rule ID 8182 //
13152 : GIM_CheckFeatures, GIFBS_HasVLX,
13153 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13154 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13155 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13156 : // (sint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src)
13157 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZ256rr,
13158 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13159 : // GIR_Coverage, 8182,
13160 : GIR_Done,
13161 : // Label 1131: @28228
13162 : GIM_Try, /*On fail goto*//*Label 1132*/ 28251, // Rule ID 8779 //
13163 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
13164 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
13165 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13166 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13167 : // (sint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src)
13168 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZ256rr,
13169 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13170 : // GIR_Coverage, 8779,
13171 : GIR_Done,
13172 : // Label 1132: @28251
13173 : GIM_Reject,
13174 : // Label 1109: @28252
13175 : GIM_Try, /*On fail goto*//*Label 1133*/ 28275, // Rule ID 1393 //
13176 : GIM_CheckFeatures, GIFBS_HasAVX_NoVLX,
13177 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13178 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256RegClassID,
13179 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256RegClassID,
13180 : // (sint_to_fp:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src) => (VCVTDQ2PSYrr:{ *:[v8f32] } VR256:{ *:[v8i32] }:$src)
13181 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSYrr,
13182 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13183 : // GIR_Coverage, 1393,
13184 : GIR_Done,
13185 : // Label 1133: @28275
13186 : GIM_Try, /*On fail goto*//*Label 1134*/ 28298, // Rule ID 8212 //
13187 : GIM_CheckFeatures, GIFBS_HasVLX,
13188 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13189 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13190 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13191 : // (sint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src)
13192 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZ256rr,
13193 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13194 : // GIR_Coverage, 8212,
13195 : GIR_Done,
13196 : // Label 1134: @28298
13197 : GIM_Try, /*On fail goto*//*Label 1135*/ 28321, // Rule ID 8818 //
13198 : GIM_CheckFeatures, GIFBS_HasDQI,
13199 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
13200 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13201 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13202 : // (sint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src)
13203 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PSZrr,
13204 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13205 : // GIR_Coverage, 8818,
13206 : GIR_Done,
13207 : // Label 1135: @28321
13208 : GIM_Reject,
13209 : // Label 1110: @28322
13210 : GIM_Try, /*On fail goto*//*Label 1136*/ 28345, // Rule ID 8164 //
13211 : GIM_CheckFeatures, GIFBS_HasAVX512,
13212 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13213 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13214 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13215 : // (sint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src)
13216 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PDZrr,
13217 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13218 : // GIR_Coverage, 8164,
13219 : GIR_Done,
13220 : // Label 1136: @28345
13221 : GIM_Try, /*On fail goto*//*Label 1137*/ 28368, // Rule ID 8758 //
13222 : GIM_CheckFeatures, GIFBS_HasDQI,
13223 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
13224 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13225 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13226 : // (sint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src)
13227 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTQQ2PDZrr,
13228 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13229 : // GIR_Coverage, 8758,
13230 : GIR_Done,
13231 : // Label 1137: @28368
13232 : GIM_Reject,
13233 : // Label 1111: @28369
13234 : GIM_Try, /*On fail goto*//*Label 1138*/ 28392, // Rule ID 8191 //
13235 : GIM_CheckFeatures, GIFBS_HasAVX512,
13236 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
13237 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13238 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13239 : // (sint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src)
13240 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTDQ2PSZrr,
13241 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13242 : // GIR_Coverage, 8191,
13243 : GIR_Done,
13244 : // Label 1138: @28392
13245 : GIM_Reject,
13246 : // Label 1112: @28393
13247 : GIM_Reject,
13248 : // Label 28: @28394
13249 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/3, 20, /*)*//*default:*//*Label 1147*/ 28847,
13250 : /*GILLT_s32*//*Label 1139*/ 28417,
13251 : /*GILLT_s64*//*Label 1140*/ 28514, 0, 0, 0,
13252 : /*GILLT_v2s64*//*Label 1141*/ 28611, 0,
13253 : /*GILLT_v4s32*//*Label 1142*/ 28635,
13254 : /*GILLT_v4s64*//*Label 1143*/ 28682, 0, 0,
13255 : /*GILLT_v8s32*//*Label 1144*/ 28729,
13256 : /*GILLT_v8s64*//*Label 1145*/ 28776, 0, 0, 0,
13257 : /*GILLT_v16s32*//*Label 1146*/ 28823,
13258 : // Label 1139: @28417
13259 : GIM_Try, /*On fail goto*//*Label 1148*/ 28465, // Rule ID 14786 //
13260 : GIM_CheckFeatures, GIFBS_HasAVX512,
13261 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
13262 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
13263 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
13264 : // (uint_to_fp:{ *:[f32] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR32:{ *:[i32] }:$src)
13265 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
13266 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13267 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13268 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13269 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SSZrr,
13270 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13271 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13272 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13273 : GIR_EraseFromParent, /*InsnID*/0,
13274 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13275 : // GIR_Coverage, 14786,
13276 : GIR_Done,
13277 : // Label 1148: @28465
13278 : GIM_Try, /*On fail goto*//*Label 1149*/ 28513, // Rule ID 14787 //
13279 : GIM_CheckFeatures, GIFBS_HasAVX512,
13280 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
13281 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR32XRegClassID,
13282 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
13283 : // (uint_to_fp:{ *:[f32] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SSZrr:{ *:[f32] } (IMPLICIT_DEF:{ *:[f32] }), GR64:{ *:[i64] }:$src)
13284 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
13285 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13286 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13287 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13288 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SSZrr,
13289 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13290 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13291 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13292 : GIR_EraseFromParent, /*InsnID*/0,
13293 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13294 : // GIR_Coverage, 14787,
13295 : GIR_Done,
13296 : // Label 1149: @28513
13297 : GIM_Reject,
13298 : // Label 1140: @28514
13299 : GIM_Try, /*On fail goto*//*Label 1150*/ 28562, // Rule ID 14788 //
13300 : GIM_CheckFeatures, GIFBS_HasAVX512,
13301 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
13302 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
13303 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
13304 : // (uint_to_fp:{ *:[f64] } GR32:{ *:[i32] }:$src) => (VCVTUSI2SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR32:{ *:[i32] }:$src)
13305 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13306 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13307 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13308 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13309 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI2SDZrr,
13310 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13311 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13312 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13313 : GIR_EraseFromParent, /*InsnID*/0,
13314 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13315 : // GIR_Coverage, 14788,
13316 : GIR_Done,
13317 : // Label 1150: @28562
13318 : GIM_Try, /*On fail goto*//*Label 1151*/ 28610, // Rule ID 14789 //
13319 : GIM_CheckFeatures, GIFBS_HasAVX512,
13320 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
13321 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::FR64XRegClassID,
13322 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
13323 : // (uint_to_fp:{ *:[f64] } GR64:{ *:[i64] }:$src) => (VCVTUSI642SDZrr:{ *:[f64] } (IMPLICIT_DEF:{ *:[f64] }), GR64:{ *:[i64] }:$src)
13324 : GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s64,
13325 : GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::IMPLICIT_DEF,
13326 : GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/RegState::Define,
13327 : GIR_ConstrainSelectedInstOperands, /*InsnID*/1,
13328 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::VCVTUSI642SDZrr,
13329 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13330 : GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
13331 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13332 : GIR_EraseFromParent, /*InsnID*/0,
13333 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13334 : // GIR_Coverage, 14789,
13335 : GIR_Done,
13336 : // Label 1151: @28610
13337 : GIM_Reject,
13338 : // Label 1141: @28611
13339 : GIM_Try, /*On fail goto*//*Label 1152*/ 28634, // Rule ID 8800 //
13340 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
13341 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
13342 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13343 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13344 : // (uint_to_fp:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src) => (VCVTUQQ2PDZ128rr:{ *:[v2f64] } VR128X:{ *:[v2i64] }:$src)
13345 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ128rr,
13346 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13347 : // GIR_Coverage, 8800,
13348 : GIR_Done,
13349 : // Label 1152: @28634
13350 : GIM_Reject,
13351 : // Label 1142: @28635
13352 : GIM_Try, /*On fail goto*//*Label 1153*/ 28658, // Rule ID 8380 //
13353 : GIM_CheckFeatures, GIFBS_HasVLX,
13354 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13355 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13356 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13357 : // (uint_to_fp:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PSZ128rr:{ *:[v4f32] } VR128X:{ *:[v4i32] }:$src)
13358 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ128rr,
13359 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13360 : // GIR_Coverage, 8380,
13361 : GIR_Done,
13362 : // Label 1153: @28658
13363 : GIM_Try, /*On fail goto*//*Label 1154*/ 28681, // Rule ID 8869 //
13364 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
13365 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
13366 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13367 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13368 : // (uint_to_fp:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PSZ256rr:{ *:[v4f32] } VR256X:{ *:[v4i64] }:$src)
13369 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZ256rr,
13370 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13371 : // GIR_Coverage, 8869,
13372 : GIR_Done,
13373 : // Label 1154: @28681
13374 : GIM_Reject,
13375 : // Label 1143: @28682
13376 : GIM_Try, /*On fail goto*//*Label 1155*/ 28705, // Rule ID 8359 //
13377 : GIM_CheckFeatures, GIFBS_HasVLX,
13378 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13379 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13380 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13381 : // (uint_to_fp:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src) => (VCVTUDQ2PDZ256rr:{ *:[v4f64] } VR128X:{ *:[v4i32] }:$src)
13382 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZ256rr,
13383 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13384 : // GIR_Coverage, 8359,
13385 : GIR_Done,
13386 : // Label 1155: @28705
13387 : GIM_Try, /*On fail goto*//*Label 1156*/ 28728, // Rule ID 8809 //
13388 : GIM_CheckFeatures, GIFBS_HasDQI_HasVLX,
13389 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
13390 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13391 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13392 : // (uint_to_fp:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src) => (VCVTUQQ2PDZ256rr:{ *:[v4f64] } VR256X:{ *:[v4i64] }:$src)
13393 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZ256rr,
13394 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13395 : // GIR_Coverage, 8809,
13396 : GIR_Done,
13397 : // Label 1156: @28728
13398 : GIM_Reject,
13399 : // Label 1144: @28729
13400 : GIM_Try, /*On fail goto*//*Label 1157*/ 28752, // Rule ID 8389 //
13401 : GIM_CheckFeatures, GIFBS_HasVLX,
13402 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13403 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13404 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13405 : // (uint_to_fp:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PSZ256rr:{ *:[v8f32] } VR256X:{ *:[v8i32] }:$src)
13406 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZ256rr,
13407 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13408 : // GIR_Coverage, 8389,
13409 : GIR_Done,
13410 : // Label 1157: @28752
13411 : GIM_Try, /*On fail goto*//*Label 1158*/ 28775, // Rule ID 8848 //
13412 : GIM_CheckFeatures, GIFBS_HasDQI,
13413 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
13414 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13415 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13416 : // (uint_to_fp:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PSZrr:{ *:[v8f32] } VR512:{ *:[v8i64] }:$src)
13417 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PSZrr,
13418 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13419 : // GIR_Coverage, 8848,
13420 : GIR_Done,
13421 : // Label 1158: @28775
13422 : GIM_Reject,
13423 : // Label 1145: @28776
13424 : GIM_Try, /*On fail goto*//*Label 1159*/ 28799, // Rule ID 8341 //
13425 : GIM_CheckFeatures, GIFBS_HasAVX512,
13426 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13427 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13428 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13429 : // (uint_to_fp:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src) => (VCVTUDQ2PDZrr:{ *:[v8f64] } VR256X:{ *:[v8i32] }:$src)
13430 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PDZrr,
13431 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13432 : // GIR_Coverage, 8341,
13433 : GIR_Done,
13434 : // Label 1159: @28799
13435 : GIM_Try, /*On fail goto*//*Label 1160*/ 28822, // Rule ID 8788 //
13436 : GIM_CheckFeatures, GIFBS_HasDQI,
13437 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
13438 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13439 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13440 : // (uint_to_fp:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src) => (VCVTUQQ2PDZrr:{ *:[v8f64] } VR512:{ *:[v8i64] }:$src)
13441 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUQQ2PDZrr,
13442 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13443 : // GIR_Coverage, 8788,
13444 : GIR_Done,
13445 : // Label 1160: @28822
13446 : GIM_Reject,
13447 : // Label 1146: @28823
13448 : GIM_Try, /*On fail goto*//*Label 1161*/ 28846, // Rule ID 8368 //
13449 : GIM_CheckFeatures, GIFBS_HasAVX512,
13450 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
13451 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13452 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13453 : // (uint_to_fp:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src) => (VCVTUDQ2PSZrr:{ *:[v16f32] } VR512:{ *:[v16i32] }:$src)
13454 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VCVTUDQ2PSZrr,
13455 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13456 : // GIR_Coverage, 8368,
13457 : GIR_Done,
13458 : // Label 1161: @28846
13459 : GIM_Reject,
13460 : // Label 1147: @28847
13461 : GIM_Reject,
13462 : // Label 29: @28848
13463 : GIM_Try, /*On fail goto*//*Label 1162*/ 28860, // Rule ID 548 //
13464 : // MIs[0] dst
13465 : GIM_CheckIsMBB, /*MI*/0, /*Op*/0,
13466 : // (br (bb:{ *:[Other] }):$dst) => (JMP_1 (bb:{ *:[Other] }):$dst)
13467 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::JMP_1,
13468 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13469 : // GIR_Coverage, 548,
13470 : GIR_Done,
13471 : // Label 1162: @28860
13472 : GIM_Reject,
13473 : // Label 30: @28861
13474 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 1166*/ 28945,
13475 : /*GILLT_s16*//*Label 1163*/ 28870,
13476 : /*GILLT_s32*//*Label 1164*/ 28895,
13477 : /*GILLT_s64*//*Label 1165*/ 28920,
13478 : // Label 1163: @28870
13479 : GIM_Try, /*On fail goto*//*Label 1167*/ 28894, // Rule ID 16221 //
13480 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
13481 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
13482 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
13483 : // (cttz_zero_undef:{ *:[i16] } GR16:{ *:[i16] }:$src) => (BSF16rr:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src)
13484 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF16rr,
13485 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
13486 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13487 : // GIR_Coverage, 16221,
13488 : GIR_Done,
13489 : // Label 1167: @28894
13490 : GIM_Reject,
13491 : // Label 1164: @28895
13492 : GIM_Try, /*On fail goto*//*Label 1168*/ 28919, // Rule ID 16222 //
13493 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
13494 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
13495 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
13496 : // (cttz_zero_undef:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSF32rr:{ *:[i32] }:{ *:[i32] } GR32:{ *:[i32] }:$src)
13497 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF32rr,
13498 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
13499 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13500 : // GIR_Coverage, 16222,
13501 : GIR_Done,
13502 : // Label 1168: @28919
13503 : GIM_Reject,
13504 : // Label 1165: @28920
13505 : GIM_Try, /*On fail goto*//*Label 1169*/ 28944, // Rule ID 16223 //
13506 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
13507 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
13508 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
13509 : // (cttz_zero_undef:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSF64rr:{ *:[i64] }:{ *:[i32] } GR64:{ *:[i64] }:$src)
13510 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSF64rr,
13511 : GIR_AddImplicitDef, /*InsnID*/0, X86::EFLAGS,
13512 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13513 : // GIR_Coverage, 16223,
13514 : GIR_Done,
13515 : // Label 1169: @28944
13516 : GIM_Reject,
13517 : // Label 1166: @28945
13518 : GIM_Reject,
13519 : // Label 31: @28946
13520 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 20, /*)*//*default:*//*Label 1176*/ 29108,
13521 : /*GILLT_v2s64*//*Label 1170*/ 28964, 0,
13522 : /*GILLT_v4s32*//*Label 1171*/ 28988,
13523 : /*GILLT_v4s64*//*Label 1172*/ 29012, 0, 0,
13524 : /*GILLT_v8s32*//*Label 1173*/ 29036,
13525 : /*GILLT_v8s64*//*Label 1174*/ 29060, 0, 0, 0,
13526 : /*GILLT_v16s32*//*Label 1175*/ 29084,
13527 : // Label 1170: @28964
13528 : GIM_Try, /*On fail goto*//*Label 1177*/ 28987, // Rule ID 10456 //
13529 : GIM_CheckFeatures, GIFBS_HasCDI_HasVLX,
13530 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
13531 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13532 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13533 : // (ctlz:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPLZCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1)
13534 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZ128rr,
13535 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13536 : // GIR_Coverage, 10456,
13537 : GIR_Done,
13538 : // Label 1177: @28987
13539 : GIM_Reject,
13540 : // Label 1171: @28988
13541 : GIM_Try, /*On fail goto*//*Label 1178*/ 29011, // Rule ID 10483 //
13542 : GIM_CheckFeatures, GIFBS_HasCDI_HasVLX,
13543 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13544 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13545 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13546 : // (ctlz:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPLZCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1)
13547 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZ128rr,
13548 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13549 : // GIR_Coverage, 10483,
13550 : GIR_Done,
13551 : // Label 1178: @29011
13552 : GIM_Reject,
13553 : // Label 1172: @29012
13554 : GIM_Try, /*On fail goto*//*Label 1179*/ 29035, // Rule ID 10447 //
13555 : GIM_CheckFeatures, GIFBS_HasCDI_HasVLX,
13556 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
13557 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13558 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13559 : // (ctlz:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPLZCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1)
13560 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZ256rr,
13561 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13562 : // GIR_Coverage, 10447,
13563 : GIR_Done,
13564 : // Label 1179: @29035
13565 : GIM_Reject,
13566 : // Label 1173: @29036
13567 : GIM_Try, /*On fail goto*//*Label 1180*/ 29059, // Rule ID 10474 //
13568 : GIM_CheckFeatures, GIFBS_HasCDI_HasVLX,
13569 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13570 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13571 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13572 : // (ctlz:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPLZCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1)
13573 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZ256rr,
13574 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13575 : // GIR_Coverage, 10474,
13576 : GIR_Done,
13577 : // Label 1180: @29059
13578 : GIM_Reject,
13579 : // Label 1174: @29060
13580 : GIM_Try, /*On fail goto*//*Label 1181*/ 29083, // Rule ID 10438 //
13581 : GIM_CheckFeatures, GIFBS_HasCDI,
13582 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
13583 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13584 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13585 : // (ctlz:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPLZCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1)
13586 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTQZrr,
13587 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13588 : // GIR_Coverage, 10438,
13589 : GIR_Done,
13590 : // Label 1181: @29083
13591 : GIM_Reject,
13592 : // Label 1175: @29084
13593 : GIM_Try, /*On fail goto*//*Label 1182*/ 29107, // Rule ID 10465 //
13594 : GIM_CheckFeatures, GIFBS_HasCDI,
13595 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
13596 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13597 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13598 : // (ctlz:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPLZCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1)
13599 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPLZCNTDZrr,
13600 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13601 : // GIR_Coverage, 10465,
13602 : GIR_Done,
13603 : // Label 1182: @29107
13604 : GIM_Reject,
13605 : // Label 1176: @29108
13606 : GIM_Reject,
13607 : // Label 32: @29109
13608 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/8, 25, /*)*//*default:*//*Label 1195*/ 29420,
13609 : /*GILLT_v2s64*//*Label 1183*/ 29132, 0,
13610 : /*GILLT_v4s32*//*Label 1184*/ 29156,
13611 : /*GILLT_v4s64*//*Label 1185*/ 29180, 0,
13612 : /*GILLT_v8s16*//*Label 1186*/ 29204,
13613 : /*GILLT_v8s32*//*Label 1187*/ 29228,
13614 : /*GILLT_v8s64*//*Label 1188*/ 29252, 0,
13615 : /*GILLT_v16s8*//*Label 1189*/ 29276,
13616 : /*GILLT_v16s16*//*Label 1190*/ 29300,
13617 : /*GILLT_v16s32*//*Label 1191*/ 29324, 0,
13618 : /*GILLT_v32s8*//*Label 1192*/ 29348,
13619 : /*GILLT_v32s16*//*Label 1193*/ 29372, 0,
13620 : /*GILLT_v64s8*//*Label 1194*/ 29396,
13621 : // Label 1183: @29132
13622 : GIM_Try, /*On fail goto*//*Label 1196*/ 29155, // Rule ID 10564 //
13623 : GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ,
13624 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v2s64,
13625 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13626 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13627 : // (ctpop:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1) => (VPOPCNTQZ128rr:{ *:[v2i64] } VR128X:{ *:[v2i64] }:$src1)
13628 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZ128rr,
13629 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13630 : // GIR_Coverage, 10564,
13631 : GIR_Done,
13632 : // Label 1196: @29155
13633 : GIM_Reject,
13634 : // Label 1184: @29156
13635 : GIM_Try, /*On fail goto*//*Label 1197*/ 29179, // Rule ID 10591 //
13636 : GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ,
13637 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s32,
13638 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13639 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13640 : // (ctpop:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1) => (VPOPCNTDZ128rr:{ *:[v4i32] } VR128X:{ *:[v4i32] }:$src1)
13641 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZ128rr,
13642 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13643 : // GIR_Coverage, 10591,
13644 : GIR_Done,
13645 : // Label 1197: @29179
13646 : GIM_Reject,
13647 : // Label 1185: @29180
13648 : GIM_Try, /*On fail goto*//*Label 1198*/ 29203, // Rule ID 10555 //
13649 : GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ,
13650 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v4s64,
13651 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13652 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13653 : // (ctpop:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1) => (VPOPCNTQZ256rr:{ *:[v4i64] } VR256X:{ *:[v4i64] }:$src1)
13654 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZ256rr,
13655 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13656 : // GIR_Coverage, 10555,
13657 : GIR_Done,
13658 : // Label 1198: @29203
13659 : GIM_Reject,
13660 : // Label 1186: @29204
13661 : GIM_Try, /*On fail goto*//*Label 1199*/ 29227, // Rule ID 11672 //
13662 : GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX,
13663 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s16,
13664 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13665 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13666 : // (ctpop:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1) => (VPOPCNTWZ128rr:{ *:[v8i16] } VR128X:{ *:[v8i16] }:$src1)
13667 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZ128rr,
13668 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13669 : // GIR_Coverage, 11672,
13670 : GIR_Done,
13671 : // Label 1199: @29227
13672 : GIM_Reject,
13673 : // Label 1187: @29228
13674 : GIM_Try, /*On fail goto*//*Label 1200*/ 29251, // Rule ID 10582 //
13675 : GIM_CheckFeatures, GIFBS_HasVLX_HasVPOPCNTDQ,
13676 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s32,
13677 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13678 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13679 : // (ctpop:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1) => (VPOPCNTDZ256rr:{ *:[v8i32] } VR256X:{ *:[v8i32] }:$src1)
13680 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZ256rr,
13681 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13682 : // GIR_Coverage, 10582,
13683 : GIR_Done,
13684 : // Label 1200: @29251
13685 : GIM_Reject,
13686 : // Label 1188: @29252
13687 : GIM_Try, /*On fail goto*//*Label 1201*/ 29275, // Rule ID 10546 //
13688 : GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ,
13689 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v8s64,
13690 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13691 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13692 : // (ctpop:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1) => (VPOPCNTQZrr:{ *:[v8i64] } VR512:{ *:[v8i64] }:$src1)
13693 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTQZrr,
13694 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13695 : // GIR_Coverage, 10546,
13696 : GIR_Done,
13697 : // Label 1201: @29275
13698 : GIM_Reject,
13699 : // Label 1189: @29276
13700 : GIM_Try, /*On fail goto*//*Label 1202*/ 29299, // Rule ID 11654 //
13701 : GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX,
13702 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s8,
13703 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR128XRegClassID,
13704 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR128XRegClassID,
13705 : // (ctpop:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1) => (VPOPCNTBZ128rr:{ *:[v16i8] } VR128X:{ *:[v16i8] }:$src1)
13706 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZ128rr,
13707 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13708 : // GIR_Coverage, 11654,
13709 : GIR_Done,
13710 : // Label 1202: @29299
13711 : GIM_Reject,
13712 : // Label 1190: @29300
13713 : GIM_Try, /*On fail goto*//*Label 1203*/ 29323, // Rule ID 11666 //
13714 : GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX,
13715 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s16,
13716 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13717 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13718 : // (ctpop:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1) => (VPOPCNTWZ256rr:{ *:[v16i16] } VR256X:{ *:[v16i16] }:$src1)
13719 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZ256rr,
13720 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13721 : // GIR_Coverage, 11666,
13722 : GIR_Done,
13723 : // Label 1203: @29323
13724 : GIM_Reject,
13725 : // Label 1191: @29324
13726 : GIM_Try, /*On fail goto*//*Label 1204*/ 29347, // Rule ID 10573 //
13727 : GIM_CheckFeatures, GIFBS_HasVPOPCNTDQ,
13728 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v16s32,
13729 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13730 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13731 : // (ctpop:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1) => (VPOPCNTDZrr:{ *:[v16i32] } VR512:{ *:[v16i32] }:$src1)
13732 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTDZrr,
13733 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13734 : // GIR_Coverage, 10573,
13735 : GIR_Done,
13736 : // Label 1204: @29347
13737 : GIM_Reject,
13738 : // Label 1192: @29348
13739 : GIM_Try, /*On fail goto*//*Label 1205*/ 29371, // Rule ID 11648 //
13740 : GIM_CheckFeatures, GIFBS_HasBITALG_HasVLX,
13741 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s8,
13742 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR256XRegClassID,
13743 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR256XRegClassID,
13744 : // (ctpop:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1) => (VPOPCNTBZ256rr:{ *:[v32i8] } VR256X:{ *:[v32i8] }:$src1)
13745 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZ256rr,
13746 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13747 : // GIR_Coverage, 11648,
13748 : GIR_Done,
13749 : // Label 1205: @29371
13750 : GIM_Reject,
13751 : // Label 1193: @29372
13752 : GIM_Try, /*On fail goto*//*Label 1206*/ 29395, // Rule ID 11660 //
13753 : GIM_CheckFeatures, GIFBS_HasBITALG,
13754 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v32s16,
13755 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13756 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13757 : // (ctpop:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1) => (VPOPCNTWZrr:{ *:[v32i16] } VR512:{ *:[v32i16] }:$src1)
13758 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTWZrr,
13759 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13760 : // GIR_Coverage, 11660,
13761 : GIR_Done,
13762 : // Label 1206: @29395
13763 : GIM_Reject,
13764 : // Label 1194: @29396
13765 : GIM_Try, /*On fail goto*//*Label 1207*/ 29419, // Rule ID 11642 //
13766 : GIM_CheckFeatures, GIFBS_HasBITALG,
13767 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_v64s8,
13768 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::VR512RegClassID,
13769 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::VR512RegClassID,
13770 : // (ctpop:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1) => (VPOPCNTBZrr:{ *:[v64i8] } VR512:{ *:[v64i8] }:$src1)
13771 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::VPOPCNTBZrr,
13772 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13773 : // GIR_Coverage, 11642,
13774 : GIR_Done,
13775 : // Label 1207: @29419
13776 : GIM_Reject,
13777 : // Label 1195: @29420
13778 : GIM_Reject,
13779 : // Label 33: @29421
13780 : GIM_SwitchType, /*MI*/0, /*Op*/0, /*[*/2, 5, /*)*//*default:*//*Label 1211*/ 29510,
13781 : /*GILLT_s16*//*Label 1208*/ 29430,
13782 : /*GILLT_s32*//*Label 1209*/ 29466,
13783 : /*GILLT_s64*//*Label 1210*/ 29488,
13784 : // Label 1208: @29430
13785 : GIM_Try, /*On fail goto*//*Label 1212*/ 29465, // Rule ID 16227 //
13786 : GIM_CheckFeatures, GIFBS_HasMOVBE,
13787 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s16,
13788 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR16RegClassID,
13789 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR16RegClassID,
13790 : // (bswap:{ *:[i16] } GR16:{ *:[i16] }:$src) => (ROL16ri:{ *:[i16] }:{ *:[i32] } GR16:{ *:[i16] }:$src, 8:{ *:[i8] })
13791 : GIR_BuildMI, /*InsnID*/0, /*Opcode*/X86::ROL16ri,
13792 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // dst
13793 : GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/1, // src
13794 : GIR_AddImm, /*InsnID*/0, /*Imm*/8,
13795 : GIR_EraseFromParent, /*InsnID*/0,
13796 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13797 : // GIR_Coverage, 16227,
13798 : GIR_Done,
13799 : // Label 1212: @29465
13800 : GIM_Reject,
13801 : // Label 1209: @29466
13802 : GIM_Try, /*On fail goto*//*Label 1213*/ 29487, // Rule ID 5 //
13803 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
13804 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR32RegClassID,
13805 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR32RegClassID,
13806 : // (bswap:{ *:[i32] } GR32:{ *:[i32] }:$src) => (BSWAP32r:{ *:[i32] } GR32:{ *:[i32] }:$src)
13807 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP32r,
13808 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13809 : // GIR_Coverage, 5,
13810 : GIR_Done,
13811 : // Label 1213: @29487
13812 : GIM_Reject,
13813 : // Label 1210: @29488
13814 : GIM_Try, /*On fail goto*//*Label 1214*/ 29509, // Rule ID 6 //
13815 : GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s64,
13816 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/0, /*RC*/X86::GR64RegClassID,
13817 : GIM_CheckRegBankForClass, /*MI*/0, /*Op*/1, /*RC*/X86::GR64RegClassID,
13818 : // (bswap:{ *:[i64] } GR64:{ *:[i64] }:$src) => (BSWAP64r:{ *:[i64] } GR64:{ *:[i64] }:$src)
13819 : GIR_MutateOpcode, /*InsnID*/0, /*RecycleInsnID*/0, /*Opcode*/X86::BSWAP64r,
13820 : GIR_ConstrainSelectedInstOperands, /*InsnID*/0,
13821 : // GIR_Coverage, 6,
13822 : GIR_Done,
13823 : // Label 1214: @29509
13824 : GIM_Reject,
13825 : // Label 1211: @29510
13826 : GIM_Reject,
13827 : // Label 34: @29511
13828 : GIM_Reject,
13829 : };
13830 0 : return MatchTable0;
13831 : }
13832 : #endif // ifdef GET_GLOBALISEL_IMPL
13833 : #ifdef GET_GLOBALISEL_PREDICATES_DECL
13834 : PredicateBitset AvailableModuleFeatures;
13835 : mutable PredicateBitset AvailableFunctionFeatures;
13836 : PredicateBitset getAvailableFeatures() const {
13837 : return AvailableModuleFeatures | AvailableFunctionFeatures;
13838 : }
13839 : PredicateBitset
13840 : computeAvailableModuleFeatures(const X86Subtarget *Subtarget) const;
13841 : PredicateBitset
13842 : computeAvailableFunctionFeatures(const X86Subtarget *Subtarget,
13843 : const MachineFunction *MF) const;
13844 : #endif // ifdef GET_GLOBALISEL_PREDICATES_DECL
13845 : #ifdef GET_GLOBALISEL_PREDICATES_INIT
13846 16283 : AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),
13847 : AvailableFunctionFeatures()
13848 : #endif // ifdef GET_GLOBALISEL_PREDICATES_INIT
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