LCOV - code coverage report
Current view: top level - build-llvm/lib/Target/XCore - XCoreGenSubtargetInfo.inc (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 5 9 55.6 %
Date: 2018-05-20 00:06:23 Functions: 2 6 33.3 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
       2             : |*                                                                            *|
       3             : |* Subtarget Enumeration Source Fragment                                      *|
       4             : |*                                                                            *|
       5             : |* Automatically generated file, do not edit!                                 *|
       6             : |*                                                                            *|
       7             : \*===----------------------------------------------------------------------===*/
       8             : 
       9             : 
      10             : #ifdef GET_SUBTARGETINFO_ENUM
      11             : #undef GET_SUBTARGETINFO_ENUM
      12             : 
      13             : namespace llvm {
      14             : } // end namespace llvm
      15             : 
      16             : #endif // GET_SUBTARGETINFO_ENUM
      17             : 
      18             : 
      19             : #ifdef GET_SUBTARGETINFO_MC_DESC
      20             : #undef GET_SUBTARGETINFO_MC_DESC
      21             : 
      22             : namespace llvm {
      23             : 
      24             : // Sorted (by key) array of values for CPU subtype.
      25             : extern const llvm::SubtargetFeatureKV XCoreSubTypeKV[] = {
      26             :   { "generic", "Select the generic processor", { }, { } },
      27             :   { "xs1b-generic", "Select the xs1b-generic processor", { }, { } },
      28             : };
      29             : 
      30             : #ifdef DBGFIELD
      31             : #error "<target>GenSubtargetInfo.inc requires a DBGFIELD macro"
      32             : #endif
      33             : #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
      34             : #define DBGFIELD(x) x,
      35             : #else
      36             : #define DBGFIELD(x)
      37             : #endif
      38             : 
      39             : // ===============================================================
      40             : // Data tables for the new per-operand machine model.
      41             : 
      42             : // {ProcResourceIdx, Cycles}
      43             : extern const llvm::MCWriteProcResEntry XCoreWriteProcResTable[] = {
      44             :   { 0,  0}, // Invalid
      45             : }; // XCoreWriteProcResTable
      46             : 
      47             : // {Cycles, WriteResourceID}
      48             : extern const llvm::MCWriteLatencyEntry XCoreWriteLatencyTable[] = {
      49             :   { 0,  0}, // Invalid
      50             : }; // XCoreWriteLatencyTable
      51             : 
      52             : // {UseIdx, WriteResourceID, Cycles}
      53             : extern const llvm::MCReadAdvanceEntry XCoreReadAdvanceTable[] = {
      54             :   {0,  0,  0}, // Invalid
      55             : }; // XCoreReadAdvanceTable
      56             : 
      57             : static const llvm::MCSchedModel NoSchedModel = {
      58             :   MCSchedModel::DefaultIssueWidth,
      59             :   MCSchedModel::DefaultMicroOpBufferSize,
      60             :   MCSchedModel::DefaultLoopMicroOpBufferSize,
      61             :   MCSchedModel::DefaultLoadLatency,
      62             :   MCSchedModel::DefaultHighLatency,
      63             :   MCSchedModel::DefaultMispredictPenalty,
      64             :   false, // PostRAScheduler
      65             :   false, // CompleteModel
      66             :   0, // Processor ID
      67             :   nullptr, nullptr, 0, 0, // No instruction-level machine model.
      68             :   nullptr, // No Itinerary
      69             :   nullptr // No extra processor descriptor
      70             : };
      71             : 
      72             : // Sorted (by key) array of itineraries for CPU subtype.
      73             : extern const llvm::SubtargetInfoKV XCoreProcSchedKV[] = {
      74             :   { "generic", (const void *)&NoSchedModel },
      75             :   { "xs1b-generic", (const void *)&NoSchedModel },
      76             : };
      77             : 
      78             : #undef DBGFIELD
      79             : 
      80          81 : static inline MCSubtargetInfo *createXCoreMCSubtargetInfoImpl(const Triple &TT, StringRef CPU, StringRef FS) {
      81             :   return new MCSubtargetInfo(TT, CPU, FS, None, XCoreSubTypeKV, 
      82             :                       XCoreProcSchedKV, XCoreWriteProcResTable, XCoreWriteLatencyTable, XCoreReadAdvanceTable, 
      83         162 :                       nullptr, nullptr, nullptr);
      84             : }
      85             : 
      86             : } // end namespace llvm
      87             : 
      88             : #endif // GET_SUBTARGETINFO_MC_DESC
      89             : 
      90             : 
      91             : #ifdef GET_SUBTARGETINFO_TARGET_DESC
      92             : #undef GET_SUBTARGETINFO_TARGET_DESC
      93             : 
      94             : #include "llvm/Support/Debug.h"
      95             : #include "llvm/Support/raw_ostream.h"
      96             : 
      97             : // ParseSubtargetFeatures - Parses features string setting specified
      98             : // subtarget options.
      99           0 : void llvm::XCoreSubtarget::ParseSubtargetFeatures(StringRef CPU, StringRef FS) {
     100             :   LLVM_DEBUG(dbgs() << "\nFeatures:" << FS);
     101             :   LLVM_DEBUG(dbgs() << "\nCPU:" << CPU << "\n\n");
     102           0 : }
     103             : #endif // GET_SUBTARGETINFO_TARGET_DESC
     104             : 
     105             : 
     106             : #ifdef GET_SUBTARGETINFO_HEADER
     107             : #undef GET_SUBTARGETINFO_HEADER
     108             : 
     109             : namespace llvm {
     110             : class DFAPacketizer;
     111          78 : struct XCoreGenSubtargetInfo : public TargetSubtargetInfo {
     112             :   explicit XCoreGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS);
     113             : public:
     114             :   unsigned resolveSchedClass(unsigned SchedClass,  const MachineInstr *DefMI, const TargetSchedModel *SchedModel) const override;
     115             :   DFAPacketizer *createDFAPacketizer(const InstrItineraryData *IID) const;
     116             : };
     117             : } // end namespace llvm
     118             : 
     119             : #endif // GET_SUBTARGETINFO_HEADER
     120             : 
     121             : 
     122             : #ifdef GET_SUBTARGETINFO_CTOR
     123             : #undef GET_SUBTARGETINFO_CTOR
     124             : 
     125             : #include "llvm/CodeGen/TargetSchedule.h"
     126             : 
     127             : namespace llvm {
     128             : extern const llvm::SubtargetFeatureKV XCoreFeatureKV[];
     129             : extern const llvm::SubtargetFeatureKV XCoreSubTypeKV[];
     130             : extern const llvm::SubtargetInfoKV XCoreProcSchedKV[];
     131             : extern const llvm::MCWriteProcResEntry XCoreWriteProcResTable[];
     132             : extern const llvm::MCWriteLatencyEntry XCoreWriteLatencyTable[];
     133             : extern const llvm::MCReadAdvanceEntry XCoreReadAdvanceTable[];
     134          80 : XCoreGenSubtargetInfo::XCoreGenSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS)
     135             :   : TargetSubtargetInfo(TT, CPU, FS, None, makeArrayRef(XCoreSubTypeKV, 2), 
     136             :                         XCoreProcSchedKV, XCoreWriteProcResTable, XCoreWriteLatencyTable, XCoreReadAdvanceTable, 
     137         160 :                         nullptr, nullptr, nullptr) {}
     138             : 
     139           0 : unsigned XCoreGenSubtargetInfo
     140             : ::resolveSchedClass(unsigned SchedClass, const MachineInstr *MI, const TargetSchedModel *SchedModel) const {
     141           0 :   report_fatal_error("Expected a variant SchedClass");
     142             : } // XCoreGenSubtargetInfo::resolveSchedClass
     143             : } // end namespace llvm
     144             : 
     145             : #endif // GET_SUBTARGETINFO_CTOR
     146             : 

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