LCOV - code coverage report
Current view: top level - include/llvm/CodeGen - VirtRegMap.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 19 19 100.0 %
Date: 2017-09-14 15:23:50 Functions: 4 4 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file implements a virtual register map. This maps virtual registers to
      11             : // physical registers and virtual registers to stack slots. It is created and
      12             : // updated by a register allocator and then used by a machine code rewriter that
      13             : // adds spill code and rewrites virtual into physical register references.
      14             : //
      15             : //===----------------------------------------------------------------------===//
      16             : 
      17             : #ifndef LLVM_CODEGEN_VIRTREGMAP_H
      18             : #define LLVM_CODEGEN_VIRTREGMAP_H
      19             : 
      20             : #include "llvm/ADT/IndexedMap.h"
      21             : #include "llvm/CodeGen/MachineFunctionPass.h"
      22             : #include "llvm/Target/TargetRegisterInfo.h"
      23             : 
      24             : namespace llvm {
      25             :   class MachineInstr;
      26             :   class MachineFunction;
      27             :   class MachineRegisterInfo;
      28             :   class TargetInstrInfo;
      29             :   class raw_ostream;
      30             :   class SlotIndexes;
      31             : 
      32       76325 :   class VirtRegMap : public MachineFunctionPass {
      33             :   public:
      34             :     enum {
      35             :       NO_PHYS_REG = 0,
      36             :       NO_STACK_SLOT = (1L << 30)-1,
      37             :       MAX_STACK_SLOT = (1L << 18)-1
      38             :     };
      39             : 
      40             :   private:
      41             :     MachineRegisterInfo *MRI;
      42             :     const TargetInstrInfo *TII;
      43             :     const TargetRegisterInfo *TRI;
      44             :     MachineFunction *MF;
      45             : 
      46             :     /// Virt2PhysMap - This is a virtual to physical register
      47             :     /// mapping. Each virtual register is required to have an entry in
      48             :     /// it; even spilled virtual registers (the register mapped to a
      49             :     /// spilled register is the temporary used to load it from the
      50             :     /// stack).
      51             :     IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap;
      52             : 
      53             :     /// Virt2StackSlotMap - This is virtual register to stack slot
      54             :     /// mapping. Each spilled virtual register has an entry in it
      55             :     /// which corresponds to the stack slot this register is spilled
      56             :     /// at.
      57             :     IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap;
      58             : 
      59             :     /// Virt2SplitMap - This is virtual register to splitted virtual register
      60             :     /// mapping.
      61             :     IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap;
      62             : 
      63             :     /// createSpillSlot - Allocate a spill slot for RC from MFI.
      64             :     unsigned createSpillSlot(const TargetRegisterClass *RC);
      65             : 
      66             :     VirtRegMap(const VirtRegMap&) = delete;
      67             :     void operator=(const VirtRegMap&) = delete;
      68             : 
      69             :   public:
      70             :     static char ID;
      71       15357 :     VirtRegMap() : MachineFunctionPass(ID), Virt2PhysMap(NO_PHYS_REG),
      72       61428 :                    Virt2StackSlotMap(NO_STACK_SLOT), Virt2SplitMap(0) { }
      73             :     bool runOnMachineFunction(MachineFunction &MF) override;
      74             : 
      75       15357 :     void getAnalysisUsage(AnalysisUsage &AU) const override {
      76       15357 :       AU.setPreservesAll();
      77       15357 :       MachineFunctionPass::getAnalysisUsage(AU);
      78       15357 :     }
      79             : 
      80             :     MachineFunction &getMachineFunction() const {
      81             :       assert(MF && "getMachineFunction called before runOnMachineFunction");
      82             :       return *MF;
      83             :     }
      84             : 
      85             :     MachineRegisterInfo &getRegInfo() const { return *MRI; }
      86             :     const TargetRegisterInfo &getTargetRegInfo() const { return *TRI; }
      87             : 
      88             :     void grow();
      89             : 
      90             :     /// @brief returns true if the specified virtual register is
      91             :     /// mapped to a physical register
      92             :     bool hasPhys(unsigned virtReg) const {
      93      320331 :       return getPhys(virtReg) != NO_PHYS_REG;
      94             :     }
      95             : 
      96             :     /// @brief returns the physical register mapped to the specified
      97             :     /// virtual register
      98             :     unsigned getPhys(unsigned virtReg) const {
      99             :       assert(TargetRegisterInfo::isVirtualRegister(virtReg));
     100    12245674 :       return Virt2PhysMap[virtReg];
     101             :     }
     102             : 
     103             :     /// @brief creates a mapping for the specified virtual register to
     104             :     /// the specified physical register
     105             :     void assignVirt2Phys(unsigned virtReg, MCPhysReg physReg);
     106             : 
     107             :     /// @brief clears the specified virtual register's, physical
     108             :     /// register mapping
     109             :     void clearVirt(unsigned virtReg) {
     110             :       assert(TargetRegisterInfo::isVirtualRegister(virtReg));
     111             :       assert(Virt2PhysMap[virtReg] != NO_PHYS_REG &&
     112             :              "attempt to clear a not assigned virtual register");
     113       85862 :       Virt2PhysMap[virtReg] = NO_PHYS_REG;
     114             :     }
     115             : 
     116             :     /// @brief clears all virtual to physical register mappings
     117             :     void clearAllVirt() {
     118      269656 :       Virt2PhysMap.clear();
     119      134828 :       grow();
     120             :     }
     121             : 
     122             :     /// @brief returns true if VirtReg is assigned to its preferred physreg.
     123             :     bool hasPreferredPhys(unsigned VirtReg);
     124             : 
     125             :     /// @brief returns true if VirtReg has a known preferred register.
     126             :     /// This returns false if VirtReg has a preference that is a virtual
     127             :     /// register that hasn't been assigned yet.
     128             :     bool hasKnownPreference(unsigned VirtReg);
     129             : 
     130             :     /// @brief records virtReg is a split live interval from SReg.
     131             :     void setIsSplitFromReg(unsigned virtReg, unsigned SReg) {
     132      236130 :       Virt2SplitMap[virtReg] = SReg;
     133             :     }
     134             : 
     135             :     /// @brief returns the live interval virtReg is split from.
     136             :     unsigned getPreSplitReg(unsigned virtReg) const {
     137     7543798 :       return Virt2SplitMap[virtReg];
     138             :     }
     139             : 
     140             :     /// getOriginal - Return the original virtual register that VirtReg descends
     141             :     /// from through splitting.
     142             :     /// A register that was not created by splitting is its own original.
     143             :     /// This operation is idempotent.
     144             :     unsigned getOriginal(unsigned VirtReg) const {
     145     1337308 :       unsigned Orig = getPreSplitReg(VirtReg);
     146     1337308 :       return Orig ? Orig : VirtReg;
     147             :     }
     148             : 
     149             :     /// @brief returns true if the specified virtual register is not
     150             :     /// mapped to a stack slot or rematerialized.
     151             :     bool isAssignedReg(unsigned virtReg) const {
     152        9323 :       if (getStackSlot(virtReg) == NO_STACK_SLOT)
     153             :         return true;
     154             :       // Split register can be assigned a physical register as well as a
     155             :       // stack slot or remat id.
     156         549 :       return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG);
     157             :     }
     158             : 
     159             :     /// @brief returns the stack slot mapped to the specified virtual
     160             :     /// register
     161             :     int getStackSlot(unsigned virtReg) const {
     162             :       assert(TargetRegisterInfo::isVirtualRegister(virtReg));
     163     4947578 :       return Virt2StackSlotMap[virtReg];
     164             :     }
     165             : 
     166             :     /// @brief create a mapping for the specifed virtual register to
     167             :     /// the next available stack slot
     168             :     int assignVirt2StackSlot(unsigned virtReg);
     169             :     /// @brief create a mapping for the specified virtual register to
     170             :     /// the specified stack slot
     171             :     void assignVirt2StackSlot(unsigned virtReg, int frameIndex);
     172             : 
     173             :     void print(raw_ostream &OS, const Module* M = nullptr) const override;
     174             :     void dump() const;
     175             :   };
     176             : 
     177             :   inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) {
     178             :     VRM.print(OS);
     179             :     return OS;
     180             :   }
     181             : } // End llvm namespace
     182             : 
     183             : #endif

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