LCOV - code coverage report
Current view: top level - lib/CodeGen/AsmPrinter - DbgValueHistoryCalculator.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 99 100 99.0 %
Date: 2017-09-14 15:23:50 Functions: 9 9 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- llvm/CodeGen/AsmPrinter/DbgValueHistoryCalculator.cpp --------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #include "DbgValueHistoryCalculator.h"
      11             : #include "llvm/ADT/BitVector.h"
      12             : #include "llvm/ADT/STLExtras.h"
      13             : #include "llvm/ADT/SmallVector.h"
      14             : #include "llvm/CodeGen/MachineBasicBlock.h"
      15             : #include "llvm/CodeGen/MachineFunction.h"
      16             : #include "llvm/CodeGen/MachineInstr.h"
      17             : #include "llvm/CodeGen/MachineOperand.h"
      18             : #include "llvm/IR/DebugInfoMetadata.h"
      19             : #include "llvm/IR/DebugLoc.h"
      20             : #include "llvm/MC/MCRegisterInfo.h"
      21             : #include "llvm/Support/Debug.h"
      22             : #include "llvm/Support/raw_ostream.h"
      23             : #include "llvm/Target/TargetLowering.h"
      24             : #include "llvm/Target/TargetRegisterInfo.h"
      25             : #include "llvm/Target/TargetSubtargetInfo.h"
      26             : #include <cassert>
      27             : #include <map>
      28             : #include <utility>
      29             : 
      30             : using namespace llvm;
      31             : 
      32             : #define DEBUG_TYPE "dwarfdebug"
      33             : 
      34             : // \brief If @MI is a DBG_VALUE with debug value described by a
      35             : // defined register, returns the number of this register.
      36             : // In the other case, returns 0.
      37             : static unsigned isDescribedByReg(const MachineInstr &MI) {
      38             :   assert(MI.isDebugValue());
      39             :   assert(MI.getNumOperands() == 4);
      40             :   // If location of variable is described using a register (directly or
      41             :   // indirectly), this register is always a first operand.
      42       80308 :   return MI.getOperand(0).isReg() ? MI.getOperand(0).getReg() : 0;
      43             : }
      44             : 
      45       38120 : void DbgValueHistoryMap::startInstrRange(InlinedVariable Var,
      46             :                                          const MachineInstr &MI) {
      47             :   // Instruction range should start with a DBG_VALUE instruction for the
      48             :   // variable.
      49             :   assert(MI.isDebugValue() && "not a DBG_VALUE");
      50       38120 :   auto &Ranges = VarInstrRanges[Var];
      51       67707 :   if (!Ranges.empty() && Ranges.back().second == nullptr &&
      52        4068 :       Ranges.back().first->isIdenticalTo(MI)) {
      53             :     DEBUG(dbgs() << "Coalescing identical DBG_VALUE entries:\n"
      54             :                  << "\t" << Ranges.back().first << "\t" << MI << "\n");
      55             :     return;
      56             :   }
      57      111969 :   Ranges.push_back(std::make_pair(&MI, nullptr));
      58             : }
      59             : 
      60       34177 : void DbgValueHistoryMap::endInstrRange(InlinedVariable Var,
      61             :                                        const MachineInstr &MI) {
      62       34177 :   auto &Ranges = VarInstrRanges[Var];
      63             :   // Verify that the current instruction range is not yet closed.
      64             :   assert(!Ranges.empty() && Ranges.back().second == nullptr);
      65             :   // For now, instruction ranges are not allowed to cross basic block
      66             :   // boundaries.
      67             :   assert(Ranges.back().first->getParent() == MI.getParent());
      68       68354 :   Ranges.back().second = &MI;
      69       34177 : }
      70             : 
      71       38120 : unsigned DbgValueHistoryMap::getRegisterForVar(InlinedVariable Var) const {
      72       38120 :   const auto &I = VarInstrRanges.find(Var);
      73      114360 :   if (I == VarInstrRanges.end())
      74             :     return 0;
      75       27553 :   const auto &Ranges = I->second;
      76       55106 :   if (Ranges.empty() || Ranges.back().second != nullptr)
      77             :     return 0;
      78        4068 :   return isDescribedByReg(*Ranges.back().first);
      79             : }
      80             : 
      81             : namespace {
      82             : 
      83             : // Maps physreg numbers to the variables they describe.
      84             : using InlinedVariable = DbgValueHistoryMap::InlinedVariable;
      85             : using RegDescribedVarsMap = std::map<unsigned, SmallVector<InlinedVariable, 1>>;
      86             : 
      87             : } // end anonymous namespace
      88             : 
      89             : // \brief Claim that @Var is not described by @RegNo anymore.
      90        1769 : static void dropRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
      91             :                                 InlinedVariable Var) {
      92        1769 :   const auto &I = RegVars.find(RegNo);
      93             :   assert(RegNo != 0U && I != RegVars.end());
      94        1769 :   auto &VarSet = I->second;
      95        1769 :   const auto &VarPos = llvm::find(VarSet, Var);
      96             :   assert(VarPos != VarSet.end());
      97        3538 :   VarSet.erase(VarPos);
      98             :   // Don't keep empty sets in a map to keep it as small as possible.
      99        1769 :   if (VarSet.empty())
     100             :     RegVars.erase(I);
     101        1769 : }
     102             : 
     103             : // \brief Claim that @Var is now described by @RegNo.
     104             : static void addRegDescribedVar(RegDescribedVarsMap &RegVars, unsigned RegNo,
     105             :                                InlinedVariable Var) {
     106             :   assert(RegNo != 0U);
     107       36668 :   auto &VarSet = RegVars[RegNo];
     108             :   assert(!is_contained(VarSet, Var));
     109       36668 :   VarSet.push_back(Var);
     110             : }
     111             : 
     112             : // \brief Terminate the location range for variables described by register at
     113             : // @I by inserting @ClobberingInstr to their history.
     114       21358 : static void clobberRegisterUses(RegDescribedVarsMap &RegVars,
     115             :                                 RegDescribedVarsMap::iterator I,
     116             :                                 DbgValueHistoryMap &HistMap,
     117             :                                 const MachineInstr &ClobberingInstr) {
     118             :   // Iterate over all variables described by this register and add this
     119             :   // instruction to their history, clobbering it.
     120       76893 :   for (const auto &Var : I->second)
     121       34177 :     HistMap.endInstrRange(Var, ClobberingInstr);
     122       21358 :   RegVars.erase(I);
     123       21358 : }
     124             : 
     125             : // \brief Terminate the location range for variables described by register
     126             : // @RegNo by inserting @ClobberingInstr to their history.
     127    28426345 : static void clobberRegisterUses(RegDescribedVarsMap &RegVars, unsigned RegNo,
     128             :                                 DbgValueHistoryMap &HistMap,
     129             :                                 const MachineInstr &ClobberingInstr) {
     130    28426345 :   const auto &I = RegVars.find(RegNo);
     131    28426345 :   if (I == RegVars.end())
     132             :     return;
     133        2894 :   clobberRegisterUses(RegVars, I, HistMap, ClobberingInstr);
     134             : }
     135             : 
     136             : // \brief Returns the first instruction in @MBB which corresponds to
     137             : // the function epilogue, or nullptr if @MBB doesn't contain an epilogue.
     138      118088 : static const MachineInstr *getFirstEpilogueInst(const MachineBasicBlock &MBB) {
     139      118088 :   auto LastMI = MBB.getLastNonDebugInstr();
     140      472000 :   if (LastMI == MBB.end() || !LastMI->isReturn())
     141             :     return nullptr;
     142             :   // Assume that epilogue starts with instruction having the same debug location
     143             :   // as the return instruction.
     144       12448 :   DebugLoc LastLoc = LastMI->getDebugLoc();
     145        6224 :   auto Res = LastMI;
     146        6224 :   for (MachineBasicBlock::const_reverse_iterator I = LastMI.getReverse(),
     147        6224 :                                                  E = MBB.rend();
     148       41980 :        I != E; ++I) {
     149       80568 :     if (I->getDebugLoc() != LastLoc)
     150        4528 :       return &*Res;
     151       71512 :     Res = &*I;
     152             :   }
     153             :   // If all instructions have the same debug location, assume whole MBB is
     154             :   // an epilogue.
     155        3392 :   return &*MBB.begin();
     156             : }
     157             : 
     158             : // \brief Collect registers that are modified in the function body (their
     159             : // contents is changed outside of the prologue and epilogue).
     160        6188 : static void collectChangingRegs(const MachineFunction *MF,
     161             :                                 const TargetRegisterInfo *TRI,
     162             :                                 BitVector &Regs) {
     163      136652 :   for (const auto &MBB : *MF) {
     164      118088 :     auto FirstEpilogueInst = getFirstEpilogueInst(MBB);
     165             : 
     166     3046506 :     for (const auto &MI : MBB) {
     167             :       // Avoid looking at prologue or epilogue instructions.
     168     1290189 :       if (&MI == FirstEpilogueInst)
     169             :         break;
     170     1283965 :       if (MI.getFlag(MachineInstr::FrameSetup))
     171       19621 :         continue;
     172             : 
     173             :       // Look for register defs and register masks. Register masks are
     174             :       // typically on calls and they clobber everything not in the mask.
     175     7135997 :       for (const MachineOperand &MO : MI.operands()) {
     176             :         // Skip virtual registers since they are handled by the parent.
     177    10734362 :         if (MO.isReg() && MO.isDef() && MO.getReg() &&
     178     1952188 :             !TRI->isVirtualRegister(MO.getReg())) {
     179    10518088 :           for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
     180     3794903 :                ++AI)
     181     7589806 :             Regs.set(*AI);
     182     4895559 :         } else if (MO.isRegMask()) {
     183      109262 :           Regs.setBitsNotInMask(MO.getRegMask());
     184             :         }
     185             :       }
     186             :     }
     187             :   }
     188        6188 : }
     189             : 
     190        6188 : void llvm::calculateDbgValueHistory(const MachineFunction *MF,
     191             :                                     const TargetRegisterInfo *TRI,
     192             :                                     DbgValueHistoryMap &Result) {
     193       12376 :   BitVector ChangingRegs(TRI->getNumRegs());
     194        6188 :   collectChangingRegs(MF, TRI, ChangingRegs);
     195             : 
     196        6188 :   const TargetLowering *TLI = MF->getSubtarget().getTargetLowering();
     197        6188 :   unsigned SP = TLI->getStackPointerRegisterToSaveRestore();
     198       12376 :   RegDescribedVarsMap RegVars;
     199      136652 :   for (const auto &MBB : *MF) {
     200     3111794 :     for (const auto &MI : MBB) {
     201     1319721 :       if (!MI.isDebugValue()) {
     202             :         // Not a DBG_VALUE instruction. It may clobber registers which describe
     203             :         // some variables.
     204     7181741 :         for (const MachineOperand &MO : MI.operands()) {
     205     9876476 :           if (MO.isReg() && MO.isDef() && MO.getReg()) {
     206             :             // Ignore call instructions that claim to clobber SP. The AArch64
     207             :             // backend does this for aggregate function arguments.
     208     1281117 :             if (MI.isCall() && MO.getReg() == SP)
     209      110555 :               continue;
     210             :             // If this is a virtual register, only clobber it since it doesn't
     211             :             // have aliases.
     212     1870772 :             if (TRI->isVirtualRegister(MO.getReg()))
     213           0 :               clobberRegisterUses(RegVars, MO.getReg(), Result, MI);
     214             :             // If this is a register def operand, it may end a debug value
     215             :             // range.
     216             :             else {
     217     9133038 :               for (MCRegAliasIterator AI(MO.getReg(), TRI, true); AI.isValid();
     218     3631133 :                    ++AI)
     219     7262266 :                 if (ChangingRegs.test(*AI))
     220     3606040 :                   clobberRegisterUses(RegVars, *AI, Result, MI);
     221             :             }
     222     4854199 :           } else if (MO.isRegMask()) {
     223             :             // If this is a register mask operand, clobber all debug values in
     224             :             // non-CSRs.
     225    26991873 :             for (unsigned I : ChangingRegs.set_bits()) {
     226             :               // Don't consider SP to be clobbered by register masks.
     227    53540198 :               if (unsigned(I) != SP && TRI->isPhysicalRegister(I) &&
     228    26659778 :                   MO.clobbersPhysReg(I)) {
     229    24820305 :                 clobberRegisterUses(RegVars, I, Result, MI);
     230             :               }
     231             :             }
     232             :           }
     233             :         }
     234     1281601 :         continue;
     235             :       }
     236             : 
     237             :       assert(MI.getNumOperands() > 1 && "Invalid DBG_VALUE instruction!");
     238             :       // Use the base variable (without any DW_OP_piece expressions)
     239             :       // as index into History. The full variables including the
     240             :       // piece expressions are attached to the MI.
     241       38120 :       const DILocalVariable *RawVar = MI.getDebugVariable();
     242             :       assert(RawVar->isValidLocationForIntrinsic(MI.getDebugLoc()) &&
     243             :              "Expected inlined-at fields to agree");
     244      152480 :       InlinedVariable Var(RawVar, MI.getDebugLoc()->getInlinedAt());
     245             : 
     246       38120 :       if (unsigned PrevReg = Result.getRegisterForVar(Var))
     247        1769 :         dropRegDescribedVar(RegVars, PrevReg, Var);
     248             : 
     249       38120 :       Result.startInstrRange(Var, MI);
     250             : 
     251       36747 :       if (unsigned NewReg = isDescribedByReg(MI))
     252             :         addRegDescribedVar(RegVars, NewReg, Var);
     253             :     }
     254             : 
     255             :     // Make sure locations for register-described variables are valid only
     256             :     // until the end of the basic block (unless it's the last basic block, in
     257             :     // which case let their liveness run off to the end of the function).
     258      236078 :     if (!MBB.empty() && &MBB != &MF->back()) {
     259      223606 :       for (auto I = RegVars.begin(), E = RegVars.end(); I != E;) {
     260       37350 :         auto CurElem = I++; // CurElem can be erased below.
     261       56025 :         if (TRI->isVirtualRegister(CurElem->first) ||
     262       37350 :             ChangingRegs.test(CurElem->first))
     263       18464 :           clobberRegisterUses(RegVars, CurElem, Result, MBB.back());
     264             :       }
     265             :     }
     266             :   }
     267        6188 : }

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