LCOV - code coverage report
Current view: top level - lib/CodeGen - CalcSpillWeights.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 104 104 100.0 %
Date: 2017-09-14 15:23:50 Functions: 4 4 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===------------------------ CalcSpillWeights.cpp ------------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #include "llvm/CodeGen/CalcSpillWeights.h"
      11             : #include "llvm/CodeGen/LiveIntervalAnalysis.h"
      12             : #include "llvm/CodeGen/MachineBlockFrequencyInfo.h"
      13             : #include "llvm/CodeGen/MachineFunction.h"
      14             : #include "llvm/CodeGen/MachineLoopInfo.h"
      15             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      16             : #include "llvm/CodeGen/VirtRegMap.h"
      17             : #include "llvm/Support/Debug.h"
      18             : #include "llvm/Support/raw_ostream.h"
      19             : #include "llvm/Target/TargetInstrInfo.h"
      20             : #include "llvm/Target/TargetRegisterInfo.h"
      21             : #include "llvm/Target/TargetSubtargetInfo.h"
      22             : using namespace llvm;
      23             : 
      24             : #define DEBUG_TYPE "calcspillweights"
      25             : 
      26      134834 : void llvm::calculateSpillWeightsAndHints(LiveIntervals &LIS,
      27             :                            MachineFunction &MF,
      28             :                            VirtRegMap *VRM,
      29             :                            const MachineLoopInfo &MLI,
      30             :                            const MachineBlockFrequencyInfo &MBFI,
      31             :                            VirtRegAuxInfo::NormalizingFn norm) {
      32             :   DEBUG(dbgs() << "********** Compute Spill Weights **********\n"
      33             :                << "********** Function: " << MF.getName() << '\n');
      34             : 
      35      134834 :   MachineRegisterInfo &MRI = MF.getRegInfo();
      36      269668 :   VirtRegAuxInfo VRAI(MF, LIS, VRM, MLI, MBFI, norm);
      37     2586436 :   for (unsigned i = 0, e = MRI.getNumVirtRegs(); i != e; ++i) {
      38     2316768 :     unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
      39     2316768 :     if (MRI.reg_nodbg_empty(Reg))
      40     1182173 :       continue;
      41     1134595 :     VRAI.calculateSpillWeightAndHint(LIS.getInterval(Reg));
      42             :   }
      43      134834 : }
      44             : 
      45             : // Return the preferred allocation register for reg, given a COPY instruction.
      46      934744 : static unsigned copyHint(const MachineInstr *mi, unsigned reg,
      47             :                          const TargetRegisterInfo &tri,
      48             :                          const MachineRegisterInfo &mri) {
      49             :   unsigned sub, hreg, hsub;
      50      934744 :   if (mi->getOperand(0).getReg() == reg) {
      51      760856 :     sub = mi->getOperand(0).getSubReg();
      52      380428 :     hreg = mi->getOperand(1).getReg();
      53      760856 :     hsub = mi->getOperand(1).getSubReg();
      54             :   } else {
      55     1108632 :     sub = mi->getOperand(1).getSubReg();
      56      554316 :     hreg = mi->getOperand(0).getReg();
      57     1108632 :     hsub = mi->getOperand(0).getSubReg();
      58             :   }
      59             : 
      60      934744 :   if (!hreg)
      61             :     return 0;
      62             : 
      63      934744 :   if (TargetRegisterInfo::isVirtualRegister(hreg))
      64      243596 :     return sub == hsub ? hreg : 0;
      65             : 
      66      691148 :   const TargetRegisterClass *rc = mri.getRegClass(reg);
      67             : 
      68             :   // Only allow physreg hints in rc.
      69      691148 :   if (sub == 0)
      70     1350972 :     return rc->contains(hreg) ? hreg : 0;
      71             : 
      72             :   // reg:sub should match the physreg hreg.
      73       31210 :   return tri.getMatchingSuperReg(hreg, sub, rc);
      74             : }
      75             : 
      76             : // Check if all values in LI are rematerializable
      77      791023 : static bool isRematerializable(const LiveInterval &LI,
      78             :                                const LiveIntervals &LIS,
      79             :                                VirtRegMap *VRM,
      80             :                                const TargetInstrInfo &TII) {
      81      791023 :   unsigned Reg = LI.reg;
      82     1582046 :   unsigned Original = VRM ? VRM->getOriginal(Reg) : 0;
      83     2583748 :   for (LiveInterval::const_vni_iterator I = LI.vni_begin(), E = LI.vni_end();
      84     1001702 :        I != E; ++I) {
      85      836457 :     const VNInfo *VNI = *I;
      86      836457 :     if (VNI->isUnused())
      87          20 :       continue;
      88      836437 :     if (VNI->isPHIDef())
      89             :       return false;
      90             : 
      91     1651400 :     MachineInstr *MI = LIS.getInstructionFromIndex(VNI->def);
      92             :     assert(MI && "Dead valno in interval");
      93             : 
      94             :     // Trace copies introduced by live range splitting.  The inline
      95             :     // spiller can rematerialize through these copies, so the spill
      96             :     // weight must reflect this.
      97      825700 :     if (VRM) {
      98      272230 :       while (MI->isFullCopy()) {
      99             :         // The copy destination must match the interval register.
     100      236199 :         if (MI->getOperand(0).getReg() != Reg)
     101      200168 :           return false;
     102             : 
     103             :         // Get the source register.
     104      235391 :         Reg = MI->getOperand(1).getReg();
     105             : 
     106             :         // If the original (pre-splitting) registers match this
     107             :         // copy came from a split.
     108      294453 :         if (!TargetRegisterInfo::isVirtualRegister(Reg) ||
     109       59062 :             VRM->getOriginal(Reg) != Original)
     110             :           return false;
     111             : 
     112             :         // Follow the copy live-in value.
     113       41091 :         const LiveInterval &SrcLI = LIS.getInterval(Reg);
     114       41091 :         LiveQueryResult SrcQ = SrcLI.Query(VNI->def);
     115       41091 :         VNI = SrcQ.valueIn();
     116             :         assert(VNI && "Copy from non-existing value");
     117       41091 :         if (VNI->isPHIDef())
     118             :           return false;
     119       72062 :         MI = LIS.getInstructionFromIndex(VNI->def);
     120             :         assert(MI && "Dead valno in interval");
     121             :       }
     122             :     }
     123             : 
     124      625532 :     if (!TII.isTriviallyReMaterializable(*MI, LIS.getAliasAnalysis()))
     125             :       return false;
     126             :   }
     127             :   return true;
     128             : }
     129             : 
     130             : void
     131     1244350 : VirtRegAuxInfo::calculateSpillWeightAndHint(LiveInterval &li) {
     132     1244350 :   MachineRegisterInfo &mri = MF.getRegInfo();
     133     1244350 :   const TargetRegisterInfo &tri = *MF.getSubtarget().getRegisterInfo();
     134     1244350 :   MachineBasicBlock *mbb = nullptr;
     135     1244350 :   MachineLoop *loop = nullptr;
     136     1244350 :   bool isExiting = false;
     137     1244350 :   float totalWeight = 0;
     138     1244350 :   unsigned numInstr = 0; // Number of instructions using li
     139     2035373 :   SmallPtrSet<MachineInstr*, 8> visited;
     140             : 
     141             :   // Find the best physreg hint and the best virtreg hint.
     142     1244350 :   float bestPhys = 0, bestVirt = 0;
     143     1244350 :   unsigned hintPhys = 0, hintVirt = 0;
     144             : 
     145             :   // Don't recompute a target specific hint.
     146     2488700 :   bool noHint = mri.getRegAllocationHint(li.reg).first != 0;
     147             : 
     148             :   // Don't recompute spill weight for an unspillable register.
     149     2488700 :   bool Spillable = li.isSpillable();
     150             : 
     151             :   for (MachineRegisterInfo::reg_instr_iterator
     152     1244350 :        I = mri.reg_instr_begin(li.reg), E = mri.reg_instr_end();
     153     5325199 :        I != E; ) {
     154    12242547 :     MachineInstr *mi = &*(I++);
     155     4080849 :     numInstr++;
     156     8161698 :     if (mi->isIdentityCopy() || mi->isImplicitDef() || mi->isDebugValue())
     157     3188316 :       continue;
     158     4263960 :     if (!visited.insert(mi).second)
     159      184547 :       continue;
     160             : 
     161     3894866 :     float weight = 1.0f;
     162     3894866 :     if (Spillable) {
     163             :       // Get loop info for mi.
     164     3894866 :       if (mi->getParent() != mbb) {
     165     1614776 :         mbb = mi->getParent();
     166     3229552 :         loop = Loops.getLoopFor(mbb);
     167      406062 :         isExiting = loop ? loop->isLoopExiting(mbb) : false;
     168             :       }
     169             : 
     170             :       // Calculate instr weight.
     171             :       bool reads, writes;
     172    11684598 :       std::tie(reads, writes) = mi->readsWritesVirtualRegister(li.reg);
     173     3894866 :       weight = LiveIntervals::getSpillWeight(writes, reads, &MBFI, *mi);
     174             : 
     175             :       // Give extra weight to what looks like a loop induction variable update.
     176     3894866 :       if (writes && isExiting && LIS.isLiveOutOfMBB(li, mbb))
     177       18393 :         weight *= 3;
     178             : 
     179     3894866 :       totalWeight += weight;
     180             :     }
     181             : 
     182             :     // Get allocation hints from copies.
     183    10749357 :     if (noHint || !mi->isCopy())
     184     2960122 :       continue;
     185      934744 :     unsigned hint = copyHint(mi, li.reg, tri, mri);
     186      975519 :     if (!hint)
     187       40775 :       continue;
     188             :     // Force hweight onto the stack so that x86 doesn't add hidden precision,
     189             :     // making the comparison incorrectly pass (i.e., 1 > 1 == true??).
     190             :     //
     191             :     // FIXME: we probably shouldn't use floats at all.
     192     1787938 :     volatile float hweight = Hint[hint] += weight;
     193     1787938 :     if (TargetRegisterInfo::isPhysicalRegister(hint)) {
     194      687474 :       if (hweight > bestPhys && mri.isAllocatable(hint)) {
     195      645090 :         bestPhys = hweight;
     196      645090 :         hintPhys = hint;
     197             :       }
     198             :     } else {
     199      206495 :       if (hweight > bestVirt) {
     200      174176 :         bestVirt = hweight;
     201      174176 :         hintVirt = hint;
     202             :       }
     203             :     }
     204             :   }
     205             : 
     206     1244350 :   Hint.clear();
     207             : 
     208             :   // Always prefer the physreg hint.
     209     1244350 :   if (unsigned hint = hintPhys ? hintPhys : hintVirt) {
     210     1212314 :     mri.setRegAllocationHint(li.reg, 0, hint);
     211             :     // Weakly boost the spill weight of hinted registers.
     212      606157 :     totalWeight *= 1.01F;
     213             :   }
     214             : 
     215             :   // If the live interval was already unspillable, leave it that way.
     216     1244350 :   if (!Spillable)
     217      453327 :     return;
     218             : 
     219             :   // Mark li as unspillable if all live ranges are tiny and the interval
     220             :   // is not live at any reg mask.  If the interval is live at a reg mask
     221             :   // spilling may be required.
     222     1697681 :   if (li.isZeroLength(LIS.getSlotIndexes()) &&
     223      906662 :       !li.isLiveAtIndexes(LIS.getRegMaskSlots())) {
     224      453327 :     li.markNotSpillable();
     225             :     return;
     226             :   }
     227             : 
     228             :   // If all of the definitions of the interval are re-materializable,
     229             :   // it is a preferred candidate for spilling.
     230             :   // FIXME: this gets much more complicated once we support non-trivial
     231             :   // re-materialization.
     232      791023 :   if (isRematerializable(li, LIS, VRM, *MF.getSubtarget().getInstrInfo()))
     233      165245 :     totalWeight *= 0.5F;
     234             : 
     235      791023 :   li.weight = normalize(totalWeight, li.getSize(), numInstr);
     236             : }

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