LCOV - code coverage report
Current view: top level - lib/CodeGen - LivePhysRegs.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 139 150 92.7 %
Date: 2017-09-14 15:23:50 Functions: 13 14 92.9 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file implements the LivePhysRegs utility for tracking liveness of
      11             : // physical registers across machine instructions in forward or backward order.
      12             : // A more detailed description can be found in the corresponding header file.
      13             : //
      14             : //===----------------------------------------------------------------------===//
      15             : 
      16             : #include "llvm/CodeGen/LivePhysRegs.h"
      17             : #include "llvm/CodeGen/MachineFrameInfo.h"
      18             : #include "llvm/CodeGen/MachineFunction.h"
      19             : #include "llvm/CodeGen/MachineInstrBundle.h"
      20             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      21             : #include "llvm/Support/Debug.h"
      22             : #include "llvm/Support/raw_ostream.h"
      23             : using namespace llvm;
      24             : 
      25             : 
      26             : /// \brief Remove all registers from the set that get clobbered by the register
      27             : /// mask.
      28             : /// The clobbers set will be the list of live registers clobbered
      29             : /// by the regmask.
      30      264053 : void LivePhysRegs::removeRegsInMask(const MachineOperand &MO,
      31             :         SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> *Clobbers) {
      32      528106 :   SparseSet<unsigned>::iterator LRI = LiveRegs.begin();
      33     9082378 :   while (LRI != LiveRegs.end()) {
      34     8554272 :     if (MO.clobbersPhysReg(*LRI)) {
      35     1084248 :       if (Clobbers)
      36         500 :         Clobbers->push_back(std::make_pair(*LRI, &MO));
      37     2168496 :       LRI = LiveRegs.erase(LRI);
      38             :     } else
      39     3192888 :       ++LRI;
      40             :   }
      41      264053 : }
      42             : 
      43             : /// Simulates liveness when stepping backwards over an instruction(bundle):
      44             : /// Remove Defs, add uses. This is the recommended way of calculating liveness.
      45     2341066 : void LivePhysRegs::stepBackward(const MachineInstr &MI) {
      46             :   // Remove defined registers and regmask kills from the set.
      47    12222952 :   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
      48    19763772 :     if (O->isReg()) {
      49    13577340 :       if (!O->isDef())
      50     4755023 :         continue;
      51     2033647 :       unsigned Reg = O->getReg();
      52     2033647 :       if (!TargetRegisterInfo::isPhysicalRegister(Reg))
      53           7 :         continue;
      54     2033640 :       removeReg(Reg);
      55     3093216 :     } else if (O->isRegMask())
      56      181605 :       removeRegsInMask(*O);
      57             :   }
      58             : 
      59             :   // Add uses to the set.
      60    12222952 :   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
      61    31846579 :     if (!O->isReg() || !O->readsReg())
      62     5294137 :       continue;
      63     4587749 :     unsigned Reg = O->getReg();
      64     6271266 :     if (!TargetRegisterInfo::isPhysicalRegister(Reg))
      65     1683517 :       continue;
      66     2904232 :     addReg(Reg);
      67             :   }
      68     2341066 : }
      69             : 
      70             : /// Simulates liveness when stepping forward over an instruction(bundle): Remove
      71             : /// killed-uses, add defs. This is the not recommended way, because it depends
      72             : /// on accurate kill flags. If possible use stepBackward() instead of this
      73             : /// function.
      74        3568 : void LivePhysRegs::stepForward(const MachineInstr &MI,
      75             :         SmallVectorImpl<std::pair<unsigned, const MachineOperand*>> &Clobbers) {
      76             :   // Remove killed registers from the set.
      77       21995 :   for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
      78       36854 :     if (O->isReg()) {
      79       10322 :       unsigned Reg = O->getReg();
      80       20644 :       if (!TargetRegisterInfo::isPhysicalRegister(Reg))
      81         241 :         continue;
      82       20162 :       if (O->isDef()) {
      83             :         // Note, dead defs are still recorded.  The caller should decide how to
      84             :         // handle them.
      85        8415 :         Clobbers.push_back(std::make_pair(Reg, &*O));
      86             :       } else {
      87       14552 :         if (!O->isKill())
      88        5322 :           continue;
      89             :         assert(O->isUse());
      90        1954 :         removeReg(Reg);
      91             :       }
      92        8105 :     } else if (O->isRegMask())
      93          84 :       removeRegsInMask(*O, &Clobbers);
      94             :   }
      95             : 
      96             :   // Add defs to the set.
      97       30596 :   for (auto Reg : Clobbers) {
      98             :     // Skip dead defs.  They shouldn't be added to the set.
      99       57661 :     if (Reg.second->isReg() && Reg.second->isDead())
     100        1132 :       continue;
     101       18760 :     addReg(Reg.first);
     102             :   }
     103        3568 : }
     104             : 
     105             : /// Prin the currently live registers to OS.
     106           0 : void LivePhysRegs::print(raw_ostream &OS) const {
     107           0 :   OS << "Live Registers:";
     108           0 :   if (!TRI) {
     109           0 :     OS << " (uninitialized)\n";
     110           0 :     return;
     111             :   }
     112             : 
     113           0 :   if (empty()) {
     114           0 :     OS << " (empty)\n";
     115           0 :     return;
     116             :   }
     117             : 
     118           0 :   for (const_iterator I = begin(), E = end(); I != E; ++I)
     119           0 :     OS << " " << PrintReg(*I, TRI);
     120           0 :   OS << "\n";
     121             : }
     122             : 
     123             : #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
     124             : LLVM_DUMP_METHOD void LivePhysRegs::dump() const {
     125             :   dbgs() << "  " << *this;
     126             : }
     127             : #endif
     128             : 
     129     1965660 : bool LivePhysRegs::available(const MachineRegisterInfo &MRI,
     130             :                              unsigned Reg) const {
     131     3931320 :   if (LiveRegs.count(Reg))
     132             :     return false;
     133     2101172 :   if (MRI.isReserved(Reg))
     134             :     return false;
     135    10910444 :   for (MCRegAliasIterator R(Reg, TRI, false); R.isValid(); ++R) {
     136    14229387 :     if (LiveRegs.count(*R))
     137       13429 :       return false;
     138             :   }
     139      712093 :   return true;
     140             : }
     141             : 
     142             : /// Add live-in registers of basic block \p MBB to \p LiveRegs.
     143      314405 : void LivePhysRegs::addBlockLiveIns(const MachineBasicBlock &MBB) {
     144     1429269 :   for (const auto &LI : MBB.liveins()) {
     145      800459 :     unsigned Reg = LI.PhysReg;
     146      800459 :     LaneBitmask Mask = LI.LaneMask;
     147     1600918 :     MCSubRegIndexIterator S(Reg, TRI);
     148             :     assert(Mask.any() && "Invalid livein mask");
     149     1611210 :     if (Mask.all() || !S.isValid()) {
     150      799010 :       addReg(Reg);
     151      799010 :       continue;
     152             :     }
     153       10434 :     for (; S.isValid(); ++S) {
     154       17970 :       unsigned SI = S.getSubRegIndex();
     155       26955 :       if ((Mask & TRI->getSubRegIndexLaneMask(SI)).any())
     156        6022 :         addReg(S.getSubReg());
     157             :     }
     158             :   }
     159      314405 : }
     160             : 
     161             : /// Adds all callee saved registers to \p LiveRegs.
     162      321343 : static void addCalleeSavedRegs(LivePhysRegs &LiveRegs,
     163             :                                const MachineFunction &MF) {
     164      321343 :   const MachineRegisterInfo &MRI = MF.getRegInfo();
     165     3073475 :   for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
     166     2752132 :     LiveRegs.addReg(*CSR);
     167      321343 : }
     168             : 
     169      201038 : void LivePhysRegs::addPristines(const MachineFunction &MF) {
     170      201038 :   const MachineFrameInfo &MFI = MF.getFrameInfo();
     171      201038 :   if (!MFI.isCalleeSavedInfoValid())
     172      199558 :     return;
     173             :   /// This function will usually be called on an empty object, handle this
     174             :   /// as a special case.
     175      199548 :   if (empty()) {
     176             :     /// Add all callee saved regs, then remove the ones that are saved and
     177             :     /// restored.
     178      198068 :     addCalleeSavedRegs(*this, MF);
     179             :     /// Remove the ones that are not saved/restored; they are pristine.
     180     1550186 :     for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
     181      757914 :       removeReg(Info.getReg());
     182             :     return;
     183             :   }
     184             :   /// If a callee-saved register that is not pristine is already present
     185             :   /// in the set, we should make sure that it stays in it. Precompute the
     186             :   /// set of pristine registers in a separate object.
     187             :   /// Add all callee saved regs, then remove the ones that are saved+restored.
     188        4440 :   LivePhysRegs Pristine(*TRI);
     189        1480 :   addCalleeSavedRegs(Pristine, MF);
     190             :   /// Remove the ones that are not saved/restored; they are pristine.
     191        6683 :   for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
     192         763 :     Pristine.removeReg(Info.getReg());
     193       69901 :   for (MCPhysReg R : Pristine)
     194       65461 :     addReg(R);
     195             : }
     196             : 
     197      205186 : void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
     198      205186 :   if (!MBB.succ_empty()) {
     199             :     // To get the live-outs we simply merge the live-ins of all successors.
     200      512121 :     for (const MachineBasicBlock *Succ : MBB.successors())
     201      310138 :       addBlockLiveIns(*Succ);
     202        3203 :   } else if (MBB.isReturnBlock()) {
     203             :     // For the return block: Add all callee saved registers that are saved and
     204             :     // restored (somewhere); This does not include callee saved registers that
     205             :     // are unused and hence not saved and restored; they are called pristine.
     206        1031 :     const MachineFunction &MF = *MBB.getParent();
     207        1031 :     const MachineFrameInfo &MFI = MF.getFrameInfo();
     208        1031 :     if (MFI.isCalleeSavedInfoValid()) {
     209        5336 :       for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
     210        1220 :         if (Info.isRestored())
     211        1190 :           addReg(Info.getReg());
     212             :     }
     213             :   }
     214      205186 : }
     215             : 
     216      334547 : void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) {
     217      334547 :   const MachineFunction &MF = *MBB.getParent();
     218      334547 :   if (!MBB.succ_empty()) {
     219      196771 :     addPristines(MF);
     220      196771 :     addLiveOutsNoPristines(MBB);
     221      137776 :   } else if (MBB.isReturnBlock()) {
     222             :     // For the return block: Add all callee saved registers.
     223      122796 :     const MachineFrameInfo &MFI = MF.getFrameInfo();
     224      122796 :     if (MFI.isCalleeSavedInfoValid())
     225      121795 :       addCalleeSavedRegs(*this, MF);
     226             :   }
     227      334547 : }
     228             : 
     229        4267 : void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) {
     230        4267 :   const MachineFunction &MF = *MBB.getParent();
     231        4267 :   addPristines(MF);
     232        4267 :   addBlockLiveIns(MBB);
     233        4267 : }
     234             : 
     235        8274 : void llvm::computeLiveIns(LivePhysRegs &LiveRegs,
     236             :                           const MachineBasicBlock &MBB) {
     237        8274 :   const MachineFunction &MF = *MBB.getParent();
     238        8274 :   const MachineRegisterInfo &MRI = MF.getRegInfo();
     239        8274 :   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
     240        8274 :   LiveRegs.init(TRI);
     241        8274 :   LiveRegs.addLiveOutsNoPristines(MBB);
     242       88024 :   for (const MachineInstr &MI : make_range(MBB.rbegin(), MBB.rend()))
     243       27464 :     LiveRegs.stepBackward(MI);
     244        8274 : }
     245             : 
     246        8274 : void llvm::addLiveIns(MachineBasicBlock &MBB, const LivePhysRegs &LiveRegs) {
     247             :   assert(MBB.livein_empty() && "Expected empty live-in list");
     248        8274 :   const MachineFunction &MF = *MBB.getParent();
     249        8274 :   const MachineRegisterInfo &MRI = MF.getRegInfo();
     250        8274 :   const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
     251      110872 :   for (MCPhysReg Reg : LiveRegs) {
     252      172100 :     if (MRI.isReserved(Reg))
     253       26306 :       continue;
     254             :     // Skip the register if we are about to add one of its super registers.
     255       59744 :     bool ContainsSuperReg = false;
     256      134929 :     for (MCSuperRegIterator SReg(Reg, &TRI); SReg.isValid(); ++SReg) {
     257      214539 :       if (LiveRegs.contains(*SReg) && !MRI.isReserved(*SReg)) {
     258             :         ContainsSuperReg = true;
     259             :         break;
     260             :       }
     261             :     }
     262       59744 :     if (ContainsSuperReg)
     263       42054 :       continue;
     264       17690 :     MBB.addLiveIn(Reg);
     265             :   }
     266        8274 : }
     267             : 
     268        3200 : void llvm::computeAndAddLiveIns(LivePhysRegs &LiveRegs,
     269             :                                 MachineBasicBlock &MBB) {
     270        3200 :   computeLiveIns(LiveRegs, MBB);
     271        3200 :   addLiveIns(MBB, LiveRegs);
     272        3200 : }

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