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1 : //===- LiveRegUnits.cpp - Register Unit Set -------------------------------===//
2 : //
3 : // The LLVM Compiler Infrastructure
4 : //
5 : // This file is distributed under the University of Illinois Open Source
6 : // License. See LICENSE.TXT for details.
7 : //
8 : //===----------------------------------------------------------------------===//
9 : //
10 : /// \file This file imlements the LiveRegUnits set.
11 : //
12 : //===----------------------------------------------------------------------===//
13 :
14 : #include "llvm/CodeGen/LiveRegUnits.h"
15 :
16 : #include "llvm/CodeGen/MachineBasicBlock.h"
17 : #include "llvm/CodeGen/MachineFrameInfo.h"
18 : #include "llvm/CodeGen/MachineFunction.h"
19 : #include "llvm/CodeGen/MachineInstrBundle.h"
20 : #include "llvm/CodeGen/MachineOperand.h"
21 : #include "llvm/CodeGen/MachineRegisterInfo.h"
22 : #include "llvm/CodeGen/TargetRegisterInfo.h"
23 : #include "llvm/MC/MCRegisterInfo.h"
24 :
25 : using namespace llvm;
26 :
27 1595 : void LiveRegUnits::removeRegsNotPreserved(const uint32_t *RegMask) {
28 168234 : for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
29 334930 : for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
30 168291 : if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
31 : Units.reset(U);
32 : }
33 : }
34 1595 : }
35 :
36 1207 : void LiveRegUnits::addRegsInMask(const uint32_t *RegMask) {
37 138912 : for (unsigned U = 0, E = TRI->getNumRegUnits(); U != E; ++U) {
38 275438 : for (MCRegUnitRootIterator RootReg(U, TRI); RootReg.isValid(); ++RootReg) {
39 137733 : if (MachineOperand::clobbersPhysReg(RegMask, *RootReg))
40 : Units.set(U);
41 : }
42 : }
43 1207 : }
44 :
45 43708 : void LiveRegUnits::stepBackward(const MachineInstr &MI) {
46 : // Remove defined registers and regmask kills from the set.
47 208239 : for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
48 164531 : if (O->isReg()) {
49 107103 : if (!O->isDef() || O->isDebug())
50 : continue;
51 37257 : unsigned Reg = O->getReg();
52 37257 : if (!TargetRegisterInfo::isPhysicalRegister(Reg))
53 : continue;
54 37257 : removeReg(Reg);
55 57428 : } else if (O->isRegMask())
56 1595 : removeRegsNotPreserved(O->getRegMask());
57 : }
58 :
59 : // Add uses to the set.
60 208239 : for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
61 233890 : if (!O->isReg() || !O->readsReg() || O->isDebug())
62 : continue;
63 69332 : unsigned Reg = O->getReg();
64 69332 : if (!TargetRegisterInfo::isPhysicalRegister(Reg))
65 : continue;
66 48452 : addReg(Reg);
67 : }
68 43708 : }
69 :
70 7660 : void LiveRegUnits::accumulate(const MachineInstr &MI) {
71 : // Add defs, uses and regmask clobbers to the set.
72 36149 : for (ConstMIBundleOperands O(MI); O.isValid(); ++O) {
73 28489 : if (O->isReg()) {
74 19593 : unsigned Reg = O->getReg();
75 19593 : if (!TargetRegisterInfo::isPhysicalRegister(Reg))
76 : continue;
77 12299 : if (!O->isDef() && !O->readsReg())
78 : continue;
79 12106 : addReg(Reg);
80 8896 : } else if (O->isRegMask())
81 79 : addRegsInMask(O->getRegMask());
82 : }
83 7660 : }
84 :
85 : /// Add live-in registers of basic block \p MBB to \p LiveUnits.
86 17513 : static void addBlockLiveIns(LiveRegUnits &LiveUnits,
87 : const MachineBasicBlock &MBB) {
88 79890 : for (const auto &LI : MBB.liveins())
89 62377 : LiveUnits.addRegMasked(LI.PhysReg, LI.LaneMask);
90 17513 : }
91 :
92 : /// Adds all callee saved registers to \p LiveUnits.
93 2490 : static void addCalleeSavedRegs(LiveRegUnits &LiveUnits,
94 : const MachineFunction &MF) {
95 2490 : const MachineRegisterInfo &MRI = MF.getRegInfo();
96 68028 : for (const MCPhysReg *CSR = MRI.getCalleeSavedRegs(); CSR && *CSR; ++CSR)
97 65538 : LiveUnits.addReg(*CSR);
98 2490 : }
99 :
100 16826 : void LiveRegUnits::addPristines(const MachineFunction &MF) {
101 16826 : const MachineFrameInfo &MFI = MF.getFrameInfo();
102 16826 : if (!MFI.isCalleeSavedInfoValid())
103 16826 : return;
104 : /// This function will usually be called on an empty object, handle this
105 : /// as a special case.
106 1557 : if (empty()) {
107 : /// Add all callee saved regs, then remove the ones that are saved and
108 : /// restored.
109 1557 : addCalleeSavedRegs(*this, MF);
110 : /// Remove the ones that are not saved/restored; they are pristine.
111 9983 : for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
112 8426 : removeReg(Info.getReg());
113 : return;
114 : }
115 : /// If a callee-saved register that is not pristine is already present
116 : /// in the set, we should make sure that it stays in it. Precompute the
117 : /// set of pristine registers in a separate object.
118 : /// Add all callee saved regs, then remove the ones that are saved+restored.
119 0 : LiveRegUnits Pristine(*TRI);
120 0 : addCalleeSavedRegs(Pristine, MF);
121 : /// Remove the ones that are not saved/restored; they are pristine.
122 0 : for (const CalleeSavedInfo &Info : MFI.getCalleeSavedInfo())
123 0 : Pristine.removeReg(Info.getReg());
124 : addUnits(Pristine.getBitVector());
125 : }
126 :
127 2260 : void LiveRegUnits::addLiveOuts(const MachineBasicBlock &MBB) {
128 2260 : const MachineFunction &MF = *MBB.getParent();
129 2260 : if (!MBB.succ_empty()) {
130 1156 : addPristines(MF);
131 : // To get the live-outs we simply merge the live-ins of all successors.
132 2999 : for (const MachineBasicBlock *Succ : MBB.successors())
133 1843 : addBlockLiveIns(*this, *Succ);
134 1104 : } else if (MBB.isReturnBlock()) {
135 : // For the return block: Add all callee saved registers.
136 1077 : const MachineFrameInfo &MFI = MF.getFrameInfo();
137 1077 : if (MFI.isCalleeSavedInfoValid())
138 933 : addCalleeSavedRegs(*this, MF);
139 : }
140 2260 : }
141 :
142 15670 : void LiveRegUnits::addLiveIns(const MachineBasicBlock &MBB) {
143 15670 : const MachineFunction &MF = *MBB.getParent();
144 15670 : addPristines(MF);
145 15670 : addBlockLiveIns(*this, MBB);
146 15670 : }
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