LCOV - code coverage report
Current view: top level - lib/CodeGen - MIRPrinter.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 375 378 99.2 %
Date: 2018-06-17 00:07:59 Functions: 24 24 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- MIRPrinter.cpp - MIR serialization format printer ------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file implements the class that prints out the LLVM IR and machine
      11             : // functions using the MIR serialization format.
      12             : //
      13             : //===----------------------------------------------------------------------===//
      14             : 
      15             : #include "llvm/CodeGen/MIRPrinter.h"
      16             : #include "llvm/ADT/DenseMap.h"
      17             : #include "llvm/ADT/None.h"
      18             : #include "llvm/ADT/STLExtras.h"
      19             : #include "llvm/ADT/SmallBitVector.h"
      20             : #include "llvm/ADT/SmallPtrSet.h"
      21             : #include "llvm/ADT/SmallVector.h"
      22             : #include "llvm/ADT/StringRef.h"
      23             : #include "llvm/ADT/Twine.h"
      24             : #include "llvm/CodeGen/GlobalISel/RegisterBank.h"
      25             : #include "llvm/CodeGen/MIRYamlMapping.h"
      26             : #include "llvm/CodeGen/MachineBasicBlock.h"
      27             : #include "llvm/CodeGen/MachineConstantPool.h"
      28             : #include "llvm/CodeGen/MachineFrameInfo.h"
      29             : #include "llvm/CodeGen/MachineFunction.h"
      30             : #include "llvm/CodeGen/MachineInstr.h"
      31             : #include "llvm/CodeGen/MachineJumpTableInfo.h"
      32             : #include "llvm/CodeGen/MachineMemOperand.h"
      33             : #include "llvm/CodeGen/MachineOperand.h"
      34             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      35             : #include "llvm/CodeGen/PseudoSourceValue.h"
      36             : #include "llvm/CodeGen/TargetInstrInfo.h"
      37             : #include "llvm/CodeGen/TargetRegisterInfo.h"
      38             : #include "llvm/CodeGen/TargetSubtargetInfo.h"
      39             : #include "llvm/IR/BasicBlock.h"
      40             : #include "llvm/IR/Constants.h"
      41             : #include "llvm/IR/DebugInfo.h"
      42             : #include "llvm/IR/DebugLoc.h"
      43             : #include "llvm/IR/Function.h"
      44             : #include "llvm/IR/GlobalValue.h"
      45             : #include "llvm/IR/IRPrintingPasses.h"
      46             : #include "llvm/IR/InstrTypes.h"
      47             : #include "llvm/IR/Instructions.h"
      48             : #include "llvm/IR/Intrinsics.h"
      49             : #include "llvm/IR/Module.h"
      50             : #include "llvm/IR/ModuleSlotTracker.h"
      51             : #include "llvm/IR/Value.h"
      52             : #include "llvm/MC/LaneBitmask.h"
      53             : #include "llvm/MC/MCDwarf.h"
      54             : #include "llvm/MC/MCSymbol.h"
      55             : #include "llvm/Support/AtomicOrdering.h"
      56             : #include "llvm/Support/BranchProbability.h"
      57             : #include "llvm/Support/Casting.h"
      58             : #include "llvm/Support/CommandLine.h"
      59             : #include "llvm/Support/ErrorHandling.h"
      60             : #include "llvm/Support/Format.h"
      61             : #include "llvm/Support/LowLevelTypeImpl.h"
      62             : #include "llvm/Support/YAMLTraits.h"
      63             : #include "llvm/Support/raw_ostream.h"
      64             : #include "llvm/Target/TargetIntrinsicInfo.h"
      65             : #include "llvm/Target/TargetMachine.h"
      66             : #include <algorithm>
      67             : #include <cassert>
      68             : #include <cinttypes>
      69             : #include <cstdint>
      70             : #include <iterator>
      71             : #include <string>
      72             : #include <utility>
      73             : #include <vector>
      74             : 
      75             : using namespace llvm;
      76             : 
      77      101169 : static cl::opt<bool> SimplifyMIR(
      78             :     "simplify-mir", cl::Hidden,
      79      101169 :     cl::desc("Leave out unnecessary information when printing MIR"));
      80             : 
      81             : namespace {
      82             : 
      83             : /// This structure describes how to print out stack object references.
      84        2964 : struct FrameIndexOperand {
      85             :   std::string Name;
      86             :   unsigned ID;
      87             :   bool IsFixed;
      88             : 
      89             :   FrameIndexOperand(StringRef Name, unsigned ID, bool IsFixed)
      90         741 :       : Name(Name.str()), ID(ID), IsFixed(IsFixed) {}
      91             : 
      92             :   /// Return an ordinary stack object reference.
      93             :   static FrameIndexOperand create(StringRef Name, unsigned ID) {
      94             :     return FrameIndexOperand(Name, ID, /*IsFixed=*/false);
      95             :   }
      96             : 
      97             :   /// Return a fixed stack object reference.
      98             :   static FrameIndexOperand createFixed(unsigned ID) {
      99             :     return FrameIndexOperand("", ID, /*IsFixed=*/true);
     100             :   }
     101             : };
     102             : 
     103             : } // end anonymous namespace
     104             : 
     105             : namespace llvm {
     106             : 
     107             : /// This class prints out the machine functions using the MIR serialization
     108             : /// format.
     109        8112 : class MIRPrinter {
     110             :   raw_ostream &OS;
     111             :   DenseMap<const uint32_t *, unsigned> RegisterMaskIds;
     112             :   /// Maps from stack object indices to operand indices which will be used when
     113             :   /// printing frame index machine operands.
     114             :   DenseMap<int, FrameIndexOperand> StackObjectOperandMapping;
     115             : 
     116             : public:
     117        4056 :   MIRPrinter(raw_ostream &OS) : OS(OS) {}
     118             : 
     119             :   void print(const MachineFunction &MF);
     120             : 
     121             :   void convert(yaml::MachineFunction &MF, const MachineRegisterInfo &RegInfo,
     122             :                const TargetRegisterInfo *TRI);
     123             :   void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
     124             :                const MachineFrameInfo &MFI);
     125             :   void convert(yaml::MachineFunction &MF,
     126             :                const MachineConstantPool &ConstantPool);
     127             :   void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
     128             :                const MachineJumpTableInfo &JTI);
     129             :   void convertStackObjects(yaml::MachineFunction &YMF,
     130             :                            const MachineFunction &MF, ModuleSlotTracker &MST);
     131             : 
     132             : private:
     133             :   void initRegisterMaskIds(const MachineFunction &MF);
     134             : };
     135             : 
     136             : /// This class prints out the machine instructions using the MIR serialization
     137             : /// format.
     138             : class MIPrinter {
     139             :   raw_ostream &OS;
     140             :   ModuleSlotTracker &MST;
     141             :   const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds;
     142             :   const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping;
     143             :   /// Synchronization scope names registered with LLVMContext.
     144             :   SmallVector<StringRef, 8> SSNs;
     145             : 
     146             :   bool canPredictBranchProbabilities(const MachineBasicBlock &MBB) const;
     147             :   bool canPredictSuccessors(const MachineBasicBlock &MBB) const;
     148             : 
     149             : public:
     150             :   MIPrinter(raw_ostream &OS, ModuleSlotTracker &MST,
     151             :             const DenseMap<const uint32_t *, unsigned> &RegisterMaskIds,
     152             :             const DenseMap<int, FrameIndexOperand> &StackObjectOperandMapping)
     153             :       : OS(OS), MST(MST), RegisterMaskIds(RegisterMaskIds),
     154        5830 :         StackObjectOperandMapping(StackObjectOperandMapping) {}
     155             : 
     156             :   void print(const MachineBasicBlock &MBB);
     157             : 
     158             :   void print(const MachineInstr &MI);
     159             :   void printStackObjectReference(int FrameIndex);
     160             :   void print(const MachineInstr &MI, unsigned OpIdx,
     161             :              const TargetRegisterInfo *TRI, bool ShouldPrintRegisterTies,
     162             :              LLT TypeToPrint, bool PrintDef = true);
     163             : };
     164             : 
     165             : } // end namespace llvm
     166             : 
     167             : namespace llvm {
     168             : namespace yaml {
     169             : 
     170             : /// This struct serializes the LLVM IR module.
     171             : template <> struct BlockScalarTraits<Module> {
     172             :   static void output(const Module &Mod, void *Ctxt, raw_ostream &OS) {
     173         964 :     Mod.print(OS, nullptr);
     174             :   }
     175             : 
     176             :   static StringRef input(StringRef Str, void *Ctxt, Module &Mod) {
     177           0 :     llvm_unreachable("LLVM Module is supposed to be parsed separately");
     178             :     return "";
     179             :   }
     180             : };
     181             : 
     182             : } // end namespace yaml
     183             : } // end namespace llvm
     184             : 
     185        2967 : static void printRegMIR(unsigned Reg, yaml::StringValue &Dest,
     186             :                         const TargetRegisterInfo *TRI) {
     187        5934 :   raw_string_ostream OS(Dest.Value);
     188        5934 :   OS << printReg(Reg, TRI);
     189        2967 : }
     190             : 
     191        4056 : void MIRPrinter::print(const MachineFunction &MF) {
     192        4056 :   initRegisterMaskIds(MF);
     193             : 
     194        8112 :   yaml::MachineFunction YamlMF;
     195        4056 :   YamlMF.Name = MF.getName();
     196        4056 :   YamlMF.Alignment = MF.getAlignment();
     197        4056 :   YamlMF.ExposesReturnsTwice = MF.exposesReturnsTwice();
     198             : 
     199        4056 :   YamlMF.Legalized = MF.getProperties().hasProperty(
     200             :       MachineFunctionProperties::Property::Legalized);
     201        4056 :   YamlMF.RegBankSelected = MF.getProperties().hasProperty(
     202             :       MachineFunctionProperties::Property::RegBankSelected);
     203        4056 :   YamlMF.Selected = MF.getProperties().hasProperty(
     204             :       MachineFunctionProperties::Property::Selected);
     205        4056 :   YamlMF.FailedISel = MF.getProperties().hasProperty(
     206             :       MachineFunctionProperties::Property::FailedISel);
     207             : 
     208        4056 :   convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
     209        8112 :   ModuleSlotTracker MST(MF.getFunction().getParent());
     210        4056 :   MST.incorporateFunction(MF.getFunction());
     211        4056 :   convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
     212        4056 :   convertStackObjects(YamlMF, MF, MST);
     213        4056 :   if (const auto *ConstantPool = MF.getConstantPool())
     214        4056 :     convert(YamlMF, *ConstantPool);
     215        4056 :   if (const auto *JumpTableInfo = MF.getJumpTableInfo())
     216           8 :     convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
     217        4056 :   raw_string_ostream StrOS(YamlMF.Body.Value.Value);
     218             :   bool IsNewlineNeeded = false;
     219        9885 :   for (const auto &MBB : MF) {
     220        5829 :     if (IsNewlineNeeded)
     221        1798 :       StrOS << "\n";
     222       11658 :     MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
     223        5829 :         .print(MBB);
     224             :     IsNewlineNeeded = true;
     225             :   }
     226             :   StrOS.flush();
     227        8112 :   yaml::Output Out(OS);
     228        4056 :   if (!SimplifyMIR)
     229             :       Out.setWriteDefaultValues(true);
     230        4056 :   Out << YamlMF;
     231        4056 : }
     232             : 
     233           2 : static void printCustomRegMask(const uint32_t *RegMask, raw_ostream &OS,
     234             :                                const TargetRegisterInfo *TRI) {
     235             :   assert(RegMask && "Can't print an empty register mask");
     236           2 :   OS << StringRef("CustomRegMask(");
     237             : 
     238             :   bool IsRegInRegMaskFound = false;
     239         516 :   for (int I = 0, E = TRI->getNumRegs(); I < E; I++) {
     240             :     // Check whether the register is asserted in regmask.
     241         514 :     if (RegMask[I / 32] & (1u << (I % 32))) {
     242          96 :       if (IsRegInRegMaskFound)
     243             :         OS << ',';
     244         192 :       OS << printReg(I, TRI);
     245             :       IsRegInRegMaskFound = true;
     246             :     }
     247             :   }
     248             : 
     249             :   OS << ')';
     250           2 : }
     251             : 
     252       18589 : static void printRegClassOrBank(unsigned Reg, yaml::StringValue &Dest,
     253             :                                 const MachineRegisterInfo &RegInfo,
     254             :                                 const TargetRegisterInfo *TRI) {
     255       37178 :   raw_string_ostream OS(Dest.Value);
     256       37178 :   OS << printRegClassOrBank(Reg, RegInfo, TRI);
     257       18589 : }
     258             : 
     259             : template <typename T>
     260             : static void
     261           6 : printStackObjectDbgInfo(const MachineFunction::VariableDbgInfo &DebugVar,
     262             :                         T &Object, ModuleSlotTracker &MST) {
     263           6 :   std::array<std::string *, 3> Outputs{{&Object.DebugVar.Value,
     264             :                                         &Object.DebugExpr.Value,
     265             :                                         &Object.DebugLoc.Value}};
     266          18 :   std::array<const Metadata *, 3> Metas{{DebugVar.Var,
     267           6 :                                         DebugVar.Expr,
     268           6 :                                         DebugVar.Loc}};
     269          42 :   for (unsigned i = 0; i < 3; ++i) {
     270          36 :     raw_string_ostream StrOS(*Outputs[i]);
     271          18 :     Metas[i]->printAsOperand(StrOS, MST);
     272             :   }
     273           6 : }
     274             : 
     275        4056 : void MIRPrinter::convert(yaml::MachineFunction &MF,
     276             :                          const MachineRegisterInfo &RegInfo,
     277             :                          const TargetRegisterInfo *TRI) {
     278        8112 :   MF.TracksRegLiveness = RegInfo.tracksLiveness();
     279             : 
     280             :   // Print the virtual register definitions.
     281       41396 :   for (unsigned I = 0, E = RegInfo.getNumVirtRegs(); I < E; ++I) {
     282             :     unsigned Reg = TargetRegisterInfo::index2VirtReg(I);
     283       18589 :     yaml::VirtualRegisterDefinition VReg;
     284       18670 :     VReg.ID = I;
     285          81 :     if (RegInfo.getVRegName(Reg) != "")
     286          81 :       continue;
     287       18589 :     ::printRegClassOrBank(Reg, VReg.Class, RegInfo, TRI);
     288             :     unsigned PreferredReg = RegInfo.getSimpleHint(Reg);
     289       18589 :     if (PreferredReg)
     290         146 :       printRegMIR(PreferredReg, VReg.PreferredRegister, TRI);
     291       18589 :     MF.VirtualRegisters.push_back(VReg);
     292             :   }
     293             : 
     294             :   // Print the live ins.
     295        6844 :   for (std::pair<unsigned, unsigned> LI : RegInfo.liveins()) {
     296        1394 :     yaml::MachineFunctionLiveIn LiveIn;
     297        1394 :     printRegMIR(LI.first, LiveIn.Register, TRI);
     298        1394 :     if (LI.second)
     299         822 :       printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
     300        1394 :     MF.LiveIns.push_back(LiveIn);
     301             :   }
     302             : 
     303             :   // Prints the callee saved registers.
     304        4056 :   if (RegInfo.isUpdatedCSRsInitialized()) {
     305          12 :     const MCPhysReg *CalleeSavedRegs = RegInfo.getCalleeSavedRegs();
     306          12 :     std::vector<yaml::FlowStringValue> CalleeSavedRegisters;
     307         838 :     for (const MCPhysReg *I = CalleeSavedRegs; *I; ++I) {
     308             :       yaml::FlowStringValue Reg;
     309         413 :       printRegMIR(*I, Reg, TRI);
     310         413 :       CalleeSavedRegisters.push_back(Reg);
     311             :     }
     312             :     MF.CalleeSavedRegisters = CalleeSavedRegisters;
     313             :   }
     314        4056 : }
     315             : 
     316        4056 : void MIRPrinter::convert(ModuleSlotTracker &MST,
     317             :                          yaml::MachineFrameInfo &YamlMFI,
     318             :                          const MachineFrameInfo &MFI) {
     319        4056 :   YamlMFI.IsFrameAddressTaken = MFI.isFrameAddressTaken();
     320        4056 :   YamlMFI.IsReturnAddressTaken = MFI.isReturnAddressTaken();
     321        4056 :   YamlMFI.HasStackMap = MFI.hasStackMap();
     322        4056 :   YamlMFI.HasPatchPoint = MFI.hasPatchPoint();
     323        4056 :   YamlMFI.StackSize = MFI.getStackSize();
     324        4056 :   YamlMFI.OffsetAdjustment = MFI.getOffsetAdjustment();
     325        4056 :   YamlMFI.MaxAlignment = MFI.getMaxAlignment();
     326        4056 :   YamlMFI.AdjustsStack = MFI.adjustsStack();
     327        4056 :   YamlMFI.HasCalls = MFI.hasCalls();
     328        8112 :   YamlMFI.MaxCallFrameSize = MFI.isMaxCallFrameSizeComputed()
     329        4056 :     ? MFI.getMaxCallFrameSize() : ~0u;
     330        4056 :   YamlMFI.HasOpaqueSPAdjustment = MFI.hasOpaqueSPAdjustment();
     331        4056 :   YamlMFI.HasVAStart = MFI.hasVAStart();
     332        4056 :   YamlMFI.HasMustTailInVarArgFunc = MFI.hasMustTailInVarArgFunc();
     333        4056 :   YamlMFI.LocalFrameSize = MFI.getLocalFrameSize();
     334        4056 :   if (MFI.getSavePoint()) {
     335           4 :     raw_string_ostream StrOS(YamlMFI.SavePoint.Value);
     336           4 :     StrOS << printMBBReference(*MFI.getSavePoint());
     337             :   }
     338        4056 :   if (MFI.getRestorePoint()) {
     339           4 :     raw_string_ostream StrOS(YamlMFI.RestorePoint.Value);
     340           4 :     StrOS << printMBBReference(*MFI.getRestorePoint());
     341             :   }
     342        4056 : }
     343             : 
     344        4056 : void MIRPrinter::convertStackObjects(yaml::MachineFunction &YMF,
     345             :                                      const MachineFunction &MF,
     346             :                                      ModuleSlotTracker &MST) {
     347        4056 :   const MachineFrameInfo &MFI = MF.getFrameInfo();
     348        4056 :   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
     349             :   // Process fixed stack objects.
     350             :   unsigned ID = 0;
     351        8756 :   for (int I = MFI.getObjectIndexBegin(); I < 0; ++I) {
     352         322 :     if (MFI.isDeadObjectIndex(I))
     353           0 :       continue;
     354             : 
     355         322 :     yaml::FixedMachineStackObject YamlObject;
     356         322 :     YamlObject.ID = ID;
     357         322 :     YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
     358         322 :                           ? yaml::FixedMachineStackObject::SpillSlot
     359             :                           : yaml::FixedMachineStackObject::DefaultType;
     360         322 :     YamlObject.Offset = MFI.getObjectOffset(I);
     361         322 :     YamlObject.Size = MFI.getObjectSize(I);
     362         322 :     YamlObject.Alignment = MFI.getObjectAlignment(I);
     363         322 :     YamlObject.StackID = MFI.getStackID(I);
     364         322 :     YamlObject.IsImmutable = MFI.isImmutableObjectIndex(I);
     365         322 :     YamlObject.IsAliased = MFI.isAliasedObjectIndex(I);
     366         322 :     YMF.FixedStackObjects.push_back(YamlObject);
     367         322 :     StackObjectOperandMapping.insert(
     368         966 :         std::make_pair(I, FrameIndexOperand::createFixed(ID++)));
     369             :   }
     370             : 
     371             :   // Process ordinary stack objects.
     372             :   ID = 0;
     373        4908 :   for (int I = 0, E = MFI.getObjectIndexEnd(); I < E; ++I) {
     374         426 :     if (MFI.isDeadObjectIndex(I))
     375           7 :       continue;
     376             : 
     377         838 :     yaml::MachineStackObject YamlObject;
     378         419 :     YamlObject.ID = ID;
     379         419 :     if (const auto *Alloca = MFI.getObjectAllocation(I))
     380         105 :       YamlObject.Name.Value =
     381         210 :           Alloca->hasName() ? Alloca->getName() : "<unnamed alloca>";
     382         419 :     YamlObject.Type = MFI.isSpillSlotObjectIndex(I)
     383         419 :                           ? yaml::MachineStackObject::SpillSlot
     384             :                           : MFI.isVariableSizedObjectIndex(I)
     385         176 :                                 ? yaml::MachineStackObject::VariableSized
     386             :                                 : yaml::MachineStackObject::DefaultType;
     387         419 :     YamlObject.Offset = MFI.getObjectOffset(I);
     388         419 :     YamlObject.Size = MFI.getObjectSize(I);
     389         419 :     YamlObject.Alignment = MFI.getObjectAlignment(I);
     390         419 :     YamlObject.StackID = MFI.getStackID(I);
     391             : 
     392         419 :     YMF.StackObjects.push_back(YamlObject);
     393         838 :     StackObjectOperandMapping.insert(std::make_pair(
     394         838 :         I, FrameIndexOperand::create(YamlObject.Name.Value, ID++)));
     395             :   }
     396             : 
     397        4056 :   for (const auto &CSInfo : MFI.getCalleeSavedInfo()) {
     398             :     yaml::StringValue Reg;
     399         192 :     printRegMIR(CSInfo.getReg(), Reg, TRI);
     400         192 :     auto StackObjectInfo = StackObjectOperandMapping.find(CSInfo.getFrameIdx());
     401             :     assert(StackObjectInfo != StackObjectOperandMapping.end() &&
     402             :            "Invalid stack object index");
     403         192 :     const FrameIndexOperand &StackObject = StackObjectInfo->second;
     404         192 :     if (StackObject.IsFixed) {
     405          41 :       YMF.FixedStackObjects[StackObject.ID].CalleeSavedRegister = Reg;
     406          82 :       YMF.FixedStackObjects[StackObject.ID].CalleeSavedRestored =
     407          41 :         CSInfo.isRestored();
     408             :     } else {
     409         151 :       YMF.StackObjects[StackObject.ID].CalleeSavedRegister = Reg;
     410         302 :       YMF.StackObjects[StackObject.ID].CalleeSavedRestored =
     411         151 :         CSInfo.isRestored();
     412             :     }
     413             :   }
     414        4108 :   for (unsigned I = 0, E = MFI.getLocalFrameObjectCount(); I < E; ++I) {
     415         104 :     auto LocalObject = MFI.getLocalFrameObjectMap(I);
     416          52 :     auto StackObjectInfo = StackObjectOperandMapping.find(LocalObject.first);
     417             :     assert(StackObjectInfo != StackObjectOperandMapping.end() &&
     418             :            "Invalid stack object index");
     419          52 :     const FrameIndexOperand &StackObject = StackObjectInfo->second;
     420             :     assert(!StackObject.IsFixed && "Expected a locally mapped stack object");
     421         104 :     YMF.StackObjects[StackObject.ID].LocalOffset = LocalObject.second;
     422             :   }
     423             : 
     424             :   // Print the stack object references in the frame information class after
     425             :   // converting the stack objects.
     426        4056 :   if (MFI.hasStackProtectorIndex()) {
     427           2 :     raw_string_ostream StrOS(YMF.FrameInfo.StackProtector.Value);
     428           2 :     MIPrinter(StrOS, MST, RegisterMaskIds, StackObjectOperandMapping)
     429           1 :         .printStackObjectReference(MFI.getStackProtectorIndex());
     430             :   }
     431             : 
     432             :   // Print the debug variable information.
     433           6 :   for (const MachineFunction::VariableDbgInfo &DebugVar :
     434        4062 :        MF.getVariableDbgInfo()) {
     435           6 :     auto StackObjectInfo = StackObjectOperandMapping.find(DebugVar.Slot);
     436             :     assert(StackObjectInfo != StackObjectOperandMapping.end() &&
     437             :            "Invalid stack object index");
     438           6 :     const FrameIndexOperand &StackObject = StackObjectInfo->second;
     439           6 :     if (StackObject.IsFixed) {
     440           2 :       auto &Object = YMF.FixedStackObjects[StackObject.ID];
     441           2 :       printStackObjectDbgInfo(DebugVar, Object, MST);
     442             :     } else {
     443           4 :       auto &Object = YMF.StackObjects[StackObject.ID];
     444           4 :       printStackObjectDbgInfo(DebugVar, Object, MST);
     445             :     }
     446             :   }
     447        4056 : }
     448             : 
     449        4056 : void MIRPrinter::convert(yaml::MachineFunction &MF,
     450             :                          const MachineConstantPool &ConstantPool) {
     451             :   unsigned ID = 0;
     452        4056 :   for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
     453             :     std::string Str;
     454          54 :     raw_string_ostream StrOS(Str);
     455         108 :     if (Constant.isMachineConstantPoolEntry()) {
     456           4 :       Constant.Val.MachineCPVal->print(StrOS);
     457             :     } else {
     458          50 :       Constant.Val.ConstVal->printAsOperand(StrOS);
     459             :     }
     460             : 
     461             :     yaml::MachineConstantPoolValue YamlConstant;
     462          54 :     YamlConstant.ID = ID++;
     463         108 :     YamlConstant.Value = StrOS.str();
     464         108 :     YamlConstant.Alignment = Constant.getAlignment();
     465         108 :     YamlConstant.IsTargetSpecific = Constant.isMachineConstantPoolEntry();
     466             : 
     467          54 :     MF.Constants.push_back(YamlConstant);
     468             :   }
     469        4056 : }
     470             : 
     471           8 : void MIRPrinter::convert(ModuleSlotTracker &MST,
     472             :                          yaml::MachineJumpTable &YamlJTI,
     473             :                          const MachineJumpTableInfo &JTI) {
     474           8 :   YamlJTI.Kind = JTI.getEntryKind();
     475             :   unsigned ID = 0;
     476           8 :   for (const auto &Table : JTI.getJumpTables()) {
     477             :     std::string Str;
     478             :     yaml::MachineJumpTable::Entry Entry;
     479           8 :     Entry.ID = ID++;
     480           8 :     for (const auto *MBB : Table.MBBs) {
     481          77 :       raw_string_ostream StrOS(Str);
     482         154 :       StrOS << printMBBReference(*MBB);
     483         231 :       Entry.Blocks.push_back(StrOS.str());
     484             :       Str.clear();
     485             :     }
     486           8 :     YamlJTI.Entries.push_back(Entry);
     487             :   }
     488           8 : }
     489             : 
     490        4056 : void MIRPrinter::initRegisterMaskIds(const MachineFunction &MF) {
     491        4056 :   const auto *TRI = MF.getSubtarget().getRegisterInfo();
     492             :   unsigned I = 0;
     493      171148 :   for (const uint32_t *Mask : TRI->getRegMasks())
     494      163036 :     RegisterMaskIds.insert(std::make_pair(Mask, I++));
     495        4056 : }
     496             : 
     497        8797 : void llvm::guessSuccessors(const MachineBasicBlock &MBB,
     498             :                            SmallVectorImpl<MachineBasicBlock*> &Result,
     499             :                            bool &IsFallthrough) {
     500             :   SmallPtrSet<MachineBasicBlock*,8> Seen;
     501             : 
     502       71697 :   for (const MachineInstr &MI : MBB) {
     503         132 :     if (MI.isPHI())
     504         132 :       continue;
     505      371155 :     for (const MachineOperand &MO : MI.operands()) {
     506      158592 :       if (!MO.isMBB())
     507      158130 :         continue;
     508         462 :       MachineBasicBlock *Succ = MO.getMBB();
     509         462 :       auto RP = Seen.insert(Succ);
     510         462 :       if (RP.second)
     511         460 :         Result.push_back(Succ);
     512             :     }
     513             :   }
     514             :   MachineBasicBlock::const_iterator I = MBB.getLastNonDebugInstr();
     515       17422 :   IsFallthrough = I == MBB.end() || !I->isBarrier();
     516        8797 : }
     517             : 
     518             : bool
     519        5829 : MIPrinter::canPredictBranchProbabilities(const MachineBasicBlock &MBB) const {
     520        5829 :   if (MBB.succ_size() <= 1)
     521             :     return true;
     522         655 :   if (!MBB.hasSuccessorProbabilities())
     523             :     return true;
     524             : 
     525             :   SmallVector<BranchProbability,8> Normalized(MBB.Probs.begin(),
     526             :                                               MBB.Probs.end());
     527         648 :   BranchProbability::normalizeProbabilities(Normalized.begin(),
     528             :                                             Normalized.end());
     529         648 :   SmallVector<BranchProbability,8> Equal(Normalized.size());
     530         648 :   BranchProbability::normalizeProbabilities(Equal.begin(), Equal.end());
     531             : 
     532             :   return std::equal(Normalized.begin(), Normalized.end(), Equal.begin());
     533             : }
     534             : 
     535        4245 : bool MIPrinter::canPredictSuccessors(const MachineBasicBlock &MBB) const {
     536             :   SmallVector<MachineBasicBlock*,8> GuessedSuccs;
     537             :   bool GuessedFallthrough;
     538        4245 :   guessSuccessors(MBB, GuessedSuccs, GuessedFallthrough);
     539        4245 :   if (GuessedFallthrough) {
     540        1063 :     const MachineFunction &MF = *MBB.getParent();
     541        1063 :     MachineFunction::const_iterator NextI = std::next(MBB.getIterator());
     542        1063 :     if (NextI != MF.end()) {
     543          38 :       MachineBasicBlock *Next = const_cast<MachineBasicBlock*>(&*NextI);
     544          38 :       if (!is_contained(GuessedSuccs, Next))
     545          37 :         GuessedSuccs.push_back(Next);
     546             :     }
     547             :   }
     548        4245 :   if (GuessedSuccs.size() != MBB.succ_size())
     549             :     return false;
     550             :   return std::equal(MBB.succ_begin(), MBB.succ_end(), GuessedSuccs.begin());
     551             : }
     552             : 
     553        5829 : void MIPrinter::print(const MachineBasicBlock &MBB) {
     554             :   assert(MBB.getNumber() >= 0 && "Invalid MBB number");
     555        5829 :   OS << "bb." << MBB.getNumber();
     556             :   bool HasAttributes = false;
     557        5829 :   if (const auto *BB = MBB.getBasicBlock()) {
     558        3240 :     if (BB->hasName()) {
     559        1886 :       OS << "." << BB->getName();
     560             :     } else {
     561             :       HasAttributes = true;
     562        1354 :       OS << " (";
     563        1354 :       int Slot = MST.getLocalSlot(BB);
     564        1354 :       if (Slot == -1)
     565           0 :         OS << "<ir-block badref>";
     566             :       else
     567        4062 :         OS << (Twine("%ir-block.") + Twine(Slot)).str();
     568             :     }
     569             :   }
     570        5829 :   if (MBB.hasAddressTaken()) {
     571          11 :     OS << (HasAttributes ? ", " : " (");
     572          11 :     OS << "address-taken";
     573             :     HasAttributes = true;
     574             :   }
     575        5829 :   if (MBB.isEHPad()) {
     576           4 :     OS << (HasAttributes ? ", " : " (");
     577           4 :     OS << "landing-pad";
     578             :     HasAttributes = true;
     579             :   }
     580        5829 :   if (MBB.getAlignment()) {
     581          19 :     OS << (HasAttributes ? ", " : " (");
     582          19 :     OS << "align " << MBB.getAlignment();
     583             :     HasAttributes = true;
     584             :   }
     585        5810 :   if (HasAttributes)
     586        1386 :     OS << ")";
     587        5829 :   OS << ":\n";
     588             : 
     589             :   bool HasLineAttributes = false;
     590             :   // Print the successors
     591        5829 :   bool canPredictProbs = canPredictBranchProbabilities(MBB);
     592             :   // Even if the list of successors is empty, if we cannot guess it,
     593             :   // we need to print it to tell the parser that the list is empty.
     594             :   // This is needed, because MI model unreachable as empty blocks
     595             :   // with an empty successor list. If the parser would see that
     596             :   // without the successor list, it would guess the code would
     597             :   // fallthrough.
     598       11673 :   if ((!MBB.succ_empty() && !SimplifyMIR) || !canPredictProbs ||
     599        4245 :       !canPredictSuccessors(MBB)) {
     600        1618 :     OS.indent(2) << "successors: ";
     601        3902 :     for (auto I = MBB.succ_begin(), E = MBB.succ_end(); I != E; ++I) {
     602        2284 :       if (I != MBB.succ_begin())
     603         696 :         OS << ", ";
     604        4568 :       OS << printMBBReference(**I);
     605        2284 :       if (!SimplifyMIR || !canPredictProbs)
     606        2276 :         OS << '('
     607        6828 :            << format("0x%08" PRIx32, MBB.getSuccProbability(I).getNumerator())
     608             :            << ')';
     609             :     }
     610        1618 :     OS << "\n";
     611             :     HasLineAttributes = true;
     612             :   }
     613             : 
     614             :   // Print the live in registers.
     615        5829 :   const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
     616       14428 :   if (MRI.tracksLiveness() && !MBB.livein_empty()) {
     617             :     const TargetRegisterInfo &TRI = *MRI.getTargetRegisterInfo();
     618        1821 :     OS.indent(2) << "liveins: ";
     619             :     bool First = true;
     620        6160 :     for (const auto &LI : MBB.liveins()) {
     621        4339 :       if (!First)
     622        2518 :         OS << ", ";
     623             :       First = false;
     624        8678 :       OS << printReg(LI.PhysReg, &TRI);
     625        4339 :       if (!LI.LaneMask.all())
     626          96 :         OS << ":0x" << PrintLaneMask(LI.LaneMask);
     627             :     }
     628        1821 :     OS << "\n";
     629             :     HasLineAttributes = true;
     630             :   }
     631             : 
     632        4008 :   if (HasLineAttributes)
     633        2964 :     OS << "\n";
     634             :   bool IsInBundle = false;
     635       41319 :   for (auto I = MBB.instr_begin(), E = MBB.instr_end(); I != E; ++I) {
     636             :     const MachineInstr &MI = *I;
     637       35936 :     if (IsInBundle && !MI.isInsideBundle()) {
     638          17 :       OS.indent(2) << "}\n";
     639             :       IsInBundle = false;
     640             :     }
     641       35490 :     OS.indent(IsInBundle ? 4 : 2);
     642       35490 :     print(MI);
     643       35490 :     if (!IsInBundle && MI.getFlag(MachineInstr::BundledSucc)) {
     644         377 :       OS << " {";
     645             :       IsInBundle = true;
     646             :     }
     647       35490 :     OS << "\n";
     648             :   }
     649        5829 :   if (IsInBundle)
     650         360 :     OS.indent(2) << "}\n";
     651        5829 : }
     652             : 
     653       35490 : void MIPrinter::print(const MachineInstr &MI) {
     654       35490 :   const auto *MF = MI.getMF();
     655       35490 :   const auto &MRI = MF->getRegInfo();
     656       35490 :   const auto &SubTarget = MF->getSubtarget();
     657       35490 :   const auto *TRI = SubTarget.getRegisterInfo();
     658             :   assert(TRI && "Expected target register info");
     659       35490 :   const auto *TII = SubTarget.getInstrInfo();
     660             :   assert(TII && "Expected target instruction info");
     661             :   if (MI.isCFIInstruction())
     662             :     assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
     663             : 
     664       35490 :   SmallBitVector PrintedTypes(8);
     665       35490 :   bool ShouldPrintRegisterTies = MI.hasComplexRegisterTies();
     666       35490 :   unsigned I = 0, E = MI.getNumOperands();
     667      225350 :   for (; I < E && MI.getOperand(I).isReg() && MI.getOperand(I).isDef() &&
     668             :          !MI.getOperand(I).isImplicit();
     669             :        ++I) {
     670       26084 :     if (I)
     671         456 :       OS << ", ";
     672       26084 :     print(MI, I, TRI, ShouldPrintRegisterTies,
     673             :           MI.getTypeToPrint(I, PrintedTypes, MRI),
     674             :           /*PrintDef=*/false);
     675             :   }
     676             : 
     677       35490 :   if (I)
     678       25628 :     OS << " = ";
     679       35490 :   if (MI.getFlag(MachineInstr::FrameSetup))
     680         286 :     OS << "frame-setup ";
     681       35490 :   if (MI.getFlag(MachineInstr::FrameDestroy))
     682          73 :     OS << "frame-destroy ";
     683       35490 :   if (MI.getFlag(MachineInstr::FmNoNans))
     684           9 :     OS << "nnan ";
     685       35490 :   if (MI.getFlag(MachineInstr::FmNoInfs))
     686           9 :     OS << "ninf ";
     687       35490 :   if (MI.getFlag(MachineInstr::FmNsz))
     688          10 :     OS << "nsz ";
     689       35490 :   if (MI.getFlag(MachineInstr::FmArcp))
     690          10 :     OS << "arcp ";
     691       35490 :   if (MI.getFlag(MachineInstr::FmContract))
     692          11 :     OS << "contract ";
     693       35490 :   if (MI.getFlag(MachineInstr::FmAfn))
     694          11 :     OS << "afn ";
     695       35490 :   if (MI.getFlag(MachineInstr::FmReassoc))
     696          11 :     OS << "reassoc ";
     697             : 
     698      106470 :   OS << TII->getName(MI.getOpcode());
     699       35490 :   if (I < E)
     700       33909 :     OS << ' ';
     701             : 
     702             :   bool NeedComma = false;
     703      196988 :   for (; I < E; ++I) {
     704       80749 :     if (NeedComma)
     705       46840 :       OS << ", ";
     706       80749 :     print(MI, I, TRI, ShouldPrintRegisterTies,
     707             :           MI.getTypeToPrint(I, PrintedTypes, MRI));
     708             :     NeedComma = true;
     709             :   }
     710             : 
     711       35490 :   if (const DebugLoc &DL = MI.getDebugLoc()) {
     712        1040 :     if (NeedComma)
     713        1033 :       OS << ',';
     714        1040 :     OS << " debug-location ";
     715        1040 :     DL->printAsOperand(OS, MST);
     716             :   }
     717             : 
     718       35490 :   if (!MI.memoperands_empty()) {
     719        2689 :     OS << " :: ";
     720        2689 :     const LLVMContext &Context = MF->getFunction().getContext();
     721        2689 :     const MachineFrameInfo &MFI = MF->getFrameInfo();
     722             :     bool NeedComma = false;
     723        8255 :     for (const auto *Op : MI.memoperands()) {
     724        2783 :       if (NeedComma)
     725          94 :         OS << ", ";
     726        2783 :       Op->print(OS, MST, SSNs, Context, &MFI, TII);
     727             :       NeedComma = true;
     728             :     }
     729             :   }
     730       35490 : }
     731             : 
     732         624 : void MIPrinter::printStackObjectReference(int FrameIndex) {
     733         624 :   auto ObjectInfo = StackObjectOperandMapping.find(FrameIndex);
     734             :   assert(ObjectInfo != StackObjectOperandMapping.end() &&
     735             :          "Invalid frame index");
     736         624 :   const FrameIndexOperand &Operand = ObjectInfo->second;
     737         624 :   MachineOperand::printStackObjectReference(OS, Operand.ID, Operand.IsFixed,
     738             :                                             Operand.Name);
     739         624 : }
     740             : 
     741      106833 : void MIPrinter::print(const MachineInstr &MI, unsigned OpIdx,
     742             :                       const TargetRegisterInfo *TRI,
     743             :                       bool ShouldPrintRegisterTies, LLT TypeToPrint,
     744             :                       bool PrintDef) {
     745      106833 :   const MachineOperand &Op = MI.getOperand(OpIdx);
     746      106833 :   switch (Op.getType()) {
     747       19257 :   case MachineOperand::MO_Immediate:
     748       19257 :     if (MI.isOperandSubregIdx(OpIdx)) {
     749         475 :       MachineOperand::printTargetFlags(OS, Op);
     750         475 :       MachineOperand::printSubRegIdx(OS, Op.getImm(), TRI);
     751         475 :       break;
     752             :     }
     753             :     LLVM_FALLTHROUGH;
     754             :   case MachineOperand::MO_Register:
     755             :   case MachineOperand::MO_CImmediate:
     756             :   case MachineOperand::MO_FPImmediate:
     757             :   case MachineOperand::MO_MachineBasicBlock:
     758             :   case MachineOperand::MO_ConstantPoolIndex:
     759             :   case MachineOperand::MO_TargetIndex:
     760             :   case MachineOperand::MO_JumpTableIndex:
     761             :   case MachineOperand::MO_ExternalSymbol:
     762             :   case MachineOperand::MO_GlobalAddress:
     763             :   case MachineOperand::MO_RegisterLiveOut:
     764             :   case MachineOperand::MO_Metadata:
     765             :   case MachineOperand::MO_MCSymbol:
     766             :   case MachineOperand::MO_CFIIndex:
     767             :   case MachineOperand::MO_IntrinsicID:
     768             :   case MachineOperand::MO_Predicate:
     769             :   case MachineOperand::MO_BlockAddress: {
     770             :     unsigned TiedOperandIdx = 0;
     771      105344 :     if (ShouldPrintRegisterTies && Op.isReg() && Op.isTied() && !Op.isDef())
     772           8 :       TiedOperandIdx = Op.getParent()->findTiedOperandIdx(OpIdx);
     773      105301 :     const TargetIntrinsicInfo *TII = MI.getMF()->getTarget().getIntrinsicInfo();
     774      105301 :     Op.print(OS, MST, TypeToPrint, PrintDef, /*IsStandalone=*/false,
     775             :              ShouldPrintRegisterTies, TiedOperandIdx, TRI, TII);
     776      105301 :     break;
     777             :   }
     778         623 :   case MachineOperand::MO_FrameIndex:
     779         623 :     printStackObjectReference(Op.getIndex());
     780         623 :     break;
     781         434 :   case MachineOperand::MO_RegisterMask: {
     782         434 :     auto RegMaskInfo = RegisterMaskIds.find(Op.getRegMask());
     783         868 :     if (RegMaskInfo != RegisterMaskIds.end())
     784        1728 :       OS << StringRef(TRI->getRegMaskNames()[RegMaskInfo->second]).lower();
     785             :     else
     786           2 :       printCustomRegMask(Op.getRegMask(), OS, TRI);
     787             :     break;
     788             :   }
     789             :   }
     790      106833 : }
     791             : 
     792         964 : void llvm::printMIR(raw_ostream &OS, const Module &M) {
     793        1928 :   yaml::Output Out(OS);
     794         964 :   Out << const_cast<Module &>(M);
     795         964 : }
     796             : 
     797        4056 : void llvm::printMIR(raw_ostream &OS, const MachineFunction &MF) {
     798        4056 :   MIRPrinter Printer(OS);
     799        4056 :   Printer.print(MF);
     800      307563 : }

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