LCOV - code coverage report
Current view: top level - lib/CodeGen - MachineInstrBundle.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 164 165 99.4 %
Date: 2017-09-14 15:23:50 Functions: 17 18 94.4 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- lib/CodeGen/MachineInstrBundle.cpp --------------------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #include "llvm/CodeGen/MachineInstrBundle.h"
      11             : #include "llvm/ADT/SmallSet.h"
      12             : #include "llvm/ADT/SmallVector.h"
      13             : #include "llvm/CodeGen/MachineFunctionPass.h"
      14             : #include "llvm/CodeGen/MachineInstrBuilder.h"
      15             : #include "llvm/CodeGen/Passes.h"
      16             : #include "llvm/Target/TargetInstrInfo.h"
      17             : #include "llvm/Target/TargetMachine.h"
      18             : #include "llvm/Target/TargetRegisterInfo.h"
      19             : #include "llvm/Target/TargetSubtargetInfo.h"
      20             : #include <utility>
      21             : using namespace llvm;
      22             : 
      23             : namespace {
      24        7644 :   class UnpackMachineBundles : public MachineFunctionPass {
      25             :   public:
      26             :     static char ID; // Pass identification
      27        2575 :     UnpackMachineBundles(
      28             :         std::function<bool(const MachineFunction &)> Ftor = nullptr)
      29        5150 :         : MachineFunctionPass(ID), PredicateFtor(std::move(Ftor)) {
      30        2575 :       initializeUnpackMachineBundlesPass(*PassRegistry::getPassRegistry());
      31        2575 :     }
      32             : 
      33             :     bool runOnMachineFunction(MachineFunction &MF) override;
      34             : 
      35             :   private:
      36             :     std::function<bool(const MachineFunction &)> PredicateFtor;
      37             :   };
      38             : } // end anonymous namespace
      39             : 
      40             : char UnpackMachineBundles::ID = 0;
      41             : char &llvm::UnpackMachineBundlesID = UnpackMachineBundles::ID;
      42      158924 : INITIALIZE_PASS(UnpackMachineBundles, "unpack-mi-bundles",
      43             :                 "Unpack machine instruction bundles", false, false)
      44             : 
      45       11974 : bool UnpackMachineBundles::runOnMachineFunction(MachineFunction &MF) {
      46       35922 :   if (PredicateFtor && !PredicateFtor(MF))
      47             :     return false;
      48             : 
      49        3819 :   bool Changed = false;
      50        7638 :   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
      51        5523 :     MachineBasicBlock *MBB = &*I;
      52             : 
      53        5523 :     for (MachineBasicBlock::instr_iterator MII = MBB->instr_begin(),
      54        5523 :            MIE = MBB->instr_end(); MII != MIE; ) {
      55       49525 :       MachineInstr *MI = &*MII;
      56             : 
      57             :       // Remove BUNDLE instruction and the InsideBundle flags from bundled
      58             :       // instructions.
      59       49525 :       if (MI->isBundle()) {
      60        6970 :         while (++MII != MIE && MII->isBundledWithPred()) {
      61        1611 :           MII->unbundleFromPred();
      62       11077 :           for (unsigned i = 0, e = MII->getNumOperands(); i != e; ++i) {
      63       15710 :             MachineOperand &MO = MII->getOperand(i);
      64       12773 :             if (MO.isReg() && MO.isInternalRead())
      65             :               MO.setIsInternalRead(false);
      66             :           }
      67             :         }
      68         729 :         MI->eraseFromParent();
      69             : 
      70         729 :         Changed = true;
      71         729 :         continue;
      72             :       }
      73             : 
      74             :       ++MII;
      75             :     }
      76             :   }
      77             : 
      78             :   return Changed;
      79             : }
      80             : 
      81             : FunctionPass *
      82        2575 : llvm::createUnpackMachineBundles(
      83             :     std::function<bool(const MachineFunction &)> Ftor) {
      84        7725 :   return new UnpackMachineBundles(std::move(Ftor));
      85             : }
      86             : 
      87             : namespace {
      88         243 :   class FinalizeMachineBundles : public MachineFunctionPass {
      89             :   public:
      90             :     static char ID; // Pass identification
      91         244 :     FinalizeMachineBundles() : MachineFunctionPass(ID) {
      92         244 :       initializeFinalizeMachineBundlesPass(*PassRegistry::getPassRegistry());
      93         244 :     }
      94             : 
      95             :     bool runOnMachineFunction(MachineFunction &MF) override;
      96             :   };
      97             : } // end anonymous namespace
      98             : 
      99             : char FinalizeMachineBundles::ID = 0;
     100             : char &llvm::FinalizeMachineBundlesID = FinalizeMachineBundles::ID;
     101      151931 : INITIALIZE_PASS(FinalizeMachineBundles, "finalize-mi-bundles",
     102             :                 "Finalize machine instruction bundles", false, false)
     103             : 
     104        2057 : bool FinalizeMachineBundles::runOnMachineFunction(MachineFunction &MF) {
     105        2057 :   return llvm::finalizeBundles(MF);
     106             : }
     107             : 
     108             : 
     109             : /// finalizeBundle - Finalize a machine instruction bundle which includes
     110             : /// a sequence of instructions starting from FirstMI to LastMI (exclusive).
     111             : /// This routine adds a BUNDLE instruction to represent the bundle, it adds
     112             : /// IsInternalRead markers to MachineOperands which are defined inside the
     113             : /// bundle, and it copies externally visible defs and uses to the BUNDLE
     114             : /// instruction.
     115       18293 : void llvm::finalizeBundle(MachineBasicBlock &MBB,
     116             :                           MachineBasicBlock::instr_iterator FirstMI,
     117             :                           MachineBasicBlock::instr_iterator LastMI) {
     118             :   assert(FirstMI != LastMI && "Empty bundle?");
     119       36586 :   MIBundleBuilder Bundle(MBB, FirstMI, LastMI);
     120             : 
     121       18293 :   MachineFunction &MF = *MBB.getParent();
     122       18293 :   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
     123       18293 :   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
     124             : 
     125             :   MachineInstrBuilder MIB =
     126       91465 :       BuildMI(MF, FirstMI->getDebugLoc(), TII->get(TargetOpcode::BUNDLE));
     127       36586 :   Bundle.prepend(MIB);
     128             : 
     129       36586 :   SmallVector<unsigned, 32> LocalDefs;
     130       36586 :   SmallSet<unsigned, 32> LocalDefSet;
     131       36586 :   SmallSet<unsigned, 8> DeadDefSet;
     132       36586 :   SmallSet<unsigned, 16> KilledDefSet;
     133       36586 :   SmallVector<unsigned, 8> ExternUses;
     134       36586 :   SmallSet<unsigned, 8> ExternUseSet;
     135       36586 :   SmallSet<unsigned, 8> KilledUseSet;
     136       36586 :   SmallSet<unsigned, 8> UndefUseSet;
     137       18293 :   SmallVector<MachineOperand*, 4> Defs;
     138       67115 :   for (; FirstMI != LastMI; ++FirstMI) {
     139      847755 :     for (unsigned i = 0, e = FirstMI->getNumOperands(); i != e; ++i) {
     140     1500222 :       MachineOperand &MO = FirstMI->getOperand(i);
     141      750111 :       if (!MO.isReg())
     142     1194545 :         continue;
     143      227008 :       if (MO.isDef()) {
     144       49240 :         Defs.push_back(&MO);
     145       49240 :         continue;
     146             :       }
     147             : 
     148      128528 :       unsigned Reg = MO.getReg();
     149      128528 :       if (!Reg)
     150         619 :         continue;
     151             :       assert(TargetRegisterInfo::isPhysicalRegister(Reg));
     152      127909 :       if (LocalDefSet.count(Reg)) {
     153        4614 :         MO.setIsInternalRead();
     154        4614 :         if (MO.isKill())
     155             :           // Internal def is now killed.
     156        2467 :           KilledDefSet.insert(Reg);
     157             :       } else {
     158      123295 :         if (ExternUseSet.insert(Reg).second) {
     159       82524 :           ExternUses.push_back(Reg);
     160       82524 :           if (MO.isUndef())
     161         159 :             UndefUseSet.insert(Reg);
     162             :         }
     163      123295 :         if (MO.isKill())
     164             :           // External def is now killed.
     165       26568 :           KilledUseSet.insert(Reg);
     166             :       }
     167             :     }
     168             : 
     169      146884 :     for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
     170       98480 :       MachineOperand &MO = *Defs[i];
     171       49240 :       unsigned Reg = MO.getReg();
     172       49240 :       if (!Reg)
     173           0 :         continue;
     174             : 
     175       49240 :       if (LocalDefSet.insert(Reg).second) {
     176       47389 :         LocalDefs.push_back(Reg);
     177       47389 :         if (MO.isDead()) {
     178        1111 :           DeadDefSet.insert(Reg);
     179             :         }
     180             :       } else {
     181             :         // Re-defined inside the bundle, it's no longer killed.
     182        1851 :         KilledDefSet.erase(Reg);
     183        1851 :         if (!MO.isDead())
     184             :           // Previously defined but dead.
     185        1767 :           DeadDefSet.erase(Reg);
     186             :       }
     187             : 
     188       49240 :       if (!MO.isDead()) {
     189       98850 :         for (MCSubRegIterator SubRegs(Reg, TRI); SubRegs.isValid(); ++SubRegs) {
     190        5520 :           unsigned SubReg = *SubRegs;
     191        2760 :           if (LocalDefSet.insert(SubReg).second)
     192        2736 :             LocalDefs.push_back(SubReg);
     193             :         }
     194             :       }
     195             :     }
     196             : 
     197       48822 :     Defs.clear();
     198             :   }
     199             : 
     200       36586 :   SmallSet<unsigned, 32> Added;
     201       86711 :   for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
     202      100250 :     unsigned Reg = LocalDefs[i];
     203       50125 :     if (Added.insert(Reg).second) {
     204             :       // If it's not live beyond end of the bundle, mark it dead.
     205       50125 :       bool isDead = DeadDefSet.count(Reg) || KilledDefSet.count(Reg);
     206      100250 :       MIB.addReg(Reg, getDefRegState(true) | getDeadRegState(isDead) |
     207       50125 :                  getImplRegState(true));
     208             :     }
     209             :   }
     210             : 
     211      119110 :   for (unsigned i = 0, e = ExternUses.size(); i != e; ++i) {
     212      165048 :     unsigned Reg = ExternUses[i];
     213       82524 :     bool isKill = KilledUseSet.count(Reg);
     214       82524 :     bool isUndef = UndefUseSet.count(Reg);
     215      247572 :     MIB.addReg(Reg, getKillRegState(isKill) | getUndefRegState(isUndef) |
     216       82524 :                getImplRegState(true));
     217             :   }
     218       18293 : }
     219             : 
     220             : /// finalizeBundle - Same functionality as the previous finalizeBundle except
     221             : /// the last instruction in the bundle is not provided as an input. This is
     222             : /// used in cases where bundles are pre-determined by marking instructions
     223             : /// with 'InsideBundle' marker. It returns the MBB instruction iterator that
     224             : /// points to the end of the bundle.
     225             : MachineBasicBlock::instr_iterator
     226         551 : llvm::finalizeBundle(MachineBasicBlock &MBB,
     227             :                      MachineBasicBlock::instr_iterator FirstMI) {
     228         551 :   MachineBasicBlock::instr_iterator E = MBB.instr_end();
     229             :   MachineBasicBlock::instr_iterator LastMI = std::next(FirstMI);
     230        5172 :   while (LastMI != E && LastMI->isInsideBundle())
     231             :     ++LastMI;
     232         551 :   finalizeBundle(MBB, FirstMI, LastMI);
     233         551 :   return LastMI;
     234             : }
     235             : 
     236             : /// finalizeBundles - Finalize instruction bundles in the specified
     237             : /// MachineFunction. Return true if any bundles are finalized.
     238        2057 : bool llvm::finalizeBundles(MachineFunction &MF) {
     239        2057 :   bool Changed = false;
     240        4114 :   for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
     241        2057 :     MachineBasicBlock &MBB = *I;
     242        2057 :     MachineBasicBlock::instr_iterator MII = MBB.instr_begin();
     243        2057 :     MachineBasicBlock::instr_iterator MIE = MBB.instr_end();
     244        2057 :     if (MII == MIE)
     245           2 :       continue;
     246             :     assert(!MII->isInsideBundle() &&
     247             :            "First instr cannot be inside bundle before finalization!");
     248             : 
     249       58505 :     for (++MII; MII != MIE; ) {
     250      112900 :       if (!MII->isInsideBundle())
     251             :         ++MII;
     252             :       else {
     253          71 :         MII = finalizeBundle(MBB, std::prev(MII));
     254          71 :         Changed = true;
     255             :       }
     256             :     }
     257             :   }
     258             : 
     259        2057 :   return Changed;
     260             : }
     261             : 
     262             : //===----------------------------------------------------------------------===//
     263             : // MachineOperand iterator
     264             : //===----------------------------------------------------------------------===//
     265             : 
     266             : MachineOperandIteratorBase::VirtRegInfo
     267       98129 : MachineOperandIteratorBase::analyzeVirtReg(unsigned Reg,
     268             :                     SmallVectorImpl<std::pair<MachineInstr*, unsigned> > *Ops) {
     269       98129 :   VirtRegInfo RI = { false, false, false };
     270      420732 :   for(; isValid(); ++*this) {
     271      322603 :     MachineOperand &MO = deref();
     272      322603 :     if (!MO.isReg() || MO.getReg() != Reg)
     273      223593 :       continue;
     274             : 
     275             :     // Remember each (MI, OpNo) that refers to Reg.
     276       99010 :     if (Ops)
     277      297030 :       Ops->push_back(std::make_pair(MO.getParent(), getOperandNo()));
     278             : 
     279             :     // Both defs and uses can read virtual registers.
     280             :     if (MO.readsReg()) {
     281       60520 :       RI.Reads = true;
     282       60520 :       if (MO.isDef())
     283          14 :         RI.Tied = true;
     284             :     }
     285             : 
     286             :     // Only defs can write.
     287       99010 :     if (MO.isDef())
     288             :       RI.Writes = true;
     289      120999 :     else if (!RI.Tied && MO.getParent()->isRegTiedToDefOperand(getOperandNo()))
     290             :       RI.Tied = true;
     291             :   }
     292       98129 :   return RI;
     293             : }
     294             : 
     295             : MachineOperandIteratorBase::PhysRegInfo
     296       11813 : MachineOperandIteratorBase::analyzePhysReg(unsigned Reg,
     297             :                                            const TargetRegisterInfo *TRI) {
     298       11813 :   bool AllDefsDead = true;
     299       11813 :   PhysRegInfo PRI = {false, false, false, false, false, false, false, false};
     300             : 
     301             :   assert(TargetRegisterInfo::isPhysicalRegister(Reg) &&
     302             :          "analyzePhysReg not given a physical register!");
     303       84690 :   for (; isValid(); ++*this) {
     304       72877 :     MachineOperand &MO = deref();
     305             : 
     306       73296 :     if (MO.isRegMask() && MO.clobbersPhysReg(Reg)) {
     307         196 :       PRI.Clobbered = true;
     308         196 :       continue;
     309             :     }
     310             : 
     311       72681 :     if (!MO.isReg())
     312       33625 :       continue;
     313             : 
     314       39056 :     unsigned MOReg = MO.getReg();
     315       81802 :     if (!MOReg || !TargetRegisterInfo::isPhysicalRegister(MOReg))
     316       23719 :       continue;
     317             : 
     318       20381 :     if (!TRI->regsOverlap(MOReg, Reg))
     319        5044 :       continue;
     320             : 
     321       20586 :     bool Covered = TRI->isSuperRegisterEq(Reg, MOReg);
     322             :     if (MO.readsReg()) {
     323         576 :       PRI.Read = true;
     324         576 :       if (Covered) {
     325         562 :         PRI.FullyRead = true;
     326         562 :         if (MO.isKill())
     327         506 :           PRI.Killed = true;
     328             :       }
     329        9717 :     } else if (MO.isDef()) {
     330        9709 :       PRI.Defined = true;
     331        9709 :       if (Covered)
     332        9684 :         PRI.FullyDefined = true;
     333        9709 :       if (!MO.isDead())
     334        8921 :         AllDefsDead = false;
     335             :     }
     336             :   }
     337             : 
     338       11813 :   if (AllDefsDead) {
     339        2892 :     if (PRI.FullyDefined || PRI.Clobbered)
     340             :       PRI.DeadDef = true;
     341        1986 :     else if (PRI.Defined)
     342           3 :       PRI.PartialDeadDef = true;
     343             :   }
     344             : 
     345       11813 :   return PRI;
     346             : }

Generated by: LCOV version 1.13