LCOV - code coverage report
Current view: top level - lib/CodeGen - MachineOperand.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 587 659 89.1 %
Date: 2018-06-17 00:07:59 Functions: 45 50 90.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- lib/CodeGen/MachineOperand.cpp -------------------------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : /// \file Methods common to all machine operands.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #include "llvm/CodeGen/MachineOperand.h"
      15             : #include "llvm/ADT/StringExtras.h"
      16             : #include "llvm/Analysis/Loads.h"
      17             : #include "llvm/CodeGen/MIRPrinter.h"
      18             : #include "llvm/CodeGen/MachineFrameInfo.h"
      19             : #include "llvm/CodeGen/MachineJumpTableInfo.h"
      20             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      21             : #include "llvm/CodeGen/TargetInstrInfo.h"
      22             : #include "llvm/CodeGen/TargetRegisterInfo.h"
      23             : #include "llvm/Config/llvm-config.h"
      24             : #include "llvm/IR/Constants.h"
      25             : #include "llvm/IR/IRPrintingPasses.h"
      26             : #include "llvm/IR/ModuleSlotTracker.h"
      27             : #include "llvm/Target/TargetIntrinsicInfo.h"
      28             : #include "llvm/Target/TargetMachine.h"
      29             : 
      30             : using namespace llvm;
      31             : 
      32             : static cl::opt<int>
      33      101169 :     PrintRegMaskNumRegs("print-regmask-num-regs",
      34      101169 :                         cl::desc("Number of registers to limit to when "
      35             :                                  "printing regmask operands in IR dumps. "
      36             :                                  "unlimited = -1"),
      37      303507 :                         cl::init(32), cl::Hidden);
      38             : 
      39             : static const MachineFunction *getMFIfAvailable(const MachineOperand &MO) {
      40     9595091 :   if (const MachineInstr *MI = MO.getParent())
      41     9578456 :     if (const MachineBasicBlock *MBB = MI->getParent())
      42     9563650 :       if (const MachineFunction *MF = MBB->getParent())
      43             :         return MF;
      44             :   return nullptr;
      45             : }
      46             : static MachineFunction *getMFIfAvailable(MachineOperand &MO) {
      47             :   return const_cast<MachineFunction *>(
      48             :       getMFIfAvailable(const_cast<const MachineOperand &>(MO)));
      49             : }
      50             : 
      51     9403842 : void MachineOperand::setReg(unsigned Reg) {
      52     9403842 :   if (getReg() == Reg)
      53             :     return; // No change.
      54             : 
      55             :   // Clear the IsRenamable bit to keep it conservatively correct.
      56     8812881 :   IsRenamable = false;
      57             : 
      58             :   // Otherwise, we have to change the register.  If this operand is embedded
      59             :   // into a machine function, we need to update the old and new register's
      60             :   // use/def lists.
      61             :   if (MachineFunction *MF = getMFIfAvailable(*this)) {
      62     8781487 :     MachineRegisterInfo &MRI = MF->getRegInfo();
      63     8781487 :     MRI.removeRegOperandFromUseList(this);
      64     8781487 :     SmallContents.RegNo = Reg;
      65     8781487 :     MRI.addRegOperandToUseList(this);
      66     8781487 :     return;
      67             :   }
      68             : 
      69             :   // Otherwise, just change the register, no problem.  :)
      70       31394 :   SmallContents.RegNo = Reg;
      71             : }
      72             : 
      73     1120262 : void MachineOperand::substVirtReg(unsigned Reg, unsigned SubIdx,
      74             :                                   const TargetRegisterInfo &TRI) {
      75             :   assert(TargetRegisterInfo::isVirtualRegister(Reg));
      76     1484858 :   if (SubIdx && getSubReg())
      77             :     SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg());
      78     1120262 :   setReg(Reg);
      79     1120262 :   if (SubIdx)
      80             :     setSubReg(SubIdx);
      81     1120262 : }
      82             : 
      83      131106 : void MachineOperand::substPhysReg(unsigned Reg, const TargetRegisterInfo &TRI) {
      84             :   assert(TargetRegisterInfo::isPhysicalRegister(Reg));
      85      131106 :   if (getSubReg()) {
      86       10336 :     Reg = TRI.getSubReg(Reg, getSubReg());
      87             :     // Note that getSubReg() may return 0 if the sub-register doesn't exist.
      88             :     // That won't happen in legal code.
      89             :     setSubReg(0);
      90       10336 :     if (isDef())
      91             :       setIsUndef(false);
      92             :   }
      93      131106 :   setReg(Reg);
      94      131106 : }
      95             : 
      96             : /// Change a def to a use, or a use to a def.
      97       24482 : void MachineOperand::setIsDef(bool Val) {
      98             :   assert(isReg() && "Wrong MachineOperand accessor");
      99             :   assert((!Val || !isDebug()) && "Marking a debug operation as def");
     100       24482 :   if (IsDef == Val)
     101             :     return;
     102             :   assert(!IsDeadOrKill && "Changing def/use with dead/kill set not supported");
     103             :   // MRI may keep uses and defs in different list positions.
     104             :   if (MachineFunction *MF = getMFIfAvailable(*this)) {
     105         510 :     MachineRegisterInfo &MRI = MF->getRegInfo();
     106         510 :     MRI.removeRegOperandFromUseList(this);
     107         510 :     IsDef = Val;
     108         510 :     MRI.addRegOperandToUseList(this);
     109         510 :     return;
     110             :   }
     111          24 :   IsDef = Val;
     112             : }
     113             : 
     114    34174732 : bool MachineOperand::isRenamable() const {
     115             :   assert(isReg() && "Wrong MachineOperand accessor");
     116             :   assert(TargetRegisterInfo::isPhysicalRegister(getReg()) &&
     117             :          "isRenamable should only be checked on physical registers");
     118    34174732 :   if (!IsRenamable)
     119             :     return false;
     120             : 
     121    14355082 :   const MachineInstr *MI = getParent();
     122    14355082 :   if (!MI)
     123             :     return true;
     124             : 
     125    14355082 :   if (isDef())
     126     5879832 :     return !MI->hasExtraDefRegAllocReq(MachineInstr::IgnoreBundle);
     127             : 
     128             :   assert(isUse() && "Reg is not def or use");
     129     8475250 :   return !MI->hasExtraSrcRegAllocReq(MachineInstr::IgnoreBundle);
     130             : }
     131             : 
     132     5105431 : void MachineOperand::setIsRenamable(bool Val) {
     133             :   assert(isReg() && "Wrong MachineOperand accessor");
     134             :   assert(TargetRegisterInfo::isPhysicalRegister(getReg()) &&
     135             :          "setIsRenamable should only be called on physical registers");
     136     5105431 :   IsRenamable = Val;
     137     5105431 : }
     138             : 
     139             : // If this operand is currently a register operand, and if this is in a
     140             : // function, deregister the operand from the register's use/def list.
     141      593339 : void MachineOperand::removeRegFromUses() {
     142      593339 :   if (!isReg() || !isOnRegUseList())
     143             :     return;
     144             : 
     145             :   if (MachineFunction *MF = getMFIfAvailable(*this))
     146       95080 :     MF->getRegInfo().removeRegOperandFromUseList(this);
     147             : }
     148             : 
     149             : /// ChangeToImmediate - Replace this operand with a new immediate operand of
     150             : /// the specified value.  If an operand is known to be an immediate already,
     151             : /// the setImm method should be used.
     152      593194 : void MachineOperand::ChangeToImmediate(int64_t ImmVal) {
     153             :   assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
     154             : 
     155      593194 :   removeRegFromUses();
     156             : 
     157      593194 :   OpKind = MO_Immediate;
     158      593194 :   Contents.ImmVal = ImmVal;
     159      593194 : }
     160             : 
     161           0 : void MachineOperand::ChangeToFPImmediate(const ConstantFP *FPImm) {
     162             :   assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
     163             : 
     164           0 :   removeRegFromUses();
     165             : 
     166           0 :   OpKind = MO_FPImmediate;
     167           0 :   Contents.CFP = FPImm;
     168           0 : }
     169             : 
     170          54 : void MachineOperand::ChangeToES(const char *SymName,
     171             :                                 unsigned char TargetFlags) {
     172             :   assert((!isReg() || !isTied()) &&
     173             :          "Cannot change a tied operand into an external symbol");
     174             : 
     175          54 :   removeRegFromUses();
     176             : 
     177          54 :   OpKind = MO_ExternalSymbol;
     178          54 :   Contents.OffsetedInfo.Val.SymbolName = SymName;
     179             :   setOffset(0); // Offset is always 0.
     180             :   setTargetFlags(TargetFlags);
     181          54 : }
     182             : 
     183           0 : void MachineOperand::ChangeToMCSymbol(MCSymbol *Sym) {
     184             :   assert((!isReg() || !isTied()) &&
     185             :          "Cannot change a tied operand into an MCSymbol");
     186             : 
     187           0 :   removeRegFromUses();
     188             : 
     189           0 :   OpKind = MO_MCSymbol;
     190           0 :   Contents.Sym = Sym;
     191           0 : }
     192             : 
     193          90 : void MachineOperand::ChangeToFrameIndex(int Idx) {
     194             :   assert((!isReg() || !isTied()) &&
     195             :          "Cannot change a tied operand into a FrameIndex");
     196             : 
     197          90 :   removeRegFromUses();
     198             : 
     199          90 :   OpKind = MO_FrameIndex;
     200             :   setIndex(Idx);
     201          90 : }
     202             : 
     203           1 : void MachineOperand::ChangeToTargetIndex(unsigned Idx, int64_t Offset,
     204             :                                          unsigned char TargetFlags) {
     205             :   assert((!isReg() || !isTied()) &&
     206             :          "Cannot change a tied operand into a FrameIndex");
     207             : 
     208           1 :   removeRegFromUses();
     209             : 
     210           1 :   OpKind = MO_TargetIndex;
     211           1 :   setIndex(Idx);
     212             :   setOffset(Offset);
     213             :   setTargetFlags(TargetFlags);
     214           1 : }
     215             : 
     216             : /// ChangeToRegister - Replace this operand with a new register operand of
     217             : /// the specified value.  If an operand is known to be an register already,
     218             : /// the setReg method should be used.
     219      576608 : void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
     220             :                                       bool isKill, bool isDead, bool isUndef,
     221             :                                       bool isDebug) {
     222             :   MachineRegisterInfo *RegInfo = nullptr;
     223             :   if (MachineFunction *MF = getMFIfAvailable(*this))
     224      576607 :     RegInfo = &MF->getRegInfo();
     225             :   // If this operand is already a register operand, remove it from the
     226             :   // register's use/def lists.
     227             :   bool WasReg = isReg();
     228      576608 :   if (RegInfo && WasReg)
     229       30052 :     RegInfo->removeRegOperandFromUseList(this);
     230             : 
     231             :   // Change this to a register and set the reg#.
     232             :   assert(!(isDead && !isDef) && "Dead flag on non-def");
     233             :   assert(!(isKill && isDef) && "Kill flag on def");
     234      576608 :   OpKind = MO_Register;
     235      576608 :   SmallContents.RegNo = Reg;
     236      576608 :   SubReg_TargetFlags = 0;
     237      576608 :   IsDef = isDef;
     238      576608 :   IsImp = isImp;
     239      576608 :   IsDeadOrKill = isKill | isDead;
     240      576608 :   IsRenamable = false;
     241      576608 :   IsUndef = isUndef;
     242      576608 :   IsInternalRead = false;
     243      576608 :   IsEarlyClobber = false;
     244      576608 :   IsDebug = isDebug;
     245             :   // Ensure isOnRegUseList() returns false.
     246      576608 :   Contents.Reg.Prev = nullptr;
     247             :   // Preserve the tie when the operand was already a register.
     248      576608 :   if (!WasReg)
     249      546556 :     TiedTo = 0;
     250             : 
     251             :   // If this operand is embedded in a function, add the operand to the
     252             :   // register's use/def list.
     253      576608 :   if (RegInfo)
     254      576607 :     RegInfo->addRegOperandToUseList(this);
     255      576608 : }
     256             : 
     257             : /// isIdenticalTo - Return true if this operand is identical to the specified
     258             : /// operand. Note that this should stay in sync with the hash_value overload
     259             : /// below.
     260    18630543 : bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
     261    36955682 :   if (getType() != Other.getType() ||
     262             :       getTargetFlags() != Other.getTargetFlags())
     263             :     return false;
     264             : 
     265    18313826 :   switch (getType()) {
     266    11419429 :   case MachineOperand::MO_Register:
     267    33705495 :     return getReg() == Other.getReg() && isDef() == Other.isDef() &&
     268             :            getSubReg() == Other.getSubReg();
     269     5255710 :   case MachineOperand::MO_Immediate:
     270     5255710 :     return getImm() == Other.getImm();
     271           5 :   case MachineOperand::MO_CImmediate:
     272           5 :     return getCImm() == Other.getCImm();
     273         152 :   case MachineOperand::MO_FPImmediate:
     274         152 :     return getFPImm() == Other.getFPImm();
     275        8939 :   case MachineOperand::MO_MachineBasicBlock:
     276        8939 :     return getMBB() == Other.getMBB();
     277      229002 :   case MachineOperand::MO_FrameIndex:
     278      229002 :     return getIndex() == Other.getIndex();
     279       25522 :   case MachineOperand::MO_ConstantPoolIndex:
     280             :   case MachineOperand::MO_TargetIndex:
     281       74046 :     return getIndex() == Other.getIndex() && getOffset() == Other.getOffset();
     282         178 :   case MachineOperand::MO_JumpTableIndex:
     283         178 :     return getIndex() == Other.getIndex();
     284      859933 :   case MachineOperand::MO_GlobalAddress:
     285     2258067 :     return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
     286        4934 :   case MachineOperand::MO_ExternalSymbol:
     287        9805 :     return strcmp(getSymbolName(), Other.getSymbolName()) == 0 &&
     288        9742 :            getOffset() == Other.getOffset();
     289         145 :   case MachineOperand::MO_BlockAddress:
     290         280 :     return getBlockAddress() == Other.getBlockAddress() &&
     291         270 :            getOffset() == Other.getOffset();
     292      228200 :   case MachineOperand::MO_RegisterMask:
     293             :   case MachineOperand::MO_RegisterLiveOut: {
     294             :     // Shallow compare of the two RegMasks
     295      228200 :     const uint32_t *RegMask = getRegMask();
     296      228200 :     const uint32_t *OtherRegMask = Other.getRegMask();
     297      228200 :     if (RegMask == OtherRegMask)
     298             :       return true;
     299             : 
     300             :     if (const MachineFunction *MF = getMFIfAvailable(*this)) {
     301             :       // Calculate the size of the RegMask
     302           0 :       const TargetRegisterInfo *TRI = MF->getSubtarget().getRegisterInfo();
     303           0 :       unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
     304             : 
     305             :       // Deep compare of the two RegMasks
     306           0 :       return std::equal(RegMask, RegMask + RegMaskSize, OtherRegMask);
     307             :     }
     308             :     // We don't know the size of the RegMask, so we can't deep compare the two
     309             :     // reg masks.
     310             :     return false;
     311             :   }
     312      272464 :   case MachineOperand::MO_MCSymbol:
     313      272464 :     return getMCSymbol() == Other.getMCSymbol();
     314          11 :   case MachineOperand::MO_CFIIndex:
     315          11 :     return getCFIIndex() == Other.getCFIIndex();
     316        9202 :   case MachineOperand::MO_Metadata:
     317        9202 :     return getMetadata() == Other.getMetadata();
     318           0 :   case MachineOperand::MO_IntrinsicID:
     319           0 :     return getIntrinsicID() == Other.getIntrinsicID();
     320           0 :   case MachineOperand::MO_Predicate:
     321           0 :     return getPredicate() == Other.getPredicate();
     322             :   }
     323           0 :   llvm_unreachable("Invalid machine operand type");
     324             : }
     325             : 
     326             : // Note: this must stay exactly in sync with isIdenticalTo above.
     327    24268557 : hash_code llvm::hash_value(const MachineOperand &MO) {
     328    24268557 :   switch (MO.getType()) {
     329             :   case MachineOperand::MO_Register:
     330             :     // Register operands don't have target flags.
     331    29081008 :     return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef());
     332     8758940 :   case MachineOperand::MO_Immediate:
     333    17517880 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getImm());
     334          15 :   case MachineOperand::MO_CImmediate:
     335          30 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCImm());
     336         417 :   case MachineOperand::MO_FPImmediate:
     337         834 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getFPImm());
     338       94580 :   case MachineOperand::MO_MachineBasicBlock:
     339      189160 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMBB());
     340      283159 :   case MachineOperand::MO_FrameIndex:
     341      566318 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIndex());
     342       71491 :   case MachineOperand::MO_ConstantPoolIndex:
     343             :   case MachineOperand::MO_TargetIndex:
     344      214473 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIndex(),
     345      285964 :                         MO.getOffset());
     346         539 :   case MachineOperand::MO_JumpTableIndex:
     347        1078 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIndex());
     348       14277 :   case MachineOperand::MO_ExternalSymbol:
     349       57108 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getOffset(),
     350       42831 :                         MO.getSymbolName());
     351      504110 :   case MachineOperand::MO_GlobalAddress:
     352     1512330 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getGlobal(),
     353     2016440 :                         MO.getOffset());
     354         358 :   case MachineOperand::MO_BlockAddress:
     355        1074 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getBlockAddress(),
     356        1432 :                         MO.getOffset());
     357          10 :   case MachineOperand::MO_RegisterMask:
     358             :   case MachineOperand::MO_RegisterLiveOut:
     359          20 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getRegMask());
     360           0 :   case MachineOperand::MO_Metadata:
     361           0 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMetadata());
     362         157 :   case MachineOperand::MO_MCSymbol:
     363         314 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getMCSymbol());
     364           0 :   case MachineOperand::MO_CFIIndex:
     365           0 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getCFIIndex());
     366           0 :   case MachineOperand::MO_IntrinsicID:
     367           0 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getIntrinsicID());
     368           0 :   case MachineOperand::MO_Predicate:
     369           0 :     return hash_combine(MO.getType(), MO.getTargetFlags(), MO.getPredicate());
     370             :   }
     371           0 :   llvm_unreachable("Invalid machine operand type");
     372             : }
     373             : 
     374             : // Try to crawl up to the machine function and get TRI and IntrinsicInfo from
     375             : // it.
     376          30 : static void tryToGetTargetInfo(const MachineOperand &MO,
     377             :                                const TargetRegisterInfo *&TRI,
     378             :                                const TargetIntrinsicInfo *&IntrinsicInfo) {
     379             :   if (const MachineFunction *MF = getMFIfAvailable(MO)) {
     380          11 :     TRI = MF->getSubtarget().getRegisterInfo();
     381          11 :     IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
     382             :   }
     383          30 : }
     384             : 
     385           2 : static const char *getTargetIndexName(const MachineFunction &MF, int Index) {
     386           2 :   const auto *TII = MF.getSubtarget().getInstrInfo();
     387             :   assert(TII && "expected instruction info");
     388           2 :   auto Indices = TII->getSerializableTargetIndices();
     389             :   auto Found = find_if(Indices, [&](const std::pair<int, const char *> &I) {
     390           2 :     return I.first == Index;
     391             :   });
     392           2 :   if (Found != Indices.end())
     393           2 :     return Found->second;
     394             :   return nullptr;
     395             : }
     396             : 
     397             : static const char *getTargetFlagName(const TargetInstrInfo *TII, unsigned TF) {
     398        2623 :   auto Flags = TII->getSerializableDirectMachineOperandTargetFlags();
     399        7715 :   for (const auto &I : Flags) {
     400        5169 :     if (I.first == TF) {
     401        2623 :       return I.second;
     402             :     }
     403             :   }
     404             :   return nullptr;
     405             : }
     406             : 
     407         701 : static void printCFIRegister(unsigned DwarfReg, raw_ostream &OS,
     408             :                              const TargetRegisterInfo *TRI) {
     409         701 :   if (!TRI) {
     410           0 :     OS << "%dwarfreg." << DwarfReg;
     411             :     return;
     412             :   }
     413             : 
     414         701 :   int Reg = TRI->getLLVMRegNum(DwarfReg, true);
     415         701 :   if (Reg == -1) {
     416           0 :     OS << "<badreg>";
     417           0 :     return;
     418             :   }
     419        1402 :   OS << printReg(Reg, TRI);
     420             : }
     421             : 
     422           5 : static void printIRBlockReference(raw_ostream &OS, const BasicBlock &BB,
     423             :                                   ModuleSlotTracker &MST) {
     424           5 :   OS << "%ir-block.";
     425           5 :   if (BB.hasName()) {
     426           3 :     printLLVMNameWithoutPrefix(OS, BB.getName());
     427             :     return;
     428             :   }
     429             :   Optional<int> Slot;
     430           2 :   if (const Function *F = BB.getParent()) {
     431           2 :     if (F == MST.getCurrentFunction()) {
     432           1 :       Slot = MST.getLocalSlot(&BB);
     433           1 :     } else if (const Module *M = F->getParent()) {
     434           2 :       ModuleSlotTracker CustomMST(M, /*ShouldInitializeAllMetadata=*/false);
     435           1 :       CustomMST.incorporateFunction(*F);
     436           1 :       Slot = CustomMST.getLocalSlot(&BB);
     437             :     }
     438             :   }
     439           2 :   if (Slot)
     440           2 :     MachineOperand::printIRSlotNumber(OS, *Slot);
     441             :   else
     442           0 :     OS << "<unknown>";
     443             : }
     444             : 
     445        1704 : static void printIRValueReference(raw_ostream &OS, const Value &V,
     446             :                                   ModuleSlotTracker &MST) {
     447             :   if (isa<GlobalValue>(V)) {
     448         167 :     V.printAsOperand(OS, /*PrintType=*/false, MST);
     449         167 :     return;
     450             :   }
     451        1537 :   if (isa<Constant>(V)) {
     452             :     // Machine memory operands can load/store to/from constant value pointers.
     453             :     OS << '`';
     454         559 :     V.printAsOperand(OS, /*PrintType=*/true, MST);
     455             :     OS << '`';
     456             :     return;
     457             :   }
     458         978 :   OS << "%ir.";
     459         978 :   if (V.hasName()) {
     460         936 :     printLLVMNameWithoutPrefix(OS, V.getName());
     461         936 :     return;
     462             :   }
     463          42 :   MachineOperand::printIRSlotNumber(OS, MST.getLocalSlot(&V));
     464             : }
     465             : 
     466        5207 : static void printSyncScope(raw_ostream &OS, const LLVMContext &Context,
     467             :                            SyncScope::ID SSID,
     468             :                            SmallVectorImpl<StringRef> &SSNs) {
     469        5207 :   switch (SSID) {
     470             :   case SyncScope::System:
     471             :     break;
     472          90 :   default:
     473          90 :     if (SSNs.empty())
     474          84 :       Context.getSyncScopeNames(SSNs);
     475             : 
     476          90 :     OS << "syncscope(\"";
     477         180 :     printEscapedString(SSNs[SSID], OS);
     478          90 :     OS << "\") ";
     479          90 :     break;
     480             :   }
     481        5207 : }
     482             : 
     483             : static const char *getTargetMMOFlagName(const TargetInstrInfo &TII,
     484             :                                         unsigned TMMOFlag) {
     485          23 :   auto Flags = TII.getSerializableMachineMemOperandTargetFlags();
     486          65 :   for (const auto &I : Flags) {
     487          44 :     if (I.first == TMMOFlag) {
     488          23 :       return I.second;
     489             :     }
     490             :   }
     491             :   return nullptr;
     492             : }
     493             : 
     494        1858 : static void printFrameIndex(raw_ostream& OS, int FrameIndex, bool IsFixed,
     495             :                             const MachineFrameInfo *MFI) {
     496        1858 :   StringRef Name;
     497        1858 :   if (MFI) {
     498             :     IsFixed = MFI->isFixedObjectIndex(FrameIndex);
     499        1858 :     if (const AllocaInst *Alloca = MFI->getObjectAllocation(FrameIndex))
     500         148 :       if (Alloca->hasName())
     501         148 :         Name = Alloca->getName();
     502        1858 :     if (IsFixed)
     503         279 :       FrameIndex -= MFI->getObjectIndexBegin();
     504             :   }
     505        1858 :   MachineOperand::printStackObjectReference(OS, FrameIndex, IsFixed, Name);
     506        1858 : }
     507             : 
     508        1103 : void MachineOperand::printSubRegIdx(raw_ostream &OS, uint64_t Index,
     509             :                                     const TargetRegisterInfo *TRI) {
     510        1103 :   OS << "%subreg.";
     511        1103 :   if (TRI)
     512        2204 :     OS << TRI->getSubRegIndexName(Index);
     513             :   else
     514           1 :     OS << Index;
     515        1103 : }
     516             : 
     517      274987 : void MachineOperand::printTargetFlags(raw_ostream &OS,
     518             :                                       const MachineOperand &Op) {
     519       96919 :   if (!Op.getTargetFlags())
     520      273766 :     return;
     521             :   const MachineFunction *MF = getMFIfAvailable(Op);
     522             :   if (!MF)
     523             :     return;
     524             : 
     525        2645 :   const auto *TII = MF->getSubtarget().getInstrInfo();
     526             :   assert(TII && "expected instruction info");
     527        5290 :   auto Flags = TII->decomposeMachineOperandsTargetFlags(Op.getTargetFlags());
     528        2645 :   OS << "target-flags(";
     529        2645 :   const bool HasDirectFlags = Flags.first;
     530             :   const bool HasBitmaskFlags = Flags.second;
     531        2645 :   if (!HasDirectFlags && !HasBitmaskFlags) {
     532           0 :     OS << "<unknown>) ";
     533           0 :     return;
     534             :   }
     535        2645 :   if (HasDirectFlags) {
     536        2623 :     if (const auto *Name = getTargetFlagName(TII, Flags.first))
     537        2623 :       OS << Name;
     538             :     else
     539           0 :       OS << "<unknown target flag>";
     540             :   }
     541        2645 :   if (!HasBitmaskFlags) {
     542        1424 :     OS << ") ";
     543        1424 :     return;
     544             :   }
     545             :   bool IsCommaNeeded = HasDirectFlags;
     546             :   unsigned BitMask = Flags.second;
     547        1221 :   auto BitMasks = TII->getSerializableBitmaskMachineOperandTargetFlags();
     548        8601 :   for (const auto &Mask : BitMasks) {
     549             :     // Check if the flag's bitmask has the bits of the current mask set.
     550        3690 :     if ((BitMask & Mask.first) == Mask.first) {
     551        1222 :       if (IsCommaNeeded)
     552        1200 :         OS << ", ";
     553             :       IsCommaNeeded = true;
     554        1222 :       OS << Mask.second;
     555             :       // Clear the bits which were serialized from the flag's bitmask.
     556        1222 :       BitMask &= ~(Mask.first);
     557             :     }
     558             :   }
     559        1221 :   if (BitMask) {
     560             :     // When the resulting flag's bitmask isn't zero, we know that we didn't
     561             :     // serialize all of the bit flags.
     562           0 :     if (IsCommaNeeded)
     563           0 :       OS << ", ";
     564           0 :     OS << "<unknown bitmask target flag>";
     565             :   }
     566        1221 :   OS << ") ";
     567             : }
     568             : 
     569          17 : void MachineOperand::printSymbol(raw_ostream &OS, MCSymbol &Sym) {
     570          34 :   OS << "<mcsymbol " << Sym << ">";
     571          17 : }
     572             : 
     573        2482 : void MachineOperand::printStackObjectReference(raw_ostream &OS,
     574             :                                                unsigned FrameIndex,
     575             :                                                bool IsFixed, StringRef Name) {
     576        2482 :   if (IsFixed) {
     577         518 :     OS << "%fixed-stack." << FrameIndex;
     578             :     return;
     579             :   }
     580             : 
     581        1964 :   OS << "%stack." << FrameIndex;
     582        1964 :   if (!Name.empty())
     583         313 :     OS << '.' << Name;
     584             : }
     585             : 
     586       13287 : void MachineOperand::printOperandOffset(raw_ostream &OS, int64_t Offset) {
     587       13287 :   if (Offset == 0)
     588             :     return;
     589         391 :   if (Offset < 0) {
     590           7 :     OS << " - " << -Offset;
     591           7 :     return;
     592             :   }
     593         384 :   OS << " + " << Offset;
     594             : }
     595             : 
     596          44 : void MachineOperand::printIRSlotNumber(raw_ostream &OS, int Slot) {
     597          44 :   if (Slot == -1)
     598           0 :     OS << "<badref>";
     599             :   else
     600             :     OS << Slot;
     601          44 : }
     602             : 
     603        1064 : static void printCFI(raw_ostream &OS, const MCCFIInstruction &CFI,
     604             :                      const TargetRegisterInfo *TRI) {
     605        1064 :   switch (CFI.getOperation()) {
     606           3 :   case MCCFIInstruction::OpSameValue:
     607           3 :     OS << "same_value ";
     608           3 :     if (MCSymbol *Label = CFI.getLabel())
     609           0 :       MachineOperand::printSymbol(OS, *Label);
     610           3 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     611           3 :     break;
     612           1 :   case MCCFIInstruction::OpRememberState:
     613           1 :     OS << "remember_state ";
     614           1 :     if (MCSymbol *Label = CFI.getLabel())
     615           0 :       MachineOperand::printSymbol(OS, *Label);
     616             :     break;
     617           1 :   case MCCFIInstruction::OpRestoreState:
     618           1 :     OS << "restore_state ";
     619           1 :     if (MCSymbol *Label = CFI.getLabel())
     620           0 :       MachineOperand::printSymbol(OS, *Label);
     621             :     break;
     622         677 :   case MCCFIInstruction::OpOffset:
     623         677 :     OS << "offset ";
     624         677 :     if (MCSymbol *Label = CFI.getLabel())
     625           0 :       MachineOperand::printSymbol(OS, *Label);
     626         677 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     627         677 :     OS << ", " << CFI.getOffset();
     628             :     break;
     629          11 :   case MCCFIInstruction::OpDefCfaRegister:
     630          11 :     OS << "def_cfa_register ";
     631          11 :     if (MCSymbol *Label = CFI.getLabel())
     632           0 :       MachineOperand::printSymbol(OS, *Label);
     633          11 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     634          11 :     break;
     635         344 :   case MCCFIInstruction::OpDefCfaOffset:
     636         344 :     OS << "def_cfa_offset ";
     637         344 :     if (MCSymbol *Label = CFI.getLabel())
     638           2 :       MachineOperand::printSymbol(OS, *Label);
     639         344 :     OS << CFI.getOffset();
     640             :     break;
     641           5 :   case MCCFIInstruction::OpDefCfa:
     642           5 :     OS << "def_cfa ";
     643           5 :     if (MCSymbol *Label = CFI.getLabel())
     644           0 :       MachineOperand::printSymbol(OS, *Label);
     645           5 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     646           5 :     OS << ", " << CFI.getOffset();
     647             :     break;
     648           1 :   case MCCFIInstruction::OpRelOffset:
     649           1 :     OS << "rel_offset ";
     650           1 :     if (MCSymbol *Label = CFI.getLabel())
     651           0 :       MachineOperand::printSymbol(OS, *Label);
     652           1 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     653           1 :     OS << ", " << CFI.getOffset();
     654             :     break;
     655          16 :   case MCCFIInstruction::OpAdjustCfaOffset:
     656          16 :     OS << "adjust_cfa_offset ";
     657          16 :     if (MCSymbol *Label = CFI.getLabel())
     658           0 :       MachineOperand::printSymbol(OS, *Label);
     659          16 :     OS << CFI.getOffset();
     660             :     break;
     661           1 :   case MCCFIInstruction::OpRestore:
     662           1 :     OS << "restore ";
     663           1 :     if (MCSymbol *Label = CFI.getLabel())
     664           0 :       MachineOperand::printSymbol(OS, *Label);
     665           1 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     666           1 :     break;
     667           1 :   case MCCFIInstruction::OpEscape: {
     668           1 :     OS << "escape ";
     669           1 :     if (MCSymbol *Label = CFI.getLabel())
     670           0 :       MachineOperand::printSymbol(OS, *Label);
     671             :     if (!CFI.getValues().empty()) {
     672           1 :       size_t e = CFI.getValues().size() - 1;
     673           5 :       for (size_t i = 0; i < e; ++i)
     674           4 :         OS << format("0x%02x", uint8_t(CFI.getValues()[i])) << ", ";
     675           2 :       OS << format("0x%02x", uint8_t(CFI.getValues()[e])) << ", ";
     676             :     }
     677             :     break;
     678             :   }
     679           1 :   case MCCFIInstruction::OpUndefined:
     680           1 :     OS << "undefined ";
     681           1 :     if (MCSymbol *Label = CFI.getLabel())
     682           0 :       MachineOperand::printSymbol(OS, *Label);
     683           1 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     684           1 :     break;
     685           1 :   case MCCFIInstruction::OpRegister:
     686           1 :     OS << "register ";
     687           1 :     if (MCSymbol *Label = CFI.getLabel())
     688           0 :       MachineOperand::printSymbol(OS, *Label);
     689           1 :     printCFIRegister(CFI.getRegister(), OS, TRI);
     690           1 :     OS << ", ";
     691           1 :     printCFIRegister(CFI.getRegister2(), OS, TRI);
     692           1 :     break;
     693           1 :   case MCCFIInstruction::OpWindowSave:
     694           1 :     OS << "window_save ";
     695           1 :     if (MCSymbol *Label = CFI.getLabel())
     696           0 :       MachineOperand::printSymbol(OS, *Label);
     697             :     break;
     698           0 :   default:
     699             :     // TODO: Print the other CFI Operations.
     700           0 :     OS << "<unserializable cfi directive>";
     701           0 :     break;
     702             :   }
     703        1064 : }
     704             : 
     705          19 : void MachineOperand::print(raw_ostream &OS, const TargetRegisterInfo *TRI,
     706             :                            const TargetIntrinsicInfo *IntrinsicInfo) const {
     707          19 :   print(OS, LLT{}, TRI, IntrinsicInfo);
     708          19 : }
     709             : 
     710          30 : void MachineOperand::print(raw_ostream &OS, LLT TypeToPrint,
     711             :                            const TargetRegisterInfo *TRI,
     712             :                            const TargetIntrinsicInfo *IntrinsicInfo) const {
     713          30 :   tryToGetTargetInfo(*this, TRI, IntrinsicInfo);
     714          60 :   ModuleSlotTracker DummyMST(nullptr);
     715          30 :   print(OS, DummyMST, TypeToPrint, /*PrintDef=*/false, /*IsStandalone=*/true,
     716             :         /*ShouldPrintRegisterTies=*/true,
     717             :         /*TiedOperandIdx=*/0, TRI, IntrinsicInfo);
     718          30 : }
     719             : 
     720      274512 : void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
     721             :                            LLT TypeToPrint, bool PrintDef, bool IsStandalone,
     722             :                            bool ShouldPrintRegisterTies,
     723             :                            unsigned TiedOperandIdx,
     724             :                            const TargetRegisterInfo *TRI,
     725             :                            const TargetIntrinsicInfo *IntrinsicInfo) const {
     726      274512 :   printTargetFlags(OS, *this);
     727      274512 :   switch (getType()) {
     728      178068 :   case MachineOperand::MO_Register: {
     729      178068 :     unsigned Reg = getReg();
     730      178068 :     if (isImplicit())
     731       64612 :       OS << (isDef() ? "implicit-def " : "implicit ");
     732      176344 :     else if (PrintDef && isDef())
     733             :       // Print the 'def' flag only when the operand is defined after '='.
     734          70 :       OS << "def ";
     735      178068 :     if (isInternalRead())
     736          21 :       OS << "internal ";
     737      178068 :     if (isDead())
     738       18906 :       OS << "dead ";
     739      178068 :     if (isKill())
     740       12152 :       OS << "killed ";
     741      178068 :     if (isUndef())
     742        1093 :       OS << "undef ";
     743      178068 :     if (isEarlyClobber())
     744         754 :       OS << "early-clobber ";
     745      178068 :     if (isDebug())
     746         878 :       OS << "debug-use ";
     747      356136 :     if (TargetRegisterInfo::isPhysicalRegister(getReg()) && isRenamable())
     748        6930 :       OS << "renamable ";
     749             : 
     750             :     const MachineRegisterInfo *MRI = nullptr;
     751      178068 :     if (TargetRegisterInfo::isVirtualRegister(Reg)) {
     752             :       if (const MachineFunction *MF = getMFIfAvailable(*this)) {
     753       53051 :         MRI = &MF->getRegInfo();
     754             :       }
     755             :     }
     756             : 
     757      356136 :     OS << printReg(Reg, TRI, 0, MRI);
     758             :     // Print the sub register.
     759      178068 :     if (unsigned SubReg = getSubReg()) {
     760         999 :       if (TRI)
     761        1996 :         OS << '.' << TRI->getSubRegIndexName(SubReg);
     762             :       else
     763           1 :         OS << ".subreg" << SubReg;
     764             :     }
     765             :     // Print the register class / bank.
     766      178068 :     if (TargetRegisterInfo::isVirtualRegister(Reg)) {
     767             :       if (const MachineFunction *MF = getMFIfAvailable(*this)) {
     768       53051 :         const MachineRegisterInfo &MRI = MF->getRegInfo();
     769       70275 :         if (IsStandalone || !PrintDef || MRI.def_empty(Reg)) {
     770             :           OS << ':';
     771       71842 :           OS << printRegClassOrBank(Reg, MRI, TRI);
     772             :         }
     773             :       }
     774             :     }
     775             :     // Print ties.
     776      178124 :     if (ShouldPrintRegisterTies && isTied() && !isDef())
     777          16 :       OS << "(tied-def " << TiedOperandIdx << ")";
     778             :     // Print types.
     779      178068 :     if (TypeToPrint.isValid())
     780             :       OS << '(' << TypeToPrint << ')';
     781             :     break;
     782             :   }
     783       63624 :   case MachineOperand::MO_Immediate:
     784       63624 :     OS << getImm();
     785       63624 :     break;
     786         875 :   case MachineOperand::MO_CImmediate:
     787         875 :     getCImm()->printAsOperand(OS, /*PrintType=*/true, MST);
     788         875 :     break;
     789          55 :   case MachineOperand::MO_FPImmediate:
     790          55 :     getFPImm()->printAsOperand(OS, /*PrintType=*/true, MST);
     791          55 :     break;
     792       12032 :   case MachineOperand::MO_MachineBasicBlock:
     793       24064 :     OS << printMBBReference(*getMBB());
     794       12032 :     break;
     795         142 :   case MachineOperand::MO_FrameIndex: {
     796         142 :     int FrameIndex = getIndex();
     797             :     bool IsFixed = false;
     798             :     const MachineFrameInfo *MFI = nullptr;
     799             :     if (const MachineFunction *MF = getMFIfAvailable(*this))
     800         142 :       MFI = &MF->getFrameInfo();
     801         142 :     printFrameIndex(OS, FrameIndex, IsFixed, MFI);
     802         142 :     break;
     803             :   }
     804          81 :   case MachineOperand::MO_ConstantPoolIndex:
     805          81 :     OS << "%const." << getIndex();
     806         162 :     printOperandOffset(OS, getOffset());
     807          81 :     break;
     808           4 :   case MachineOperand::MO_TargetIndex: {
     809           4 :     OS << "target-index(";
     810             :     const char *Name = "<unknown>";
     811             :     if (const MachineFunction *MF = getMFIfAvailable(*this))
     812           2 :       if (const auto *TargetIndexName = getTargetIndexName(*MF, getIndex()))
     813             :         Name = TargetIndexName;
     814           4 :     OS << Name << ')';
     815           8 :     printOperandOffset(OS, getOffset());
     816           4 :     break;
     817             :   }
     818        2372 :   case MachineOperand::MO_JumpTableIndex:
     819        4744 :     OS << printJumpTableEntryReference(getIndex());
     820        2372 :     break;
     821        7604 :   case MachineOperand::MO_GlobalAddress:
     822        7604 :     getGlobal()->printAsOperand(OS, /*PrintType=*/false, MST);
     823       15208 :     printOperandOffset(OS, getOffset());
     824        7604 :     break;
     825         386 :   case MachineOperand::MO_ExternalSymbol: {
     826         386 :     StringRef Name = getSymbolName();
     827             :     OS << '&';
     828         386 :     if (Name.empty()) {
     829           3 :       OS << "\"\"";
     830             :     } else {
     831         383 :       printLLVMNameWithoutPrefix(OS, Name);
     832             :     }
     833         772 :     printOperandOffset(OS, getOffset());
     834             :     break;
     835             :   }
     836           5 :   case MachineOperand::MO_BlockAddress: {
     837           5 :     OS << "blockaddress(";
     838          10 :     getBlockAddress()->getFunction()->printAsOperand(OS, /*PrintType=*/false,
     839             :                                                      MST);
     840           5 :     OS << ", ";
     841          10 :     printIRBlockReference(OS, *getBlockAddress()->getBasicBlock(), MST);
     842             :     OS << ')';
     843          10 :     MachineOperand::printOperandOffset(OS, getOffset());
     844           5 :     break;
     845             :   }
     846        6969 :   case MachineOperand::MO_RegisterMask: {
     847        6969 :     OS << "<regmask";
     848        6969 :     if (TRI) {
     849             :       unsigned NumRegsInMask = 0;
     850             :       unsigned NumRegsEmitted = 0;
     851     9145622 :       for (unsigned i = 0; i < TRI->getNumRegs(); ++i) {
     852     4569327 :         unsigned MaskWord = i / 32;
     853     4569327 :         unsigned MaskBit = i % 32;
     854     4569327 :         if (getRegMask()[MaskWord] & (1 << MaskBit)) {
     855     1328676 :           if (PrintRegMaskNumRegs < 0 ||
     856      664338 :               NumRegsEmitted <= static_cast<unsigned>(PrintRegMaskNumRegs)) {
     857      459150 :             OS << " " << printReg(i, TRI);
     858      229575 :             NumRegsEmitted++;
     859             :           }
     860      664338 :           NumRegsInMask++;
     861             :         }
     862             :       }
     863        6968 :       if (NumRegsEmitted != NumRegsInMask)
     864       13840 :         OS << " and " << (NumRegsInMask - NumRegsEmitted) << " more...";
     865             :     } else {
     866           1 :       OS << " ...";
     867             :     }
     868        6969 :     OS << ">";
     869        6969 :     break;
     870             :   }
     871           2 :   case MachineOperand::MO_RegisterLiveOut: {
     872           2 :     const uint32_t *RegMask = getRegLiveOut();
     873           2 :     OS << "liveout(";
     874           2 :     if (!TRI) {
     875           1 :       OS << "<unknown>";
     876             :     } else {
     877             :       bool IsCommaNeeded = false;
     878         258 :       for (unsigned Reg = 0, E = TRI->getNumRegs(); Reg < E; ++Reg) {
     879         257 :         if (RegMask[Reg / 32] & (1U << (Reg % 32))) {
     880           4 :           if (IsCommaNeeded)
     881           3 :             OS << ", ";
     882           8 :           OS << printReg(Reg, TRI);
     883             :           IsCommaNeeded = true;
     884             :         }
     885             :       }
     886             :     }
     887           2 :     OS << ")";
     888           2 :     break;
     889             :   }
     890        1008 :   case MachineOperand::MO_Metadata:
     891        1008 :     getMetadata()->printAsOperand(OS, MST);
     892        1008 :     break;
     893          15 :   case MachineOperand::MO_MCSymbol:
     894          15 :     printSymbol(OS, *getMCSymbol());
     895          15 :     break;
     896             :   case MachineOperand::MO_CFIIndex: {
     897             :     if (const MachineFunction *MF = getMFIfAvailable(*this))
     898        2128 :       printCFI(OS, MF->getFrameInstructions()[getCFIIndex()], TRI);
     899             :     else
     900           1 :       OS << "<cfi directive>";
     901             :     break;
     902             :   }
     903          47 :   case MachineOperand::MO_IntrinsicID: {
     904          47 :     Intrinsic::ID ID = getIntrinsicID();
     905          47 :     if (ID < Intrinsic::num_intrinsics)
     906         138 :       OS << "intrinsic(@" << Intrinsic::getName(ID, None) << ')';
     907           1 :     else if (IntrinsicInfo)
     908           0 :       OS << "intrinsic(@" << IntrinsicInfo->getName(ID) << ')';
     909             :     else
     910           1 :       OS << "intrinsic(" << ID << ')';
     911             :     break;
     912             :   }
     913         158 :   case MachineOperand::MO_Predicate: {
     914         158 :     auto Pred = static_cast<CmpInst::Predicate>(getPredicate());
     915         158 :     OS << (CmpInst::isIntPredicate(Pred) ? "int" : "float") << "pred("
     916         158 :        << CmpInst::getPredicateName(Pred) << ')';
     917             :     break;
     918             :   }
     919             :   }
     920      274512 : }
     921             : 
     922             : #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
     923             : LLVM_DUMP_METHOD void MachineOperand::dump() const { dbgs() << *this << '\n'; }
     924             : #endif
     925             : 
     926             : //===----------------------------------------------------------------------===//
     927             : // MachineMemOperand Implementation
     928             : //===----------------------------------------------------------------------===//
     929             : 
     930             : /// getAddrSpace - Return the LLVM IR address space number that this pointer
     931             : /// points into.
     932    15193224 : unsigned MachinePointerInfo::getAddrSpace() const { return AddrSpace; }
     933             : 
     934             : /// isDereferenceable - Return true if V is always dereferenceable for
     935             : /// Offset + Size byte.
     936        3522 : bool MachinePointerInfo::isDereferenceable(unsigned Size, LLVMContext &C,
     937             :                                            const DataLayout &DL) const {
     938        3522 :   if (!V.is<const Value *>())
     939             :     return false;
     940             : 
     941             :   const Value *BasePtr = V.get<const Value *>();
     942        3522 :   if (BasePtr == nullptr)
     943             :     return false;
     944             : 
     945             :   return isDereferenceableAndAlignedPointer(
     946        7944 :       BasePtr, 1, APInt(DL.getPointerSizeInBits(), Offset + Size), DL);
     947             : }
     948             : 
     949             : /// getConstantPool - Return a MachinePointerInfo record that refers to the
     950             : /// constant pool.
     951       26836 : MachinePointerInfo MachinePointerInfo::getConstantPool(MachineFunction &MF) {
     952       53672 :   return MachinePointerInfo(MF.getPSVManager().getConstantPool());
     953             : }
     954             : 
     955             : /// getFixedStack - Return a MachinePointerInfo record that refers to the
     956             : /// the specified FrameIndex.
     957      232323 : MachinePointerInfo MachinePointerInfo::getFixedStack(MachineFunction &MF,
     958             :                                                      int FI, int64_t Offset) {
     959      464646 :   return MachinePointerInfo(MF.getPSVManager().getFixedStack(FI), Offset);
     960             : }
     961             : 
     962         253 : MachinePointerInfo MachinePointerInfo::getJumpTable(MachineFunction &MF) {
     963         506 :   return MachinePointerInfo(MF.getPSVManager().getJumpTable());
     964             : }
     965             : 
     966       13850 : MachinePointerInfo MachinePointerInfo::getGOT(MachineFunction &MF) {
     967       27700 :   return MachinePointerInfo(MF.getPSVManager().getGOT());
     968             : }
     969             : 
     970       77370 : MachinePointerInfo MachinePointerInfo::getStack(MachineFunction &MF,
     971             :                                                 int64_t Offset, uint8_t ID) {
     972      154740 :   return MachinePointerInfo(MF.getPSVManager().getStack(), Offset, ID);
     973             : }
     974             : 
     975        1413 : MachinePointerInfo MachinePointerInfo::getUnknownStack(MachineFunction &MF) {
     976        2826 :   return MachinePointerInfo(MF.getDataLayout().getAllocaAddrSpace());
     977             : }
     978             : 
     979     1808997 : MachineMemOperand::MachineMemOperand(MachinePointerInfo ptrinfo, Flags f,
     980             :                                      uint64_t s, uint64_t a,
     981             :                                      const AAMDNodes &AAInfo,
     982             :                                      const MDNode *Ranges, SyncScope::ID SSID,
     983             :                                      AtomicOrdering Ordering,
     984     1808997 :                                      AtomicOrdering FailureOrdering)
     985     3617994 :     : PtrInfo(ptrinfo), Size(s), FlagVals(f), BaseAlignLog2(Log2_32(a) + 1),
     986     3617994 :       AAInfo(AAInfo), Ranges(Ranges) {
     987             :   assert((PtrInfo.V.isNull() || PtrInfo.V.is<const PseudoSourceValue *>() ||
     988             :           isa<PointerType>(PtrInfo.V.get<const Value *>()->getType())) &&
     989             :          "invalid pointer value");
     990             :   assert(getBaseAlignment() == a && "Alignment is not a power of 2!");
     991             :   assert((isLoad() || isStore()) && "Not a load/store!");
     992             : 
     993     1808997 :   AtomicInfo.SSID = static_cast<unsigned>(SSID);
     994             :   assert(getSyncScopeID() == SSID && "Value truncated");
     995     1808997 :   AtomicInfo.Ordering = static_cast<unsigned>(Ordering);
     996             :   assert(getOrdering() == Ordering && "Value truncated");
     997     1808997 :   AtomicInfo.FailureOrdering = static_cast<unsigned>(FailureOrdering);
     998             :   assert(getFailureOrdering() == FailureOrdering && "Value truncated");
     999     1808997 : }
    1000             : 
    1001             : /// Profile - Gather unique data for the object.
    1002             : ///
    1003           0 : void MachineMemOperand::Profile(FoldingSetNodeID &ID) const {
    1004           0 :   ID.AddInteger(getOffset());
    1005           0 :   ID.AddInteger(Size);
    1006           0 :   ID.AddPointer(getOpaqueValue());
    1007           0 :   ID.AddInteger(getFlags());
    1008           0 :   ID.AddInteger(getBaseAlignment());
    1009           0 : }
    1010             : 
    1011       29525 : void MachineMemOperand::refineAlignment(const MachineMemOperand *MMO) {
    1012             :   // The Value and Offset may differ due to CSE. But the flags and size
    1013             :   // should be the same.
    1014             :   assert(MMO->getFlags() == getFlags() && "Flags mismatch!");
    1015             :   assert(MMO->getSize() == getSize() && "Size mismatch!");
    1016             : 
    1017       88575 :   if (MMO->getBaseAlignment() >= getBaseAlignment()) {
    1018             :     // Update the alignment value.
    1019       29509 :     BaseAlignLog2 = Log2_32(MMO->getBaseAlignment()) + 1;
    1020             :     // Also update the base and offset, because the new alignment may
    1021             :     // not be applicable with the old ones.
    1022       29509 :     PtrInfo = MMO->PtrInfo;
    1023             :   }
    1024       29525 : }
    1025             : 
    1026             : /// getAlignment - Return the minimum known alignment in bytes of the
    1027             : /// actual memory reference.
    1028    12346381 : uint64_t MachineMemOperand::getAlignment() const {
    1029    24692762 :   return MinAlign(getBaseAlignment(), getOffset());
    1030             : }
    1031             : 
    1032           0 : void MachineMemOperand::print(raw_ostream &OS) const {
    1033           0 :   ModuleSlotTracker DummyMST(nullptr);
    1034           0 :   print(OS, DummyMST);
    1035           0 : }
    1036             : 
    1037           0 : void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST) const {
    1038             :   SmallVector<StringRef, 0> SSNs;
    1039           0 :   LLVMContext Ctx;
    1040           0 :   print(OS, MST, SSNs, Ctx, nullptr, nullptr);
    1041           0 : }
    1042             : 
    1043        5207 : void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
    1044             :                               SmallVectorImpl<StringRef> &SSNs,
    1045             :                               const LLVMContext &Context,
    1046             :                               const MachineFrameInfo *MFI,
    1047             :                               const TargetInstrInfo *TII) const {
    1048             :   OS << '(';
    1049       10414 :   if (isVolatile())
    1050         334 :     OS << "volatile ";
    1051       10414 :   if (isNonTemporal())
    1052          58 :     OS << "non-temporal ";
    1053       10414 :   if (isDereferenceable())
    1054         458 :     OS << "dereferenceable ";
    1055       10414 :   if (isInvariant())
    1056         334 :     OS << "invariant ";
    1057       10414 :   if (getFlags() & MachineMemOperand::MOTargetFlag1)
    1058           2 :     OS << '"' << getTargetMMOFlagName(*TII, MachineMemOperand::MOTargetFlag1)
    1059           2 :        << "\" ";
    1060       10414 :   if (getFlags() & MachineMemOperand::MOTargetFlag2)
    1061          21 :     OS << '"' << getTargetMMOFlagName(*TII, MachineMemOperand::MOTargetFlag2)
    1062          21 :        << "\" ";
    1063       10414 :   if (getFlags() & MachineMemOperand::MOTargetFlag3)
    1064           0 :     OS << '"' << getTargetMMOFlagName(*TII, MachineMemOperand::MOTargetFlag3)
    1065           0 :        << "\" ";
    1066             : 
    1067             :   assert((isLoad() || isStore()) &&
    1068             :          "machine memory operand must be a load or store (or both)");
    1069       10414 :   if (isLoad())
    1070        3467 :     OS << "load ";
    1071       10414 :   if (isStore())
    1072        1766 :     OS << "store ";
    1073             : 
    1074        5207 :   printSyncScope(OS, Context, getSyncScopeID(), SSNs);
    1075             : 
    1076        5207 :   if (getOrdering() != AtomicOrdering::NotAtomic)
    1077         145 :     OS << toIRString(getOrdering()) << ' ';
    1078        5207 :   if (getFailureOrdering() != AtomicOrdering::NotAtomic)
    1079           1 :     OS << toIRString(getFailureOrdering()) << ' ';
    1080             : 
    1081        5207 :   OS << getSize();
    1082        2072 :   if (const Value *Val = getValue()) {
    1083        4425 :     OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");
    1084        1704 :     printIRValueReference(OS, *Val, MST);
    1085        3135 :   } else if (const PseudoSourceValue *PVal = getPseudoValue()) {
    1086        8526 :     OS << ((isLoad() && isStore()) ? " on " : isLoad() ? " from " : " into ");
    1087             :     assert(PVal && "Expected a pseudo source value");
    1088        3135 :     switch (PVal->kind()) {
    1089         151 :     case PseudoSourceValue::Stack:
    1090         151 :       OS << "stack";
    1091         151 :       break;
    1092          25 :     case PseudoSourceValue::GOT:
    1093          25 :       OS << "got";
    1094          25 :       break;
    1095        1185 :     case PseudoSourceValue::JumpTable:
    1096        1185 :       OS << "jump-table";
    1097        1185 :       break;
    1098          43 :     case PseudoSourceValue::ConstantPool:
    1099          43 :       OS << "constant-pool";
    1100          43 :       break;
    1101             :     case PseudoSourceValue::FixedStack: {
    1102        1716 :       int FrameIndex = cast<FixedStackPseudoSourceValue>(PVal)->getFrameIndex();
    1103             :       bool IsFixed = true;
    1104        1716 :       printFrameIndex(OS, FrameIndex, IsFixed, MFI);
    1105        1716 :       break;
    1106             :     }
    1107           8 :     case PseudoSourceValue::GlobalValueCallEntry:
    1108           8 :       OS << "call-entry ";
    1109           8 :       cast<GlobalValuePseudoSourceValue>(PVal)->getValue()->printAsOperand(
    1110             :           OS, /*PrintType=*/false, MST);
    1111           8 :       break;
    1112           6 :     case PseudoSourceValue::ExternalSymbolCallEntry:
    1113           6 :       OS << "call-entry &";
    1114          12 :       printLLVMNameWithoutPrefix(
    1115             :           OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
    1116           6 :       break;
    1117           1 :     case PseudoSourceValue::TargetCustom:
    1118             :       // FIXME: This is not necessarily the correct MIR serialization format for
    1119             :       // a custom pseudo source value, but at least it allows
    1120             :       // -print-machineinstrs to work on a target with custom pseudo source
    1121             :       // values.
    1122           1 :       OS << "custom ";
    1123           1 :       PVal->printCustom(OS);
    1124           1 :       break;
    1125             :     }
    1126             :   }
    1127        5207 :   MachineOperand::printOperandOffset(OS, getOffset());
    1128       10414 :   if (getBaseAlignment() != getSize())
    1129        1414 :     OS << ", align " << getBaseAlignment();
    1130             :   auto AAInfo = getAAInfo();
    1131        5207 :   if (AAInfo.TBAA) {
    1132         173 :     OS << ", !tbaa ";
    1133         173 :     AAInfo.TBAA->printAsOperand(OS, MST);
    1134             :   }
    1135        5207 :   if (AAInfo.Scope) {
    1136           1 :     OS << ", !alias.scope ";
    1137           1 :     AAInfo.Scope->printAsOperand(OS, MST);
    1138             :   }
    1139        5207 :   if (AAInfo.NoAlias) {
    1140           1 :     OS << ", !noalias ";
    1141           1 :     AAInfo.NoAlias->printAsOperand(OS, MST);
    1142             :   }
    1143        5207 :   if (getRanges()) {
    1144           1 :     OS << ", !range ";
    1145           1 :     getRanges()->printAsOperand(OS, MST);
    1146             :   }
    1147             :   // FIXME: Implement addrspace printing/parsing in MIR.
    1148             :   // For now, print this even though parsing it is not available in MIR.
    1149        5207 :   if (unsigned AS = getAddrSpace())
    1150         532 :     OS << ", addrspace " << AS;
    1151             : 
    1152             :   OS << ')';
    1153      308714 : }

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