LCOV - code coverage report
Current view: top level - lib/CodeGen - MachineTraceMetrics.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 477 534 89.3 %
Date: 2018-06-17 00:07:59 Functions: 44 50 88.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- lib/CodeGen/MachineTraceMetrics.cpp --------------------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #include "llvm/CodeGen/MachineTraceMetrics.h"
      11             : #include "llvm/ADT/ArrayRef.h"
      12             : #include "llvm/ADT/DenseMap.h"
      13             : #include "llvm/ADT/Optional.h"
      14             : #include "llvm/ADT/PostOrderIterator.h"
      15             : #include "llvm/ADT/SmallPtrSet.h"
      16             : #include "llvm/ADT/SmallVector.h"
      17             : #include "llvm/ADT/SparseSet.h"
      18             : #include "llvm/CodeGen/MachineBasicBlock.h"
      19             : #include "llvm/CodeGen/MachineBranchProbabilityInfo.h"
      20             : #include "llvm/CodeGen/MachineFunction.h"
      21             : #include "llvm/CodeGen/MachineInstr.h"
      22             : #include "llvm/CodeGen/MachineLoopInfo.h"
      23             : #include "llvm/CodeGen/MachineOperand.h"
      24             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      25             : #include "llvm/CodeGen/TargetRegisterInfo.h"
      26             : #include "llvm/CodeGen/TargetSchedule.h"
      27             : #include "llvm/CodeGen/TargetSubtargetInfo.h"
      28             : #include "llvm/MC/MCRegisterInfo.h"
      29             : #include "llvm/Pass.h"
      30             : #include "llvm/Support/Debug.h"
      31             : #include "llvm/Support/ErrorHandling.h"
      32             : #include "llvm/Support/Format.h"
      33             : #include "llvm/Support/raw_ostream.h"
      34             : #include <algorithm>
      35             : #include <cassert>
      36             : #include <iterator>
      37             : #include <tuple>
      38             : #include <utility>
      39             : 
      40             : using namespace llvm;
      41             : 
      42             : #define DEBUG_TYPE "machine-trace-metrics"
      43             : 
      44             : char MachineTraceMetrics::ID = 0;
      45             : 
      46             : char &llvm::MachineTraceMetricsID = MachineTraceMetrics::ID;
      47             : 
      48       76552 : INITIALIZE_PASS_BEGIN(MachineTraceMetrics, DEBUG_TYPE,
      49             :                       "Machine Trace Metrics", false, true)
      50       76552 : INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
      51       76552 : INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
      52      412862 : INITIALIZE_PASS_END(MachineTraceMetrics, DEBUG_TYPE,
      53             :                     "Machine Trace Metrics", false, true)
      54             : 
      55       12119 : MachineTraceMetrics::MachineTraceMetrics() : MachineFunctionPass(ID) {
      56       12119 :   std::fill(std::begin(Ensembles), std::end(Ensembles), nullptr);
      57       12119 : }
      58             : 
      59       12119 : void MachineTraceMetrics::getAnalysisUsage(AnalysisUsage &AU) const {
      60             :   AU.setPreservesAll();
      61             :   AU.addRequired<MachineBranchProbabilityInfo>();
      62             :   AU.addRequired<MachineLoopInfo>();
      63       12119 :   MachineFunctionPass::getAnalysisUsage(AU);
      64       12119 : }
      65             : 
      66      143209 : bool MachineTraceMetrics::runOnMachineFunction(MachineFunction &Func) {
      67      143209 :   MF = &Func;
      68      143209 :   const TargetSubtargetInfo &ST = MF->getSubtarget();
      69      143209 :   TII = ST.getInstrInfo();
      70      143209 :   TRI = ST.getRegisterInfo();
      71      143209 :   MRI = &MF->getRegInfo();
      72      143209 :   Loops = &getAnalysis<MachineLoopInfo>();
      73      143209 :   SchedModel.init(&ST);
      74      286418 :   BlockInfo.resize(MF->getNumBlockIDs());
      75      286418 :   ProcResourceCycles.resize(MF->getNumBlockIDs() *
      76             :                             SchedModel.getNumProcResourceKinds());
      77      143209 :   return false;
      78             : }
      79             : 
      80      143234 : void MachineTraceMetrics::releaseMemory() {
      81      143234 :   MF = nullptr;
      82             :   BlockInfo.clear();
      83      429702 :   for (unsigned i = 0; i != TS_NumStrategies; ++i) {
      84      143234 :     delete Ensembles[i];
      85      143234 :     Ensembles[i] = nullptr;
      86             :   }
      87      143234 : }
      88             : 
      89             : //===----------------------------------------------------------------------===//
      90             : //                          Fixed block information
      91             : //===----------------------------------------------------------------------===//
      92             : //
      93             : // The number of instructions in a basic block and the CPU resources used by
      94             : // those instructions don't depend on any given trace strategy.
      95             : 
      96             : /// Compute the resource usage in basic block MBB.
      97             : const MachineTraceMetrics::FixedBlockInfo*
      98        1701 : MachineTraceMetrics::getResources(const MachineBasicBlock *MBB) {
      99             :   assert(MBB && "No basic block");
     100        1701 :   FixedBlockInfo *FBI = &BlockInfo[MBB->getNumber()];
     101        1701 :   if (FBI->hasResources())
     102             :     return FBI;
     103             : 
     104             :   // Compute resource usage in the block.
     105         750 :   FBI->HasCalls = false;
     106             :   unsigned InstrCount = 0;
     107             : 
     108             :   // Add up per-processor resource cycles as well.
     109             :   unsigned PRKinds = SchedModel.getNumProcResourceKinds();
     110        1500 :   SmallVector<unsigned, 32> PRCycles(PRKinds);
     111             : 
     112        8465 :   for (const auto &MI : *MBB) {
     113        2933 :     if (MI.isTransient())
     114        2933 :       continue;
     115        4032 :     ++InstrCount;
     116        4032 :     if (MI.isCall())
     117         142 :       FBI->HasCalls = true;
     118             : 
     119             :     // Count processor resources used.
     120        4032 :     if (!SchedModel.hasInstrSchedModel())
     121         951 :       continue;
     122        3081 :     const MCSchedClassDesc *SC = SchedModel.resolveSchedClass(&MI);
     123        3081 :     if (!SC->isValid())
     124          72 :       continue;
     125             : 
     126        8893 :     for (TargetSchedModel::ProcResIter
     127        3009 :          PI = SchedModel.getWriteProcResBegin(SC),
     128       11902 :          PE = SchedModel.getWriteProcResEnd(SC); PI != PE; ++PI) {
     129             :       assert(PI->ProcResourceIdx < PRKinds && "Bad processor resource kind");
     130       17786 :       PRCycles[PI->ProcResourceIdx] += PI->Cycles;
     131             :     }
     132             :   }
     133         750 :   FBI->InstrCount = InstrCount;
     134             : 
     135             :   // Scale the resource cycles so they are comparable.
     136         750 :   unsigned PROffset = MBB->getNumber() * PRKinds;
     137       13462 :   for (unsigned K = 0; K != PRKinds; ++K)
     138       12712 :     ProcResourceCycles[PROffset + K] =
     139       19068 :       PRCycles[K] * SchedModel.getResourceFactor(K);
     140             : 
     141             :   return FBI;
     142             : }
     143             : 
     144             : ArrayRef<unsigned>
     145        9088 : MachineTraceMetrics::getProcResourceCycles(unsigned MBBNum) const {
     146             :   assert(BlockInfo[MBBNum].hasResources() &&
     147             :          "getResources() must be called before getProcResourceCycles()");
     148             :   unsigned PRKinds = SchedModel.getNumProcResourceKinds();
     149             :   assert((MBBNum+1) * PRKinds <= ProcResourceCycles.size());
     150        9088 :   return makeArrayRef(ProcResourceCycles.data() + MBBNum * PRKinds, PRKinds);
     151             : }
     152             : 
     153             : //===----------------------------------------------------------------------===//
     154             : //                         Ensemble utility functions
     155             : //===----------------------------------------------------------------------===//
     156             : 
     157      122893 : MachineTraceMetrics::Ensemble::Ensemble(MachineTraceMetrics *ct)
     158      245786 :   : MTM(*ct) {
     159      245786 :   BlockInfo.resize(MTM.BlockInfo.size());
     160      122893 :   unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
     161      245786 :   ProcResourceDepths.resize(MTM.BlockInfo.size() * PRKinds);
     162      245786 :   ProcResourceHeights.resize(MTM.BlockInfo.size() * PRKinds);
     163      122893 : }
     164             : 
     165             : // Virtual destructor serves as an anchor.
     166             : MachineTraceMetrics::Ensemble::~Ensemble() = default;
     167             : 
     168             : const MachineLoop*
     169        1392 : MachineTraceMetrics::Ensemble::getLoopFor(const MachineBasicBlock *MBB) const {
     170        2784 :   return MTM.Loops->getLoopFor(MBB);
     171             : }
     172             : 
     173             : // Update resource-related information in the TraceBlockInfo for MBB.
     174             : // Only update resources related to the trace above MBB.
     175         613 : void MachineTraceMetrics::Ensemble::
     176             : computeDepthResources(const MachineBasicBlock *MBB) {
     177         613 :   TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
     178         613 :   unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
     179         613 :   unsigned PROffset = MBB->getNumber() * PRKinds;
     180             : 
     181             :   // Compute resources from trace above. The top block is simple.
     182         613 :   if (!TBI->Pred) {
     183         420 :     TBI->InstrDepth = 0;
     184         420 :     TBI->Head = MBB->getNumber();
     185         420 :     std::fill(ProcResourceDepths.begin() + PROffset,
     186         420 :               ProcResourceDepths.begin() + PROffset + PRKinds, 0);
     187         420 :     return;
     188             :   }
     189             : 
     190             :   // Compute from the block above. A post-order traversal ensures the
     191             :   // predecessor is always computed first.
     192         193 :   unsigned PredNum = TBI->Pred->getNumber();
     193         193 :   TraceBlockInfo *PredTBI = &BlockInfo[PredNum];
     194             :   assert(PredTBI->hasValidDepth() && "Trace above has not been computed yet");
     195         193 :   const FixedBlockInfo *PredFBI = MTM.getResources(TBI->Pred);
     196         193 :   TBI->InstrDepth = PredTBI->InstrDepth + PredFBI->InstrCount;
     197         193 :   TBI->Head = PredTBI->Head;
     198             : 
     199             :   // Compute per-resource depths.
     200         193 :   ArrayRef<unsigned> PredPRDepths = getProcResourceDepths(PredNum);
     201         193 :   ArrayRef<unsigned> PredPRCycles = MTM.getProcResourceCycles(PredNum);
     202        1523 :   for (unsigned K = 0; K != PRKinds; ++K)
     203        2660 :     ProcResourceDepths[PROffset + K] = PredPRDepths[K] + PredPRCycles[K];
     204             : }
     205             : 
     206             : // Update resource-related information in the TraceBlockInfo for MBB.
     207             : // Only update resources related to the trace below MBB.
     208         715 : void MachineTraceMetrics::Ensemble::
     209             : computeHeightResources(const MachineBasicBlock *MBB) {
     210         715 :   TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
     211         715 :   unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
     212         715 :   unsigned PROffset = MBB->getNumber() * PRKinds;
     213             : 
     214             :   // Compute resources for the current block.
     215         715 :   TBI->InstrHeight = MTM.getResources(MBB)->InstrCount;
     216         715 :   ArrayRef<unsigned> PRCycles = MTM.getProcResourceCycles(MBB->getNumber());
     217             : 
     218             :   // The trace tail is done.
     219         715 :   if (!TBI->Succ) {
     220         488 :     TBI->Tail = MBB->getNumber();
     221         488 :     std::copy(PRCycles.begin(), PRCycles.end(),
     222         488 :               ProcResourceHeights.begin() + PROffset);
     223         488 :     return;
     224             :   }
     225             : 
     226             :   // Compute from the block below. A post-order traversal ensures the
     227             :   // predecessor is always computed first.
     228         227 :   unsigned SuccNum = TBI->Succ->getNumber();
     229         227 :   TraceBlockInfo *SuccTBI = &BlockInfo[SuccNum];
     230             :   assert(SuccTBI->hasValidHeight() && "Trace below has not been computed yet");
     231         227 :   TBI->InstrHeight += SuccTBI->InstrHeight;
     232         227 :   TBI->Tail = SuccTBI->Tail;
     233             : 
     234             :   // Compute per-resource heights.
     235         227 :   ArrayRef<unsigned> SuccPRHeights = getProcResourceHeights(SuccNum);
     236        3241 :   for (unsigned K = 0; K != PRKinds; ++K)
     237        6028 :     ProcResourceHeights[PROffset + K] = SuccPRHeights[K] + PRCycles[K];
     238             : }
     239             : 
     240             : // Check if depth resources for MBB are valid and return the TBI.
     241             : // Return NULL if the resources have been invalidated.
     242             : const MachineTraceMetrics::TraceBlockInfo*
     243         249 : MachineTraceMetrics::Ensemble::
     244             : getDepthResources(const MachineBasicBlock *MBB) const {
     245         249 :   const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
     246         249 :   return TBI->hasValidDepth() ? TBI : nullptr;
     247             : }
     248             : 
     249             : // Check if height resources for MBB are valid and return the TBI.
     250             : // Return NULL if the resources have been invalidated.
     251             : const MachineTraceMetrics::TraceBlockInfo*
     252         330 : MachineTraceMetrics::Ensemble::
     253             : getHeightResources(const MachineBasicBlock *MBB) const {
     254         330 :   const TraceBlockInfo *TBI = &BlockInfo[MBB->getNumber()];
     255         330 :   return TBI->hasValidHeight() ? TBI : nullptr;
     256             : }
     257             : 
     258             : /// Get an array of processor resource depths for MBB. Indexed by processor
     259             : /// resource kind, this array contains the scaled processor resources consumed
     260             : /// by all blocks preceding MBB in its trace. It does not include instructions
     261             : /// in MBB.
     262             : ///
     263             : /// Compare TraceBlockInfo::InstrDepth.
     264             : ArrayRef<unsigned>
     265         880 : MachineTraceMetrics::Ensemble::
     266             : getProcResourceDepths(unsigned MBBNum) const {
     267         880 :   unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
     268             :   assert((MBBNum+1) * PRKinds <= ProcResourceDepths.size());
     269         880 :   return makeArrayRef(ProcResourceDepths.data() + MBBNum * PRKinds, PRKinds);
     270             : }
     271             : 
     272             : /// Get an array of processor resource heights for MBB. Indexed by processor
     273             : /// resource kind, this array contains the scaled processor resources consumed
     274             : /// by this block and all blocks following it in its trace.
     275             : ///
     276             : /// Compare TraceBlockInfo::InstrHeight.
     277             : ArrayRef<unsigned>
     278         895 : MachineTraceMetrics::Ensemble::
     279             : getProcResourceHeights(unsigned MBBNum) const {
     280         895 :   unsigned PRKinds = MTM.SchedModel.getNumProcResourceKinds();
     281             :   assert((MBBNum+1) * PRKinds <= ProcResourceHeights.size());
     282         895 :   return makeArrayRef(ProcResourceHeights.data() + MBBNum * PRKinds, PRKinds);
     283             : }
     284             : 
     285             : //===----------------------------------------------------------------------===//
     286             : //                         Trace Selection Strategies
     287             : //===----------------------------------------------------------------------===//
     288             : //
     289             : // A trace selection strategy is implemented as a sub-class of Ensemble. The
     290             : // trace through a block B is computed by two DFS traversals of the CFG
     291             : // starting from B. One upwards, and one downwards. During the upwards DFS,
     292             : // pickTracePred() is called on the post-ordered blocks. During the downwards
     293             : // DFS, pickTraceSucc() is called in a post-order.
     294             : //
     295             : 
     296             : // We never allow traces that leave loops, but we do allow traces to enter
     297             : // nested loops. We also never allow traces to contain back-edges.
     298             : //
     299             : // This means that a loop header can never appear above the center block of a
     300             : // trace, except as the trace head. Below the center block, loop exiting edges
     301             : // are banned.
     302             : //
     303             : // Return true if an edge from the From loop to the To loop is leaving a loop.
     304             : // Either of To and From can be null.
     305             : static bool isExitingLoop(const MachineLoop *From, const MachineLoop *To) {
     306         899 :   return From && !From->contains(To);
     307             : }
     308             : 
     309             : // MinInstrCountEnsemble - Pick the trace that executes the least number of
     310             : // instructions.
     311             : namespace {
     312             : 
     313      122893 : class MinInstrCountEnsemble : public MachineTraceMetrics::Ensemble {
     314           0 :   const char *getName() const override { return "MinInstr"; }
     315             :   const MachineBasicBlock *pickTracePred(const MachineBasicBlock*) override;
     316             :   const MachineBasicBlock *pickTraceSucc(const MachineBasicBlock*) override;
     317             : 
     318             : public:
     319             :   MinInstrCountEnsemble(MachineTraceMetrics *mtm)
     320      122893 :     : MachineTraceMetrics::Ensemble(mtm) {}
     321             : };
     322             : 
     323             : } // end anonymous namespace
     324             : 
     325             : // Select the preferred predecessor for MBB.
     326             : const MachineBasicBlock*
     327         613 : MinInstrCountEnsemble::pickTracePred(const MachineBasicBlock *MBB) {
     328         613 :   if (MBB->pred_empty())
     329             :     return nullptr;
     330         215 :   const MachineLoop *CurLoop = getLoopFor(MBB);
     331             :   // Don't leave loops, and never follow back-edges.
     332         287 :   if (CurLoop && MBB == CurLoop->getHeader())
     333             :     return nullptr;
     334         193 :   unsigned CurCount = MTM.getResources(MBB)->InstrCount;
     335             :   const MachineBasicBlock *Best = nullptr;
     336             :   unsigned BestDepth = 0;
     337         442 :   for (const MachineBasicBlock *Pred : MBB->predecessors()) {
     338             :     const MachineTraceMetrics::TraceBlockInfo *PredTBI =
     339         249 :       getDepthResources(Pred);
     340             :     // Ignore cycles that aren't natural loops.
     341         249 :     if (!PredTBI)
     342           1 :       continue;
     343             :     // Pick the predecessor that would give this block the smallest InstrDepth.
     344         248 :     unsigned Depth = PredTBI->InstrDepth + CurCount;
     345         248 :     if (!Best || Depth < BestDepth) {
     346             :       Best = Pred;
     347             :       BestDepth = Depth;
     348             :     }
     349             :   }
     350             :   return Best;
     351             : }
     352             : 
     353             : // Select the preferred successor for MBB.
     354             : const MachineBasicBlock*
     355         715 : MinInstrCountEnsemble::pickTraceSucc(const MachineBasicBlock *MBB) {
     356         715 :   if (MBB->pred_empty())
     357             :     return nullptr;
     358         340 :   const MachineLoop *CurLoop = getLoopFor(MBB);
     359             :   const MachineBasicBlock *Best = nullptr;
     360             :   unsigned BestHeight = 0;
     361         762 :   for (const MachineBasicBlock *Succ : MBB->successors()) {
     362             :     // Don't consider back-edges.
     363         649 :     if (CurLoop && Succ == CurLoop->getHeader())
     364          41 :       continue;
     365             :     // Don't consider successors exiting CurLoop.
     366         432 :     if (isExitingLoop(CurLoop, getLoopFor(Succ)))
     367          51 :       continue;
     368             :     const MachineTraceMetrics::TraceBlockInfo *SuccTBI =
     369         330 :       getHeightResources(Succ);
     370             :     // Ignore cycles that aren't natural loops.
     371         330 :     if (!SuccTBI)
     372           1 :       continue;
     373             :     // Pick the successor that would give this block the smallest InstrHeight.
     374         329 :     unsigned Height = SuccTBI->InstrHeight;
     375         329 :     if (!Best || Height < BestHeight) {
     376             :       Best = Succ;
     377             :       BestHeight = Height;
     378             :     }
     379             :   }
     380             :   return Best;
     381             : }
     382             : 
     383             : // Get an Ensemble sub-class for the requested trace strategy.
     384             : MachineTraceMetrics::Ensemble *
     385      122921 : MachineTraceMetrics::getEnsemble(MachineTraceMetrics::Strategy strategy) {
     386             :   assert(strategy < TS_NumStrategies && "Invalid trace strategy enum");
     387      122921 :   Ensemble *&E = Ensembles[strategy];
     388      122921 :   if (E)
     389             :     return E;
     390             : 
     391             :   // Allocate new Ensemble on demand.
     392      122893 :   switch (strategy) {
     393      245786 :   case TS_MinInstrCount: return (E = new MinInstrCountEnsemble(this));
     394           0 :   default: llvm_unreachable("Invalid trace strategy enum");
     395             :   }
     396             : }
     397             : 
     398         372 : void MachineTraceMetrics::invalidate(const MachineBasicBlock *MBB) {
     399             :   LLVM_DEBUG(dbgs() << "Invalidate traces through " << printMBBReference(*MBB)
     400             :                     << '\n');
     401         372 :   BlockInfo[MBB->getNumber()].invalidate();
     402         744 :   for (unsigned i = 0; i != TS_NumStrategies; ++i)
     403         372 :     if (Ensembles[i])
     404         232 :       Ensembles[i]->invalidate(MBB);
     405         372 : }
     406             : 
     407         959 : void MachineTraceMetrics::verifyAnalysis() const {
     408             :   if (!MF)
     409             :     return;
     410             : #ifndef NDEBUG
     411             :   assert(BlockInfo.size() == MF->getNumBlockIDs() && "Outdated BlockInfo size");
     412             :   for (unsigned i = 0; i != TS_NumStrategies; ++i)
     413             :     if (Ensembles[i])
     414             :       Ensembles[i]->verify();
     415             : #endif
     416             : }
     417             : 
     418             : //===----------------------------------------------------------------------===//
     419             : //                               Trace building
     420             : //===----------------------------------------------------------------------===//
     421             : //
     422             : // Traces are built by two CFG traversals. To avoid recomputing too much, use a
     423             : // set abstraction that confines the search to the current loop, and doesn't
     424             : // revisit blocks.
     425             : 
     426             : namespace {
     427             : 
     428             : struct LoopBounds {
     429             :   MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> Blocks;
     430             :   SmallPtrSet<const MachineBasicBlock*, 8> Visited;
     431             :   const MachineLoopInfo *Loops;
     432             :   bool Downward = false;
     433             : 
     434             :   LoopBounds(MutableArrayRef<MachineTraceMetrics::TraceBlockInfo> blocks,
     435        1044 :              const MachineLoopInfo *loops) : Blocks(blocks), Loops(loops) {}
     436             : };
     437             : 
     438             : } // end anonymous namespace
     439             : 
     440             : // Specialize po_iterator_storage in order to prune the post-order traversal so
     441             : // it is limited to the current loop and doesn't traverse the loop back edges.
     442             : namespace llvm {
     443             : 
     444             : template<>
     445             : class po_iterator_storage<LoopBounds, true> {
     446             :   LoopBounds &LB;
     447             : 
     448             : public:
     449        2088 :   po_iterator_storage(LoopBounds &lb) : LB(lb) {}
     450             : 
     451             :   void finishPostorder(const MachineBasicBlock*) {}
     452             : 
     453        1839 :   bool insertEdge(Optional<const MachineBasicBlock *> From,
     454             :                   const MachineBasicBlock *To) {
     455             :     // Skip already visited To blocks.
     456        1839 :     MachineTraceMetrics::TraceBlockInfo &TBI = LB.Blocks[To->getNumber()];
     457        4498 :     if (LB.Downward ? TBI.hasValidHeight() : TBI.hasValidDepth())
     458             :       return false;
     459             :     // From is null once when To is the trace center block.
     460        1454 :     if (From) {
     461         760 :       if (const MachineLoop *FromLoop = LB.Loops->getLoopFor(*From)) {
     462             :         // Don't follow backedges, don't leave FromLoop when going upwards.
     463         512 :         if ((LB.Downward ? To : *From) == FromLoop->getHeader())
     464             :           return false;
     465             :         // Don't leave FromLoop.
     466         166 :         if (isExitingLoop(FromLoop, LB.Loops->getLoopFor(To)))
     467             :           return false;
     468             :       }
     469             :     }
     470             :     // To is a new block. Mark the block as visited in case the CFG has cycles
     471             :     // that MachineLoopInfo didn't recognize as a natural loop.
     472        1330 :     return LB.Visited.insert(To).second;
     473             :   }
     474             : };
     475             : 
     476             : } // end namespace llvm
     477             : 
     478             : /// Compute the trace through MBB.
     479         522 : void MachineTraceMetrics::Ensemble::computeTrace(const MachineBasicBlock *MBB) {
     480             :   LLVM_DEBUG(dbgs() << "Computing " << getName() << " trace through "
     481             :                     << printMBBReference(*MBB) << '\n');
     482             :   // Set up loop bounds for the backwards post-order traversal.
     483         522 :   LoopBounds Bounds(BlockInfo, MTM.Loops);
     484             : 
     485             :   // Run an upwards post-order search for the trace start.
     486             :   Bounds.Downward = false;
     487         522 :   Bounds.Visited.clear();
     488        2792 :   for (auto I : inverse_post_order_ext(MBB, Bounds)) {
     489             :     LLVM_DEBUG(dbgs() << "  pred for " << printMBBReference(*I) << ": ");
     490         613 :     TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
     491             :     // All the predecessors have been visited, pick the preferred one.
     492         613 :     TBI.Pred = pickTracePred(I);
     493             :     LLVM_DEBUG({
     494             :       if (TBI.Pred)
     495             :         dbgs() << printMBBReference(*TBI.Pred) << '\n';
     496             :       else
     497             :         dbgs() << "null\n";
     498             :     });
     499             :     // The trace leading to I is now known, compute the depth resources.
     500         613 :     computeDepthResources(I);
     501             :   }
     502             : 
     503             :   // Run a downwards post-order search for the trace end.
     504         522 :   Bounds.Downward = true;
     505         522 :   Bounds.Visited.clear();
     506        2996 :   for (auto I : post_order_ext(MBB, Bounds)) {
     507             :     LLVM_DEBUG(dbgs() << "  succ for " << printMBBReference(*I) << ": ");
     508         715 :     TraceBlockInfo &TBI = BlockInfo[I->getNumber()];
     509             :     // All the successors have been visited, pick the preferred one.
     510         715 :     TBI.Succ = pickTraceSucc(I);
     511             :     LLVM_DEBUG({
     512             :       if (TBI.Succ)
     513             :         dbgs() << printMBBReference(*TBI.Succ) << '\n';
     514             :       else
     515             :         dbgs() << "null\n";
     516             :     });
     517             :     // The trace leaving I is now known, compute the height resources.
     518         715 :     computeHeightResources(I);
     519             :   }
     520         522 : }
     521             : 
     522             : /// Invalidate traces through BadMBB.
     523             : void
     524        2759 : MachineTraceMetrics::Ensemble::invalidate(const MachineBasicBlock *BadMBB) {
     525             :   SmallVector<const MachineBasicBlock*, 16> WorkList;
     526        2759 :   TraceBlockInfo &BadTBI = BlockInfo[BadMBB->getNumber()];
     527             : 
     528             :   // Invalidate height resources of blocks above MBB.
     529        2759 :   if (BadTBI.hasValidHeight()) {
     530             :     BadTBI.invalidateHeight();
     531         370 :     WorkList.push_back(BadMBB);
     532             :     do {
     533             :       const MachineBasicBlock *MBB = WorkList.pop_back_val();
     534             :       LLVM_DEBUG(dbgs() << "Invalidate " << printMBBReference(*MBB) << ' '
     535             :                         << getName() << " height.\n");
     536             :       // Find any MBB predecessors that have MBB as their preferred successor.
     537             :       // They are the only ones that need to be invalidated.
     538         572 :       for (const MachineBasicBlock *Pred : MBB->predecessors()) {
     539         159 :         TraceBlockInfo &TBI = BlockInfo[Pred->getNumber()];
     540         159 :         if (!TBI.hasValidHeight())
     541         110 :           continue;
     542          92 :         if (TBI.Succ == MBB) {
     543             :           TBI.invalidateHeight();
     544          43 :           WorkList.push_back(Pred);
     545          43 :           continue;
     546             :         }
     547             :         // Verify that TBI.Succ is actually a *I successor.
     548             :         assert((!TBI.Succ || Pred->isSuccessor(TBI.Succ)) && "CFG changed");
     549             :       }
     550         413 :     } while (!WorkList.empty());
     551             :   }
     552             : 
     553             :   // Invalidate depth resources of blocks below MBB.
     554        2759 :   if (BadTBI.hasValidDepth()) {
     555             :     BadTBI.invalidateDepth();
     556         332 :     WorkList.push_back(BadMBB);
     557             :     do {
     558             :       const MachineBasicBlock *MBB = WorkList.pop_back_val();
     559             :       LLVM_DEBUG(dbgs() << "Invalidate " << printMBBReference(*MBB) << ' '
     560             :                         << getName() << " depth.\n");
     561             :       // Find any MBB successors that have MBB as their preferred predecessor.
     562             :       // They are the only ones that need to be invalidated.
     563         575 :       for (const MachineBasicBlock *Succ : MBB->successors()) {
     564         162 :         TraceBlockInfo &TBI = BlockInfo[Succ->getNumber()];
     565         162 :         if (!TBI.hasValidDepth())
     566          71 :           continue;
     567         172 :         if (TBI.Pred == MBB) {
     568             :           TBI.invalidateDepth();
     569          81 :           WorkList.push_back(Succ);
     570          81 :           continue;
     571             :         }
     572             :         // Verify that TBI.Pred is actually a *I predecessor.
     573             :         assert((!TBI.Pred || Succ->isPredecessor(TBI.Pred)) && "CFG changed");
     574             :       }
     575         413 :     } while (!WorkList.empty());
     576             :   }
     577             : 
     578             :   // Clear any per-instruction data. We only have to do this for BadMBB itself
     579             :   // because the instructions in that block may change. Other blocks may be
     580             :   // invalidated, but their instructions will stay the same, so there is no
     581             :   // need to erase the Cycle entries. They will be overwritten when we
     582             :   // recompute.
     583      415631 :   for (const auto &I : *BadMBB)
     584      407354 :     Cycles.erase(&I);
     585        2759 : }
     586             : 
     587           0 : void MachineTraceMetrics::Ensemble::verify() const {
     588             : #ifndef NDEBUG
     589             :   assert(BlockInfo.size() == MTM.MF->getNumBlockIDs() &&
     590             :          "Outdated BlockInfo size");
     591             :   for (unsigned Num = 0, e = BlockInfo.size(); Num != e; ++Num) {
     592             :     const TraceBlockInfo &TBI = BlockInfo[Num];
     593             :     if (TBI.hasValidDepth() && TBI.Pred) {
     594             :       const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num);
     595             :       assert(MBB->isPredecessor(TBI.Pred) && "CFG doesn't match trace");
     596             :       assert(BlockInfo[TBI.Pred->getNumber()].hasValidDepth() &&
     597             :              "Trace is broken, depth should have been invalidated.");
     598             :       const MachineLoop *Loop = getLoopFor(MBB);
     599             :       assert(!(Loop && MBB == Loop->getHeader()) && "Trace contains backedge");
     600             :     }
     601             :     if (TBI.hasValidHeight() && TBI.Succ) {
     602             :       const MachineBasicBlock *MBB = MTM.MF->getBlockNumbered(Num);
     603             :       assert(MBB->isSuccessor(TBI.Succ) && "CFG doesn't match trace");
     604             :       assert(BlockInfo[TBI.Succ->getNumber()].hasValidHeight() &&
     605             :              "Trace is broken, height should have been invalidated.");
     606             :       const MachineLoop *Loop = getLoopFor(MBB);
     607             :       const MachineLoop *SuccLoop = getLoopFor(TBI.Succ);
     608             :       assert(!(Loop && Loop == SuccLoop && TBI.Succ == Loop->getHeader()) &&
     609             :              "Trace contains backedge");
     610             :     }
     611             :   }
     612             : #endif
     613           0 : }
     614             : 
     615             : //===----------------------------------------------------------------------===//
     616             : //                             Data Dependencies
     617             : //===----------------------------------------------------------------------===//
     618             : //
     619             : // Compute the depth and height of each instruction based on data dependencies
     620             : // and instruction latencies. These cycle numbers assume that the CPU can issue
     621             : // an infinite number of instructions per cycle as long as their dependencies
     622             : // are ready.
     623             : 
     624             : // A data dependency is represented as a defining MI and operand numbers on the
     625             : // defining and using MI.
     626             : namespace {
     627             : 
     628             : struct DataDep {
     629             :   const MachineInstr *DefMI;
     630             :   unsigned DefOp;
     631             :   unsigned UseOp;
     632             : 
     633             :   DataDep(const MachineInstr *DefMI, unsigned DefOp, unsigned UseOp)
     634         957 :     : DefMI(DefMI), DefOp(DefOp), UseOp(UseOp) {}
     635             : 
     636             :   /// Create a DataDep from an SSA form virtual register.
     637             :   DataDep(const MachineRegisterInfo *MRI, unsigned VirtReg, unsigned UseOp)
     638       11917 :     : UseOp(UseOp) {
     639             :     assert(TargetRegisterInfo::isVirtualRegister(VirtReg));
     640       11917 :     MachineRegisterInfo::def_iterator DefI = MRI->def_begin(VirtReg);
     641             :     assert(!DefI.atEnd() && "Register has no defs");
     642       11917 :     DefMI = DefI->getParent();
     643       11917 :     DefOp = DefI.getOperandNo();
     644             :     assert((++DefI).atEnd() && "Register has multiple defs");
     645             :   }
     646             : };
     647             : 
     648             : } // end anonymous namespace
     649             : 
     650             : // Get the input data dependencies that must be ready before UseMI can issue.
     651             : // Return true if UseMI has any physreg operands.
     652       12902 : static bool getDataDeps(const MachineInstr &UseMI,
     653             :                         SmallVectorImpl<DataDep> &Deps,
     654             :                         const MachineRegisterInfo *MRI) {
     655             :   // Debug values should not be included in any calculations.
     656             :   if (UseMI.isDebugInstr())
     657             :     return false;
     658             :   
     659             :   bool HasPhysRegs = false;
     660       49611 :   for (MachineInstr::const_mop_iterator I = UseMI.operands_begin(),
     661       62399 :        E = UseMI.operands_end(); I != E; ++I) {
     662             :     const MachineOperand &MO = *I;
     663       36823 :     if (!MO.isReg())
     664        5478 :       continue;
     665       31345 :     unsigned Reg = MO.getReg();
     666       31345 :     if (!Reg)
     667         272 :       continue;
     668       31073 :     if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
     669             :       HasPhysRegs = true;
     670        9823 :       continue;
     671             :     }
     672             :     // Collect virtual register reads.
     673             :     if (MO.readsReg())
     674       23270 :       Deps.push_back(DataDep(MRI, Reg, UseMI.getOperandNo(I)));
     675             :   }
     676             :   return HasPhysRegs;
     677             : }
     678             : 
     679             : // Get the input data dependencies of a PHI instruction, using Pred as the
     680             : // preferred predecessor.
     681             : // This will add at most one dependency to Deps.
     682         325 : static void getPHIDeps(const MachineInstr &UseMI,
     683             :                        SmallVectorImpl<DataDep> &Deps,
     684             :                        const MachineBasicBlock *Pred,
     685             :                        const MachineRegisterInfo *MRI) {
     686             :   // No predecessor at the beginning of a trace. Ignore dependencies.
     687         325 :   if (!Pred)
     688             :     return;
     689             :   assert(UseMI.isPHI() && UseMI.getNumOperands() % 2 && "Bad PHI");
     690         746 :   for (unsigned i = 1; i != UseMI.getNumOperands(); i += 2) {
     691        1028 :     if (UseMI.getOperand(i + 1).getMBB() == Pred) {
     692         282 :       unsigned Reg = UseMI.getOperand(i).getReg();
     693         564 :       Deps.push_back(DataDep(MRI, Reg, i));
     694         282 :       return;
     695             :     }
     696             :   }
     697             : }
     698             : 
     699             : // Identify physreg dependencies for UseMI, and update the live regunit
     700             : // tracking set when scanning instructions downwards.
     701        3727 : static void updatePhysDepsDownwards(const MachineInstr *UseMI,
     702             :                                     SmallVectorImpl<DataDep> &Deps,
     703             :                                     SparseSet<LiveRegUnit> &RegUnits,
     704             :                                     const TargetRegisterInfo *TRI) {
     705             :   SmallVector<unsigned, 8> Kills;
     706             :   SmallVector<unsigned, 8> LiveDefOps;
     707             : 
     708       14854 :   for (MachineInstr::const_mop_iterator MI = UseMI->operands_begin(),
     709       18581 :        ME = UseMI->operands_end(); MI != ME; ++MI) {
     710             :     const MachineOperand &MO = *MI;
     711       11127 :     if (!MO.isReg())
     712        9476 :       continue;
     713        9457 :     unsigned Reg = MO.getReg();
     714        9457 :     if (!TargetRegisterInfo::isPhysicalRegister(Reg))
     715        4173 :       continue;
     716             :     // Track live defs and kills for updating RegUnits.
     717        5284 :     if (MO.isDef()) {
     718        1962 :       if (MO.isDead())
     719         969 :         Kills.push_back(Reg);
     720             :       else
     721         993 :         LiveDefOps.push_back(UseMI->getOperandNo(MI));
     722        3322 :     } else if (MO.isKill())
     723           1 :       Kills.push_back(Reg);
     724             :     // Identify dependencies.
     725        1963 :     if (!MO.readsReg())
     726        1963 :       continue;
     727        9543 :     for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
     728             :       SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
     729        3858 :       if (I == RegUnits.end())
     730             :         continue;
     731        2871 :       Deps.push_back(DataDep(I->MI, I->Op, UseMI->getOperandNo(MI)));
     732         957 :       break;
     733             :     }
     734             :   }
     735             : 
     736             :   // Update RegUnits to reflect live registers after UseMI.
     737             :   // First kills.
     738        5667 :   for (unsigned Kill : Kills)
     739        3100 :     for (MCRegUnitIterator Units(Kill, TRI); Units.isValid(); ++Units)
     740        1160 :       RegUnits.erase(*Units);
     741             : 
     742             :   // Second, live defs.
     743        5713 :   for (unsigned DefOp : LiveDefOps) {
     744        1986 :     for (MCRegUnitIterator Units(UseMI->getOperand(DefOp).getReg(), TRI);
     745        2402 :          Units.isValid(); ++Units) {
     746             :       LiveRegUnit &LRU = RegUnits[*Units];
     747        1409 :       LRU.MI = UseMI;
     748        1409 :       LRU.Op = DefOp;
     749             :     }
     750             :   }
     751        3727 : }
     752             : 
     753             : /// The length of the critical path through a trace is the maximum of two path
     754             : /// lengths:
     755             : ///
     756             : /// 1. The maximum height+depth over all instructions in the trace center block.
     757             : ///
     758             : /// 2. The longest cross-block dependency chain. For small blocks, it is
     759             : ///    possible that the critical path through the trace doesn't include any
     760             : ///    instructions in the block.
     761             : ///
     762             : /// This function computes the second number from the live-in list of the
     763             : /// center block.
     764         524 : unsigned MachineTraceMetrics::Ensemble::
     765             : computeCrossBlockCriticalPath(const TraceBlockInfo &TBI) {
     766             :   assert(TBI.HasValidInstrDepths && "Missing depth info");
     767             :   assert(TBI.HasValidInstrHeights && "Missing height info");
     768         524 :   unsigned MaxLen = 0;
     769        4920 :   for (const LiveInReg &LIR : TBI.LiveIns) {
     770        4396 :     if (!TargetRegisterInfo::isVirtualRegister(LIR.Reg))
     771        4088 :       continue;
     772         161 :     const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
     773             :     // Ignore dependencies outside the current trace.
     774         161 :     const TraceBlockInfo &DefTBI = BlockInfo[DefMI->getParent()->getNumber()];
     775          14 :     if (!DefTBI.isUsefulDominator(TBI))
     776          14 :       continue;
     777         294 :     unsigned Len = LIR.Height + Cycles[DefMI].Depth;
     778         147 :     MaxLen = std::max(MaxLen, Len);
     779             :   }
     780         524 :   return MaxLen;
     781             : }
     782             : 
     783        6981 : void MachineTraceMetrics::Ensemble::
     784             : updateDepth(MachineTraceMetrics::TraceBlockInfo &TBI, const MachineInstr &UseMI,
     785             :             SparseSet<LiveRegUnit> &RegUnits) {
     786             :   SmallVector<DataDep, 8> Deps;
     787             :   // Collect all data dependencies.
     788             :   if (UseMI.isPHI())
     789          95 :     getPHIDeps(UseMI, Deps, TBI.Pred, MTM.MRI);
     790        6886 :   else if (getDataDeps(UseMI, Deps, MTM.MRI))
     791        3727 :     updatePhysDepsDownwards(&UseMI, Deps, RegUnits, MTM.TRI);
     792             : 
     793             :   // Filter and process dependencies, computing the earliest issue cycle.
     794        6981 :   unsigned Cycle = 0;
     795       21537 :   for (const DataDep &Dep : Deps) {
     796             :     const TraceBlockInfo&DepTBI =
     797        7278 :       BlockInfo[Dep.DefMI->getParent()->getNumber()];
     798             :     // Ignore dependencies from outside the current trace.
     799          27 :     if (!DepTBI.isUsefulDominator(TBI))
     800          27 :       continue;
     801             :     assert(DepTBI.HasValidInstrDepths && "Inconsistent dependency");
     802        7251 :     unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
     803             :     // Add latency if DefMI is a real instruction. Transients get latency 0.
     804        7251 :     if (!Dep.DefMI->isTransient())
     805        8112 :       DepCycle += MTM.SchedModel
     806        4056 :         .computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI, Dep.UseOp);
     807        7251 :     Cycle = std::max(Cycle, DepCycle);
     808             :   }
     809             :   // Remember the instruction depth.
     810       13962 :   InstrCycles &MICycles = Cycles[&UseMI];
     811        6981 :   MICycles.Depth = Cycle;
     812             : 
     813        6981 :   if (TBI.HasValidInstrHeights) {
     814             :     // Update critical path length.
     815        1484 :     TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Height);
     816             :     LLVM_DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << UseMI);
     817             :   } else {
     818             :     LLVM_DEBUG(dbgs() << Cycle << '\t' << UseMI);
     819             :   }
     820        6981 : }
     821             : 
     822         492 : void MachineTraceMetrics::Ensemble::
     823             : updateDepth(const MachineBasicBlock *MBB, const MachineInstr &UseMI,
     824             :             SparseSet<LiveRegUnit> &RegUnits) {
     825         984 :   updateDepth(BlockInfo[MBB->getNumber()], UseMI, RegUnits);
     826         492 : }
     827             : 
     828          68 : void MachineTraceMetrics::Ensemble::
     829             : updateDepths(MachineBasicBlock::iterator Start,
     830             :              MachineBasicBlock::iterator End,
     831             :              SparseSet<LiveRegUnit> &RegUnits) {
     832         334 :     for (; Start != End; Start++)
     833         266 :       updateDepth(Start->getParent(), *Start, RegUnits);
     834          68 : }
     835             : 
     836             : /// Compute instruction depths for all instructions above or in MBB in its
     837             : /// trace. This assumes that the trace through MBB has already been computed.
     838         509 : void MachineTraceMetrics::Ensemble::
     839             : computeInstrDepths(const MachineBasicBlock *MBB) {
     840             :   // The top of the trace may already be computed, and HasValidInstrDepths
     841             :   // implies Head->HasValidInstrDepths, so we only need to start from the first
     842             :   // block in the trace that needs to be recomputed.
     843             :   SmallVector<const MachineBasicBlock*, 8> Stack;
     844             :   do {
     845         681 :     TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
     846             :     assert(TBI.hasValidDepth() && "Incomplete trace");
     847         681 :     if (TBI.HasValidInstrDepths)
     848             :       break;
     849         590 :     Stack.push_back(MBB);
     850         590 :     MBB = TBI.Pred;
     851         590 :   } while (MBB);
     852             : 
     853             :   // FIXME: If MBB is non-null at this point, it is the last pre-computed block
     854             :   // in the trace. We should track any live-out physregs that were defined in
     855             :   // the trace. This is quite rare in SSA form, typically created by CSE
     856             :   // hoisting a compare.
     857         509 :   SparseSet<LiveRegUnit> RegUnits;
     858         509 :   RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
     859             : 
     860             :   // Go through trace blocks in top-down order, stopping after the center block.
     861        1689 :   while (!Stack.empty()) {
     862         590 :     MBB = Stack.pop_back_val();
     863             :     LLVM_DEBUG(dbgs() << "\nDepths for " << printMBBReference(*MBB) << ":\n");
     864         590 :     TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
     865         590 :     TBI.HasValidInstrDepths = true;
     866         590 :     TBI.CriticalPath = 0;
     867             : 
     868             :     // Print out resource depths here as well.
     869             :     LLVM_DEBUG({
     870             :       dbgs() << format("%7u Instructions\n", TBI.InstrDepth);
     871             :       ArrayRef<unsigned> PRDepths = getProcResourceDepths(MBB->getNumber());
     872             :       for (unsigned K = 0; K != PRDepths.size(); ++K)
     873             :         if (PRDepths[K]) {
     874             :           unsigned Factor = MTM.SchedModel.getResourceFactor(K);
     875             :           dbgs() << format("%6uc @ ", MTM.getCycles(PRDepths[K]))
     876             :                  << MTM.SchedModel.getProcResource(K)->Name << " ("
     877             :                  << PRDepths[K]/Factor << " ops x" << Factor << ")\n";
     878             :         }
     879             :     });
     880             : 
     881             :     // Also compute the critical path length through MBB when possible.
     882         590 :     if (TBI.HasValidInstrHeights)
     883          43 :       TBI.CriticalPath = computeCrossBlockCriticalPath(TBI);
     884             : 
     885        8259 :     for (const auto &UseMI : *MBB) {
     886        6489 :       updateDepth(TBI, UseMI, RegUnits);
     887             :     }
     888             :   }
     889         509 : }
     890             : 
     891             : // Identify physreg dependencies for MI when scanning instructions upwards.
     892             : // Return the issue height of MI after considering any live regunits.
     893             : // Height is the issue height computed from virtual register dependencies alone.
     894        3373 : static unsigned updatePhysDepsUpwards(const MachineInstr &MI, unsigned Height,
     895             :                                       SparseSet<LiveRegUnit> &RegUnits,
     896             :                                       const TargetSchedModel &SchedModel,
     897             :                                       const TargetInstrInfo *TII,
     898             :                                       const TargetRegisterInfo *TRI) {
     899             :   SmallVector<unsigned, 8> ReadOps;
     900             : 
     901       12982 :   for (MachineInstr::const_mop_iterator MOI = MI.operands_begin(),
     902        3373 :                                         MOE = MI.operands_end();
     903       12982 :        MOI != MOE; ++MOI) {
     904             :     const MachineOperand &MO = *MOI;
     905        9609 :     if (!MO.isReg())
     906             :       continue;
     907        8243 :     unsigned Reg = MO.getReg();
     908        8243 :     if (!TargetRegisterInfo::isPhysicalRegister(Reg))
     909             :       continue;
     910             :     if (MO.readsReg())
     911        3004 :       ReadOps.push_back(MI.getOperandNo(MOI));
     912        4539 :     if (!MO.isDef())
     913             :       continue;
     914             :     // This is a def of Reg. Remove corresponding entries from RegUnits, and
     915             :     // update MI Height to consider the physreg dependencies.
     916        5018 :     for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
     917             :       SparseSet<LiveRegUnit>::iterator I = RegUnits.find(*Units);
     918        1950 :       if (I == RegUnits.end())
     919         473 :         continue;
     920        1477 :       unsigned DepHeight = I->Cycle;
     921             :       if (!MI.isTransient()) {
     922             :         // We may not know the UseMI of this dependency, if it came from the
     923             :         // live-in list. SchedModel can handle a NULL UseMI.
     924        1708 :         DepHeight += SchedModel.computeOperandLatency(&MI, MI.getOperandNo(MOI),
     925             :                                                       I->MI, I->Op);
     926             :       }
     927        1477 :       Height = std::max(Height, DepHeight);
     928             :       // This regunit is dead above MI.
     929             :       RegUnits.erase(I);
     930             :     }
     931             :   }
     932             : 
     933             :   // Now we know the height of MI. Update any regunits read.
     934        6377 :   for (unsigned i = 0, e = ReadOps.size(); i != e; ++i) {
     935        9012 :     unsigned Reg = MI.getOperand(ReadOps[i]).getReg();
     936        9765 :     for (MCRegUnitIterator Units(Reg, TRI); Units.isValid(); ++Units) {
     937             :       LiveRegUnit &LRU = RegUnits[*Units];
     938             :       // Set the height to the highest reader of the unit.
     939        3757 :       if (LRU.Cycle <= Height && LRU.MI != &MI) {
     940        3749 :         LRU.Cycle = Height;
     941        3749 :         LRU.MI = &MI;
     942        3749 :         LRU.Op = ReadOps[i];
     943             :       }
     944             :     }
     945             :   }
     946             : 
     947        6746 :   return Height;
     948             : }
     949             : 
     950             : using MIHeightMap = DenseMap<const MachineInstr *, unsigned>;
     951             : 
     952             : // Push the height of DefMI upwards if required to match UseMI.
     953             : // Return true if this is the first time DefMI was seen.
     954        5499 : static bool pushDepHeight(const DataDep &Dep, const MachineInstr &UseMI,
     955             :                           unsigned UseHeight, MIHeightMap &Heights,
     956             :                           const TargetSchedModel &SchedModel,
     957             :                           const TargetInstrInfo *TII) {
     958             :   // Adjust height by Dep.DefMI latency.
     959        5499 :   if (!Dep.DefMI->isTransient())
     960        3092 :     UseHeight += SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp, &UseMI,
     961        3092 :                                                   Dep.UseOp);
     962             : 
     963             :   // Update Heights[DefMI] to be the maximum height seen.
     964             :   MIHeightMap::iterator I;
     965             :   bool New;
     966       10998 :   std::tie(I, New) = Heights.insert(std::make_pair(Dep.DefMI, UseHeight));
     967        5499 :   if (New)
     968             :     return true;
     969             : 
     970             :   // DefMI has been pushed before. Give it the max height.
     971         897 :   if (I->second < UseHeight)
     972         357 :     I->second = UseHeight;
     973             :   return false;
     974             : }
     975             : 
     976             : /// Assuming that the virtual register defined by DefMI:DefOp was used by
     977             : /// Trace.back(), add it to the live-in lists of all the blocks in Trace. Stop
     978             : /// when reaching the block that contains DefMI.
     979        4602 : void MachineTraceMetrics::Ensemble::
     980             : addLiveIns(const MachineInstr *DefMI, unsigned DefOp,
     981             :            ArrayRef<const MachineBasicBlock*> Trace) {
     982             :   assert(!Trace.empty() && "Trace should contain at least one block");
     983        9204 :   unsigned Reg = DefMI->getOperand(DefOp).getReg();
     984             :   assert(TargetRegisterInfo::isVirtualRegister(Reg));
     985        4602 :   const MachineBasicBlock *DefMBB = DefMI->getParent();
     986             : 
     987             :   // Reg is live-in to all blocks in Trace that follow DefMBB.
     988        4784 :   for (unsigned i = Trace.size(); i; --i) {
     989        9284 :     const MachineBasicBlock *MBB = Trace[i-1];
     990        4642 :     if (MBB == DefMBB)
     991             :       return;
     992         182 :     TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
     993             :     // Just add the register. The height will be updated later.
     994         364 :     TBI.LiveIns.push_back(Reg);
     995             :   }
     996             : }
     997             : 
     998             : /// Compute instruction heights in the trace through MBB. This updates MBB and
     999             : /// the blocks below it in the trace. It is assumed that the trace has already
    1000             : /// been computed.
    1001         481 : void MachineTraceMetrics::Ensemble::
    1002             : computeInstrHeights(const MachineBasicBlock *MBB) {
    1003             :   // The bottom of the trace may already be computed.
    1004             :   // Find the blocks that need updating.
    1005             :   SmallVector<const MachineBasicBlock*, 8> Stack;
    1006             :   do {
    1007         585 :     TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
    1008             :     assert(TBI.hasValidHeight() && "Incomplete trace");
    1009         585 :     if (TBI.HasValidInstrHeights)
    1010             :       break;
    1011         560 :     Stack.push_back(MBB);
    1012             :     TBI.LiveIns.clear();
    1013         560 :     MBB = TBI.Succ;
    1014         560 :   } while (MBB);
    1015             : 
    1016             :   // As we move upwards in the trace, keep track of instructions that are
    1017             :   // required by deeper trace instructions. Map MI -> height required so far.
    1018             :   MIHeightMap Heights;
    1019             : 
    1020             :   // For physregs, the def isn't known when we see the use.
    1021             :   // Instead, keep track of the highest use of each regunit.
    1022         481 :   SparseSet<LiveRegUnit> RegUnits;
    1023         481 :   RegUnits.setUniverse(MTM.TRI->getNumRegUnits());
    1024             : 
    1025             :   // If the bottom of the trace was already precomputed, initialize heights
    1026             :   // from its live-in list.
    1027             :   // MBB is the highest precomputed block in the trace.
    1028         481 :   if (MBB) {
    1029          25 :     TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
    1030         113 :     for (LiveInReg &LI : TBI.LiveIns) {
    1031          88 :       if (TargetRegisterInfo::isVirtualRegister(LI.Reg)) {
    1032             :         // For virtual registers, the def latency is included.
    1033          44 :         unsigned &Height = Heights[MTM.MRI->getVRegDef(LI.Reg)];
    1034          22 :         if (Height < LI.Height)
    1035          16 :           Height = LI.Height;
    1036             :       } else {
    1037             :         // For register units, the def latency is not included because we don't
    1038             :         // know the def yet.
    1039          22 :         RegUnits[LI.Reg].Cycle = LI.Height;
    1040             :       }
    1041             :     }
    1042             :   }
    1043             : 
    1044             :   // Go through the trace blocks in bottom-up order.
    1045             :   SmallVector<DataDep, 8> Deps;
    1046        1041 :   for (;!Stack.empty(); Stack.pop_back()) {
    1047         560 :     MBB = Stack.back();
    1048             :     LLVM_DEBUG(dbgs() << "Heights for " << printMBBReference(*MBB) << ":\n");
    1049         560 :     TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
    1050         560 :     TBI.HasValidInstrHeights = true;
    1051         560 :     TBI.CriticalPath = 0;
    1052             : 
    1053             :     LLVM_DEBUG({
    1054             :       dbgs() << format("%7u Instructions\n", TBI.InstrHeight);
    1055             :       ArrayRef<unsigned> PRHeights = getProcResourceHeights(MBB->getNumber());
    1056             :       for (unsigned K = 0; K != PRHeights.size(); ++K)
    1057             :         if (PRHeights[K]) {
    1058             :           unsigned Factor = MTM.SchedModel.getResourceFactor(K);
    1059             :           dbgs() << format("%6uc @ ", MTM.getCycles(PRHeights[K]))
    1060             :                  << MTM.SchedModel.getProcResource(K)->Name << " ("
    1061             :                  << PRHeights[K]/Factor << " ops x" << Factor << ")\n";
    1062             :         }
    1063             :     });
    1064             : 
    1065             :     // Get dependencies from PHIs in the trace successor.
    1066         560 :     const MachineBasicBlock *Succ = TBI.Succ;
    1067             :     // If MBB is the last block in the trace, and it has a back-edge to the
    1068             :     // loop header, get loop-carried dependencies from PHIs in the header. For
    1069             :     // that purpose, pretend that all the loop header PHIs have height 0.
    1070         560 :     if (!Succ)
    1071         456 :       if (const MachineLoop *Loop = getLoopFor(MBB))
    1072          48 :         if (MBB->isSuccessor(Loop->getHeader()))
    1073             :           Succ = Loop->getHeader();
    1074             : 
    1075         560 :     if (Succ) {
    1076         389 :       for (const auto &PHI : *Succ) {
    1077             :         if (!PHI.isPHI())
    1078             :           break;
    1079             :         Deps.clear();
    1080         133 :         getPHIDeps(PHI, Deps, MBB, MTM.MRI);
    1081         133 :         if (!Deps.empty()) {
    1082             :           // Loop header PHI heights are all 0.
    1083         133 :           unsigned Height = TBI.Succ ? Cycles.lookup(&PHI).Height : 0;
    1084             :           LLVM_DEBUG(dbgs() << "pred\t" << Height << '\t' << PHI);
    1085         133 :           if (pushDepHeight(Deps.front(), PHI, Height, Heights, MTM.SchedModel,
    1086         133 :                             MTM.TII))
    1087         124 :             addLiveIns(Deps.front().DefMI, Deps.front().DefOp, Stack);
    1088             :         }
    1089             :       }
    1090             :     }
    1091             : 
    1092             :     // Go through the block backwards.
    1093        1120 :     for (MachineBasicBlock::const_iterator BI = MBB->end(), BB = MBB->begin();
    1094        6673 :          BI != BB;) {
    1095             :       const MachineInstr &MI = *--BI;
    1096             : 
    1097             :       // Find the MI height as determined by virtual register uses in the
    1098             :       // trace below.
    1099             :       unsigned Cycle = 0;
    1100        6113 :       MIHeightMap::iterator HeightI = Heights.find(&MI);
    1101        6113 :       if (HeightI != Heights.end()) {
    1102        4464 :         Cycle = HeightI->second;
    1103             :         // We won't be seeing any more MI uses.
    1104             :         Heights.erase(HeightI);
    1105             :       }
    1106             : 
    1107             :       // Don't process PHI deps. They depend on the specific predecessor, and
    1108             :       // we'll get them when visiting the predecessor.
    1109             :       Deps.clear();
    1110        6016 :       bool HasPhysRegs = !MI.isPHI() && getDataDeps(MI, Deps, MTM.MRI);
    1111             : 
    1112             :       // There may also be regunit dependencies to include in the height.
    1113             :       if (HasPhysRegs)
    1114        3373 :         Cycle = updatePhysDepsUpwards(MI, Cycle, RegUnits, MTM.SchedModel,
    1115        3373 :                                       MTM.TII, MTM.TRI);
    1116             : 
    1117             :       // Update the required height of any virtual registers read by MI.
    1118       16845 :       for (const DataDep &Dep : Deps)
    1119        5366 :         if (pushDepHeight(Dep, MI, Cycle, Heights, MTM.SchedModel, MTM.TII))
    1120        4478 :           addLiveIns(Dep.DefMI, Dep.DefOp, Stack);
    1121             : 
    1122       12226 :       InstrCycles &MICycles = Cycles[&MI];
    1123        6113 :       MICycles.Height = Cycle;
    1124        6113 :       if (!TBI.HasValidInstrDepths) {
    1125             :         LLVM_DEBUG(dbgs() << Cycle << '\t' << MI);
    1126         384 :         continue;
    1127             :       }
    1128             :       // Update critical path length.
    1129       11458 :       TBI.CriticalPath = std::max(TBI.CriticalPath, Cycle + MICycles.Depth);
    1130             :       LLVM_DEBUG(dbgs() << TBI.CriticalPath << '\t' << Cycle << '\t' << MI);
    1131             :     }
    1132             : 
    1133             :     // Update virtual live-in heights. They were added by addLiveIns() with a 0
    1134             :     // height because the final height isn't known until now.
    1135             :     LLVM_DEBUG(dbgs() << printMBBReference(*MBB) << " Live-ins:");
    1136         924 :     for (LiveInReg &LIR : TBI.LiveIns) {
    1137         182 :       const MachineInstr *DefMI = MTM.MRI->getVRegDef(LIR.Reg);
    1138         182 :       LIR.Height = Heights.lookup(DefMI);
    1139             :       LLVM_DEBUG(dbgs() << ' ' << printReg(LIR.Reg) << '@' << LIR.Height);
    1140             :     }
    1141             : 
    1142             :     // Transfer the live regunits to the live-in list.
    1143        2058 :     for (SparseSet<LiveRegUnit>::const_iterator
    1144        2618 :          RI = RegUnits.begin(), RE = RegUnits.end(); RI != RE; ++RI) {
    1145        4116 :       TBI.LiveIns.push_back(LiveInReg(RI->RegUnit, RI->Cycle));
    1146             :       LLVM_DEBUG(dbgs() << ' ' << printRegUnit(RI->RegUnit, MTM.TRI) << '@'
    1147             :                         << RI->Cycle);
    1148             :     }
    1149             :     LLVM_DEBUG(dbgs() << '\n');
    1150             : 
    1151         560 :     if (!TBI.HasValidInstrDepths)
    1152          79 :       continue;
    1153             :     // Add live-ins to the critical path length.
    1154         481 :     TBI.CriticalPath = std::max(TBI.CriticalPath,
    1155         962 :                                 computeCrossBlockCriticalPath(TBI));
    1156             :     LLVM_DEBUG(dbgs() << "Critical path: " << TBI.CriticalPath << '\n');
    1157             :   }
    1158         481 : }
    1159             : 
    1160             : MachineTraceMetrics::Trace
    1161        1395 : MachineTraceMetrics::Ensemble::getTrace(const MachineBasicBlock *MBB) {
    1162        1395 :   TraceBlockInfo &TBI = BlockInfo[MBB->getNumber()];
    1163             : 
    1164        1395 :   if (!TBI.hasValidDepth() || !TBI.hasValidHeight())
    1165         522 :     computeTrace(MBB);
    1166        1395 :   if (!TBI.HasValidInstrDepths)
    1167         509 :     computeInstrDepths(MBB);
    1168        1395 :   if (!TBI.HasValidInstrHeights)
    1169         481 :     computeInstrHeights(MBB);
    1170             :   
    1171        1395 :   return Trace(*this, TBI);
    1172             : }
    1173             : 
    1174             : unsigned
    1175          91 : MachineTraceMetrics::Trace::getInstrSlack(const MachineInstr &MI) const {
    1176             :   assert(getBlockNum() == unsigned(MI.getParent()->getNumber()) &&
    1177             :          "MI must be in the trace center block");
    1178          91 :   InstrCycles Cyc = getInstrCycles(MI);
    1179         182 :   return getCriticalPath() - (Cyc.Depth + Cyc.Height);
    1180             : }
    1181             : 
    1182             : unsigned
    1183          97 : MachineTraceMetrics::Trace::getPHIDepth(const MachineInstr &PHI) const {
    1184          97 :   const MachineBasicBlock *MBB = TE.MTM.MF->getBlockNumbered(getBlockNum());
    1185             :   SmallVector<DataDep, 1> Deps;
    1186          97 :   getPHIDeps(PHI, Deps, MBB, TE.MTM.MRI);
    1187             :   assert(Deps.size() == 1 && "PHI doesn't have MBB as a predecessor");
    1188          97 :   DataDep &Dep = Deps.front();
    1189          97 :   unsigned DepCycle = getInstrCycles(*Dep.DefMI).Depth;
    1190             :   // Add latency if DefMI is a real instruction. Transients get latency 0.
    1191          97 :   if (!Dep.DefMI->isTransient())
    1192          44 :     DepCycle += TE.MTM.SchedModel.computeOperandLatency(Dep.DefMI, Dep.DefOp,
    1193             :                                                         &PHI, Dep.UseOp);
    1194          97 :   return DepCycle;
    1195             : }
    1196             : 
    1197             : /// When bottom is set include instructions in current block in estimate.
    1198          19 : unsigned MachineTraceMetrics::Trace::getResourceDepth(bool Bottom) const {
    1199             :   // Find the limiting processor resource.
    1200             :   // Numbers have been pre-scaled to be comparable.
    1201          19 :   unsigned PRMax = 0;
    1202          38 :   ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum());
    1203          19 :   if (Bottom) {
    1204          38 :     ArrayRef<unsigned> PRCycles = TE.MTM.getProcResourceCycles(getBlockNum());
    1205          55 :     for (unsigned K = 0; K != PRDepths.size(); ++K)
    1206          54 :       PRMax = std::max(PRMax, PRDepths[K] + PRCycles[K]);
    1207             :   } else {
    1208           0 :     for (unsigned K = 0; K != PRDepths.size(); ++K)
    1209           0 :       PRMax = std::max(PRMax, PRDepths[K]);
    1210             :   }
    1211             :   // Convert to cycle count.
    1212          38 :   PRMax = TE.MTM.getCycles(PRMax);
    1213             : 
    1214             :   /// All instructions before current block
    1215          19 :   unsigned Instrs = TBI.InstrDepth;
    1216             :   // plus instructions in current block
    1217          19 :   if (Bottom)
    1218          38 :     Instrs += TE.MTM.BlockInfo[getBlockNum()].InstrCount;
    1219          19 :   if (unsigned IW = TE.MTM.SchedModel.getIssueWidth())
    1220          19 :     Instrs /= IW;
    1221             :   // Assume issue width 1 without a schedule model.
    1222          19 :   return std::max(Instrs, PRMax);
    1223             : }
    1224             : 
    1225         668 : unsigned MachineTraceMetrics::Trace::getResourceLength(
    1226             :     ArrayRef<const MachineBasicBlock *> Extrablocks,
    1227             :     ArrayRef<const MCSchedClassDesc *> ExtraInstrs,
    1228             :     ArrayRef<const MCSchedClassDesc *> RemoveInstrs) const {
    1229             :   // Add up resources above and below the center block.
    1230        1336 :   ArrayRef<unsigned> PRDepths = TE.getProcResourceDepths(getBlockNum());
    1231        1336 :   ArrayRef<unsigned> PRHeights = TE.getProcResourceHeights(getBlockNum());
    1232         668 :   unsigned PRMax = 0;
    1233             : 
    1234             :   // Capture computing cycles from extra instructions
    1235             :   auto extraCycles = [this](ArrayRef<const MCSchedClassDesc *> Instrs,
    1236             :                             unsigned ResourceIdx)
    1237       33285 :                          ->unsigned {
    1238             :     unsigned Cycles = 0;
    1239       49260 :     for (const MCSchedClassDesc *SC : Instrs) {
    1240       15975 :       if (!SC->isValid())
    1241           0 :         continue;
    1242       53450 :       for (TargetSchedModel::ProcResIter
    1243       15975 :                PI = TE.MTM.SchedModel.getWriteProcResBegin(SC),
    1244             :                PE = TE.MTM.SchedModel.getWriteProcResEnd(SC);
    1245       69425 :            PI != PE; ++PI) {
    1246       53450 :         if (PI->ProcResourceIdx != ResourceIdx)
    1247       49503 :           continue;
    1248        3947 :         Cycles +=
    1249        7894 :             (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(ResourceIdx));
    1250             :       }
    1251             :     }
    1252       17310 :     return Cycles;
    1253         668 :   };
    1254             : 
    1255       17978 :   for (unsigned K = 0; K != PRDepths.size(); ++K) {
    1256       25965 :     unsigned PRCycles = PRDepths[K] + PRHeights[K];
    1257       24977 :     for (const MachineBasicBlock *MBB : Extrablocks)
    1258       16322 :       PRCycles += TE.MTM.getProcResourceCycles(MBB->getNumber())[K];
    1259        8655 :     PRCycles += extraCycles(ExtraInstrs, K);
    1260        8655 :     PRCycles -= extraCycles(RemoveInstrs, K);
    1261        8655 :     PRMax = std::max(PRMax, PRCycles);
    1262             :   }
    1263             :   // Convert to cycle count.
    1264        1336 :   PRMax = TE.MTM.getCycles(PRMax);
    1265             : 
    1266             :   // Instrs: #instructions in current trace outside current block.
    1267         668 :   unsigned Instrs = TBI.InstrDepth + TBI.InstrHeight;
    1268             :   // Add instruction count from the extra blocks.
    1269        1868 :   for (const MachineBasicBlock *MBB : Extrablocks)
    1270         600 :     Instrs += TE.MTM.getResources(MBB)->InstrCount;
    1271         668 :   Instrs += ExtraInstrs.size();
    1272         668 :   Instrs -= RemoveInstrs.size();
    1273         668 :   if (unsigned IW = TE.MTM.SchedModel.getIssueWidth())
    1274         668 :     Instrs /= IW;
    1275             :   // Assume issue width 1 without a schedule model.
    1276         668 :   return std::max(Instrs, PRMax);
    1277             : }
    1278             : 
    1279         400 : bool MachineTraceMetrics::Trace::isDepInTrace(const MachineInstr &DefMI,
    1280             :                                               const MachineInstr &UseMI) const {
    1281         400 :   if (DefMI.getParent() == UseMI.getParent())
    1282             :     return true;
    1283             : 
    1284           1 :   const TraceBlockInfo &DepTBI = TE.BlockInfo[DefMI.getParent()->getNumber()];
    1285           1 :   const TraceBlockInfo &TBI = TE.BlockInfo[UseMI.getParent()->getNumber()];
    1286             : 
    1287             :   return DepTBI.isUsefulDominator(TBI);
    1288             : }
    1289             : 
    1290           0 : void MachineTraceMetrics::Ensemble::print(raw_ostream &OS) const {
    1291           0 :   OS << getName() << " ensemble:\n";
    1292           0 :   for (unsigned i = 0, e = BlockInfo.size(); i != e; ++i) {
    1293           0 :     OS << "  %bb." << i << '\t';
    1294           0 :     BlockInfo[i].print(OS);
    1295             :     OS << '\n';
    1296             :   }
    1297           0 : }
    1298             : 
    1299           0 : void MachineTraceMetrics::TraceBlockInfo::print(raw_ostream &OS) const {
    1300           0 :   if (hasValidDepth()) {
    1301           0 :     OS << "depth=" << InstrDepth;
    1302           0 :     if (Pred)
    1303           0 :       OS << " pred=" << printMBBReference(*Pred);
    1304             :     else
    1305           0 :       OS << " pred=null";
    1306           0 :     OS << " head=%bb." << Head;
    1307           0 :     if (HasValidInstrDepths)
    1308           0 :       OS << " +instrs";
    1309             :   } else
    1310           0 :     OS << "depth invalid";
    1311           0 :   OS << ", ";
    1312           0 :   if (hasValidHeight()) {
    1313           0 :     OS << "height=" << InstrHeight;
    1314           0 :     if (Succ)
    1315           0 :       OS << " succ=" << printMBBReference(*Succ);
    1316             :     else
    1317           0 :       OS << " succ=null";
    1318           0 :     OS << " tail=%bb." << Tail;
    1319           0 :     if (HasValidInstrHeights)
    1320           0 :       OS << " +instrs";
    1321             :   } else
    1322           0 :     OS << "height invalid";
    1323           0 :   if (HasValidInstrDepths && HasValidInstrHeights)
    1324           0 :     OS << ", crit=" << CriticalPath;
    1325           0 : }
    1326             : 
    1327           0 : void MachineTraceMetrics::Trace::print(raw_ostream &OS) const {
    1328           0 :   unsigned MBBNum = &TBI - &TE.BlockInfo[0];
    1329             : 
    1330           0 :   OS << TE.getName() << " trace %bb." << TBI.Head << " --> %bb." << MBBNum
    1331           0 :      << " --> %bb." << TBI.Tail << ':';
    1332           0 :   if (TBI.hasValidHeight() && TBI.hasValidDepth())
    1333           0 :     OS << ' ' << getInstrCount() << " instrs.";
    1334           0 :   if (TBI.HasValidInstrDepths && TBI.HasValidInstrHeights)
    1335           0 :     OS << ' ' << TBI.CriticalPath << " cycles.";
    1336             : 
    1337           0 :   const MachineTraceMetrics::TraceBlockInfo *Block = &TBI;
    1338           0 :   OS << "\n%bb." << MBBNum;
    1339           0 :   while (Block->hasValidDepth() && Block->Pred) {
    1340           0 :     unsigned Num = Block->Pred->getNumber();
    1341           0 :     OS << " <- " << printMBBReference(*Block->Pred);
    1342           0 :     Block = &TE.BlockInfo[Num];
    1343             :   }
    1344             : 
    1345           0 :   Block = &TBI;
    1346           0 :   OS << "\n    ";
    1347           0 :   while (Block->hasValidHeight() && Block->Succ) {
    1348           0 :     unsigned Num = Block->Succ->getNumber();
    1349           0 :     OS << " -> " << printMBBReference(*Block->Succ);
    1350           0 :     Block = &TE.BlockInfo[Num];
    1351             :   }
    1352             :   OS << '\n';
    1353           0 : }

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