LCOV - code coverage report
Current view: top level - lib/CodeGen - RegUsageInfoCollector.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 45 45 100.0 %
Date: 2017-09-14 15:23:50 Functions: 8 9 88.9 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- RegUsageInfoCollector.cpp - Register Usage Information Collector --===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : ///
      10             : /// This pass is required to take advantage of the interprocedural register
      11             : /// allocation infrastructure.
      12             : ///
      13             : /// This pass is simple MachineFunction pass which collects register usage
      14             : /// details by iterating through each physical registers and checking
      15             : /// MRI::isPhysRegUsed() then creates a RegMask based on this details.
      16             : /// The pass then stores this RegMask in PhysicalRegisterUsageInfo.cpp
      17             : ///
      18             : //===----------------------------------------------------------------------===//
      19             : 
      20             : #include "llvm/ADT/Statistic.h"
      21             : #include "llvm/CodeGen/MachineBasicBlock.h"
      22             : #include "llvm/CodeGen/MachineFunctionPass.h"
      23             : #include "llvm/CodeGen/MachineInstr.h"
      24             : #include "llvm/CodeGen/MachineOperand.h"
      25             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      26             : #include "llvm/CodeGen/Passes.h"
      27             : #include "llvm/CodeGen/RegisterUsageInfo.h"
      28             : #include "llvm/Support/Debug.h"
      29             : #include "llvm/Support/raw_ostream.h"
      30             : #include "llvm/Target/TargetFrameLowering.h"
      31             : 
      32             : using namespace llvm;
      33             : 
      34             : #define DEBUG_TYPE "ip-regalloc"
      35             : 
      36             : STATISTIC(NumCSROpt,
      37             :           "Number of functions optimized for callee saved registers");
      38             : 
      39             : namespace llvm {
      40             : void initializeRegUsageInfoCollectorPass(PassRegistry &);
      41             : }
      42             : 
      43             : namespace {
      44           6 : class RegUsageInfoCollector : public MachineFunctionPass {
      45             : public:
      46           6 :   RegUsageInfoCollector() : MachineFunctionPass(ID) {
      47           6 :     PassRegistry &Registry = *PassRegistry::getPassRegistry();
      48           6 :     initializeRegUsageInfoCollectorPass(Registry);
      49           6 :   }
      50             : 
      51           6 :   StringRef getPassName() const override {
      52           6 :     return "Register Usage Information Collector Pass";
      53             :   }
      54             : 
      55             :   void getAnalysisUsage(AnalysisUsage &AU) const override;
      56             : 
      57             :   bool runOnMachineFunction(MachineFunction &MF) override;
      58             : 
      59             :   static char ID;
      60             : };
      61             : } // end of anonymous namespace
      62             : 
      63             : char RegUsageInfoCollector::ID = 0;
      64             : 
      65           6 : INITIALIZE_PASS_BEGIN(RegUsageInfoCollector, "RegUsageInfoCollector",
      66             :                       "Register Usage Information Collector", false, false)
      67           6 : INITIALIZE_PASS_DEPENDENCY(PhysicalRegisterUsageInfo)
      68          30 : INITIALIZE_PASS_END(RegUsageInfoCollector, "RegUsageInfoCollector",
      69             :                     "Register Usage Information Collector", false, false)
      70             : 
      71           6 : FunctionPass *llvm::createRegUsageInfoCollector() {
      72           6 :   return new RegUsageInfoCollector();
      73             : }
      74             : 
      75           6 : void RegUsageInfoCollector::getAnalysisUsage(AnalysisUsage &AU) const {
      76           6 :   AU.addRequired<PhysicalRegisterUsageInfo>();
      77           6 :   AU.setPreservesAll();
      78           6 :   MachineFunctionPass::getAnalysisUsage(AU);
      79           6 : }
      80             : 
      81          15 : bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) {
      82          15 :   MachineRegisterInfo *MRI = &MF.getRegInfo();
      83          15 :   const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
      84          15 :   const TargetMachine &TM = MF.getTarget();
      85             : 
      86             :   DEBUG(dbgs() << " -------------------- " << getPassName()
      87             :                << " -------------------- \n");
      88             :   DEBUG(dbgs() << "Function Name : " << MF.getName() << "\n");
      89             : 
      90          30 :   std::vector<uint32_t> RegMask;
      91             : 
      92             :   // Compute the size of the bit vector to represent all the registers.
      93             :   // The bit vector is broken into 32-bit chunks, thus takes the ceil of
      94             :   // the number of registers divided by 32 for the size.
      95          15 :   unsigned RegMaskSize = (TRI->getNumRegs() + 31) / 32;
      96          15 :   RegMask.resize(RegMaskSize, 0xFFFFFFFF);
      97             : 
      98          15 :   const Function *F = MF.getFunction();
      99             : 
     100          15 :   PhysicalRegisterUsageInfo *PRUI = &getAnalysis<PhysicalRegisterUsageInfo>();
     101             : 
     102          30 :   PRUI->setTargetMachine(&TM);
     103             : 
     104             :   DEBUG(dbgs() << "Clobbered Registers: ");
     105             : 
     106          15 :   const BitVector &UsedPhysRegsMask = MRI->getUsedPhysRegsMask();
     107             :   auto SetRegAsDefined = [&RegMask] (unsigned Reg) {
     108        1994 :     RegMask[Reg / 32] &= ~(1u << Reg % 32);
     109          15 :   };
     110             :   // Scan all the physical registers. When a register is defined in the current
     111             :   // function set it and all the aliasing registers as defined in the regmask.
     112       23004 :   for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
     113             :     // If a register is in the UsedPhysRegsMask set then mark it as defined.
     114             :     // All it's aliases will also be in the set, so we can skip setting
     115             :     // as defined all the aliases here.
     116       23405 :     if (UsedPhysRegsMask.test(PReg)) {
     117         416 :       SetRegAsDefined(PReg);
     118         416 :       continue;
     119             :     }
     120             :     // If a register is defined by an instruction mark it as defined together
     121             :     // with all it's aliases.
     122       22573 :     if (!MRI->def_empty(PReg)) {
     123        1270 :       for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI)
     124        1162 :         SetRegAsDefined(*AI);
     125             :     }
     126             :   }
     127             : 
     128          15 :   if (!TargetFrameLowering::isSafeForNoCSROpt(F)) {
     129             :     const uint32_t *CallPreservedMask =
     130          28 :         TRI->getCallPreservedMask(MF, F->getCallingConv());
     131          14 :     if (CallPreservedMask) {
     132             :       // Set callee saved register as preserved.
     133        1012 :       for (unsigned i = 0; i < RegMaskSize; ++i)
     134        1000 :         RegMask[i] = RegMask[i] | CallPreservedMask[i];
     135             :     }
     136             :   } else {
     137             :     ++NumCSROpt;
     138             :     DEBUG(dbgs() << MF.getName()
     139             :                  << " function optimized for not having CSR.\n");
     140             :   }
     141             : 
     142          15 :   for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg)
     143             :     if (MachineOperand::clobbersPhysReg(&(RegMask[0]), PReg))
     144             :       DEBUG(dbgs() << TRI->getName(PReg) << " ");
     145             : 
     146             :   DEBUG(dbgs() << " \n----------------------------------------\n");
     147             : 
     148          45 :   PRUI->storeUpdateRegUsageInfo(F, std::move(RegMask));
     149             : 
     150          30 :   return false;
     151             : }

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