LCOV - code coverage report
Current view: top level - lib/CodeGen - RegisterUsageInfo.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 36 37 97.3 %
Date: 2017-09-14 15:23:50 Functions: 10 11 90.9 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- RegisterUsageInfo.cpp - Register Usage Information Storage ---------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : ///
      10             : /// This pass is required to take advantage of the interprocedural register
      11             : /// allocation infrastructure.
      12             : ///
      13             : //===----------------------------------------------------------------------===//
      14             : 
      15             : #include "llvm/ADT/SmallVector.h"
      16             : #include "llvm/CodeGen/RegisterUsageInfo.h"
      17             : #include "llvm/CodeGen/MachineOperand.h"
      18             : #include "llvm/IR/Function.h"
      19             : #include "llvm/IR/Module.h"
      20             : #include "llvm/Pass.h"
      21             : #include "llvm/Support/CommandLine.h"
      22             : #include "llvm/Support/raw_ostream.h"
      23             : #include "llvm/Target/TargetMachine.h"
      24             : #include "llvm/Target/TargetRegisterInfo.h"
      25             : #include "llvm/Target/TargetSubtargetInfo.h"
      26             : #include <algorithm>
      27             : #include <cassert>
      28             : #include <cstdint>
      29             : #include <utility>
      30             : #include <vector>
      31             : 
      32             : using namespace llvm;
      33             : 
      34             : #define DEBUG_TYPE "ip-regalloc"
      35             : 
      36       72306 : static cl::opt<bool> DumpRegUsage(
      37      216918 :     "print-regusage", cl::init(false), cl::Hidden,
      38      289224 :     cl::desc("print register usage details collected for analysis."));
      39             : 
      40          66 : INITIALIZE_PASS(PhysicalRegisterUsageInfo, "reg-usage-info",
      41             :                 "Register Usage Information Storage", false, true)
      42             : 
      43             : char PhysicalRegisterUsageInfo::ID = 0;
      44             : 
      45           0 : void PhysicalRegisterUsageInfo::anchor() {}
      46             : 
      47           6 : bool PhysicalRegisterUsageInfo::doInitialization(Module &M) {
      48          12 :   RegMasks.grow(M.size());
      49           6 :   return false;
      50             : }
      51             : 
      52           6 : bool PhysicalRegisterUsageInfo::doFinalization(Module &M) {
      53           6 :   if (DumpRegUsage)
      54           3 :     print(errs());
      55             : 
      56           6 :   RegMasks.shrink_and_clear();
      57           6 :   return false;
      58             : }
      59             : 
      60          15 : void PhysicalRegisterUsageInfo::storeUpdateRegUsageInfo(
      61             :     const Function *FP, std::vector<uint32_t> RegMask) {
      62             :   assert(FP != nullptr && "Function * can't be nullptr.");
      63          45 :   RegMasks[FP] = std::move(RegMask);
      64          15 : }
      65             : 
      66             : const std::vector<uint32_t> *
      67          10 : PhysicalRegisterUsageInfo::getRegUsageInfo(const Function *FP) {
      68          10 :   auto It = RegMasks.find(FP);
      69          30 :   if (It != RegMasks.end())
      70           8 :     return &(It->second);
      71             :   return nullptr;
      72             : }
      73             : 
      74           3 : void PhysicalRegisterUsageInfo::print(raw_ostream &OS, const Module *M) const {
      75             :   const TargetRegisterInfo *TRI;
      76             : 
      77             :   using FuncPtrRegMaskPair = std::pair<const Function *, std::vector<uint32_t>>;
      78             : 
      79           6 :   SmallVector<const FuncPtrRegMaskPair *, 64> FPRMPairVector;
      80             : 
      81             :   // Create a vector of pointer to RegMasks entries
      82           6 :   for (const auto &RegMask : RegMasks)
      83           4 :     FPRMPairVector.push_back(&RegMask);
      84             : 
      85             :   // sort the vector to print analysis in alphabatic order of function name.
      86           9 :   std::sort(
      87             :       FPRMPairVector.begin(), FPRMPairVector.end(),
      88           1 :       [](const FuncPtrRegMaskPair *A, const FuncPtrRegMaskPair *B) -> bool {
      89           1 :         return A->first->getName() < B->first->getName();
      90             :       });
      91             : 
      92          13 :   for (const FuncPtrRegMaskPair *FPRMPair : FPRMPairVector) {
      93           4 :     OS << FPRMPair->first->getName() << " "
      94           4 :        << "Clobbered Registers: ";
      95          12 :     TRI = TM->getSubtarget<TargetSubtargetInfo>(*(FPRMPair->first))
      96           4 :               .getRegisterInfo();
      97             : 
      98         984 :     for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) {
      99        1960 :       if (MachineOperand::clobbersPhysReg(&(FPRMPair->second[0]), PReg))
     100         378 :         OS << TRI->getName(PReg) << " ";
     101             :     }
     102           4 :     OS << "\n";
     103             :   }
     104      216921 : }

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