LCOV - code coverage report
Current view: top level - lib/CodeGen/SelectionDAG - SelectionDAG.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 3597 3788 95.0 %
Date: 2018-09-23 13:06:45 Functions: 279 290 96.2 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- SelectionDAG.cpp - Implement the SelectionDAG data structures ------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This implements the SelectionDAG class.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #include "llvm/CodeGen/SelectionDAG.h"
      15             : #include "SDNodeDbgValue.h"
      16             : #include "llvm/ADT/APFloat.h"
      17             : #include "llvm/ADT/APInt.h"
      18             : #include "llvm/ADT/APSInt.h"
      19             : #include "llvm/ADT/ArrayRef.h"
      20             : #include "llvm/ADT/BitVector.h"
      21             : #include "llvm/ADT/FoldingSet.h"
      22             : #include "llvm/ADT/None.h"
      23             : #include "llvm/ADT/STLExtras.h"
      24             : #include "llvm/ADT/SmallPtrSet.h"
      25             : #include "llvm/ADT/SmallVector.h"
      26             : #include "llvm/ADT/Triple.h"
      27             : #include "llvm/ADT/Twine.h"
      28             : #include "llvm/Analysis/ValueTracking.h"
      29             : #include "llvm/CodeGen/ISDOpcodes.h"
      30             : #include "llvm/CodeGen/MachineBasicBlock.h"
      31             : #include "llvm/CodeGen/MachineConstantPool.h"
      32             : #include "llvm/CodeGen/MachineFrameInfo.h"
      33             : #include "llvm/CodeGen/MachineFunction.h"
      34             : #include "llvm/CodeGen/MachineMemOperand.h"
      35             : #include "llvm/CodeGen/RuntimeLibcalls.h"
      36             : #include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
      37             : #include "llvm/CodeGen/SelectionDAGNodes.h"
      38             : #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
      39             : #include "llvm/CodeGen/TargetLowering.h"
      40             : #include "llvm/CodeGen/TargetRegisterInfo.h"
      41             : #include "llvm/CodeGen/TargetSubtargetInfo.h"
      42             : #include "llvm/CodeGen/ValueTypes.h"
      43             : #include "llvm/IR/Constant.h"
      44             : #include "llvm/IR/Constants.h"
      45             : #include "llvm/IR/DataLayout.h"
      46             : #include "llvm/IR/DebugInfoMetadata.h"
      47             : #include "llvm/IR/DebugLoc.h"
      48             : #include "llvm/IR/DerivedTypes.h"
      49             : #include "llvm/IR/Function.h"
      50             : #include "llvm/IR/GlobalValue.h"
      51             : #include "llvm/IR/Metadata.h"
      52             : #include "llvm/IR/Type.h"
      53             : #include "llvm/IR/Value.h"
      54             : #include "llvm/Support/Casting.h"
      55             : #include "llvm/Support/CodeGen.h"
      56             : #include "llvm/Support/Compiler.h"
      57             : #include "llvm/Support/Debug.h"
      58             : #include "llvm/Support/ErrorHandling.h"
      59             : #include "llvm/Support/KnownBits.h"
      60             : #include "llvm/Support/MachineValueType.h"
      61             : #include "llvm/Support/ManagedStatic.h"
      62             : #include "llvm/Support/MathExtras.h"
      63             : #include "llvm/Support/Mutex.h"
      64             : #include "llvm/Support/raw_ostream.h"
      65             : #include "llvm/Target/TargetMachine.h"
      66             : #include "llvm/Target/TargetOptions.h"
      67             : #include <algorithm>
      68             : #include <cassert>
      69             : #include <cstdint>
      70             : #include <cstdlib>
      71             : #include <limits>
      72             : #include <set>
      73             : #include <string>
      74             : #include <utility>
      75             : #include <vector>
      76             : 
      77             : using namespace llvm;
      78             : 
      79             : /// makeVTList - Return an instance of the SDVTList struct initialized with the
      80             : /// specified members.
      81             : static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
      82             :   SDVTList Res = {VTs, NumVTs};
      83             :   return Res;
      84             : }
      85             : 
      86             : // Default null implementations of the callbacks.
      87           0 : void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
      88    28488040 : void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
      89             : 
      90             : #define DEBUG_TYPE "selectiondag"
      91             : 
      92             : static cl::opt<bool> EnableMemCpyDAGOpt("enable-memcpy-dag-opt",
      93             :        cl::Hidden, cl::init(true),
      94             :        cl::desc("Gang up loads and stores generated by inlining of memcpy"));
      95             : 
      96             : static cl::opt<int> MaxLdStGlue("ldstmemcpy-glue-max",
      97             :        cl::desc("Number limit for gluing ld/st of memcpy."),
      98             :        cl::Hidden, cl::init(0));
      99             : 
     100           0 : static void NewSDValueDbgMsg(SDValue V, StringRef Msg, SelectionDAG *G) {
     101             :   LLVM_DEBUG(dbgs() << Msg; V.getNode()->dump(G););
     102           0 : }
     103             : 
     104             : //===----------------------------------------------------------------------===//
     105             : //                              ConstantFPSDNode Class
     106             : //===----------------------------------------------------------------------===//
     107             : 
     108             : /// isExactlyValue - We don't rely on operator== working on double values, as
     109             : /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
     110             : /// As such, this method can be used to do an exact bit-for-bit comparison of
     111             : /// two floating point values.
     112           3 : bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
     113           6 :   return getValueAPF().bitwiseIsEqual(V);
     114             : }
     115             : 
     116        4240 : bool ConstantFPSDNode::isValueValidForType(EVT VT,
     117             :                                            const APFloat& Val) {
     118             :   assert(VT.isFloatingPoint() && "Can only convert between FP types");
     119             : 
     120             :   // convert modifies in place, so make a copy.
     121             :   APFloat Val2 = APFloat(Val);
     122             :   bool losesInfo;
     123        4240 :   (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
     124             :                       APFloat::rmNearestTiesToEven,
     125             :                       &losesInfo);
     126        4240 :   return !losesInfo;
     127             : }
     128             : 
     129             : //===----------------------------------------------------------------------===//
     130             : //                              ISD Namespace
     131             : //===----------------------------------------------------------------------===//
     132             : 
     133      719176 : bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
     134             :   auto *BV = dyn_cast<BuildVectorSDNode>(N);
     135             :   if (!BV)
     136             :     return false;
     137             : 
     138             :   APInt SplatUndef;
     139             :   unsigned SplatBitSize;
     140             :   bool HasUndefs;
     141      736000 :   unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
     142      368000 :   return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs,
     143      368000 :                              EltSize) &&
     144      367537 :          EltSize == SplatBitSize;
     145             : }
     146             : 
     147             : // FIXME: AllOnes and AllZeros duplicate a lot of code. Could these be
     148             : // specializations of the more general isConstantSplatVector()?
     149             : 
     150      432963 : bool ISD::isBuildVectorAllOnes(const SDNode *N) {
     151             :   // Look through a bit convert.
     152     1043072 :   while (N->getOpcode() == ISD::BITCAST)
     153       88573 :     N = N->getOperand(0).getNode();
     154             : 
     155      432963 :   if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
     156             : 
     157      231919 :   unsigned i = 0, e = N->getNumOperands();
     158             : 
     159             :   // Skip over all of the undef values.
     160      233737 :   while (i != e && N->getOperand(i).isUndef())
     161        1818 :     ++i;
     162             : 
     163             :   // Do not accept an all-undef vector.
     164      231919 :   if (i == e) return false;
     165             : 
     166             :   // Do not accept build_vectors that aren't all constants or which have non-~0
     167             :   // elements. We have to be a bit careful here, as the type of the constant
     168             :   // may not be the same as the type of the vector elements due to type
     169             :   // legalization (the elements are promoted to a legal type for the target and
     170             :   // a vector of a type may be legal when the base element type is not).
     171             :   // We only want to check enough bits to cover the vector elements, because
     172             :   // we care if the resultant vector is all ones, not whether the individual
     173             :   // constants are.
     174      231878 :   SDValue NotZero = N->getOperand(i);
     175      463756 :   unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
     176             :   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
     177      433706 :     if (CN->getAPIntValue().countTrailingOnes() < EltSize)
     178             :       return false;
     179             :   } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
     180       16302 :     if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
     181             :       return false;
     182             :   } else
     183             :     return false;
     184             : 
     185             :   // Okay, we have at least one ~0 value, check to see if the rest match or are
     186             :   // undefs. Even with the above element type twiddling, this should be OK, as
     187             :   // the same type legalization should have applied to all the elements.
     188      708737 :   for (++i; i != e; ++i)
     189      535793 :     if (N->getOperand(i) != NotZero && !N->getOperand(i).isUndef())
     190             :       return false;
     191             :   return true;
     192             : }
     193             : 
     194     2230602 : bool ISD::isBuildVectorAllZeros(const SDNode *N) {
     195             :   // Look through a bit convert.
     196     5275578 :   while (N->getOpcode() == ISD::BITCAST)
     197      407187 :     N = N->getOperand(0).getNode();
     198             : 
     199     2230602 :   if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
     200             : 
     201             :   bool IsAllUndef = true;
     202     5543796 :   for (const SDValue &Op : N->op_values()) {
     203     9959044 :     if (Op.isUndef())
     204             :       continue;
     205             :     IsAllUndef = false;
     206             :     // Do not accept build_vectors that aren't all constants or which have non-0
     207             :     // elements. We have to be a bit careful here, as the type of the constant
     208             :     // may not be the same as the type of the vector elements due to type
     209             :     // legalization (the elements are promoted to a legal type for the target
     210             :     // and a vector of a type may be legal when the base element type is not).
     211             :     // We only want to check enough bits to cover the vector elements, because
     212             :     // we care if the resultant vector is all zeros, not whether the individual
     213             :     // constants are.
     214     9936252 :     unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
     215             :     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
     216     9817310 :       if (CN->getAPIntValue().countTrailingZeros() < EltSize)
     217             :         return false;
     218             :     } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
     219       91862 :       if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
     220             :         return false;
     221             :     } else
     222             :       return false;
     223             :   }
     224             : 
     225             :   // Do not accept an all-undef vector.
     226      564274 :   if (IsAllUndef)
     227          44 :     return false;
     228             :   return true;
     229             : }
     230             : 
     231     7060461 : bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
     232     7060461 :   if (N->getOpcode() != ISD::BUILD_VECTOR)
     233             :     return false;
     234             : 
     235      576021 :   for (const SDValue &Op : N->op_values()) {
     236     1055988 :     if (Op.isUndef())
     237             :       continue;
     238             :     if (!isa<ConstantSDNode>(Op))
     239             :       return false;
     240             :   }
     241             :   return true;
     242             : }
     243             : 
     244     1019425 : bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
     245     1019425 :   if (N->getOpcode() != ISD::BUILD_VECTOR)
     246             :     return false;
     247             : 
     248       27227 :   for (const SDValue &Op : N->op_values()) {
     249       47654 :     if (Op.isUndef())
     250             :       continue;
     251             :     if (!isa<ConstantFPSDNode>(Op))
     252             :       return false;
     253             :   }
     254             :   return true;
     255             : }
     256             : 
     257      729298 : bool ISD::allOperandsUndef(const SDNode *N) {
     258             :   // Return false if the node has no operands.
     259             :   // This is "logically inconsistent" with the definition of "all" but
     260             :   // is probably the desired behavior.
     261      729298 :   if (N->getNumOperands() == 0)
     262             :     return false;
     263             : 
     264      734126 :   for (const SDValue &Op : N->op_values())
     265     1468010 :     if (!Op.isUndef())
     266             :       return false;
     267             : 
     268             :   return true;
     269             : }
     270             : 
     271      322765 : bool ISD::matchUnaryPredicate(SDValue Op,
     272             :                               std::function<bool(ConstantSDNode *)> Match) {
     273             :   if (auto *Cst = dyn_cast<ConstantSDNode>(Op))
     274      278756 :     return Match(Cst);
     275             : 
     276       44009 :   if (ISD::BUILD_VECTOR != Op.getOpcode())
     277             :     return false;
     278             : 
     279       17400 :   EVT SVT = Op.getValueType().getScalarType();
     280       16078 :   for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
     281             :     auto *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(i));
     282       44689 :     if (!Cst || Cst->getValueType(0) != SVT || !Match(Cst))
     283        7910 :       return false;
     284             :   }
     285             :   return true;
     286             : }
     287             : 
     288       47819 : bool ISD::matchBinaryPredicate(
     289             :     SDValue LHS, SDValue RHS,
     290             :     std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match) {
     291       47881 :   if (LHS.getValueType() != RHS.getValueType())
     292        1498 :     return false;
     293             : 
     294             :   if (auto *LHSCst = dyn_cast<ConstantSDNode>(LHS))
     295             :     if (auto *RHSCst = dyn_cast<ConstantSDNode>(RHS))
     296       16346 :       return Match(LHSCst, RHSCst);
     297             : 
     298       29975 :   if (ISD::BUILD_VECTOR != LHS.getOpcode() ||
     299             :       ISD::BUILD_VECTOR != RHS.getOpcode())
     300             :     return false;
     301             : 
     302         573 :   EVT SVT = LHS.getValueType().getScalarType();
     303        9100 :   for (unsigned i = 0, e = LHS.getNumOperands(); i != e; ++i) {
     304             :     auto *LHSCst = dyn_cast<ConstantSDNode>(LHS.getOperand(i));
     305             :     auto *RHSCst = dyn_cast<ConstantSDNode>(RHS.getOperand(i));
     306        8561 :     if (!LHSCst || !RHSCst)
     307             :       return false;
     308       17122 :     if (LHSCst->getValueType(0) != SVT ||
     309        8561 :         LHSCst->getValueType(0) != RHSCst->getValueType(0))
     310           0 :       return false;
     311        8561 :     if (!Match(LHSCst, RHSCst))
     312             :       return false;
     313             :   }
     314             :   return true;
     315             : }
     316             : 
     317         479 : ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
     318         479 :   switch (ExtType) {
     319          93 :   case ISD::EXTLOAD:
     320          93 :     return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
     321             :   case ISD::SEXTLOAD:
     322             :     return ISD::SIGN_EXTEND;
     323         231 :   case ISD::ZEXTLOAD:
     324         231 :     return ISD::ZERO_EXTEND;
     325             :   default:
     326             :     break;
     327             :   }
     328             : 
     329           0 :   llvm_unreachable("Invalid LoadExtType");
     330             : }
     331             : 
     332      400299 : ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
     333             :   // To perform this operation, we just need to swap the L and G bits of the
     334             :   // operation.
     335      400299 :   unsigned OldL = (Operation >> 2) & 1;
     336      400299 :   unsigned OldG = (Operation >> 1) & 1;
     337      800598 :   return ISD::CondCode((Operation & ~6) |  // Keep the N, U, E bits
     338      400299 :                        (OldL << 1) |       // New G bit
     339      400299 :                        (OldG << 2));       // New L bit.
     340             : }
     341             : 
     342       56287 : ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
     343             :   unsigned Operation = Op;
     344       56287 :   if (isInteger)
     345       53463 :     Operation ^= 7;   // Flip L, G, E bits, but not U.
     346             :   else
     347        2824 :     Operation ^= 15;  // Flip all of the condition bits.
     348             : 
     349       56287 :   if (Operation > ISD::SETTRUE2)
     350         302 :     Operation &= ~8;  // Don't let N and U bits get set.
     351             : 
     352       56287 :   return ISD::CondCode(Operation);
     353             : }
     354             : 
     355             : /// For an integer comparison, return 1 if the comparison is a signed operation
     356             : /// and 2 if the result is an unsigned comparison. Return zero if the operation
     357             : /// does not depend on the sign of the input (setne and seteq).
     358             : static int isSignedOp(ISD::CondCode Opcode) {
     359             :   switch (Opcode) {
     360           0 :   default: llvm_unreachable("Illegal integer setcc operation!");
     361             :   case ISD::SETEQ:
     362             :   case ISD::SETNE: return 0;
     363             :   case ISD::SETLT:
     364             :   case ISD::SETLE:
     365             :   case ISD::SETGT:
     366             :   case ISD::SETGE: return 1;
     367             :   case ISD::SETULT:
     368             :   case ISD::SETULE:
     369             :   case ISD::SETUGT:
     370             :   case ISD::SETUGE: return 2;
     371             :   }
     372             : }
     373             : 
     374          43 : ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
     375             :                                        bool IsInteger) {
     376          68 :   if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
     377             :     // Cannot fold a signed integer setcc with an unsigned integer setcc.
     378             :     return ISD::SETCC_INVALID;
     379             : 
     380          28 :   unsigned Op = Op1 | Op2;  // Combine all of the condition bits.
     381             : 
     382             :   // If the N and U bits get set, then the resultant comparison DOES suddenly
     383             :   // care about orderedness, and it is true when ordered.
     384          28 :   if (Op > ISD::SETTRUE2)
     385          17 :     Op &= ~16;     // Clear the U bit if the N bit is set.
     386             : 
     387             :   // Canonicalize illegal integer setcc's.
     388          28 :   if (IsInteger && Op == ISD::SETUNE)  // e.g. SETUGT | SETULT
     389             :     Op = ISD::SETNE;
     390             : 
     391             :   return ISD::CondCode(Op);
     392             : }
     393             : 
     394          43 : ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
     395             :                                         bool IsInteger) {
     396          48 :   if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
     397             :     // Cannot fold a signed setcc with an unsigned setcc.
     398             :     return ISD::SETCC_INVALID;
     399             : 
     400             :   // Combine all of the condition bits.
     401          43 :   ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
     402             : 
     403             :   // Canonicalize illegal integer setcc's.
     404          43 :   if (IsInteger) {
     405           5 :     switch (Result) {
     406             :     default: break;
     407           0 :     case ISD::SETUO : Result = ISD::SETFALSE; break;  // SETUGT & SETULT
     408           1 :     case ISD::SETOEQ:                                 // SETEQ  & SETU[LG]E
     409           1 :     case ISD::SETUEQ: Result = ISD::SETEQ   ; break;  // SETUGE & SETULE
     410           2 :     case ISD::SETOLT: Result = ISD::SETULT  ; break;  // SETULT & SETNE
     411           0 :     case ISD::SETOGT: Result = ISD::SETUGT  ; break;  // SETUGT & SETNE
     412             :     }
     413             :   }
     414             : 
     415             :   return Result;
     416             : }
     417             : 
     418             : //===----------------------------------------------------------------------===//
     419             : //                           SDNode Profile Support
     420             : //===----------------------------------------------------------------------===//
     421             : 
     422             : /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
     423             : static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)  {
     424   100914506 :   ID.AddInteger(OpC);
     425             : }
     426             : 
     427             : /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
     428             : /// solely with their pointer.
     429           0 : static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
     430           0 :   ID.AddPointer(VTList.VTs);
     431           0 : }
     432             : 
     433             : /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
     434   108020673 : static void AddNodeIDOperands(FoldingSetNodeID &ID,
     435             :                               ArrayRef<SDValue> Ops) {
     436   222284896 :   for (auto& Op : Ops) {
     437   114264222 :     ID.AddPointer(Op.getNode());
     438   114264222 :     ID.AddInteger(Op.getResNo());
     439             :   }
     440   108020674 : }
     441             : 
     442             : /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
     443   100914507 : static void AddNodeIDOperands(FoldingSetNodeID &ID,
     444             :                               ArrayRef<SDUse> Ops) {
     445   220815712 :   for (auto& Op : Ops) {
     446   119901205 :     ID.AddPointer(Op.getNode());
     447   119901205 :     ID.AddInteger(Op.getResNo());
     448             :   }
     449   100914507 : }
     450             : 
     451   108020670 : static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
     452             :                           SDVTList VTList, ArrayRef<SDValue> OpList) {
     453   108020670 :   AddNodeIDOpcode(ID, OpC);
     454   108020670 :   AddNodeIDValueTypes(ID, VTList);
     455   108020673 :   AddNodeIDOperands(ID, OpList);
     456   108020674 : }
     457             : 
     458             : /// If this is an SDNode with special info, add this info to the NodeID data.
     459   101126576 : static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
     460   202253152 :   switch (N->getOpcode()) {
     461             :   case ISD::TargetExternalSymbol:
     462             :   case ISD::ExternalSymbol:
     463             :   case ISD::MCSymbol:
     464             :     llvm_unreachable("Should only be used on nodes with operands");
     465             :   default: break;  // Normal nodes don't need extra info.
     466             :   case ISD::TargetConstant:
     467             :   case ISD::Constant: {
     468             :     const ConstantSDNode *C = cast<ConstantSDNode>(N);
     469    27347766 :     ID.AddPointer(C->getConstantIntValue());
     470    27347766 :     ID.AddBoolean(C->isOpaque());
     471             :     break;
     472             :   }
     473             :   case ISD::TargetConstantFP:
     474             :   case ISD::ConstantFP:
     475       37920 :     ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
     476       37920 :     break;
     477             :   case ISD::TargetGlobalAddress:
     478             :   case ISD::GlobalAddress:
     479             :   case ISD::TargetGlobalTLSAddress:
     480             :   case ISD::GlobalTLSAddress: {
     481             :     const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
     482     2594182 :     ID.AddPointer(GA->getGlobal());
     483     2594182 :     ID.AddInteger(GA->getOffset());
     484     2594182 :     ID.AddInteger(GA->getTargetFlags());
     485     2594182 :     break;
     486             :   }
     487             :   case ISD::BasicBlock:
     488      345456 :     ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
     489      345456 :     break;
     490             :   case ISD::Register:
     491    18124948 :     ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
     492    18124948 :     break;
     493             :   case ISD::RegisterMask:
     494      754392 :     ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
     495      754392 :     break;
     496             :   case ISD::SRCVALUE:
     497         537 :     ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
     498         537 :     break;
     499             :   case ISD::FrameIndex:
     500             :   case ISD::TargetFrameIndex:
     501     6865757 :     ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
     502     6865757 :     break;
     503             :   case ISD::JumpTable:
     504             :   case ISD::TargetJumpTable:
     505         902 :     ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
     506         902 :     ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
     507         902 :     break;
     508             :   case ISD::ConstantPool:
     509             :   case ISD::TargetConstantPool: {
     510             :     const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
     511       32633 :     ID.AddInteger(CP->getAlignment());
     512       65266 :     ID.AddInteger(CP->getOffset());
     513       32633 :     if (CP->isMachineConstantPoolEntry())
     514          81 :       CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
     515             :     else
     516       32552 :       ID.AddPointer(CP->getConstVal());
     517       32633 :     ID.AddInteger(CP->getTargetFlags());
     518       32633 :     break;
     519             :   }
     520             :   case ISD::TargetIndex: {
     521             :     const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
     522           0 :     ID.AddInteger(TI->getIndex());
     523           0 :     ID.AddInteger(TI->getOffset());
     524           0 :     ID.AddInteger(TI->getTargetFlags());
     525           0 :     break;
     526             :   }
     527             :   case ISD::LOAD: {
     528             :     const LoadSDNode *LD = cast<LoadSDNode>(N);
     529     4008619 :     ID.AddInteger(LD->getMemoryVT().getRawBits());
     530     4008619 :     ID.AddInteger(LD->getRawSubclassData());
     531     8017238 :     ID.AddInteger(LD->getPointerInfo().getAddrSpace());
     532     4008619 :     break;
     533             :   }
     534             :   case ISD::STORE: {
     535             :     const StoreSDNode *ST = cast<StoreSDNode>(N);
     536     6549063 :     ID.AddInteger(ST->getMemoryVT().getRawBits());
     537     6549063 :     ID.AddInteger(ST->getRawSubclassData());
     538    13098126 :     ID.AddInteger(ST->getPointerInfo().getAddrSpace());
     539     6549063 :     break;
     540             :   }
     541             :   case ISD::MLOAD: {
     542             :     const MaskedLoadSDNode *MLD = cast<MaskedLoadSDNode>(N);
     543         628 :     ID.AddInteger(MLD->getMemoryVT().getRawBits());
     544         628 :     ID.AddInteger(MLD->getRawSubclassData());
     545        1256 :     ID.AddInteger(MLD->getPointerInfo().getAddrSpace());
     546         628 :     break;
     547             :   }
     548             :   case ISD::MSTORE: {
     549             :     const MaskedStoreSDNode *MST = cast<MaskedStoreSDNode>(N);
     550         277 :     ID.AddInteger(MST->getMemoryVT().getRawBits());
     551         277 :     ID.AddInteger(MST->getRawSubclassData());
     552         554 :     ID.AddInteger(MST->getPointerInfo().getAddrSpace());
     553         277 :     break;
     554             :   }
     555             :   case ISD::MGATHER: {
     556             :     const MaskedGatherSDNode *MG = cast<MaskedGatherSDNode>(N);
     557         782 :     ID.AddInteger(MG->getMemoryVT().getRawBits());
     558         782 :     ID.AddInteger(MG->getRawSubclassData());
     559        1564 :     ID.AddInteger(MG->getPointerInfo().getAddrSpace());
     560         782 :     break;
     561             :   }
     562             :   case ISD::MSCATTER: {
     563             :     const MaskedScatterSDNode *MS = cast<MaskedScatterSDNode>(N);
     564         195 :     ID.AddInteger(MS->getMemoryVT().getRawBits());
     565         195 :     ID.AddInteger(MS->getRawSubclassData());
     566         390 :     ID.AddInteger(MS->getPointerInfo().getAddrSpace());
     567         195 :     break;
     568             :   }
     569             :   case ISD::ATOMIC_CMP_SWAP:
     570             :   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
     571             :   case ISD::ATOMIC_SWAP:
     572             :   case ISD::ATOMIC_LOAD_ADD:
     573             :   case ISD::ATOMIC_LOAD_SUB:
     574             :   case ISD::ATOMIC_LOAD_AND:
     575             :   case ISD::ATOMIC_LOAD_CLR:
     576             :   case ISD::ATOMIC_LOAD_OR:
     577             :   case ISD::ATOMIC_LOAD_XOR:
     578             :   case ISD::ATOMIC_LOAD_NAND:
     579             :   case ISD::ATOMIC_LOAD_MIN:
     580             :   case ISD::ATOMIC_LOAD_MAX:
     581             :   case ISD::ATOMIC_LOAD_UMIN:
     582             :   case ISD::ATOMIC_LOAD_UMAX:
     583             :   case ISD::ATOMIC_LOAD:
     584             :   case ISD::ATOMIC_STORE: {
     585             :     const AtomicSDNode *AT = cast<AtomicSDNode>(N);
     586       19450 :     ID.AddInteger(AT->getMemoryVT().getRawBits());
     587       19450 :     ID.AddInteger(AT->getRawSubclassData());
     588       38900 :     ID.AddInteger(AT->getPointerInfo().getAddrSpace());
     589       19450 :     break;
     590             :   }
     591             :   case ISD::PREFETCH: {
     592             :     const MemSDNode *PF = cast<MemSDNode>(N);
     593         536 :     ID.AddInteger(PF->getPointerInfo().getAddrSpace());
     594         268 :     break;
     595             :   }
     596             :   case ISD::VECTOR_SHUFFLE: {
     597             :     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
     598      964967 :     for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
     599      843023 :          i != e; ++i)
     600     1564102 :       ID.AddInteger(SVN->getMaskElt(i));
     601             :     break;
     602             :   }
     603             :   case ISD::TargetBlockAddress:
     604             :   case ISD::BlockAddress: {
     605             :     const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
     606          54 :     ID.AddPointer(BA->getBlockAddress());
     607          54 :     ID.AddInteger(BA->getOffset());
     608          54 :     ID.AddInteger(BA->getTargetFlags());
     609          54 :     break;
     610             :   }
     611             :   } // end switch (N->getOpcode())
     612             : 
     613             :   // Target specific memory nodes could also have address spaces to check.
     614   101126576 :   if (N->isTargetMemoryOpcode())
     615       19064 :     ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
     616   101126576 : }
     617             : 
     618             : /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
     619             : /// data.
     620   100914506 : static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
     621   100914506 :   AddNodeIDOpcode(ID, N->getOpcode());
     622             :   // Add the return value info.
     623   100914506 :   AddNodeIDValueTypes(ID, N->getVTList());
     624             :   // Add the operand info.
     625   100914507 :   AddNodeIDOperands(ID, N->ops());
     626             : 
     627             :   // Handle SDNode leafs with special info.
     628   100914507 :   AddNodeIDCustom(ID, N);
     629   100914507 : }
     630             : 
     631             : //===----------------------------------------------------------------------===//
     632             : //                              SelectionDAG Class
     633             : //===----------------------------------------------------------------------===//
     634             : 
     635             : /// doNotCSE - Return true if CSE should not be performed for this node.
     636    12379984 : static bool doNotCSE(SDNode *N) {
     637    12379984 :   if (N->getValueType(0) == MVT::Glue)
     638         866 :     return true; // Never CSE anything that produces a flag.
     639             : 
     640    24758236 :   switch (N->getOpcode()) {
     641             :   default: break;
     642             :   case ISD::HANDLENODE:
     643             :   case ISD::EH_LABEL:
     644             :     return true;   // Never CSE these nodes.
     645             :   }
     646             : 
     647             :   // Check that remaining values produced are not flags.
     648    14105761 :   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
     649             :     if (N->getValueType(i) == MVT::Glue)
     650     2524990 :       return true; // Never CSE anything that produces a flag.
     651             : 
     652             :   return false;
     653             : }
     654             : 
     655             : /// RemoveDeadNodes - This method deletes all unreachable nodes in the
     656             : /// SelectionDAG.
     657     5682502 : void SelectionDAG::RemoveDeadNodes() {
     658             :   // Create a dummy node (which is not added to allnodes), that adds a reference
     659             :   // to the root node, preventing it from being deleted.
     660    11365007 :   HandleSDNode Dummy(getRoot());
     661             : 
     662             :   SmallVector<SDNode*, 128> DeadNodes;
     663             : 
     664             :   // Add all obviously-dead nodes to the DeadNodes worklist.
     665   175163280 :   for (SDNode &Node : allnodes())
     666   169480775 :     if (Node.use_empty())
     667      888214 :       DeadNodes.push_back(&Node);
     668             : 
     669     5682505 :   RemoveDeadNodes(DeadNodes);
     670             : 
     671             :   // If the root changed (e.g. it was a dead load, update the root).
     672     5682504 :   setRoot(Dummy.getValue());
     673     5682505 : }
     674             : 
     675             : /// RemoveDeadNodes - This method deletes the unreachable nodes in the
     676             : /// given list, and any nodes that become unreachable as a result.
     677    15755765 : void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
     678             : 
     679             :   // Process the worklist, deleting the nodes and adding their uses to the
     680             :   // worklist.
     681    25400971 :   while (!DeadNodes.empty()) {
     682             :     SDNode *N = DeadNodes.pop_back_val();
     683             :     // Skip to next node if we've already managed to delete the node. This could
     684             :     // happen if replacing a node causes a node previously added to the node to
     685             :     // be deleted.
     686     9645204 :     if (N->getOpcode() == ISD::DELETED_NODE)
     687             :       continue;
     688             : 
     689    23136472 :     for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     690    13491269 :       DUL->NodeDeleted(N, nullptr);
     691             : 
     692             :     // Take the node out of the appropriate CSE map.
     693     9645203 :     RemoveNodeFromCSEMaps(N);
     694             : 
     695             :     // Next, brutally remove the operand list.  This is safe to do, as there are
     696             :     // no cycles in the graph.
     697    19978330 :     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
     698    10333127 :       SDUse &Use = *I++;
     699    10333127 :       SDNode *Operand = Use.getNode();
     700    10333127 :       Use.set(SDValue());
     701             : 
     702             :       // Now that we removed this operand, see if there are no uses of it left.
     703    10333127 :       if (Operand->use_empty())
     704     3622940 :         DeadNodes.push_back(Operand);
     705             :     }
     706             : 
     707     9645203 :     DeallocateNode(N);
     708             :   }
     709    15755767 : }
     710             : 
     711      671381 : void SelectionDAG::RemoveDeadNode(SDNode *N){
     712             :   SmallVector<SDNode*, 16> DeadNodes(1, N);
     713             : 
     714             :   // Create a dummy node that adds a reference to the root node, preventing
     715             :   // it from being deleted.  (This matters if the root is an operand of the
     716             :   // dead node.)
     717     1342762 :   HandleSDNode Dummy(getRoot());
     718             : 
     719      671381 :   RemoveDeadNodes(DeadNodes);
     720      671381 : }
     721             : 
     722    10558886 : void SelectionDAG::DeleteNode(SDNode *N) {
     723             :   // First take this out of the appropriate CSE map.
     724    10558886 :   RemoveNodeFromCSEMaps(N);
     725             : 
     726             :   // Finally, remove uses due to operands of this node, remove from the
     727             :   // AllNodes list, and delete the node.
     728    10558886 :   DeleteNodeNotInCSEMaps(N);
     729    10558886 : }
     730             : 
     731    10574504 : void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
     732             :   assert(N->getIterator() != AllNodes.begin() &&
     733             :          "Cannot delete the entry node!");
     734             :   assert(N->use_empty() && "Cannot delete a node that is not dead!");
     735             : 
     736             :   // Drop all of the operands and decrement used node's use counts.
     737    10574504 :   N->DropOperands();
     738             : 
     739    10574504 :   DeallocateNode(N);
     740    10574504 : }
     741             : 
     742    57394959 : void SDDbgInfo::erase(const SDNode *Node) {
     743    57394959 :   DbgValMapType::iterator I = DbgValMap.find(Node);
     744    57394959 :   if (I == DbgValMap.end())
     745    57365515 :     return;
     746       97685 :   for (auto &Val: I->second)
     747       68241 :     Val->setIsInvalidated();
     748             :   DbgValMap.erase(I);
     749             : }
     750             : 
     751    57394957 : void SelectionDAG::DeallocateNode(SDNode *N) {
     752             :   // If we have operands, deallocate them.
     753    57394957 :   removeOperands(N);
     754             : 
     755             :   NodeAllocator.Deallocate(AllNodes.remove(N));
     756             : 
     757             :   // Set the opcode to DELETED_NODE to help catch bugs when node
     758             :   // memory is reallocated.
     759             :   // FIXME: There are places in SDag that have grown a dependency on the opcode
     760             :   // value in the released node.
     761             :   __asan_unpoison_memory_region(&N->NodeType, sizeof(N->NodeType));
     762    57394959 :   N->NodeType = ISD::DELETED_NODE;
     763             : 
     764             :   // If any of the SDDbgValue nodes refer to this SDNode, invalidate
     765             :   // them and forget about that node.
     766    57394959 :   DbgInfo->erase(N);
     767    57394959 : }
     768             : 
     769             : #ifndef NDEBUG
     770             : /// VerifySDNode - Sanity check the given SDNode.  Aborts if it is invalid.
     771             : static void VerifySDNode(SDNode *N) {
     772             :   switch (N->getOpcode()) {
     773             :   default:
     774             :     break;
     775             :   case ISD::BUILD_PAIR: {
     776             :     EVT VT = N->getValueType(0);
     777             :     assert(N->getNumValues() == 1 && "Too many results!");
     778             :     assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
     779             :            "Wrong return type!");
     780             :     assert(N->getNumOperands() == 2 && "Wrong number of operands!");
     781             :     assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
     782             :            "Mismatched operand types!");
     783             :     assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
     784             :            "Wrong operand type!");
     785             :     assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
     786             :            "Wrong return type size");
     787             :     break;
     788             :   }
     789             :   case ISD::BUILD_VECTOR: {
     790             :     assert(N->getNumValues() == 1 && "Too many results!");
     791             :     assert(N->getValueType(0).isVector() && "Wrong return type!");
     792             :     assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
     793             :            "Wrong number of operands!");
     794             :     EVT EltVT = N->getValueType(0).getVectorElementType();
     795             :     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
     796             :       assert((I->getValueType() == EltVT ||
     797             :              (EltVT.isInteger() && I->getValueType().isInteger() &&
     798             :               EltVT.bitsLE(I->getValueType()))) &&
     799             :             "Wrong operand type!");
     800             :       assert(I->getValueType() == N->getOperand(0).getValueType() &&
     801             :              "Operands must all have the same type");
     802             :     }
     803             :     break;
     804             :   }
     805             :   }
     806             : }
     807             : #endif // NDEBUG
     808             : 
     809             : /// Insert a newly allocated node into the DAG.
     810             : ///
     811             : /// Handles insertion into the all nodes list and CSE map, as well as
     812             : /// verification and other common operations when a new node is allocated.
     813    58709627 : void SelectionDAG::InsertNode(SDNode *N) {
     814             :   AllNodes.push_back(N);
     815             : #ifndef NDEBUG
     816             :   N->PersistentId = NextPersistentId++;
     817             :   VerifySDNode(N);
     818             : #endif
     819    58709627 : }
     820             : 
     821             : /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
     822             : /// correspond to it.  This is useful when we're about to delete or repurpose
     823             : /// the node.  We don't want future request for structurally identical nodes
     824             : /// to return N anymore.
     825    44467155 : bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
     826             :   bool Erased = false;
     827    88934310 :   switch (N->getOpcode()) {
     828             :   case ISD::HANDLENODE: return false;  // noop.
     829             :   case ISD::CONDCODE:
     830             :     assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
     831             :            "Cond code doesn't exist!");
     832      186963 :     Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
     833      186963 :     CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
     834      186963 :     break;
     835       12056 :   case ISD::ExternalSymbol:
     836       24076 :     Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
     837       12056 :     break;
     838             :   case ISD::TargetExternalSymbol: {
     839             :     ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
     840         254 :     Erased = TargetExternalSymbols.erase(
     841         508 :                std::pair<std::string,unsigned char>(ESN->getSymbol(),
     842         254 :                                                     ESN->getTargetFlags()));
     843         254 :     break;
     844             :   }
     845             :   case ISD::MCSymbol: {
     846             :     auto *MCSN = cast<MCSymbolSDNode>(N);
     847           0 :     Erased = MCSymbols.erase(MCSN->getMCSymbol());
     848           0 :     break;
     849             :   }
     850             :   case ISD::VALUETYPE: {
     851       93233 :     EVT VT = cast<VTSDNode>(N)->getVT();
     852       93233 :     if (VT.isExtended()) {
     853        6007 :       Erased = ExtendedValueTypeNodes.erase(VT);
     854             :     } else {
     855       87226 :       Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
     856       87226 :       ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
     857             :     }
     858             :     break;
     859             :   }
     860    44111287 :   default:
     861             :     // Remove it from the CSE Map.
     862             :     assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
     863             :     assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
     864             :     Erased = CSEMap.RemoveNode(N);
     865    44111286 :     break;
     866             :   }
     867             : #ifndef NDEBUG
     868             :   // Verify that the node was actually in one of the CSE maps, unless it has a
     869             :   // flag result (which cannot be CSE'd) or is one of the special cases that are
     870             :   // not subject to CSE.
     871             :   if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
     872             :       !N->isMachineOpcode() && !doNotCSE(N)) {
     873             :     N->dump(this);
     874             :     dbgs() << "\n";
     875             :     llvm_unreachable("Node is not in map!");
     876             :   }
     877             : #endif
     878             :   return Erased;
     879             : }
     880             : 
     881             : /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
     882             : /// maps and modified in place. Add it back to the CSE maps, unless an identical
     883             : /// node already exists, in which case transfer all its users to the existing
     884             : /// node. This transfer can potentially trigger recursive merging.
     885             : void
     886    12143752 : SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
     887             :   // For node types that aren't CSE'd, just act as if no identical node
     888             :   // already exists.
     889    12143752 :   if (!doNotCSE(N)) {
     890             :     SDNode *Existing = CSEMap.GetOrInsertNode(N);
     891     9113682 :     if (Existing != N) {
     892             :       // If there was already an existing matching node, use ReplaceAllUsesWith
     893             :       // to replace the dead one with the existing one.  This can cause
     894             :       // recursive merging of other unrelated nodes down the line.
     895       15618 :       ReplaceAllUsesWith(N, Existing);
     896             : 
     897             :       // N is now dead. Inform the listeners and delete it.
     898       66049 :       for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     899       50431 :         DUL->NodeDeleted(N, Existing);
     900       15618 :       DeleteNodeNotInCSEMaps(N);
     901       15618 :       return;
     902             :     }
     903             :   }
     904             : 
     905             :   // If the node doesn't already exist, we updated it.  Inform listeners.
     906    41346851 :   for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     907    29218717 :     DUL->NodeUpdated(N);
     908             : }
     909             : 
     910             : /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
     911             : /// were replaced with those specified.  If this node is never memoized,
     912             : /// return null, otherwise return a pointer to the slot it would take.  If a
     913             : /// node already exists with these operands, the slot will be non-null.
     914        2806 : SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
     915             :                                            void *&InsertPos) {
     916        2806 :   if (doNotCSE(N))
     917             :     return nullptr;
     918             : 
     919        2806 :   SDValue Ops[] = { Op };
     920             :   FoldingSetNodeID ID;
     921        8418 :   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
     922        2806 :   AddNodeIDCustom(ID, N);
     923        2806 :   SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
     924        2806 :   if (Node)
     925           0 :     Node->intersectFlagsWith(N->getFlags());
     926             :   return Node;
     927             : }
     928             : 
     929             : /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
     930             : /// were replaced with those specified.  If this node is never memoized,
     931             : /// return null, otherwise return a pointer to the slot it would take.  If a
     932             : /// node already exists with these operands, the slot will be non-null.
     933       54133 : SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
     934             :                                            SDValue Op1, SDValue Op2,
     935             :                                            void *&InsertPos) {
     936       54133 :   if (doNotCSE(N))
     937             :     return nullptr;
     938             : 
     939       54133 :   SDValue Ops[] = { Op1, Op2 };
     940             :   FoldingSetNodeID ID;
     941      162399 :   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
     942       54133 :   AddNodeIDCustom(ID, N);
     943       54133 :   SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
     944       54133 :   if (Node)
     945         698 :     Node->intersectFlagsWith(N->getFlags());
     946             :   return Node;
     947             : }
     948             : 
     949             : /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
     950             : /// were replaced with those specified.  If this node is never memoized,
     951             : /// return null, otherwise return a pointer to the slot it would take.  If a
     952             : /// node already exists with these operands, the slot will be non-null.
     953      179293 : SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
     954             :                                            void *&InsertPos) {
     955      179293 :   if (doNotCSE(N))
     956             :     return nullptr;
     957             : 
     958             :   FoldingSetNodeID ID;
     959      465390 :   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
     960      155130 :   AddNodeIDCustom(ID, N);
     961      155130 :   SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
     962      155130 :   if (Node)
     963         118 :     Node->intersectFlagsWith(N->getFlags());
     964             :   return Node;
     965             : }
     966             : 
     967      358325 : unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
     968             :   Type *Ty = VT == MVT::iPTR ?
     969           0 :                    PointerType::get(Type::getInt8Ty(*getContext()), 0) :
     970      358325 :                    VT.getTypeForEVT(*getContext());
     971             : 
     972      358325 :   return getDataLayout().getABITypeAlignment(Ty);
     973             : }
     974             : 
     975             : // EntryNode could meaningfully have debug info if we can find it...
     976       30300 : SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
     977             :     : TM(tm), OptLevel(OL),
     978       60600 :       EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
     979       90900 :       Root(getEntryNode()) {
     980       30300 :   InsertNode(&EntryNode);
     981       30299 :   DbgInfo = new SDDbgInfo();
     982       30299 : }
     983             : 
     984      428125 : void SelectionDAG::init(MachineFunction &NewMF,
     985             :                         OptimizationRemarkEmitter &NewORE,
     986             :                         Pass *PassPtr, const TargetLibraryInfo *LibraryInfo,
     987             :                         LegacyDivergenceAnalysis * Divergence) {
     988      428125 :   MF = &NewMF;
     989      428125 :   SDAGISelPass = PassPtr;
     990      428125 :   ORE = &NewORE;
     991      428125 :   TLI = getSubtarget().getTargetLowering();
     992      856250 :   TSI = getSubtarget().getSelectionDAGInfo();
     993      428125 :   LibInfo = LibraryInfo;
     994      428125 :   Context = &MF->getFunction().getContext();
     995      428125 :   DA = Divergence;
     996      428125 : }
     997             : 
     998       90456 : SelectionDAG::~SelectionDAG() {
     999             :   assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
    1000       30150 :   allnodes_clear();
    1001       30152 :   OperandRecycler.clear(OperandAllocator);
    1002       30152 :   delete DbgInfo;
    1003       30151 : }
    1004             : 
    1005     1313589 : void SelectionDAG::allnodes_clear() {
    1006             :   assert(&*AllNodes.begin() == &EntryNode);
    1007             :   AllNodes.remove(AllNodes.begin());
    1008    38488840 :   while (!AllNodes.empty())
    1009    37175251 :     DeallocateNode(&AllNodes.front());
    1010             : #ifndef NDEBUG
    1011             :   NextPersistentId = 0;
    1012             : #endif
    1013     1313589 : }
    1014             : 
    1015    30865257 : SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
    1016             :                                           void *&InsertPos) {
    1017             :   SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
    1018             :   if (N) {
    1019             :     switch (N->getOpcode()) {
    1020             :     default: break;
    1021             :     case ISD::Constant:
    1022             :     case ISD::ConstantFP:
    1023             :       llvm_unreachable("Querying for Constant and ConstantFP nodes requires "
    1024             :                        "debug location.  Use another overload.");
    1025             :     }
    1026             :   }
    1027    30865257 :   return N;
    1028             : }
    1029             : 
    1030    77156059 : SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
    1031             :                                           const SDLoc &DL, void *&InsertPos) {
    1032             :   SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
    1033    77156059 :   if (N) {
    1034    61984222 :     switch (N->getOpcode()) {
    1035             :     case ISD::Constant:
    1036             :     case ISD::ConstantFP:
    1037             :       // Erase debug location from the node if the node is used at several
    1038             :       // different places. Do not propagate one location to all uses as it
    1039             :       // will cause a worse single stepping debugging experience.
    1040     6978763 :       if (N->getDebugLoc() != DL.getDebugLoc())
    1041     2552184 :         N->setDebugLoc(DebugLoc());
    1042             :       break;
    1043    24013348 :     default:
    1044             :       // When the node's point of use is located earlier in the instruction
    1045             :       // sequence than its prior point of use, update its debug info to the
    1046             :       // earlier location.
    1047    48026696 :       if (DL.getIROrder() && DL.getIROrder() < N->getIROrder())
    1048      161018 :         N->setDebugLoc(DL.getDebugLoc());
    1049             :       break;
    1050             :     }
    1051             :   }
    1052    77156059 :   return N;
    1053             : }
    1054             : 
    1055     1283437 : void SelectionDAG::clear() {
    1056     1283437 :   allnodes_clear();
    1057     1283437 :   OperandRecycler.clear(OperandAllocator);
    1058     1283437 :   OperandAllocator.Reset();
    1059     1283437 :   CSEMap.clear();
    1060             : 
    1061             :   ExtendedValueTypeNodes.clear();
    1062     1283437 :   ExternalSymbols.clear();
    1063             :   TargetExternalSymbols.clear();
    1064     1283436 :   MCSymbols.clear();
    1065             :   std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
    1066             :             static_cast<CondCodeSDNode*>(nullptr));
    1067             :   std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
    1068             :             static_cast<SDNode*>(nullptr));
    1069             : 
    1070     1283437 :   EntryNode.UseList = nullptr;
    1071     1283437 :   InsertNode(&EntryNode);
    1072     1283435 :   Root = getEntryNode();
    1073     1283435 :   DbgInfo->clear();
    1074     1283437 : }
    1075             : 
    1076          19 : SDValue SelectionDAG::getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT) {
    1077          19 :   return VT.bitsGT(Op.getValueType())
    1078           7 :              ? getNode(ISD::FP_EXTEND, DL, VT, Op)
    1079          19 :              : getNode(ISD::FP_ROUND, DL, VT, Op, getIntPtrConstant(0, DL));
    1080             : }
    1081             : 
    1082       60101 : SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
    1083       60101 :   return VT.bitsGT(Op.getValueType()) ?
    1084       14708 :     getNode(ISD::ANY_EXTEND, DL, VT, Op) :
    1085       60101 :     getNode(ISD::TRUNCATE, DL, VT, Op);
    1086             : }
    1087             : 
    1088      235056 : SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
    1089      235056 :   return VT.bitsGT(Op.getValueType()) ?
    1090       36677 :     getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
    1091      235056 :     getNode(ISD::TRUNCATE, DL, VT, Op);
    1092             : }
    1093             : 
    1094      831714 : SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
    1095      831714 :   return VT.bitsGT(Op.getValueType()) ?
    1096       13443 :     getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
    1097      831714 :     getNode(ISD::TRUNCATE, DL, VT, Op);
    1098             : }
    1099             : 
    1100        1208 : SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT,
    1101             :                                         EVT OpVT) {
    1102        2416 :   if (VT.bitsLE(Op.getValueType()))
    1103         726 :     return getNode(ISD::TRUNCATE, SL, VT, Op);
    1104             : 
    1105         482 :   TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
    1106         482 :   return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
    1107             : }
    1108             : 
    1109      169501 : SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
    1110             :   assert(!VT.isVector() &&
    1111             :          "getZeroExtendInReg should use the vector element type instead of "
    1112             :          "the vector type!");
    1113      344779 :   if (Op.getValueType().getScalarType() == VT) return Op;
    1114      163877 :   unsigned BitWidth = Op.getScalarValueSizeInBits();
    1115             :   APInt Imm = APInt::getLowBitsSet(BitWidth,
    1116      163877 :                                    VT.getSizeInBits());
    1117             :   return getNode(ISD::AND, DL, Op.getValueType(), Op,
    1118      327754 :                  getConstant(Imm, DL, Op.getValueType()));
    1119             : }
    1120             : 
    1121         292 : SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, const SDLoc &DL,
    1122             :                                               EVT VT) {
    1123             :   assert(VT.isVector() && "This DAG node is restricted to vector types.");
    1124             :   assert(VT.getSizeInBits() == Op.getValueSizeInBits() &&
    1125             :          "The sizes of the input and result must match in order to perform the "
    1126             :          "extend in-register.");
    1127             :   assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
    1128             :          "The destination vector type must have fewer lanes than the input.");
    1129         292 :   return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
    1130             : }
    1131             : 
    1132        1254 : SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, const SDLoc &DL,
    1133             :                                                EVT VT) {
    1134             :   assert(VT.isVector() && "This DAG node is restricted to vector types.");
    1135             :   assert(VT.getSizeInBits() == Op.getValueSizeInBits() &&
    1136             :          "The sizes of the input and result must match in order to perform the "
    1137             :          "extend in-register.");
    1138             :   assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
    1139             :          "The destination vector type must have fewer lanes than the input.");
    1140        1254 :   return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
    1141             : }
    1142             : 
    1143        2302 : SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, const SDLoc &DL,
    1144             :                                                EVT VT) {
    1145             :   assert(VT.isVector() && "This DAG node is restricted to vector types.");
    1146             :   assert(VT.getSizeInBits() == Op.getValueSizeInBits() &&
    1147             :          "The sizes of the input and result must match in order to perform the "
    1148             :          "extend in-register.");
    1149             :   assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
    1150             :          "The destination vector type must have fewer lanes than the input.");
    1151        2302 :   return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
    1152             : }
    1153             : 
    1154             : /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
    1155       14141 : SDValue SelectionDAG::getNOT(const SDLoc &DL, SDValue Val, EVT VT) {
    1156       14141 :   EVT EltVT = VT.getScalarType();
    1157             :   SDValue NegOne =
    1158       28282 :     getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
    1159       14141 :   return getNode(ISD::XOR, DL, VT, Val, NegOne);
    1160             : }
    1161             : 
    1162         108 : SDValue SelectionDAG::getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT) {
    1163         108 :   SDValue TrueValue = getBoolConstant(true, DL, VT, VT);
    1164         108 :   return getNode(ISD::XOR, DL, VT, Val, TrueValue);
    1165             : }
    1166             : 
    1167       10385 : SDValue SelectionDAG::getBoolConstant(bool V, const SDLoc &DL, EVT VT,
    1168             :                                       EVT OpVT) {
    1169       10385 :   if (!V)
    1170        8749 :     return getConstant(0, DL, VT);
    1171             : 
    1172        1636 :   switch (TLI->getBooleanContents(OpVT)) {
    1173        1548 :   case TargetLowering::ZeroOrOneBooleanContent:
    1174             :   case TargetLowering::UndefinedBooleanContent:
    1175        1548 :     return getConstant(1, DL, VT);
    1176          88 :   case TargetLowering::ZeroOrNegativeOneBooleanContent:
    1177          88 :     return getAllOnesConstant(DL, VT);
    1178             :   }
    1179           0 :   llvm_unreachable("Unexpected boolean content enum!");
    1180             : }
    1181             : 
    1182    26387404 : SDValue SelectionDAG::getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
    1183             :                                   bool isT, bool isO) {
    1184    26387404 :   EVT EltVT = VT.getScalarType();
    1185             :   assert((EltVT.getSizeInBits() >= 64 ||
    1186             :          (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
    1187             :          "getConstant with a uint64_t value that doesn't fit in the type!");
    1188    52774810 :   return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
    1189             : }
    1190             : 
    1191    29140156 : SDValue SelectionDAG::getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
    1192             :                                   bool isT, bool isO) {
    1193    29140156 :   return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
    1194             : }
    1195             : 
    1196    30891779 : SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
    1197             :                                   EVT VT, bool isT, bool isO) {
    1198             :   assert(VT.isInteger() && "Cannot create FP integer constant!");
    1199             : 
    1200    30891779 :   EVT EltVT = VT.getScalarType();
    1201             :   const ConstantInt *Elt = &Val;
    1202             : 
    1203             :   // In some cases the vector type is legal but the element type is illegal and
    1204             :   // needs to be promoted, for example v8i8 on ARM.  In this case, promote the
    1205             :   // inserted value (the type does not need to match the vector element type).
    1206             :   // Any extra bits introduced will be truncated away.
    1207    30891778 :   if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
    1208             :       TargetLowering::TypePromoteInteger) {
    1209        7474 :    EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
    1210        7474 :    APInt NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits());
    1211        7474 :    Elt = ConstantInt::get(*getContext(), NewVal);
    1212             :   }
    1213             :   // In other cases the element type is illegal and needs to be expanded, for
    1214             :   // example v2i64 on MIPS32. In this case, find the nearest legal type, split
    1215             :   // the value into n parts and use a vector type with n-times the elements.
    1216             :   // Then bitcast to the type requested.
    1217             :   // Legalizing constants too early makes the DAGCombiner's job harder so we
    1218             :   // only legalize if the DAG tells us we must produce legal types.
    1219    48318994 :   else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
    1220      147055 :            TLI->getTypeAction(*getContext(), EltVT) ==
    1221             :            TargetLowering::TypeExpandInteger) {
    1222             :     const APInt &NewVal = Elt->getValue();
    1223         301 :     EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
    1224         301 :     unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
    1225         301 :     unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
    1226         301 :     EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
    1227             : 
    1228             :     // Check the temporary vector is the correct size. If this fails then
    1229             :     // getTypeToTransformTo() probably returned a type whose size (in bits)
    1230             :     // isn't a power-of-2 factor of the requested type size.
    1231             :     assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
    1232             : 
    1233             :     SmallVector<SDValue, 2> EltParts;
    1234         903 :     for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
    1235        1204 :       EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
    1236        1204 :                                            .zextOrTrunc(ViaEltSizeInBits), DL,
    1237        1204 :                                      ViaEltVT, isT, isO));
    1238             :     }
    1239             : 
    1240             :     // EltParts is currently in little endian order. If we actually want
    1241             :     // big-endian order then reverse it now.
    1242         301 :     if (getDataLayout().isBigEndian())
    1243             :       std::reverse(EltParts.begin(), EltParts.end());
    1244             : 
    1245             :     // The elements must be reversed when the element order is different
    1246             :     // to the endianness of the elements (because the BITCAST is itself a
    1247             :     // vector shuffle in this situation). However, we do not need any code to
    1248             :     // perform this reversal because getConstant() is producing a vector
    1249             :     // splat.
    1250             :     // This situation occurs in MIPS MSA.
    1251             : 
    1252             :     SmallVector<SDValue, 8> Ops;
    1253         983 :     for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
    1254         682 :       Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
    1255             : 
    1256         301 :     SDValue V = getNode(ISD::BITCAST, DL, VT, getBuildVector(ViaVecVT, DL, Ops));
    1257         301 :     return V;
    1258             :   }
    1259             : 
    1260             :   assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
    1261             :          "APInt size does not match type size!");
    1262    30891477 :   unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
    1263             :   FoldingSetNodeID ID;
    1264    30891477 :   AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
    1265    30891478 :   ID.AddPointer(Elt);
    1266             :   ID.AddBoolean(isO);
    1267    30891478 :   void *IP = nullptr;
    1268             :   SDNode *N = nullptr;
    1269    30891478 :   if ((N = FindNodeOrInsertPos(ID, DL, IP)))
    1270    22521224 :     if (!VT.isVector())
    1271    22344560 :       return SDValue(N, 0);
    1272             : 
    1273     8546917 :   if (!N) {
    1274     8370253 :     N = newSDNode<ConstantSDNode>(isT, isO, Elt, EltVT);
    1275     8370253 :     CSEMap.InsertNode(N, IP);
    1276     8370254 :     InsertNode(N);
    1277             :     NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
    1278             :   }
    1279             : 
    1280             :   SDValue Result(N, 0);
    1281     8546918 :   if (VT.isVector())
    1282      399995 :     Result = getSplatBuildVector(VT, DL, Result);
    1283             : 
    1284     8546918 :   return Result;
    1285             : }
    1286             : 
    1287     4363189 : SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, const SDLoc &DL,
    1288             :                                         bool isTarget) {
    1289     8726378 :   return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
    1290             : }
    1291             : 
    1292       20500 : SDValue SelectionDAG::getConstantFP(const APFloat &V, const SDLoc &DL, EVT VT,
    1293             :                                     bool isTarget) {
    1294       20500 :   return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
    1295             : }
    1296             : 
    1297       43796 : SDValue SelectionDAG::getConstantFP(const ConstantFP &V, const SDLoc &DL,
    1298             :                                     EVT VT, bool isTarget) {
    1299             :   assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
    1300             : 
    1301       43796 :   EVT EltVT = VT.getScalarType();
    1302             : 
    1303             :   // Do the map lookup using the actual bit pattern for the floating point
    1304             :   // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
    1305             :   // we don't have issues with SNANs.
    1306       43796 :   unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
    1307             :   FoldingSetNodeID ID;
    1308       43796 :   AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
    1309       43796 :   ID.AddPointer(&V);
    1310       43796 :   void *IP = nullptr;
    1311             :   SDNode *N = nullptr;
    1312       43796 :   if ((N = FindNodeOrInsertPos(ID, DL, IP)))
    1313        7251 :     if (!VT.isVector())
    1314        5875 :       return SDValue(N, 0);
    1315             : 
    1316       37921 :   if (!N) {
    1317       36545 :     N = newSDNode<ConstantFPSDNode>(isTarget, &V, EltVT);
    1318       36545 :     CSEMap.InsertNode(N, IP);
    1319       36545 :     InsertNode(N);
    1320             :   }
    1321             : 
    1322             :   SDValue Result(N, 0);
    1323       37921 :   if (VT.isVector())
    1324        4362 :     Result = getSplatBuildVector(VT, DL, Result);
    1325             :   NewSDValueDbgMsg(Result, "Creating fp constant: ", this);
    1326       37921 :   return Result;
    1327             : }
    1328             : 
    1329        7139 : SDValue SelectionDAG::getConstantFP(double Val, const SDLoc &DL, EVT VT,
    1330             :                                     bool isTarget) {
    1331        7139 :   EVT EltVT = VT.getScalarType();
    1332             :   if (EltVT == MVT::f32)
    1333        9478 :     return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
    1334             :   else if (EltVT == MVT::f64)
    1335        4432 :     return getConstantFP(APFloat(Val), DL, VT, isTarget);
    1336             :   else if (EltVT == MVT::f80 || EltVT == MVT::f128 || EltVT == MVT::ppcf128 ||
    1337             :            EltVT == MVT::f16) {
    1338             :     bool Ignored;
    1339         184 :     APFloat APF = APFloat(Val);
    1340         184 :     APF.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
    1341             :                 &Ignored);
    1342         184 :     return getConstantFP(APF, DL, VT, isTarget);
    1343             :   } else
    1344           0 :     llvm_unreachable("Unsupported type in getConstantFP");
    1345             : }
    1346             : 
    1347     3810872 : SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, const SDLoc &DL,
    1348             :                                        EVT VT, int64_t Offset, bool isTargetGA,
    1349             :                                        unsigned char TargetFlags) {
    1350             :   assert((TargetFlags == 0 || isTargetGA) &&
    1351             :          "Cannot set target flags on target-independent globals");
    1352             : 
    1353             :   // Truncate (with sign-extension) the offset value to the pointer size.
    1354     3810872 :   unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
    1355     3810872 :   if (BitWidth < 64)
    1356      827881 :     Offset = SignExtend64(Offset, BitWidth);
    1357             : 
    1358             :   unsigned Opc;
    1359     3810872 :   if (GV->isThreadLocal())
    1360        2319 :     Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
    1361             :   else
    1362     3808553 :     Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
    1363             : 
    1364             :   FoldingSetNodeID ID;
    1365     3810872 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1366     3810872 :   ID.AddPointer(GV);
    1367     3810872 :   ID.AddInteger(Offset);
    1368     3810872 :   ID.AddInteger(TargetFlags);
    1369     3810872 :   void *IP = nullptr;
    1370     3810872 :   if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    1371      322344 :     return SDValue(E, 0);
    1372             : 
    1373     3488528 :   auto *N = newSDNode<GlobalAddressSDNode>(
    1374     3488528 :       Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VT, Offset, TargetFlags);
    1375     3488528 :   CSEMap.InsertNode(N, IP);
    1376     3488528 :     InsertNode(N);
    1377     3488528 :   return SDValue(N, 0);
    1378             : }
    1379             : 
    1380     6697702 : SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
    1381     6697702 :   unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
    1382             :   FoldingSetNodeID ID;
    1383     6697702 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1384     6697702 :   ID.AddInteger(FI);
    1385     6697702 :   void *IP = nullptr;
    1386     6697702 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1387     1550198 :     return SDValue(E, 0);
    1388             : 
    1389     5147504 :   auto *N = newSDNode<FrameIndexSDNode>(FI, VT, isTarget);
    1390     5147504 :   CSEMap.InsertNode(N, IP);
    1391     5147504 :   InsertNode(N);
    1392     5147504 :   return SDValue(N, 0);
    1393             : }
    1394             : 
    1395        7839 : SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
    1396             :                                    unsigned char TargetFlags) {
    1397             :   assert((TargetFlags == 0 || isTarget) &&
    1398             :          "Cannot set target flags on target-independent jump tables");
    1399        7839 :   unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
    1400             :   FoldingSetNodeID ID;
    1401        7839 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1402        7839 :   ID.AddInteger(JTI);
    1403        7839 :   ID.AddInteger(TargetFlags);
    1404        7839 :   void *IP = nullptr;
    1405        7839 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1406          51 :     return SDValue(E, 0);
    1407             : 
    1408        7788 :   auto *N = newSDNode<JumpTableSDNode>(JTI, VT, isTarget, TargetFlags);
    1409        7788 :   CSEMap.InsertNode(N, IP);
    1410        7788 :   InsertNode(N);
    1411        7788 :   return SDValue(N, 0);
    1412             : }
    1413             : 
    1414       98406 : SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
    1415             :                                       unsigned Alignment, int Offset,
    1416             :                                       bool isTarget,
    1417             :                                       unsigned char TargetFlags) {
    1418             :   assert((TargetFlags == 0 || isTarget) &&
    1419             :          "Cannot set target flags on target-independent globals");
    1420       98406 :   if (Alignment == 0)
    1421       33197 :     Alignment = MF->getFunction().optForSize()
    1422       33197 :                     ? getDataLayout().getABITypeAlignment(C->getType())
    1423       32991 :                     : getDataLayout().getPrefTypeAlignment(C->getType());
    1424       98406 :   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
    1425             :   FoldingSetNodeID ID;
    1426       98406 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1427       98406 :   ID.AddInteger(Alignment);
    1428       98406 :   ID.AddInteger(Offset);
    1429       98406 :   ID.AddPointer(C);
    1430       98406 :   ID.AddInteger(TargetFlags);
    1431       98406 :   void *IP = nullptr;
    1432       98406 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1433        5002 :     return SDValue(E, 0);
    1434             : 
    1435       93404 :   auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
    1436             :                                           TargetFlags);
    1437       93404 :   CSEMap.InsertNode(N, IP);
    1438       93404 :   InsertNode(N);
    1439       93404 :   return SDValue(N, 0);
    1440             : }
    1441             : 
    1442         273 : SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
    1443             :                                       unsigned Alignment, int Offset,
    1444             :                                       bool isTarget,
    1445             :                                       unsigned char TargetFlags) {
    1446             :   assert((TargetFlags == 0 || isTarget) &&
    1447             :          "Cannot set target flags on target-independent globals");
    1448         273 :   if (Alignment == 0)
    1449           0 :     Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
    1450         273 :   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
    1451             :   FoldingSetNodeID ID;
    1452         273 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1453         273 :   ID.AddInteger(Alignment);
    1454         273 :   ID.AddInteger(Offset);
    1455         273 :   C->addSelectionDAGCSEId(ID);
    1456         273 :   ID.AddInteger(TargetFlags);
    1457         273 :   void *IP = nullptr;
    1458         273 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1459           0 :     return SDValue(E, 0);
    1460             : 
    1461         273 :   auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
    1462             :                                           TargetFlags);
    1463         273 :   CSEMap.InsertNode(N, IP);
    1464         273 :   InsertNode(N);
    1465         273 :   return SDValue(N, 0);
    1466             : }
    1467             : 
    1468           0 : SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
    1469             :                                      unsigned char TargetFlags) {
    1470             :   FoldingSetNodeID ID;
    1471           0 :   AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
    1472           0 :   ID.AddInteger(Index);
    1473           0 :   ID.AddInteger(Offset);
    1474           0 :   ID.AddInteger(TargetFlags);
    1475           0 :   void *IP = nullptr;
    1476           0 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1477           0 :     return SDValue(E, 0);
    1478             : 
    1479           0 :   auto *N = newSDNode<TargetIndexSDNode>(Index, VT, Offset, TargetFlags);
    1480           0 :   CSEMap.InsertNode(N, IP);
    1481           0 :   InsertNode(N);
    1482           0 :   return SDValue(N, 0);
    1483             : }
    1484             : 
    1485      736865 : SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
    1486             :   FoldingSetNodeID ID;
    1487      736865 :   AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
    1488      736865 :   ID.AddPointer(MBB);
    1489      736865 :   void *IP = nullptr;
    1490      736865 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1491          45 :     return SDValue(E, 0);
    1492             : 
    1493      736820 :   auto *N = newSDNode<BasicBlockSDNode>(MBB);
    1494      736820 :   CSEMap.InsertNode(N, IP);
    1495      736820 :   InsertNode(N);
    1496      736820 :   return SDValue(N, 0);
    1497             : }
    1498             : 
    1499      121786 : SDValue SelectionDAG::getValueType(EVT VT) {
    1500      121786 :   if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
    1501      114571 :       ValueTypeNodes.size())
    1502        6045 :     ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
    1503             : 
    1504      121786 :   SDNode *&N = VT.isExtended() ?
    1505      121786 :     ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
    1506             : 
    1507      121786 :   if (N) return SDValue(N, 0);
    1508       93233 :   N = newSDNode<VTSDNode>(VT);
    1509       93233 :   InsertNode(N);
    1510       93233 :   return SDValue(N, 0);
    1511             : }
    1512             : 
    1513       14752 : SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
    1514       14752 :   SDNode *&N = ExternalSymbols[Sym];
    1515       14752 :   if (N) return SDValue(N, 0);
    1516       12058 :   N = newSDNode<ExternalSymbolSDNode>(false, Sym, 0, VT);
    1517       12058 :   InsertNode(N);
    1518       12058 :   return SDValue(N, 0);
    1519             : }
    1520             : 
    1521          70 : SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
    1522          70 :   SDNode *&N = MCSymbols[Sym];
    1523          70 :   if (N)
    1524          17 :     return SDValue(N, 0);
    1525          53 :   N = newSDNode<MCSymbolSDNode>(Sym, VT);
    1526          53 :   InsertNode(N);
    1527          53 :   return SDValue(N, 0);
    1528             : }
    1529             : 
    1530       34186 : SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
    1531             :                                               unsigned char TargetFlags) {
    1532             :   SDNode *&N =
    1533       34186 :     TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
    1534       34186 :                                                                TargetFlags)];
    1535       34186 :   if (N) return SDValue(N, 0);
    1536       23084 :   N = newSDNode<ExternalSymbolSDNode>(true, Sym, TargetFlags, VT);
    1537       23084 :   InsertNode(N);
    1538       23084 :   return SDValue(N, 0);
    1539             : }
    1540             : 
    1541      253682 : SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
    1542      507364 :   if ((unsigned)Cond >= CondCodeNodes.size())
    1543       12224 :     CondCodeNodes.resize(Cond+1);
    1544             : 
    1545      507364 :   if (!CondCodeNodes[Cond]) {
    1546      186964 :     auto *N = newSDNode<CondCodeSDNode>(Cond);
    1547      186964 :     CondCodeNodes[Cond] = N;
    1548      186964 :     InsertNode(N);
    1549             :   }
    1550             : 
    1551      507364 :   return SDValue(CondCodeNodes[Cond], 0);
    1552             : }
    1553             : 
    1554             : /// Swaps the values of N1 and N2. Swaps all indices in the shuffle mask M that
    1555             : /// point at N1 to point at N2 and indices that point at N2 to point at N1.
    1556        1262 : static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef<int> M) {
    1557             :   std::swap(N1, N2);
    1558             :   ShuffleVectorSDNode::commuteMask(M);
    1559        1262 : }
    1560             : 
    1561      122565 : SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
    1562             :                                        SDValue N2, ArrayRef<int> Mask) {
    1563             :   assert(VT.getVectorNumElements() == Mask.size() &&
    1564             :            "Must have the same number of vector elements as mask elements!");
    1565             :   assert(VT == N1.getValueType() && VT == N2.getValueType() &&
    1566             :          "Invalid VECTOR_SHUFFLE");
    1567             : 
    1568             :   // Canonicalize shuffle undef, undef -> undef
    1569      245130 :   if (N1.isUndef() && N2.isUndef())
    1570         104 :     return getUNDEF(VT);
    1571             : 
    1572             :   // Validate that all indices in Mask are within the range of the elements
    1573             :   // input to the shuffle.
    1574      122461 :   int NElts = Mask.size();
    1575             :   assert(llvm::all_of(Mask,
    1576             :                       [&](int M) { return M < (NElts * 2) && M >= -1; }) &&
    1577             :          "Index out of range");
    1578             : 
    1579             :   // Copy the mask so we can do any needed cleanup.
    1580             :   SmallVector<int, 8> MaskVec(Mask.begin(), Mask.end());
    1581             : 
    1582             :   // Canonicalize shuffle v, v -> v, undef
    1583      122461 :   if (N1 == N2) {
    1584        7933 :     N2 = getUNDEF(VT);
    1585       67848 :     for (int i = 0; i != NElts; ++i)
    1586      119830 :       if (MaskVec[i] >= NElts) MaskVec[i] -= NElts;
    1587             :   }
    1588             : 
    1589             :   // Canonicalize shuffle undef, v -> v, undef.  Commute the shuffle mask.
    1590      244922 :   if (N1.isUndef())
    1591         183 :     commuteShuffle(N1, N2, MaskVec);
    1592             : 
    1593      122461 :   if (TLI->hasVectorBlend()) {
    1594             :     // If shuffling a splat, try to blend the splat instead. We do this here so
    1595             :     // that even when this arises during lowering we don't have to re-handle it.
    1596             :     auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
    1597             :       BitVector UndefElements;
    1598             :       SDValue Splat = BV->getSplatValue(&UndefElements);
    1599             :       if (!Splat)
    1600             :         return;
    1601             : 
    1602             :       for (int i = 0; i < NElts; ++i) {
    1603             :         if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + NElts))
    1604             :           continue;
    1605             : 
    1606             :         // If this input comes from undef, mark it as such.
    1607             :         if (UndefElements[MaskVec[i] - Offset]) {
    1608             :           MaskVec[i] = -1;
    1609             :           continue;
    1610             :         }
    1611             : 
    1612             :         // If we can blend a non-undef lane, use that instead.
    1613             :         if (!UndefElements[i])
    1614             :           MaskVec[i] = i + Offset;
    1615             :       }
    1616      112888 :     };
    1617             :     if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
    1618        4561 :       BlendSplat(N1BV, 0);
    1619             :     if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
    1620        5291 :       BlendSplat(N2BV, NElts);
    1621             :   }
    1622             : 
    1623             :   // Canonicalize all index into lhs, -> shuffle lhs, undef
    1624             :   // Canonicalize all index into rhs, -> shuffle rhs, undef
    1625             :   bool AllLHS = true, AllRHS = true;
    1626      122461 :   bool N2Undef = N2.isUndef();
    1627     1490936 :   for (int i = 0; i != NElts; ++i) {
    1628     2736950 :     if (MaskVec[i] >= NElts) {
    1629      176010 :       if (N2Undef)
    1630        3240 :         MaskVec[i] = -1;
    1631             :       else
    1632             :         AllLHS = false;
    1633     1192465 :     } else if (MaskVec[i] >= 0) {
    1634             :       AllRHS = false;
    1635             :     }
    1636             :   }
    1637      122461 :   if (AllLHS && AllRHS)
    1638         210 :     return getUNDEF(VT);
    1639      122251 :   if (AllLHS && !N2Undef)
    1640        3752 :     N2 = getUNDEF(VT);
    1641      122251 :   if (AllRHS) {
    1642        1079 :     N1 = getUNDEF(VT);
    1643        1079 :     commuteShuffle(N1, N2, MaskVec);
    1644             :   }
    1645             :   // Reset our undef status after accounting for the mask.
    1646      122251 :   N2Undef = N2.isUndef();
    1647             :   // Re-check whether both sides ended up undef.
    1648      244502 :   if (N1.isUndef() && N2Undef)
    1649           0 :     return getUNDEF(VT);
    1650             : 
    1651             :   // If Identity shuffle return that node.
    1652             :   bool Identity = true, AllSame = true;
    1653     1488475 :   for (int i = 0; i != NElts; ++i) {
    1654     2732448 :     if (MaskVec[i] >= 0 && MaskVec[i] != i) Identity = false;
    1655     1366224 :     if (MaskVec[i] != MaskVec[0]) AllSame = false;
    1656             :   }
    1657      122251 :   if (Identity && NElts)
    1658       13881 :     return N1;
    1659             : 
    1660             :   // Shuffling a constant splat doesn't change the result.
    1661      108370 :   if (N2Undef) {
    1662       63738 :     SDValue V = N1;
    1663             : 
    1664             :     // Look through any bitcasts. We check that these don't change the number
    1665             :     // (and size) of elements and just changes their types.
    1666       80604 :     while (V.getOpcode() == ISD::BITCAST)
    1667       16866 :       V = V->getOperand(0);
    1668             : 
    1669             :     // A splat should always show up as a build vector node.
    1670             :     if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
    1671             :       BitVector UndefElements;
    1672        1979 :       SDValue Splat = BV->getSplatValue(&UndefElements);
    1673             :       // If this is a splat of an undef, shuffling it is also undef.
    1674        1979 :       if (Splat && Splat.isUndef())
    1675           0 :         return getUNDEF(VT);
    1676             : 
    1677             :       bool SameNumElts =
    1678        1979 :           V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
    1679             : 
    1680             :       // We only have a splat which can skip shuffles if there is a splatted
    1681             :       // value and no undef lanes rearranged by the shuffle.
    1682        2367 :       if (Splat && UndefElements.none()) {
    1683             :         // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
    1684             :         // number of elements match or the value splatted is a zero constant.
    1685         242 :         if (SameNumElts)
    1686         215 :           return N1;
    1687             :         if (auto *C = dyn_cast<ConstantSDNode>(Splat))
    1688          54 :           if (C->isNullValue())
    1689          20 :             return N1;
    1690             :       }
    1691             : 
    1692             :       // If the shuffle itself creates a splat, build the vector directly.
    1693        1744 :       if (AllSame && SameNumElts) {
    1694         614 :         EVT BuildVT = BV->getValueType(0);
    1695         614 :         const SDValue &Splatted = BV->getOperand(MaskVec[0]);
    1696         614 :         SDValue NewBV = getSplatBuildVector(BuildVT, dl, Splatted);
    1697             : 
    1698             :         // We may have jumped through bitcasts, so the type of the
    1699             :         // BUILD_VECTOR may not match the type of the shuffle.
    1700         614 :         if (BuildVT != VT)
    1701           0 :           NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
    1702         614 :         return NewBV;
    1703             :       }
    1704             :     }
    1705             :   }
    1706             : 
    1707             :   FoldingSetNodeID ID;
    1708      107521 :   SDValue Ops[2] = { N1, N2 };
    1709      107521 :   AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
    1710     1376713 :   for (int i = 0; i != NElts; ++i)
    1711     2538384 :     ID.AddInteger(MaskVec[i]);
    1712             : 
    1713      107521 :   void* IP = nullptr;
    1714      107521 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
    1715        1794 :     return SDValue(E, 0);
    1716             : 
    1717             :   // Allocate the mask array for the node out of the BumpPtrAllocator, since
    1718             :   // SDNode doesn't have access to it.  This memory will be "leaked" when
    1719             :   // the node is deallocated, but recovered when the NodeAllocator is released.
    1720      105727 :   int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
    1721             :   std::copy(MaskVec.begin(), MaskVec.end(), MaskAlloc);
    1722             : 
    1723      211454 :   auto *N = newSDNode<ShuffleVectorSDNode>(VT, dl.getIROrder(),
    1724             :                                            dl.getDebugLoc(), MaskAlloc);
    1725      105727 :   createOperands(N, Ops);
    1726             : 
    1727      105727 :   CSEMap.InsertNode(N, IP);
    1728      105727 :   InsertNode(N);
    1729             :   SDValue V = SDValue(N, 0);
    1730             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    1731      105727 :   return V;
    1732             : }
    1733             : 
    1734        5674 : SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
    1735        5674 :   EVT VT = SV.getValueType(0);
    1736        5674 :   SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
    1737             :   ShuffleVectorSDNode::commuteMask(MaskVec);
    1738             : 
    1739        5674 :   SDValue Op0 = SV.getOperand(0);
    1740        5674 :   SDValue Op1 = SV.getOperand(1);
    1741       11348 :   return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec);
    1742             : }
    1743             : 
    1744    21264006 : SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
    1745             :   FoldingSetNodeID ID;
    1746    21264006 :   AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
    1747    21264006 :   ID.AddInteger(RegNo);
    1748    21264006 :   void *IP = nullptr;
    1749    21264006 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1750    14444240 :     return SDValue(E, 0);
    1751             : 
    1752     6819766 :   auto *N = newSDNode<RegisterSDNode>(RegNo, VT);
    1753     6819766 :   N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
    1754     6819766 :   CSEMap.InsertNode(N, IP);
    1755     6819766 :   InsertNode(N);
    1756     6819766 :   return SDValue(N, 0);
    1757             : }
    1758             : 
    1759     1023502 : SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
    1760             :   FoldingSetNodeID ID;
    1761     1023502 :   AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
    1762     1023502 :   ID.AddPointer(RegMask);
    1763     1023502 :   void *IP = nullptr;
    1764     1023502 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1765      418759 :     return SDValue(E, 0);
    1766             : 
    1767      604743 :   auto *N = newSDNode<RegisterMaskSDNode>(RegMask);
    1768      604743 :   CSEMap.InsertNode(N, IP);
    1769      604743 :   InsertNode(N);
    1770      604743 :   return SDValue(N, 0);
    1771             : }
    1772             : 
    1773     1018484 : SDValue SelectionDAG::getEHLabel(const SDLoc &dl, SDValue Root,
    1774             :                                  MCSymbol *Label) {
    1775     1018484 :   return getLabelNode(ISD::EH_LABEL, dl, Root, Label);
    1776             : }
    1777             : 
    1778     1018485 : SDValue SelectionDAG::getLabelNode(unsigned Opcode, const SDLoc &dl,
    1779             :                                    SDValue Root, MCSymbol *Label) {
    1780             :   FoldingSetNodeID ID;
    1781     1018485 :   SDValue Ops[] = { Root };
    1782     1018485 :   AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), Ops);
    1783     1018485 :   ID.AddPointer(Label);
    1784     1018485 :   void *IP = nullptr;
    1785     1018485 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1786           0 :     return SDValue(E, 0);
    1787             : 
    1788     2036970 :   auto *N = newSDNode<LabelSDNode>(dl.getIROrder(), dl.getDebugLoc(), Label);
    1789     1018485 :   createOperands(N, Ops);
    1790             : 
    1791     1018485 :   CSEMap.InsertNode(N, IP);
    1792     1018485 :   InsertNode(N);
    1793     1018485 :   return SDValue(N, 0);
    1794             : }
    1795             : 
    1796         280 : SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
    1797             :                                       int64_t Offset,
    1798             :                                       bool isTarget,
    1799             :                                       unsigned char TargetFlags) {
    1800         280 :   unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
    1801             : 
    1802             :   FoldingSetNodeID ID;
    1803         280 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1804         280 :   ID.AddPointer(BA);
    1805         280 :   ID.AddInteger(Offset);
    1806         280 :   ID.AddInteger(TargetFlags);
    1807         280 :   void *IP = nullptr;
    1808         280 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1809           2 :     return SDValue(E, 0);
    1810             : 
    1811         278 :   auto *N = newSDNode<BlockAddressSDNode>(Opc, VT, BA, Offset, TargetFlags);
    1812         278 :   CSEMap.InsertNode(N, IP);
    1813         278 :   InsertNode(N);
    1814         278 :   return SDValue(N, 0);
    1815             : }
    1816             : 
    1817         738 : SDValue SelectionDAG::getSrcValue(const Value *V) {
    1818             :   assert((!V || V->getType()->isPointerTy()) &&
    1819             :          "SrcValue is not a pointer?");
    1820             : 
    1821             :   FoldingSetNodeID ID;
    1822         738 :   AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
    1823         738 :   ID.AddPointer(V);
    1824             : 
    1825         738 :   void *IP = nullptr;
    1826         738 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1827         179 :     return SDValue(E, 0);
    1828             : 
    1829         559 :   auto *N = newSDNode<SrcValueSDNode>(V);
    1830         559 :   CSEMap.InsertNode(N, IP);
    1831         559 :   InsertNode(N);
    1832         559 :   return SDValue(N, 0);
    1833             : }
    1834             : 
    1835       17161 : SDValue SelectionDAG::getMDNode(const MDNode *MD) {
    1836             :   FoldingSetNodeID ID;
    1837       17161 :   AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
    1838       17161 :   ID.AddPointer(MD);
    1839             : 
    1840       17161 :   void *IP = nullptr;
    1841       17161 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1842           0 :     return SDValue(E, 0);
    1843             : 
    1844       17161 :   auto *N = newSDNode<MDNodeSDNode>(MD);
    1845       17161 :   CSEMap.InsertNode(N, IP);
    1846       17161 :   InsertNode(N);
    1847       17161 :   return SDValue(N, 0);
    1848             : }
    1849             : 
    1850      499696 : SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
    1851          50 :   if (VT == V.getValueType())
    1852      111019 :     return V;
    1853             : 
    1854      777354 :   return getNode(ISD::BITCAST, SDLoc(V), VT, V);
    1855             : }
    1856             : 
    1857         213 : SDValue SelectionDAG::getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr,
    1858             :                                        unsigned SrcAS, unsigned DestAS) {
    1859         213 :   SDValue Ops[] = {Ptr};
    1860             :   FoldingSetNodeID ID;
    1861         213 :   AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
    1862         213 :   ID.AddInteger(SrcAS);
    1863         213 :   ID.AddInteger(DestAS);
    1864             : 
    1865         213 :   void *IP = nullptr;
    1866         213 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
    1867           0 :     return SDValue(E, 0);
    1868             : 
    1869         426 :   auto *N = newSDNode<AddrSpaceCastSDNode>(dl.getIROrder(), dl.getDebugLoc(),
    1870             :                                            VT, SrcAS, DestAS);
    1871         213 :   createOperands(N, Ops);
    1872             : 
    1873         213 :   CSEMap.InsertNode(N, IP);
    1874         213 :   InsertNode(N);
    1875         213 :   return SDValue(N, 0);
    1876             : }
    1877             : 
    1878             : /// getShiftAmountOperand - Return the specified value casted to
    1879             : /// the target's desired shift amount type.
    1880      281620 : SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
    1881      281620 :   EVT OpTy = Op.getValueType();
    1882      281620 :   EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
    1883      563240 :   if (OpTy == ShTy || OpTy.isVector()) return Op;
    1884             : 
    1885       56020 :   return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
    1886             : }
    1887             : 
    1888          33 : SDValue SelectionDAG::expandVAArg(SDNode *Node) {
    1889             :   SDLoc dl(Node);
    1890          33 :   const TargetLowering &TLI = getTargetLoweringInfo();
    1891          33 :   const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
    1892          33 :   EVT VT = Node->getValueType(0);
    1893          33 :   SDValue Tmp1 = Node->getOperand(0);
    1894          33 :   SDValue Tmp2 = Node->getOperand(1);
    1895          33 :   unsigned Align = Node->getConstantOperandVal(3);
    1896             : 
    1897             :   SDValue VAListLoad = getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1,
    1898          66 :                                Tmp2, MachinePointerInfo(V));
    1899          33 :   SDValue VAList = VAListLoad;
    1900             : 
    1901          33 :   if (Align > TLI.getMinStackArgumentAlignment()) {
    1902             :     assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2");
    1903             : 
    1904          13 :     VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
    1905          13 :                      getConstant(Align - 1, dl, VAList.getValueType()));
    1906             : 
    1907          13 :     VAList = getNode(ISD::AND, dl, VAList.getValueType(), VAList,
    1908          13 :                      getConstant(-(int64_t)Align, dl, VAList.getValueType()));
    1909             :   }
    1910             : 
    1911             :   // Increment the pointer, VAList, to the next vaarg
    1912          33 :   Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
    1913          33 :                  getConstant(getDataLayout().getTypeAllocSize(
    1914          33 :                                                VT.getTypeForEVT(*getContext())),
    1915          33 :                              dl, VAList.getValueType()));
    1916             :   // Store the incremented VAList to the legalized pointer
    1917          33 :   Tmp1 =
    1918          33 :       getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, MachinePointerInfo(V));
    1919             :   // Load the actual argument out of the pointer VAList
    1920          33 :   return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo());
    1921             : }
    1922             : 
    1923           7 : SDValue SelectionDAG::expandVACopy(SDNode *Node) {
    1924             :   SDLoc dl(Node);
    1925             :   const TargetLowering &TLI = getTargetLoweringInfo();
    1926             :   // This defaults to loading a pointer from the input and storing it to the
    1927             :   // output, returning the chain.
    1928          14 :   const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
    1929           7 :   const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
    1930             :   SDValue Tmp1 =
    1931             :       getLoad(TLI.getPointerTy(getDataLayout()), dl, Node->getOperand(0),
    1932          14 :               Node->getOperand(2), MachinePointerInfo(VS));
    1933           7 :   return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
    1934           7 :                   MachinePointerInfo(VD));
    1935             : }
    1936             : 
    1937        2719 : SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
    1938        2719 :   MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
    1939             :   unsigned ByteSize = VT.getStoreSize();
    1940        2719 :   Type *Ty = VT.getTypeForEVT(*getContext());
    1941             :   unsigned StackAlign =
    1942        2719 :       std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
    1943             : 
    1944        2719 :   int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false);
    1945        2719 :   return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
    1946             : }
    1947             : 
    1948        3170 : SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
    1949        6340 :   unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
    1950        3170 :   Type *Ty1 = VT1.getTypeForEVT(*getContext());
    1951        3170 :   Type *Ty2 = VT2.getTypeForEVT(*getContext());
    1952        3170 :   const DataLayout &DL = getDataLayout();
    1953             :   unsigned Align =
    1954        3170 :       std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
    1955             : 
    1956        3170 :   MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
    1957        3170 :   int FrameIdx = MFI.CreateStackObject(Bytes, Align, false);
    1958        3170 :   return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
    1959             : }
    1960             : 
    1961      352678 : SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2,
    1962             :                                 ISD::CondCode Cond, const SDLoc &dl) {
    1963      352678 :   EVT OpVT = N1.getValueType();
    1964             : 
    1965             :   // These setcc operations always fold.
    1966      352678 :   switch (Cond) {
    1967             :   default: break;
    1968          35 :   case ISD::SETFALSE:
    1969          35 :   case ISD::SETFALSE2: return getBoolConstant(false, dl, VT, OpVT);
    1970          40 :   case ISD::SETTRUE:
    1971          40 :   case ISD::SETTRUE2: return getBoolConstant(true, dl, VT, OpVT);
    1972             : 
    1973             :   case ISD::SETOEQ:
    1974             :   case ISD::SETOGT:
    1975             :   case ISD::SETOGE:
    1976             :   case ISD::SETOLT:
    1977             :   case ISD::SETOLE:
    1978             :   case ISD::SETONE:
    1979             :   case ISD::SETO:
    1980             :   case ISD::SETUO:
    1981             :   case ISD::SETUEQ:
    1982             :   case ISD::SETUNE:
    1983             :     assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
    1984             :     break;
    1985             :   }
    1986             : 
    1987             :   if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
    1988      198724 :     const APInt &C2 = N2C->getAPIntValue();
    1989             :     if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
    1990        9699 :       const APInt &C1 = N1C->getAPIntValue();
    1991             : 
    1992        9699 :       switch (Cond) {
    1993           0 :       default: llvm_unreachable("Unknown integer setcc!");
    1994        7421 :       case ISD::SETEQ:  return getBoolConstant(C1 == C2, dl, VT, OpVT);
    1995         148 :       case ISD::SETNE:  return getBoolConstant(C1 != C2, dl, VT, OpVT);
    1996          23 :       case ISD::SETULT: return getBoolConstant(C1.ult(C2), dl, VT, OpVT);
    1997          19 :       case ISD::SETUGT: return getBoolConstant(C1.ugt(C2), dl, VT, OpVT);
    1998          37 :       case ISD::SETULE: return getBoolConstant(C1.ule(C2), dl, VT, OpVT);
    1999          16 :       case ISD::SETUGE: return getBoolConstant(C1.uge(C2), dl, VT, OpVT);
    2000        1961 :       case ISD::SETLT:  return getBoolConstant(C1.slt(C2), dl, VT, OpVT);
    2001          57 :       case ISD::SETGT:  return getBoolConstant(C1.sgt(C2), dl, VT, OpVT);
    2002           4 :       case ISD::SETLE:  return getBoolConstant(C1.sle(C2), dl, VT, OpVT);
    2003          13 :       case ISD::SETGE:  return getBoolConstant(C1.sge(C2), dl, VT, OpVT);
    2004             :       }
    2005             :     }
    2006             :   }
    2007             :   if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1)) {
    2008             :     if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2)) {
    2009         672 :       APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
    2010         224 :       switch (Cond) {
    2011             :       default: break;
    2012           0 :       case ISD::SETEQ:  if (R==APFloat::cmpUnordered)
    2013           0 :                           return getUNDEF(VT);
    2014             :                         LLVM_FALLTHROUGH;
    2015             :       case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
    2016          88 :                                                OpVT);
    2017           0 :       case ISD::SETNE:  if (R==APFloat::cmpUnordered)
    2018           0 :                           return getUNDEF(VT);
    2019             :                         LLVM_FALLTHROUGH;
    2020           0 :       case ISD::SETONE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
    2021           0 :                                                R==APFloat::cmpLessThan, dl, VT,
    2022           0 :                                                OpVT);
    2023           0 :       case ISD::SETLT:  if (R==APFloat::cmpUnordered)
    2024           0 :                           return getUNDEF(VT);
    2025             :                         LLVM_FALLTHROUGH;
    2026             :       case ISD::SETOLT: return getBoolConstant(R==APFloat::cmpLessThan, dl, VT,
    2027          23 :                                                OpVT);
    2028           0 :       case ISD::SETGT:  if (R==APFloat::cmpUnordered)
    2029           0 :                           return getUNDEF(VT);
    2030             :                         LLVM_FALLTHROUGH;
    2031             :       case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl,
    2032          10 :                                                VT, OpVT);
    2033           0 :       case ISD::SETLE:  if (R==APFloat::cmpUnordered)
    2034           0 :                           return getUNDEF(VT);
    2035             :                         LLVM_FALLTHROUGH;
    2036             :       case ISD::SETOLE: return getBoolConstant(R==APFloat::cmpLessThan ||
    2037             :                                                R==APFloat::cmpEqual, dl, VT,
    2038           4 :                                                OpVT);
    2039           0 :       case ISD::SETGE:  if (R==APFloat::cmpUnordered)
    2040           0 :                           return getUNDEF(VT);
    2041             :                         LLVM_FALLTHROUGH;
    2042           6 :       case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
    2043           6 :                                            R==APFloat::cmpEqual, dl, VT, OpVT);
    2044           8 :       case ISD::SETO:   return getBoolConstant(R!=APFloat::cmpUnordered, dl, VT,
    2045           8 :                                                OpVT);
    2046          23 :       case ISD::SETUO:  return getBoolConstant(R==APFloat::cmpUnordered, dl, VT,
    2047          23 :                                                OpVT);
    2048           0 :       case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||
    2049           0 :                                                R==APFloat::cmpEqual, dl, VT,
    2050           0 :                                                OpVT);
    2051          16 :       case ISD::SETUNE: return getBoolConstant(R!=APFloat::cmpEqual, dl, VT,
    2052          16 :                                                OpVT);
    2053          14 :       case ISD::SETULT: return getBoolConstant(R==APFloat::cmpUnordered ||
    2054           7 :                                                R==APFloat::cmpLessThan, dl, VT,
    2055           7 :                                                OpVT);
    2056          36 :       case ISD::SETUGT: return getBoolConstant(R==APFloat::cmpGreaterThan ||
    2057             :                                                R==APFloat::cmpUnordered, dl, VT,
    2058          36 :                                                OpVT);
    2059           1 :       case ISD::SETULE: return getBoolConstant(R!=APFloat::cmpGreaterThan, dl,
    2060           1 :                                                VT, OpVT);
    2061           2 :       case ISD::SETUGE: return getBoolConstant(R!=APFloat::cmpLessThan, dl, VT,
    2062           2 :                                                OpVT);
    2063             :       }
    2064             :     } else {
    2065             :       // Ensure that the constant occurs on the RHS.
    2066         508 :       ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
    2067             :       MVT CompVT = N1.getValueType().getSimpleVT();
    2068        1016 :       if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
    2069         290 :         return SDValue();
    2070             : 
    2071         218 :       return getSetCC(dl, VT, N2, N1, SwappedCond);
    2072             :     }
    2073             :   }
    2074             : 
    2075             :   // Could not fold it.
    2076      342172 :   return SDValue();
    2077             : }
    2078             : 
    2079             : /// See if the specified operand can be simplified with the knowledge that only
    2080             : /// the bits specified by Mask are used.
    2081      929672 : SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &Mask) {
    2082      929672 :   switch (V.getOpcode()) {
    2083             :   default:
    2084             :     break;
    2085        8147 :   case ISD::Constant: {
    2086             :     const ConstantSDNode *CV = cast<ConstantSDNode>(V.getNode());
    2087             :     assert(CV && "Const value should be ConstSDNode.");
    2088        8147 :     const APInt &CVal = CV->getAPIntValue();
    2089        8147 :     APInt NewVal = CVal & Mask;
    2090        8147 :     if (NewVal != CVal)
    2091         500 :       return getConstant(NewVal, SDLoc(V), V.getValueType());
    2092             :     break;
    2093             :   }
    2094        5871 :   case ISD::OR:
    2095             :   case ISD::XOR:
    2096             :     // If the LHS or RHS don't contribute bits to the or, drop them.
    2097        5871 :     if (MaskedValueIsZero(V.getOperand(0), Mask))
    2098         683 :       return V.getOperand(1);
    2099        5188 :     if (MaskedValueIsZero(V.getOperand(1), Mask))
    2100         776 :       return V.getOperand(0);
    2101             :     break;
    2102       48058 :   case ISD::SRL:
    2103             :     // Only look at single-use SRLs.
    2104             :     if (!V.getNode()->hasOneUse())
    2105             :       break;
    2106             :     if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
    2107             :       // See if we can recursively simplify the LHS.
    2108       44244 :       unsigned Amt = RHSC->getZExtValue();
    2109             : 
    2110             :       // Watch out for shift count overflow though.
    2111       44244 :       if (Amt >= Mask.getBitWidth())
    2112             :         break;
    2113             :       APInt NewMask = Mask << Amt;
    2114       44243 :       if (SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask))
    2115        1174 :         return getNode(ISD::SRL, SDLoc(V), V.getValueType(), SimplifyLHS,
    2116        2348 :                        V.getOperand(1));
    2117             :     }
    2118             :     break;
    2119       10973 :   case ISD::AND: {
    2120             :     // X & -1 -> X (ignoring bits which aren't demanded).
    2121       10973 :     ConstantSDNode *AndVal = isConstOrConstSplat(V.getOperand(1));
    2122       21249 :     if (AndVal && Mask.isSubsetOf(AndVal->getAPIntValue()))
    2123        1415 :       return V.getOperand(0);
    2124             :     break;
    2125             :   }
    2126         539 :   case ISD::ANY_EXTEND: {
    2127         539 :     SDValue Src = V.getOperand(0);
    2128         539 :     unsigned SrcBitWidth = Src.getScalarValueSizeInBits();
    2129             :     // Being conservative here - only peek through if we only demand bits in the
    2130             :     // non-extended source (even though the extended bits are technically undef).
    2131         539 :     if (Mask.getActiveBits() > SrcBitWidth)
    2132             :       break;
    2133         532 :     APInt SrcMask = Mask.trunc(SrcBitWidth);
    2134         532 :     if (SDValue DemandedSrc = GetDemandedBits(Src, SrcMask))
    2135         116 :       return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc);
    2136             :     break;
    2137             :   }
    2138             :   }
    2139      925316 :   return SDValue();
    2140             : }
    2141             : 
    2142             : /// SignBitIsZero - Return true if the sign bit of Op is known to be zero.  We
    2143             : /// use this predicate to simplify operations downstream.
    2144       91791 : bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
    2145       91791 :   unsigned BitWidth = Op.getScalarValueSizeInBits();
    2146       91791 :   return MaskedValueIsZero(Op, APInt::getSignMask(BitWidth), Depth);
    2147             : }
    2148             : 
    2149             : /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.  We use
    2150             : /// this predicate to simplify operations downstream.  Mask is known to be zero
    2151             : /// for bits that V cannot have.
    2152     1796618 : bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
    2153             :                                      unsigned Depth) const {
    2154     3593236 :   return Mask.isSubsetOf(computeKnownBits(Op, Depth).Zero);
    2155             : }
    2156             : 
    2157             : /// Helper function that checks to see if a node is a constant or a
    2158             : /// build vector of splat constants at least within the demanded elts.
    2159           0 : static ConstantSDNode *isConstOrDemandedConstSplat(SDValue N,
    2160             :                                                    const APInt &DemandedElts) {
    2161             :   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N))
    2162           0 :     return CN;
    2163           0 :   if (N.getOpcode() != ISD::BUILD_VECTOR)
    2164           0 :     return nullptr;
    2165           0 :   EVT VT = N.getValueType();
    2166             :   ConstantSDNode *Cst = nullptr;
    2167             :   unsigned NumElts = VT.getVectorNumElements();
    2168             :   assert(DemandedElts.getBitWidth() == NumElts && "Unexpected vector size");
    2169           0 :   for (unsigned i = 0; i != NumElts; ++i) {
    2170           0 :     if (!DemandedElts[i])
    2171           0 :       continue;
    2172             :     ConstantSDNode *C = dyn_cast<ConstantSDNode>(N.getOperand(i));
    2173           0 :     if (!C || (Cst && Cst->getAPIntValue() != C->getAPIntValue()) ||
    2174           0 :         C->getValueType(0) != VT.getScalarType())
    2175           0 :       return nullptr;
    2176             :     Cst = C;
    2177             :   }
    2178             :   return Cst;
    2179             : }
    2180             : 
    2181             : /// If a SHL/SRA/SRL node has a constant or splat constant shift amount that
    2182             : /// is less than the element bit-width of the shift node, return it.
    2183     1210300 : static const APInt *getValidShiftAmountConstant(SDValue V) {
    2184     2420600 :   if (ConstantSDNode *SA = isConstOrConstSplat(V.getOperand(1))) {
    2185             :     // Shifting more than the bitwidth is not valid.
    2186     1164627 :     const APInt &ShAmt = SA->getAPIntValue();
    2187     1164627 :     if (ShAmt.ult(V.getScalarValueSizeInBits()))
    2188     1164584 :       return &ShAmt;
    2189             :   }
    2190             :   return nullptr;
    2191             : }
    2192             : 
    2193             : /// Determine which bits of Op are known to be either zero or one and return
    2194             : /// them in Known. For vectors, the known bits are those that are shared by
    2195             : /// every vector element.
    2196    20083506 : KnownBits SelectionDAG::computeKnownBits(SDValue Op, unsigned Depth) const {
    2197    40167012 :   EVT VT = Op.getValueType();
    2198             :   APInt DemandedElts = VT.isVector()
    2199             :                            ? APInt::getAllOnesValue(VT.getVectorNumElements())
    2200    21045624 :                            : APInt(1, 1);
    2201    20083506 :   return computeKnownBits(Op, DemandedElts, Depth);
    2202             : }
    2203             : 
    2204             : /// Determine which bits of Op are known to be either zero or one and return
    2205             : /// them in Known. The DemandedElts argument allows us to only collect the known
    2206             : /// bits that are shared by the requested vector elements.
    2207    38369107 : KnownBits SelectionDAG::computeKnownBits(SDValue Op, const APInt &DemandedElts,
    2208             :                                          unsigned Depth) const {
    2209    38369107 :   unsigned BitWidth = Op.getScalarValueSizeInBits();
    2210             : 
    2211    38369107 :   KnownBits Known(BitWidth);   // Don't know anything.
    2212             : 
    2213             :   if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
    2214             :     // We know all of the bits for a constant!
    2215    16130222 :     Known.One = C->getAPIntValue();
    2216     8065111 :     Known.Zero = ~Known.One;
    2217     8065111 :     return Known;
    2218             :   }
    2219             :   if (auto *C = dyn_cast<ConstantFPSDNode>(Op)) {
    2220             :     // We know all of the bits for a constant fp!
    2221       11785 :     Known.One = C->getValueAPF().bitcastToAPInt();
    2222        5875 :     Known.Zero = ~Known.One;
    2223        5875 :     return Known;
    2224             :   }
    2225             : 
    2226    30298121 :   if (Depth == 6)
    2227             :     return Known;  // Limit search depth.
    2228             : 
    2229    29125383 :   KnownBits Known2;
    2230    29125383 :   unsigned NumElts = DemandedElts.getBitWidth();
    2231             : 
    2232    29125383 :   if (!DemandedElts)
    2233             :     return Known;  // No demanded elts, better to assume we don't know anything.
    2234             : 
    2235             :   unsigned Opcode = Op.getOpcode();
    2236    29125383 :   switch (Opcode) {
    2237      673162 :   case ISD::BUILD_VECTOR:
    2238             :     // Collect the known bits that are shared by every demanded vector element.
    2239             :     assert(NumElts == Op.getValueType().getVectorNumElements() &&
    2240             :            "Unexpected vector size");
    2241      673162 :     Known.Zero.setAllBits(); Known.One.setAllBits();
    2242     4066225 :     for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
    2243     3601502 :       if (!DemandedElts[i])
    2244     2115304 :         continue;
    2245             : 
    2246     1486198 :       SDValue SrcOp = Op.getOperand(i);
    2247     1486198 :       Known2 = computeKnownBits(SrcOp, Depth + 1);
    2248             : 
    2249             :       // BUILD_VECTOR can implicitly truncate sources, we must handle this.
    2250     1486198 :       if (SrcOp.getValueSizeInBits() != BitWidth) {
    2251             :         assert(SrcOp.getValueSizeInBits() > BitWidth &&
    2252             :                "Expected BUILD_VECTOR implicit truncation");
    2253       25001 :         Known2 = Known2.trunc(BitWidth);
    2254             :       }
    2255             : 
    2256             :       // Known bits are the values that are shared by every demanded element.
    2257             :       Known.One &= Known2.One;
    2258             :       Known.Zero &= Known2.Zero;
    2259             : 
    2260             :       // If we don't know any bits, early out.
    2261     1486198 :       if (Known.isUnknown())
    2262             :         break;
    2263      464723 :     }
    2264             :     break;
    2265             :   case ISD::VECTOR_SHUFFLE: {
    2266             :     // Collect the known bits that are shared by every vector element referenced
    2267             :     // by the shuffle.
    2268             :     APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
    2269      162933 :     Known.Zero.setAllBits(); Known.One.setAllBits();
    2270             :     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
    2271             :     assert(NumElts == SVN->getMask().size() && "Unexpected vector size");
    2272     1899558 :     for (unsigned i = 0; i != NumElts; ++i) {
    2273     1785996 :       if (!DemandedElts[i])
    2274             :         continue;
    2275             : 
    2276      549035 :       int M = SVN->getMaskElt(i);
    2277      549035 :       if (M < 0) {
    2278             :         // For UNDEF elements, we don't know anything about the common state of
    2279             :         // the shuffle result.
    2280             :         Known.resetAll();
    2281       49371 :         DemandedLHS.clearAllBits();
    2282       49371 :         DemandedRHS.clearAllBits();
    2283       49371 :         break;
    2284             :       }
    2285             : 
    2286      499664 :       if ((unsigned)M < NumElts)
    2287      391110 :         DemandedLHS.setBit((unsigned)M % NumElts);
    2288             :       else
    2289      108554 :         DemandedRHS.setBit((unsigned)M % NumElts);
    2290             :     }
    2291             :     // Known bits are the values that are shared by every demanded element.
    2292      162933 :     if (!!DemandedLHS) {
    2293       85899 :       SDValue LHS = Op.getOperand(0);
    2294       85899 :       Known2 = computeKnownBits(LHS, DemandedLHS, Depth + 1);
    2295             :       Known.One &= Known2.One;
    2296             :       Known.Zero &= Known2.Zero;
    2297             :     }
    2298             :     // If we don't know any bits, early out.
    2299      162933 :     if (Known.isUnknown())
    2300             :       break;
    2301       30476 :     if (!!DemandedRHS) {
    2302       28275 :       SDValue RHS = Op.getOperand(1);
    2303       28275 :       Known2 = computeKnownBits(RHS, DemandedRHS, Depth + 1);
    2304             :       Known.One &= Known2.One;
    2305             :       Known.Zero &= Known2.Zero;
    2306             :     }
    2307             :     break;
    2308             :   }
    2309       40067 :   case ISD::CONCAT_VECTORS: {
    2310             :     // Split DemandedElts and test each of the demanded subvectors.
    2311       40067 :     Known.Zero.setAllBits(); Known.One.setAllBits();
    2312      120201 :     EVT SubVectorVT = Op.getOperand(0).getValueType();
    2313             :     unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
    2314             :     unsigned NumSubVectors = Op.getNumOperands();
    2315       72040 :     for (unsigned i = 0; i != NumSubVectors; ++i) {
    2316       63887 :       APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
    2317      127774 :       DemandedSub = DemandedSub.trunc(NumSubVectorElts);
    2318       63887 :       if (!!DemandedSub) {
    2319       40681 :         SDValue Sub = Op.getOperand(i);
    2320       40681 :         Known2 = computeKnownBits(Sub, DemandedSub, Depth + 1);
    2321             :         Known.One &= Known2.One;
    2322             :         Known.Zero &= Known2.Zero;
    2323             :       }
    2324             :       // If we don't know any bits, early out.
    2325       63887 :       if (Known.isUnknown())
    2326             :         break;
    2327             :     }
    2328             :     break;
    2329             :   }
    2330       37978 :   case ISD::INSERT_SUBVECTOR: {
    2331             :     // If we know the element index, demand any elements from the subvector and
    2332             :     // the remainder from the src its inserted into, otherwise demand them all.
    2333       37978 :     SDValue Src = Op.getOperand(0);
    2334       37978 :     SDValue Sub = Op.getOperand(1);
    2335             :     ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
    2336       37978 :     unsigned NumSubElts = Sub.getValueType().getVectorNumElements();
    2337       37978 :     if (SubIdx && SubIdx->getAPIntValue().ule(NumElts - NumSubElts)) {
    2338       37978 :       Known.One.setAllBits();
    2339       37978 :       Known.Zero.setAllBits();
    2340       37978 :       uint64_t Idx = SubIdx->getZExtValue();
    2341       37978 :       APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx);
    2342       37978 :       if (!!DemandedSubElts) {
    2343       29111 :         Known = computeKnownBits(Sub, DemandedSubElts, Depth + 1);
    2344       29111 :         if (Known.isUnknown())
    2345             :           break; // early-out.
    2346             :       }
    2347       10221 :       APInt SubMask = APInt::getBitsSet(NumElts, Idx, Idx + NumSubElts);
    2348       10221 :       APInt DemandedSrcElts = DemandedElts & ~SubMask;
    2349       10221 :       if (!!DemandedSrcElts) {
    2350        9552 :         Known2 = computeKnownBits(Src, DemandedSrcElts, Depth + 1);
    2351             :         Known.One &= Known2.One;
    2352             :         Known.Zero &= Known2.Zero;
    2353             :       }
    2354             :     } else {
    2355           0 :       Known = computeKnownBits(Sub, Depth + 1);
    2356           0 :       if (Known.isUnknown())
    2357             :         break; // early-out.
    2358           0 :       Known2 = computeKnownBits(Src, Depth + 1);
    2359           0 :       Known.One &= Known2.One;
    2360           0 :       Known.Zero &= Known2.Zero;
    2361             :     }
    2362             :     break;
    2363             :   }
    2364      161871 :   case ISD::EXTRACT_SUBVECTOR: {
    2365             :     // If we know the element index, just demand that subvector elements,
    2366             :     // otherwise demand them all.
    2367      161871 :     SDValue Src = Op.getOperand(0);
    2368             :     ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
    2369      161871 :     unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
    2370      161871 :     if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    2371             :       // Offset the demanded elts by the subvector index.
    2372             :       uint64_t Idx = SubIdx->getZExtValue();
    2373      161871 :       APInt DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
    2374      161871 :       Known = computeKnownBits(Src, DemandedSrc, Depth + 1);
    2375             :     } else {
    2376           0 :       Known = computeKnownBits(Src, Depth + 1);
    2377             :     }
    2378             :     break;
    2379             :   }
    2380     1105236 :   case ISD::BITCAST: {
    2381     1105236 :     SDValue N0 = Op.getOperand(0);
    2382     1105236 :     EVT SubVT = N0.getValueType();
    2383             :     unsigned SubBitWidth = SubVT.getScalarSizeInBits();
    2384             : 
    2385             :     // Ignore bitcasts from unsupported types.
    2386     1105236 :     if (!(SubVT.isInteger() || SubVT.isFloatingPoint()))
    2387             :       break;
    2388             : 
    2389             :     // Fast handling of 'identity' bitcasts.
    2390     1105006 :     if (BitWidth == SubBitWidth) {
    2391       38743 :       Known = computeKnownBits(N0, DemandedElts, Depth + 1);
    2392       38743 :       break;
    2393             :     }
    2394             : 
    2395     1066263 :     bool IsLE = getDataLayout().isLittleEndian();
    2396             : 
    2397             :     // Bitcast 'small element' vector to 'large element' scalar/vector.
    2398     1066263 :     if ((BitWidth % SubBitWidth) == 0) {
    2399             :       assert(N0.getValueType().isVector() && "Expected bitcast from vector");
    2400             : 
    2401             :       // Collect known bits for the (larger) output by collecting the known
    2402             :       // bits from each set of sub elements and shift these into place.
    2403             :       // We need to separately call computeKnownBits for each set of
    2404             :       // sub elements as the knownbits for each is likely to be different.
    2405      554405 :       unsigned SubScale = BitWidth / SubBitWidth;
    2406      554405 :       APInt SubDemandedElts(NumElts * SubScale, 0);
    2407     2162006 :       for (unsigned i = 0; i != NumElts; ++i)
    2408     1607601 :         if (DemandedElts[i])
    2409     1208398 :           SubDemandedElts.setBit(i * SubScale);
    2410             : 
    2411     2425251 :       for (unsigned i = 0; i != SubScale; ++i) {
    2412     3741692 :         Known2 = computeKnownBits(N0, SubDemandedElts.shl(i),
    2413     1870846 :                          Depth + 1);
    2414     1870846 :         unsigned Shifts = IsLE ? i : SubScale - 1 - i;
    2415     3741692 :         Known.One |= Known2.One.zext(BitWidth).shl(SubBitWidth * Shifts);
    2416     3743128 :         Known.Zero |= Known2.Zero.zext(BitWidth).shl(SubBitWidth * Shifts);
    2417             :       }
    2418             :     }
    2419             : 
    2420             :     // Bitcast 'large element' scalar/vector to 'small element' vector.
    2421     1066263 :     if ((SubBitWidth % BitWidth) == 0) {
    2422             :       assert(Op.getValueType().isVector() && "Expected bitcast to vector");
    2423             : 
    2424             :       // Collect known bits for the (smaller) output by collecting the known
    2425             :       // bits from the overlapping larger input elements and extracting the
    2426             :       // sub sections we actually care about.
    2427      511858 :       unsigned SubScale = SubBitWidth / BitWidth;
    2428      511858 :       APInt SubDemandedElts(NumElts / SubScale, 0);
    2429     9692955 :       for (unsigned i = 0; i != NumElts; ++i)
    2430     9181097 :         if (DemandedElts[i])
    2431     1531476 :           SubDemandedElts.setBit(i / SubScale);
    2432             : 
    2433      511858 :       Known2 = computeKnownBits(N0, SubDemandedElts, Depth + 1);
    2434             : 
    2435      511858 :       Known.Zero.setAllBits(); Known.One.setAllBits();
    2436     3613420 :       for (unsigned i = 0; i != NumElts; ++i)
    2437     3587767 :         if (DemandedElts[i]) {
    2438      618343 :           unsigned Shifts = IsLE ? i : NumElts - 1 - i;
    2439      618343 :           unsigned Offset = (Shifts % SubScale) * BitWidth;
    2440     1236686 :           Known.One &= Known2.One.lshr(Offset).trunc(BitWidth);
    2441     1236686 :           Known.Zero &= Known2.Zero.lshr(Offset).trunc(BitWidth);
    2442             :           // If we don't know any bits, early out.
    2443      618343 :           if (Known.isUnknown())
    2444             :             break;
    2445             :         }
    2446             :     }
    2447             :     break;
    2448             :   }
    2449      845383 :   case ISD::AND:
    2450             :     // If either the LHS or the RHS are Zero, the result is zero.
    2451     1690766 :     Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2452     1690766 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2453             : 
    2454             :     // Output known-1 bits are only known if set in both the LHS & RHS.
    2455      845383 :     Known.One &= Known2.One;
    2456             :     // Output known-0 are known to be clear if zero in either the LHS | RHS.
    2457      845383 :     Known.Zero |= Known2.Zero;
    2458             :     break;
    2459      194401 :   case ISD::OR:
    2460      388802 :     Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2461      388802 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2462             : 
    2463             :     // Output known-0 bits are only known if clear in both the LHS & RHS.
    2464      194401 :     Known.Zero &= Known2.Zero;
    2465             :     // Output known-1 are known to be set if set in either the LHS | RHS.
    2466      194401 :     Known.One |= Known2.One;
    2467             :     break;
    2468      263856 :   case ISD::XOR: {
    2469      527712 :     Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2470      527712 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2471             : 
    2472             :     // Output known-0 bits are known if clear or set in both the LHS & RHS.
    2473      791568 :     APInt KnownZeroOut = (Known.Zero & Known2.Zero) | (Known.One & Known2.One);
    2474             :     // Output known-1 are known to be set if set in only one of the LHS, RHS.
    2475      263856 :     Known.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
    2476      263856 :     Known.Zero = KnownZeroOut;
    2477             :     break;
    2478             :   }
    2479      163936 :   case ISD::MUL: {
    2480      327872 :     Known = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2481      327872 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2482             : 
    2483             :     // If low bits are zero in either operand, output low known-0 bits.
    2484             :     // Also compute a conservative estimate for high known-0 bits.
    2485             :     // More trickiness is possible, but this is sufficient for the
    2486             :     // interesting case of alignment computation.
    2487      163936 :     unsigned TrailZ = Known.countMinTrailingZeros() +
    2488      163936 :                       Known2.countMinTrailingZeros();
    2489      163936 :     unsigned LeadZ =  std::max(Known.countMinLeadingZeros() +
    2490             :                                Known2.countMinLeadingZeros(),
    2491      163936 :                                BitWidth) - BitWidth;
    2492             : 
    2493             :     Known.resetAll();
    2494      163936 :     Known.Zero.setLowBits(std::min(TrailZ, BitWidth));
    2495      163936 :     Known.Zero.setHighBits(std::min(LeadZ, BitWidth));
    2496             :     break;
    2497             :   }
    2498        5170 :   case ISD::UDIV: {
    2499             :     // For the purposes of computing leading zeros we can conservatively
    2500             :     // treat a udiv as a logical right shift by the power of 2 known to
    2501             :     // be less than the denominator.
    2502       10340 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2503             :     unsigned LeadZ = Known2.countMinLeadingZeros();
    2504             : 
    2505       10340 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2506             :     unsigned RHSMaxLeadingZeros = Known2.countMaxLeadingZeros();
    2507        5170 :     if (RHSMaxLeadingZeros != BitWidth)
    2508        9182 :       LeadZ = std::min(BitWidth, LeadZ + BitWidth - RHSMaxLeadingZeros - 1);
    2509             : 
    2510        5170 :     Known.Zero.setHighBits(LeadZ);
    2511             :     break;
    2512             :   }
    2513       72316 :   case ISD::SELECT:
    2514             :   case ISD::VSELECT:
    2515      144632 :     Known = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
    2516             :     // If we don't know any bits, early out.
    2517       72316 :     if (Known.isUnknown())
    2518             :       break;
    2519       37068 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth+1);
    2520             : 
    2521             :     // Only known if known in both the LHS and RHS.
    2522       18534 :     Known.One &= Known2.One;
    2523       18534 :     Known.Zero &= Known2.Zero;
    2524             :     break;
    2525       35752 :   case ISD::SELECT_CC:
    2526       71504 :     Known = computeKnownBits(Op.getOperand(3), DemandedElts, Depth+1);
    2527             :     // If we don't know any bits, early out.
    2528       35752 :     if (Known.isUnknown())
    2529             :       break;
    2530       13022 :     Known2 = computeKnownBits(Op.getOperand(2), DemandedElts, Depth+1);
    2531             : 
    2532             :     // Only known if known in both the LHS and RHS.
    2533        6511 :     Known.One &= Known2.One;
    2534        6511 :     Known.Zero &= Known2.Zero;
    2535             :     break;
    2536        2643 :   case ISD::SMULO:
    2537             :   case ISD::UMULO:
    2538             :   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
    2539        2643 :     if (Op.getResNo() != 1)
    2540             :       break;
    2541             :     // The boolean result conforms to getBooleanContents.
    2542             :     // If we know the result of a setcc has the top bits zero, use this info.
    2543             :     // We know that we have an integer-based boolean since these operations
    2544             :     // are only available for integer.
    2545        4328 :     if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
    2546        1922 :             TargetLowering::ZeroOrOneBooleanContent &&
    2547             :         BitWidth > 1)
    2548        1438 :       Known.Zero.setBitsFrom(1);
    2549             :     break;
    2550      429596 :   case ISD::SETCC:
    2551             :     // If we know the result of a setcc has the top bits zero, use this info.
    2552      859192 :     if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    2553      429596 :             TargetLowering::ZeroOrOneBooleanContent &&
    2554             :         BitWidth > 1)
    2555      196095 :       Known.Zero.setBitsFrom(1);
    2556             :     break;
    2557      482684 :   case ISD::SHL:
    2558      482684 :     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    2559      905218 :       Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2560      452609 :       unsigned Shift = ShAmt->getZExtValue();
    2561      452609 :       Known.Zero <<= Shift;
    2562      452609 :       Known.One <<= Shift;
    2563             :       // Low bits are known zero.
    2564             :       Known.Zero.setLowBits(Shift);
    2565             :     }
    2566             :     break;
    2567      673992 :   case ISD::SRL:
    2568      673992 :     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    2569     1319996 :       Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2570      659998 :       unsigned Shift = ShAmt->getZExtValue();
    2571      659998 :       Known.Zero.lshrInPlace(Shift);
    2572      659998 :       Known.One.lshrInPlace(Shift);
    2573             :       // High bits are known zero.
    2574             :       Known.Zero.setHighBits(Shift);
    2575       13994 :     } else if (auto *BV = dyn_cast<BuildVectorSDNode>(Op.getOperand(1))) {
    2576             :       // If the shift amount is a vector of constants see if we can bound
    2577             :       // the number of upper zero bits.
    2578         760 :       unsigned ShiftAmountMin = BitWidth;
    2579        5128 :       for (unsigned i = 0; i != BV->getNumOperands(); ++i) {
    2580        2375 :         if (auto *C = dyn_cast<ConstantSDNode>(BV->getOperand(i))) {
    2581        2344 :           const APInt &ShAmt = C->getAPIntValue();
    2582        2344 :           if (ShAmt.ult(BitWidth)) {
    2583        1804 :             ShiftAmountMin = std::min<unsigned>(ShiftAmountMin,
    2584        2376 :                                                 ShAmt.getZExtValue());
    2585             :             continue;
    2586             :           }
    2587             :         }
    2588             :         // Don't know anything.
    2589         571 :         ShiftAmountMin = 0;
    2590         571 :         break;
    2591             :       }
    2592             : 
    2593         760 :       Known.Zero.setHighBits(ShiftAmountMin);
    2594             :     }
    2595             :     break;
    2596       53624 :   case ISD::SRA:
    2597       53624 :     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    2598      103954 :       Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2599       51977 :       unsigned Shift = ShAmt->getZExtValue();
    2600             :       // Sign extend known zero/one bit (else is unknown).
    2601       51977 :       Known.Zero.ashrInPlace(Shift);
    2602       51977 :       Known.One.ashrInPlace(Shift);
    2603             :     }
    2604             :     break;
    2605       31713 :   case ISD::SIGN_EXTEND_INREG: {
    2606       31713 :     EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
    2607             :     unsigned EBits = EVT.getScalarSizeInBits();
    2608             : 
    2609             :     // Sign extension.  Compute the demanded bits in the result that are not
    2610             :     // present in the input.
    2611       31713 :     APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
    2612             : 
    2613             :     APInt InSignMask = APInt::getSignMask(EBits);
    2614       31713 :     APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
    2615             : 
    2616             :     // If the sign extended bits are demanded, we know that the sign
    2617             :     // bit is demanded.
    2618       63426 :     InSignMask = InSignMask.zext(BitWidth);
    2619       31713 :     if (NewBits.getBoolValue())
    2620             :       InputDemandedBits |= InSignMask;
    2621             : 
    2622       63426 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2623       31713 :     Known.One &= InputDemandedBits;
    2624       31713 :     Known.Zero &= InputDemandedBits;
    2625             : 
    2626             :     // If the sign bit of the input is known set or clear, then we know the
    2627             :     // top bits of the result.
    2628       31713 :     if (Known.Zero.intersects(InSignMask)) {        // Input sign bit known clear
    2629             :       Known.Zero |= NewBits;
    2630           2 :       Known.One  &= ~NewBits;
    2631       31711 :     } else if (Known.One.intersects(InSignMask)) {  // Input sign bit known set
    2632             :       Known.One  |= NewBits;
    2633           3 :       Known.Zero &= ~NewBits;
    2634             :     } else {                              // Input sign bit unknown
    2635       31708 :       Known.Zero &= ~NewBits;
    2636       31708 :       Known.One  &= ~NewBits;
    2637             :     }
    2638             :     break;
    2639             :   }
    2640         777 :   case ISD::CTTZ:
    2641             :   case ISD::CTTZ_ZERO_UNDEF: {
    2642        1554 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2643             :     // If we have a known 1, its position is our upper bound.
    2644             :     unsigned PossibleTZ = Known2.countMaxTrailingZeros();
    2645         777 :     unsigned LowBits = Log2_32(PossibleTZ) + 1;
    2646         777 :     Known.Zero.setBitsFrom(LowBits);
    2647             :     break;
    2648             :   }
    2649        3764 :   case ISD::CTLZ:
    2650             :   case ISD::CTLZ_ZERO_UNDEF: {
    2651        7528 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2652             :     // If we have a known 1, its position is our upper bound.
    2653             :     unsigned PossibleLZ = Known2.countMaxLeadingZeros();
    2654        3764 :     unsigned LowBits = Log2_32(PossibleLZ) + 1;
    2655        3764 :     Known.Zero.setBitsFrom(LowBits);
    2656             :     break;
    2657             :   }
    2658        2748 :   case ISD::CTPOP: {
    2659        5496 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2660             :     // If we know some of the bits are zero, they can't be one.
    2661             :     unsigned PossibleOnes = Known2.countMaxPopulation();
    2662        5496 :     Known.Zero.setBitsFrom(Log2_32(PossibleOnes) + 1);
    2663             :     break;
    2664             :   }
    2665             :   case ISD::LOAD: {
    2666             :     LoadSDNode *LD = cast<LoadSDNode>(Op);
    2667             :     // If this is a ZEXTLoad and we are looking at the loaded value.
    2668      244735 :     if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
    2669      244648 :       EVT VT = LD->getMemoryVT();
    2670             :       unsigned MemBits = VT.getScalarSizeInBits();
    2671      244648 :       Known.Zero.setBitsFrom(MemBits);
    2672    11247904 :     } else if (const MDNode *Ranges = LD->getRanges()) {
    2673        2365 :       if (LD->getExtensionType() == ISD::NON_EXTLOAD)
    2674        2359 :         computeKnownBitsFromRangeMetadata(*Ranges, Known);
    2675             :     }
    2676             :     break;
    2677             :   }
    2678        8162 :   case ISD::ZERO_EXTEND_VECTOR_INREG: {
    2679       16324 :     EVT InVT = Op.getOperand(0).getValueType();
    2680        8162 :     APInt InDemandedElts = DemandedElts.zextOrSelf(InVT.getVectorNumElements());
    2681       16324 :     Known = computeKnownBits(Op.getOperand(0), InDemandedElts, Depth + 1);
    2682        8162 :     Known = Known.zext(BitWidth);
    2683        8162 :     Known.Zero.setBitsFrom(InVT.getScalarSizeInBits());
    2684             :     break;
    2685             :   }
    2686      177702 :   case ISD::ZERO_EXTEND: {
    2687      177702 :     EVT InVT = Op.getOperand(0).getValueType();
    2688      355404 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2689      177702 :     Known = Known.zext(BitWidth);
    2690      177702 :     Known.Zero.setBitsFrom(InVT.getScalarSizeInBits());
    2691             :     break;
    2692             :   }
    2693             :   // TODO ISD::SIGN_EXTEND_VECTOR_INREG
    2694       74845 :   case ISD::SIGN_EXTEND: {
    2695      149690 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2696             :     // If the sign bit is known to be zero or one, then sext will extend
    2697             :     // it to the top bits, else it will just zext.
    2698       74845 :     Known = Known.sext(BitWidth);
    2699       74845 :     break;
    2700             :   }
    2701      306585 :   case ISD::ANY_EXTEND: {
    2702      613170 :     Known = computeKnownBits(Op.getOperand(0), Depth+1);
    2703      306585 :     Known = Known.zext(BitWidth);
    2704      306585 :     break;
    2705             :   }
    2706      429857 :   case ISD::TRUNCATE: {
    2707      859714 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2708      429857 :     Known = Known.trunc(BitWidth);
    2709      429857 :     break;
    2710             :   }
    2711      197199 :   case ISD::AssertZext: {
    2712      197199 :     EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
    2713      197199 :     APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
    2714      394398 :     Known = computeKnownBits(Op.getOperand(0), Depth+1);
    2715      394398 :     Known.Zero |= (~InMask);
    2716      394398 :     Known.One  &= (~Known.Zero);
    2717             :     break;
    2718             :   }
    2719          26 :   case ISD::FGETSIGN:
    2720             :     // All bits are zero except the low bit.
    2721          26 :     Known.Zero.setBitsFrom(1);
    2722             :     break;
    2723        6969 :   case ISD::USUBO:
    2724             :   case ISD::SSUBO:
    2725        6969 :     if (Op.getResNo() == 1) {
    2726             :       // If we know the result of a setcc has the top bits zero, use this info.
    2727       13114 :       if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    2728        6557 :               TargetLowering::ZeroOrOneBooleanContent &&
    2729             :           BitWidth > 1)
    2730        1464 :         Known.Zero.setBitsFrom(1);
    2731             :       break;
    2732             :     }
    2733             :     LLVM_FALLTHROUGH;
    2734             :   case ISD::SUB:
    2735             :   case ISD::SUBC: {
    2736      179636 :     if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0))) {
    2737             :       // We know that the top bits of C-X are clear if X contains less bits
    2738             :       // than C (i.e. no wrap-around can happen).  For example, 20-X is
    2739             :       // positive if we can prove that X is >= 0 and < 16.
    2740       18315 :       if (CLHS->getAPIntValue().isNonNegative()) {
    2741       17029 :         unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
    2742             :         // NLZ can't be BitWidth with no sign bit
    2743       17001 :         APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
    2744       51003 :         Known2 = computeKnownBits(Op.getOperand(1), DemandedElts,
    2745       17001 :                          Depth + 1);
    2746             : 
    2747             :         // If all of the MaskV bits are known to be zero, then we know the
    2748             :         // output top bits are zero, because we now know that the output is
    2749             :         // from [0-C].
    2750       17001 :         if ((Known2.Zero & MaskV) == MaskV) {
    2751         114 :           unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
    2752             :           // Top bits known zero.
    2753         114 :           Known.Zero.setHighBits(NLZ2);
    2754             :         }
    2755             :       }
    2756             :     }
    2757             : 
    2758             :     // If low bits are know to be zero in both operands, then we know they are
    2759             :     // going to be 0 in the result. Both addition and complement operations
    2760             :     // preserve the low zero bits.
    2761      359272 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2762      179636 :     unsigned KnownZeroLow = Known2.countMinTrailingZeros();
    2763      179636 :     if (KnownZeroLow == 0)
    2764             :       break;
    2765             : 
    2766       37576 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2767       18788 :     KnownZeroLow = std::min(KnownZeroLow, Known2.countMinTrailingZeros());
    2768       18788 :     Known.Zero.setLowBits(KnownZeroLow);
    2769             :     break;
    2770             :   }
    2771       23538 :   case ISD::UADDO:
    2772             :   case ISD::SADDO:
    2773             :   case ISD::ADDCARRY:
    2774       23538 :     if (Op.getResNo() == 1) {
    2775             :       // If we know the result of a setcc has the top bits zero, use this info.
    2776        8330 :       if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    2777        4165 :               TargetLowering::ZeroOrOneBooleanContent &&
    2778             :           BitWidth > 1)
    2779        3146 :         Known.Zero.setBitsFrom(1);
    2780             :       break;
    2781             :     }
    2782             :     LLVM_FALLTHROUGH;
    2783             :   case ISD::ADD:
    2784             :   case ISD::ADDC:
    2785             :   case ISD::ADDE: {
    2786             :     // Output known-0 bits are known if clear or set in both the low clear bits
    2787             :     // common to both LHS & RHS.  For example, 8+(X<<3) is known to have the
    2788             :     // low 3 bits clear.
    2789             :     // Output known-0 bits are also known if the top bits of each input are
    2790             :     // known to be clear. For example, if one input has the top 10 bits clear
    2791             :     // and the other has the top 8 bits clear, we know the top 7 bits of the
    2792             :     // output must be clear.
    2793     9047964 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2794     4523982 :     unsigned KnownZeroHigh = Known2.countMinLeadingZeros();
    2795     4523982 :     unsigned KnownZeroLow = Known2.countMinTrailingZeros();
    2796             : 
    2797     9047964 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2798     4562925 :     KnownZeroHigh = std::min(KnownZeroHigh, Known2.countMinLeadingZeros());
    2799     4523982 :     KnownZeroLow = std::min(KnownZeroLow, Known2.countMinTrailingZeros());
    2800             : 
    2801     4523982 :     if (Opcode == ISD::ADDE || Opcode == ISD::ADDCARRY) {
    2802             :       // With ADDE and ADDCARRY, a carry bit may be added in, so we can only
    2803             :       // use this information if we know (at least) that the low two bits are
    2804             :       // clear. We then return to the caller that the low bit is unknown but
    2805             :       // that other bits are known zero.
    2806       13306 :       if (KnownZeroLow >= 2)
    2807         372 :         Known.Zero.setBits(1, KnownZeroLow);
    2808             :       break;
    2809             :     }
    2810             : 
    2811     4510676 :     Known.Zero.setLowBits(KnownZeroLow);
    2812     4510676 :     if (KnownZeroHigh > 1)
    2813       55282 :       Known.Zero.setHighBits(KnownZeroHigh - 1);
    2814             :     break;
    2815             :   }
    2816        1462 :   case ISD::SREM:
    2817        1462 :     if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
    2818         902 :       const APInt &RA = Rem->getAPIntValue().abs();
    2819         451 :       if (RA.isPowerOf2()) {
    2820         103 :         APInt LowBits = RA - 1;
    2821         206 :         Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2822             : 
    2823             :         // The low bits of the first operand are unchanged by the srem.
    2824         206 :         Known.Zero = Known2.Zero & LowBits;
    2825         103 :         Known.One = Known2.One & LowBits;
    2826             : 
    2827             :         // If the first operand is non-negative or has all low bits zero, then
    2828             :         // the upper bits are all zero.
    2829         511 :         if (Known2.Zero[BitWidth-1] || ((Known2.Zero & LowBits) == LowBits))
    2830           4 :           Known.Zero |= ~LowBits;
    2831             : 
    2832             :         // If the first operand is negative and not all low bits are zero, then
    2833             :         // the upper bits are all one.
    2834         206 :         if (Known2.One[BitWidth-1] && ((Known2.One & LowBits) != 0))
    2835           0 :           Known.One |= ~LowBits;
    2836             :         assert((Known.Zero & Known.One) == 0&&"Bits known to be one AND zero?");
    2837             :       }
    2838             :     }
    2839             :     break;
    2840        3512 :   case ISD::UREM: {
    2841        3512 :     if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
    2842        2511 :       const APInt &RA = Rem->getAPIntValue();
    2843        2511 :       if (RA.isPowerOf2()) {
    2844        1012 :         APInt LowBits = (RA - 1);
    2845        2024 :         Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2846             : 
    2847             :         // The upper bits are all zero, the lower ones are unchanged.
    2848        1012 :         Known.Zero = Known2.Zero | ~LowBits;
    2849        1012 :         Known.One = Known2.One & LowBits;
    2850             :         break;
    2851             :       }
    2852             :     }
    2853             : 
    2854             :     // Since the result is less than or equal to either operand, any leading
    2855             :     // zero bits in either operand must also exist in the result.
    2856        5000 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2857        5000 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2858             : 
    2859             :     uint32_t Leaders =
    2860        6490 :         std::max(Known.countMinLeadingZeros(), Known2.countMinLeadingZeros());
    2861             :     Known.resetAll();
    2862             :     Known.Zero.setHighBits(Leaders);
    2863             :     break;
    2864             :   }
    2865         128 :   case ISD::EXTRACT_ELEMENT: {
    2866         256 :     Known = computeKnownBits(Op.getOperand(0), Depth+1);
    2867         128 :     const unsigned Index = Op.getConstantOperandVal(1);
    2868         128 :     const unsigned BitWidth = Op.getValueSizeInBits();
    2869             : 
    2870             :     // Remove low part of known bits mask
    2871         128 :     Known.Zero = Known.Zero.getHiBits(Known.Zero.getBitWidth() - Index * BitWidth);
    2872         128 :     Known.One = Known.One.getHiBits(Known.One.getBitWidth() - Index * BitWidth);
    2873             : 
    2874             :     // Remove high part of known bit mask
    2875         128 :     Known = Known.trunc(BitWidth);
    2876         128 :     break;
    2877             :   }
    2878      564522 :   case ISD::EXTRACT_VECTOR_ELT: {
    2879      564522 :     SDValue InVec = Op.getOperand(0);
    2880      564522 :     SDValue EltNo = Op.getOperand(1);
    2881      564522 :     EVT VecVT = InVec.getValueType();
    2882      564522 :     const unsigned BitWidth = Op.getValueSizeInBits();
    2883             :     const unsigned EltBitWidth = VecVT.getScalarSizeInBits();
    2884             :     const unsigned NumSrcElts = VecVT.getVectorNumElements();
    2885             :     // If BitWidth > EltBitWidth the value is anyext:ed. So we do not know
    2886             :     // anything about the extended bits.
    2887      564522 :     if (BitWidth > EltBitWidth)
    2888       12315 :       Known = Known.trunc(EltBitWidth);
    2889             :     ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
    2890     1127498 :     if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts)) {
    2891             :       // If we know the element index, just demand that vector element.
    2892      563749 :       unsigned Idx = ConstEltNo->getZExtValue();
    2893      563749 :       APInt DemandedElt = APInt::getOneBitSet(NumSrcElts, Idx);
    2894      563749 :       Known = computeKnownBits(InVec, DemandedElt, Depth + 1);
    2895             :     } else {
    2896             :       // Unknown element index, so ignore DemandedElts and demand them all.
    2897         773 :       Known = computeKnownBits(InVec, Depth + 1);
    2898             :     }
    2899      564522 :     if (BitWidth > EltBitWidth)
    2900       12315 :       Known = Known.zext(BitWidth);
    2901             :     break;
    2902             :   }
    2903        7740 :   case ISD::INSERT_VECTOR_ELT: {
    2904        7740 :     SDValue InVec = Op.getOperand(0);
    2905        7740 :     SDValue InVal = Op.getOperand(1);
    2906        7740 :     SDValue EltNo = Op.getOperand(2);
    2907             : 
    2908             :     ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
    2909       15468 :     if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
    2910             :       // If we know the element index, split the demand between the
    2911             :       // source vector and the inserted element.
    2912        7744 :       Known.Zero = Known.One = APInt::getAllOnesValue(BitWidth);
    2913       15468 :       unsigned EltIdx = CEltNo->getZExtValue();
    2914             : 
    2915             :       // If we demand the inserted element then add its common known bits.
    2916        7734 :       if (DemandedElts[EltIdx]) {
    2917        6472 :         Known2 = computeKnownBits(InVal, Depth + 1);
    2918        6472 :         Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
    2919       12944 :         Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
    2920             :       }
    2921             : 
    2922             :       // If we demand the source vector then add its common known bits, ensuring
    2923             :       // that we don't demand the inserted element.
    2924       15468 :       APInt VectorElts = DemandedElts & ~(APInt::getOneBitSet(NumElts, EltIdx));
    2925        7734 :       if (!!VectorElts) {
    2926        5003 :         Known2 = computeKnownBits(InVec, VectorElts, Depth + 1);
    2927             :         Known.One &= Known2.One;
    2928             :         Known.Zero &= Known2.Zero;
    2929             :       }
    2930             :     } else {
    2931             :       // Unknown element index, so ignore DemandedElts and demand them all.
    2932           6 :       Known = computeKnownBits(InVec, Depth + 1);
    2933           6 :       Known2 = computeKnownBits(InVal, Depth + 1);
    2934           6 :       Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
    2935          12 :       Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
    2936             :     }
    2937             :     break;
    2938             :   }
    2939         139 :   case ISD::BITREVERSE: {
    2940         278 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2941         139 :     Known.Zero = Known2.Zero.reverseBits();
    2942         139 :     Known.One = Known2.One.reverseBits();
    2943         139 :     break;
    2944             :   }
    2945        2589 :   case ISD::BSWAP: {
    2946        5178 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2947        2589 :     Known.Zero = Known2.Zero.byteSwap();
    2948        2589 :     Known.One = Known2.One.byteSwap();
    2949        2589 :     break;
    2950             :   }
    2951        3159 :   case ISD::ABS: {
    2952        6318 :     Known2 = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2953             : 
    2954             :     // If the source's MSB is zero then we know the rest of the bits already.
    2955        3159 :     if (Known2.isNonNegative()) {
    2956           0 :       Known.Zero = Known2.Zero;
    2957           0 :       Known.One = Known2.One;
    2958           0 :       break;
    2959             :     }
    2960             : 
    2961             :     // We only know that the absolute values's MSB will be zero iff there is
    2962             :     // a set bit that isn't the sign bit (otherwise it could be INT_MIN).
    2963        3159 :     Known2.One.clearSignBit();
    2964        3159 :     if (Known2.One.getBoolValue()) {
    2965           2 :       Known.Zero = APInt::getSignMask(BitWidth);
    2966           2 :       break;
    2967             :     }
    2968             :     break;
    2969             :   }
    2970        3460 :   case ISD::UMIN: {
    2971        6920 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2972        6920 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2973             : 
    2974             :     // UMIN - we know that the result will have the maximum of the
    2975             :     // known zero leading bits of the inputs.
    2976        3460 :     unsigned LeadZero = Known.countMinLeadingZeros();
    2977        4883 :     LeadZero = std::max(LeadZero, Known2.countMinLeadingZeros());
    2978             : 
    2979             :     Known.Zero &= Known2.Zero;
    2980        3460 :     Known.One &= Known2.One;
    2981        3460 :     Known.Zero.setHighBits(LeadZero);
    2982             :     break;
    2983             :   }
    2984        4475 :   case ISD::UMAX: {
    2985        8950 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    2986        8950 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    2987             : 
    2988             :     // UMAX - we know that the result will have the maximum of the
    2989             :     // known one leading bits of the inputs.
    2990        4475 :     unsigned LeadOne = Known.countMinLeadingOnes();
    2991        4475 :     LeadOne = std::max(LeadOne, Known2.countMinLeadingOnes());
    2992             : 
    2993        4475 :     Known.Zero &= Known2.Zero;
    2994             :     Known.One &= Known2.One;
    2995        4475 :     Known.One.setHighBits(LeadOne);
    2996             :     break;
    2997             :   }
    2998       13473 :   case ISD::SMIN:
    2999             :   case ISD::SMAX: {
    3000             :     // If we have a clamp pattern, we know that the number of sign bits will be
    3001             :     // the minimum of the clamp min/max range.
    3002             :     bool IsMax = (Opcode == ISD::SMAX);
    3003             :     ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
    3004       13473 :     if ((CstLow = isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)))
    3005        6039 :       if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
    3006         903 :         CstHigh = isConstOrDemandedConstSplat(Op.getOperand(0).getOperand(1),
    3007             :                                               DemandedElts);
    3008       13473 :     if (CstLow && CstHigh) {
    3009         895 :       if (!IsMax)
    3010             :         std::swap(CstLow, CstHigh);
    3011             : 
    3012         895 :       const APInt &ValueLow = CstLow->getAPIntValue();
    3013         895 :       const APInt &ValueHigh = CstHigh->getAPIntValue();
    3014         895 :       if (ValueLow.sle(ValueHigh)) {
    3015         894 :         unsigned LowSignBits = ValueLow.getNumSignBits();
    3016         894 :         unsigned HighSignBits = ValueHigh.getNumSignBits();
    3017         894 :         unsigned MinSignBits = std::min(LowSignBits, HighSignBits);
    3018         894 :         if (ValueLow.isNegative() && ValueHigh.isNegative()) {
    3019           1 :           Known.One.setHighBits(MinSignBits);
    3020         668 :           break;
    3021             :         }
    3022        1560 :         if (ValueLow.isNonNegative() && ValueHigh.isNonNegative()) {
    3023         667 :           Known.Zero.setHighBits(MinSignBits);
    3024             :           break;
    3025             :         }
    3026             :       }
    3027             :     }
    3028             : 
    3029             :     // Fallback - just get the shared known bits of the operands.
    3030       25610 :     Known = computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
    3031       12805 :     if (Known.isUnknown()) break; // Early-out
    3032           0 :     Known2 = computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
    3033           0 :     Known.Zero &= Known2.Zero;
    3034           0 :     Known.One &= Known2.One;
    3035             :     break;
    3036             :   }
    3037     1387941 :   case ISD::FrameIndex:
    3038             :   case ISD::TargetFrameIndex:
    3039     1387941 :     TLI->computeKnownBitsForFrameIndex(Op, Known, DemandedElts, *this, Depth);
    3040     1387941 :     break;
    3041             : 
    3042     9735207 :   default:
    3043     9735207 :     if (Opcode < ISD::BUILTIN_OP_END)
    3044             :       break;
    3045             :     LLVM_FALLTHROUGH;
    3046             :   case ISD::INTRINSIC_WO_CHAIN:
    3047             :   case ISD::INTRINSIC_W_CHAIN:
    3048             :   case ISD::INTRINSIC_VOID:
    3049             :     // Allow the target to implement this method for its nodes.
    3050     4135982 :     TLI->computeKnownBitsForTargetNode(Op, Known, DemandedElts, *this, Depth);
    3051     4135982 :     break;
    3052             :   }
    3053             : 
    3054             :   assert(!Known.hasConflict() && "Bits known to be one AND zero?");
    3055             :   return Known;
    3056             : }
    3057             : 
    3058      136824 : SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0,
    3059             :                                                              SDValue N1) const {
    3060             :   // X + 0 never overflow
    3061      136824 :   if (isNullConstant(N1))
    3062             :     return OFK_Never;
    3063             : 
    3064      136824 :   KnownBits N1Known;
    3065      136824 :   computeKnownBits(N1, N1Known);
    3066      136824 :   if (N1Known.Zero.getBoolValue()) {
    3067      131832 :     KnownBits N0Known;
    3068      131963 :     computeKnownBits(N0, N0Known);
    3069             : 
    3070             :     bool overflow;
    3071      263926 :     (void)(~N0Known.Zero).uadd_ov(~N1Known.Zero, overflow);
    3072      131963 :     if (!overflow)
    3073         131 :       return OFK_Never;
    3074             :   }
    3075             : 
    3076             :   // mulhi + 1 never overflow
    3077      273661 :   if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 &&
    3078      138068 :       (~N1Known.Zero & 0x01) == ~N1Known.Zero)
    3079             :     return OFK_Never;
    3080             : 
    3081      272940 :   if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) {
    3082         233 :     KnownBits N0Known;
    3083         233 :     computeKnownBits(N0, N0Known);
    3084             : 
    3085         233 :     if ((~N0Known.Zero & 0x01) == ~N0Known.Zero)
    3086           0 :       return OFK_Never;
    3087             :   }
    3088             : 
    3089             :   return OFK_Sometime;
    3090             : }
    3091             : 
    3092       25913 : bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val) const {
    3093       51826 :   EVT OpVT = Val.getValueType();
    3094             :   unsigned BitWidth = OpVT.getScalarSizeInBits();
    3095             : 
    3096             :   // Is the constant a known power of 2?
    3097             :   if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(Val))
    3098       42317 :     return Const->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
    3099             : 
    3100             :   // A left-shift of a constant one will have exactly one bit set because
    3101             :   // shifting the bit off the end is undefined.
    3102        4774 :   if (Val.getOpcode() == ISD::SHL) {
    3103          51 :     auto *C = isConstOrConstSplat(Val.getOperand(0));
    3104          51 :     if (C && C->getAPIntValue() == 1)
    3105             :       return true;
    3106             :   }
    3107             : 
    3108             :   // Similarly, a logical right-shift of a constant sign-bit will have exactly
    3109             :   // one bit set.
    3110        4729 :   if (Val.getOpcode() == ISD::SRL) {
    3111          23 :     auto *C = isConstOrConstSplat(Val.getOperand(0));
    3112          23 :     if (C && C->getAPIntValue().isSignMask())
    3113             :       return true;
    3114             :   }
    3115             : 
    3116             :   // Are all operands of a build vector constant powers of two?
    3117        4724 :   if (Val.getOpcode() == ISD::BUILD_VECTOR)
    3118        3341 :     if (llvm::all_of(Val->ops(), [BitWidth](SDValue E) {
    3119             :           if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(E))
    3120             :             return C->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
    3121             :           return false;
    3122             :         }))
    3123             :       return true;
    3124             : 
    3125             :   // More could be done here, though the above checks are enough
    3126             :   // to handle some common cases.
    3127             : 
    3128             :   // Fall back to computeKnownBits to catch other known cases.
    3129        8100 :   KnownBits Known = computeKnownBits(Val);
    3130        4207 :   return (Known.countMaxPopulation() == 1) && (Known.countMinPopulation() == 1);
    3131             : }
    3132             : 
    3133      613682 : unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
    3134     1227364 :   EVT VT = Op.getValueType();
    3135             :   APInt DemandedElts = VT.isVector()
    3136             :                            ? APInt::getAllOnesValue(VT.getVectorNumElements())
    3137      659907 :                            : APInt(1, 1);
    3138      613682 :   return ComputeNumSignBits(Op, DemandedElts, Depth);
    3139             : }
    3140             : 
    3141      709325 : unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
    3142             :                                           unsigned Depth) const {
    3143     1418650 :   EVT VT = Op.getValueType();
    3144             :   assert((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!");
    3145      709325 :   unsigned VTBits = VT.getScalarSizeInBits();
    3146      709325 :   unsigned NumElts = DemandedElts.getBitWidth();
    3147             :   unsigned Tmp, Tmp2;
    3148      709325 :   unsigned FirstAnswer = 1;
    3149             : 
    3150             :   if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
    3151       26349 :     const APInt &Val = C->getAPIntValue();
    3152       26349 :     return Val.getNumSignBits();
    3153             :   }
    3154             : 
    3155      682976 :   if (Depth == 6)
    3156             :     return 1;  // Limit search depth.
    3157             : 
    3158      682671 :   if (!DemandedElts)
    3159             :     return 1;  // No demanded elts, better to assume we don't know anything.
    3160             : 
    3161             :   unsigned Opcode = Op.getOpcode();
    3162      682671 :   switch (Opcode) {
    3163      433574 :   default: break;
    3164        4311 :   case ISD::AssertSext:
    3165        4311 :     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
    3166      249097 :     return VTBits-Tmp+1;
    3167        9504 :   case ISD::AssertZext:
    3168        9504 :     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
    3169        9504 :     return VTBits-Tmp;
    3170             : 
    3171        3467 :   case ISD::BUILD_VECTOR:
    3172        3467 :     Tmp = VTBits;
    3173       14848 :     for (unsigned i = 0, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) {
    3174       11381 :       if (!DemandedElts[i])
    3175        3925 :         continue;
    3176             : 
    3177        7456 :       SDValue SrcOp = Op.getOperand(i);
    3178       14912 :       Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1);
    3179             : 
    3180             :       // BUILD_VECTOR can implicitly truncate sources, we must handle this.
    3181        7456 :       if (SrcOp.getValueSizeInBits() != VTBits) {
    3182             :         assert(SrcOp.getValueSizeInBits() > VTBits &&
    3183             :                "Expected BUILD_VECTOR implicit truncation");
    3184          24 :         unsigned ExtraBits = SrcOp.getValueSizeInBits() - VTBits;
    3185          24 :         Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1);
    3186             :       }
    3187        7456 :       Tmp = std::min(Tmp, Tmp2);
    3188        3467 :     }
    3189        3467 :     return Tmp;
    3190             : 
    3191             :   case ISD::VECTOR_SHUFFLE: {
    3192             :     // Collect the minimum number of sign bits that are shared by every vector
    3193             :     // element referenced by the shuffle.
    3194             :     APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
    3195             :     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
    3196             :     assert(NumElts == SVN->getMask().size() && "Unexpected vector size");
    3197        8106 :     for (unsigned i = 0; i != NumElts; ++i) {
    3198        7242 :       int M = SVN->getMaskElt(i);
    3199        7242 :       if (!DemandedElts[i])
    3200             :         continue;
    3201             :       // For UNDEF elements, we don't know anything about the common state of
    3202             :       // the shuffle result.
    3203        5372 :       if (M < 0)
    3204             :         return 1;
    3205        5293 :       if ((unsigned)M < NumElts)
    3206        4607 :         DemandedLHS.setBit((unsigned)M % NumElts);
    3207             :       else
    3208         686 :         DemandedRHS.setBit((unsigned)M % NumElts);
    3209             :     }
    3210         864 :     Tmp = std::numeric_limits<unsigned>::max();
    3211         864 :     if (!!DemandedLHS)
    3212        1722 :       Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1);
    3213         864 :     if (!!DemandedRHS) {
    3214         458 :       Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1);
    3215         229 :       Tmp = std::min(Tmp, Tmp2);
    3216             :     }
    3217             :     // If we don't know anything, early out and try computeKnownBits fall-back.
    3218         864 :     if (Tmp == 1)
    3219             :       break;
    3220             :     assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
    3221             :     return Tmp;
    3222             :   }
    3223             : 
    3224       23886 :   case ISD::BITCAST: {
    3225       23886 :     SDValue N0 = Op.getOperand(0);
    3226       23886 :     EVT SrcVT = N0.getValueType();
    3227             :     unsigned SrcBits = SrcVT.getScalarSizeInBits();
    3228             : 
    3229             :     // Ignore bitcasts from unsupported types..
    3230       23886 :     if (!(SrcVT.isInteger() || SrcVT.isFloatingPoint()))
    3231             :       break;
    3232             : 
    3233             :     // Fast handling of 'identity' bitcasts.
    3234       23877 :     if (VTBits == SrcBits)
    3235       10869 :       return ComputeNumSignBits(N0, DemandedElts, Depth + 1);
    3236             : 
    3237       22053 :     bool IsLE = getDataLayout().isLittleEndian();
    3238             : 
    3239             :     // Bitcast 'large element' scalar/vector to 'small element' vector.
    3240       22053 :     if ((SrcBits % VTBits) == 0) {
    3241             :       assert(VT.isVector() && "Expected bitcast to vector");
    3242             : 
    3243        9045 :       unsigned Scale = SrcBits / VTBits;
    3244        9045 :       APInt SrcDemandedElts(NumElts / Scale, 0);
    3245       74273 :       for (unsigned i = 0; i != NumElts; ++i)
    3246       65228 :         if (DemandedElts[i])
    3247       59783 :           SrcDemandedElts.setBit(i / Scale);
    3248             : 
    3249             :       // Fast case - sign splat can be simply split across the small elements.
    3250        9045 :       Tmp = ComputeNumSignBits(N0, SrcDemandedElts, Depth + 1);
    3251        9045 :       if (Tmp == SrcBits)
    3252             :         return VTBits;
    3253             : 
    3254             :       // Slow case - determine how far the sign extends into each sub-element.
    3255        6200 :       Tmp2 = VTBits;
    3256       12732 :       for (unsigned i = 0; i != NumElts; ++i)
    3257       10172 :         if (DemandedElts[i]) {
    3258        7395 :           unsigned SubOffset = i % Scale;
    3259        7395 :           SubOffset = (IsLE ? ((Scale - 1) - SubOffset) : SubOffset);
    3260        7395 :           SubOffset = SubOffset * VTBits;
    3261        7395 :           if (Tmp <= SubOffset)
    3262             :             return 1;
    3263        6310 :           Tmp2 = std::min(Tmp2, Tmp - SubOffset);
    3264             :         }
    3265        2560 :       return Tmp2;
    3266             :     }
    3267             :     break;
    3268             :   }
    3269             : 
    3270        2264 :   case ISD::SIGN_EXTEND:
    3271        2264 :     Tmp = VTBits - Op.getOperand(0).getScalarValueSizeInBits();
    3272        4528 :     return ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1) + Tmp;
    3273        3260 :   case ISD::SIGN_EXTEND_INREG:
    3274             :     // Max of the input and what this extends.
    3275        3260 :     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits();
    3276        3260 :     Tmp = VTBits-Tmp+1;
    3277        6520 :     Tmp2 = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3278        3260 :     return std::max(Tmp, Tmp2);
    3279          80 :   case ISD::SIGN_EXTEND_VECTOR_INREG: {
    3280          80 :     SDValue Src = Op.getOperand(0);
    3281          80 :     EVT SrcVT = Src.getValueType();
    3282          80 :     APInt DemandedSrcElts = DemandedElts.zextOrSelf(SrcVT.getVectorNumElements());
    3283          80 :     Tmp = VTBits - SrcVT.getScalarSizeInBits();
    3284          80 :     return ComputeNumSignBits(Src, DemandedSrcElts, Depth+1) + Tmp;
    3285             :   }
    3286             : 
    3287        2920 :   case ISD::SRA:
    3288        5840 :     Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3289             :     // SRA X, C   -> adds C sign bits.
    3290        2920 :     if (ConstantSDNode *C =
    3291        5840 :             isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)) {
    3292        2730 :       APInt ShiftVal = C->getAPIntValue();
    3293        2730 :       ShiftVal += Tmp;
    3294        7968 :       Tmp = ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue();
    3295             :     }
    3296        2920 :     return Tmp;
    3297        7340 :   case ISD::SHL:
    3298        7340 :     if (ConstantSDNode *C =
    3299        7340 :             isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)) {
    3300             :       // shl destroys sign bits.
    3301       13756 :       Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3302       20634 :       if (C->getAPIntValue().uge(VTBits) ||      // Bad shift.
    3303        6878 :           C->getAPIntValue().uge(Tmp)) break;    // Shifted all sign bits out.
    3304         508 :       return Tmp - C->getZExtValue();
    3305         462 :     }
    3306             :     break;
    3307       26384 :   case ISD::AND:
    3308             :   case ISD::OR:
    3309             :   case ISD::XOR:    // NOT is handled here.
    3310             :     // Logical binary ops preserve the number of sign bits at the worst.
    3311       52768 :     Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3312       26384 :     if (Tmp != 1) {
    3313       20146 :       Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
    3314       10073 :       FirstAnswer = std::min(Tmp, Tmp2);
    3315             :       // We computed what we know about the sign bits as our first
    3316             :       // answer. Now proceed to the generic code that uses
    3317             :       // computeKnownBits, and pick whichever answer is better.
    3318             :     }
    3319             :     break;
    3320             : 
    3321         809 :   case ISD::SELECT:
    3322             :   case ISD::VSELECT:
    3323        1618 :     Tmp = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
    3324         809 :     if (Tmp == 1) return 1;  // Early out.
    3325         360 :     Tmp2 = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
    3326         180 :     return std::min(Tmp, Tmp2);
    3327         126 :   case ISD::SELECT_CC:
    3328         252 :     Tmp = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
    3329         126 :     if (Tmp == 1) return 1;  // Early out.
    3330         158 :     Tmp2 = ComputeNumSignBits(Op.getOperand(3), DemandedElts, Depth+1);
    3331          79 :     return std::min(Tmp, Tmp2);
    3332             : 
    3333         602 :   case ISD::SMIN:
    3334             :   case ISD::SMAX: {
    3335             :     // If we have a clamp pattern, we know that the number of sign bits will be
    3336             :     // the minimum of the clamp min/max range.
    3337             :     bool IsMax = (Opcode == ISD::SMAX);
    3338             :     ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
    3339         602 :     if ((CstLow = isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)))
    3340        1495 :       if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
    3341         489 :         CstHigh = isConstOrDemandedConstSplat(Op.getOperand(0).getOperand(1),
    3342             :                                               DemandedElts);
    3343         602 :     if (CstLow && CstHigh) {
    3344         489 :       if (!IsMax)
    3345             :         std::swap(CstLow, CstHigh);
    3346        1467 :       if (CstLow->getAPIntValue().sle(CstHigh->getAPIntValue())) {
    3347         489 :         Tmp = CstLow->getAPIntValue().getNumSignBits();
    3348         489 :         Tmp2 = CstHigh->getAPIntValue().getNumSignBits();
    3349         489 :         return std::min(Tmp, Tmp2);
    3350             :       }
    3351             :     }
    3352             : 
    3353             :     // Fallback - just get the minimum number of sign bits of the operands.
    3354         226 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
    3355         113 :     if (Tmp == 1)
    3356             :       return 1;  // Early out.
    3357         110 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
    3358          55 :     return std::min(Tmp, Tmp2);
    3359             :   }
    3360         138 :   case ISD::UMIN:
    3361             :   case ISD::UMAX:
    3362         276 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
    3363         138 :     if (Tmp == 1)
    3364             :       return 1;  // Early out.
    3365          34 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
    3366          17 :     return std::min(Tmp, Tmp2);
    3367         144 :   case ISD::SADDO:
    3368             :   case ISD::UADDO:
    3369             :   case ISD::SSUBO:
    3370             :   case ISD::USUBO:
    3371             :   case ISD::SMULO:
    3372             :   case ISD::UMULO:
    3373         144 :     if (Op.getResNo() != 1)
    3374             :       break;
    3375             :     // The boolean result conforms to getBooleanContents.  Fall through.
    3376             :     // If setcc returns 0/-1, all bits are sign bits.
    3377             :     // We know that we have an integer-based boolean since these operations
    3378             :     // are only available for integer.
    3379         212 :     if (TLI->getBooleanContents(VT.isVector(), false) ==
    3380             :         TargetLowering::ZeroOrNegativeOneBooleanContent)
    3381             :       return VTBits;
    3382             :     break;
    3383        7501 :   case ISD::SETCC:
    3384             :     // If setcc returns 0/-1, all bits are sign bits.
    3385       22503 :     if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    3386             :         TargetLowering::ZeroOrNegativeOneBooleanContent)
    3387             :       return VTBits;
    3388             :     break;
    3389          61 :   case ISD::ROTL:
    3390             :   case ISD::ROTR:
    3391             :     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
    3392         122 :       unsigned RotAmt = C->getAPIntValue().urem(VTBits);
    3393             : 
    3394             :       // Handle rotate right by N like a rotate left by 32-N.
    3395          61 :       if (Opcode == ISD::ROTR)
    3396          28 :         RotAmt = (VTBits - RotAmt) % VTBits;
    3397             : 
    3398             :       // If we aren't rotating out all of the known-in sign bits, return the
    3399             :       // number that are left.  This handles rotl(sext(x), 1) for example.
    3400         122 :       Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3401          61 :       if (Tmp > (RotAmt + 1)) return (Tmp - RotAmt);
    3402             :     }
    3403             :     break;
    3404      158756 :   case ISD::ADD:
    3405             :   case ISD::ADDC:
    3406             :     // Add can have at most one carry bit.  Thus we know that the output
    3407             :     // is, at worst, one more bit than the inputs.
    3408      317512 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3409      158756 :     if (Tmp == 1) return 1;  // Early out.
    3410             : 
    3411             :     // Special case decrementing a value (ADD X, -1):
    3412        2244 :     if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
    3413        2324 :       if (CRHS->isAllOnesValue()) {
    3414         369 :         KnownBits Known = computeKnownBits(Op.getOperand(0), Depth+1);
    3415             : 
    3416             :         // If the input is known to be 0 or 1, the output is 0/-1, which is all
    3417             :         // sign bits set.
    3418         474 :         if ((Known.Zero | 1).isAllOnesValue())
    3419         105 :           return VTBits;
    3420             : 
    3421             :         // If we are subtracting one from a positive number, there is no carry
    3422             :         // out of the result.
    3423         228 :         if (Known.isNonNegative())
    3424             :           return Tmp;
    3425             :       }
    3426             : 
    3427        4278 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
    3428        2139 :     if (Tmp2 == 1) return 1;
    3429        1968 :     return std::min(Tmp, Tmp2)-1;
    3430             : 
    3431       10646 :   case ISD::SUB:
    3432       21292 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
    3433       10646 :     if (Tmp2 == 1) return 1;
    3434             : 
    3435             :     // Handle NEG.
    3436        1774 :     if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0)))
    3437         482 :       if (CLHS->isNullValue()) {
    3438         290 :         KnownBits Known = computeKnownBits(Op.getOperand(1), Depth+1);
    3439             :         // If the input is known to be 0 or 1, the output is 0/-1, which is all
    3440             :         // sign bits set.
    3441         276 :         if ((Known.Zero | 1).isAllOnesValue())
    3442         124 :           return VTBits;
    3443             : 
    3444             :         // If the input is known to be positive (the sign bit is known clear),
    3445             :         // the output of the NEG has the same number of sign bits as the input.
    3446         133 :         if (Known.isNonNegative())
    3447             :           return Tmp2;
    3448             : 
    3449             :         // Otherwise, we treat this like a SUB.
    3450             :       }
    3451             : 
    3452             :     // Sub can have at most one carry bit.  Thus we know that the output
    3453             :     // is, at worst, one more bit than the inputs.
    3454        1526 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3455         763 :     if (Tmp == 1) return 1;  // Early out.
    3456         501 :     return std::min(Tmp, Tmp2)-1;
    3457       34138 :   case ISD::TRUNCATE: {
    3458             :     // Check if the sign bits of source go down as far as the truncated value.
    3459       34138 :     unsigned NumSrcBits = Op.getOperand(0).getScalarValueSizeInBits();
    3460       68276 :     unsigned NumSrcSignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
    3461       34138 :     if (NumSrcSignBits > (NumSrcBits - VTBits))
    3462        4537 :       return NumSrcSignBits - (NumSrcBits - VTBits);
    3463             :     break;
    3464             :   }
    3465          30 :   case ISD::EXTRACT_ELEMENT: {
    3466          60 :     const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3467          30 :     const int BitWidth = Op.getValueSizeInBits();
    3468          60 :     const int Items = Op.getOperand(0).getValueSizeInBits() / BitWidth;
    3469             : 
    3470             :     // Get reverse index (starting from 1), Op1 value indexes elements from
    3471             :     // little end. Sign starts at big end.
    3472          30 :     const int rIndex = Items - 1 - Op.getConstantOperandVal(1);
    3473             : 
    3474             :     // If the sign portion ends in our element the subtraction gives correct
    3475             :     // result. Otherwise it gives either negative or > bitwidth result
    3476          60 :     return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
    3477             :   }
    3478         165 :   case ISD::INSERT_VECTOR_ELT: {
    3479         165 :     SDValue InVec = Op.getOperand(0);
    3480         165 :     SDValue InVal = Op.getOperand(1);
    3481         165 :     SDValue EltNo = Op.getOperand(2);
    3482         330 :     unsigned NumElts = InVec.getValueType().getVectorNumElements();
    3483             : 
    3484             :     ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
    3485         314 :     if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
    3486             :       // If we know the element index, split the demand between the
    3487             :       // source vector and the inserted element.
    3488         157 :       unsigned EltIdx = CEltNo->getZExtValue();
    3489             : 
    3490             :       // If we demand the inserted element then get its sign bits.
    3491         157 :       Tmp = std::numeric_limits<unsigned>::max();
    3492         157 :       if (DemandedElts[EltIdx]) {
    3493             :         // TODO - handle implicit truncation of inserted elements.
    3494         155 :         if (InVal.getScalarValueSizeInBits() != VTBits)
    3495             :           break;
    3496         155 :         Tmp = ComputeNumSignBits(InVal, Depth + 1);
    3497             :       }
    3498             : 
    3499             :       // If we demand the source vector then get its sign bits, and determine
    3500             :       // the minimum.
    3501             :       APInt VectorElts = DemandedElts;
    3502             :       VectorElts.clearBit(EltIdx);
    3503         157 :       if (!!VectorElts) {
    3504          90 :         Tmp2 = ComputeNumSignBits(InVec, VectorElts, Depth + 1);
    3505          90 :         Tmp = std::min(Tmp, Tmp2);
    3506             :       }
    3507             :     } else {
    3508             :       // Unknown element index, so ignore DemandedElts and demand them all.
    3509           8 :       Tmp = ComputeNumSignBits(InVec, Depth + 1);
    3510           8 :       Tmp2 = ComputeNumSignBits(InVal, Depth + 1);
    3511           8 :       Tmp = std::min(Tmp, Tmp2);
    3512             :     }
    3513             :     assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
    3514         165 :     return Tmp;
    3515             :   }
    3516       15854 :   case ISD::EXTRACT_VECTOR_ELT: {
    3517       15854 :     SDValue InVec = Op.getOperand(0);
    3518       15854 :     SDValue EltNo = Op.getOperand(1);
    3519       15854 :     EVT VecVT = InVec.getValueType();
    3520       15854 :     const unsigned BitWidth = Op.getValueSizeInBits();
    3521       31708 :     const unsigned EltBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
    3522             :     const unsigned NumSrcElts = VecVT.getVectorNumElements();
    3523             : 
    3524             :     // If BitWidth > EltBitWidth the value is anyext:ed, and we do not know
    3525             :     // anything about sign bits. But if the sizes match we can derive knowledge
    3526             :     // about sign bits from the vector operand.
    3527       15854 :     if (BitWidth != EltBitWidth)
    3528             :       break;
    3529             : 
    3530             :     // If we know the element index, just demand that vector element, else for
    3531             :     // an unknown element index, ignore DemandedElts and demand them all.
    3532       14744 :     APInt DemandedSrcElts = APInt::getAllOnesValue(NumSrcElts);
    3533             :     ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
    3534       29488 :     if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts))
    3535             :       DemandedSrcElts =
    3536       29488 :           APInt::getOneBitSet(NumSrcElts, ConstEltNo->getZExtValue());
    3537             : 
    3538       14744 :     return ComputeNumSignBits(InVec, DemandedSrcElts, Depth + 1);
    3539             :   }
    3540       11012 :   case ISD::EXTRACT_SUBVECTOR: {
    3541             :     // If we know the element index, just demand that subvector elements,
    3542             :     // otherwise demand them all.
    3543       11012 :     SDValue Src = Op.getOperand(0);
    3544             :     ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
    3545       11012 :     unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
    3546       11012 :     if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    3547             :       // Offset the demanded elts by the subvector index.
    3548             :       uint64_t Idx = SubIdx->getZExtValue();
    3549       11012 :       APInt DemandedSrc = DemandedElts.zextOrSelf(NumSrcElts).shl(Idx);
    3550       11012 :       return ComputeNumSignBits(Src, DemandedSrc, Depth + 1);
    3551             :     }
    3552           0 :     return ComputeNumSignBits(Src, Depth + 1);
    3553             :   }
    3554        2595 :   case ISD::CONCAT_VECTORS:
    3555             :     // Determine the minimum number of sign bits across all demanded
    3556             :     // elts of the input vectors. Early out if the result is already 1.
    3557        2595 :     Tmp = std::numeric_limits<unsigned>::max();
    3558        5190 :     EVT SubVectorVT = Op.getOperand(0).getValueType();
    3559             :     unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
    3560             :     unsigned NumSubVectors = Op.getNumOperands();
    3561        6669 :     for (unsigned i = 0; (i < NumSubVectors) && (Tmp > 1); ++i) {
    3562        4074 :       APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
    3563        8148 :       DemandedSub = DemandedSub.trunc(NumSubVectorElts);
    3564        4074 :       if (!DemandedSub)
    3565             :         continue;
    3566        5906 :       Tmp2 = ComputeNumSignBits(Op.getOperand(i), DemandedSub, Depth + 1);
    3567        2953 :       Tmp = std::min(Tmp, Tmp2);
    3568        2595 :     }
    3569             :     assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
    3570        2595 :     return Tmp;
    3571             :   }
    3572             : 
    3573             :   // If we are looking at the loaded value of the SDNode.
    3574      433574 :   if (Op.getResNo() == 0) {
    3575             :     // Handle LOADX separately here. EXTLOAD case will fallthrough.
    3576             :     if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
    3577             :       unsigned ExtType = LD->getExtensionType();
    3578       76863 :       switch (ExtType) {
    3579             :         default: break;
    3580        1626 :         case ISD::SEXTLOAD:    // '17' bits known
    3581        1626 :           Tmp = LD->getMemoryVT().getScalarSizeInBits();
    3582        1626 :           return VTBits-Tmp+1;
    3583        2981 :         case ISD::ZEXTLOAD:    // '16' bits known
    3584        2981 :           Tmp = LD->getMemoryVT().getScalarSizeInBits();
    3585        2981 :           return VTBits-Tmp;
    3586             :       }
    3587             :     }
    3588             :   }
    3589             : 
    3590             :   // Allow the target to implement this method for its nodes.
    3591      857934 :   if (Opcode >= ISD::BUILTIN_OP_END ||
    3592      428967 :       Opcode == ISD::INTRINSIC_WO_CHAIN ||
    3593      316608 :       Opcode == ISD::INTRINSIC_W_CHAIN ||
    3594             :       Opcode == ISD::INTRINSIC_VOID) {
    3595             :     unsigned NumBits =
    3596      113119 :         TLI->ComputeNumSignBitsForTargetNode(Op, DemandedElts, *this, Depth);
    3597      113119 :     if (NumBits > 1)
    3598       12476 :       FirstAnswer = std::max(FirstAnswer, NumBits);
    3599             :   }
    3600             : 
    3601             :   // Finally, if we can prove that the top bits of the result are 0's or 1's,
    3602             :   // use this information.
    3603      857934 :   KnownBits Known = computeKnownBits(Op, DemandedElts, Depth);
    3604             : 
    3605             :   APInt Mask;
    3606      428967 :   if (Known.isNonNegative()) {        // sign bit is 0
    3607       62014 :     Mask = Known.Zero;
    3608      366953 :   } else if (Known.isNegative()) {  // sign bit is 1;
    3609         114 :     Mask = Known.One;
    3610             :   } else {
    3611             :     // Nothing known.
    3612      366839 :     return FirstAnswer;
    3613             :   }
    3614             : 
    3615             :   // Okay, we know that the sign bit in Mask is set.  Use CLZ to determine
    3616             :   // the number of identical bits in the top of the input value.
    3617       62128 :   Mask = ~Mask;
    3618       62128 :   Mask <<= Mask.getBitWidth()-VTBits;
    3619             :   // Return # leading zeros.  We use 'min' here in case Val was zero before
    3620             :   // shifting.  We don't want to return '64' as for an i32 "0".
    3621      124256 :   return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
    3622             : }
    3623             : 
    3624     3359157 : bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
    3625     3359157 :   if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
    3626             :       !isa<ConstantSDNode>(Op.getOperand(1)))
    3627             :     return false;
    3628             : 
    3629     1996717 :   if (Op.getOpcode() == ISD::OR &&
    3630      354476 :       !MaskedValueIsZero(Op.getOperand(0),
    3631             :                      cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
    3632         196 :     return false;
    3633             : 
    3634             :   return true;
    3635             : }
    3636             : 
    3637        1273 : bool SelectionDAG::isKnownNeverNaN(SDValue Op, bool SNaN, unsigned Depth) const {
    3638             :   // If we're told that NaNs won't happen, assume they won't.
    3639        1273 :   if (getTarget().Options.NoNaNsFPMath || Op->getFlags().hasNoNaNs())
    3640         347 :     return true;
    3641             : 
    3642         926 :   if (Depth == 6)
    3643             :     return false; // Limit search depth.
    3644             : 
    3645             :   // TODO: Handle vectors.
    3646             :   // If the value is a constant, we can obviously see if it is a NaN or not.
    3647             :   if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op)) {
    3648         188 :     return !C->getValueAPF().isNaN() ||
    3649           0 :            (SNaN && !C->getValueAPF().isSignaling());
    3650             :   }
    3651             : 
    3652             :   unsigned Opcode = Op.getOpcode();
    3653         832 :   switch (Opcode) {
    3654          36 :   case ISD::FADD:
    3655             :   case ISD::FSUB:
    3656             :   case ISD::FMUL:
    3657             :   case ISD::FDIV:
    3658             :   case ISD::FREM:
    3659             :   case ISD::FSIN:
    3660             :   case ISD::FCOS: {
    3661          36 :     if (SNaN)
    3662           5 :       return true;
    3663             :     // TODO: Need isKnownNeverInfinity
    3664             :     return false;
    3665             :   }
    3666           7 :   case ISD::FCANONICALIZE:
    3667             :   case ISD::FEXP:
    3668             :   case ISD::FEXP2:
    3669             :   case ISD::FTRUNC:
    3670             :   case ISD::FFLOOR:
    3671             :   case ISD::FCEIL:
    3672             :   case ISD::FROUND:
    3673             :   case ISD::FRINT:
    3674             :   case ISD::FNEARBYINT: {
    3675           7 :     if (SNaN)
    3676             :       return true;
    3677           0 :     return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
    3678             :   }
    3679         130 :   case ISD::FABS:
    3680             :   case ISD::FNEG:
    3681             :   case ISD::FCOPYSIGN: {
    3682         260 :     return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
    3683             :   }
    3684           3 :   case ISD::SELECT:
    3685           8 :     return isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
    3686           2 :            isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
    3687           2 :   case ISD::FP_EXTEND:
    3688             :   case ISD::FP_ROUND: {
    3689           2 :     if (SNaN)
    3690             :       return true;
    3691           0 :     return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
    3692             :   }
    3693             :   case ISD::SINT_TO_FP:
    3694             :   case ISD::UINT_TO_FP:
    3695             :     return true;
    3696           9 :   case ISD::FMA:
    3697             :   case ISD::FMAD: {
    3698           9 :     if (SNaN)
    3699             :       return true;
    3700          16 :     return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1) &&
    3701           8 :            isKnownNeverNaN(Op.getOperand(1), SNaN, Depth + 1) &&
    3702           0 :            isKnownNeverNaN(Op.getOperand(2), SNaN, Depth + 1);
    3703             :   }
    3704           0 :   case ISD::FSQRT: // Need is known positive
    3705             :   case ISD::FLOG:
    3706             :   case ISD::FLOG2:
    3707             :   case ISD::FLOG10:
    3708             :   case ISD::FPOWI:
    3709             :   case ISD::FPOW: {
    3710           0 :     if (SNaN)
    3711           0 :       return true;
    3712             :     // TODO: Refine on operand
    3713             :     return false;
    3714             :   }
    3715             : 
    3716             :   // TODO: Handle FMINNUM/FMAXNUM/FMINNAN/FMAXNAN when there is an agreement on
    3717             :   // what they should do.
    3718           0 :   case ISD::EXTRACT_VECTOR_ELT: {
    3719           0 :     return isKnownNeverNaN(Op.getOperand(0), SNaN, Depth + 1);
    3720             :   }
    3721         643 :   default:
    3722        1286 :     if (Opcode >= ISD::BUILTIN_OP_END ||
    3723         643 :         Opcode == ISD::INTRINSIC_WO_CHAIN ||
    3724         616 :         Opcode == ISD::INTRINSIC_W_CHAIN ||
    3725             :         Opcode == ISD::INTRINSIC_VOID) {
    3726          27 :       return TLI->isKnownNeverNaNForTargetNode(Op, *this, SNaN, Depth);
    3727             :     }
    3728             : 
    3729             :     return false;
    3730             :   }
    3731             : }
    3732             : 
    3733         164 : bool SelectionDAG::isKnownNeverZeroFloat(SDValue Op) const {
    3734             :   assert(Op.getValueType().isFloatingPoint() &&
    3735             :          "Floating point type expected");
    3736             : 
    3737             :   // If the value is a constant, we can obviously see if it is a zero or not.
    3738             :   // TODO: Add BuildVector support.
    3739             :   if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
    3740          52 :     return !C->isZero();
    3741             :   return false;
    3742             : }
    3743             : 
    3744        4034 : bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
    3745             :   assert(!Op.getValueType().isFloatingPoint() &&
    3746             :          "Floating point types unsupported - use isKnownNeverZeroFloat");
    3747             : 
    3748             :   // If the value is a constant, we can obviously see if it is a zero or not.
    3749        8068 :   if (ISD::matchUnaryPredicate(
    3750             :           Op, [](ConstantSDNode *C) { return !C->isNullValue(); }))
    3751             :     return true;
    3752             : 
    3753             :   // TODO: Recognize more cases here.
    3754        3036 :   switch (Op.getOpcode()) {
    3755             :   default: break;
    3756          39 :   case ISD::OR:
    3757          54 :     if (isKnownNeverZero(Op.getOperand(1)) ||
    3758          15 :         isKnownNeverZero(Op.getOperand(0)))
    3759          24 :       return true;
    3760             :     break;
    3761             :   }
    3762             : 
    3763             :   return false;
    3764             : }
    3765             : 
    3766       18885 : bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
    3767             :   // Check the obvious case.
    3768             :   if (A == B) return true;
    3769             : 
    3770             :   // For for negative and positive zero.
    3771             :   if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
    3772             :     if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
    3773          33 :       if (CA->isZero() && CB->isZero()) return true;
    3774             : 
    3775             :   // Otherwise they may not be equal.
    3776             :   return false;
    3777             : }
    3778             : 
    3779             : // FIXME: unify with llvm::haveNoCommonBitsSet.
    3780             : // FIXME: could also handle masked merge pattern (X & ~M) op (Y & M)
    3781     3162477 : bool SelectionDAG::haveNoCommonBitsSet(SDValue A, SDValue B) const {
    3782             :   assert(A.getValueType() == B.getValueType() &&
    3783             :          "Values must have the same type");
    3784     6324954 :   return (computeKnownBits(A).Zero | computeKnownBits(B).Zero).isAllOnesValue();
    3785             : }
    3786             : 
    3787       51428 : static SDValue FoldCONCAT_VECTORS(const SDLoc &DL, EVT VT,
    3788             :                                   ArrayRef<SDValue> Ops,
    3789             :                                   SelectionDAG &DAG) {
    3790             :   assert(!Ops.empty() && "Can't concatenate an empty list of vectors!");
    3791             :   assert(llvm::all_of(Ops,
    3792             :                       [Ops](SDValue Op) {
    3793             :                         return Ops[0].getValueType() == Op.getValueType();
    3794             :                       }) &&
    3795             :          "Concatenation of vectors with inconsistent value types!");
    3796             :   assert((Ops.size() * Ops[0].getValueType().getVectorNumElements()) ==
    3797             :              VT.getVectorNumElements() &&
    3798             :          "Incorrect element count in vector concatenation!");
    3799             : 
    3800       51428 :   if (Ops.size() == 1)
    3801           0 :     return Ops[0];
    3802             : 
    3803             :   // Concat of UNDEFs is UNDEF.
    3804       51428 :   if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
    3805         501 :     return DAG.getUNDEF(VT);
    3806             : 
    3807             :   // A CONCAT_VECTOR with all UNDEF/BUILD_VECTOR operands can be
    3808             :   // simplified to one big BUILD_VECTOR.
    3809             :   // FIXME: Add support for SCALAR_TO_VECTOR as well.
    3810       50927 :   EVT SVT = VT.getScalarType();
    3811             :   SmallVector<SDValue, 16> Elts;
    3812       54750 :   for (SDValue Op : Ops) {
    3813       53771 :     EVT OpVT = Op.getValueType();
    3814       53771 :     if (Op.isUndef())
    3815        1186 :       Elts.append(OpVT.getVectorNumElements(), DAG.getUNDEF(SVT));
    3816       53178 :     else if (Op.getOpcode() == ISD::BUILD_VECTOR)
    3817        6460 :       Elts.append(Op->op_begin(), Op->op_end());
    3818             :     else
    3819       49948 :       return SDValue();
    3820             :   }
    3821             : 
    3822             :   // BUILD_VECTOR requires all inputs to be of the same type, find the
    3823             :   // maximum type and extend them all.
    3824       18433 :   for (SDValue Op : Elts)
    3825       17454 :     SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
    3826             : 
    3827         979 :   if (SVT.bitsGT(VT.getScalarType()))
    3828       13342 :     for (SDValue &Op : Elts)
    3829       25528 :       Op = DAG.getTargetLoweringInfo().isZExtFree(Op.getValueType(), SVT)
    3830       25528 :                ? DAG.getZExtOrTrunc(Op, DL, SVT)
    3831       12764 :                : DAG.getSExtOrTrunc(Op, DL, SVT);
    3832             : 
    3833         979 :   SDValue V = DAG.getBuildVector(VT, DL, Elts);
    3834             :   NewSDValueDbgMsg(V, "New node fold concat vectors: ", &DAG);
    3835         979 :   return V;
    3836             : }
    3837             : 
    3838             : /// Gets or creates the specified node.
    3839     7568333 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT) {
    3840             :   FoldingSetNodeID ID;
    3841     7568333 :   AddNodeIDNode(ID, Opcode, getVTList(VT), None);
    3842     7568333 :   void *IP = nullptr;
    3843     7568333 :   if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    3844     6614719 :     return SDValue(E, 0);
    3845             : 
    3846     1907228 :   auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(),
    3847      953614 :                               getVTList(VT));
    3848      953614 :   CSEMap.InsertNode(N, IP);
    3849             : 
    3850      953614 :   InsertNode(N);
    3851             :   SDValue V = SDValue(N, 0);
    3852             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    3853      953614 :   return V;
    3854             : }
    3855             : 
    3856    12969347 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    3857             :                               SDValue Operand, const SDNodeFlags Flags) {
    3858             :   // Constant fold unary operations with an integer constant operand. Even
    3859             :   // opaque constant will be folded, because the folding of unary operations
    3860             :   // doesn't create new constants with different values. Nevertheless, the
    3861             :   // opaque flag is preserved during folding to prevent future folding with
    3862             :   // other constants.
    3863             :   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
    3864      327370 :     const APInt &Val = C->getAPIntValue();
    3865      327370 :     switch (Opcode) {
    3866             :     default: break;
    3867       52406 :     case ISD::SIGN_EXTEND:
    3868       52406 :       return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
    3869      104812 :                          C->isTargetOpcode(), C->isOpaque());
    3870      193278 :     case ISD::ANY_EXTEND:
    3871             :     case ISD::ZERO_EXTEND:
    3872             :     case ISD::TRUNCATE:
    3873      193278 :       return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
    3874      386556 :                          C->isTargetOpcode(), C->isOpaque());
    3875         488 :     case ISD::UINT_TO_FP:
    3876             :     case ISD::SINT_TO_FP: {
    3877             :       APFloat apf(EVTToAPFloatSemantics(VT),
    3878         488 :                   APInt::getNullValue(VT.getSizeInBits()));
    3879         488 :       (void)apf.convertFromAPInt(Val,
    3880             :                                  Opcode==ISD::SINT_TO_FP,
    3881             :                                  APFloat::rmNearestTiesToEven);
    3882         488 :       return getConstantFP(apf, DL, VT);
    3883             :     }
    3884             :     case ISD::BITCAST:
    3885           9 :       if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
    3886          18 :         return getConstantFP(APFloat(APFloat::IEEEhalf(), Val), DL, VT);
    3887         398 :       if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
    3888         796 :         return getConstantFP(APFloat(APFloat::IEEEsingle(), Val), DL, VT);
    3889         115 :       if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
    3890         230 :         return getConstantFP(APFloat(APFloat::IEEEdouble(), Val), DL, VT);
    3891           0 :       if (VT == MVT::f128 && C->getValueType(0) == MVT::i128)
    3892           0 :         return getConstantFP(APFloat(APFloat::IEEEquad(), Val), DL, VT);
    3893             :       break;
    3894          14 :     case ISD::ABS:
    3895          14 :       return getConstant(Val.abs(), DL, VT, C->isTargetOpcode(),
    3896          28 :                          C->isOpaque());
    3897         452 :     case ISD::BITREVERSE:
    3898         452 :       return getConstant(Val.reverseBits(), DL, VT, C->isTargetOpcode(),
    3899         904 :                          C->isOpaque());
    3900         170 :     case ISD::BSWAP:
    3901         170 :       return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
    3902         340 :                          C->isOpaque());
    3903         660 :     case ISD::CTPOP:
    3904             :       return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
    3905        1980 :                          C->isOpaque());
    3906       11842 :     case ISD::CTLZ:
    3907             :     case ISD::CTLZ_ZERO_UNDEF:
    3908       11842 :       return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
    3909       23684 :                          C->isOpaque());
    3910        3754 :     case ISD::CTTZ:
    3911             :     case ISD::CTTZ_ZERO_UNDEF:
    3912        3754 :       return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
    3913        7508 :                          C->isOpaque());
    3914         743 :     case ISD::FP16_TO_FP: {
    3915             :       bool Ignored;
    3916             :       APFloat FPV(APFloat::IEEEhalf(),
    3917        1486 :                   (Val.getBitWidth() == 16) ? Val : Val.trunc(16));
    3918             : 
    3919             :       // This can return overflow, underflow, or inexact; we don't care.
    3920             :       // FIXME need to be more flexible about rounding mode.
    3921         743 :       (void)FPV.convert(EVTToAPFloatSemantics(VT),
    3922             :                         APFloat::rmNearestTiesToEven, &Ignored);
    3923         743 :       return getConstantFP(FPV, DL, VT);
    3924             :     }
    3925             :     }
    3926             :   }
    3927             : 
    3928             :   // Constant fold unary operations with a floating point constant operand.
    3929             :   if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
    3930        5442 :     APFloat V = C->getValueAPF();    // make copy
    3931        5442 :     switch (Opcode) {
    3932         264 :     case ISD::FNEG:
    3933         264 :       V.changeSign();
    3934         264 :       return getConstantFP(V, DL, VT);
    3935          21 :     case ISD::FABS:
    3936          21 :       V.clearSign();
    3937          21 :       return getConstantFP(V, DL, VT);
    3938          28 :     case ISD::FCEIL: {
    3939          28 :       APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
    3940          28 :       if (fs == APFloat::opOK || fs == APFloat::opInexact)
    3941          28 :         return getConstantFP(V, DL, VT);
    3942             :       break;
    3943             :     }
    3944          25 :     case ISD::FTRUNC: {
    3945          25 :       APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
    3946          25 :       if (fs == APFloat::opOK || fs == APFloat::opInexact)
    3947          25 :         return getConstantFP(V, DL, VT);
    3948             :       break;
    3949             :     }
    3950          25 :     case ISD::FFLOOR: {
    3951          25 :       APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
    3952          25 :       if (fs == APFloat::opOK || fs == APFloat::opInexact)
    3953          25 :         return getConstantFP(V, DL, VT);
    3954             :       break;
    3955             :     }
    3956         122 :     case ISD::FP_EXTEND: {
    3957             :       bool ignored;
    3958             :       // This can return overflow, underflow, or inexact; we don't care.
    3959             :       // FIXME need to be more flexible about rounding mode.
    3960         122 :       (void)V.convert(EVTToAPFloatSemantics(VT),
    3961             :                       APFloat::rmNearestTiesToEven, &ignored);
    3962         122 :       return getConstantFP(V, DL, VT);
    3963             :     }
    3964         759 :     case ISD::FP_TO_SINT:
    3965             :     case ISD::FP_TO_UINT: {
    3966             :       bool ignored;
    3967         759 :       APSInt IntVal(VT.getSizeInBits(), Opcode == ISD::FP_TO_UINT);
    3968             :       // FIXME need to be more flexible about rounding mode.
    3969             :       APFloat::opStatus s =
    3970         759 :           V.convertToInteger(IntVal, APFloat::rmTowardZero, &ignored);
    3971         759 :       if (s == APFloat::opInvalidOp) // inexact is OK, in fact usual
    3972             :         break;
    3973         721 :       return getConstant(IntVal, DL, VT);
    3974             :     }
    3975             :     case ISD::BITCAST:
    3976         280 :       if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
    3977         840 :         return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
    3978        2537 :       else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
    3979        7611 :         return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
    3980         323 :       else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
    3981         969 :         return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
    3982             :       break;
    3983          65 :     case ISD::FP_TO_FP16: {
    3984             :       bool Ignored;
    3985             :       // This can return overflow, underflow, or inexact; we don't care.
    3986             :       // FIXME need to be more flexible about rounding mode.
    3987          65 :       (void)V.convert(APFloat::IEEEhalf(),
    3988             :                       APFloat::rmNearestTiesToEven, &Ignored);
    3989         130 :       return getConstant(V.bitcastToAPInt(), DL, VT);
    3990             :     }
    3991             :     }
    3992             :   }
    3993             : 
    3994             :   // Constant fold unary operations with a vector integer or float operand.
    3995             :   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
    3996      314553 :     if (BV->isConstant()) {
    3997      262655 :       switch (Opcode) {
    3998             :       default:
    3999             :         // FIXME: Entirely reasonable to perform folding of other unary
    4000             :         // operations here as the need arises.
    4001             :         break;
    4002        2738 :       case ISD::FNEG:
    4003             :       case ISD::FABS:
    4004             :       case ISD::FCEIL:
    4005             :       case ISD::FTRUNC:
    4006             :       case ISD::FFLOOR:
    4007             :       case ISD::FP_EXTEND:
    4008             :       case ISD::FP_TO_SINT:
    4009             :       case ISD::FP_TO_UINT:
    4010             :       case ISD::TRUNCATE:
    4011             :       case ISD::ANY_EXTEND:
    4012             :       case ISD::ZERO_EXTEND:
    4013             :       case ISD::SIGN_EXTEND:
    4014             :       case ISD::UINT_TO_FP:
    4015             :       case ISD::SINT_TO_FP:
    4016             :       case ISD::ABS:
    4017             :       case ISD::BITREVERSE:
    4018             :       case ISD::BSWAP:
    4019             :       case ISD::CTLZ:
    4020             :       case ISD::CTLZ_ZERO_UNDEF:
    4021             :       case ISD::CTTZ:
    4022             :       case ISD::CTTZ_ZERO_UNDEF:
    4023             :       case ISD::CTPOP: {
    4024        2738 :         SDValue Ops = { Operand };
    4025        2738 :         if (SDValue Fold = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops))
    4026        2738 :           return Fold;
    4027             :       }
    4028             :       }
    4029             :     }
    4030             :   }
    4031             : 
    4032    12697889 :   unsigned OpOpcode = Operand.getNode()->getOpcode();
    4033    12697889 :   switch (Opcode) {
    4034     8556605 :   case ISD::TokenFactor:
    4035             :   case ISD::MERGE_VALUES:
    4036             :   case ISD::CONCAT_VECTORS:
    4037     8556605 :     return Operand;         // Factor, merge or concat of one node?  No need.
    4038             :   case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
    4039       10617 :   case ISD::FP_EXTEND:
    4040             :     assert(VT.isFloatingPoint() &&
    4041             :            Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
    4042       13059 :     if (Operand.getValueType() == VT) return Operand;  // noop conversion.
    4043             :     assert((!VT.isVector() ||
    4044             :             VT.getVectorNumElements() ==
    4045             :             Operand.getValueType().getVectorNumElements()) &&
    4046             :            "Vector element count mismatch!");
    4047             :     assert(Operand.getValueType().bitsLT(VT) &&
    4048             :            "Invalid fpext node, dst < src!");
    4049        8216 :     if (Operand.isUndef())
    4050          19 :       return getUNDEF(VT);
    4051             :     break;
    4052       73011 :   case ISD::SIGN_EXTEND:
    4053             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    4054             :            "Invalid SIGN_EXTEND!");
    4055       76133 :     if (Operand.getValueType() == VT) return Operand;   // noop extension
    4056             :     assert((!VT.isVector() ||
    4057             :             VT.getVectorNumElements() ==
    4058             :             Operand.getValueType().getVectorNumElements()) &&
    4059             :            "Vector element count mismatch!");
    4060             :     assert(Operand.getValueType().bitsLT(VT) &&
    4061             :            "Invalid sext node, dst < src!");
    4062       69974 :     if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
    4063         466 :       return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    4064       69508 :     else if (OpOpcode == ISD::UNDEF)
    4065             :       // sext(undef) = 0, because the top bits will all be the same.
    4066         212 :       return getConstant(0, DL, VT);
    4067             :     break;
    4068      304064 :   case ISD::ZERO_EXTEND:
    4069             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    4070             :            "Invalid ZERO_EXTEND!");
    4071      310089 :     if (Operand.getValueType() == VT) return Operand;   // noop extension
    4072             :     assert((!VT.isVector() ||
    4073             :             VT.getVectorNumElements() ==
    4074             :             Operand.getValueType().getVectorNumElements()) &&
    4075             :            "Vector element count mismatch!");
    4076             :     assert(Operand.getValueType().bitsLT(VT) &&
    4077             :            "Invalid zext node, dst < src!");
    4078      299074 :     if (OpOpcode == ISD::ZERO_EXTEND)   // (zext (zext x)) -> (zext x)
    4079       32838 :       return getNode(ISD::ZERO_EXTEND, DL, VT, Operand.getOperand(0));
    4080      266236 :     else if (OpOpcode == ISD::UNDEF)
    4081             :       // zext(undef) = 0, because the top bits will be zero.
    4082         880 :       return getConstant(0, DL, VT);
    4083             :     break;
    4084      258473 :   case ISD::ANY_EXTEND:
    4085             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    4086             :            "Invalid ANY_EXTEND!");
    4087      374932 :     if (Operand.getValueType() == VT) return Operand;   // noop extension
    4088             :     assert((!VT.isVector() ||
    4089             :             VT.getVectorNumElements() ==
    4090             :             Operand.getValueType().getVectorNumElements()) &&
    4091             :            "Vector element count mismatch!");
    4092             :     assert(Operand.getValueType().bitsLT(VT) &&
    4093             :            "Invalid anyext node, dst < src!");
    4094             : 
    4095      142920 :     if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
    4096             :         OpOpcode == ISD::ANY_EXTEND)
    4097             :       // (ext (zext x)) -> (zext x)  and  (ext (sext x)) -> (sext x)
    4098        2575 :       return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    4099      140345 :     else if (OpOpcode == ISD::UNDEF)
    4100         344 :       return getUNDEF(VT);
    4101             : 
    4102             :     // (ext (trunc x)) -> x
    4103      140001 :     if (OpOpcode == ISD::TRUNCATE) {
    4104       45554 :       SDValue OpOp = Operand.getOperand(0);
    4105           7 :       if (OpOp.getValueType() == VT) {
    4106       43645 :         transferDbgValues(Operand, OpOp);
    4107       43645 :         return OpOp;
    4108             :       }
    4109             :     }
    4110             :     break;
    4111     1570592 :   case ISD::TRUNCATE:
    4112             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    4113             :            "Invalid TRUNCATE!");
    4114     2314339 :     if (Operand.getValueType() == VT) return Operand;   // noop truncate
    4115             :     assert((!VT.isVector() ||
    4116             :             VT.getVectorNumElements() ==
    4117             :             Operand.getValueType().getVectorNumElements()) &&
    4118             :            "Vector element count mismatch!");
    4119             :     assert(Operand.getValueType().bitsGT(VT) &&
    4120             :            "Invalid truncate node, src < dst!");
    4121      831562 :     if (OpOpcode == ISD::TRUNCATE)
    4122       44759 :       return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
    4123      786803 :     if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
    4124             :         OpOpcode == ISD::ANY_EXTEND) {
    4125             :       // If the source is smaller than the dest, we still need an extend.
    4126       27698 :       if (Operand.getOperand(0).getValueType().getScalarType()
    4127       13849 :             .bitsLT(VT.getScalarType()))
    4128        4185 :         return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    4129       19328 :       if (Operand.getOperand(0).getValueType().bitsGT(VT))
    4130         324 :         return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
    4131        9340 :       return Operand.getOperand(0);
    4132             :     }
    4133      772954 :     if (OpOpcode == ISD::UNDEF)
    4134       14516 :       return getUNDEF(VT);
    4135             :     break;
    4136         542 :   case ISD::ABS:
    4137             :     assert(VT.isInteger() && VT == Operand.getValueType() &&
    4138             :            "Invalid ABS!");
    4139         542 :     if (OpOpcode == ISD::UNDEF)
    4140           1 :       return getUNDEF(VT);
    4141             :     break;
    4142         957 :   case ISD::BSWAP:
    4143             :     assert(VT.isInteger() && VT == Operand.getValueType() &&
    4144             :            "Invalid BSWAP!");
    4145             :     assert((VT.getScalarSizeInBits() % 16 == 0) &&
    4146             :            "BSWAP types must be a multiple of 16 bits!");
    4147         957 :     if (OpOpcode == ISD::UNDEF)
    4148           4 :       return getUNDEF(VT);
    4149             :     break;
    4150         698 :   case ISD::BITREVERSE:
    4151             :     assert(VT.isInteger() && VT == Operand.getValueType() &&
    4152             :            "Invalid BITREVERSE!");
    4153         698 :     if (OpOpcode == ISD::UNDEF)
    4154           4 :       return getUNDEF(VT);
    4155             :     break;
    4156     1000862 :   case ISD::BITCAST:
    4157             :     // Basic sanity checking.
    4158             :     assert(VT.getSizeInBits() == Operand.getValueSizeInBits() &&
    4159             :            "Cannot BITCAST between types of different sizes!");
    4160      203808 :     if (VT == Operand.getValueType()) return Operand;  // noop conversion.
    4161      800583 :     if (OpOpcode == ISD::BITCAST)  // bitconv(bitconv(x)) -> bitconv(x)
    4162       49300 :       return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
    4163      751283 :     if (OpOpcode == ISD::UNDEF)
    4164       12396 :       return getUNDEF(VT);
    4165             :     break;
    4166       28878 :   case ISD::SCALAR_TO_VECTOR:
    4167             :     assert(VT.isVector() && !Operand.getValueType().isVector() &&
    4168             :            (VT.getVectorElementType() == Operand.getValueType() ||
    4169             :             (VT.getVectorElementType().isInteger() &&
    4170             :              Operand.getValueType().isInteger() &&
    4171             :              VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
    4172             :            "Illegal SCALAR_TO_VECTOR node!");
    4173       28878 :     if (OpOpcode == ISD::UNDEF)
    4174           1 :       return getUNDEF(VT);
    4175             :     // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
    4176             :     if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
    4177        1541 :         isa<ConstantSDNode>(Operand.getOperand(1)) &&
    4178       28877 :         Operand.getConstantOperandVal(1) == 0 &&
    4179        2166 :         Operand.getOperand(0).getValueType() == VT)
    4180         798 :       return Operand.getOperand(0);
    4181             :     break;
    4182        7355 :   case ISD::FNEG:
    4183             :     // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
    4184        7355 :     if ((getTarget().Options.UnsafeFPMath || Flags.hasNoSignedZeros()) &&
    4185             :         OpOpcode == ISD::FSUB)
    4186             :       return getNode(ISD::FSUB, DL, VT, Operand.getOperand(1),
    4187          58 :                      Operand.getOperand(0), Flags);
    4188        7297 :     if (OpOpcode == ISD::FNEG)  // --X -> X
    4189           9 :       return Operand.getOperand(0);
    4190             :     break;
    4191        3370 :   case ISD::FABS:
    4192        3370 :     if (OpOpcode == ISD::FNEG)  // abs(-X) -> abs(X)
    4193          18 :       return getNode(ISD::FABS, DL, VT, Operand.getOperand(0));
    4194             :     break;
    4195             :   }
    4196             : 
    4197             :   SDNode *N;
    4198     2859302 :   SDVTList VTs = getVTList(VT);
    4199     2859302 :   SDValue Ops[] = {Operand};
    4200     2859302 :   if (VT != MVT::Glue) { // Don't CSE flag producing nodes
    4201             :     FoldingSetNodeID ID;
    4202     2858697 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    4203     2858697 :     void *IP = nullptr;
    4204     2858697 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    4205       96096 :       E->intersectFlagsWith(Flags);
    4206       96096 :       return SDValue(E, 0);
    4207             :     }
    4208             : 
    4209     5525202 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4210     2762601 :     N->setFlags(Flags);
    4211     2762601 :     createOperands(N, Ops);
    4212     2762601 :     CSEMap.InsertNode(N, IP);
    4213             :   } else {
    4214        1210 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4215         605 :     createOperands(N, Ops);
    4216             :   }
    4217             : 
    4218     2763206 :   InsertNode(N);
    4219             :   SDValue V = SDValue(N, 0);
    4220             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    4221     2763206 :   return V;
    4222             : }
    4223             : 
    4224      549674 : static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
    4225             :                                         const APInt &C2) {
    4226      549674 :   switch (Opcode) {
    4227      599320 :   case ISD::ADD:  return std::make_pair(C1 + C2, true);
    4228       33228 :   case ISD::SUB:  return std::make_pair(C1 - C2, true);
    4229       12487 :   case ISD::MUL:  return std::make_pair(C1 * C2, true);
    4230       31224 :   case ISD::AND:  return std::make_pair(C1 & C2, true);
    4231        6158 :   case ISD::OR:   return std::make_pair(C1 | C2, true);
    4232        4778 :   case ISD::XOR:  return std::make_pair(C1 ^ C2, true);
    4233       28837 :   case ISD::SHL:  return std::make_pair(C1 << C2, true);
    4234       18083 :   case ISD::SRL:  return std::make_pair(C1.lshr(C2), true);
    4235         100 :   case ISD::SRA:  return std::make_pair(C1.ashr(C2), true);
    4236          16 :   case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
    4237           0 :   case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
    4238        1624 :   case ISD::SMIN: return std::make_pair(C1.sle(C2) ? C1 : C2, true);
    4239        1632 :   case ISD::SMAX: return std::make_pair(C1.sge(C2) ? C1 : C2, true);
    4240        1624 :   case ISD::UMIN: return std::make_pair(C1.ule(C2) ? C1 : C2, true);
    4241        1626 :   case ISD::UMAX: return std::make_pair(C1.uge(C2) ? C1 : C2, true);
    4242             :   case ISD::UDIV:
    4243          38 :     if (!C2.getBoolValue())
    4244             :       break;
    4245          38 :     return std::make_pair(C1.udiv(C2), true);
    4246             :   case ISD::UREM:
    4247         257 :     if (!C2.getBoolValue())
    4248             :       break;
    4249         257 :     return std::make_pair(C1.urem(C2), true);
    4250             :   case ISD::SDIV:
    4251         110 :     if (!C2.getBoolValue())
    4252             :       break;
    4253         110 :     return std::make_pair(C1.sdiv(C2), true);
    4254             :   case ISD::SREM:
    4255          91 :     if (!C2.getBoolValue())
    4256             :       break;
    4257          91 :     return std::make_pair(C1.srem(C2), true);
    4258             :   }
    4259      149048 :   return std::make_pair(APInt(1, 0), false);
    4260             : }
    4261             : 
    4262      549826 : SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
    4263             :                                              EVT VT, const ConstantSDNode *Cst1,
    4264             :                                              const ConstantSDNode *Cst2) {
    4265      549826 :   if (Cst1->isOpaque() || Cst2->isOpaque())
    4266         152 :     return SDValue();
    4267             : 
    4268             :   std::pair<APInt, bool> Folded = FoldValue(Opcode, Cst1->getAPIntValue(),
    4269     1649022 :                                             Cst2->getAPIntValue());
    4270      549674 :   if (!Folded.second)
    4271      149048 :     return SDValue();
    4272      400626 :   return getConstant(Folded.first, DL, VT);
    4273             : }
    4274             : 
    4275      424007 : SDValue SelectionDAG::FoldSymbolOffset(unsigned Opcode, EVT VT,
    4276             :                                        const GlobalAddressSDNode *GA,
    4277             :                                        const SDNode *N2) {
    4278      424007 :   if (GA->getOpcode() != ISD::GlobalAddress)
    4279          12 :     return SDValue();
    4280      423995 :   if (!TLI->isOffsetFoldingLegal(GA))
    4281      398130 :     return SDValue();
    4282             :   const ConstantSDNode *Cst2 = dyn_cast<ConstantSDNode>(N2);
    4283             :   if (!Cst2)
    4284        2325 :     return SDValue();
    4285       23540 :   int64_t Offset = Cst2->getSExtValue();
    4286       23540 :   switch (Opcode) {
    4287             :   case ISD::ADD: break;
    4288           1 :   case ISD::SUB: Offset = -uint64_t(Offset); break;
    4289          16 :   default: return SDValue();
    4290             :   }
    4291       23524 :   return getGlobalAddress(GA->getGlobal(), SDLoc(Cst2), VT,
    4292       23524 :                           GA->getOffset() + uint64_t(Offset));
    4293             : }
    4294             : 
    4295     8899093 : bool SelectionDAG::isUndef(unsigned Opcode, ArrayRef<SDValue> Ops) {
    4296     8899093 :   switch (Opcode) {
    4297       30239 :   case ISD::SDIV:
    4298             :   case ISD::UDIV:
    4299             :   case ISD::SREM:
    4300             :   case ISD::UREM: {
    4301             :     // If a divisor is zero/undef or any element of a divisor vector is
    4302             :     // zero/undef, the whole op is undef.
    4303             :     assert(Ops.size() == 2 && "Div/rem should have 2 operands");
    4304       30239 :     SDValue Divisor = Ops[1];
    4305       30239 :     if (Divisor.isUndef() || isNullConstant(Divisor))
    4306          33 :       return true;
    4307             : 
    4308       32198 :     return ISD::isBuildVectorOfConstantSDNodes(Divisor.getNode()) &&
    4309             :            llvm::any_of(Divisor->op_values(),
    4310           0 :                         [](SDValue V) { return V.isUndef() ||
    4311           0 :                                         isNullConstant(V); });
    4312             :     // TODO: Handle signed overflow.
    4313             :   }
    4314             :   // TODO: Handle oversized shifts.
    4315             :   default:
    4316             :     return false;
    4317             :   }
    4318             : }
    4319             : 
    4320     8278854 : SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
    4321             :                                              EVT VT, SDNode *Cst1,
    4322             :                                              SDNode *Cst2) {
    4323             :   // If the opcode is a target-specific ISD node, there's nothing we can
    4324             :   // do here and the operand rules may not line up with the below, so
    4325             :   // bail early.
    4326     8278854 :   if (Opcode >= ISD::BUILTIN_OP_END)
    4327      529525 :     return SDValue();
    4328             : 
    4329     7749329 :   if (isUndef(Opcode, {SDValue(Cst1, 0), SDValue(Cst2, 0)}))
    4330         105 :     return getUNDEF(VT);
    4331             : 
    4332             :   // Handle the case of two scalars.
    4333             :   if (const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
    4334             :     if (const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
    4335      542410 :       SDValue Folded = FoldConstantArithmetic(Opcode, DL, VT, Scalar1, Scalar2);
    4336             :       assert((!Folded || !VT.isVector()) &&
    4337             :              "Can't fold vectors ops with scalar operands");
    4338      542410 :       return Folded;
    4339             :     }
    4340             :   }
    4341             : 
    4342             :   // fold (add Sym, c) -> Sym+c
    4343             :   if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Cst1))
    4344      422418 :     return FoldSymbolOffset(Opcode, VT, GA, Cst2);
    4345     6784396 :   if (TLI->isCommutativeBinOp(Opcode))
    4346             :     if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Cst2))
    4347        1589 :       return FoldSymbolOffset(Opcode, VT, GA, Cst1);
    4348             : 
    4349             :   // For vectors extract each constant element into Inputs so we can constant
    4350             :   // fold them individually.
    4351             :   BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
    4352             :   BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
    4353     6782807 :   if (!BV1 || !BV2)
    4354     6776264 :     return SDValue();
    4355             : 
    4356             :   assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
    4357             : 
    4358        6543 :   EVT SVT = VT.getScalarType();
    4359        6543 :   EVT LegalSVT = SVT;
    4360        6543 :   if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
    4361        1248 :     LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
    4362        1248 :     if (LegalSVT.bitsLT(SVT))
    4363           0 :       return SDValue();
    4364             :   }
    4365             :   SmallVector<SDValue, 4> Outputs;
    4366       33110 :   for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
    4367       30206 :     SDValue V1 = BV1->getOperand(I);
    4368       30206 :     SDValue V2 = BV2->getOperand(I);
    4369             : 
    4370       30206 :     if (SVT.isInteger()) {
    4371       58076 :         if (V1->getValueType(0).bitsGT(SVT))
    4372         380 :           V1 = getNode(ISD::TRUNCATE, DL, SVT, V1);
    4373       58076 :         if (V2->getValueType(0).bitsGT(SVT))
    4374         337 :           V2 = getNode(ISD::TRUNCATE, DL, SVT, V2);
    4375             :     }
    4376             : 
    4377       90668 :     if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
    4378           0 :       return SDValue();
    4379             : 
    4380             :     // Fold one vector element.
    4381       30206 :     SDValue ScalarResult = getNode(Opcode, DL, SVT, V1, V2);
    4382       30256 :     if (LegalSVT != SVT)
    4383         298 :       ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);
    4384             : 
    4385             :     // Scalar folding only succeeded if the result is a constant or UNDEF.
    4386       60412 :     if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
    4387             :         ScalarResult.getOpcode() != ISD::ConstantFP)
    4388        3639 :       return SDValue();
    4389       26567 :     Outputs.push_back(ScalarResult);
    4390             :   }
    4391             : 
    4392             :   assert(VT.getVectorNumElements() == Outputs.size() &&
    4393             :          "Vector size mismatch!");
    4394             : 
    4395             :   // We may have a vector type but a scalar result. Create a splat.
    4396        2904 :   Outputs.resize(VT.getVectorNumElements(), Outputs.back());
    4397             : 
    4398             :   // Build a big vector out of the scalar elements we generated.
    4399        5808 :   return getBuildVector(VT, SDLoc(), Outputs);
    4400             : }
    4401             : 
    4402             : // TODO: Merge with FoldConstantArithmetic
    4403     1134702 : SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode,
    4404             :                                                    const SDLoc &DL, EVT VT,
    4405             :                                                    ArrayRef<SDValue> Ops,
    4406             :                                                    const SDNodeFlags Flags) {
    4407             :   // If the opcode is a target-specific ISD node, there's nothing we can
    4408             :   // do here and the operand rules may not line up with the below, so
    4409             :   // bail early.
    4410     1134702 :   if (Opcode >= ISD::BUILTIN_OP_END)
    4411           0 :     return SDValue();
    4412             : 
    4413     1134702 :   if (isUndef(Opcode, Ops))
    4414           1 :     return getUNDEF(VT);
    4415             : 
    4416             :   // We can only fold vectors - maybe merge with FoldConstantArithmetic someday?
    4417     1134701 :   if (!VT.isVector())
    4418      278422 :     return SDValue();
    4419             : 
    4420      856279 :   unsigned NumElts = VT.getVectorNumElements();
    4421             : 
    4422             :   auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
    4423             :     return !Op.getValueType().isVector() ||
    4424             :            Op.getValueType().getVectorNumElements() == NumElts;
    4425             :   };
    4426             : 
    4427             :   auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
    4428             :     BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
    4429             :     return (Op.isUndef()) || (Op.getOpcode() == ISD::CONDCODE) ||
    4430             :            (BV && BV->isConstant());
    4431             :   };
    4432             : 
    4433             :   // All operands must be vector types with the same number of elements as
    4434             :   // the result type and must be either UNDEF or a build vector of constant
    4435             :   // or UNDEF scalars.
    4436      860381 :   if (!llvm::all_of(Ops, IsConstantBuildVectorOrUndef) ||
    4437             :       !llvm::all_of(Ops, IsScalarOrSameVectorSize))
    4438      852177 :     return SDValue();
    4439             : 
    4440             :   // If we are comparing vectors, then the result needs to be a i1 boolean
    4441             :   // that is then sign-extended back to the legal result type.
    4442        4102 :   EVT SVT = (Opcode == ISD::SETCC ? MVT::i1 : VT.getScalarType());
    4443             : 
    4444             :   // Find legal integer scalar type for constant promotion and
    4445             :   // ensure that its scalar size is at least as large as source.
    4446        4102 :   EVT LegalSVT = VT.getScalarType();
    4447        4102 :   if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
    4448         786 :     LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
    4449         786 :     if (LegalSVT.bitsLT(VT.getScalarType()))
    4450           0 :       return SDValue();
    4451             :   }
    4452             : 
    4453             :   // Constant fold each scalar lane separately.
    4454             :   SmallVector<SDValue, 4> ScalarResults;
    4455       41143 :   for (unsigned i = 0; i != NumElts; i++) {
    4456             :     SmallVector<SDValue, 4> ScalarOps;
    4457       92475 :     for (SDValue Op : Ops) {
    4458      110648 :       EVT InSVT = Op.getValueType().getScalarType();
    4459             :       BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
    4460             :       if (!InBV) {
    4461             :         // We've checked that this is UNDEF or a constant of some kind.
    4462        7471 :         if (Op.isUndef())
    4463         138 :           ScalarOps.push_back(getUNDEF(InSVT));
    4464             :         else
    4465        7333 :           ScalarOps.push_back(Op);
    4466        7471 :         continue;
    4467             :       }
    4468             : 
    4469       47853 :       SDValue ScalarOp = InBV->getOperand(i);
    4470       47853 :       EVT ScalarVT = ScalarOp.getValueType();
    4471             : 
    4472             :       // Build vector (integer) scalar operands may need implicit
    4473             :       // truncation - do this before constant folding.
    4474       47853 :       if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT))
    4475         322 :         ScalarOp = getNode(ISD::TRUNCATE, DL, InSVT, ScalarOp);
    4476             : 
    4477       47853 :       ScalarOps.push_back(ScalarOp);
    4478             :     }
    4479             : 
    4480             :     // Constant fold the scalar operands.
    4481       37151 :     SDValue ScalarResult = getNode(Opcode, DL, SVT, ScalarOps, Flags);
    4482             : 
    4483             :     // Legalize the (integer) scalar constant if necessary.
    4484       37167 :     if (LegalSVT != SVT)
    4485        6379 :       ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);
    4486             : 
    4487             :     // Scalar folding only succeeded if the result is a constant or UNDEF.
    4488       74302 :     if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
    4489             :         ScalarResult.getOpcode() != ISD::ConstantFP)
    4490         110 :       return SDValue();
    4491       37041 :     ScalarResults.push_back(ScalarResult);
    4492             :   }
    4493             : 
    4494        3992 :   SDValue V = getBuildVector(VT, DL, ScalarResults);
    4495             :   NewSDValueDbgMsg(V, "New node fold constant vector: ", this);
    4496        3992 :   return V;
    4497             : }
    4498             : 
    4499    13254811 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    4500             :                               SDValue N1, SDValue N2, const SDNodeFlags Flags) {
    4501             :   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
    4502             :   ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
    4503             :   ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
    4504             :   ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
    4505             : 
    4506             :   // Canonicalize constant to RHS if commutative.
    4507    13254811 :   if (TLI->isCommutativeBinOp(Opcode)) {
    4508     7626429 :     if (N1C && !N2C) {
    4509             :       std::swap(N1C, N2C);
    4510             :       std::swap(N1, N2);
    4511     7610130 :     } else if (N1CFP && !N2CFP) {
    4512             :       std::swap(N1CFP, N2CFP);
    4513             :       std::swap(N1, N2);
    4514             :     }
    4515             :   }
    4516             : 
    4517    13254810 :   switch (Opcode) {
    4518             :   default: break;
    4519     2810680 :   case ISD::TokenFactor:
    4520             :     assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
    4521             :            N2.getValueType() == MVT::Other && "Invalid token factor!");
    4522             :     // Fold trivial token factors.
    4523     2810680 :     if (N1.getOpcode() == ISD::EntryToken) return N2;
    4524     2810313 :     if (N2.getOpcode() == ISD::EntryToken) return N1;
    4525       62240 :     if (N1 == N2) return N1;
    4526             :     break;
    4527       43083 :   case ISD::CONCAT_VECTORS: {
    4528             :     // Attempt to fold CONCAT_VECTORS into BUILD_VECTOR or UNDEF.
    4529       43083 :     SDValue Ops[] = {N1, N2};
    4530       43083 :     if (SDValue V = FoldCONCAT_VECTORS(DL, VT, Ops, *this))
    4531         921 :       return V;
    4532       42162 :     break;
    4533             :   }
    4534      283122 :   case ISD::AND:
    4535             :     assert(VT.isInteger() && "This operator does not apply to FP types!");
    4536             :     assert(N1.getValueType() == N2.getValueType() &&
    4537             :            N1.getValueType() == VT && "Binary operator types must match!");
    4538             :     // (X & 0) -> 0.  This commonly occurs when legalizing i64 values, so it's
    4539             :     // worth handling here.
    4540      522014 :     if (N2C && N2C->isNullValue())
    4541        3324 :       return N2;
    4542      515366 :     if (N2C && N2C->isAllOnesValue())  // X & -1 -> X
    4543        2627 :       return N1;
    4544             :     break;
    4545     7372625 :   case ISD::OR:
    4546             :   case ISD::XOR:
    4547             :   case ISD::ADD:
    4548             :   case ISD::SUB:
    4549             :     assert(VT.isInteger() && "This operator does not apply to FP types!");
    4550             :     assert(N1.getValueType() == N2.getValueType() &&
    4551             :            N1.getValueType() == VT && "Binary operator types must match!");
    4552             :     // (X ^|+- 0) -> X.  This commonly occurs when legalizing i64 values, so
    4553             :     // it's worth handling here.
    4554    14174902 :     if (N2C && N2C->isNullValue())
    4555     4906556 :       return N1;
    4556             :     break;
    4557             :   case ISD::UDIV:
    4558             :   case ISD::UREM:
    4559             :   case ISD::MULHU:
    4560             :   case ISD::MULHS:
    4561             :   case ISD::MUL:
    4562             :   case ISD::SDIV:
    4563             :   case ISD::SREM:
    4564             :   case ISD::SMIN:
    4565             :   case ISD::SMAX:
    4566             :   case ISD::UMIN:
    4567             :   case ISD::UMAX:
    4568             :     assert(VT.isInteger() && "This operator does not apply to FP types!");
    4569             :     assert(N1.getValueType() == N2.getValueType() &&
    4570             :            N1.getValueType() == VT && "Binary operator types must match!");
    4571             :     break;
    4572             :   case ISD::FADD:
    4573             :   case ISD::FSUB:
    4574             :   case ISD::FMUL:
    4575             :   case ISD::FDIV:
    4576             :   case ISD::FREM:
    4577             :     assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
    4578             :     assert(N1.getValueType() == N2.getValueType() &&
    4579             :            N1.getValueType() == VT && "Binary operator types must match!");
    4580             :     break;
    4581             :   case ISD::FCOPYSIGN:   // N1 and result must match.  N1/N2 need not match.
    4582             :     assert(N1.getValueType() == VT &&
    4583             :            N1.getValueType().isFloatingPoint() &&
    4584             :            N2.getValueType().isFloatingPoint() &&
    4585             :            "Invalid FCOPYSIGN!");
    4586             :     break;
    4587             :   case ISD::SHL:
    4588             :   case ISD::SRA:
    4589             :   case ISD::SRL:
    4590             :   case ISD::ROTL:
    4591             :   case ISD::ROTR:
    4592             :     assert(VT == N1.getValueType() &&
    4593             :            "Shift operators return type must be the same as their first arg");
    4594             :     assert(VT.isInteger() && N2.getValueType().isInteger() &&
    4595             :            "Shifts only work on integers");
    4596             :     assert((!VT.isVector() || VT == N2.getValueType()) &&
    4597             :            "Vector shift amounts must be in the same as their first arg");
    4598             :     // Verify that the shift amount VT is bit enough to hold valid shift
    4599             :     // amounts.  This catches things like trying to shift an i1024 value by an
    4600             :     // i8, which is easy to fall into in generic code that uses
    4601             :     // TLI.getShiftAmount().
    4602             :     assert(N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) &&
    4603             :            "Invalid use of small shift amount with oversized value!");
    4604             : 
    4605             :     // Always fold shifts of i1 values so the code generator doesn't need to
    4606             :     // handle them.  Since we know the size of the shift has to be less than the
    4607             :     // size of the value, the shift/rotate count is guaranteed to be zero.
    4608             :     if (VT == MVT::i1)
    4609          45 :       return N1;
    4610      742831 :     if (N2C && N2C->isNullValue())
    4611       16577 :       return N1;
    4612             :     break;
    4613             :   case ISD::FP_ROUND_INREG: {
    4614             :     EVT EVT = cast<VTSDNode>(N2)->getVT();
    4615             :     assert(VT == N1.getValueType() && "Not an inreg round!");
    4616             :     assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
    4617             :            "Cannot FP_ROUND_INREG integer types");
    4618             :     assert(EVT.isVector() == VT.isVector() &&
    4619             :            "FP_ROUND_INREG type should be vector iff the operand "
    4620             :            "type is vector!");
    4621             :     assert((!EVT.isVector() ||
    4622             :             EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
    4623             :            "Vector element counts must match in FP_ROUND_INREG");
    4624             :     assert(EVT.bitsLE(VT) && "Not rounding down!");
    4625             :     (void)EVT;
    4626           0 :     if (cast<VTSDNode>(N2)->getVT() == VT) return N1;  // Not actually rounding.
    4627             :     break;
    4628             :   }
    4629        6366 :   case ISD::FP_ROUND:
    4630             :     assert(VT.isFloatingPoint() &&
    4631             :            N1.getValueType().isFloatingPoint() &&
    4632             :            VT.bitsLE(N1.getValueType()) &&
    4633             :            N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) &&
    4634             :            "Invalid FP_ROUND!");
    4635        6489 :     if (N1.getValueType() == VT) return N1;  // noop conversion.
    4636             :     break;
    4637             :   case ISD::AssertSext:
    4638             :   case ISD::AssertZext: {
    4639             :     EVT EVT = cast<VTSDNode>(N2)->getVT();
    4640             :     assert(VT == N1.getValueType() && "Not an inreg extend!");
    4641             :     assert(VT.isInteger() && EVT.isInteger() &&
    4642             :            "Cannot *_EXTEND_INREG FP types");
    4643             :     assert(!EVT.isVector() &&
    4644             :            "AssertSExt/AssertZExt type should be the vector element type "
    4645             :            "rather than the vector type!");
    4646             :     assert(EVT.bitsLE(VT) && "Not extending!");
    4647        5991 :     if (VT == EVT) return N1; // noop assertion.
    4648             :     break;
    4649             :   }
    4650             :   case ISD::SIGN_EXTEND_INREG: {
    4651       20421 :     EVT EVT = cast<VTSDNode>(N2)->getVT();
    4652             :     assert(VT == N1.getValueType() && "Not an inreg extend!");
    4653             :     assert(VT.isInteger() && EVT.isInteger() &&
    4654             :            "Cannot *_EXTEND_INREG FP types");
    4655             :     assert(EVT.isVector() == VT.isVector() &&
    4656             :            "SIGN_EXTEND_INREG type should be vector iff the operand "
    4657             :            "type is vector!");
    4658             :     assert((!EVT.isVector() ||
    4659             :             EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
    4660             :            "Vector element counts must match in SIGN_EXTEND_INREG");
    4661             :     assert(EVT.bitsLE(VT) && "Not extending!");
    4662       20921 :     if (EVT == VT) return N1;  // Not actually extending
    4663             : 
    4664             :     auto SignExtendInReg = [&](APInt Val, llvm::EVT ConstantVT) {
    4665             :       unsigned FromBits = EVT.getScalarSizeInBits();
    4666             :       Val <<= Val.getBitWidth() - FromBits;
    4667             :       Val.ashrInPlace(Val.getBitWidth() - FromBits);
    4668             :       return getConstant(Val, DL, ConstantVT);
    4669       20303 :     };
    4670             : 
    4671       20303 :     if (N1C) {
    4672         286 :       const APInt &Val = N1C->getAPIntValue();
    4673         572 :       return SignExtendInReg(Val, VT);
    4674             :     }
    4675       20017 :     if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
    4676             :       SmallVector<SDValue, 8> Ops;
    4677          18 :       llvm::EVT OpVT = N1.getOperand(0).getValueType();
    4678          47 :       for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
    4679          76 :         SDValue Op = N1.getOperand(i);
    4680          38 :         if (Op.isUndef()) {
    4681           0 :           Ops.push_back(getUNDEF(OpVT));
    4682           0 :           continue;
    4683             :         }
    4684             :         ConstantSDNode *C = cast<ConstantSDNode>(Op);
    4685          38 :         APInt Val = C->getAPIntValue();
    4686          38 :         Ops.push_back(SignExtendInReg(Val, OpVT));
    4687             :       }
    4688           9 :       return getBuildVector(VT, DL, Ops);
    4689             :     }
    4690       20008 :     break;
    4691             :   }
    4692      432586 :   case ISD::EXTRACT_VECTOR_ELT:
    4693             :     assert(VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() &&
    4694             :            "The result of EXTRACT_VECTOR_ELT must be at least as wide as the \
    4695             :              element type of the vector.");
    4696             : 
    4697             :     // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
    4698      432586 :     if (N1.isUndef())
    4699       21067 :       return getUNDEF(VT);
    4700             : 
    4701             :     // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
    4702     1226423 :     if (N2C && N2C->getAPIntValue().uge(N1.getValueType().getVectorNumElements()))
    4703          84 :       return getUNDEF(VT);
    4704             : 
    4705             :     // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
    4706             :     // expanding copies of large vectors from registers.
    4707      407368 :     if (N2C &&
    4708      427655 :         N1.getOpcode() == ISD::CONCAT_VECTORS &&
    4709             :         N1.getNumOperands() > 0) {
    4710             :       unsigned Factor =
    4711       48660 :         N1.getOperand(0).getValueType().getVectorNumElements();
    4712             :       return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
    4713       32440 :                      N1.getOperand(N2C->getZExtValue() / Factor),
    4714       16220 :                      getConstant(N2C->getZExtValue() % Factor, DL,
    4715       32440 :                                  N2.getValueType()));
    4716             :     }
    4717             : 
    4718             :     // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
    4719             :     // expanding large vector constants.
    4720      395215 :     if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
    4721      233514 :       SDValue Elt = N1.getOperand(N2C->getZExtValue());
    4722             : 
    4723      116797 :       if (VT != Elt.getValueType())
    4724             :         // If the vector element type is not legal, the BUILD_VECTOR operands
    4725             :         // are promoted and implicitly truncated, and the result implicitly
    4726             :         // extended. Make that explicit here.
    4727         543 :         Elt = getAnyExtOrTrunc(Elt, DL, VT);
    4728             : 
    4729      116757 :       return Elt;
    4730             :     }
    4731             : 
    4732             :     // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
    4733             :     // operations are lowered to scalars.
    4734      278458 :     if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
    4735             :       // If the indices are the same, return the inserted element else
    4736             :       // if the indices are known different, extract the element from
    4737             :       // the original vector.
    4738        6010 :       SDValue N1Op2 = N1.getOperand(2);
    4739             :       ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
    4740             : 
    4741        4855 :       if (N1Op2C && N2C) {
    4742       14529 :         if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
    4743        1151 :           if (VT == N1.getOperand(1).getValueType())
    4744        1126 :             return N1.getOperand(1);
    4745             :           else
    4746          25 :             return getSExtOrTrunc(N1.getOperand(1), DL, VT);
    4747             :         }
    4748             : 
    4749        3692 :         return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
    4750             :       }
    4751             :     }
    4752             : 
    4753             :     // EXTRACT_VECTOR_ELT of v1iX EXTRACT_SUBVECTOR could be formed
    4754             :     // when vector types are scalarized and v1iX is legal.
    4755             :     // vextract (v1iX extract_subvector(vNiX, Idx)) -> vextract(vNiX,Idx)
    4756      291654 :     if (N1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
    4757      291654 :         N1.getValueType().getVectorNumElements() == 1) {
    4758             :       return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0),
    4759         223 :                      N1.getOperand(1));
    4760             :     }
    4761             :     break;
    4762       36139 :   case ISD::EXTRACT_ELEMENT:
    4763             :     assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
    4764             :     assert(!N1.getValueType().isVector() && !VT.isVector() &&
    4765             :            (N1.getValueType().isInteger() == VT.isInteger()) &&
    4766             :            N1.getValueType() != VT &&
    4767             :            "Wrong types for EXTRACT_ELEMENT!");
    4768             : 
    4769             :     // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
    4770             :     // 64-bit integers into 32-bit parts.  Instead of building the extract of
    4771             :     // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
    4772       36139 :     if (N1.getOpcode() == ISD::BUILD_PAIR)
    4773       13460 :       return N1.getOperand(N2C->getZExtValue());
    4774             : 
    4775             :     // EXTRACT_ELEMENT of a constant int is also very common.
    4776       29409 :     if (N1C) {
    4777        6136 :       unsigned ElementSize = VT.getSizeInBits();
    4778        6136 :       unsigned Shift = ElementSize * N2C->getZExtValue();
    4779       12272 :       APInt ShiftedVal = N1C->getAPIntValue().lshr(Shift);
    4780       12272 :       return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
    4781       23273 :     }
    4782             :     break;
    4783      117857 :   case ISD::EXTRACT_SUBVECTOR:
    4784      117857 :     if (VT.isSimple() && N1.getValueType().isSimple()) {
    4785             :       assert(VT.isVector() && N1.getValueType().isVector() &&
    4786             :              "Extract subvector VTs must be a vectors!");
    4787             :       assert(VT.getVectorElementType() ==
    4788             :              N1.getValueType().getVectorElementType() &&
    4789             :              "Extract subvector VTs must have the same element type!");
    4790             :       assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
    4791             :              "Extract subvector must be from larger vector to smaller vector!");
    4792             : 
    4793             :       if (N2C) {
    4794             :         assert((VT.getVectorNumElements() + N2C->getZExtValue()
    4795             :                 <= N1.getValueType().getVectorNumElements())
    4796             :                && "Extract subvector overflow!");
    4797             :       }
    4798             : 
    4799             :       // Trivial extraction.
    4800      112249 :       if (VT.getSimpleVT() == N1.getSimpleValueType())
    4801       17954 :         return N1;
    4802             : 
    4803             :       // EXTRACT_SUBVECTOR of an UNDEF is an UNDEF.
    4804       94295 :       if (N1.isUndef())
    4805         750 :         return getUNDEF(VT);
    4806             : 
    4807             :       // EXTRACT_SUBVECTOR of CONCAT_VECTOR can be simplified if the pieces of
    4808             :       // the concat have the same type as the extract.
    4809       93545 :       if (N2C && N1.getOpcode() == ISD::CONCAT_VECTORS &&
    4810       93545 :           N1.getNumOperands() > 0 &&
    4811        6959 :           VT == N1.getOperand(0).getValueType()) {
    4812             :         unsigned Factor = VT.getVectorNumElements();
    4813       17091 :         return N1.getOperand(N2C->getZExtValue() / Factor);
    4814             :       }
    4815             : 
    4816             :       // EXTRACT_SUBVECTOR of INSERT_SUBVECTOR is often created
    4817             :       // during shuffle legalization.
    4818       87848 :       if (N1.getOpcode() == ISD::INSERT_SUBVECTOR && N2 == N1.getOperand(2) &&
    4819         805 :           VT == N1.getOperand(1).getValueType())
    4820         314 :         return N1.getOperand(1);
    4821             :     }
    4822             :     break;
    4823             :   }
    4824             : 
    4825             :   // Perform trivial constant folding.
    4826     8052021 :   if (SDValue SV =
    4827     8052021 :           FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
    4828      193031 :     return SV;
    4829             : 
    4830             :   // Constant fold FP operations.
    4831     7858990 :   bool HasFPExceptions = TLI->hasFloatingPointExceptions();
    4832     7858990 :   if (N1CFP) {
    4833        6875 :     if (N2CFP) {
    4834        4871 :       APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
    4835             :       APFloat::opStatus s;
    4836        4871 :       switch (Opcode) {
    4837         487 :       case ISD::FADD:
    4838         487 :         s = V1.add(V2, APFloat::rmNearestTiesToEven);
    4839         487 :         if (!HasFPExceptions || s != APFloat::opInvalidOp)
    4840         487 :           return getConstantFP(V1, DL, VT);
    4841             :         break;
    4842          75 :       case ISD::FSUB:
    4843          75 :         s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
    4844          75 :         if (!HasFPExceptions || s!=APFloat::opInvalidOp)
    4845          75 :           return getConstantFP(V1, DL, VT);
    4846             :         break;
    4847         588 :       case ISD::FMUL:
    4848         588 :         s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
    4849         588 :         if (!HasFPExceptions || s!=APFloat::opInvalidOp)
    4850         588 :           return getConstantFP(V1, DL, VT);
    4851             :         break;
    4852          61 :       case ISD::FDIV:
    4853          61 :         s = V1.divide(V2, APFloat::rmNearestTiesToEven);
    4854          61 :         if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
    4855             :                                  s!=APFloat::opDivByZero)) {
    4856          38 :           return getConstantFP(V1, DL, VT);
    4857             :         }
    4858             :         break;
    4859          35 :       case ISD::FREM :
    4860          35 :         s = V1.mod(V2);
    4861          35 :         if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
    4862             :                                  s!=APFloat::opDivByZero)) {
    4863          21 :           return getConstantFP(V1, DL, VT);
    4864             :         }
    4865             :         break;
    4866           4 :       case ISD::FCOPYSIGN:
    4867           4 :         V1.copySign(V2);
    4868           4 :         return getConstantFP(V1, DL, VT);
    4869             :       default: break;
    4870             :       }
    4871             :     }
    4872             : 
    4873        5662 :     if (Opcode == ISD::FP_ROUND) {
    4874           4 :       APFloat V = N1CFP->getValueAPF();    // make copy
    4875             :       bool ignored;
    4876             :       // This can return overflow, underflow, or inexact; we don't care.
    4877             :       // FIXME need to be more flexible about rounding mode.
    4878           4 :       (void)V.convert(EVTToAPFloatSemantics(VT),
    4879             :                       APFloat::rmNearestTiesToEven, &ignored);
    4880           4 :       return getConstantFP(V, DL, VT);
    4881             :     }
    4882             :   }
    4883             : 
    4884             :   // Any FP binop with an undef operand is folded to NaN. This matches the
    4885             :   // behavior of the IR optimizer.
    4886     7857773 :   switch (Opcode) {
    4887       57147 :   case ISD::FADD:
    4888             :   case ISD::FSUB:
    4889             :   case ISD::FMUL:
    4890             :   case ISD::FDIV:
    4891             :   case ISD::FREM:
    4892       57147 :     if (N1.isUndef() || N2.isUndef())
    4893        2538 :       return getConstantFP(APFloat::getNaN(EVTToAPFloatSemantics(VT)), DL, VT);
    4894             :   }
    4895             : 
    4896             :   // Canonicalize an UNDEF to the RHS, even over a constant.
    4897     7856504 :   if (N1.isUndef()) {
    4898        4567 :     if (TLI->isCommutativeBinOp(Opcode)) {
    4899             :       std::swap(N1, N2);
    4900             :     } else {
    4901        1721 :       switch (Opcode) {
    4902          30 :       case ISD::FP_ROUND_INREG:
    4903             :       case ISD::SIGN_EXTEND_INREG:
    4904             :       case ISD::SUB:
    4905          30 :         return getUNDEF(VT);     // fold op(undef, arg2) -> undef
    4906         306 :       case ISD::UDIV:
    4907             :       case ISD::SDIV:
    4908             :       case ISD::UREM:
    4909             :       case ISD::SREM:
    4910             :       case ISD::SRA:
    4911             :       case ISD::SRL:
    4912             :       case ISD::SHL:
    4913         306 :         return getConstant(0, DL, VT);    // fold op(undef, arg2) -> 0
    4914             :       }
    4915             :     }
    4916             :   }
    4917             : 
    4918             :   // Fold a bunch of operators when the RHS is undef.
    4919     7856168 :   if (N2.isUndef()) {
    4920       19139 :     switch (Opcode) {
    4921         897 :     case ISD::XOR:
    4922         897 :       if (N1.isUndef())
    4923             :         // Handle undef ^ undef -> 0 special case. This is a common
    4924             :         // idiom (misuse).
    4925         166 :         return getConstant(0, DL, VT);
    4926             :       LLVM_FALLTHROUGH;
    4927             :     case ISD::ADD:
    4928             :     case ISD::ADDC:
    4929             :     case ISD::ADDE:
    4930             :     case ISD::SUB:
    4931             :     case ISD::UDIV:
    4932             :     case ISD::SDIV:
    4933             :     case ISD::UREM:
    4934             :     case ISD::SREM:
    4935             :     case ISD::SRA:
    4936             :     case ISD::SRL:
    4937             :     case ISD::SHL:
    4938        2987 :       return getUNDEF(VT);       // fold op(arg1, undef) -> undef
    4939         988 :     case ISD::MUL:
    4940             :     case ISD::AND:
    4941         988 :       return getConstant(0, DL, VT);  // fold op(arg1, undef) -> 0
    4942         454 :     case ISD::OR:
    4943         454 :       return getAllOnesConstant(DL, VT);
    4944             :     }
    4945             :   }
    4946             : 
    4947             :   // Memoize this node if possible.
    4948             :   SDNode *N;
    4949     7851573 :   SDVTList VTs = getVTList(VT);
    4950     7851573 :   SDValue Ops[] = {N1, N2};
    4951     7851573 :   if (VT != MVT::Glue) {
    4952             :     FoldingSetNodeID ID;
    4953     7847825 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    4954     7847826 :     void *IP = nullptr;
    4955     7847826 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    4956      654716 :       E->intersectFlagsWith(Flags);
    4957      654716 :       return SDValue(E, 0);
    4958             :     }
    4959             : 
    4960    14386220 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4961     7193110 :     N->setFlags(Flags);
    4962     7193110 :     createOperands(N, Ops);
    4963     7193110 :     CSEMap.InsertNode(N, IP);
    4964             :   } else {
    4965        7496 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4966        3748 :     createOperands(N, Ops);
    4967             :   }
    4968             : 
    4969     7196858 :   InsertNode(N);
    4970             :   SDValue V = SDValue(N, 0);
    4971             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    4972     7196858 :   return V;
    4973             : }
    4974             : 
    4975     2315197 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    4976             :                               SDValue N1, SDValue N2, SDValue N3,
    4977             :                               const SDNodeFlags Flags) {
    4978             :   // Perform various simplifications.
    4979     2315197 :   switch (Opcode) {
    4980             :   case ISD::FMA: {
    4981             :     assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
    4982             :     assert(N1.getValueType() == VT && N2.getValueType() == VT &&
    4983             :            N3.getValueType() == VT && "FMA types must match!");
    4984             :     ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
    4985             :     ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
    4986             :     ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
    4987        6282 :     if (N1CFP && N2CFP && N3CFP) {
    4988           8 :       APFloat  V1 = N1CFP->getValueAPF();
    4989           8 :       const APFloat &V2 = N2CFP->getValueAPF();
    4990           8 :       const APFloat &V3 = N3CFP->getValueAPF();
    4991             :       APFloat::opStatus s =
    4992           8 :         V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
    4993           8 :       if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
    4994           8 :         return getConstantFP(V1, DL, VT);
    4995             :     }
    4996             :     break;
    4997             :   }
    4998          13 :   case ISD::CONCAT_VECTORS: {
    4999             :     // Attempt to fold CONCAT_VECTORS into BUILD_VECTOR or UNDEF.
    5000          13 :     SDValue Ops[] = {N1, N2, N3};
    5001          13 :     if (SDValue V = FoldCONCAT_VECTORS(DL, VT, Ops, *this))
    5002           2 :       return V;
    5003          11 :     break;
    5004             :   }
    5005             :   case ISD::SETCC: {
    5006             :     // Use FoldSetCC to simplify SETCC's.
    5007      352535 :     if (SDValue V = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL))
    5008       10215 :       return V;
    5009             :     // Vector constant folding.
    5010      342320 :     SDValue Ops[] = {N1, N2, N3};
    5011      342320 :     if (SDValue V = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops)) {
    5012             :       NewSDValueDbgMsg(V, "New node vector constant folding: ", this);
    5013         838 :       return V;
    5014             :     }
    5015      341482 :     break;
    5016             :   }
    5017             :   case ISD::SELECT:
    5018             :     if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
    5019        3738 :      if (N1C->getZExtValue())
    5020         163 :        return N2;             // select true, X, Y -> X
    5021        1706 :      return N3;             // select false, X, Y -> Y
    5022             :     }
    5023             : 
    5024          83 :     if (N2 == N3) return N2;   // select C, X, X -> X
    5025             :     break;
    5026             :   case ISD::VECTOR_SHUFFLE:
    5027             :     llvm_unreachable("should use getVectorShuffle constructor!");
    5028             :   case ISD::INSERT_VECTOR_ELT: {
    5029             :     ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3);
    5030             :     // INSERT_VECTOR_ELT into out-of-bounds element is an UNDEF
    5031      119987 :     if (N3C && N3C->getZExtValue() >= N1.getValueType().getVectorNumElements())
    5032           8 :       return getUNDEF(VT);
    5033             :     break;
    5034             :   }
    5035       22806 :   case ISD::INSERT_SUBVECTOR: {
    5036             :     SDValue Index = N3;
    5037       22806 :     if (VT.isSimple() && N1.getValueType().isSimple()
    5038       45612 :         && N2.getValueType().isSimple()) {
    5039             :       assert(VT.isVector() && N1.getValueType().isVector() &&
    5040             :              N2.getValueType().isVector() &&
    5041             :              "Insert subvector VTs must be a vectors");
    5042             :       assert(VT == N1.getValueType() &&
    5043             :              "Dest and insert subvector source types must match!");
    5044             :       assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
    5045             :              "Insert subvector must be from smaller vector to larger vector!");
    5046             :       if (isa<ConstantSDNode>(Index)) {
    5047             :         assert((N2.getValueType().getVectorNumElements() +
    5048             :                 cast<ConstantSDNode>(Index)->getZExtValue()
    5049             :                 <= VT.getVectorNumElements())
    5050             :                && "Insert subvector overflow!");
    5051             :       }
    5052             : 
    5053             :       // Trivial insertion.
    5054       22806 :       if (VT.getSimpleVT() == N2.getSimpleValueType())
    5055          82 :         return N2;
    5056             :     }
    5057             :     break;
    5058             :   }
    5059           0 :   case ISD::BITCAST:
    5060             :     // Fold bit_convert nodes from a type to themselves.
    5061           0 :     if (N1.getValueType() == VT)
    5062           0 :       return N1;
    5063             :     break;
    5064             :   }
    5065             : 
    5066             :   // Memoize node if it doesn't produce a flag.
    5067             :   SDNode *N;
    5068     2302092 :   SDVTList VTs = getVTList(VT);
    5069     2302092 :   SDValue Ops[] = {N1, N2, N3};
    5070             :   if (VT != MVT::Glue) {
    5071             :     FoldingSetNodeID ID;
    5072     2301003 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    5073     2301003 :     void *IP = nullptr;
    5074     2301003 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    5075      121763 :       E->intersectFlagsWith(Flags);
    5076      121763 :       return SDValue(E, 0);
    5077             :     }
    5078             : 
    5079     4358480 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    5080     2179240 :     N->setFlags(Flags);
    5081     2179240 :     createOperands(N, Ops);
    5082     2179240 :     CSEMap.InsertNode(N, IP);
    5083             :   } else {
    5084        2178 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    5085        1089 :     createOperands(N, Ops);
    5086             :   }
    5087             : 
    5088     2180329 :   InsertNode(N);
    5089             :   SDValue V = SDValue(N, 0);
    5090             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    5091     2180329 :   return V;
    5092             : }
    5093             : 
    5094       85232 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    5095             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4) {
    5096       85232 :   SDValue Ops[] = { N1, N2, N3, N4 };
    5097       85232 :   return getNode(Opcode, DL, VT, Ops);
    5098             : }
    5099             : 
    5100       39237 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    5101             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4,
    5102             :                               SDValue N5) {
    5103       39237 :   SDValue Ops[] = { N1, N2, N3, N4, N5 };
    5104       39237 :   return getNode(Opcode, DL, VT, Ops);
    5105             : }
    5106             : 
    5107             : /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
    5108             : /// the incoming stack arguments to be loaded from the stack.
    5109         155 : SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
    5110             :   SmallVector<SDValue, 8> ArgChains;
    5111             : 
    5112             :   // Include the original chain at the beginning of the list. When this is
    5113             :   // used by target LowerCall hooks, this helps legalize find the
    5114             :   // CALLSEQ_BEGIN node.
    5115         155 :   ArgChains.push_back(Chain);
    5116             : 
    5117             :   // Add a chain value for each stack argument.
    5118         155 :   for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
    5119         741 :        UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
    5120             :     if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
    5121             :       if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
    5122         102 :         if (FI->getIndex() < 0)
    5123         102 :           ArgChains.push_back(SDValue(L, 1));
    5124             : 
    5125             :   // Build a tokenfactor for all the chains.
    5126         310 :   return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
    5127             : }
    5128             : 
    5129             : /// getMemsetValue - Vectorized representation of the memset value
    5130             : /// operand.
    5131      282819 : static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
    5132             :                               const SDLoc &dl) {
    5133             :   assert(!Value.isUndef());
    5134             : 
    5135             :   unsigned NumBits = VT.getScalarSizeInBits();
    5136             :   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
    5137             :     assert(C->getAPIntValue().getBitWidth() == 8);
    5138      565570 :     APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
    5139      282785 :     if (VT.isInteger())
    5140      280228 :       return DAG.getConstant(Val, dl, VT);
    5141        5114 :     return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
    5142        2557 :                              VT);
    5143             :   }
    5144             : 
    5145             :   assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
    5146          34 :   EVT IntVT = VT.getScalarType();
    5147          34 :   if (!IntVT.isInteger())
    5148           1 :     IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
    5149             : 
    5150          34 :   Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
    5151          34 :   if (NumBits > 8) {
    5152             :     // Use a multiplication with 0x010101... to extend the input to the
    5153             :     // required length.
    5154          36 :     APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
    5155          18 :     Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
    5156          18 :                         DAG.getConstant(Magic, dl, IntVT));
    5157             :   }
    5158             : 
    5159          34 :   if (VT != Value.getValueType() && !VT.isInteger())
    5160           1 :     Value = DAG.getBitcast(VT.getScalarType(), Value);
    5161          34 :   if (VT != Value.getValueType())
    5162          18 :     Value = DAG.getSplatBuildVector(VT, dl, Value);
    5163             : 
    5164          34 :   return Value;
    5165             : }
    5166             : 
    5167             : /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
    5168             : /// used when a memcpy is turned into a memset when the source is a constant
    5169             : /// string ptr.
    5170        1274 : static SDValue getMemsetStringVal(EVT VT, const SDLoc &dl, SelectionDAG &DAG,
    5171             :                                   const TargetLowering &TLI,
    5172             :                                   const ConstantDataArraySlice &Slice) {
    5173             :   // Handle vector with all elements zero.
    5174        1274 :   if (Slice.Array == nullptr) {
    5175          45 :     if (VT.isInteger())
    5176          42 :       return DAG.getConstant(0, dl, VT);
    5177             :     else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
    5178           3 :       return DAG.getConstantFP(0.0, dl, VT);
    5179           0 :     else if (VT.isVector()) {
    5180             :       unsigned NumElts = VT.getVectorNumElements();
    5181           0 :       MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
    5182             :       return DAG.getNode(ISD::BITCAST, dl, VT,
    5183             :                          DAG.getConstant(0, dl,
    5184           0 :                                          EVT::getVectorVT(*DAG.getContext(),
    5185           0 :                                                           EltVT, NumElts)));
    5186             :     } else
    5187           0 :       llvm_unreachable("Expected type!");
    5188             :   }
    5189             : 
    5190             :   assert(!VT.isVector() && "Can't handle vector type here!");
    5191        1229 :   unsigned NumVTBits = VT.getSizeInBits();
    5192        1229 :   unsigned NumVTBytes = NumVTBits / 8;
    5193        1231 :   unsigned NumBytes = std::min(NumVTBytes, unsigned(Slice.Length));
    5194             : 
    5195             :   APInt Val(NumVTBits, 0);
    5196        1229 :   if (DAG.getDataLayout().isLittleEndian()) {
    5197        5609 :     for (unsigned i = 0; i != NumBytes; ++i)
    5198        8760 :       Val |= (uint64_t)(unsigned char)Slice[i] << i*8;
    5199             :   } else {
    5200           0 :     for (unsigned i = 0; i != NumBytes; ++i)
    5201           0 :       Val |= (uint64_t)(unsigned char)Slice[i] << (NumVTBytes-i-1)*8;
    5202             :   }
    5203             : 
    5204             :   // If the "cost" of materializing the integer immediate is less than the cost
    5205             :   // of a load, then it is cost effective to turn the load into the immediate.
    5206        1229 :   Type *Ty = VT.getTypeForEVT(*DAG.getContext());
    5207        1229 :   if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
    5208        1214 :     return DAG.getConstant(Val, dl, VT);
    5209          15 :   return SDValue(nullptr, 0);
    5210             : }
    5211             : 
    5212      530907 : SDValue SelectionDAG::getMemBasePlusOffset(SDValue Base, unsigned Offset,
    5213             :                                            const SDLoc &DL) {
    5214     1061814 :   EVT VT = Base.getValueType();
    5215      530907 :   return getNode(ISD::ADD, DL, VT, Base, getConstant(Offset, DL, VT));
    5216             : }
    5217             : 
    5218             : /// Returns true if memcpy source is constant data.
    5219           0 : static bool isMemSrcFromConstant(SDValue Src, ConstantDataArraySlice &Slice) {
    5220             :   uint64_t SrcDelta = 0;
    5221             :   GlobalAddressSDNode *G = nullptr;
    5222           0 :   if (Src.getOpcode() == ISD::GlobalAddress)
    5223             :     G = cast<GlobalAddressSDNode>(Src);
    5224           0 :   else if (Src.getOpcode() == ISD::ADD &&
    5225           0 :            Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
    5226           0 :            Src.getOperand(1).getOpcode() == ISD::Constant) {
    5227             :     G = cast<GlobalAddressSDNode>(Src.getOperand(0));
    5228           0 :     SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
    5229             :   }
    5230           0 :   if (!G)
    5231           0 :     return false;
    5232             : 
    5233           0 :   return getConstantDataArrayInfo(G->getGlobal(), Slice, 8,
    5234           0 :                                   SrcDelta + G->getOffset());
    5235             : }
    5236             : 
    5237             : /// Determines the optimal series of memory ops to replace the memset / memcpy.
    5238             : /// Return true if the number of memory ops is below the threshold (Limit).
    5239             : /// It returns the types of the sequence of memory ops to perform
    5240             : /// memset / memcpy by reference.
    5241      257809 : static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
    5242             :                                      unsigned Limit, uint64_t Size,
    5243             :                                      unsigned DstAlign, unsigned SrcAlign,
    5244             :                                      bool IsMemset,
    5245             :                                      bool ZeroMemset,
    5246             :                                      bool MemcpyStrSrc,
    5247             :                                      bool AllowOverlap,
    5248             :                                      unsigned DstAS, unsigned SrcAS,
    5249             :                                      SelectionDAG &DAG,
    5250             :                                      const TargetLowering &TLI) {
    5251             :   assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
    5252             :          "Expecting memcpy / memset source to meet alignment requirement!");
    5253             :   // If 'SrcAlign' is zero, that means the memory operation does not need to
    5254             :   // load the value, i.e. memset or memcpy from constant string. Otherwise,
    5255             :   // it's the inferred alignment of the source. 'DstAlign', on the other hand,
    5256             :   // is the specified alignment of the memory operation. If it is zero, that
    5257             :   // means it's possible to change the alignment of the destination.
    5258             :   // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
    5259             :   // not need to be loaded.
    5260             :   EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
    5261             :                                    IsMemset, ZeroMemset, MemcpyStrSrc,
    5262      257809 :                                    DAG.getMachineFunction());
    5263             : 
    5264             :   if (VT == MVT::Other) {
    5265             :     // Use the largest integer type whose alignment constraints are satisfied.
    5266             :     // We only need to check DstAlign here as SrcAlign is always greater or
    5267             :     // equal to DstAlign (or zero).
    5268         490 :     VT = MVT::i64;
    5269        1434 :     while (DstAlign && DstAlign < VT.getSizeInBits() / 8 &&
    5270         601 :            !TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign))
    5271         343 :       VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
    5272             :     assert(VT.isInteger());
    5273             : 
    5274             :     // Find the largest legal integer type.
    5275             :     MVT LVT = MVT::i64;
    5276         338 :     while (!TLI.isTypeLegal(LVT))
    5277         338 :       LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
    5278             :     assert(LVT.isInteger());
    5279             : 
    5280             :     // If the type we've chosen is larger than the largest legal integer type
    5281             :     // then use that instead.
    5282         490 :     if (VT.bitsGT(LVT))
    5283          67 :       VT = LVT;
    5284             :   }
    5285             : 
    5286             :   unsigned NumMemOps = 0;
    5287      691351 :   while (Size != 0) {
    5288      434993 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5289      566803 :     while (VTSize > Size) {
    5290             :       // For now, only use non-vector load / store's for the left-over pieces.
    5291      131810 :       EVT NewVT = VT;
    5292             :       unsigned NewVTSize;
    5293             : 
    5294             :       bool Found = false;
    5295      131810 :       if (VT.isVector() || VT.isFloatingPoint()) {
    5296      129757 :         NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
    5297      128930 :         if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
    5298      128930 :             TLI.isSafeMemOpType(NewVT.getSimpleVT()))
    5299             :           Found = true;
    5300             :         else if (NewVT == MVT::i64 &&
    5301         706 :                  TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
    5302        1471 :                  TLI.isSafeMemOpType(MVT::f64)) {
    5303             :           // i64 is usually not legal on 32-bit targets, but f64 may be.
    5304         705 :           NewVT = MVT::f64;
    5305             :           Found = true;
    5306             :         }
    5307             :       }
    5308             : 
    5309             :       if (!Found) {
    5310             :         do {
    5311        2175 :           NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
    5312             :           if (NewVT == MVT::i8)
    5313             :             break;
    5314        1668 :         } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
    5315             :       }
    5316      131810 :       NewVTSize = NewVT.getSizeInBits() / 8;
    5317             : 
    5318             :       // If the new VT cannot cover all of the remaining bits, then consider
    5319             :       // issuing a (or a pair of) unaligned and overlapping load / store.
    5320             :       // FIXME: Only does this for 64-bit or more since we don't have proper
    5321             :       // cost model for unaligned load / store.
    5322             :       bool Fast;
    5323      131165 :       if (NumMemOps && AllowOverlap &&
    5324      130626 :           VTSize >= 8 && NewVTSize < Size &&
    5325      132256 :           TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast)
    5326         214 :         VTSize = Size;
    5327             :       else {
    5328      131596 :         VT = NewVT;
    5329             :         VTSize = NewVTSize;
    5330             :       }
    5331             :     }
    5332             : 
    5333      434993 :     if (++NumMemOps > Limit)
    5334             :       return false;
    5335             : 
    5336      433542 :     MemOps.push_back(VT);
    5337      433542 :     Size -= VTSize;
    5338             :   }
    5339             : 
    5340             :   return true;
    5341             : }
    5342             : 
    5343      257809 : static bool shouldLowerMemFuncForSize(const MachineFunction &MF) {
    5344             :   // On Darwin, -Os means optimize for size without hurting performance, so
    5345             :   // only really optimize for size when -Oz (MinSize) is used.
    5346      257809 :   if (MF.getTarget().getTargetTriple().isOSDarwin())
    5347         166 :     return MF.getFunction().optForMinSize();
    5348      257643 :   return MF.getFunction().optForSize();
    5349             : }
    5350             : 
    5351          38 : static void chainLoadsAndStoresForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
    5352             :                           SmallVector<SDValue, 32> &OutChains, unsigned From,
    5353             :                           unsigned To, SmallVector<SDValue, 16> &OutLoadChains,
    5354             :                           SmallVector<SDValue, 16> &OutStoreChains) {
    5355             :   assert(OutLoadChains.size() && "Missing loads in memcpy inlining");
    5356             :   assert(OutStoreChains.size() && "Missing stores in memcpy inlining");
    5357             :   SmallVector<SDValue, 16> GluedLoadChains;
    5358         113 :   for (unsigned i = From; i < To; ++i) {
    5359         150 :     OutChains.push_back(OutLoadChains[i]);
    5360          75 :     GluedLoadChains.push_back(OutLoadChains[i]);
    5361             :   }
    5362             : 
    5363             :   // Chain for all loads.
    5364             :   SDValue LoadToken = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
    5365          38 :                                   GluedLoadChains);
    5366             : 
    5367         113 :   for (unsigned i = From; i < To; ++i) {
    5368          75 :     StoreSDNode *ST = dyn_cast<StoreSDNode>(OutStoreChains[i]);
    5369             :     SDValue NewStore = DAG.getTruncStore(LoadToken, dl, ST->getValue(),
    5370             :                                   ST->getBasePtr(), ST->getMemoryVT(),
    5371         150 :                                   ST->getMemOperand());
    5372          75 :     OutChains.push_back(NewStore);
    5373             :   }
    5374          38 : }
    5375             : 
    5376      102067 : static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
    5377             :                                        SDValue Chain, SDValue Dst, SDValue Src,
    5378             :                                        uint64_t Size, unsigned Align,
    5379             :                                        bool isVol, bool AlwaysInline,
    5380             :                                        MachinePointerInfo DstPtrInfo,
    5381             :                                        MachinePointerInfo SrcPtrInfo) {
    5382             :   // Turn a memcpy of undef to nop.
    5383      102067 :   if (Src.isUndef())
    5384           5 :     return Chain;
    5385             : 
    5386             :   // Expand memcpy to a series of load and store ops if the size operand falls
    5387             :   // below a certain threshold.
    5388             :   // TODO: In the AlwaysInline case, if the size is big then generate a loop
    5389             :   // rather than maybe a humongous number of loads and stores.
    5390      102062 :   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
    5391      102062 :   const DataLayout &DL = DAG.getDataLayout();
    5392      102062 :   LLVMContext &C = *DAG.getContext();
    5393             :   std::vector<EVT> MemOps;
    5394             :   bool DstAlignCanChange = false;
    5395      102062 :   MachineFunction &MF = DAG.getMachineFunction();
    5396      102062 :   MachineFrameInfo &MFI = MF.getFrameInfo();
    5397      102062 :   bool OptSize = shouldLowerMemFuncForSize(MF);
    5398             :   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
    5399       82167 :   if (FI && !MFI.isFixedObjectIndex(FI->getIndex()))
    5400             :     DstAlignCanChange = true;
    5401      102062 :   unsigned SrcAlign = DAG.InferPtrAlignment(Src);
    5402      102062 :   if (Align > SrcAlign)
    5403             :     SrcAlign = Align;
    5404             :   ConstantDataArraySlice Slice;
    5405      102062 :   bool CopyFromConstant = isMemSrcFromConstant(Src, Slice);
    5406      102062 :   bool isZeroConstant = CopyFromConstant && Slice.Array == nullptr;
    5407      102062 :   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
    5408             : 
    5409      224031 :   if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
    5410             :                                 (DstAlignCanChange ? 0 : Align),
    5411             :                                 (isZeroConstant ? 0 : SrcAlign),
    5412             :                                 false, false, CopyFromConstant, true,
    5413             :                                 DstPtrInfo.getAddrSpace(),
    5414             :                                 SrcPtrInfo.getAddrSpace(),
    5415             :                                 DAG, TLI))
    5416         370 :     return SDValue();
    5417             : 
    5418      101692 :   if (DstAlignCanChange) {
    5419       82056 :     Type *Ty = MemOps[0].getTypeForEVT(C);
    5420       82056 :     unsigned NewAlign = (unsigned)DL.getABITypeAlignment(Ty);
    5421             : 
    5422             :     // Don't promote to an alignment that would require dynamic stack
    5423             :     // realignment.
    5424       82056 :     const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
    5425       82056 :     if (!TRI->needsStackRealignment(MF))
    5426       82022 :       while (NewAlign > Align &&
    5427        6329 :              DL.exceedsNaturalStackAlignment(NewAlign))
    5428           3 :           NewAlign /= 2;
    5429             : 
    5430       82056 :     if (NewAlign > Align) {
    5431             :       // Give the stack frame object a larger alignment if needed.
    5432       12722 :       if (MFI.getObjectAlignment(FI->getIndex()) < NewAlign)
    5433             :         MFI.setObjectAlignment(FI->getIndex(), NewAlign);
    5434             :       Align = NewAlign;
    5435             :     }
    5436             :   }
    5437             : 
    5438             :   MachineMemOperand::Flags MMOFlags =
    5439      101692 :       isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone;
    5440             :   SmallVector<SDValue, 16> OutLoadChains;
    5441             :   SmallVector<SDValue, 16> OutStoreChains;
    5442             :   SmallVector<SDValue, 32> OutChains;
    5443      203384 :   unsigned NumMemOps = MemOps.size();
    5444             :   uint64_t SrcOff = 0, DstOff = 0;
    5445      214294 :   for (unsigned i = 0; i != NumMemOps; ++i) {
    5446      112602 :     EVT VT = MemOps[i];
    5447      112602 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5448      112602 :     SDValue Value, Store;
    5449             : 
    5450      112602 :     if (VTSize > Size) {
    5451             :       // Issuing an unaligned load / store pair  that overlaps with the previous
    5452             :       // pair. Adjust the offset accordingly.
    5453             :       assert(i == NumMemOps-1 && i != 0);
    5454         203 :       SrcOff -= VTSize - Size;
    5455             :       DstOff -= VTSize - Size;
    5456             :     }
    5457             : 
    5458      112602 :     if (CopyFromConstant &&
    5459        2913 :         (isZeroConstant || (VT.isInteger() && !VT.isVector()))) {
    5460             :       // It's unlikely a store of a vector immediate can be done in a single
    5461             :       // instruction. It would require a load from a constantpool first.
    5462             :       // We only handle zero vectors here.
    5463             :       // FIXME: Handle other cases where store of vector immediate is done in
    5464             :       // a single instruction.
    5465             :       ConstantDataArraySlice SubSlice;
    5466        1274 :       if (SrcOff < Slice.Length) {
    5467        1230 :         SubSlice = Slice;
    5468             :         SubSlice.move(SrcOff);
    5469             :       } else {
    5470             :         // This is an out-of-bounds access and hence UB. Pretend we read zero.
    5471          44 :         SubSlice.Array = nullptr;
    5472          44 :         SubSlice.Offset = 0;
    5473          44 :         SubSlice.Length = VTSize;
    5474             :       }
    5475        1274 :       Value = getMemsetStringVal(VT, dl, DAG, TLI, SubSlice);
    5476        1274 :       if (Value.getNode()) {
    5477        1259 :         Store = DAG.getStore(Chain, dl, Value,
    5478             :                              DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5479             :                              DstPtrInfo.getWithOffset(DstOff), Align,
    5480        1259 :                              MMOFlags);
    5481        1259 :         OutChains.push_back(Store);
    5482             :       }
    5483             :     }
    5484             : 
    5485      112602 :     if (!Store.getNode()) {
    5486             :       // The type might not be legal for the target.  This should only happen
    5487             :       // if the type is smaller than a legal type, as on PPC, so the right
    5488             :       // thing to do is generate a LoadExt/StoreTrunc pair.  These simplify
    5489             :       // to Load/Store if NVT==VT.
    5490             :       // FIXME does the case above also need this?
    5491      111343 :       EVT NVT = TLI.getTypeToTransformTo(C, VT);
    5492             :       assert(NVT.bitsGE(VT));
    5493             : 
    5494             :       bool isDereferenceable =
    5495      111343 :         SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
    5496             :       MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
    5497      111343 :       if (isDereferenceable)
    5498             :         SrcMMOFlags |= MachineMemOperand::MODereferenceable;
    5499             : 
    5500      111343 :       Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
    5501             :                              DAG.getMemBasePlusOffset(Src, SrcOff, dl),
    5502             :                              SrcPtrInfo.getWithOffset(SrcOff), VT,
    5503      222686 :                              MinAlign(SrcAlign, SrcOff), SrcMMOFlags);
    5504      111343 :       OutLoadChains.push_back(Value.getValue(1));
    5505             : 
    5506      111343 :       Store = DAG.getTruncStore(
    5507             :           Chain, dl, Value, DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5508      111343 :           DstPtrInfo.getWithOffset(DstOff), VT, Align, MMOFlags);
    5509      111343 :       OutStoreChains.push_back(Store);
    5510             :     }
    5511      112602 :     SrcOff += VTSize;
    5512             :     DstOff += VTSize;
    5513      112602 :     Size -= VTSize;
    5514             :   }
    5515             : 
    5516      101692 :   unsigned GluedLdStLimit = MaxLdStGlue == 0 ?
    5517      101692 :                                 TLI.getMaxGluedStoresPerMemcpy() : MaxLdStGlue;
    5518      101692 :   unsigned NumLdStInMemcpy = OutStoreChains.size();
    5519             : 
    5520      101692 :   if (NumLdStInMemcpy) {
    5521             :     // It may be that memcpy might be converted to memset if it's memcpy
    5522             :     // of constants. In such a case, we won't have loads and stores, but
    5523             :     // just stores. In the absence of loads, there is nothing to gang up.
    5524      101085 :     if ((GluedLdStLimit <= 1) || !EnableMemCpyDAGOpt) {
    5525             :       // If target does not care, just leave as it.
    5526      212315 :       for (unsigned i = 0; i < NumLdStInMemcpy; ++i) {
    5527      222536 :         OutChains.push_back(OutLoadChains[i]);
    5528      111268 :         OutChains.push_back(OutStoreChains[i]);
    5529             :       }
    5530             :     } else {
    5531             :       // Ld/St less than/equal limit set by target.
    5532          38 :       if (NumLdStInMemcpy <= GluedLdStLimit) {
    5533          38 :           chainLoadsAndStoresForMemcpy(DAG, dl, OutChains, 0,
    5534             :                                         NumLdStInMemcpy, OutLoadChains,
    5535             :                                         OutStoreChains);
    5536             :       } else {
    5537           0 :         unsigned NumberLdChain =  NumLdStInMemcpy / GluedLdStLimit;
    5538           0 :         unsigned RemainingLdStInMemcpy = NumLdStInMemcpy % GluedLdStLimit;
    5539             :         unsigned GlueIter = 0;
    5540             : 
    5541           0 :         for (unsigned cnt = 0; cnt < NumberLdChain; ++cnt) {
    5542           0 :           unsigned IndexFrom = NumLdStInMemcpy - GlueIter - GluedLdStLimit;
    5543             :           unsigned IndexTo   = NumLdStInMemcpy - GlueIter;
    5544             : 
    5545           0 :           chainLoadsAndStoresForMemcpy(DAG, dl, OutChains, IndexFrom, IndexTo,
    5546             :                                        OutLoadChains, OutStoreChains);
    5547           0 :           GlueIter += GluedLdStLimit;
    5548             :         }
    5549             : 
    5550             :         // Residual ld/st.
    5551           0 :         if (RemainingLdStInMemcpy) {
    5552           0 :           chainLoadsAndStoresForMemcpy(DAG, dl, OutChains, 0,
    5553             :                                         RemainingLdStInMemcpy, OutLoadChains,
    5554             :                                         OutStoreChains);
    5555             :         }
    5556             :       }
    5557             :     }
    5558             :   }
    5559      101692 :   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
    5560             : }
    5561             : 
    5562          84 : static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
    5563             :                                         SDValue Chain, SDValue Dst, SDValue Src,
    5564             :                                         uint64_t Size, unsigned Align,
    5565             :                                         bool isVol, bool AlwaysInline,
    5566             :                                         MachinePointerInfo DstPtrInfo,
    5567             :                                         MachinePointerInfo SrcPtrInfo) {
    5568             :   // Turn a memmove of undef to nop.
    5569         168 :   if (Src.isUndef())
    5570           0 :     return Chain;
    5571             : 
    5572             :   // Expand memmove to a series of load and store ops if the size operand falls
    5573             :   // below a certain threshold.
    5574          84 :   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
    5575          84 :   const DataLayout &DL = DAG.getDataLayout();
    5576          84 :   LLVMContext &C = *DAG.getContext();
    5577             :   std::vector<EVT> MemOps;
    5578             :   bool DstAlignCanChange = false;
    5579          84 :   MachineFunction &MF = DAG.getMachineFunction();
    5580          84 :   MachineFrameInfo &MFI = MF.getFrameInfo();
    5581          84 :   bool OptSize = shouldLowerMemFuncForSize(MF);
    5582             :   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
    5583           1 :   if (FI && !MFI.isFixedObjectIndex(FI->getIndex()))
    5584             :     DstAlignCanChange = true;
    5585          84 :   unsigned SrcAlign = DAG.InferPtrAlignment(Src);
    5586          84 :   if (Align > SrcAlign)
    5587             :     SrcAlign = Align;
    5588          84 :   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
    5589             : 
    5590         167 :   if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
    5591             :                                 (DstAlignCanChange ? 0 : Align), SrcAlign,
    5592             :                                 false, false, false, false,
    5593             :                                 DstPtrInfo.getAddrSpace(),
    5594             :                                 SrcPtrInfo.getAddrSpace(),
    5595             :                                 DAG, TLI))
    5596          57 :     return SDValue();
    5597             : 
    5598          27 :   if (DstAlignCanChange) {
    5599           1 :     Type *Ty = MemOps[0].getTypeForEVT(C);
    5600           1 :     unsigned NewAlign = (unsigned)DL.getABITypeAlignment(Ty);
    5601           1 :     if (NewAlign > Align) {
    5602             :       // Give the stack frame object a larger alignment if needed.
    5603           2 :       if (MFI.getObjectAlignment(FI->getIndex()) < NewAlign)
    5604             :         MFI.setObjectAlignment(FI->getIndex(), NewAlign);
    5605             :       Align = NewAlign;
    5606             :     }
    5607             :   }
    5608             : 
    5609             :   MachineMemOperand::Flags MMOFlags =
    5610          27 :       isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone;
    5611             :   uint64_t SrcOff = 0, DstOff = 0;
    5612             :   SmallVector<SDValue, 8> LoadValues;
    5613             :   SmallVector<SDValue, 8> LoadChains;
    5614             :   SmallVector<SDValue, 8> OutChains;
    5615          54 :   unsigned NumMemOps = MemOps.size();
    5616          56 :   for (unsigned i = 0; i < NumMemOps; i++) {
    5617          29 :     EVT VT = MemOps[i];
    5618          29 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5619          29 :     SDValue Value;
    5620             : 
    5621             :     bool isDereferenceable =
    5622          29 :       SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
    5623             :     MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
    5624          29 :     if (isDereferenceable)
    5625             :       SrcMMOFlags |= MachineMemOperand::MODereferenceable;
    5626             : 
    5627          29 :     Value =
    5628          29 :         DAG.getLoad(VT, dl, Chain, DAG.getMemBasePlusOffset(Src, SrcOff, dl),
    5629          29 :                     SrcPtrInfo.getWithOffset(SrcOff), SrcAlign, SrcMMOFlags);
    5630          29 :     LoadValues.push_back(Value);
    5631          29 :     LoadChains.push_back(Value.getValue(1));
    5632          29 :     SrcOff += VTSize;
    5633             :   }
    5634          27 :   Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
    5635             :   OutChains.clear();
    5636          56 :   for (unsigned i = 0; i < NumMemOps; i++) {
    5637          29 :     EVT VT = MemOps[i];
    5638          29 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5639          29 :     SDValue Store;
    5640             : 
    5641          29 :     Store = DAG.getStore(Chain, dl, LoadValues[i],
    5642             :                          DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5643          29 :                          DstPtrInfo.getWithOffset(DstOff), Align, MMOFlags);
    5644          29 :     OutChains.push_back(Store);
    5645          29 :     DstOff += VTSize;
    5646             :   }
    5647             : 
    5648          27 :   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
    5649             : }
    5650             : 
    5651             : /// Lower the call to 'memset' intrinsic function into a series of store
    5652             : /// operations.
    5653             : ///
    5654             : /// \param DAG Selection DAG where lowered code is placed.
    5655             : /// \param dl Link to corresponding IR location.
    5656             : /// \param Chain Control flow dependency.
    5657             : /// \param Dst Pointer to destination memory location.
    5658             : /// \param Src Value of byte to write into the memory.
    5659             : /// \param Size Number of bytes to write.
    5660             : /// \param Align Alignment of the destination in bytes.
    5661             : /// \param isVol True if destination is volatile.
    5662             : /// \param DstPtrInfo IR information on the memory pointer.
    5663             : /// \returns New head in the control flow, if lowering was successful, empty
    5664             : /// SDValue otherwise.
    5665             : ///
    5666             : /// The function tries to replace 'llvm.memset' intrinsic with several store
    5667             : /// operations and value calculation code. This is usually profitable for small
    5668             : /// memory size.
    5669      155664 : static SDValue getMemsetStores(SelectionDAG &DAG, const SDLoc &dl,
    5670             :                                SDValue Chain, SDValue Dst, SDValue Src,
    5671             :                                uint64_t Size, unsigned Align, bool isVol,
    5672             :                                MachinePointerInfo DstPtrInfo) {
    5673             :   // Turn a memset of undef to nop.
    5674      155664 :   if (Src.isUndef())
    5675           1 :     return Chain;
    5676             : 
    5677             :   // Expand memset to a series of load/store ops if the size operand
    5678             :   // falls below a certain threshold.
    5679      155663 :   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
    5680             :   std::vector<EVT> MemOps;
    5681             :   bool DstAlignCanChange = false;
    5682      155663 :   MachineFunction &MF = DAG.getMachineFunction();
    5683      155663 :   MachineFrameInfo &MFI = MF.getFrameInfo();
    5684      155663 :   bool OptSize = shouldLowerMemFuncForSize(MF);
    5685             :   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
    5686        4118 :   if (FI && !MFI.isFixedObjectIndex(FI->getIndex()))
    5687             :     DstAlignCanChange = true;
    5688             :   bool IsZeroVal =
    5689      311228 :     isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
    5690      311326 :   if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
    5691             :                                 Size, (DstAlignCanChange ? 0 : Align), 0,
    5692             :                                 true, IsZeroVal, false, true,
    5693             :                                 DstPtrInfo.getAddrSpace(), ~0u,
    5694             :                                 DAG, TLI))
    5695        1024 :     return SDValue();
    5696             : 
    5697      154639 :   if (DstAlignCanChange) {
    5698        4039 :     Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
    5699        4039 :     unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
    5700        4039 :     if (NewAlign > Align) {
    5701             :       // Give the stack frame object a larger alignment if needed.
    5702        1140 :       if (MFI.getObjectAlignment(FI->getIndex()) < NewAlign)
    5703             :         MFI.setObjectAlignment(FI->getIndex(), NewAlign);
    5704             :       Align = NewAlign;
    5705             :     }
    5706             :   }
    5707             : 
    5708             :   SmallVector<SDValue, 8> OutChains;
    5709             :   uint64_t DstOff = 0;
    5710      154639 :   unsigned NumMemOps = MemOps.size();
    5711             : 
    5712             :   // Find the largest store and generate the bit pattern for it.
    5713      154639 :   EVT LargestVT = MemOps[0];
    5714      304755 :   for (unsigned i = 1; i < NumMemOps; i++)
    5715      300232 :     if (MemOps[i].bitsGT(LargestVT))
    5716           0 :       LargestVT = MemOps[i];
    5717      154639 :   SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
    5718             : 
    5719      459394 :   for (unsigned i = 0; i < NumMemOps; i++) {
    5720      304755 :     EVT VT = MemOps[i];
    5721      304755 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5722      304755 :     if (VTSize > Size) {
    5723             :       // Issuing an unaligned load / store pair  that overlaps with the previous
    5724             :       // pair. Adjust the offset accordingly.
    5725             :       assert(i == NumMemOps-1 && i != 0);
    5726          11 :       DstOff -= VTSize - Size;
    5727             :     }
    5728             : 
    5729             :     // If this store is smaller than the largest store see whether we can get
    5730             :     // the smaller value for free with a truncate.
    5731      304755 :     SDValue Value = MemSetValue;
    5732      304755 :     if (VT.bitsLT(LargestVT)) {
    5733      128368 :       if (!LargestVT.isVector() && !VT.isVector() &&
    5734          69 :           TLI.isTruncateFree(LargestVT, VT))
    5735          50 :         Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
    5736             :       else
    5737      128180 :         Value = getMemsetValue(Src, VT, DAG, dl);
    5738             :     }
    5739             :     assert(Value.getValueType() == VT && "Value with wrong type.");
    5740             :     SDValue Store = DAG.getStore(
    5741             :         Chain, dl, Value, DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5742             :         DstPtrInfo.getWithOffset(DstOff), Align,
    5743      609495 :         isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone);
    5744      304755 :     OutChains.push_back(Store);
    5745      304755 :     DstOff += VT.getSizeInBits() / 8;
    5746      304755 :     Size -= VTSize;
    5747             :   }
    5748             : 
    5749      154639 :   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
    5750             : }
    5751             : 
    5752        9133 : static void checkAddrSpaceIsValidForLibcall(const TargetLowering *TLI,
    5753             :                                             unsigned AS) {
    5754             :   // Lowering memcpy / memset / memmove intrinsics to calls is only valid if all
    5755             :   // pointer operands can be losslessly bitcasted to pointers of address space 0
    5756        9133 :   if (AS != 0 && !TLI->isNoopAddrSpaceCast(AS, 0)) {
    5757           0 :     report_fatal_error("cannot lower memory intrinsic in address space " +
    5758             :                        Twine(AS));
    5759             :   }
    5760        9133 : }
    5761             : 
    5762      102439 : SDValue SelectionDAG::getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst,
    5763             :                                 SDValue Src, SDValue Size, unsigned Align,
    5764             :                                 bool isVol, bool AlwaysInline, bool isTailCall,
    5765             :                                 MachinePointerInfo DstPtrInfo,
    5766             :                                 MachinePointerInfo SrcPtrInfo) {
    5767             :   assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
    5768             : 
    5769             :   // Check to see if we should lower the memcpy to loads and stores first.
    5770             :   // For cases within the target-specified limits, this is the best choice.
    5771             :   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
    5772             :   if (ConstantSize) {
    5773             :     // Memcpy with size zero? Just return the original chain.
    5774      204138 :     if (ConstantSize->isNullValue())
    5775      101699 :       return Chain;
    5776             : 
    5777             :     SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
    5778             :                                              ConstantSize->getZExtValue(),Align,
    5779      204128 :                                 isVol, false, DstPtrInfo, SrcPtrInfo);
    5780      102064 :     if (Result.getNode())
    5781      101694 :       return Result;
    5782             :   }
    5783             : 
    5784             :   // Then check to see if we should lower the memcpy with target-specific
    5785             :   // code. If the target chooses to do this, this is the next best.
    5786         740 :   if (TSI) {
    5787             :     SDValue Result = TSI->EmitTargetCodeForMemcpy(
    5788             :         *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
    5789         740 :         DstPtrInfo, SrcPtrInfo);
    5790         740 :     if (Result.getNode())
    5791         157 :       return Result;
    5792             :   }
    5793             : 
    5794             :   // If we really need inline code and the target declined to provide it,
    5795             :   // use a (potentially long) sequence of loads and stores.
    5796         583 :   if (AlwaysInline) {
    5797             :     assert(ConstantSize && "AlwaysInline requires a constant size!");
    5798             :     return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
    5799             :                                    ConstantSize->getZExtValue(), Align, isVol,
    5800           6 :                                    true, DstPtrInfo, SrcPtrInfo);
    5801             :   }
    5802             : 
    5803         580 :   checkAddrSpaceIsValidForLibcall(TLI, DstPtrInfo.getAddrSpace());
    5804         580 :   checkAddrSpaceIsValidForLibcall(TLI, SrcPtrInfo.getAddrSpace());
    5805             : 
    5806             :   // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
    5807             :   // memcpy is not guaranteed to be safe. libc memcpys aren't required to
    5808             :   // respect volatile, so they may do things like read or write memory
    5809             :   // beyond the given memory regions. But fixing this isn't easy, and most
    5810             :   // people don't care.
    5811             : 
    5812             :   // Emit a library call.
    5813             :   TargetLowering::ArgListTy Args;
    5814             :   TargetLowering::ArgListEntry Entry;
    5815         580 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5816         580 :   Entry.Node = Dst; Args.push_back(Entry);
    5817         580 :   Entry.Node = Src; Args.push_back(Entry);
    5818         580 :   Entry.Node = Size; Args.push_back(Entry);
    5819             :   // FIXME: pass in SDLoc
    5820         580 :   TargetLowering::CallLoweringInfo CLI(*this);
    5821             :   CLI.setDebugLoc(dl)
    5822         580 :       .setChain(Chain)
    5823         580 :       .setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
    5824         580 :                     Dst.getValueType().getTypeForEVT(*getContext()),
    5825         580 :                     getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
    5826             :                                       TLI->getPointerTy(getDataLayout())),
    5827        1160 :                     std::move(Args))
    5828             :       .setDiscardResult()
    5829             :       .setTailCall(isTailCall);
    5830             : 
    5831         580 :   std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
    5832         580 :   return CallResult.second;
    5833             : }
    5834             : 
    5835           6 : SDValue SelectionDAG::getAtomicMemcpy(SDValue Chain, const SDLoc &dl,
    5836             :                                       SDValue Dst, unsigned DstAlign,
    5837             :                                       SDValue Src, unsigned SrcAlign,
    5838             :                                       SDValue Size, Type *SizeTy,
    5839             :                                       unsigned ElemSz, bool isTailCall,
    5840             :                                       MachinePointerInfo DstPtrInfo,
    5841             :                                       MachinePointerInfo SrcPtrInfo) {
    5842             :   // Emit a library call.
    5843             :   TargetLowering::ArgListTy Args;
    5844             :   TargetLowering::ArgListEntry Entry;
    5845           6 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5846           6 :   Entry.Node = Dst;
    5847           6 :   Args.push_back(Entry);
    5848             : 
    5849           6 :   Entry.Node = Src;
    5850           6 :   Args.push_back(Entry);
    5851             : 
    5852           6 :   Entry.Ty = SizeTy;
    5853           6 :   Entry.Node = Size;
    5854           6 :   Args.push_back(Entry);
    5855             : 
    5856             :   RTLIB::Libcall LibraryCall =
    5857           6 :       RTLIB::getMEMCPY_ELEMENT_UNORDERED_ATOMIC(ElemSz);
    5858           6 :   if (LibraryCall == RTLIB::UNKNOWN_LIBCALL)
    5859           0 :     report_fatal_error("Unsupported element size");
    5860             : 
    5861           6 :   TargetLowering::CallLoweringInfo CLI(*this);
    5862             :   CLI.setDebugLoc(dl)
    5863           6 :       .setChain(Chain)
    5864           6 :       .setLibCallee(TLI->getLibcallCallingConv(LibraryCall),
    5865           6 :                     Type::getVoidTy(*getContext()),
    5866           6 :                     getExternalSymbol(TLI->getLibcallName(LibraryCall),
    5867             :                                       TLI->getPointerTy(getDataLayout())),
    5868          12 :                     std::move(Args))
    5869             :       .setDiscardResult()
    5870             :       .setTailCall(isTailCall);
    5871             : 
    5872           6 :   std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
    5873           6 :   return CallResult.second;
    5874             : }
    5875             : 
    5876        3563 : SDValue SelectionDAG::getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst,
    5877             :                                  SDValue Src, SDValue Size, unsigned Align,
    5878             :                                  bool isVol, bool isTailCall,
    5879             :                                  MachinePointerInfo DstPtrInfo,
    5880             :                                  MachinePointerInfo SrcPtrInfo) {
    5881             :   assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
    5882             : 
    5883             :   // Check to see if we should lower the memmove to loads and stores first.
    5884             :   // For cases within the target-specified limits, this is the best choice.
    5885             :   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
    5886             :   if (ConstantSize) {
    5887             :     // Memmove with size zero? Just return the original chain.
    5888         168 :     if (ConstantSize->isNullValue())
    5889          27 :       return Chain;
    5890             : 
    5891             :     SDValue Result =
    5892             :       getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
    5893             :                                ConstantSize->getZExtValue(), Align, isVol,
    5894         168 :                                false, DstPtrInfo, SrcPtrInfo);
    5895          84 :     if (Result.getNode())
    5896          27 :       return Result;
    5897             :   }
    5898             : 
    5899             :   // Then check to see if we should lower the memmove with target-specific
    5900             :   // code. If the target chooses to do this, this is the next best.
    5901        3536 :   if (TSI) {
    5902             :     SDValue Result = TSI->EmitTargetCodeForMemmove(
    5903        3536 :         *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
    5904        3536 :     if (Result.getNode())
    5905          48 :       return Result;
    5906             :   }
    5907             : 
    5908        3488 :   checkAddrSpaceIsValidForLibcall(TLI, DstPtrInfo.getAddrSpace());
    5909        3488 :   checkAddrSpaceIsValidForLibcall(TLI, SrcPtrInfo.getAddrSpace());
    5910             : 
    5911             :   // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
    5912             :   // not be safe.  See memcpy above for more details.
    5913             : 
    5914             :   // Emit a library call.
    5915             :   TargetLowering::ArgListTy Args;
    5916             :   TargetLowering::ArgListEntry Entry;
    5917        3488 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5918        3488 :   Entry.Node = Dst; Args.push_back(Entry);
    5919        3488 :   Entry.Node = Src; Args.push_back(Entry);
    5920        3488 :   Entry.Node = Size; Args.push_back(Entry);
    5921             :   // FIXME:  pass in SDLoc
    5922        3488 :   TargetLowering::CallLoweringInfo CLI(*this);
    5923             :   CLI.setDebugLoc(dl)
    5924        3488 :       .setChain(Chain)
    5925        3488 :       .setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
    5926        3488 :                     Dst.getValueType().getTypeForEVT(*getContext()),
    5927        3488 :                     getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
    5928             :                                       TLI->getPointerTy(getDataLayout())),
    5929        6976 :                     std::move(Args))
    5930             :       .setDiscardResult()
    5931             :       .setTailCall(isTailCall);
    5932             : 
    5933        3488 :   std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
    5934        3488 :   return CallResult.second;
    5935             : }
    5936             : 
    5937           6 : SDValue SelectionDAG::getAtomicMemmove(SDValue Chain, const SDLoc &dl,
    5938             :                                        SDValue Dst, unsigned DstAlign,
    5939             :                                        SDValue Src, unsigned SrcAlign,
    5940             :                                        SDValue Size, Type *SizeTy,
    5941             :                                        unsigned ElemSz, bool isTailCall,
    5942             :                                        MachinePointerInfo DstPtrInfo,
    5943             :                                        MachinePointerInfo SrcPtrInfo) {
    5944             :   // Emit a library call.
    5945             :   TargetLowering::ArgListTy Args;
    5946             :   TargetLowering::ArgListEntry Entry;
    5947           6 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5948           6 :   Entry.Node = Dst;
    5949           6 :   Args.push_back(Entry);
    5950             : 
    5951           6 :   Entry.Node = Src;
    5952           6 :   Args.push_back(Entry);
    5953             : 
    5954           6 :   Entry.Ty = SizeTy;
    5955           6 :   Entry.Node = Size;
    5956           6 :   Args.push_back(Entry);
    5957             : 
    5958             :   RTLIB::Libcall LibraryCall =
    5959           6 :       RTLIB::getMEMMOVE_ELEMENT_UNORDERED_ATOMIC(ElemSz);
    5960           6 :   if (LibraryCall == RTLIB::UNKNOWN_LIBCALL)
    5961           0 :     report_fatal_error("Unsupported element size");
    5962             : 
    5963           6 :   TargetLowering::CallLoweringInfo CLI(*this);
    5964             :   CLI.setDebugLoc(dl)
    5965           6 :       .setChain(Chain)
    5966           6 :       .setLibCallee(TLI->getLibcallCallingConv(LibraryCall),
    5967           6 :                     Type::getVoidTy(*getContext()),
    5968           6 :                     getExternalSymbol(TLI->getLibcallName(LibraryCall),
    5969             :                                       TLI->getPointerTy(getDataLayout())),
    5970          12 :                     std::move(Args))
    5971             :       .setDiscardResult()
    5972             :       .setTailCall(isTailCall);
    5973             : 
    5974           6 :   std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
    5975           6 :   return CallResult.second;
    5976             : }
    5977             : 
    5978      155819 : SDValue SelectionDAG::getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst,
    5979             :                                 SDValue Src, SDValue Size, unsigned Align,
    5980             :                                 bool isVol, bool isTailCall,
    5981             :                                 MachinePointerInfo DstPtrInfo) {
    5982             :   assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
    5983             : 
    5984             :   // Check to see if we should lower the memset to stores first.
    5985             :   // For cases within the target-specified limits, this is the best choice.
    5986             :   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
    5987             :   if (ConstantSize) {
    5988             :     // Memset with size zero? Just return the original chain.
    5989      311344 :     if (ConstantSize->isNullValue())
    5990      154648 :       return Chain;
    5991             : 
    5992             :     SDValue Result =
    5993             :       getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
    5994      311328 :                       Align, isVol, DstPtrInfo);
    5995             : 
    5996      155664 :     if (Result.getNode())
    5997      154640 :       return Result;
    5998             :   }
    5999             : 
    6000             :   // Then check to see if we should lower the memset with target-specific
    6001             :   // code. If the target chooses to do this, this is the next best.
    6002        1171 :   if (TSI) {
    6003             :     SDValue Result = TSI->EmitTargetCodeForMemset(
    6004        1171 :         *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
    6005        1171 :     if (Result.getNode())
    6006         174 :       return Result;
    6007             :   }
    6008             : 
    6009         997 :   checkAddrSpaceIsValidForLibcall(TLI, DstPtrInfo.getAddrSpace());
    6010             : 
    6011             :   // Emit a library call.
    6012         997 :   Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext());
    6013             :   TargetLowering::ArgListTy Args;
    6014             :   TargetLowering::ArgListEntry Entry;
    6015         997 :   Entry.Node = Dst; Entry.Ty = IntPtrTy;
    6016         997 :   Args.push_back(Entry);
    6017         997 :   Entry.Node = Src;
    6018        1994 :   Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
    6019         997 :   Args.push_back(Entry);
    6020         997 :   Entry.Node = Size;
    6021         997 :   Entry.Ty = IntPtrTy;
    6022         997 :   Args.push_back(Entry);
    6023             : 
    6024             :   // FIXME: pass in SDLoc
    6025         997 :   TargetLowering::CallLoweringInfo CLI(*this);
    6026             :   CLI.setDebugLoc(dl)
    6027         997 :       .setChain(Chain)
    6028         997 :       .setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
    6029         997 :                     Dst.getValueType().getTypeForEVT(*getContext()),
    6030         997 :                     getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
    6031             :                                       TLI->getPointerTy(getDataLayout())),
    6032        1994 :                     std::move(Args))
    6033             :       .setDiscardResult()
    6034             :       .setTailCall(isTailCall);
    6035             : 
    6036         997 :   std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
    6037         997 :   return CallResult.second;
    6038             : }
    6039             : 
    6040           6 : SDValue SelectionDAG::getAtomicMemset(SDValue Chain, const SDLoc &dl,
    6041             :                                       SDValue Dst, unsigned DstAlign,
    6042             :                                       SDValue Value, SDValue Size, Type *SizeTy,
    6043             :                                       unsigned ElemSz, bool isTailCall,
    6044             :                                       MachinePointerInfo DstPtrInfo) {
    6045             :   // Emit a library call.
    6046             :   TargetLowering::ArgListTy Args;
    6047             :   TargetLowering::ArgListEntry Entry;
    6048           6 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    6049           6 :   Entry.Node = Dst;
    6050           6 :   Args.push_back(Entry);
    6051             : 
    6052           6 :   Entry.Ty = Type::getInt8Ty(*getContext());
    6053           6 :   Entry.Node = Value;
    6054           6 :   Args.push_back(Entry);
    6055             : 
    6056           6 :   Entry.Ty = SizeTy;
    6057           6 :   Entry.Node = Size;
    6058           6 :   Args.push_back(Entry);
    6059             : 
    6060             :   RTLIB::Libcall LibraryCall =
    6061           6 :       RTLIB::getMEMSET_ELEMENT_UNORDERED_ATOMIC(ElemSz);
    6062           6 :   if (LibraryCall == RTLIB::UNKNOWN_LIBCALL)
    6063           0 :     report_fatal_error("Unsupported element size");
    6064             : 
    6065           6 :   TargetLowering::CallLoweringInfo CLI(*this);
    6066             :   CLI.setDebugLoc(dl)
    6067           6 :       .setChain(Chain)
    6068           6 :       .setLibCallee(TLI->getLibcallCallingConv(LibraryCall),
    6069           6 :                     Type::getVoidTy(*getContext()),
    6070           6 :                     getExternalSymbol(TLI->getLibcallName(LibraryCall),
    6071             :                                       TLI->getPointerTy(getDataLayout())),
    6072          12 :                     std::move(Args))
    6073             :       .setDiscardResult()
    6074             :       .setTailCall(isTailCall);
    6075             : 
    6076           6 :   std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
    6077           6 :   return CallResult.second;
    6078             : }
    6079             : 
    6080       37986 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6081             :                                 SDVTList VTList, ArrayRef<SDValue> Ops,
    6082             :                                 MachineMemOperand *MMO) {
    6083             :   FoldingSetNodeID ID;
    6084       37986 :   ID.AddInteger(MemVT.getRawBits());
    6085       37986 :   AddNodeIDNode(ID, Opcode, VTList, Ops);
    6086       37986 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6087       37986 :   void* IP = nullptr;
    6088       37986 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6089           0 :     cast<AtomicSDNode>(E)->refineAlignment(MMO);
    6090           0 :     return SDValue(E, 0);
    6091             :   }
    6092             : 
    6093       75972 :   auto *N = newSDNode<AtomicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),
    6094             :                                     VTList, MemVT, MMO);
    6095       37986 :   createOperands(N, Ops);
    6096             : 
    6097       37986 :   CSEMap.InsertNode(N, IP);
    6098       37986 :   InsertNode(N);
    6099       37986 :   return SDValue(N, 0);
    6100             : }
    6101             : 
    6102        6093 : SDValue SelectionDAG::getAtomicCmpSwap(
    6103             :     unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain,
    6104             :     SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
    6105             :     unsigned Alignment, AtomicOrdering SuccessOrdering,
    6106             :     AtomicOrdering FailureOrdering, SyncScope::ID SSID) {
    6107             :   assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
    6108             :          Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
    6109             :   assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
    6110             : 
    6111        6093 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6112        6093 :     Alignment = getEVTAlignment(MemVT);
    6113             : 
    6114        6093 :   MachineFunction &MF = getMachineFunction();
    6115             : 
    6116             :   // FIXME: Volatile isn't really correct; we should keep track of atomic
    6117             :   // orderings in the memoperand.
    6118             :   auto Flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad |
    6119             :                MachineMemOperand::MOStore;
    6120             :   MachineMemOperand *MMO =
    6121       12186 :     MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
    6122        6093 :                             AAMDNodes(), nullptr, SSID, SuccessOrdering,
    6123             :                             FailureOrdering);
    6124             : 
    6125        6093 :   return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO);
    6126             : }
    6127             : 
    6128       17725 : SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl,
    6129             :                                        EVT MemVT, SDVTList VTs, SDValue Chain,
    6130             :                                        SDValue Ptr, SDValue Cmp, SDValue Swp,
    6131             :                                        MachineMemOperand *MMO) {
    6132             :   assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
    6133             :          Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
    6134             :   assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
    6135             : 
    6136       17725 :   SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
    6137       17725 :   return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
    6138             : }
    6139             : 
    6140       10348 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6141             :                                 SDValue Chain, SDValue Ptr, SDValue Val,
    6142             :                                 const Value *PtrVal, unsigned Alignment,
    6143             :                                 AtomicOrdering Ordering,
    6144             :                                 SyncScope::ID SSID) {
    6145       10348 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6146        8545 :     Alignment = getEVTAlignment(MemVT);
    6147             : 
    6148       10348 :   MachineFunction &MF = getMachineFunction();
    6149             :   // An atomic store does not load. An atomic load does not store.
    6150             :   // (An atomicrmw obviously both loads and stores.)
    6151             :   // For now, atomics are considered to be volatile always, and they are
    6152             :   // chained as such.
    6153             :   // FIXME: Volatile isn't really correct; we should keep track of atomic
    6154             :   // orderings in the memoperand.
    6155             :   auto Flags = MachineMemOperand::MOVolatile;
    6156       10348 :   if (Opcode != ISD::ATOMIC_STORE)
    6157             :     Flags |= MachineMemOperand::MOLoad;
    6158       10348 :   if (Opcode != ISD::ATOMIC_LOAD)
    6159             :     Flags |= MachineMemOperand::MOStore;
    6160             : 
    6161             :   MachineMemOperand *MMO =
    6162       31044 :     MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
    6163       10348 :                             MemVT.getStoreSize(), Alignment, AAMDNodes(),
    6164             :                             nullptr, SSID, Ordering);
    6165             : 
    6166       10348 :   return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
    6167             : }
    6168             : 
    6169       13377 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6170             :                                 SDValue Chain, SDValue Ptr, SDValue Val,
    6171             :                                 MachineMemOperand *MMO) {
    6172             :   assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
    6173             :           Opcode == ISD::ATOMIC_LOAD_SUB ||
    6174             :           Opcode == ISD::ATOMIC_LOAD_AND ||
    6175             :           Opcode == ISD::ATOMIC_LOAD_CLR ||
    6176             :           Opcode == ISD::ATOMIC_LOAD_OR ||
    6177             :           Opcode == ISD::ATOMIC_LOAD_XOR ||
    6178             :           Opcode == ISD::ATOMIC_LOAD_NAND ||
    6179             :           Opcode == ISD::ATOMIC_LOAD_MIN ||
    6180             :           Opcode == ISD::ATOMIC_LOAD_MAX ||
    6181             :           Opcode == ISD::ATOMIC_LOAD_UMIN ||
    6182             :           Opcode == ISD::ATOMIC_LOAD_UMAX ||
    6183             :           Opcode == ISD::ATOMIC_SWAP ||
    6184             :           Opcode == ISD::ATOMIC_STORE) &&
    6185             :          "Invalid Atomic Op");
    6186             : 
    6187       13377 :   EVT VT = Val.getValueType();
    6188             : 
    6189        1925 :   SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
    6190       13377 :                                                getVTList(VT, MVT::Other);
    6191       13377 :   SDValue Ops[] = {Chain, Ptr, Val};
    6192       13377 :   return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
    6193             : }
    6194             : 
    6195        6884 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6196             :                                 EVT VT, SDValue Chain, SDValue Ptr,
    6197             :                                 MachineMemOperand *MMO) {
    6198             :   assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
    6199             : 
    6200        6884 :   SDVTList VTs = getVTList(VT, MVT::Other);
    6201        6884 :   SDValue Ops[] = {Chain, Ptr};
    6202        6884 :   return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
    6203             : }
    6204             : 
    6205             : /// getMergeValues - Create a MERGE_VALUES node from the given operands.
    6206      418347 : SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, const SDLoc &dl) {
    6207      418347 :   if (Ops.size() == 1)
    6208      349142 :     return Ops[0];
    6209             : 
    6210             :   SmallVector<EVT, 4> VTs;
    6211             :   VTs.reserve(Ops.size());
    6212      209854 :   for (unsigned i = 0; i < Ops.size(); ++i)
    6213      281298 :     VTs.push_back(Ops[i].getValueType());
    6214       69205 :   return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
    6215             : }
    6216             : 
    6217        9724 : SDValue SelectionDAG::getMemIntrinsicNode(
    6218             :     unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
    6219             :     EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align,
    6220             :     MachineMemOperand::Flags Flags, unsigned Size) {
    6221        9724 :   if (Align == 0)  // Ensure that codegen never sees alignment 0
    6222        4743 :     Align = getEVTAlignment(MemVT);
    6223             : 
    6224        9724 :   if (!Size)
    6225             :     Size = MemVT.getStoreSize();
    6226             : 
    6227        9724 :   MachineFunction &MF = getMachineFunction();
    6228             :   MachineMemOperand *MMO =
    6229        9724 :     MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
    6230             : 
    6231        9724 :   return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
    6232             : }
    6233             : 
    6234       22165 : SDValue SelectionDAG::getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl,
    6235             :                                           SDVTList VTList,
    6236             :                                           ArrayRef<SDValue> Ops, EVT MemVT,
    6237             :                                           MachineMemOperand *MMO) {
    6238             :   assert((Opcode == ISD::INTRINSIC_VOID ||
    6239             :           Opcode == ISD::INTRINSIC_W_CHAIN ||
    6240             :           Opcode == ISD::PREFETCH ||
    6241             :           Opcode == ISD::LIFETIME_START ||
    6242             :           Opcode == ISD::LIFETIME_END ||
    6243             :           ((int)Opcode <= std::numeric_limits<int>::max() &&
    6244             :            (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
    6245             :          "Opcode is not a memory-accessing opcode!");
    6246             : 
    6247             :   // Memoize the node unless it returns a flag.
    6248             :   MemIntrinsicSDNode *N;
    6249       22165 :   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
    6250             :     FoldingSetNodeID ID;
    6251       16389 :     AddNodeIDNode(ID, Opcode, VTList, Ops);
    6252       32778 :     ID.AddInteger(getSyntheticNodeSubclassData<MemIntrinsicSDNode>(
    6253             :         Opcode, dl.getIROrder(), VTList, MemVT, MMO));
    6254       16389 :     ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6255       16389 :     void *IP = nullptr;
    6256       16389 :     if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6257           0 :       cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
    6258           0 :       return SDValue(E, 0);
    6259             :     }
    6260             : 
    6261       32778 :     N = newSDNode<MemIntrinsicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),
    6262             :                                       VTList, MemVT, MMO);
    6263       16389 :     createOperands(N, Ops);
    6264             : 
    6265       16389 :   CSEMap.InsertNode(N, IP);
    6266             :   } else {
    6267       11552 :     N = newSDNode<MemIntrinsicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),
    6268             :                                       VTList, MemVT, MMO);
    6269        5776 :     createOperands(N, Ops);
    6270             :   }
    6271       22165 :   InsertNode(N);
    6272       22165 :   return SDValue(N, 0);
    6273             : }
    6274             : 
    6275             : /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
    6276             : /// MachinePointerInfo record from it.  This is particularly useful because the
    6277             : /// code generator has many cases where it doesn't bother passing in a
    6278             : /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
    6279           0 : static MachinePointerInfo InferPointerInfo(const MachinePointerInfo &Info,
    6280             :                                            SelectionDAG &DAG, SDValue Ptr,
    6281             :                                            int64_t Offset = 0) {
    6282             :   // If this is FI+Offset, we can model it.
    6283             :   if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
    6284             :     return MachinePointerInfo::getFixedStack(DAG.getMachineFunction(),
    6285           0 :                                              FI->getIndex(), Offset);
    6286             : 
    6287             :   // If this is (FI+Offset1)+Offset2, we can model it.
    6288             :   if (Ptr.getOpcode() != ISD::ADD ||
    6289           0 :       !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
    6290             :       !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
    6291           0 :     return Info;
    6292             : 
    6293           0 :   int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
    6294             :   return MachinePointerInfo::getFixedStack(
    6295             :       DAG.getMachineFunction(), FI,
    6296           0 :       Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
    6297             : }
    6298             : 
    6299             : /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
    6300             : /// MachinePointerInfo record from it.  This is particularly useful because the
    6301             : /// code generator has many cases where it doesn't bother passing in a
    6302             : /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
    6303           0 : static MachinePointerInfo InferPointerInfo(const MachinePointerInfo &Info,
    6304             :                                            SelectionDAG &DAG, SDValue Ptr,
    6305             :                                            SDValue OffsetOp) {
    6306             :   // If the 'Offset' value isn't a constant, we can't handle this.
    6307             :   if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
    6308           0 :     return InferPointerInfo(Info, DAG, Ptr, OffsetNode->getSExtValue());
    6309           0 :   if (OffsetOp.isUndef())
    6310           0 :     return InferPointerInfo(Info, DAG, Ptr);
    6311           0 :   return Info;
    6312             : }
    6313             : 
    6314     3011006 : SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
    6315             :                               EVT VT, const SDLoc &dl, SDValue Chain,
    6316             :                               SDValue Ptr, SDValue Offset,
    6317             :                               MachinePointerInfo PtrInfo, EVT MemVT,
    6318             :                               unsigned Alignment,
    6319             :                               MachineMemOperand::Flags MMOFlags,
    6320             :                               const AAMDNodes &AAInfo, const MDNode *Ranges) {
    6321             :   assert(Chain.getValueType() == MVT::Other &&
    6322             :         "Invalid chain type");
    6323     3011006 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6324      124014 :     Alignment = getEVTAlignment(MemVT);
    6325             : 
    6326             :   MMOFlags |= MachineMemOperand::MOLoad;
    6327             :   assert((MMOFlags & MachineMemOperand::MOStore) == 0);
    6328             :   // If we don't have a PtrInfo, infer the trivial frame index case to simplify
    6329             :   // clients.
    6330     3011006 :   if (PtrInfo.V.isNull())
    6331       17409 :     PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr, Offset);
    6332             : 
    6333     3011006 :   MachineFunction &MF = getMachineFunction();
    6334     3011006 :   MachineMemOperand *MMO = MF.getMachineMemOperand(
    6335             :       PtrInfo, MMOFlags, MemVT.getStoreSize(), Alignment, AAInfo, Ranges);
    6336     3011006 :   return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
    6337             : }
    6338             : 
    6339     3354206 : SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
    6340             :                               EVT VT, const SDLoc &dl, SDValue Chain,
    6341             :                               SDValue Ptr, SDValue Offset, EVT MemVT,
    6342             :                               MachineMemOperand *MMO) {
    6343     3361888 :   if (VT == MemVT) {
    6344     3275924 :     ExtType = ISD::NON_EXTLOAD;
    6345             :   } else if (ExtType == ISD::NON_EXTLOAD) {
    6346             :     assert(VT == MemVT && "Non-extending load from different memory type!");
    6347             :   } else {
    6348             :     // Extending load.
    6349             :     assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
    6350             :            "Should only be an extending load, not truncating!");
    6351             :     assert(VT.isInteger() == MemVT.isInteger() &&
    6352             :            "Cannot convert from FP to Int or Int -> FP!");
    6353             :     assert(VT.isVector() == MemVT.isVector() &&
    6354             :            "Cannot use an ext load to convert to or from a vector!");
    6355             :     assert((!VT.isVector() ||
    6356             :             VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
    6357             :            "Cannot use an ext load to change the number of vector elements!");
    6358             :   }
    6359             : 
    6360     3354206 :   bool Indexed = AM != ISD::UNINDEXED;
    6361             :   assert((Indexed || Offset.isUndef()) && "Unindexed load with an offset!");
    6362             : 
    6363             :   SDVTList VTs = Indexed ?
    6364     3354206 :     getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
    6365     3354206 :   SDValue Ops[] = { Chain, Ptr, Offset };
    6366             :   FoldingSetNodeID ID;
    6367     3354206 :   AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
    6368     3354206 :   ID.AddInteger(MemVT.getRawBits());
    6369     6708412 :   ID.AddInteger(getSyntheticNodeSubclassData<LoadSDNode>(
    6370             :       dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO));
    6371     6708412 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6372     3354206 :   void *IP = nullptr;
    6373     3354206 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6374      160206 :     cast<LoadSDNode>(E)->refineAlignment(MMO);
    6375      160206 :     return SDValue(E, 0);
    6376             :   }
    6377     6388000 :   auto *N = newSDNode<LoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
    6378             :                                   ExtType, MemVT, MMO);
    6379     3194000 :   createOperands(N, Ops);
    6380             : 
    6381     3194000 :   CSEMap.InsertNode(N, IP);
    6382     3194000 :   InsertNode(N);
    6383             :   SDValue V(N, 0);
    6384             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6385     3194000 :   return V;
    6386             : }
    6387             : 
    6388     2823563 : SDValue SelectionDAG::getLoad(EVT VT, const SDLoc &dl, SDValue Chain,
    6389             :                               SDValue Ptr, MachinePointerInfo PtrInfo,
    6390             :                               unsigned Alignment,
    6391             :                               MachineMemOperand::Flags MMOFlags,
    6392             :                               const AAMDNodes &AAInfo, const MDNode *Ranges) {
    6393     5647126 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6394             :   return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
    6395     2823563 :                  PtrInfo, VT, Alignment, MMOFlags, AAInfo, Ranges);
    6396             : }
    6397             : 
    6398      278239 : SDValue SelectionDAG::getLoad(EVT VT, const SDLoc &dl, SDValue Chain,
    6399             :                               SDValue Ptr, MachineMemOperand *MMO) {
    6400      556478 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6401             :   return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
    6402      278239 :                  VT, MMO);
    6403             : }
    6404             : 
    6405      165116 : SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl,
    6406             :                                  EVT VT, SDValue Chain, SDValue Ptr,
    6407             :                                  MachinePointerInfo PtrInfo, EVT MemVT,
    6408             :                                  unsigned Alignment,
    6409             :                                  MachineMemOperand::Flags MMOFlags,
    6410             :                                  const AAMDNodes &AAInfo) {
    6411      330232 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6412             :   return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, PtrInfo,
    6413      165116 :                  MemVT, Alignment, MMOFlags, AAInfo);
    6414             : }
    6415             : 
    6416       63693 : SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl,
    6417             :                                  EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT,
    6418             :                                  MachineMemOperand *MMO) {
    6419      127386 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6420             :   return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
    6421       63693 :                  MemVT, MMO);
    6422             : }
    6423             : 
    6424         566 : SDValue SelectionDAG::getIndexedLoad(SDValue OrigLoad, const SDLoc &dl,
    6425             :                                      SDValue Base, SDValue Offset,
    6426             :                                      ISD::MemIndexedMode AM) {
    6427             :   LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
    6428             :   assert(LD->getOffset().isUndef() && "Load is already a indexed load!");
    6429             :   // Don't propagate the invariant or dereferenceable flags.
    6430             :   auto MMOFlags =
    6431         566 :       LD->getMemOperand()->getFlags() &
    6432             :       ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
    6433             :   return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
    6434         566 :                  LD->getChain(), Base, Offset, LD->getPointerInfo(),
    6435             :                  LD->getMemoryVT(), LD->getAlignment(), MMOFlags,
    6436         566 :                  LD->getAAInfo());
    6437             : }
    6438             : 
    6439     2921643 : SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6440             :                                SDValue Ptr, MachinePointerInfo PtrInfo,
    6441             :                                unsigned Alignment,
    6442             :                                MachineMemOperand::Flags MMOFlags,
    6443             :                                const AAMDNodes &AAInfo) {
    6444             :   assert(Chain.getValueType() == MVT::Other && "Invalid chain type");
    6445     2921643 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6446      213440 :     Alignment = getEVTAlignment(Val.getValueType());
    6447             : 
    6448             :   MMOFlags |= MachineMemOperand::MOStore;
    6449             :   assert((MMOFlags & MachineMemOperand::MOLoad) == 0);
    6450             : 
    6451     2921643 :   if (PtrInfo.V.isNull())
    6452       21727 :     PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr);
    6453             : 
    6454     2921643 :   MachineFunction &MF = getMachineFunction();
    6455     2921643 :   MachineMemOperand *MMO = MF.getMachineMemOperand(
    6456     2921643 :       PtrInfo, MMOFlags, Val.getValueType().getStoreSize(), Alignment, AAInfo);
    6457     2921643 :   return getStore(Chain, dl, Val, Ptr, MMO);
    6458             : }
    6459             : 
    6460     3511405 : SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6461             :                                SDValue Ptr, MachineMemOperand *MMO) {
    6462             :   assert(Chain.getValueType() == MVT::Other &&
    6463             :         "Invalid chain type");
    6464     7022810 :   EVT VT = Val.getValueType();
    6465     3511405 :   SDVTList VTs = getVTList(MVT::Other);
    6466     7022810 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6467     3511405 :   SDValue Ops[] = { Chain, Val, Ptr, Undef };
    6468             :   FoldingSetNodeID ID;
    6469     3511405 :   AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
    6470     3511405 :   ID.AddInteger(VT.getRawBits());
    6471     3511405 :   ID.AddInteger(getSyntheticNodeSubclassData<StoreSDNode>(
    6472     3511405 :       dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO));
    6473     7022810 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6474     3511405 :   void *IP = nullptr;
    6475     3511405 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6476        8581 :     cast<StoreSDNode>(E)->refineAlignment(MMO);
    6477        8581 :     return SDValue(E, 0);
    6478             :   }
    6479     7005648 :   auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6480     3502824 :                                    ISD::UNINDEXED, false, VT, MMO);
    6481     3502824 :   createOperands(N, Ops);
    6482             : 
    6483     3502824 :   CSEMap.InsertNode(N, IP);
    6484     3502824 :   InsertNode(N);
    6485             :   SDValue V(N, 0);
    6486             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6487     3502824 :   return V;
    6488             : }
    6489             : 
    6490      156093 : SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6491             :                                     SDValue Ptr, MachinePointerInfo PtrInfo,
    6492             :                                     EVT SVT, unsigned Alignment,
    6493             :                                     MachineMemOperand::Flags MMOFlags,
    6494             :                                     const AAMDNodes &AAInfo) {
    6495             :   assert(Chain.getValueType() == MVT::Other &&
    6496             :         "Invalid chain type");
    6497      156093 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6498         705 :     Alignment = getEVTAlignment(SVT);
    6499             : 
    6500             :   MMOFlags |= MachineMemOperand::MOStore;
    6501             :   assert((MMOFlags & MachineMemOperand::MOLoad) == 0);
    6502             : 
    6503      156093 :   if (PtrInfo.V.isNull())
    6504        7333 :     PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr);
    6505             : 
    6506      156093 :   MachineFunction &MF = getMachineFunction();
    6507      156093 :   MachineMemOperand *MMO = MF.getMachineMemOperand(
    6508             :       PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment, AAInfo);
    6509      156093 :   return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
    6510             : }
    6511             : 
    6512      173634 : SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6513             :                                     SDValue Ptr, EVT SVT,
    6514             :                                     MachineMemOperand *MMO) {
    6515      173634 :   EVT VT = Val.getValueType();
    6516             : 
    6517             :   assert(Chain.getValueType() == MVT::Other &&
    6518             :         "Invalid chain type");
    6519      174164 :   if (VT == SVT)
    6520      147278 :     return getStore(Chain, dl, Val, Ptr, MMO);
    6521             : 
    6522             :   assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
    6523             :          "Should only be a truncating store, not extending!");
    6524             :   assert(VT.isInteger() == SVT.isInteger() &&
    6525             :          "Can't do FP-INT conversion!");
    6526             :   assert(VT.isVector() == SVT.isVector() &&
    6527             :          "Cannot use trunc store to convert to or from a vector!");
    6528             :   assert((!VT.isVector() ||
    6529             :           VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
    6530             :          "Cannot use trunc store to change the number of vector elements!");
    6531             : 
    6532       26356 :   SDVTList VTs = getVTList(MVT::Other);
    6533       52712 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6534       26356 :   SDValue Ops[] = { Chain, Val, Ptr, Undef };
    6535             :   FoldingSetNodeID ID;
    6536       26356 :   AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
    6537       26356 :   ID.AddInteger(SVT.getRawBits());
    6538       26356 :   ID.AddInteger(getSyntheticNodeSubclassData<StoreSDNode>(
    6539       26356 :       dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO));
    6540       52712 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6541       26356 :   void *IP = nullptr;
    6542       26356 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6543         617 :     cast<StoreSDNode>(E)->refineAlignment(MMO);
    6544         617 :     return SDValue(E, 0);
    6545             :   }
    6546       51478 :   auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6547       25739 :                                    ISD::UNINDEXED, true, SVT, MMO);
    6548       25739 :   createOperands(N, Ops);
    6549             : 
    6550       25739 :   CSEMap.InsertNode(N, IP);
    6551       25739 :   InsertNode(N);
    6552             :   SDValue V(N, 0);
    6553             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6554       25739 :   return V;
    6555             : }
    6556             : 
    6557         310 : SDValue SelectionDAG::getIndexedStore(SDValue OrigStore, const SDLoc &dl,
    6558             :                                       SDValue Base, SDValue Offset,
    6559             :                                       ISD::MemIndexedMode AM) {
    6560             :   StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
    6561             :   assert(ST->getOffset().isUndef() && "Store is already a indexed store!");
    6562         620 :   SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
    6563         310 :   SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
    6564             :   FoldingSetNodeID ID;
    6565         310 :   AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
    6566         310 :   ID.AddInteger(ST->getMemoryVT().getRawBits());
    6567         310 :   ID.AddInteger(ST->getRawSubclassData());
    6568         620 :   ID.AddInteger(ST->getPointerInfo().getAddrSpace());
    6569         310 :   void *IP = nullptr;
    6570         310 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
    6571           0 :     return SDValue(E, 0);
    6572             : 
    6573         620 :   auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
    6574         310 :                                    ST->isTruncatingStore(), ST->getMemoryVT(),
    6575         310 :                                    ST->getMemOperand());
    6576         310 :   createOperands(N, Ops);
    6577             : 
    6578         310 :   CSEMap.InsertNode(N, IP);
    6579         310 :   InsertNode(N);
    6580             :   SDValue V(N, 0);
    6581             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6582         310 :   return V;
    6583             : }
    6584             : 
    6585         612 : SDValue SelectionDAG::getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain,
    6586             :                                     SDValue Ptr, SDValue Mask, SDValue PassThru,
    6587             :                                     EVT MemVT, MachineMemOperand *MMO,
    6588             :                                     ISD::LoadExtType ExtTy, bool isExpanding) {
    6589         612 :   SDVTList VTs = getVTList(VT, MVT::Other);
    6590         612 :   SDValue Ops[] = { Chain, Ptr, Mask, PassThru };
    6591             :   FoldingSetNodeID ID;
    6592         612 :   AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
    6593         612 :   ID.AddInteger(VT.getRawBits());
    6594        1224 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedLoadSDNode>(
    6595             :       dl.getIROrder(), VTs, ExtTy, isExpanding, MemVT, MMO));
    6596        1224 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6597         612 :   void *IP = nullptr;
    6598         612 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6599           0 :     cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
    6600           0 :     return SDValue(E, 0);
    6601             :   }
    6602        1224 :   auto *N = newSDNode<MaskedLoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6603             :                                         ExtTy, isExpanding, MemVT, MMO);
    6604         612 :   createOperands(N, Ops);
    6605             : 
    6606         612 :   CSEMap.InsertNode(N, IP);
    6607         612 :   InsertNode(N);
    6608             :   SDValue V(N, 0);
    6609             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6610         612 :   return V;
    6611             : }
    6612             : 
    6613         371 : SDValue SelectionDAG::getMaskedStore(SDValue Chain, const SDLoc &dl,
    6614             :                                      SDValue Val, SDValue Ptr, SDValue Mask,
    6615             :                                      EVT MemVT, MachineMemOperand *MMO,
    6616             :                                      bool IsTruncating, bool IsCompressing) {
    6617             :   assert(Chain.getValueType() == MVT::Other &&
    6618             :         "Invalid chain type");
    6619         371 :   EVT VT = Val.getValueType();
    6620         371 :   SDVTList VTs = getVTList(MVT::Other);
    6621         371 :   SDValue Ops[] = { Chain, Val, Ptr, Mask };
    6622             :   FoldingSetNodeID ID;
    6623         371 :   AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
    6624         371 :   ID.AddInteger(VT.getRawBits());
    6625         742 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedStoreSDNode>(
    6626             :       dl.getIROrder(), VTs, IsTruncating, IsCompressing, MemVT, MMO));
    6627         742 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6628         371 :   void *IP = nullptr;
    6629         371 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6630           0 :     cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
    6631           0 :     return SDValue(E, 0);
    6632             :   }
    6633         742 :   auto *N = newSDNode<MaskedStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6634             :                                          IsTruncating, IsCompressing, MemVT, MMO);
    6635         371 :   createOperands(N, Ops);
    6636             : 
    6637         371 :   CSEMap.InsertNode(N, IP);
    6638         371 :   InsertNode(N);
    6639             :   SDValue V(N, 0);
    6640             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6641         371 :   return V;
    6642             : }
    6643             : 
    6644         473 : SDValue SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, const SDLoc &dl,
    6645             :                                       ArrayRef<SDValue> Ops,
    6646             :                                       MachineMemOperand *MMO) {
    6647             :   assert(Ops.size() == 6 && "Incompatible number of operands");
    6648             : 
    6649             :   FoldingSetNodeID ID;
    6650         473 :   AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
    6651         473 :   ID.AddInteger(VT.getRawBits());
    6652         946 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedGatherSDNode>(
    6653             :       dl.getIROrder(), VTs, VT, MMO));
    6654         946 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6655         473 :   void *IP = nullptr;
    6656         473 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6657          10 :     cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
    6658          10 :     return SDValue(E, 0);
    6659             :   }
    6660             : 
    6661         926 :   auto *N = newSDNode<MaskedGatherSDNode>(dl.getIROrder(), dl.getDebugLoc(),
    6662             :                                           VTs, VT, MMO);
    6663         463 :   createOperands(N, Ops);
    6664             : 
    6665             :   assert(N->getPassThru().getValueType() == N->getValueType(0) &&
    6666             :          "Incompatible type of the PassThru value in MaskedGatherSDNode");
    6667             :   assert(N->getMask().getValueType().getVectorNumElements() ==
    6668             :              N->getValueType(0).getVectorNumElements() &&
    6669             :          "Vector width mismatch between mask and data");
    6670             :   assert(N->getIndex().getValueType().getVectorNumElements() >=
    6671             :              N->getValueType(0).getVectorNumElements() &&
    6672             :          "Vector width mismatch between index and data");
    6673             :   assert(isa<ConstantSDNode>(N->getScale()) &&
    6674             :          cast<ConstantSDNode>(N->getScale())->getAPIntValue().isPowerOf2() &&
    6675             :          "Scale should be a constant power of 2");
    6676             : 
    6677         463 :   CSEMap.InsertNode(N, IP);
    6678         463 :   InsertNode(N);
    6679             :   SDValue V(N, 0);
    6680             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6681         463 :   return V;
    6682             : }
    6683             : 
    6684         168 : SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, const SDLoc &dl,
    6685             :                                        ArrayRef<SDValue> Ops,
    6686             :                                        MachineMemOperand *MMO) {
    6687             :   assert(Ops.size() == 6 && "Incompatible number of operands");
    6688             : 
    6689             :   FoldingSetNodeID ID;
    6690         168 :   AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
    6691         168 :   ID.AddInteger(VT.getRawBits());
    6692         336 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedScatterSDNode>(
    6693             :       dl.getIROrder(), VTs, VT, MMO));
    6694         336 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6695         168 :   void *IP = nullptr;
    6696         168 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6697           0 :     cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
    6698           0 :     return SDValue(E, 0);
    6699             :   }
    6700         336 :   auto *N = newSDNode<MaskedScatterSDNode>(dl.getIROrder(), dl.getDebugLoc(),
    6701             :                                            VTs, VT, MMO);
    6702         168 :   createOperands(N, Ops);
    6703             : 
    6704             :   assert(N->getMask().getValueType().getVectorNumElements() ==
    6705             :              N->getValue().getValueType().getVectorNumElements() &&
    6706             :          "Vector width mismatch between mask and data");
    6707             :   assert(N->getIndex().getValueType().getVectorNumElements() >=
    6708             :              N->getValue().getValueType().getVectorNumElements() &&
    6709             :          "Vector width mismatch between index and data");
    6710             :   assert(isa<ConstantSDNode>(N->getScale()) &&
    6711             :          cast<ConstantSDNode>(N->getScale())->getAPIntValue().isPowerOf2() &&
    6712             :          "Scale should be a constant power of 2");
    6713             : 
    6714         168 :   CSEMap.InsertNode(N, IP);
    6715         168 :   InsertNode(N);
    6716             :   SDValue V(N, 0);
    6717             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6718         168 :   return V;
    6719             : }
    6720             : 
    6721         257 : SDValue SelectionDAG::getVAArg(EVT VT, const SDLoc &dl, SDValue Chain,
    6722             :                                SDValue Ptr, SDValue SV, unsigned Align) {
    6723         257 :   SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
    6724         257 :   return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
    6725             : }
    6726             : 
    6727        6829 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    6728             :                               ArrayRef<SDUse> Ops) {
    6729        6829 :   switch (Ops.size()) {
    6730           0 :   case 0: return getNode(Opcode, DL, VT);
    6731          30 :   case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
    6732        3711 :   case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
    6733          56 :   case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
    6734             :   default: break;
    6735             :   }
    6736             : 
    6737             :   // Copy from an SDUse array into an SDValue array for use with
    6738             :   // the regular getNode logic.
    6739             :   SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
    6740        3032 :   return getNode(Opcode, DL, VT, NewOps);
    6741             : }
    6742             : 
    6743    12622618 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    6744             :                               ArrayRef<SDValue> Ops, const SDNodeFlags Flags) {
    6745    12622618 :   unsigned NumOps = Ops.size();
    6746    12622618 :   switch (NumOps) {
    6747           0 :   case 0: return getNode(Opcode, DL, VT);
    6748     8638177 :   case 1: return getNode(Opcode, DL, VT, Ops[0], Flags);
    6749     4531962 :   case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Flags);
    6750     1027160 :   case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2], Flags);
    6751             :   default: break;
    6752             :   }
    6753             : 
    6754     1204880 :   switch (Opcode) {
    6755             :   default: break;
    6756        8332 :   case ISD::CONCAT_VECTORS:
    6757             :     // Attempt to fold CONCAT_VECTORS into BUILD_VECTOR or UNDEF.
    6758        8332 :     if (SDValue V = FoldCONCAT_VECTORS(DL, VT, Ops, *this))
    6759         557 :       return V;
    6760        7775 :     break;
    6761             :   case ISD::SELECT_CC:
    6762             :     assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
    6763             :     assert(Ops[0].getValueType() == Ops[1].getValueType() &&
    6764             :            "LHS and RHS of condition must have same type!");
    6765             :     assert(Ops[2].getValueType() == Ops[3].getValueType() &&
    6766             :            "True and False arms of SelectCC must have same type!");
    6767             :     assert(Ops[2].getValueType() == VT &&
    6768             :            "select_cc node must be of same type as true and false value!");
    6769             :     break;
    6770             :   case ISD::BR_CC:
    6771             :     assert(NumOps == 5 && "BR_CC takes 5 operands!");
    6772             :     assert(Ops[2].getValueType() == Ops[3].getValueType() &&
    6773             :            "LHS/RHS of comparison should match types!");
    6774             :     break;
    6775             :   }
    6776             : 
    6777             :   // Memoize nodes.
    6778             :   SDNode *N;
    6779     1204323 :   SDVTList VTs = getVTList(VT);
    6780             : 
    6781     1204323 :   if (VT != MVT::Glue) {
    6782             :     FoldingSetNodeID ID;
    6783     1204323 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    6784     1204324 :     void *IP = nullptr;
    6785             : 
    6786     1204324 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    6787      224236 :       return SDValue(E, 0);
    6788             : 
    6789     1960176 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    6790      980088 :     createOperands(N, Ops);
    6791             : 
    6792      980088 :     CSEMap.InsertNode(N, IP);
    6793             :   } else {
    6794           0 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    6795           0 :     createOperands(N, Ops);
    6796             :   }
    6797             : 
    6798      980088 :   InsertNode(N);
    6799             :   SDValue V(N, 0);
    6800             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6801      980088 :   return V;
    6802             : }
    6803             : 
    6804       18878 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL,
    6805             :                               ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
    6806       18878 :   return getNode(Opcode, DL, getVTList(ResultTys), Ops);
    6807             : }
    6808             : 
    6809    12931892 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6810             :                               ArrayRef<SDValue> Ops) {
    6811    12931892 :   if (VTList.NumVTs == 1)
    6812     3585633 :     return getNode(Opcode, DL, VTList.VTs[0], Ops);
    6813             : 
    6814             : #if 0
    6815             :   switch (Opcode) {
    6816             :   // FIXME: figure out how to safely handle things like
    6817             :   // int foo(int x) { return 1 << (x & 255); }
    6818             :   // int bar() { return foo(256); }
    6819             :   case ISD::SRA_PARTS:
    6820             :   case ISD::SRL_PARTS:
    6821             :   case ISD::SHL_PARTS:
    6822             :     if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
    6823             :         cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
    6824             :       return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
    6825             :     else if (N3.getOpcode() == ISD::AND)
    6826             :       if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
    6827             :         // If the and is only masking out bits that cannot effect the shift,
    6828             :         // eliminate the and.
    6829             :         unsigned NumBits = VT.getScalarSizeInBits()*2;
    6830             :         if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
    6831             :           return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
    6832             :       }
    6833             :     break;
    6834             :   }
    6835             : #endif
    6836             : 
    6837             :   // Memoize the node unless it returns a flag.
    6838             :   SDNode *N;
    6839     9346259 :   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
    6840             :     FoldingSetNodeID ID;
    6841     3288441 :     AddNodeIDNode(ID, Opcode, VTList, Ops);
    6842     3288441 :     void *IP = nullptr;
    6843     3288441 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    6844      146400 :       return SDValue(E, 0);
    6845             : 
    6846     6284082 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList);
    6847     3142041 :     createOperands(N, Ops);
    6848     3142041 :     CSEMap.InsertNode(N, IP);
    6849             :   } else {
    6850    12115636 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList);
    6851     6057819 :     createOperands(N, Ops);
    6852             :   }
    6853     9199859 :   InsertNode(N);
    6854             :   SDValue V(N, 0);
    6855             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6856     9199860 :   return V;
    6857             : }
    6858             : 
    6859           0 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL,
    6860             :                               SDVTList VTList) {
    6861           0 :   return getNode(Opcode, DL, VTList, None);
    6862             : }
    6863             : 
    6864        4628 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6865             :                               SDValue N1) {
    6866        4628 :   SDValue Ops[] = { N1 };
    6867        4628 :   return getNode(Opcode, DL, VTList, Ops);
    6868             : }
    6869             : 
    6870      516899 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6871             :                               SDValue N1, SDValue N2) {
    6872      516899 :   SDValue Ops[] = { N1, N2 };
    6873      516899 :   return getNode(Opcode, DL, VTList, Ops);
    6874             : }
    6875             : 
    6876      230375 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6877             :                               SDValue N1, SDValue N2, SDValue N3) {
    6878      230375 :   SDValue Ops[] = { N1, N2, N3 };
    6879      230375 :   return getNode(Opcode, DL, VTList, Ops);
    6880             : }
    6881             : 
    6882         822 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6883             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4) {
    6884         822 :   SDValue Ops[] = { N1, N2, N3, N4 };
    6885         822 :   return getNode(Opcode, DL, VTList, Ops);
    6886             : }
    6887             : 
    6888         358 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6889             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4,
    6890             :                               SDValue N5) {
    6891         358 :   SDValue Ops[] = { N1, N2, N3, N4, N5 };
    6892         358 :   return getNode(Opcode, DL, VTList, Ops);
    6893             : }
    6894             : 
    6895    98275395 : SDVTList SelectionDAG::getVTList(EVT VT) {
    6896    98275395 :   return makeVTList(SDNode::getValueTypeList(VT), 1);
    6897             : }
    6898             : 
    6899    15485700 : SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
    6900             :   FoldingSetNodeID ID;
    6901    15485700 :   ID.AddInteger(2U);
    6902    15485700 :   ID.AddInteger(VT1.getRawBits());
    6903    15485699 :   ID.AddInteger(VT2.getRawBits());
    6904             : 
    6905    15485698 :   void *IP = nullptr;
    6906             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6907    15485700 :   if (!Result) {
    6908      103105 :     EVT *Array = Allocator.Allocate<EVT>(2);
    6909      103105 :     Array[0] = VT1;
    6910      103105 :     Array[1] = VT2;
    6911      103105 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
    6912      103105 :     VTListMap.InsertNode(Result, IP);
    6913             :   }
    6914    15485700 :   return Result->getSDVTList();
    6915             : }
    6916             : 
    6917      455912 : SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
    6918             :   FoldingSetNodeID ID;
    6919      455912 :   ID.AddInteger(3U);
    6920      455912 :   ID.AddInteger(VT1.getRawBits());
    6921      455912 :   ID.AddInteger(VT2.getRawBits());
    6922      455912 :   ID.AddInteger(VT3.getRawBits());
    6923             : 
    6924      455912 :   void *IP = nullptr;
    6925             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6926      455912 :   if (!Result) {
    6927       10288 :     EVT *Array = Allocator.Allocate<EVT>(3);
    6928       10288 :     Array[0] = VT1;
    6929       10288 :     Array[1] = VT2;
    6930       10288 :     Array[2] = VT3;
    6931       10288 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
    6932       10288 :     VTListMap.InsertNode(Result, IP);
    6933             :   }
    6934      455912 :   return Result->getSDVTList();
    6935             : }
    6936             : 
    6937         124 : SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
    6938             :   FoldingSetNodeID ID;
    6939         124 :   ID.AddInteger(4U);
    6940         124 :   ID.AddInteger(VT1.getRawBits());
    6941         124 :   ID.AddInteger(VT2.getRawBits());
    6942         124 :   ID.AddInteger(VT3.getRawBits());
    6943         124 :   ID.AddInteger(VT4.getRawBits());
    6944             : 
    6945         124 :   void *IP = nullptr;
    6946             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6947         124 :   if (!Result) {
    6948          74 :     EVT *Array = Allocator.Allocate<EVT>(4);
    6949          74 :     Array[0] = VT1;
    6950          74 :     Array[1] = VT2;
    6951          74 :     Array[2] = VT3;
    6952          74 :     Array[3] = VT4;
    6953          74 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
    6954          74 :     VTListMap.InsertNode(Result, IP);
    6955             :   }
    6956         124 :   return Result->getSDVTList();
    6957             : }
    6958             : 
    6959     6330190 : SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
    6960     6330190 :   unsigned NumVTs = VTs.size();
    6961             :   FoldingSetNodeID ID;
    6962     6330190 :   ID.AddInteger(NumVTs);
    6963    17564401 :   for (unsigned index = 0; index < NumVTs; index++) {
    6964    22468422 :     ID.AddInteger(VTs[index].getRawBits());
    6965             :   }
    6966             : 
    6967     6330190 :   void *IP = nullptr;
    6968             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6969     6330190 :   if (!Result) {
    6970       60163 :     EVT *Array = Allocator.Allocate<EVT>(NumVTs);
    6971             :     std::copy(VTs.begin(), VTs.end(), Array);
    6972       60163 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
    6973       60163 :     VTListMap.InsertNode(Result, IP);
    6974             :   }
    6975     6330190 :   return Result->getSDVTList();
    6976             : }
    6977             : 
    6978             : 
    6979             : /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
    6980             : /// specified operands.  If the resultant node already exists in the DAG,
    6981             : /// this does not modify the specified node, instead it returns the node that
    6982             : /// already exists.  If the resultant node does not exist in the DAG, the
    6983             : /// input node is returned.  As a degenerate case, if you specify the same
    6984             : /// input operands as the node already has, the input node is returned.
    6985        2806 : SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
    6986             :   assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
    6987             : 
    6988             :   // Check to see if there is no change.
    6989        2806 :   if (Op == N->getOperand(0)) return N;
    6990             : 
    6991             :   // See if the modified node already exists.
    6992        2806 :   void *InsertPos = nullptr;
    6993        2806 :   if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
    6994             :     return Existing;
    6995             : 
    6996             :   // Nope it doesn't.  Remove the node from its current place in the maps.
    6997        2806 :   if (InsertPos)
    6998        2806 :     if (!RemoveNodeFromCSEMaps(N))
    6999           0 :       InsertPos = nullptr;
    7000             : 
    7001             :   // Now we update the operands.
    7002        2806 :   N->OperandList[0].set(Op);
    7003             : 
    7004        2806 :   updateDivergence(N);
    7005             :   // If this gets put into a CSE map, add it.
    7006        2806 :   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
    7007             :   return N;
    7008             : }
    7009             : 
    7010       54133 : SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
    7011             :   assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
    7012             : 
    7013             :   // Check to see if there is no change.
    7014       85655 :   if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
    7015             :     return N;   // No operands changed, just return the input node.
    7016             : 
    7017             :   // See if the modified node already exists.
    7018       54133 :   void *InsertPos = nullptr;
    7019       54133 :   if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
    7020             :     return Existing;
    7021             : 
    7022             :   // Nope it doesn't.  Remove the node from its current place in the maps.
    7023       53435 :   if (InsertPos)
    7024       53435 :     if (!RemoveNodeFromCSEMaps(N))
    7025           0 :       InsertPos = nullptr;
    7026             : 
    7027             :   // Now we update the operands.
    7028       53435 :   if (N->OperandList[0] != Op1)
    7029             :     N->OperandList[0].set(Op1);
    7030       53435 :   if (N->OperandList[1] != Op2)
    7031       40484 :     N->OperandList[1].set(Op2);
    7032             : 
    7033       53435 :   updateDivergence(N);
    7034             :   // If this gets put into a CSE map, add it.
    7035       53435 :   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
    7036             :   return N;
    7037             : }
    7038             : 
    7039       96687 : SDNode *SelectionDAG::
    7040             : UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
    7041       96687 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7042       96687 :   return UpdateNodeOperands(N, Ops);
    7043             : }
    7044             : 
    7045         753 : SDNode *SelectionDAG::
    7046             : UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
    7047             :                    SDValue Op3, SDValue Op4) {
    7048         753 :   SDValue Ops[] = { Op1, Op2, Op3, Op4 };
    7049         753 :   return UpdateNodeOperands(N, Ops);
    7050             : }
    7051             : 
    7052        2012 : SDNode *SelectionDAG::
    7053             : UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
    7054             :                    SDValue Op3, SDValue Op4, SDValue Op5) {
    7055        2012 :   SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
    7056        2012 :   return UpdateNodeOperands(N, Ops);
    7057             : }
    7058             : 
    7059    12185455 : SDNode *SelectionDAG::
    7060             : UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
    7061    12185455 :   unsigned NumOps = Ops.size();
    7062             :   assert(N->getNumOperands() == NumOps &&
    7063             :          "Update with wrong number of operands");
    7064             : 
    7065             :   // If no operands changed just return the input node.
    7066    24370910 :   if (std::equal(Ops.begin(), Ops.end(), N->op_begin()))
    7067             :     return N;
    7068             : 
    7069             :   // See if the modified node already exists.
    7070      179293 :   void *InsertPos = nullptr;
    7071      179293 :   if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
    7072             :     return Existing;
    7073             : 
    7074             :   // Nope it doesn't.  Remove the node from its current place in the maps.
    7075      179175 :   if (InsertPos)
    7076      155012 :     if (!RemoveNodeFromCSEMaps(N))
    7077           0 :       InsertPos = nullptr;
    7078             : 
    7079             :   // Now we update the operands.
    7080      721454 :   for (unsigned i = 0; i != NumOps; ++i)
    7081     1084558 :     if (N->OperandList[i] != Ops[i])
    7082             :       N->OperandList[i].set(Ops[i]);
    7083             : 
    7084      179175 :   updateDivergence(N);
    7085             :   // If this gets put into a CSE map, add it.
    7086      179175 :   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
    7087             :   return N;
    7088             : }
    7089             : 
    7090             : /// DropOperands - Release the operands and set this node to have
    7091             : /// zero operands.
    7092    23707309 : void SDNode::DropOperands() {
    7093             :   // Unlike the code in MorphNodeTo that does this, we don't need to
    7094             :   // watch for dead nodes here.
    7095    55882557 :   for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
    7096    32175248 :     SDUse &Use = *I++;
    7097    32175248 :     Use.set(SDValue());
    7098             :   }
    7099    23707309 : }
    7100             : 
    7101     5131843 : void SelectionDAG::setNodeMemRefs(MachineSDNode *N,
    7102             :                                   ArrayRef<MachineMemOperand *> NewMemRefs) {
    7103     5131843 :   if (NewMemRefs.empty()) {
    7104             :     N->clearMemRefs();
    7105         535 :     return;
    7106             :   }
    7107             : 
    7108             :   // Check if we can avoid allocating by storing a single reference directly.
    7109     5131308 :   if (NewMemRefs.size() == 1) {
    7110     4789562 :     N->MemRefs = NewMemRefs[0];
    7111     4789562 :     N->NumMemRefs = 1;
    7112     4789562 :     return;
    7113             :   }
    7114             : 
    7115             :   MachineMemOperand **MemRefsBuffer =
    7116      341746 :       Allocator.template Allocate<MachineMemOperand *>(NewMemRefs.size());
    7117             :   std::copy(NewMemRefs.begin(), NewMemRefs.end(), MemRefsBuffer);
    7118             :   N->MemRefs = MemRefsBuffer;
    7119      341746 :   N->NumMemRefs = static_cast<int>(NewMemRefs.size());
    7120             : }
    7121             : 
    7122             : /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
    7123             : /// machine opcode.
    7124             : ///
    7125        6766 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7126             :                                    EVT VT) {
    7127        6766 :   SDVTList VTs = getVTList(VT);
    7128        6766 :   return SelectNodeTo(N, MachineOpc, VTs, None);
    7129             : }
    7130             : 
    7131         243 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7132             :                                    EVT VT, SDValue Op1) {
    7133         243 :   SDVTList VTs = getVTList(VT);
    7134         243 :   SDValue Ops[] = { Op1 };
    7135         243 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7136             : }
    7137             : 
    7138        2153 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7139             :                                    EVT VT, SDValue Op1,
    7140             :                                    SDValue Op2) {
    7141        2153 :   SDVTList VTs = getVTList(VT);
    7142        2153 :   SDValue Ops[] = { Op1, Op2 };
    7143        2153 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7144             : }
    7145             : 
    7146          52 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7147             :                                    EVT VT, SDValue Op1,
    7148             :                                    SDValue Op2, SDValue Op3) {
    7149          52 :   SDVTList VTs = getVTList(VT);
    7150          52 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7151          52 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7152             : }
    7153             : 
    7154        4432 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7155             :                                    EVT VT, ArrayRef<SDValue> Ops) {
    7156        4432 :   SDVTList VTs = getVTList(VT);
    7157        4432 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7158             : }
    7159             : 
    7160          10 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7161             :                                    EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
    7162          10 :   SDVTList VTs = getVTList(VT1, VT2);
    7163          10 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7164             : }
    7165             : 
    7166           7 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7167             :                                    EVT VT1, EVT VT2) {
    7168           7 :   SDVTList VTs = getVTList(VT1, VT2);
    7169           7 :   return SelectNodeTo(N, MachineOpc, VTs, None);
    7170             : }
    7171             : 
    7172           5 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7173             :                                    EVT VT1, EVT VT2, EVT VT3,
    7174             :                                    ArrayRef<SDValue> Ops) {
    7175           5 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7176           5 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7177             : }
    7178             : 
    7179           0 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7180             :                                    EVT VT1, EVT VT2,
    7181             :                                    SDValue Op1, SDValue Op2) {
    7182           0 :   SDVTList VTs = getVTList(VT1, VT2);
    7183           0 :   SDValue Ops[] = { Op1, Op2 };
    7184           0 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7185             : }
    7186             : 
    7187       42662 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7188             :                                    SDVTList VTs,ArrayRef<SDValue> Ops) {
    7189       42662 :   SDNode *New = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
    7190             :   // Reset the NodeID to -1.
    7191             :   New->setNodeId(-1);
    7192       42662 :   if (New != N) {
    7193          74 :     ReplaceAllUsesWith(N, New);
    7194          74 :     RemoveDeadNode(N);
    7195             :   }
    7196       42662 :   return New;
    7197             : }
    7198             : 
    7199             : /// UpdateSDLocOnMergeSDNode - If the opt level is -O0 then it throws away
    7200             : /// the line number information on the merged node since it is not possible to
    7201             : /// preserve the information that operation is associated with multiple lines.
    7202             : /// This will make the debugger working better at -O0, were there is a higher
    7203             : /// probability having other instructions associated with that line.
    7204             : ///
    7205             : /// For IROrder, we keep the smaller of the two
    7206      111319 : SDNode *SelectionDAG::UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &OLoc) {
    7207             :   DebugLoc NLoc = N->getDebugLoc();
    7208      111319 :   if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
    7209           0 :     N->setDebugLoc(DebugLoc());
    7210             :   }
    7211      236252 :   unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
    7212             :   N->setIROrder(Order);
    7213      111319 :   return N;
    7214             : }
    7215             : 
    7216             : /// MorphNodeTo - This *mutates* the specified node to have the specified
    7217             : /// return type, opcode, and operands.
    7218             : ///
    7219             : /// Note that MorphNodeTo returns the resultant node.  If there is already a
    7220             : /// node of the specified opcode and operands, it returns that node instead of
    7221             : /// the current one.  Note that the SDLoc need not be the same.
    7222             : ///
    7223             : /// Using MorphNodeTo is faster than creating a new node and swapping it in
    7224             : /// with ReplaceAllUsesWith both because it often avoids allocating a new
    7225             : /// node, and because it doesn't require CSE recalculation for any of
    7226             : /// the node's users.
    7227             : ///
    7228             : /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
    7229             : /// As a consequence it isn't appropriate to use from within the DAG combiner or
    7230             : /// the legalizer which maintain worklists that would need to be updated when
    7231             : /// deleting things.
    7232    11935752 : SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
    7233             :                                   SDVTList VTs, ArrayRef<SDValue> Ops) {
    7234             :   // If an identical node already exists, use it.
    7235    11935752 :   void *IP = nullptr;
    7236    11935752 :   if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
    7237             :     FoldingSetNodeID ID;
    7238     8786095 :     AddNodeIDNode(ID, Opc, VTs, Ops);
    7239    17572192 :     if (SDNode *ON = FindNodeOrInsertPos(ID, SDLoc(N), IP))
    7240       55384 :       return UpdateSDLocOnMergeSDNode(ON, SDLoc(N));
    7241             :   }
    7242             : 
    7243    11908061 :   if (!RemoveNodeFromCSEMaps(N))
    7244     3075828 :     IP = nullptr;
    7245             : 
    7246             :   // Start the morphing.
    7247    11908060 :   N->NodeType = Opc;
    7248    11908060 :   N->ValueList = VTs.VTs;
    7249    11908060 :   N->NumValues = VTs.NumVTs;
    7250             : 
    7251             :   // Clear the operands list, updating used nodes to remove this from their
    7252             :   // use list.  Keep track of any operands that become dead as a result.
    7253             :   SmallPtrSet<SDNode*, 16> DeadNodeSet;
    7254    48569860 :   for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
    7255    36661799 :     SDUse &Use = *I++;
    7256             :     SDNode *Used = Use.getNode();
    7257    36661799 :     Use.set(SDValue());
    7258    36661799 :     if (Used->use_empty())
    7259    14546012 :       DeadNodeSet.insert(Used);
    7260             :   }
    7261             : 
    7262             :   // For MachineNode, initialize the memory references information.
    7263             :   if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N))
    7264             :     MN->clearMemRefs();
    7265             : 
    7266             :   // Swap for an appropriately sized array from the recycler.
    7267    11908061 :   removeOperands(N);
    7268    11908060 :   createOperands(N, Ops);
    7269             : 
    7270             :   // Delete any nodes that are still dead after adding the uses for the
    7271             :   // new operands.
    7272    11908061 :   if (!DeadNodeSet.empty()) {
    7273             :     SmallVector<SDNode *, 16> DeadNodes;
    7274    23931882 :     for (SDNode *N : DeadNodeSet)
    7275    14546012 :       if (N->use_empty())
    7276     4446656 :         DeadNodes.push_back(N);
    7277     9385870 :     RemoveDeadNodes(DeadNodes);
    7278             :   }
    7279             : 
    7280    11908061 :   if (IP)
    7281             :     CSEMap.InsertNode(N, IP);   // Memoize the new node.
    7282             :   return N;
    7283             : }
    7284             : 
    7285         464 : SDNode* SelectionDAG::mutateStrictFPToFP(SDNode *Node) {
    7286         464 :   unsigned OrigOpc = Node->getOpcode();
    7287             :   unsigned NewOpc;
    7288             :   bool IsUnary = false;
    7289             :   bool IsTernary = false;
    7290             :   switch (OrigOpc) {
    7291           0 :   default:
    7292           0 :     llvm_unreachable("mutateStrictFPToFP called with unexpected opcode!");
    7293             :   case ISD::STRICT_FADD: NewOpc = ISD::FADD; break;
    7294             :   case ISD::STRICT_FSUB: NewOpc = ISD::FSUB; break;
    7295             :   case ISD::STRICT_FMUL: NewOpc = ISD::FMUL; break;
    7296             :   case ISD::STRICT_FDIV: NewOpc = ISD::FDIV; break;
    7297             :   case ISD::STRICT_FREM: NewOpc = ISD::FREM; break;
    7298             :   case ISD::STRICT_FMA: NewOpc = ISD::FMA; IsTernary = true; break;
    7299             :   case ISD::STRICT_FSQRT: NewOpc = ISD::FSQRT; IsUnary = true; break;
    7300             :   case ISD::STRICT_FPOW: NewOpc = ISD::FPOW; break;
    7301             :   case ISD::STRICT_FPOWI: NewOpc = ISD::FPOWI; break;
    7302             :   case ISD::STRICT_FSIN: NewOpc = ISD::FSIN; IsUnary = true; break;
    7303             :   case ISD::STRICT_FCOS: NewOpc = ISD::FCOS; IsUnary = true; break;
    7304             :   case ISD::STRICT_FEXP: NewOpc = ISD::FEXP; IsUnary = true; break;
    7305             :   case ISD::STRICT_FEXP2: NewOpc = ISD::FEXP2; IsUnary = true; break;
    7306             :   case ISD::STRICT_FLOG: NewOpc = ISD::FLOG; IsUnary = true; break;
    7307             :   case ISD::STRICT_FLOG10: NewOpc = ISD::FLOG10; IsUnary = true; break;
    7308             :   case ISD::STRICT_FLOG2: NewOpc = ISD::FLOG2; IsUnary = true; break;
    7309             :   case ISD::STRICT_FRINT: NewOpc = ISD::FRINT; IsUnary = true; break;
    7310             :   case ISD::STRICT_FNEARBYINT:
    7311             :     NewOpc = ISD::FNEARBYINT;
    7312             :     IsUnary = true;
    7313             :     break;
    7314             :   }
    7315             : 
    7316             :   // We're taking this node out of the chain, so we need to re-link things.
    7317         464 :   SDValue InputChain = Node->getOperand(0);
    7318             :   SDValue OutputChain = SDValue(Node, 1);
    7319         464 :   ReplaceAllUsesOfValueWith(OutputChain, InputChain);
    7320             : 
    7321         928 :   SDVTList VTs = getVTList(Node->getOperand(1).getValueType());
    7322             :   SDNode *Res = nullptr;
    7323         464 :   if (IsUnary)
    7324         522 :     Res = MorphNodeTo(Node, NewOpc, VTs, { Node->getOperand(1) });
    7325         203 :   else if (IsTernary)
    7326          78 :     Res = MorphNodeTo(Node, NewOpc, VTs, { Node->getOperand(1),
    7327             :                                            Node->getOperand(2),
    7328             :                                            Node->getOperand(3)});
    7329             :   else
    7330         328 :     Res = MorphNodeTo(Node, NewOpc, VTs, { Node->getOperand(1),
    7331             :                                            Node->getOperand(2) });
    7332             : 
    7333             :   // MorphNodeTo can operate in two ways: if an existing node with the
    7334             :   // specified operands exists, it can just return it.  Otherwise, it
    7335             :   // updates the node in place to have the requested operands.
    7336         464 :   if (Res == Node) {
    7337             :     // If we updated the node in place, reset the node ID.  To the isel,
    7338             :     // this should be just like a newly allocated machine node.
    7339             :     Res->setNodeId(-1);
    7340             :   } else {
    7341           0 :     ReplaceAllUsesWith(Node, Res);
    7342           0 :     RemoveDeadNode(Node);
    7343             :   }
    7344             : 
    7345         464 :   return Res;
    7346             : }
    7347             : 
    7348             : /// getMachineNode - These are used for target selectors to create a new node
    7349             : /// with specified return type(s), MachineInstr opcode, and operands.
    7350             : ///
    7351             : /// Note that getMachineNode returns the resultant node.  If there is already a
    7352             : /// node of the specified opcode and operands, it returns that node instead of
    7353             : /// the current one.
    7354        3821 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7355             :                                             EVT VT) {
    7356        3821 :   SDVTList VTs = getVTList(VT);
    7357        3821 :   return getMachineNode(Opcode, dl, VTs, None);
    7358             : }
    7359             : 
    7360       49965 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7361             :                                             EVT VT, SDValue Op1) {
    7362       49965 :   SDVTList VTs = getVTList(VT);
    7363       49965 :   SDValue Ops[] = { Op1 };
    7364       49965 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7365             : }
    7366             : 
    7367       59029 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7368             :                                             EVT VT, SDValue Op1, SDValue Op2) {
    7369       59029 :   SDVTList VTs = getVTList(VT);
    7370       59029 :   SDValue Ops[] = { Op1, Op2 };
    7371       59029 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7372             : }
    7373             : 
    7374        5638 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7375             :                                             EVT VT, SDValue Op1, SDValue Op2,
    7376             :                                             SDValue Op3) {
    7377        5638 :   SDVTList VTs = getVTList(VT);
    7378        5638 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7379        5638 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7380             : }
    7381             : 
    7382       45256 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7383             :                                             EVT VT, ArrayRef<SDValue> Ops) {
    7384       45256 :   SDVTList VTs = getVTList(VT);
    7385       45256 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7386             : }
    7387             : 
    7388        9435 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7389             :                                             EVT VT1, EVT VT2, SDValue Op1,
    7390             :                                             SDValue Op2) {
    7391        9435 :   SDVTList VTs = getVTList(VT1, VT2);
    7392        9435 :   SDValue Ops[] = { Op1, Op2 };
    7393        9435 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7394             : }
    7395             : 
    7396          96 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7397             :                                             EVT VT1, EVT VT2, SDValue Op1,
    7398             :                                             SDValue Op2, SDValue Op3) {
    7399          96 :   SDVTList VTs = getVTList(VT1, VT2);
    7400          96 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7401          96 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7402             : }
    7403             : 
    7404      225026 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7405             :                                             EVT VT1, EVT VT2,
    7406             :                                             ArrayRef<SDValue> Ops) {
    7407      225026 :   SDVTList VTs = getVTList(VT1, VT2);
    7408      225026 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7409             : }
    7410             : 
    7411          27 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7412             :                                             EVT VT1, EVT VT2, EVT VT3,
    7413             :                                             SDValue Op1, SDValue Op2) {
    7414          27 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7415          27 :   SDValue Ops[] = { Op1, Op2 };
    7416          27 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7417             : }
    7418             : 
    7419         181 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7420             :                                             EVT VT1, EVT VT2, EVT VT3,
    7421             :                                             SDValue Op1, SDValue Op2,
    7422             :                                             SDValue Op3) {
    7423         181 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7424         181 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7425         181 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7426             : }
    7427             : 
    7428         396 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7429             :                                             EVT VT1, EVT VT2, EVT VT3,
    7430             :                                             ArrayRef<SDValue> Ops) {
    7431         396 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7432         396 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7433             : }
    7434             : 
    7435        2598 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7436             :                                             ArrayRef<EVT> ResultTys,
    7437             :                                             ArrayRef<SDValue> Ops) {
    7438        2598 :   SDVTList VTs = getVTList(ResultTys);
    7439        2598 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7440             : }
    7441             : 
    7442      656843 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &DL,
    7443             :                                             SDVTList VTs,
    7444             :                                             ArrayRef<SDValue> Ops) {
    7445      656843 :   bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
    7446             :   MachineSDNode *N;
    7447      656843 :   void *IP = nullptr;
    7448             : 
    7449             :   if (DoCSE) {
    7450             :     FoldingSetNodeID ID;
    7451      641549 :     AddNodeIDNode(ID, ~Opcode, VTs, Ops);
    7452      641549 :     IP = nullptr;
    7453      641549 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    7454       83627 :       return cast<MachineSDNode>(UpdateSDLocOnMergeSDNode(E, DL));
    7455             :     }
    7456             :   }
    7457             : 
    7458             :   // Allocate a new MachineSDNode.
    7459     1146432 :   N = newSDNode<MachineSDNode>(~Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    7460      573216 :   createOperands(N, Ops);
    7461             : 
    7462      573216 :   if (DoCSE)
    7463      557922 :     CSEMap.InsertNode(N, IP);
    7464             : 
    7465      573216 :   InsertNode(N);
    7466      573216 :   return N;
    7467             : }
    7468             : 
    7469             : /// getTargetExtractSubreg - A convenience function for creating
    7470             : /// TargetOpcode::EXTRACT_SUBREG nodes.
    7471       41688 : SDValue SelectionDAG::getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
    7472             :                                              SDValue Operand) {
    7473       41688 :   SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
    7474       41688 :   SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
    7475             :                                   VT, Operand, SRIdxVal);
    7476       41688 :   return SDValue(Subreg, 0);
    7477             : }
    7478             : 
    7479             : /// getTargetInsertSubreg - A convenience function for creating
    7480             : /// TargetOpcode::INSERT_SUBREG nodes.
    7481        1645 : SDValue SelectionDAG::getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
    7482             :                                             SDValue Operand, SDValue Subreg) {
    7483        1645 :   SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
    7484        1645 :   SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
    7485             :                                   VT, Operand, Subreg, SRIdxVal);
    7486        1645 :   return SDValue(Result, 0);
    7487             : }
    7488             : 
    7489             : /// getNodeIfExists - Get the specified node if it's already available, or
    7490             : /// else return NULL.
    7491      644923 : SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
    7492             :                                       ArrayRef<SDValue> Ops,
    7493             :                                       const SDNodeFlags Flags) {
    7494      644923 :   if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
    7495             :     FoldingSetNodeID ID;
    7496      644923 :     AddNodeIDNode(ID, Opcode, VTList, Ops);
    7497      644923 :     void *IP = nullptr;
    7498     1289846 :     if (SDNode *E = FindNodeOrInsertPos(ID, SDLoc(), IP)) {
    7499          19 :       E->intersectFlagsWith(Flags);
    7500             :       return E;
    7501             :     }
    7502             :   }
    7503             :   return nullptr;
    7504             : }
    7505             : 
    7506             : /// getDbgValue - Creates a SDDbgValue node.
    7507             : ///
    7508             : /// SDNode
    7509       51662 : SDDbgValue *SelectionDAG::getDbgValue(DIVariable *Var, DIExpression *Expr,
    7510             :                                       SDNode *N, unsigned R, bool IsIndirect,
    7511             :                                       const DebugLoc &DL, unsigned O) {
    7512             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7513             :          "Expected inlined-at fields to agree");
    7514       51662 :   return new (DbgInfo->getAlloc())
    7515       51662 :       SDDbgValue(Var, Expr, N, R, IsIndirect, DL, O);
    7516             : }
    7517             : 
    7518             : /// Constant
    7519       26293 : SDDbgValue *SelectionDAG::getConstantDbgValue(DIVariable *Var,
    7520             :                                               DIExpression *Expr,
    7521             :                                               const Value *C,
    7522             :                                               const DebugLoc &DL, unsigned O) {
    7523             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7524             :          "Expected inlined-at fields to agree");
    7525       26293 :   return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, C, DL, O);
    7526             : }
    7527             : 
    7528             : /// FrameIndex
    7529       16580 : SDDbgValue *SelectionDAG::getFrameIndexDbgValue(DIVariable *Var,
    7530             :                                                 DIExpression *Expr, unsigned FI,
    7531             :                                                 bool IsIndirect,
    7532             :                                                 const DebugLoc &DL,
    7533             :                                                 unsigned O) {
    7534             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7535             :          "Expected inlined-at fields to agree");
    7536       16580 :   return new (DbgInfo->getAlloc())
    7537       16580 :       SDDbgValue(Var, Expr, FI, IsIndirect, DL, O, SDDbgValue::FRAMEIX);
    7538             : }
    7539             : 
    7540             : /// VReg
    7541       10038 : SDDbgValue *SelectionDAG::getVRegDbgValue(DIVariable *Var,
    7542             :                                           DIExpression *Expr,
    7543             :                                           unsigned VReg, bool IsIndirect,
    7544             :                                           const DebugLoc &DL, unsigned O) {
    7545             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7546             :          "Expected inlined-at fields to agree");
    7547       10038 :   return new (DbgInfo->getAlloc())
    7548       10038 :       SDDbgValue(Var, Expr, VReg, IsIndirect, DL, O, SDDbgValue::VREG);
    7549             : }
    7550             : 
    7551    13990638 : void SelectionDAG::transferDbgValues(SDValue From, SDValue To,
    7552             :                                      unsigned OffsetInBits, unsigned SizeInBits,
    7553             :                                      bool InvalidateDbg) {
    7554             :   SDNode *FromNode = From.getNode();
    7555             :   SDNode *ToNode = To.getNode();
    7556             :   assert(FromNode && ToNode && "Can't modify dbg values");
    7557             : 
    7558             :   // PR35338
    7559             :   // TODO: assert(From != To && "Redundant dbg value transfer");
    7560             :   // TODO: assert(FromNode != ToNode && "Intranode dbg value transfer");
    7561    13989949 :   if (From == To || FromNode == ToNode)
    7562    13985426 :     return;
    7563             : 
    7564     9742346 :   if (!FromNode->getHasDebugValue())
    7565             :     return;
    7566             : 
    7567             :   SmallVector<SDDbgValue *, 2> ClonedDVs;
    7568       19705 :   for (SDDbgValue *Dbg : GetDbgValues(FromNode)) {
    7569        9281 :     if (Dbg->getKind() != SDDbgValue::SDNODE || Dbg->isInvalidated())
    7570        1316 :       continue;
    7571             : 
    7572             :     // TODO: assert(!Dbg->isInvalidated() && "Transfer of invalid dbg value");
    7573             : 
    7574             :     // Just transfer the dbg value attached to From.
    7575        8337 :     if (Dbg->getResNo() != From.getResNo())
    7576             :       continue;
    7577             : 
    7578        7970 :     DIVariable *Var = Dbg->getVariable();
    7579        7970 :     auto *Expr = Dbg->getExpression();
    7580             :     // If a fragment is requested, update the expression.
    7581        7970 :     if (SizeInBits) {
    7582             :       // When splitting a larger (e.g., sign-extended) value whose
    7583             :       // lower bits are described with an SDDbgValue, do not attempt
    7584             :       // to transfer the SDDbgValue to the upper bits.
    7585          60 :       if (auto FI = Expr->getFragmentInfo())
    7586          10 :         if (OffsetInBits + SizeInBits > FI->SizeInBits)
    7587           1 :           continue;
    7588             :       auto Fragment = DIExpression::createFragmentExpression(Expr, OffsetInBits,
    7589          59 :                                                              SizeInBits);
    7590          59 :       if (!Fragment)
    7591             :         continue;
    7592          55 :       Expr = *Fragment;
    7593             :     }
    7594             :     // Clone the SDDbgValue and move it to To.
    7595             :     SDDbgValue *Clone =
    7596       15930 :         getDbgValue(Var, Expr, ToNode, To.getResNo(), Dbg->isIndirect(),
    7597        7965 :                     Dbg->getDebugLoc(), Dbg->getOrder());
    7598        7965 :     ClonedDVs.push_back(Clone);
    7599             : 
    7600        7965 :     if (InvalidateDbg)
    7601             :       Dbg->setIsInvalidated();
    7602             :   }
    7603             : 
    7604       13177 :   for (SDDbgValue *Dbg : ClonedDVs)
    7605        7965 :     AddDbgValue(Dbg, ToNode, false);
    7606             : }
    7607             : 
    7608     5770310 : void SelectionDAG::salvageDebugInfo(SDNode &N) {
    7609     5770310 :   if (!N.getHasDebugValue())
    7610     5764244 :     return;
    7611             : 
    7612             :   SmallVector<SDDbgValue *, 2> ClonedDVs;
    7613       29588 :   for (auto DV : GetDbgValues(&N)) {
    7614       17456 :     if (DV->isInvalidated())
    7615             :       continue;
    7616       17456 :     switch (N.getOpcode()) {
    7617             :     default:
    7618       10854 :       break;
    7619        6602 :     case ISD::ADD:
    7620        6602 :       SDValue N0 = N.getOperand(0);
    7621        6602 :       SDValue N1 = N.getOperand(1);
    7622       13204 :       if (!isConstantIntBuildVectorOrConstantInt(N0) &&
    7623        6602 :           isConstantIntBuildVectorOrConstantInt(N1)) {
    7624             :         uint64_t Offset = N.getConstantOperandVal(1);
    7625             :         // Rewrite an ADD constant node into a DIExpression. Since we are
    7626             :         // performing arithmetic to compute the variable's *value* in the
    7627             :         // DIExpression, we need to mark the expression with a
    7628             :         // DW_OP_stack_value.
    7629        5662 :         auto *DIExpr = DV->getExpression();
    7630        5662 :         DIExpr = DIExpression::prepend(DIExpr, DIExpression::NoDeref, Offset,
    7631             :                                        DIExpression::NoDeref,
    7632             :                                        DIExpression::WithStackValue);
    7633             :         SDDbgValue *Clone =
    7634        5662 :             getDbgValue(DV->getVariable(), DIExpr, N0.getNode(), N0.getResNo(),
    7635        5662 :                         DV->isIndirect(), DV->getDebugLoc(), DV->getOrder());
    7636        5662 :         ClonedDVs.push_back(Clone);
    7637             :         DV->setIsInvalidated();
    7638             :         LLVM_DEBUG(dbgs() << "SALVAGE: Rewriting";
    7639             :                    N0.getNode()->dumprFull(this);
    7640             :                    dbgs() << " into " << *DIExpr << '\n');
    7641             :       }
    7642             :     }
    7643             :   }
    7644             : 
    7645       11728 :   for (SDDbgValue *Dbg : ClonedDVs)
    7646        5662 :     AddDbgValue(Dbg, Dbg->getSDNode(), false);
    7647             : }
    7648             : 
    7649             : /// Creates a SDDbgLabel node.
    7650           1 : SDDbgLabel *SelectionDAG::getDbgLabel(DILabel *Label,
    7651             :                                       const DebugLoc &DL, unsigned O) {
    7652             :   assert(cast<DILabel>(Label)->isValidLocationForIntrinsic(DL) &&
    7653             :          "Expected inlined-at fields to agree");
    7654           1 :   return new (DbgInfo->getAlloc()) SDDbgLabel(Label, DL, O);
    7655             : }
    7656             : 
    7657             : namespace {
    7658             : 
    7659             : /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
    7660             : /// pointed to by a use iterator is deleted, increment the use iterator
    7661             : /// so that it doesn't dangle.
    7662             : ///
    7663             : class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
    7664             :   SDNode::use_iterator &UI;
    7665             :   SDNode::use_iterator &UE;
    7666             : 
    7667       24759 :   void NodeDeleted(SDNode *N, SDNode *E) override {
    7668             :     // Increment the iterator as needed.
    7669       49518 :     while (UI != UE && N == *UI)
    7670             :       ++UI;
    7671       24759 :   }
    7672             : 
    7673             : public:
    7674             :   RAUWUpdateListener(SelectionDAG &d,
    7675             :                      SDNode::use_iterator &ui,
    7676             :                      SDNode::use_iterator &ue)
    7677    22954462 :     : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
    7678             : };
    7679             : 
    7680             : } // end anonymous namespace
    7681             : 
    7682             : /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
    7683             : /// This can cause recursive merging of nodes in the DAG.
    7684             : ///
    7685             : /// This version assumes From has a single result value.
    7686             : ///
    7687     3192904 : void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
    7688             :   SDNode *From = FromN.getNode();
    7689             :   assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
    7690             :          "Cannot replace with this method!");
    7691             :   assert(From != To.getNode() && "Cannot replace uses of with self");
    7692             : 
    7693             :   // Preserve Debug Values
    7694     3192904 :   transferDbgValues(FromN, To);
    7695             : 
    7696             :   // Iterate over all the existing uses of From. New uses will be added
    7697             :   // to the beginning of the use list, which we avoid visiting.
    7698             :   // This specifically avoids visiting uses of From that arise while the
    7699             :   // replacement is happening, because any such uses would be the result
    7700             :   // of CSE: If an existing node looks like From after one of its operands
    7701             :   // is replaced by To, we don't want to replace of all its users with To
    7702             :   // too. See PR3018 for more info.
    7703     3192904 :   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
    7704             :   RAUWUpdateListener Listener(*this, UI, UE);
    7705     7070413 :   while (UI != UE) {
    7706             :     SDNode *User = *UI;
    7707             : 
    7708             :     // This node is about to morph, remove its old self from the CSE maps.
    7709     3877509 :     RemoveNodeFromCSEMaps(User);
    7710             : 
    7711             :     // A user can appear in a use list multiple times, and when this
    7712             :     // happens the uses are usually next to each other in the list.
    7713             :     // To help reduce the number of CSE recomputations, process all
    7714             :     // the uses of this user that we can find this way.
    7715             :     do {
    7716     3889866 :       SDUse &Use = UI.getUse();
    7717             :       ++UI;
    7718             :       Use.set(To);
    7719     7779732 :       if (To->isDivergent() != From->isDivergent())
    7720        6425 :         updateDivergence(User);
    7721     3889866 :     } while (UI != UE && *UI == User);
    7722             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7723             :     // already exists there, recursively merge the results together.
    7724     3877509 :     AddModifiedNodeToCSEMaps(User);
    7725             :   }
    7726             : 
    7727             :   // If we just RAUW'd the root, take note.
    7728     3192904 :   if (FromN == getRoot())
    7729        6478 :     setRoot(To);
    7730     3192904 : }
    7731             : 
    7732             : /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
    7733             : /// This can cause recursive merging of nodes in the DAG.
    7734             : ///
    7735             : /// This version assumes that for each value of From, there is a
    7736             : /// corresponding value in To in the same position with the same type.
    7737             : ///
    7738     1892928 : void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
    7739             : #ifndef NDEBUG
    7740             :   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
    7741             :     assert((!From->hasAnyUseOfValue(i) ||
    7742             :             From->getValueType(i) == To->getValueType(i)) &&
    7743             :            "Cannot use this version of ReplaceAllUsesWith!");
    7744             : #endif
    7745             : 
    7746             :   // Handle the trivial case.
    7747     1892928 :   if (From == To)
    7748           0 :     return;
    7749             : 
    7750             :   // Preserve Debug Info. Only do this if there's a use.
    7751     3934707 :   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
    7752     2041779 :     if (From->hasAnyUseOfValue(i)) {
    7753             :       assert((i < To->getNumValues()) && "Invalid To location");
    7754     1901112 :       transferDbgValues(SDValue(From, i), SDValue(To, i));
    7755             :     }
    7756             : 
    7757             :   // Iterate over just the existing users of From. See the comments in
    7758             :   // the ReplaceAllUsesWith above.
    7759     1892928 :   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
    7760             :   RAUWUpdateListener Listener(*this, UI, UE);
    7761     4419563 :   while (UI != UE) {
    7762             :     SDNode *User = *UI;
    7763             : 
    7764             :     // This node is about to morph, remove its old self from the CSE maps.
    7765     2526635 :     RemoveNodeFromCSEMaps(User);
    7766             : 
    7767             :     // A user can appear in a use list multiple times, and when this
    7768             :     // happens the uses are usually next to each other in the list.
    7769             :     // To help reduce the number of CSE recomputations, process all
    7770             :     // the uses of this user that we can find this way.
    7771             :     do {
    7772     2533619 :       SDUse &Use = UI.getUse();
    7773             :       ++UI;
    7774             :       Use.setNode(To);
    7775     5067238 :       if (To->isDivergent() != From->isDivergent())
    7776        1720 :         updateDivergence(User);
    7777     2533619 :     } while (UI != UE && *UI == User);
    7778             : 
    7779             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7780             :     // already exists there, recursively merge the results together.
    7781     2526635 :     AddModifiedNodeToCSEMaps(User);
    7782             :   }
    7783             : 
    7784             :   // If we just RAUW'd the root, take note.
    7785     1892928 :   if (From == getRoot().getNode())
    7786       52860 :     setRoot(SDValue(To, getRoot().getResNo()));
    7787             : }
    7788             : 
    7789             : /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
    7790             : /// This can cause recursive merging of nodes in the DAG.
    7791             : ///
    7792             : /// This version can replace From with any result values.  To must match the
    7793             : /// number and types of values returned by From.
    7794     1947155 : void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
    7795     3894310 :   if (From->getNumValues() == 1)  // Handle the simple case efficiently.
    7796      785079 :     return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
    7797             : 
    7798             :   // Preserve Debug Info.
    7799     3498325 :   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
    7800     4672498 :     transferDbgValues(SDValue(From, i), To[i]);
    7801             : 
    7802             :   // Iterate over just the existing users of From. See the comments in
    7803             :   // the ReplaceAllUsesWith above.
    7804     1162076 :   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
    7805             :   RAUWUpdateListener Listener(*this, UI, UE);
    7806     3201795 :   while (UI != UE) {
    7807             :     SDNode *User = *UI;
    7808             : 
    7809             :     // This node is about to morph, remove its old self from the CSE maps.
    7810     2039719 :     RemoveNodeFromCSEMaps(User);
    7811             : 
    7812             :     // A user can appear in a use list multiple times, and when this happens the
    7813             :     // uses are usually next to each other in the list.  To help reduce the
    7814             :     // number of CSE and divergence recomputations, process all the uses of this
    7815             :     // user that we can find this way.
    7816             :     bool To_IsDivergent = false;
    7817             :     do {
    7818     2044902 :       SDUse &Use = UI.getUse();
    7819     2044902 :       const SDValue &ToOp = To[Use.getResNo()];
    7820             :       ++UI;
    7821             :       Use.set(ToOp);
    7822     2044902 :       To_IsDivergent |= ToOp->isDivergent();
    7823     2044902 :     } while (UI != UE && *UI == User);
    7824             : 
    7825     2039719 :     if (To_IsDivergent != From->isDivergent())
    7826        3839 :       updateDivergence(User);
    7827             : 
    7828             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7829             :     // already exists there, recursively merge the results together.
    7830     2039719 :     AddModifiedNodeToCSEMaps(User);
    7831             :   }
    7832             : 
    7833             :   // If we just RAUW'd the root, take note.
    7834     1162076 :   if (From == getRoot().getNode())
    7835          12 :     setRoot(SDValue(To[getRoot().getResNo()]));
    7836             : }
    7837             : 
    7838             : /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
    7839             : /// uses of other values produced by From.getNode() alone.  The Deleted
    7840             : /// vector is handled the same way as for ReplaceAllUsesWith.
    7841     6478704 : void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
    7842             :   // Handle the really simple, really trivial case efficiently.
    7843     1249381 :   if (From == To) return;
    7844             : 
    7845             :   // Handle the simple, trivial, case efficiently.
    7846     6477897 :   if (From.getNode()->getNumValues() == 1) {
    7847     1248574 :     ReplaceAllUsesWith(From, To);
    7848     1248574 :     return;
    7849             :   }
    7850             : 
    7851             :   // Preserve Debug Info.
    7852     5229323 :   transferDbgValues(From, To);
    7853             : 
    7854             :   // Iterate over just the existing users of From. See the comments in
    7855             :   // the ReplaceAllUsesWith above.
    7856     5229323 :   SDNode::use_iterator UI = From.getNode()->use_begin(),
    7857             :                        UE = From.getNode()->use_end();
    7858             :   RAUWUpdateListener Listener(*this, UI, UE);
    7859    11473637 :   while (UI != UE) {
    7860             :     SDNode *User = *UI;
    7861             :     bool UserRemovedFromCSEMaps = false;
    7862             : 
    7863             :     // A user can appear in a use list multiple times, and when this
    7864             :     // happens the uses are usually next to each other in the list.
    7865             :     // To help reduce the number of CSE recomputations, process all
    7866             :     // the uses of this user that we can find this way.
    7867             :     do {
    7868     7100248 :       SDUse &Use = UI.getUse();
    7869             : 
    7870             :       // Skip uses of different values from the same node.
    7871     7100248 :       if (Use.getResNo() != From.getResNo()) {
    7872             :         ++UI;
    7873     3400528 :         continue;
    7874             :       }
    7875             : 
    7876             :       // If this node hasn't been modified yet, it's still in the CSE maps,
    7877             :       // so remove its old self from the CSE maps.
    7878     3699720 :       if (!UserRemovedFromCSEMaps) {
    7879     3697900 :         RemoveNodeFromCSEMaps(User);
    7880             :         UserRemovedFromCSEMaps = true;
    7881             :       }
    7882             : 
    7883             :       ++UI;
    7884             :       Use.set(To);
    7885     7399440 :       if (To->isDivergent() != From->isDivergent())
    7886         537 :         updateDivergence(User);
    7887     7100248 :     } while (UI != UE && *UI == User);
    7888             :     // We are iterating over all uses of the From node, so if a use
    7889             :     // doesn't use the specific value, no changes are made.
    7890     6244314 :     if (!UserRemovedFromCSEMaps)
    7891             :       continue;
    7892             : 
    7893             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7894             :     // already exists there, recursively merge the results together.
    7895     3697900 :     AddModifiedNodeToCSEMaps(User);
    7896             :   }
    7897             : 
    7898             :   // If we just RAUW'd the root, take note.
    7899     5229323 :   if (From == getRoot())
    7900       36303 :     setRoot(To);
    7901             : }
    7902             : 
    7903             : namespace {
    7904             : 
    7905             :   /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
    7906             :   /// to record information about a use.
    7907             :   struct UseMemo {
    7908             :     SDNode *User;
    7909             :     unsigned Index;
    7910             :     SDUse *Use;
    7911             :   };
    7912             : 
    7913             :   /// operator< - Sort Memos by User.
    7914           0 :   bool operator<(const UseMemo &L, const UseMemo &R) {
    7915           0 :     return (intptr_t)L.User < (intptr_t)R.User;
    7916             :   }
    7917             : 
    7918             : } // end anonymous namespace
    7919             : 
    7920      255607 : void SelectionDAG::updateDivergence(SDNode * N)
    7921             : {
    7922      255607 :   if (TLI->isSDNodeAlwaysUniform(N))
    7923             :     return;
    7924      249655 :   bool IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
    7925      933898 :   for (auto &Op : N->ops()) {
    7926      684243 :     if (Op.Val.getValueType() != MVT::Other)
    7927      469047 :       IsDivergent |= Op.getNode()->isDivergent();
    7928             :   }
    7929      249655 :   if (N->SDNodeBits.IsDivergent != IsDivergent) {
    7930        6852 :     N->SDNodeBits.IsDivergent = IsDivergent;
    7931       14522 :     for (auto U : N->uses()) {
    7932        7670 :       updateDivergence(U);
    7933             :     }
    7934             :   }
    7935             : }
    7936             : 
    7937             : 
    7938      100516 : void SelectionDAG::CreateTopologicalOrder(std::vector<SDNode*>& Order) {
    7939             :   DenseMap<SDNode *, unsigned> Degree;
    7940      100516 :   Order.reserve(AllNodes.size());
    7941     3145277 :   for (auto & N : allnodes()) {
    7942     3044761 :     unsigned NOps = N.getNumOperands();
    7943     3044761 :     Degree[&N] = NOps;
    7944     3044761 :     if (0 == NOps)
    7945     1001489 :       Order.push_back(&N);
    7946             :   }
    7947             :   for (std::vector<SDNode *>::iterator I = Order.begin();
    7948     3145277 :   I!=Order.end();++I) {
    7949     3044761 :     SDNode * N = *I;
    7950     7663758 :     for (auto U : N->uses()) {
    7951             :       unsigned &UnsortedOps = Degree[U];
    7952     4618997 :       if (0 == --UnsortedOps)
    7953     2043272 :         Order.push_back(U);
    7954             :     }
    7955             :   }
    7956      100516 : }
    7957             : 
    7958      100516 : void SelectionDAG::VerifyDAGDiverence()
    7959             : {
    7960             :   std::vector<SDNode*> TopoOrder;
    7961      100516 :   CreateTopologicalOrder(TopoOrder);
    7962      100516 :   const TargetLowering &TLI = getTargetLoweringInfo();
    7963             :   DenseMap<const SDNode *, bool> DivergenceMap;
    7964     3145277 :   for (auto &N : allnodes()) {
    7965     3044761 :     DivergenceMap[&N] = false;
    7966             :   }
    7967     3145277 :   for (auto N : TopoOrder) {
    7968     3044761 :     bool IsDivergent = DivergenceMap[N];
    7969     3044761 :     bool IsSDNodeDivergent = TLI.isSDNodeSourceOfDivergence(N, FLI, DA);
    7970     7663758 :     for (auto &Op : N->ops()) {
    7971     4618997 :       if (Op.Val.getValueType() != MVT::Other)
    7972     3714433 :         IsSDNodeDivergent |= DivergenceMap[Op.getNode()];
    7973             :     }
    7974     3044761 :     if (!IsDivergent && IsSDNodeDivergent && !TLI.isSDNodeAlwaysUniform(N)) {
    7975      517842 :       DivergenceMap[N] = true;
    7976             :     }
    7977             :   }
    7978     3145277 :   for (auto &N : allnodes()) {
    7979             :     (void)N;
    7980             :     assert(DivergenceMap[&N] == N.isDivergent() &&
    7981             :            "Divergence bit inconsistency detected\n");
    7982             :   }
    7983      100516 : }
    7984             : 
    7985             : 
    7986             : /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
    7987             : /// uses of other values produced by From.getNode() alone.  The same value
    7988             : /// may appear in both the From and To list.  The Deleted vector is
    7989             : /// handled the same way as for ReplaceAllUsesWith.
    7990        1098 : void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
    7991             :                                               const SDValue *To,
    7992             :                                               unsigned Num){
    7993             :   // Handle the simple, trivial case efficiently.
    7994        1098 :   if (Num == 1)
    7995           0 :     return ReplaceAllUsesOfValueWith(*From, *To);
    7996             : 
    7997        1098 :   transferDbgValues(*From, *To);
    7998             : 
    7999             :   // Read up all the uses and make records of them. This helps
    8000             :   // processing new uses that are introduced during the
    8001             :   // replacement process.
    8002        1098 :   SmallVector<UseMemo, 4> Uses;
    8003        3527 :   for (unsigned i = 0; i != Num; ++i) {
    8004        2429 :     unsigned FromResNo = From[i].getResNo();
    8005        2429 :     SDNode *FromNode = From[i].getNode();
    8006        2429 :     for (SDNode::use_iterator UI = FromNode->use_begin(),
    8007        6739 :          E = FromNode->use_end(); UI != E; ++UI) {
    8008             :       SDUse &Use = UI.getUse();
    8009        4310 :       if (Use.getResNo() == FromResNo) {
    8010        2122 :         UseMemo Memo = { *UI, i, &Use };
    8011        2122 :         Uses.push_back(Memo);
    8012             :       }
    8013             :     }
    8014             :   }
    8015             : 
    8016             :   // Sort the uses, so that all the uses from a given User are together.
    8017             :   llvm::sort(Uses.begin(), Uses.end());
    8018             : 
    8019        3087 :   for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
    8020        3087 :        UseIndex != UseIndexEnd; ) {
    8021             :     // We know that this user uses some value of From.  If it is the right
    8022             :     // value, update it.
    8023        1989 :     SDNode *User = Uses[UseIndex].User;
    8024             : 
    8025             :     // This node is about to morph, remove its old self from the CSE maps.
    8026        1989 :     RemoveNodeFromCSEMaps(User);
    8027             : 
    8028             :     // The Uses array is sorted, so all the uses for a given User
    8029             :     // are next to each other in the list.
    8030             :     // To help reduce the number of CSE recomputations, process all
    8031             :     // the uses of this user that we can find this way.
    8032             :     do {
    8033        2122 :       unsigned i = Uses[UseIndex].Index;
    8034        2122 :       SDUse &Use = *Uses[UseIndex].Use;
    8035        2122 :       ++UseIndex;
    8036             : 
    8037        2122 :       Use.set(To[i]);
    8038        2122 :     } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
    8039             : 
    8040             :     // Now that we have modified User, add it back to the CSE maps.  If it
    8041             :     // already exists there, recursively merge the results together.
    8042        1989 :     AddModifiedNodeToCSEMaps(User);
    8043             :   }
    8044             : }
    8045             : 
    8046             : /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
    8047             : /// based on their topological order. It returns the maximum id and a vector
    8048             : /// of the SDNodes* in assigned order by reference.
    8049     2824773 : unsigned SelectionDAG::AssignTopologicalOrder() {
    8050             :   unsigned DAGSize = 0;
    8051             : 
    8052             :   // SortedPos tracks the progress of the algorithm. Nodes before it are
    8053             :   // sorted, nodes after it are unsorted. When the algorithm completes
    8054             :   // it is at the end of the list.
    8055             :   allnodes_iterator SortedPos = allnodes_begin();
    8056             : 
    8057             :   // Visit all the nodes. Move nodes with no operands to the front of
    8058             :   // the list immediately. Annotate nodes that do have operands with their
    8059             :   // operand count. Before we do this, the Node Id fields of the nodes
    8060             :   // may contain arbitrary values. After, the Node Id fields for nodes
    8061             :   // before SortedPos will contain the topological sort index, and the
    8062             :   // Node Id fields for nodes At SortedPos and after will contain the
    8063             :   // count of outstanding operands.
    8064    87651351 :   for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
    8065             :     SDNode *N = &*I++;
    8066    84826579 :     checkForCycles(N, this);
    8067    84826578 :     unsigned Degree = N->getNumOperands();
    8068    84826578 :     if (Degree == 0) {
    8069             :       // A node with no uses, add it to the result array immediately.
    8070    35690868 :       N->setNodeId(DAGSize++);
    8071             :       allnodes_iterator Q(N);
    8072    35690868 :       if (Q != SortedPos)
    8073             :         SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
    8074             :       assert(SortedPos != AllNodes.end() && "Overran node list");
    8075             :       ++SortedPos;
    8076             :     } else {
    8077             :       // Temporarily use the Node Id as scratch space for the degree count.
    8078    49135710 :       N->setNodeId(Degree);
    8079             :     }
    8080             :   }
    8081             : 
    8082             :   // Visit all the nodes. As we iterate, move nodes into sorted order,
    8083             :   // such that by the time the end is reached all nodes will be sorted.
    8084    87651352 :   for (SDNode &Node : allnodes()) {
    8085             :     SDNode *N = &Node;
    8086    84826579 :     checkForCycles(N, this);
    8087             :     // N is in sorted position, so all its uses have one less operand
    8088             :     // that needs to be sorted.
    8089    84826580 :     for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
    8090   234221484 :          UI != UE; ++UI) {
    8091             :       SDNode *P = *UI;
    8092   149394904 :       unsigned Degree = P->getNodeId();
    8093             :       assert(Degree != 0 && "Invalid node degree");
    8094   149394904 :       --Degree;
    8095   149394904 :       if (Degree == 0) {
    8096             :         // All of P's operands are sorted, so P may sorted now.
    8097    49135710 :         P->setNodeId(DAGSize++);
    8098    49135710 :         if (P->getIterator() != SortedPos)
    8099             :           SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
    8100             :         assert(SortedPos != AllNodes.end() && "Overran node list");
    8101             :         ++SortedPos;
    8102             :       } else {
    8103             :         // Update P's outstanding operand count.
    8104   100259194 :         P->setNodeId(Degree);
    8105             :       }
    8106             :     }
    8107    84826580 :     if (Node.getIterator() == SortedPos) {
    8108             : #ifndef NDEBUG
    8109             :       allnodes_iterator I(N);
    8110             :       SDNode *S = &*++I;
    8111             :       dbgs() << "Overran sorted position:\n";
    8112             :       S->dumprFull(this); dbgs() << "\n";
    8113             :       dbgs() << "Checking if this is due to cycles\n";
    8114             :       checkForCycles(this, true);
    8115             : #endif
    8116           0 :       llvm_unreachable(nullptr);
    8117             :     }
    8118             :   }
    8119             : 
    8120             :   assert(SortedPos == AllNodes.end() &&
    8121             :          "Topological sort incomplete!");
    8122             :   assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
    8123             :          "First node in topological sort is not the entry token!");
    8124             :   assert(AllNodes.front().getNodeId() == 0 &&
    8125             :          "First node in topological sort has non-zero id!");
    8126             :   assert(AllNodes.front().getNumOperands() == 0 &&
    8127             :          "First node in topological sort has operands!");
    8128             :   assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
    8129             :          "Last node in topologic sort has unexpected id!");
    8130             :   assert(AllNodes.back().use_empty() &&
    8131             :          "Last node in topologic sort has users!");
    8132             :   assert(DAGSize == allnodes_size() && "Node count mismatch!");
    8133     2824773 :   return DAGSize;
    8134             : }
    8135             : 
    8136             : /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
    8137             : /// value is produced by SD.
    8138      104573 : void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
    8139      104573 :   if (SD) {
    8140             :     assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
    8141             :     SD->setHasDebugValue(true);
    8142             :   }
    8143      104573 :   DbgInfo->add(DB, SD, isParameter);
    8144      104573 : }
    8145             : 
    8146           1 : void SelectionDAG::AddDbgLabel(SDDbgLabel *DB) {
    8147           1 :   DbgInfo->add(DB);
    8148           1 : }
    8149             : 
    8150        3300 : SDValue SelectionDAG::makeEquivalentMemoryOrdering(LoadSDNode *OldLoad,
    8151             :                                                    SDValue NewMemOp) {
    8152             :   assert(isa<MemSDNode>(NewMemOp.getNode()) && "Expected a memop node");
    8153             :   // The new memory operation must have the same position as the old load in
    8154             :   // terms of memory dependency. Create a TokenFactor for the old load and new
    8155             :   // memory operation and update uses of the old load's output chain to use that
    8156             :   // TokenFactor.
    8157             :   SDValue OldChain = SDValue(OldLoad, 1);
    8158        3300 :   SDValue NewChain = SDValue(NewMemOp.getNode(), 1);
    8159        3300 :   if (!OldLoad->hasAnyUseOfValue(1))
    8160        2980 :     return NewChain;
    8161             : 
    8162             :   SDValue TokenFactor =
    8163         320 :       getNode(ISD::TokenFactor, SDLoc(OldLoad), MVT::Other, OldChain, NewChain);
    8164         320 :   ReplaceAllUsesOfValueWith(OldChain, TokenFactor);
    8165         320 :   UpdateNodeOperands(TokenFactor.getNode(), OldChain, NewChain);
    8166         320 :   return TokenFactor;
    8167             : }
    8168             : 
    8169             : //===----------------------------------------------------------------------===//
    8170             : //                              SDNode Class
    8171             : //===----------------------------------------------------------------------===//
    8172             : 
    8173     7655837 : bool llvm::isNullConstant(SDValue V) {
    8174             :   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
    8175    11960468 :   return Const != nullptr && Const->isNullValue();
    8176             : }
    8177             : 
    8178     1020968 : bool llvm::isNullFPConstant(SDValue V) {
    8179             :   ConstantFPSDNode *Const = dyn_cast<ConstantFPSDNode>(V);
    8180      144346 :   return Const != nullptr && Const->isZero() && !Const->isNegative();
    8181             : }
    8182             : 
    8183     1026045 : bool llvm::isAllOnesConstant(SDValue V) {
    8184             :   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
    8185     1604516 :   return Const != nullptr && Const->isAllOnesValue();
    8186             : }
    8187             : 
    8188      325595 : bool llvm::isOneConstant(SDValue V) {
    8189             :   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
    8190      409044 :   return Const != nullptr && Const->isOne();
    8191             : }
    8192             : 
    8193     8598410 : SDValue llvm::peekThroughBitcasts(SDValue V) {
    8194     9825208 :   while (V.getOpcode() == ISD::BITCAST)
    8195     1226798 :     V = V.getOperand(0);
    8196     8598410 :   return V;
    8197             : }
    8198             : 
    8199      471610 : SDValue llvm::peekThroughOneUseBitcasts(SDValue V) {
    8200      624783 :   while (V.getOpcode() == ISD::BITCAST && V.getOperand(0).hasOneUse())
    8201      153173 :     V = V.getOperand(0);
    8202      471610 :   return V;
    8203             : }
    8204             : 
    8205     3726988 : bool llvm::isBitwiseNot(SDValue V) {
    8206     3726988 :   if (V.getOpcode() != ISD::XOR)
    8207             :     return false;
    8208        2741 :   ConstantSDNode *C = isConstOrConstSplat(V.getOperand(1));
    8209        4286 :   return C && C->isAllOnesValue();
    8210             : }
    8211             : 
    8212    12595914 : ConstantSDNode *llvm::isConstOrConstSplat(SDValue N) {
    8213             :   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N))
    8214             :     return CN;
    8215             : 
    8216             :   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) {
    8217             :     BitVector UndefElements;
    8218      298060 :     ConstantSDNode *CN = BV->getConstantSplatNode(&UndefElements);
    8219             : 
    8220             :     // BuildVectors can truncate their operands. Ignore that case here.
    8221             :     // FIXME: We blindly ignore splats which include undef which is overly
    8222             :     // pessimistic.
    8223      574786 :     if (CN && UndefElements.none() &&
    8224      847849 :         CN->getValueType(0) == N.getValueType().getScalarType())
    8225             :       return CN;
    8226             :   }
    8227             : 
    8228             :   return nullptr;
    8229             : }
    8230             : 
    8231      233143 : ConstantFPSDNode *llvm::isConstOrConstSplatFP(SDValue N) {
    8232             :   if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N))
    8233             :     return CN;
    8234             : 
    8235             :   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) {
    8236             :     BitVector UndefElements;
    8237        6734 :     ConstantFPSDNode *CN = BV->getConstantFPSplatNode(&UndefElements);
    8238             : 
    8239        9311 :     if (CN && UndefElements.none())
    8240             :       return CN;
    8241             :   }
    8242             : 
    8243             :   return nullptr;
    8244             : }
    8245             : 
    8246    26265612 : HandleSDNode::~HandleSDNode() {
    8247    13132806 :   DropOperands();
    8248    13132806 : }
    8249             : 
    8250     3488528 : GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
    8251             :                                          const DebugLoc &DL,
    8252             :                                          const GlobalValue *GA, EVT VT,
    8253     3488528 :                                          int64_t o, unsigned char TF)
    8254     4319410 :     : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
    8255     3488528 :   TheGlobal = GA;
    8256     3488528 : }
    8257             : 
    8258         213 : AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl,
    8259             :                                          EVT VT, unsigned SrcAS,
    8260         213 :                                          unsigned DestAS)
    8261             :     : SDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT)),
    8262         215 :       SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
    8263             : 
    8264    13696544 : MemSDNode::MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
    8265    13696544 :                      SDVTList VTs, EVT memvt, MachineMemOperand *mmo)
    8266    15593155 :     : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
    8267    27393088 :   MemSDNodeBits.IsVolatile = MMO->isVolatile();
    8268    27393088 :   MemSDNodeBits.IsNonTemporal = MMO->isNonTemporal();
    8269    27393088 :   MemSDNodeBits.IsDereferenceable = MMO->isDereferenceable();
    8270    27393088 :   MemSDNodeBits.IsInvariant = MMO->isInvariant();
    8271             : 
    8272             :   // We check here that the size of the memory operand fits within the size of
    8273             :   // the MMO. This is because the MMO might indicate only a possible address
    8274             :   // range instead of specifying the affected memory addresses precisely.
    8275             :   assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
    8276    13696544 : }
    8277             : 
    8278             : /// Profile - Gather unique data for the node.
    8279             : ///
    8280   100914507 : void SDNode::Profile(FoldingSetNodeID &ID) const {
    8281   100914507 :   AddNodeIDNode(ID, this);
    8282   100914507 : }
    8283             : 
    8284             : namespace {
    8285             : 
    8286       27539 :   struct EVTArray {
    8287             :     std::vector<EVT> VTs;
    8288             : 
    8289       28034 :     EVTArray() {
    8290       28034 :       VTs.reserve(MVT::LAST_VALUETYPE);
    8291     3223910 :       for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
    8292     3195876 :         VTs.push_back(MVT((MVT::SimpleValueType)i));
    8293       28034 :     }
    8294             :   };
    8295             : 
    8296             : } // end anonymous namespace
    8297             : 
    8298             : static ManagedStatic<std::set<EVT, EVT::compareRawBits>> EVTs;
    8299             : static ManagedStatic<EVTArray> SimpleVTArray;
    8300             : static ManagedStatic<sys::SmartMutex<true>> VTMutex;
    8301             : 
    8302             : /// getValueTypeList - Return a pointer to the specified value type.
    8303             : ///
    8304   138171700 : const EVT *SDNode::getValueTypeList(EVT VT) {
    8305   138171700 :   if (VT.isExtended()) {
    8306      102698 :     sys::SmartScopedLock<true> Lock(*VTMutex);
    8307             :     return &(*EVTs->insert(VT).first);
    8308             :   } else {
    8309             :     assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
    8310             :            "Value type out of range!");
    8311   138069002 :     return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
    8312             :   }
    8313             : }
    8314             : 
    8315             : /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
    8316             : /// indicated value.  This method ignores uses of other values defined by this
    8317             : /// operation.
    8318    21395583 : bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
    8319             :   assert(Value < getNumValues() && "Bad value!");
    8320             : 
    8321             :   // TODO: Only iterate over uses of a given value of the node
    8322    49648390 :   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
    8323    34058473 :     if (UI.getUse().getResNo() == Value) {
    8324    27201041 :       if (NUses == 0)
    8325             :         return false;
    8326    21395375 :       --NUses;
    8327             :     }
    8328             :   }
    8329             : 
    8330             :   // Found exactly the right number of uses?
    8331    15589917 :   return NUses == 0;
    8332             : }
    8333             : 
    8334             : /// hasAnyUseOfValue - Return true if there are any use of the indicated
    8335             : /// value. This method ignores uses of other values defined by this operation.
    8336    24053122 : bool SDNode::hasAnyUseOfValue(unsigned Value) const {
    8337             :   assert(Value < getNumValues() && "Bad value!");
    8338             : 
    8339    35137692 :   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
    8340    28604005 :     if (UI.getUse().getResNo() == Value)
    8341             :       return true;
    8342             : 
    8343             :   return false;
    8344             : }
    8345             : 
    8346             : /// isOnlyUserOf - Return true if this node is the only use of N.
    8347      369142 : bool SDNode::isOnlyUserOf(const SDNode *N) const {
    8348             :   bool Seen = false;
    8349      562435 :   for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
    8350             :     SDNode *User = *I;
    8351      443165 :     if (User == this)
    8352             :       Seen = true;
    8353             :     else
    8354             :       return false;
    8355             :   }
    8356             : 
    8357             :   return Seen;
    8358             : }
    8359             : 
    8360             : /// Return true if the only users of N are contained in Nodes.
    8361       50161 : bool SDNode::areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N) {
    8362             :   bool Seen = false;
    8363       87254 :   for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
    8364       82381 :     SDNode *User = *I;
    8365       82381 :     if (llvm::any_of(Nodes,
    8366           0 :                      [&User](const SDNode *Node) { return User == Node; }))
    8367             :       Seen = true;
    8368             :     else
    8369       45288 :       return false;
    8370             :   }
    8371             : 
    8372             :   return Seen;
    8373             : }
    8374             : 
    8375             : /// isOperand - Return true if this node is an operand of N.
    8376     2708138 : bool SDValue::isOperandOf(const SDNode *N) const {
    8377    11896698 :   for (const SDValue &Op : N->op_values())
    8378     9225393 :     if (*this == Op)
    8379             :       return true;
    8380             :   return false;
    8381             : }
    8382             : 
    8383         194 : bool SDNode::isOperandOf(const SDNode *N) const {
    8384         596 :   for (const SDValue &Op : N->op_values())
    8385         540 :     if (this == Op.getNode())
    8386             :       return true;
    8387             :   return false;
    8388             : }
    8389             : 
    8390             : /// reachesChainWithoutSideEffects - Return true if this operand (which must
    8391             : /// be a chain) reaches the specified operand without crossing any
    8392             : /// side-effecting instructions on any chain path.  In practice, this looks
    8393             : /// through token factors and non-volatile loads.  In order to remain efficient,
    8394             : /// this only looks a couple of nodes in, it does not do an exhaustive search.
    8395             : ///
    8396             : /// Note that we only need to examine chains when we're searching for
    8397             : /// side-effects; SelectionDAG requires that all side-effects are represented
    8398             : /// by chains, even if another operand would force a specific ordering. This
    8399             : /// constraint is necessary to allow transformations like splitting loads.
    8400        2481 : bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
    8401             :                                              unsigned Depth) const {
    8402        2481 :   if (*this == Dest) return true;
    8403             : 
    8404             :   // Don't search too deeply, we just want to be able to see through
    8405             :   // TokenFactor's etc.
    8406        1041 :   if (Depth == 0) return false;
    8407             : 
    8408             :   // If this is a token factor, all inputs to the TF happen in parallel.
    8409        1002 :   if (getOpcode() == ISD::TokenFactor) {
    8410             :     // First, try a shallow search.
    8411          79 :     if (is_contained((*this)->ops(), Dest)) {
    8412             :       // We found the chain we want as an operand of this TokenFactor.
    8413             :       // Essentially, we reach the chain without side-effects if we could
    8414             :       // serialize the TokenFactor into a simple chain of operations with
    8415             :       // Dest as the last operation. This is automatically true if the
    8416             :       // chain has one use: there are no other ordering constraints.
    8417             :       // If the chain has more than one use, we give up: some other
    8418             :       // use of Dest might force a side-effect between Dest and the current
    8419             :       // node.
    8420          41 :       if (Dest.hasOneUse())
    8421             :         return true;
    8422             :     }
    8423             :     // Next, try a deep search: check whether every operand of the TokenFactor
    8424             :     // reaches Dest.
    8425         132 :     return llvm::all_of((*this)->ops(), [=](SDValue Op) {
    8426           0 :       return Op.reachesChainWithoutSideEffects(Dest, Depth - 1);
    8427             :     });
    8428             :   }
    8429             : 
    8430             :   // Loads don't have side effects, look through them.
    8431             :   if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
    8432         163 :     if (!Ld->isVolatile())
    8433         163 :       return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
    8434             :   }
    8435             :   return false;
    8436             : }
    8437             : 
    8438        5902 : bool SDNode::hasPredecessor(const SDNode *N) const {
    8439             :   SmallPtrSet<const SDNode *, 32> Visited;
    8440             :   SmallVector<const SDNode *, 16> Worklist;
    8441        5902 :   Worklist.push_back(this);
    8442        5902 :   return hasPredecessorHelper(N, Visited, Worklist);
    8443             : }
    8444             : 
    8445      875314 : void SDNode::intersectFlagsWith(const SDNodeFlags Flags) {
    8446      875314 :   this->Flags.intersectWith(Flags);
    8447      875314 : }
    8448             : 
    8449             : SDValue
    8450       86672 : SelectionDAG::matchBinOpReduction(SDNode *Extract, ISD::NodeType &BinOp,
    8451             :                                   ArrayRef<ISD::NodeType> CandidateBinOps) {
    8452             :   // The pattern must end in an extract from index 0.
    8453      173344 :   if (Extract->getOpcode() != ISD::EXTRACT_VECTOR_ELT ||
    8454      173344 :       !isNullConstant(Extract->getOperand(1)))
    8455       42473 :     return SDValue();
    8456             : 
    8457       44199 :   SDValue Op = Extract->getOperand(0);
    8458       88398 :   unsigned Stages = Log2_32(Op.getValueType().getVectorNumElements());
    8459             : 
    8460             :   // Match against one of the candidate binary ops.
    8461       44199 :   if (llvm::none_of(CandidateBinOps, [Op](ISD::NodeType BinOp) {
    8462           0 :         return Op.getOpcode() == unsigned(BinOp);
    8463             :       }))
    8464       42718 :     return SDValue();
    8465             : 
    8466             :   // At each stage, we're looking for something that looks like:
    8467             :   // %s = shufflevector <8 x i32> %op, <8 x i32> undef,
    8468             :   //                    <8 x i32> <i32 2, i32 3, i32 undef, i32 undef,
    8469             :   //                               i32 undef, i32 undef, i32 undef, i32 undef>
    8470             :   // %a = binop <8 x i32> %op, %s
    8471             :   // Where the mask changes according to the stage. E.g. for a 3-stage pyramid,
    8472             :   // we expect something like:
    8473             :   // <4,5,6,7,u,u,u,u>
    8474             :   // <2,3,u,u,u,u,u,u>
    8475             :   // <1,u,u,u,u,u,u,u>
    8476             :   unsigned CandidateBinOp = Op.getOpcode();
    8477        5044 :   for (unsigned i = 0; i < Stages; ++i) {
    8478        4071 :     if (Op.getOpcode() != CandidateBinOp)
    8479           2 :       return SDValue();
    8480             : 
    8481        4069 :     SDValue Op0 = Op.getOperand(0);
    8482        4069 :     SDValue Op1 = Op.getOperand(1);
    8483             : 
    8484             :     ShuffleVectorSDNode *Shuffle = dyn_cast<ShuffleVectorSDNode>(Op0);
    8485             :     if (Shuffle) {
    8486          57 :       Op = Op1;
    8487             :     } else {
    8488             :       Shuffle = dyn_cast<ShuffleVectorSDNode>(Op1);
    8489        4012 :       Op = Op0;
    8490             :     }
    8491             : 
    8492             :     // The first operand of the shuffle should be the same as the other operand
    8493             :     // of the binop.
    8494        4069 :     if (!Shuffle || Shuffle->getOperand(0) != Op)
    8495         506 :       return SDValue();
    8496             : 
    8497             :     // Verify the shuffle has the expected (at this stage of the pyramid) mask.
    8498       23895 :     for (int Index = 0, MaskEnd = 1 << i; Index < MaskEnd; ++Index)
    8499       40664 :       if (Shuffle->getMaskElt(Index) != MaskEnd + Index)
    8500           0 :         return SDValue();
    8501             :   }
    8502             : 
    8503         973 :   BinOp = (ISD::NodeType)CandidateBinOp;
    8504         973 :   return Op;
    8505             : }
    8506             : 
    8507        5609 : SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
    8508             :   assert(N->getNumValues() == 1 &&
    8509             :          "Can't unroll a vector with multiple results!");
    8510             : 
    8511       11218 :   EVT VT = N->getValueType(0);
    8512             :   unsigned NE = VT.getVectorNumElements();
    8513        5609 :   EVT EltVT = VT.getVectorElementType();
    8514             :   SDLoc dl(N);
    8515             : 
    8516             :   SmallVector<SDValue, 8> Scalars;
    8517        5609 :   SmallVector<SDValue, 4> Operands(N->getNumOperands());
    8518             : 
    8519             :   // If ResNE is 0, fully unroll the vector op.
    8520        5609 :   if (ResNE == 0)
    8521             :     ResNE = NE;
    8522          37 :   else if (NE > ResNE)
    8523             :     NE = ResNE;
    8524             : 
    8525             :   unsigned i;
    8526       22075 :   for (i= 0; i != NE; ++i) {
    8527       40482 :     for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
    8528       48032 :       SDValue Operand = N->getOperand(j);
    8529       24016 :       EVT OperandVT = Operand.getValueType();
    8530       24016 :       if (OperandVT.isVector()) {
    8531             :         // A vector operand; extract a single element.
    8532       23500 :         EVT OperandEltVT = OperandVT.getVectorElementType();
    8533       23500 :         Operands[j] =
    8534       23500 :             getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
    8535       23500 :                     getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
    8536             :       } else {
    8537             :         // A scalar operand; just use it as is.
    8538         516 :         Operands[j] = Operand;
    8539             :       }
    8540             :     }
    8541             : 
    8542       32932 :     switch (N->getOpcode()) {
    8543       15930 :     default: {
    8544       15930 :       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands,
    8545       31860 :                                 N->getFlags()));
    8546       15930 :       break;
    8547             :     }
    8548             :     case ISD::VSELECT:
    8549          52 :       Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
    8550          52 :       break;
    8551             :     case ISD::SHL:
    8552             :     case ISD::SRA:
    8553             :     case ISD::SRL:
    8554             :     case ISD::ROTL:
    8555             :     case ISD::ROTR:
    8556         412 :       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
    8557             :                                getShiftAmountOperand(Operands[0].getValueType(),
    8558         824 :                                                      Operands[1])));
    8559         412 :       break;
    8560             :     case ISD::SIGN_EXTEND_INREG:
    8561             :     case ISD::FP_ROUND_INREG: {
    8562          72 :       EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
    8563          72 :       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
    8564             :                                 Operands[0],
    8565         144 :                                 getValueType(ExtVT)));
    8566             :     }
    8567             :     }
    8568             :   }
    8569             : 
    8570        5658 :   for (; i < ResNE; ++i)
    8571          49 :     Scalars.push_back(getUNDEF(EltVT));
    8572             : 
    8573        5609 :   EVT VecVT = EVT::getVectorVT(*getContext(), EltVT, ResNE);
    8574        5609 :   return getBuildVector(VecVT, dl, Scalars);
    8575             : }
    8576             : 
    8577        5796 : bool SelectionDAG::areNonVolatileConsecutiveLoads(LoadSDNode *LD,
    8578             :                                                   LoadSDNode *Base,
    8579             :                                                   unsigned Bytes,
    8580             :                                                   int Dist) const {
    8581        5796 :   if (LD->isVolatile() || Base->isVolatile())
    8582          91 :     return false;
    8583        5705 :   if (LD->isIndexed() || Base->isIndexed())
    8584             :     return false;
    8585             :   if (LD->getChain() != Base->getChain())
    8586             :     return false;
    8587        5396 :   EVT VT = LD->getValueType(0);
    8588        5396 :   if (VT.getSizeInBits() / 8 != Bytes)
    8589             :     return false;
    8590             : 
    8591        5396 :   auto BaseLocDecomp = BaseIndexOffset::match(Base, *this);
    8592        5396 :   auto LocDecomp = BaseIndexOffset::match(LD, *this);
    8593             : 
    8594        5396 :   int64_t Offset = 0;
    8595        5396 :   if (BaseLocDecomp.equalBaseIndex(LocDecomp, *this, Offset))
    8596        5135 :     return (Dist * Bytes == Offset);
    8597             :   return false;
    8598             : }
    8599             : 
    8600             : /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
    8601             : /// it cannot be inferred.
    8602     7722599 : unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
    8603             :   // If this is a GlobalAddress + cst, return the alignment.
    8604             :   const GlobalValue *GV;
    8605     7722599 :   int64_t GVOffset = 0;
    8606     7722599 :   if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
    8607     2884390 :     unsigned IdxWidth = getDataLayout().getIndexTypeSizeInBits(GV->getType());
    8608     2889588 :     KnownBits Known(IdxWidth);
    8609     2884390 :     llvm::computeKnownBits(GV, Known, getDataLayout());
    8610     2884390 :     unsigned AlignBits = Known.countMinTrailingZeros();
    8611     2884390 :     unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
    8612     2879192 :     if (Align)
    8613     5758384 :       return MinAlign(Align, GVOffset);
    8614             :   }
    8615             : 
    8616             :   // If this is a direct reference to a stack slot, use information about the
    8617             :   // stack slot's alignment.
    8618             :   int FrameIdx = 1 << 31;
    8619             :   int64_t FrameOffset = 0;
    8620             :   if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
    8621     1728181 :     FrameIdx = FI->getIndex();
    8622     3115226 :   } else if (isBaseWithConstantOffset(Ptr) &&
    8623             :              isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
    8624             :     // Handle FI+Cst
    8625      245790 :     FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
    8626      245790 :     FrameOffset = Ptr.getConstantOperandVal(1);
    8627             :   }
    8628             : 
    8629     1973971 :   if (FrameIdx != (1 << 31)) {
    8630     1973971 :     const MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
    8631     3947942 :     unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
    8632     1973971 :                                     FrameOffset);
    8633     1973971 :     return FIInfoAlign;
    8634             :   }
    8635             : 
    8636             :   return 0;
    8637             : }
    8638             : 
    8639             : /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
    8640             : /// which is split (or expanded) into two not necessarily identical pieces.
    8641      115135 : std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
    8642             :   // Currently all types are split in half.
    8643             :   EVT LoVT, HiVT;
    8644      115135 :   if (!VT.isVector())
    8645        1819 :     LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
    8646             :   else
    8647      113316 :     LoVT = HiVT = VT.getHalfNumVectorElementsVT(*getContext());
    8648             : 
    8649      115135 :   return std::make_pair(LoVT, HiVT);
    8650             : }
    8651             : 
    8652             : /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
    8653             : /// low/high part.
    8654             : std::pair<SDValue, SDValue>
    8655       17411 : SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
    8656             :                           const EVT &HiVT) {
    8657             :   assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
    8658             :          N.getValueType().getVectorNumElements() &&
    8659             :          "More vector elements requested than available!");
    8660             :   SDValue Lo, Hi;
    8661       17411 :   Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
    8662       17411 :                getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
    8663       17411 :   Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
    8664             :                getConstant(LoVT.getVectorNumElements(), DL,
    8665       34822 :                            TLI->getVectorIdxTy(getDataLayout())));
    8666       17411 :   return std::make_pair(Lo, Hi);
    8667             : }
    8668             : 
    8669       27885 : void SelectionDAG::ExtractVectorElements(SDValue Op,
    8670             :                                          SmallVectorImpl<SDValue> &Args,
    8671             :                                          unsigned Start, unsigned Count) {
    8672       27885 :   EVT VT = Op.getValueType();
    8673       27885 :   if (Count == 0)
    8674             :     Count = VT.getVectorNumElements();
    8675             : 
    8676       27885 :   EVT EltVT = VT.getVectorElementType();
    8677       27885 :   EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
    8678             :   SDLoc SL(Op);
    8679      134804 :   for (unsigned i = Start, e = Start + Count; i != e; ++i) {
    8680      213838 :     Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
    8681      213838 :                            Op, getConstant(i, SL, IdxTy)));
    8682             :   }
    8683       27885 : }
    8684             : 
    8685             : // getAddressSpace - Return the address space this GlobalAddress belongs to.
    8686        8549 : unsigned GlobalAddressSDNode::getAddressSpace() const {
    8687       17098 :   return getGlobal()->getType()->getAddressSpace();
    8688             : }
    8689             : 
    8690       34084 : Type *ConstantPoolSDNode::getType() const {
    8691       34084 :   if (isMachineConstantPoolEntry())
    8692         260 :     return Val.MachineCPVal->getType();
    8693       33824 :   return Val.ConstVal->getType();
    8694             : }
    8695             : 
    8696      394435 : bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
    8697             :                                         unsigned &SplatBitSize,
    8698             :                                         bool &HasAnyUndefs,
    8699             :                                         unsigned MinSplatBits,
    8700             :                                         bool IsBigEndian) const {
    8701      394435 :   EVT VT = getValueType(0);
    8702             :   assert(VT.isVector() && "Expected a vector type");
    8703      394435 :   unsigned VecWidth = VT.getSizeInBits();
    8704      394435 :   if (MinSplatBits > VecWidth)
    8705             :     return false;
    8706             : 
    8707             :   // FIXME: The widths are based on this node's type, but build vectors can
    8708             :   // truncate their operands.
    8709      394435 :   SplatValue = APInt(VecWidth, 0);
    8710      394435 :   SplatUndef = APInt(VecWidth, 0);
    8711             : 
    8712             :   // Get the bits. Bits with undefined values (when the corresponding element
    8713             :   // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
    8714             :   // in SplatValue. If any of the values are not constant, give up and return
    8715             :   // false.
    8716      394435 :   unsigned int NumOps = getNumOperands();
    8717             :   assert(NumOps > 0 && "isConstantSplat has 0-size build vector");
    8718             :   unsigned EltWidth = VT.getScalarSizeInBits();
    8719             : 
    8720     1440933 :   for (unsigned j = 0; j < NumOps; ++j) {
    8721     1053674 :     unsigned i = IsBigEndian ? NumOps - 1 - j : j;
    8722     1053674 :     SDValue OpVal = getOperand(i);
    8723     1053674 :     unsigned BitPos = j * EltWidth;
    8724             : 
    8725     1053674 :     if (OpVal.isUndef())
    8726       14085 :       SplatUndef.setBits(BitPos, BitPos + EltWidth);
    8727             :     else if (auto *CN = dyn_cast<ConstantSDNode>(OpVal))
    8728     3081609 :       SplatValue.insertBits(CN->getAPIntValue().zextOrTrunc(EltWidth), BitPos);
    8729             :     else if (auto *CN = dyn_cast<ConstantFPSDNode>(OpVal))
    8730       15630 :       SplatValue.insertBits(CN->getValueAPF().bitcastToAPInt(), BitPos);
    8731             :     else
    8732             :       return false;
    8733             :   }
    8734             : 
    8735             :   // The build_vector is all constants or undefs. Find the smallest element
    8736             :   // size that splats the vector.
    8737      387259 :   HasAnyUndefs = (SplatUndef != 0);
    8738             : 
    8739             :   // FIXME: This does not work for vectors with elements less than 8 bits.
    8740      792806 :   while (VecWidth > 8) {
    8741      788844 :     unsigned HalfSize = VecWidth / 2;
    8742      788844 :     APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
    8743      788844 :     APInt LowValue = SplatValue.trunc(HalfSize);
    8744      788844 :     APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
    8745      788844 :     APInt LowUndef = SplatUndef.trunc(HalfSize);
    8746             : 
    8747             :     // If the two halves do not match (ignoring undef bits), stop here.
    8748     1589401 :     if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
    8749             :         MinSplatBits > HalfSize)
    8750             :       break;
    8751             : 
    8752      405547 :     SplatValue = HighValue | LowValue;
    8753      405547 :     SplatUndef = HighUndef & LowUndef;
    8754             : 
    8755             :     VecWidth = HalfSize;
    8756             :   }
    8757             : 
    8758      387259 :   SplatBitSize = VecWidth;
    8759      387259 :   return true;
    8760             : }
    8761             : 
    8762      684701 : SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
    8763      684701 :   if (UndefElements) {
    8764             :     UndefElements->clear();
    8765      673774 :     UndefElements->resize(getNumOperands());
    8766             :   }
    8767             :   SDValue Splatted;
    8768     4417704 :   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
    8769     7692632 :     SDValue Op = getOperand(i);
    8770     3846316 :     if (Op.isUndef()) {
    8771       28466 :       if (UndefElements)
    8772             :         (*UndefElements)[i] = true;
    8773     3817850 :     } else if (!Splatted) {
    8774             :       Splatted = Op;
    8775             :     } else if (Splatted != Op) {
    8776      113313 :       return SDValue();
    8777             :     }
    8778             :   }
    8779             : 
    8780      571388 :   if (!Splatted) {
    8781             :     assert(getOperand(0).isUndef() &&
    8782             :            "Can only have a splat without a constant for all undefs.");
    8783          84 :     return getOperand(0);
    8784             :   }
    8785             : 
    8786      571304 :   return Splatted;
    8787             : }
    8788             : 
    8789             : ConstantSDNode *
    8790      315711 : BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
    8791      315711 :   return dyn_cast_or_null<ConstantSDNode>(getSplatValue(UndefElements));
    8792             : }
    8793             : 
    8794             : ConstantFPSDNode *
    8795        6783 : BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
    8796        6783 :   return dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements));
    8797             : }
    8798             : 
    8799             : int32_t
    8800          55 : BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
    8801             :                                                    uint32_t BitWidth) const {
    8802             :   if (ConstantFPSDNode *CN =
    8803          56 :           dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements))) {
    8804             :     bool IsExact;
    8805          54 :     APSInt IntVal(BitWidth);
    8806          54 :     const APFloat &APF = CN->getValueAPF();
    8807          54 :     if (APF.convertToInteger(IntVal, APFloat::rmTowardZero, &IsExact) !=
    8808          54 :             APFloat::opOK ||
    8809          48 :         !IsExact)
    8810             :       return -1;
    8811             : 
    8812          48 :     return IntVal.exactLogBase2();
    8813             :   }
    8814             :   return -1;
    8815             : }
    8816             : 
    8817      426763 : bool BuildVectorSDNode::isConstant() const {
    8818     2208160 :   for (const SDValue &Op : op_values()) {
    8819     1838802 :     unsigned Opc = Op.getOpcode();
    8820     1838802 :     if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
    8821             :       return false;
    8822             :   }
    8823             :   return true;
    8824             : }
    8825             : 
    8826       79040 : bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
    8827             :   // Find the first non-undef value in the shuffle mask.
    8828             :   unsigned i, e;
    8829       84932 :   for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
    8830             :     /* search */;
    8831             : 
    8832             :   assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
    8833             : 
    8834             :   // Make sure all remaining elements are either undef or the same as the first
    8835             :   // non-undef value.
    8836      303809 :   for (int Idx = Mask[i]; i != e; ++i)
    8837      288404 :     if (Mask[i] >= 0 && Mask[i] != Idx)
    8838             :       return false;
    8839             :   return true;
    8840             : }
    8841             : 
    8842             : // Returns the SDNode if it is a constant integer BuildVector
    8843             : // or constant integer.
    8844     6437048 : SDNode *SelectionDAG::isConstantIntBuildVectorOrConstantInt(SDValue N) {
    8845             :   if (isa<ConstantSDNode>(N))
    8846             :     return N.getNode();
    8847     5919314 :   if (ISD::isBuildVectorOfConstantSDNodes(N.getNode()))
    8848             :     return N.getNode();
    8849             :   // Treat a GlobalAddress supporting constant offset folding as a
    8850             :   // constant integer.
    8851             :   if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N))
    8852     1098996 :     if (GA->getOpcode() == ISD::GlobalAddress &&
    8853      549490 :         TLI->isOffsetFoldingLegal(GA))
    8854        1410 :       return GA;
    8855             :   return nullptr;
    8856             : }
    8857             : 
    8858        6162 : SDNode *SelectionDAG::isConstantFPBuildVectorOrConstantFP(SDValue N) {
    8859             :   if (isa<ConstantFPSDNode>(N))
    8860             :     return N.getNode();
    8861             : 
    8862        5824 :   if (ISD::isBuildVectorOfConstantFPSDNodes(N.getNode()))
    8863           4 :     return N.getNode();
    8864             : 
    8865             :   return nullptr;
    8866             : }
    8867             : 
    8868    42711321 : void SelectionDAG::createOperands(SDNode *Node, ArrayRef<SDValue> Vals) {
    8869             :   assert(!Node->OperandList && "Node already has operands");
    8870    42711321 :   SDUse *Ops = OperandRecycler.allocate(
    8871    42711321 :     ArrayRecycler<SDUse>::Capacity::get(Vals.size()), OperandAllocator);
    8872             : 
    8873             :   bool IsDivergent = false;
    8874   188738437 :   for (unsigned I = 0; I != Vals.size(); ++I) {
    8875   146027115 :     Ops[I].setUser(Node);
    8876   146027115 :     Ops[I].setInitial(Vals[I]);
    8877   146027115 :     if (Ops[I].Val.getValueType() != MVT::Other) // Skip Chain. It does not carry divergence.
    8878   109475167 :       IsDivergent = IsDivergent || Ops[I].getNode()->isDivergent();
    8879             :   }
    8880    42711322 :   Node->NumOperands = Vals.size();
    8881    42711322 :   Node->OperandList = Ops;
    8882    42711322 :   IsDivergent |= TLI->isSDNodeSourceOfDivergence(Node, FLI, DA);
    8883    42711322 :   if (!TLI->isSDNodeAlwaysUniform(Node))
    8884    42598837 :     Node->SDNodeBits.IsDivergent = IsDivergent;
    8885    42711322 :   checkForCycles(Node);
    8886    42711322 : }
    8887             : 
    8888             : #ifndef NDEBUG
    8889             : static void checkForCyclesHelper(const SDNode *N,
    8890             :                                  SmallPtrSetImpl<const SDNode*> &Visited,
    8891             :                                  SmallPtrSetImpl<const SDNode*> &Checked,
    8892             :                                  const llvm::SelectionDAG *DAG) {
    8893             :   // If this node has already been checked, don't check it again.
    8894             :   if (Checked.count(N))
    8895             :     return;
    8896             : 
    8897             :   // If a node has already been visited on this depth-first walk, reject it as
    8898             :   // a cycle.
    8899             :   if (!Visited.insert(N).second) {
    8900             :     errs() << "Detected cycle in SelectionDAG\n";
    8901             :     dbgs() << "Offending node:\n";
    8902             :     N->dumprFull(DAG); dbgs() << "\n";
    8903             :     abort();
    8904             :   }
    8905             : 
    8906             :   for (const SDValue &Op : N->op_values())
    8907             :     checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
    8908             : 
    8909             :   Checked.insert(N);
    8910             :   Visited.erase(N);
    8911             : }
    8912             : #endif
    8913             : 
    8914   253803145 : void llvm::checkForCycles(const llvm::SDNode *N,
    8915             :                           const llvm::SelectionDAG *DAG,
    8916             :                           bool force) {
    8917             : #ifndef NDEBUG
    8918             :   bool check = force;
    8919             : #ifdef EXPENSIVE_CHECKS
    8920             :   check = true;
    8921             : #endif  // EXPENSIVE_CHECKS
    8922             :   if (check) {
    8923             :     assert(N && "Checking nonexistent SDNode");
    8924             :     SmallPtrSet<const SDNode*, 32> visited;
    8925             :     SmallPtrSet<const SDNode*, 32> checked;
    8926             :     checkForCyclesHelper(N, visited, checked, DAG);
    8927             :   }
    8928             : #endif  // !NDEBUG
    8929   253803145 : }
    8930             : 
    8931    20719341 : void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
    8932    20719341 :   checkForCycles(DAG->getRoot().getNode(), DAG, force);
    8933    20719341 : }

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