LCOV - code coverage report
Current view: top level - lib/CodeGen/SelectionDAG - SelectionDAG.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 3588 3741 95.9 %
Date: 2018-06-17 00:07:59 Functions: 282 290 97.2 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- SelectionDAG.cpp - Implement the SelectionDAG data structures ------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This implements the SelectionDAG class.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #include "llvm/CodeGen/SelectionDAG.h"
      15             : #include "SDNodeDbgValue.h"
      16             : #include "llvm/ADT/APFloat.h"
      17             : #include "llvm/ADT/APInt.h"
      18             : #include "llvm/ADT/APSInt.h"
      19             : #include "llvm/ADT/ArrayRef.h"
      20             : #include "llvm/ADT/BitVector.h"
      21             : #include "llvm/ADT/FoldingSet.h"
      22             : #include "llvm/ADT/None.h"
      23             : #include "llvm/ADT/STLExtras.h"
      24             : #include "llvm/ADT/SmallPtrSet.h"
      25             : #include "llvm/ADT/SmallVector.h"
      26             : #include "llvm/ADT/Triple.h"
      27             : #include "llvm/ADT/Twine.h"
      28             : #include "llvm/Analysis/ValueTracking.h"
      29             : #include "llvm/CodeGen/ISDOpcodes.h"
      30             : #include "llvm/CodeGen/MachineBasicBlock.h"
      31             : #include "llvm/CodeGen/MachineConstantPool.h"
      32             : #include "llvm/CodeGen/MachineFrameInfo.h"
      33             : #include "llvm/CodeGen/MachineFunction.h"
      34             : #include "llvm/CodeGen/MachineMemOperand.h"
      35             : #include "llvm/CodeGen/RuntimeLibcalls.h"
      36             : #include "llvm/CodeGen/SelectionDAGAddressAnalysis.h"
      37             : #include "llvm/CodeGen/SelectionDAGNodes.h"
      38             : #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
      39             : #include "llvm/CodeGen/TargetLowering.h"
      40             : #include "llvm/CodeGen/TargetRegisterInfo.h"
      41             : #include "llvm/CodeGen/TargetSubtargetInfo.h"
      42             : #include "llvm/CodeGen/ValueTypes.h"
      43             : #include "llvm/IR/Constant.h"
      44             : #include "llvm/IR/Constants.h"
      45             : #include "llvm/IR/DataLayout.h"
      46             : #include "llvm/IR/DebugInfoMetadata.h"
      47             : #include "llvm/IR/DebugLoc.h"
      48             : #include "llvm/IR/DerivedTypes.h"
      49             : #include "llvm/IR/Function.h"
      50             : #include "llvm/IR/GlobalValue.h"
      51             : #include "llvm/IR/Metadata.h"
      52             : #include "llvm/IR/Type.h"
      53             : #include "llvm/IR/Value.h"
      54             : #include "llvm/Support/Casting.h"
      55             : #include "llvm/Support/CodeGen.h"
      56             : #include "llvm/Support/Compiler.h"
      57             : #include "llvm/Support/Debug.h"
      58             : #include "llvm/Support/ErrorHandling.h"
      59             : #include "llvm/Support/KnownBits.h"
      60             : #include "llvm/Support/MachineValueType.h"
      61             : #include "llvm/Support/ManagedStatic.h"
      62             : #include "llvm/Support/MathExtras.h"
      63             : #include "llvm/Support/Mutex.h"
      64             : #include "llvm/Support/raw_ostream.h"
      65             : #include "llvm/Target/TargetMachine.h"
      66             : #include "llvm/Target/TargetOptions.h"
      67             : #include <algorithm>
      68             : #include <cassert>
      69             : #include <cstdint>
      70             : #include <cstdlib>
      71             : #include <limits>
      72             : #include <set>
      73             : #include <string>
      74             : #include <utility>
      75             : #include <vector>
      76             : 
      77             : using namespace llvm;
      78             : 
      79             : /// makeVTList - Return an instance of the SDVTList struct initialized with the
      80             : /// specified members.
      81             : static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
      82             :   SDVTList Res = {VTs, NumVTs};
      83             :   return Res;
      84             : }
      85             : 
      86             : // Default null implementations of the callbacks.
      87           0 : void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
      88    14544720 : void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
      89             : 
      90             : #define DEBUG_TYPE "selectiondag"
      91             : 
      92      101169 : static cl::opt<bool> EnableMemCpyDAGOpt("enable-memcpy-dag-opt",
      93      202338 :        cl::Hidden, cl::init(true),
      94      202338 :        cl::desc("Gang up loads and stores generated by inlining of memcpy"));
      95             : 
      96      101169 : static cl::opt<int> MaxLdStGlue("ldstmemcpy-glue-max",
      97      101169 :        cl::desc("Number limit for gluing ld/st of memcpy."),
      98      303507 :        cl::Hidden, cl::init(0));
      99             : 
     100             : static void NewSDValueDbgMsg(SDValue V, StringRef Msg, SelectionDAG *G) {
     101             :   LLVM_DEBUG(dbgs() << Msg; V.getNode()->dump(G););
     102             : }
     103             : 
     104             : //===----------------------------------------------------------------------===//
     105             : //                              ConstantFPSDNode Class
     106             : //===----------------------------------------------------------------------===//
     107             : 
     108             : /// isExactlyValue - We don't rely on operator== working on double values, as
     109             : /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
     110             : /// As such, this method can be used to do an exact bit-for-bit comparison of
     111             : /// two floating point values.
     112           3 : bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
     113           6 :   return getValueAPF().bitwiseIsEqual(V);
     114             : }
     115             : 
     116        1790 : bool ConstantFPSDNode::isValueValidForType(EVT VT,
     117             :                                            const APFloat& Val) {
     118             :   assert(VT.isFloatingPoint() && "Can only convert between FP types");
     119             : 
     120             :   // convert modifies in place, so make a copy.
     121             :   APFloat Val2 = APFloat(Val);
     122             :   bool losesInfo;
     123        1790 :   (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
     124             :                       APFloat::rmNearestTiesToEven,
     125             :                       &losesInfo);
     126        3580 :   return !losesInfo;
     127             : }
     128             : 
     129             : //===----------------------------------------------------------------------===//
     130             : //                              ISD Namespace
     131             : //===----------------------------------------------------------------------===//
     132             : 
     133      547393 : bool ISD::isConstantSplatVector(const SDNode *N, APInt &SplatVal) {
     134             :   auto *BV = dyn_cast<BuildVectorSDNode>(N);
     135             :   if (!BV)
     136             :     return false;
     137             : 
     138             :   APInt SplatUndef;
     139             :   unsigned SplatBitSize;
     140             :   bool HasUndefs;
     141      605322 :   unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
     142      302661 :   return BV->isConstantSplat(SplatVal, SplatUndef, SplatBitSize, HasUndefs,
     143      604911 :                              EltSize) &&
     144      302250 :          EltSize == SplatBitSize;
     145             : }
     146             : 
     147             : // FIXME: AllOnes and AllZeros duplicate a lot of code. Could these be
     148             : // specializations of the more general isConstantSplatVector()?
     149             : 
     150      354366 : bool ISD::isBuildVectorAllOnes(const SDNode *N) {
     151             :   // Look through a bit convert.
     152      940905 :   while (N->getOpcode() == ISD::BITCAST)
     153       77391 :     N = N->getOperand(0).getNode();
     154             : 
     155      354366 :   if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
     156             : 
     157      170389 :   unsigned i = 0, e = N->getNumOperands();
     158             : 
     159             :   // Skip over all of the undef values.
     160      518571 :   while (i != e && N->getOperand(i).isUndef())
     161        1878 :     ++i;
     162             : 
     163             :   // Do not accept an all-undef vector.
     164      170389 :   if (i == e) return false;
     165             : 
     166             :   // Do not accept build_vectors that aren't all constants or which have non-~0
     167             :   // elements. We have to be a bit careful here, as the type of the constant
     168             :   // may not be the same as the type of the vector elements due to type
     169             :   // legalization (the elements are promoted to a legal type for the target and
     170             :   // a vector of a type may be legal when the base element type is not).
     171             :   // We only want to check enough bits to cover the vector elements, because
     172             :   // we care if the resultant vector is all ones, not whether the individual
     173             :   // constants are.
     174      340670 :   SDValue NotZero = N->getOperand(i);
     175      511005 :   unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
     176             :   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
     177      315706 :     if (CN->getAPIntValue().countTrailingOnes() < EltSize)
     178             :       return false;
     179             :   } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
     180       11340 :     if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
     181             :       return false;
     182             :   } else
     183             :     return false;
     184             : 
     185             :   // Okay, we have at least one ~0 value, check to see if the rest match or are
     186             :   // undefs. Even with the above element type twiddling, this should be OK, as
     187             :   // the same type legalization should have applied to all the elements.
     188      498352 :   for (++i; i != e; ++i)
     189      378099 :     if (N->getOperand(i) != NotZero && !N->getOperand(i).isUndef())
     190             :       return false;
     191             :   return true;
     192             : }
     193             : 
     194     1446330 : bool ISD::isBuildVectorAllZeros(const SDNode *N) {
     195             :   // Look through a bit convert.
     196     3847722 :   while (N->getOpcode() == ISD::BITCAST)
     197      318354 :     N = N->getOperand(0).getNode();
     198             : 
     199     1446330 :   if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
     200             : 
     201             :   bool IsAllUndef = true;
     202     1875034 :   for (const SDValue &Op : N->op_values()) {
     203     3550340 :     if (Op.isUndef())
     204        9920 :       continue;
     205             :     IsAllUndef = false;
     206             :     // Do not accept build_vectors that aren't all constants or which have non-0
     207             :     // elements. We have to be a bit careful here, as the type of the constant
     208             :     // may not be the same as the type of the vector elements due to type
     209             :     // legalization (the elements are promoted to a legal type for the target
     210             :     // and a vector of a type may be legal when the base element type is not).
     211             :     // We only want to check enough bits to cover the vector elements, because
     212             :     // we care if the resultant vector is all zeros, not whether the individual
     213             :     // constants are.
     214     5295750 :     unsigned EltSize = N->getValueType(0).getScalarSizeInBits();
     215             :     if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
     216     3421850 :       if (CN->getAPIntValue().countTrailingZeros() < EltSize)
     217             :         return false;
     218             :     } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
     219      125106 :       if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
     220             :         return false;
     221             :     } else
     222             :       return false;
     223             :   }
     224             : 
     225             :   // Do not accept an all-undef vector.
     226       99864 :   if (IsAllUndef)
     227             :     return false;
     228       99803 :   return true;
     229             : }
     230             : 
     231     4353473 : bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
     232     4353473 :   if (N->getOpcode() != ISD::BUILD_VECTOR)
     233             :     return false;
     234             : 
     235      462438 :   for (const SDValue &Op : N->op_values()) {
     236      853180 :     if (Op.isUndef())
     237        5930 :       continue;
     238             :     if (!isa<ConstantSDNode>(Op))
     239             :       return false;
     240             :   }
     241             :   return true;
     242             : }
     243             : 
     244     1087118 : bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
     245     1087118 :   if (N->getOpcode() != ISD::BUILD_VECTOR)
     246             :     return false;
     247             : 
     248       29247 :   for (const SDValue &Op : N->op_values()) {
     249       50136 :     if (Op.isUndef())
     250         667 :       continue;
     251             :     if (!isa<ConstantFPSDNode>(Op))
     252             :       return false;
     253             :   }
     254             :   return true;
     255             : }
     256             : 
     257      387898 : bool ISD::allOperandsUndef(const SDNode *N) {
     258             :   // Return false if the node has no operands.
     259             :   // This is "logically inconsistent" with the definition of "all" but
     260             :   // is probably the desired behavior.
     261      775796 :   if (N->getNumOperands() == 0)
     262             :     return false;
     263             : 
     264      392250 :   for (const SDValue &Op : N->op_values())
     265      784282 :     if (!Op.isUndef())
     266             :       return false;
     267             : 
     268             :   return true;
     269             : }
     270             : 
     271      349940 : bool ISD::matchUnaryPredicate(SDValue Op,
     272             :                               std::function<bool(ConstantSDNode *)> Match) {
     273             :   if (auto *Cst = dyn_cast<ConstantSDNode>(Op))
     274      322399 :     return Match(Cst);
     275             : 
     276       27541 :   if (ISD::BUILD_VECTOR != Op.getOpcode())
     277             :     return false;
     278             : 
     279       11992 :   EVT SVT = Op.getValueType().getScalarType();
     280        6316 :   for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
     281             :     auto *Cst = dyn_cast<ConstantSDNode>(Op.getOperand(i));
     282       17770 :     if (!Cst || Cst->getValueType(0) != SVT || !Match(Cst))
     283             :       return false;
     284             :   }
     285             :   return true;
     286             : }
     287             : 
     288       42937 : bool ISD::matchBinaryPredicate(
     289             :     SDValue LHS, SDValue RHS,
     290             :     std::function<bool(ConstantSDNode *, ConstantSDNode *)> Match) {
     291       42983 :   if (LHS.getValueType() != RHS.getValueType())
     292             :     return false;
     293             : 
     294             :   if (auto *LHSCst = dyn_cast<ConstantSDNode>(LHS))
     295             :     if (auto *RHSCst = dyn_cast<ConstantSDNode>(RHS))
     296       16025 :       return Match(LHSCst, RHSCst);
     297             : 
     298       26055 :   if (ISD::BUILD_VECTOR != LHS.getOpcode() ||
     299             :       ISD::BUILD_VECTOR != RHS.getOpcode())
     300             :     return false;
     301             : 
     302         328 :   EVT SVT = LHS.getValueType().getScalarType();
     303        5772 :   for (unsigned i = 0, e = LHS.getNumOperands(); i != e; ++i) {
     304             :     auto *LHSCst = dyn_cast<ConstantSDNode>(LHS.getOperand(i));
     305             :     auto *RHSCst = dyn_cast<ConstantSDNode>(RHS.getOperand(i));
     306        2760 :     if (!LHSCst || !RHSCst)
     307             :       return false;
     308        5520 :     if (LHSCst->getValueType(0) != SVT ||
     309        2760 :         LHSCst->getValueType(0) != RHSCst->getValueType(0))
     310             :       return false;
     311        2760 :     if (!Match(LHSCst, RHSCst))
     312             :       return false;
     313             :   }
     314             :   return true;
     315             : }
     316             : 
     317         362 : ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
     318         362 :   switch (ExtType) {
     319           1 :   case ISD::EXTLOAD:
     320           1 :     return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
     321             :   case ISD::SEXTLOAD:
     322             :     return ISD::SIGN_EXTEND;
     323         211 :   case ISD::ZEXTLOAD:
     324         211 :     return ISD::ZERO_EXTEND;
     325             :   default:
     326             :     break;
     327             :   }
     328             : 
     329           0 :   llvm_unreachable("Invalid LoadExtType");
     330             : }
     331             : 
     332      316408 : ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
     333             :   // To perform this operation, we just need to swap the L and G bits of the
     334             :   // operation.
     335      316408 :   unsigned OldL = (Operation >> 2) & 1;
     336      316408 :   unsigned OldG = (Operation >> 1) & 1;
     337      632816 :   return ISD::CondCode((Operation & ~6) |  // Keep the N, U, E bits
     338      316408 :                        (OldL << 1) |       // New G bit
     339      316408 :                        (OldG << 2));       // New L bit.
     340             : }
     341             : 
     342       60954 : ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
     343             :   unsigned Operation = Op;
     344       60954 :   if (isInteger)
     345       59331 :     Operation ^= 7;   // Flip L, G, E bits, but not U.
     346             :   else
     347        1623 :     Operation ^= 15;  // Flip all of the condition bits.
     348             : 
     349       60954 :   if (Operation > ISD::SETTRUE2)
     350         294 :     Operation &= ~8;  // Don't let N and U bits get set.
     351             : 
     352       60954 :   return ISD::CondCode(Operation);
     353             : }
     354             : 
     355             : /// For an integer comparison, return 1 if the comparison is a signed operation
     356             : /// and 2 if the result is an unsigned comparison. Return zero if the operation
     357             : /// does not depend on the sign of the input (setne and seteq).
     358             : static int isSignedOp(ISD::CondCode Opcode) {
     359             :   switch (Opcode) {
     360           0 :   default: llvm_unreachable("Illegal integer setcc operation!");
     361             :   case ISD::SETEQ:
     362             :   case ISD::SETNE: return 0;
     363             :   case ISD::SETLT:
     364             :   case ISD::SETLE:
     365             :   case ISD::SETGT:
     366             :   case ISD::SETGE: return 1;
     367             :   case ISD::SETULT:
     368             :   case ISD::SETULE:
     369             :   case ISD::SETUGT:
     370             :   case ISD::SETUGE: return 2;
     371             :   }
     372             : }
     373             : 
     374          31 : ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
     375             :                                        bool IsInteger) {
     376          46 :   if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
     377             :     // Cannot fold a signed integer setcc with an unsigned integer setcc.
     378             :     return ISD::SETCC_INVALID;
     379             : 
     380          26 :   unsigned Op = Op1 | Op2;  // Combine all of the condition bits.
     381             : 
     382             :   // If the N and U bits get set, then the resultant comparison DOES suddenly
     383             :   // care about orderedness, and it is true when ordered.
     384          26 :   if (Op > ISD::SETTRUE2)
     385          15 :     Op &= ~16;     // Clear the U bit if the N bit is set.
     386             : 
     387             :   // Canonicalize illegal integer setcc's.
     388          26 :   if (IsInteger && Op == ISD::SETUNE)  // e.g. SETUGT | SETULT
     389             :     Op = ISD::SETNE;
     390             : 
     391             :   return ISD::CondCode(Op);
     392             : }
     393             : 
     394          39 : ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
     395             :                                         bool IsInteger) {
     396          44 :   if (IsInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
     397             :     // Cannot fold a signed setcc with an unsigned setcc.
     398             :     return ISD::SETCC_INVALID;
     399             : 
     400             :   // Combine all of the condition bits.
     401          39 :   ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
     402             : 
     403             :   // Canonicalize illegal integer setcc's.
     404          39 :   if (IsInteger) {
     405           5 :     switch (Result) {
     406             :     default: break;
     407           0 :     case ISD::SETUO : Result = ISD::SETFALSE; break;  // SETUGT & SETULT
     408           1 :     case ISD::SETOEQ:                                 // SETEQ  & SETU[LG]E
     409           1 :     case ISD::SETUEQ: Result = ISD::SETEQ   ; break;  // SETUGE & SETULE
     410           2 :     case ISD::SETOLT: Result = ISD::SETULT  ; break;  // SETULT & SETNE
     411           0 :     case ISD::SETOGT: Result = ISD::SETUGT  ; break;  // SETUGT & SETNE
     412             :     }
     413             :   }
     414             : 
     415             :   return Result;
     416             : }
     417             : 
     418             : //===----------------------------------------------------------------------===//
     419             : //                           SDNode Profile Support
     420             : //===----------------------------------------------------------------------===//
     421             : 
     422             : /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
     423             : static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC)  {
     424    71484093 :   ID.AddInteger(OpC);
     425             : }
     426             : 
     427             : /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
     428             : /// solely with their pointer.
     429             : static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
     430    71484093 :   ID.AddPointer(VTList.VTs);
     431             : }
     432             : 
     433             : /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
     434    34491189 : static void AddNodeIDOperands(FoldingSetNodeID &ID,
     435             :                               ArrayRef<SDValue> Ops) {
     436   122727881 :   for (auto& Op : Ops) {
     437    44118346 :     ID.AddPointer(Op.getNode());
     438    44118346 :     ID.AddInteger(Op.getResNo());
     439             :   }
     440    34491189 : }
     441             : 
     442             : /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
     443    36992904 : static void AddNodeIDOperands(FoldingSetNodeID &ID,
     444             :                               ArrayRef<SDUse> Ops) {
     445   146412402 :   for (auto& Op : Ops) {
     446    54709749 :     ID.AddPointer(Op.getNode());
     447    54709749 :     ID.AddInteger(Op.getResNo());
     448             :   }
     449    36992904 : }
     450             : 
     451    34491189 : static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
     452             :                           SDVTList VTList, ArrayRef<SDValue> OpList) {
     453    34491189 :   AddNodeIDOpcode(ID, OpC);
     454    34491189 :   AddNodeIDValueTypes(ID, VTList);
     455    34491189 :   AddNodeIDOperands(ID, OpList);
     456    34491189 : }
     457             : 
     458             : /// If this is an SDNode with special info, add this info to the NodeID data.
     459    37161366 : static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
     460    74322732 :   switch (N->getOpcode()) {
     461           0 :   case ISD::TargetExternalSymbol:
     462             :   case ISD::ExternalSymbol:
     463             :   case ISD::MCSymbol:
     464           0 :     llvm_unreachable("Should only be used on nodes with operands");
     465             :   default: break;  // Normal nodes don't need extra info.
     466             :   case ISD::TargetConstant:
     467             :   case ISD::Constant: {
     468             :     const ConstantSDNode *C = cast<ConstantSDNode>(N);
     469     8000200 :     ID.AddPointer(C->getConstantIntValue());
     470             :     ID.AddBoolean(C->isOpaque());
     471             :     break;
     472             :   }
     473             :   case ISD::TargetConstantFP:
     474             :   case ISD::ConstantFP:
     475       29960 :     ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
     476       29960 :     break;
     477             :   case ISD::TargetGlobalAddress:
     478             :   case ISD::GlobalAddress:
     479             :   case ISD::TargetGlobalTLSAddress:
     480             :   case ISD::GlobalTLSAddress: {
     481             :     const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
     482     1243473 :     ID.AddPointer(GA->getGlobal());
     483     1243473 :     ID.AddInteger(GA->getOffset());
     484     1243473 :     ID.AddInteger(GA->getTargetFlags());
     485     1243473 :     break;
     486             :   }
     487             :   case ISD::BasicBlock:
     488      139939 :     ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
     489      139939 :     break;
     490             :   case ISD::Register:
     491     3813032 :     ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
     492     3813032 :     break;
     493             :   case ISD::RegisterMask:
     494      138678 :     ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
     495      138678 :     break;
     496             :   case ISD::SRCVALUE:
     497         495 :     ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
     498         495 :     break;
     499             :   case ISD::FrameIndex:
     500             :   case ISD::TargetFrameIndex:
     501      381509 :     ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
     502      381509 :     break;
     503             :   case ISD::JumpTable:
     504             :   case ISD::TargetJumpTable:
     505         192 :     ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
     506         192 :     ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
     507         192 :     break;
     508             :   case ISD::ConstantPool:
     509             :   case ISD::TargetConstantPool: {
     510             :     const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
     511       26142 :     ID.AddInteger(CP->getAlignment());
     512       52284 :     ID.AddInteger(CP->getOffset());
     513       26142 :     if (CP->isMachineConstantPoolEntry())
     514          98 :       CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
     515             :     else
     516       26044 :       ID.AddPointer(CP->getConstVal());
     517       26142 :     ID.AddInteger(CP->getTargetFlags());
     518       26142 :     break;
     519             :   }
     520             :   case ISD::TargetIndex: {
     521             :     const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
     522           0 :     ID.AddInteger(TI->getIndex());
     523           0 :     ID.AddInteger(TI->getOffset());
     524           0 :     ID.AddInteger(TI->getTargetFlags());
     525           0 :     break;
     526             :   }
     527             :   case ISD::LOAD: {
     528             :     const LoadSDNode *LD = cast<LoadSDNode>(N);
     529     1361281 :     ID.AddInteger(LD->getMemoryVT().getRawBits());
     530     1361281 :     ID.AddInteger(LD->getRawSubclassData());
     531     2722562 :     ID.AddInteger(LD->getPointerInfo().getAddrSpace());
     532     1361281 :     break;
     533             :   }
     534             :   case ISD::STORE: {
     535             :     const StoreSDNode *ST = cast<StoreSDNode>(N);
     536     2766413 :     ID.AddInteger(ST->getMemoryVT().getRawBits());
     537     2766413 :     ID.AddInteger(ST->getRawSubclassData());
     538     5532826 :     ID.AddInteger(ST->getPointerInfo().getAddrSpace());
     539     2766413 :     break;
     540             :   }
     541             :   case ISD::ATOMIC_CMP_SWAP:
     542             :   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
     543             :   case ISD::ATOMIC_SWAP:
     544             :   case ISD::ATOMIC_LOAD_ADD:
     545             :   case ISD::ATOMIC_LOAD_SUB:
     546             :   case ISD::ATOMIC_LOAD_AND:
     547             :   case ISD::ATOMIC_LOAD_CLR:
     548             :   case ISD::ATOMIC_LOAD_OR:
     549             :   case ISD::ATOMIC_LOAD_XOR:
     550             :   case ISD::ATOMIC_LOAD_NAND:
     551             :   case ISD::ATOMIC_LOAD_MIN:
     552             :   case ISD::ATOMIC_LOAD_MAX:
     553             :   case ISD::ATOMIC_LOAD_UMIN:
     554             :   case ISD::ATOMIC_LOAD_UMAX:
     555             :   case ISD::ATOMIC_LOAD:
     556             :   case ISD::ATOMIC_STORE: {
     557             :     const AtomicSDNode *AT = cast<AtomicSDNode>(N);
     558       10533 :     ID.AddInteger(AT->getMemoryVT().getRawBits());
     559       10533 :     ID.AddInteger(AT->getRawSubclassData());
     560       21066 :     ID.AddInteger(AT->getPointerInfo().getAddrSpace());
     561       10533 :     break;
     562             :   }
     563             :   case ISD::PREFETCH: {
     564             :     const MemSDNode *PF = cast<MemSDNode>(N);
     565         486 :     ID.AddInteger(PF->getPointerInfo().getAddrSpace());
     566         243 :     break;
     567             :   }
     568             :   case ISD::VECTOR_SHUFFLE: {
     569             :     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
     570      839937 :     for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
     571      784095 :          i != e; ++i)
     572     1456506 :       ID.AddInteger(SVN->getMaskElt(i));
     573             :     break;
     574             :   }
     575             :   case ISD::TargetBlockAddress:
     576             :   case ISD::BlockAddress: {
     577             :     const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
     578          55 :     ID.AddPointer(BA->getBlockAddress());
     579          55 :     ID.AddInteger(BA->getOffset());
     580          55 :     ID.AddInteger(BA->getTargetFlags());
     581          55 :     break;
     582             :   }
     583             :   } // end switch (N->getOpcode())
     584             : 
     585             :   // Target specific memory nodes could also have address spaces to check.
     586    37161366 :   if (N->isTargetMemoryOpcode())
     587       17354 :     ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
     588    37161366 : }
     589             : 
     590             : /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
     591             : /// data.
     592    36992904 : static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
     593    36992904 :   AddNodeIDOpcode(ID, N->getOpcode());
     594             :   // Add the return value info.
     595    36992904 :   AddNodeIDValueTypes(ID, N->getVTList());
     596             :   // Add the operand info.
     597    36992904 :   AddNodeIDOperands(ID, N->ops());
     598             : 
     599             :   // Handle SDNode leafs with special info.
     600    36992904 :   AddNodeIDCustom(ID, N);
     601    36992904 : }
     602             : 
     603             : //===----------------------------------------------------------------------===//
     604             : //                              SelectionDAG Class
     605             : //===----------------------------------------------------------------------===//
     606             : 
     607             : /// doNotCSE - Return true if CSE should not be performed for this node.
     608     6930446 : static bool doNotCSE(SDNode *N) {
     609     6930446 :   if (N->getValueType(0) == MVT::Glue)
     610             :     return true; // Never CSE anything that produces a flag.
     611             : 
     612    13859232 :   switch (N->getOpcode()) {
     613             :   default: break;
     614             :   case ISD::HANDLENODE:
     615             :   case ISD::EH_LABEL:
     616             :     return true;   // Never CSE these nodes.
     617             :   }
     618             : 
     619             :   // Check that remaining values produced are not flags.
     620    15851084 :   for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
     621     1869130 :     if (N->getValueType(i) == MVT::Glue)
     622             :       return true; // Never CSE anything that produces a flag.
     623             : 
     624             :   return false;
     625             : }
     626             : 
     627             : /// RemoveDeadNodes - This method deletes all unreachable nodes in the
     628             : /// SelectionDAG.
     629     1787048 : void SelectionDAG::RemoveDeadNodes() {
     630             :   // Create a dummy node (which is not added to allnodes), that adds a reference
     631             :   // to the root node, preventing it from being deleted.
     632     3574096 :   HandleSDNode Dummy(getRoot());
     633             : 
     634             :   SmallVector<SDNode*, 128> DeadNodes;
     635             : 
     636             :   // Add all obviously-dead nodes to the DeadNodes worklist.
     637    52332944 :   for (SDNode &Node : allnodes())
     638    50545896 :     if (Node.use_empty())
     639      716467 :       DeadNodes.push_back(&Node);
     640             : 
     641     1787048 :   RemoveDeadNodes(DeadNodes);
     642             : 
     643             :   // If the root changed (e.g. it was a dead load, update the root).
     644     1787048 :   setRoot(Dummy.getValue());
     645     1787048 : }
     646             : 
     647             : /// RemoveDeadNodes - This method deletes the unreachable nodes in the
     648             : /// given list, and any nodes that become unreachable as a result.
     649     4635877 : void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
     650             : 
     651             :   // Process the worklist, deleting the nodes and adding their uses to the
     652             :   // worklist.
     653     9419419 :   while (!DeadNodes.empty()) {
     654             :     SDNode *N = DeadNodes.pop_back_val();
     655             :     // Skip to next node if we've already managed to delete the node. This could
     656             :     // happen if replacing a node causes a node previously added to the node to
     657             :     // be deleted.
     658     4783542 :     if (N->getOpcode() == ISD::DELETED_NODE)
     659           3 :       continue;
     660             : 
     661    10073451 :     for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     662     5289912 :       DUL->NodeDeleted(N, nullptr);
     663             : 
     664             :     // Take the node out of the appropriate CSE map.
     665     4783539 :     RemoveNodeFromCSEMaps(N);
     666             : 
     667             :     // Next, brutally remove the operand list.  This is safe to do, as there are
     668             :     // no cycles in the graph.
     669    23466274 :     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
     670     6949598 :       SDUse &Use = *I++;
     671     6949598 :       SDNode *Operand = Use.getNode();
     672     6949598 :       Use.set(SDValue());
     673             : 
     674             :       // Now that we removed this operand, see if there are no uses of it left.
     675     6949598 :       if (Operand->use_empty())
     676     2385065 :         DeadNodes.push_back(Operand);
     677             :     }
     678             : 
     679     4783539 :     DeallocateNode(N);
     680             :   }
     681     4635877 : }
     682             : 
     683      459450 : void SelectionDAG::RemoveDeadNode(SDNode *N){
     684             :   SmallVector<SDNode*, 16> DeadNodes(1, N);
     685             : 
     686             :   // Create a dummy node that adds a reference to the root node, preventing
     687             :   // it from being deleted.  (This matters if the root is an operand of the
     688             :   // dead node.)
     689      918900 :   HandleSDNode Dummy(getRoot());
     690             : 
     691      459450 :   RemoveDeadNodes(DeadNodes);
     692      459450 : }
     693             : 
     694     6438122 : void SelectionDAG::DeleteNode(SDNode *N) {
     695             :   // First take this out of the appropriate CSE map.
     696     6438122 :   RemoveNodeFromCSEMaps(N);
     697             : 
     698             :   // Finally, remove uses due to operands of this node, remove from the
     699             :   // AllNodes list, and delete the node.
     700     6438122 :   DeleteNodeNotInCSEMaps(N);
     701     6438122 : }
     702             : 
     703     6452946 : void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
     704             :   assert(N->getIterator() != AllNodes.begin() &&
     705             :          "Cannot delete the entry node!");
     706             :   assert(N->use_empty() && "Cannot delete a node that is not dead!");
     707             : 
     708             :   // Drop all of the operands and decrement used node's use counts.
     709     6452946 :   N->DropOperands();
     710             : 
     711     6452946 :   DeallocateNode(N);
     712     6452946 : }
     713             : 
     714    20382094 : void SDDbgInfo::erase(const SDNode *Node) {
     715    20382094 :   DbgValMapType::iterator I = DbgValMap.find(Node);
     716    20382094 :   if (I == DbgValMap.end())
     717    20374117 :     return;
     718       51455 :   for (auto &Val: I->second)
     719       21739 :     Val->setIsInvalidated();
     720             :   DbgValMap.erase(I);
     721             : }
     722             : 
     723    20382094 : void SelectionDAG::DeallocateNode(SDNode *N) {
     724             :   // If we have operands, deallocate them.
     725    20382094 :   removeOperands(N);
     726             : 
     727             :   NodeAllocator.Deallocate(AllNodes.remove(N));
     728             : 
     729             :   // Set the opcode to DELETED_NODE to help catch bugs when node
     730             :   // memory is reallocated.
     731             :   // FIXME: There are places in SDag that have grown a dependency on the opcode
     732             :   // value in the released node.
     733             :   __asan_unpoison_memory_region(&N->NodeType, sizeof(N->NodeType));
     734    20382094 :   N->NodeType = ISD::DELETED_NODE;
     735             : 
     736             :   // If any of the SDDbgValue nodes refer to this SDNode, invalidate
     737             :   // them and forget about that node.
     738    20382094 :   DbgInfo->erase(N);
     739    20382094 : }
     740             : 
     741             : #ifndef NDEBUG
     742             : /// VerifySDNode - Sanity check the given SDNode.  Aborts if it is invalid.
     743             : static void VerifySDNode(SDNode *N) {
     744             :   switch (N->getOpcode()) {
     745             :   default:
     746             :     break;
     747             :   case ISD::BUILD_PAIR: {
     748             :     EVT VT = N->getValueType(0);
     749             :     assert(N->getNumValues() == 1 && "Too many results!");
     750             :     assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
     751             :            "Wrong return type!");
     752             :     assert(N->getNumOperands() == 2 && "Wrong number of operands!");
     753             :     assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
     754             :            "Mismatched operand types!");
     755             :     assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
     756             :            "Wrong operand type!");
     757             :     assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
     758             :            "Wrong return type size");
     759             :     break;
     760             :   }
     761             :   case ISD::BUILD_VECTOR: {
     762             :     assert(N->getNumValues() == 1 && "Too many results!");
     763             :     assert(N->getValueType(0).isVector() && "Wrong return type!");
     764             :     assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
     765             :            "Wrong number of operands!");
     766             :     EVT EltVT = N->getValueType(0).getVectorElementType();
     767             :     for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
     768             :       assert((I->getValueType() == EltVT ||
     769             :              (EltVT.isInteger() && I->getValueType().isInteger() &&
     770             :               EltVT.bitsLE(I->getValueType()))) &&
     771             :             "Wrong operand type!");
     772             :       assert(I->getValueType() == N->getOperand(0).getValueType() &&
     773             :              "Operands must all have the same type");
     774             :     }
     775             :     break;
     776             :   }
     777             :   }
     778             : }
     779             : #endif // NDEBUG
     780             : 
     781             : /// Insert a newly allocated node into the DAG.
     782             : ///
     783             : /// Handles insertion into the all nodes list and CSE map, as well as
     784             : /// verification and other common operations when a new node is allocated.
     785    20772100 : void SelectionDAG::InsertNode(SDNode *N) {
     786             :   AllNodes.push_back(N);
     787             : #ifndef NDEBUG
     788             :   N->PersistentId = NextPersistentId++;
     789             :   VerifySDNode(N);
     790             : #endif
     791    20772100 : }
     792             : 
     793             : /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
     794             : /// correspond to it.  This is useful when we're about to delete or repurpose
     795             : /// the node.  We don't want future request for structurally identical nodes
     796             : /// to return N anymore.
     797    20988996 : bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
     798             :   bool Erased = false;
     799    41977992 :   switch (N->getOpcode()) {
     800             :   case ISD::HANDLENODE: return false;  // noop.
     801             :   case ISD::CONDCODE:
     802             :     assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
     803             :            "Cond code doesn't exist!");
     804      233626 :     Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
     805      116813 :     CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
     806      116813 :     break;
     807        6421 :   case ISD::ExternalSymbol:
     808       12842 :     Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
     809        6421 :     break;
     810             :   case ISD::TargetExternalSymbol: {
     811             :     ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
     812         240 :     Erased = TargetExternalSymbols.erase(
     813         480 :                std::pair<std::string,unsigned char>(ESN->getSymbol(),
     814         240 :                                                     ESN->getTargetFlags()));
     815         240 :     break;
     816             :   }
     817             :   case ISD::MCSymbol: {
     818             :     auto *MCSN = cast<MCSymbolSDNode>(N);
     819           0 :     Erased = MCSymbols.erase(MCSN->getMCSymbol());
     820           0 :     break;
     821             :   }
     822             :   case ISD::VALUETYPE: {
     823       44946 :     EVT VT = cast<VTSDNode>(N)->getVT();
     824       44946 :     if (VT.isExtended()) {
     825        1562 :       Erased = ExtendedValueTypeNodes.erase(VT);
     826             :     } else {
     827       86768 :       Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
     828       43384 :       ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
     829             :     }
     830             :     break;
     831             :   }
     832    20784331 :   default:
     833             :     // Remove it from the CSE Map.
     834             :     assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
     835             :     assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
     836             :     Erased = CSEMap.RemoveNode(N);
     837    20784331 :     break;
     838             :   }
     839             : #ifndef NDEBUG
     840             :   // Verify that the node was actually in one of the CSE maps, unless it has a
     841             :   // flag result (which cannot be CSE'd) or is one of the special cases that are
     842             :   // not subject to CSE.
     843             :   if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
     844             :       !N->isMachineOpcode() && !doNotCSE(N)) {
     845             :     N->dump(this);
     846             :     dbgs() << "\n";
     847             :     llvm_unreachable("Node is not in map!");
     848             :   }
     849             : #endif
     850             :   return Erased;
     851             : }
     852             : 
     853             : /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
     854             : /// maps and modified in place. Add it back to the CSE maps, unless an identical
     855             : /// node already exists, in which case transfer all its users to the existing
     856             : /// node. This transfer can potentially trigger recursive merging.
     857             : void
     858     6750913 : SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
     859             :   // For node types that aren't CSE'd, just act as if no identical node
     860             :   // already exists.
     861     6750913 :   if (!doNotCSE(N)) {
     862             :     SDNode *Existing = CSEMap.GetOrInsertNode(N);
     863     5887950 :     if (Existing != N) {
     864             :       // If there was already an existing matching node, use ReplaceAllUsesWith
     865             :       // to replace the dead one with the existing one.  This can cause
     866             :       // recursive merging of other unrelated nodes down the line.
     867       14824 :       ReplaceAllUsesWith(N, Existing);
     868             : 
     869             :       // N is now dead. Inform the listeners and delete it.
     870       63644 :       for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     871       48820 :         DUL->NodeDeleted(N, Existing);
     872       14824 :       DeleteNodeNotInCSEMaps(N);
     873       14824 :       return;
     874             :     }
     875             :   }
     876             : 
     877             :   // If the node doesn't already exist, we updated it.  Inform listeners.
     878    21778652 :   for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
     879    15042563 :     DUL->NodeUpdated(N);
     880             : }
     881             : 
     882             : /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
     883             : /// were replaced with those specified.  If this node is never memoized,
     884             : /// return null, otherwise return a pointer to the slot it would take.  If a
     885             : /// node already exists with these operands, the slot will be non-null.
     886        2612 : SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
     887             :                                            void *&InsertPos) {
     888        2612 :   if (doNotCSE(N))
     889             :     return nullptr;
     890             : 
     891        2612 :   SDValue Ops[] = { Op };
     892             :   FoldingSetNodeID ID;
     893        7836 :   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
     894        2612 :   AddNodeIDCustom(ID, N);
     895        5224 :   SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
     896        2612 :   if (Node)
     897           0 :     Node->intersectFlagsWith(N->getFlags());
     898             :   return Node;
     899             : }
     900             : 
     901             : /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
     902             : /// were replaced with those specified.  If this node is never memoized,
     903             : /// return null, otherwise return a pointer to the slot it would take.  If a
     904             : /// node already exists with these operands, the slot will be non-null.
     905       58951 : SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
     906             :                                            SDValue Op1, SDValue Op2,
     907             :                                            void *&InsertPos) {
     908       58951 :   if (doNotCSE(N))
     909             :     return nullptr;
     910             : 
     911       58951 :   SDValue Ops[] = { Op1, Op2 };
     912             :   FoldingSetNodeID ID;
     913      176853 :   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
     914       58951 :   AddNodeIDCustom(ID, N);
     915      117902 :   SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
     916       58951 :   if (Node)
     917         705 :     Node->intersectFlagsWith(N->getFlags());
     918             :   return Node;
     919             : }
     920             : 
     921             : /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
     922             : /// were replaced with those specified.  If this node is never memoized,
     923             : /// return null, otherwise return a pointer to the slot it would take.  If a
     924             : /// node already exists with these operands, the slot will be non-null.
     925      117970 : SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
     926             :                                            void *&InsertPos) {
     927      117970 :   if (doNotCSE(N))
     928             :     return nullptr;
     929             : 
     930             :   FoldingSetNodeID ID;
     931      320697 :   AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
     932      106899 :   AddNodeIDCustom(ID, N);
     933      213798 :   SDNode *Node = FindNodeOrInsertPos(ID, SDLoc(N), InsertPos);
     934      106899 :   if (Node)
     935         213 :     Node->intersectFlagsWith(N->getFlags());
     936             :   return Node;
     937             : }
     938             : 
     939      244332 : unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
     940      244332 :   Type *Ty = VT == MVT::iPTR ?
     941           0 :                    PointerType::get(Type::getInt8Ty(*getContext()), 0) :
     942      244332 :                    VT.getTypeForEVT(*getContext());
     943             : 
     944      488664 :   return getDataLayout().getABITypeAlignment(Ty);
     945             : }
     946             : 
     947             : // EntryNode could meaningfully have debug info if we can find it...
     948       24549 : SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
     949             :     : TM(tm), OptLevel(OL),
     950       49097 :       EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
     951      147293 :       Root(getEntryNode()) {
     952       24549 :   InsertNode(&EntryNode);
     953       24549 :   DbgInfo = new SDDbgInfo();
     954       24549 : }
     955             : 
     956      226497 : void SelectionDAG::init(MachineFunction &NewMF,
     957             :                         OptimizationRemarkEmitter &NewORE,
     958             :                         Pass *PassPtr, const TargetLibraryInfo *LibraryInfo,
     959             :                         DivergenceAnalysis * Divergence) {
     960      226497 :   MF = &NewMF;
     961      226497 :   SDAGISelPass = PassPtr;
     962      226497 :   ORE = &NewORE;
     963      226497 :   TLI = getSubtarget().getTargetLowering();
     964      452994 :   TSI = getSubtarget().getSelectionDAGInfo();
     965      226497 :   LibInfo = LibraryInfo;
     966      226497 :   Context = &MF->getFunction().getContext();
     967      226497 :   DA = Divergence;
     968      226497 : }
     969             : 
     970      122185 : SelectionDAG::~SelectionDAG() {
     971             :   assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
     972       24437 :   allnodes_clear();
     973       24437 :   OperandRecycler.clear(OperandAllocator);
     974       24437 :   delete DbgInfo;
     975       24437 : }
     976             : 
     977      388969 : void SelectionDAG::allnodes_clear() {
     978             :   assert(&*AllNodes.begin() == &EntryNode);
     979             :   AllNodes.remove(AllNodes.begin());
     980    18680187 :   while (!AllNodes.empty())
     981     9145609 :     DeallocateNode(&AllNodes.front());
     982             : #ifndef NDEBUG
     983             :   NextPersistentId = 0;
     984             : #endif
     985      388969 : }
     986             : 
     987     5538842 : SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
     988             :                                           void *&InsertPos) {
     989             :   SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
     990     5538842 :   if (N) {
     991     5939546 :     switch (N->getOpcode()) {
     992             :     default: break;
     993           0 :     case ISD::Constant:
     994             :     case ISD::ConstantFP:
     995           0 :       llvm_unreachable("Querying for Constant and ConstantFP nodes requires "
     996             :                        "debug location.  Use another overload.");
     997             :     }
     998             :   }
     999     5538842 :   return N;
    1000             : }
    1001             : 
    1002    28952951 : SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
    1003             :                                           const SDLoc &DL, void *&InsertPos) {
    1004             :   SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
    1005    28952951 :   if (N) {
    1006    18946132 :     switch (N->getOpcode()) {
    1007             :     case ISD::Constant:
    1008             :     case ISD::ConstantFP:
    1009             :       // Erase debug location from the node if the node is used at several
    1010             :       // different places. Do not propagate one location to all uses as it
    1011             :       // will cause a worse single stepping debugging experience.
    1012     2456906 :       if (N->getDebugLoc() != DL.getDebugLoc())
    1013     1300830 :         N->setDebugLoc(DebugLoc());
    1014             :       break;
    1015     7016160 :     default:
    1016             :       // When the node's point of use is located earlier in the instruction
    1017             :       // sequence than its prior point of use, update its debug info to the
    1018             :       // earlier location.
    1019    14032320 :       if (DL.getIROrder() && DL.getIROrder() < N->getIROrder())
    1020       86017 :         N->setDebugLoc(DL.getDebugLoc());
    1021             :       break;
    1022             :     }
    1023             :   }
    1024    28952951 :   return N;
    1025             : }
    1026             : 
    1027      364532 : void SelectionDAG::clear() {
    1028      364532 :   allnodes_clear();
    1029      364532 :   OperandRecycler.clear(OperandAllocator);
    1030      364532 :   OperandAllocator.Reset();
    1031      364532 :   CSEMap.clear();
    1032             : 
    1033             :   ExtendedValueTypeNodes.clear();
    1034      364532 :   ExternalSymbols.clear();
    1035             :   TargetExternalSymbols.clear();
    1036      364532 :   MCSymbols.clear();
    1037             :   std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
    1038             :             static_cast<CondCodeSDNode*>(nullptr));
    1039             :   std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
    1040             :             static_cast<SDNode*>(nullptr));
    1041             : 
    1042      364532 :   EntryNode.UseList = nullptr;
    1043      364532 :   InsertNode(&EntryNode);
    1044      364532 :   Root = getEntryNode();
    1045      364532 :   DbgInfo->clear();
    1046      364532 : }
    1047             : 
    1048          19 : SDValue SelectionDAG::getFPExtendOrRound(SDValue Op, const SDLoc &DL, EVT VT) {
    1049          38 :   return VT.bitsGT(Op.getValueType())
    1050          19 :              ? getNode(ISD::FP_EXTEND, DL, VT, Op)
    1051          57 :              : getNode(ISD::FP_ROUND, DL, VT, Op, getIntPtrConstant(0, DL));
    1052             : }
    1053             : 
    1054       42247 : SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
    1055       84494 :   return VT.bitsGT(Op.getValueType()) ?
    1056       42247 :     getNode(ISD::ANY_EXTEND, DL, VT, Op) :
    1057      126741 :     getNode(ISD::TRUNCATE, DL, VT, Op);
    1058             : }
    1059             : 
    1060      169948 : SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
    1061      339896 :   return VT.bitsGT(Op.getValueType()) ?
    1062      169948 :     getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
    1063      509844 :     getNode(ISD::TRUNCATE, DL, VT, Op);
    1064             : }
    1065             : 
    1066      187958 : SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, const SDLoc &DL, EVT VT) {
    1067      375916 :   return VT.bitsGT(Op.getValueType()) ?
    1068      187958 :     getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
    1069      563874 :     getNode(ISD::TRUNCATE, DL, VT, Op);
    1070             : }
    1071             : 
    1072         864 : SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, const SDLoc &SL, EVT VT,
    1073             :                                         EVT OpVT) {
    1074        1728 :   if (VT.bitsLE(Op.getValueType()))
    1075         384 :     return getNode(ISD::TRUNCATE, SL, VT, Op);
    1076             : 
    1077         480 :   TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
    1078         480 :   return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
    1079             : }
    1080             : 
    1081      103444 : SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, const SDLoc &DL, EVT VT) {
    1082             :   assert(!VT.isVector() &&
    1083             :          "getZeroExtendInReg should use the vector element type instead of "
    1084             :          "the vector type!");
    1085      310332 :   if (Op.getValueType().getScalarType() == VT) return Op;
    1086      102660 :   unsigned BitWidth = Op.getScalarValueSizeInBits();
    1087             :   APInt Imm = APInt::getLowBitsSet(BitWidth,
    1088      102660 :                                    VT.getSizeInBits());
    1089             :   return getNode(ISD::AND, DL, Op.getValueType(), Op,
    1090      307980 :                  getConstant(Imm, DL, Op.getValueType()));
    1091             : }
    1092             : 
    1093         268 : SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, const SDLoc &DL,
    1094             :                                               EVT VT) {
    1095             :   assert(VT.isVector() && "This DAG node is restricted to vector types.");
    1096             :   assert(VT.getSizeInBits() == Op.getValueSizeInBits() &&
    1097             :          "The sizes of the input and result must match in order to perform the "
    1098             :          "extend in-register.");
    1099             :   assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
    1100             :          "The destination vector type must have fewer lanes than the input.");
    1101         268 :   return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
    1102             : }
    1103             : 
    1104        1193 : SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, const SDLoc &DL,
    1105             :                                                EVT VT) {
    1106             :   assert(VT.isVector() && "This DAG node is restricted to vector types.");
    1107             :   assert(VT.getSizeInBits() == Op.getValueSizeInBits() &&
    1108             :          "The sizes of the input and result must match in order to perform the "
    1109             :          "extend in-register.");
    1110             :   assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
    1111             :          "The destination vector type must have fewer lanes than the input.");
    1112        1193 :   return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
    1113             : }
    1114             : 
    1115        2132 : SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, const SDLoc &DL,
    1116             :                                                EVT VT) {
    1117             :   assert(VT.isVector() && "This DAG node is restricted to vector types.");
    1118             :   assert(VT.getSizeInBits() == Op.getValueSizeInBits() &&
    1119             :          "The sizes of the input and result must match in order to perform the "
    1120             :          "extend in-register.");
    1121             :   assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
    1122             :          "The destination vector type must have fewer lanes than the input.");
    1123        2132 :   return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
    1124             : }
    1125             : 
    1126             : /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
    1127       26408 : SDValue SelectionDAG::getNOT(const SDLoc &DL, SDValue Val, EVT VT) {
    1128       26408 :   EVT EltVT = VT.getScalarType();
    1129             :   SDValue NegOne =
    1130       52816 :     getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
    1131       26408 :   return getNode(ISD::XOR, DL, VT, Val, NegOne);
    1132             : }
    1133             : 
    1134          63 : SDValue SelectionDAG::getLogicalNOT(const SDLoc &DL, SDValue Val, EVT VT) {
    1135          63 :   SDValue TrueValue = getBoolConstant(true, DL, VT, VT);
    1136          63 :   return getNode(ISD::XOR, DL, VT, Val, TrueValue);
    1137             : }
    1138             : 
    1139        1214 : SDValue SelectionDAG::getBoolConstant(bool V, const SDLoc &DL, EVT VT,
    1140             :                                       EVT OpVT) {
    1141        1214 :   if (!V)
    1142         590 :     return getConstant(0, DL, VT);
    1143             : 
    1144         624 :   switch (TLI->getBooleanContents(OpVT)) {
    1145         536 :   case TargetLowering::ZeroOrOneBooleanContent:
    1146             :   case TargetLowering::UndefinedBooleanContent:
    1147         536 :     return getConstant(1, DL, VT);
    1148          88 :   case TargetLowering::ZeroOrNegativeOneBooleanContent:
    1149          88 :     return getAllOnesConstant(DL, VT);
    1150             :   }
    1151           0 :   llvm_unreachable("Unexpected boolean content enum!");
    1152             : }
    1153             : 
    1154     7127240 : SDValue SelectionDAG::getConstant(uint64_t Val, const SDLoc &DL, EVT VT,
    1155             :                                   bool isT, bool isO) {
    1156     7127240 :   EVT EltVT = VT.getScalarType();
    1157             :   assert((EltVT.getSizeInBits() >= 64 ||
    1158             :          (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
    1159             :          "getConstant with a uint64_t value that doesn't fit in the type!");
    1160    21381720 :   return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
    1161             : }
    1162             : 
    1163     8882073 : SDValue SelectionDAG::getConstant(const APInt &Val, const SDLoc &DL, EVT VT,
    1164             :                                   bool isT, bool isO) {
    1165     8882073 :   return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
    1166             : }
    1167             : 
    1168     9515793 : SDValue SelectionDAG::getConstant(const ConstantInt &Val, const SDLoc &DL,
    1169             :                                   EVT VT, bool isT, bool isO) {
    1170             :   assert(VT.isInteger() && "Cannot create FP integer constant!");
    1171             : 
    1172     9515793 :   EVT EltVT = VT.getScalarType();
    1173             :   const ConstantInt *Elt = &Val;
    1174             : 
    1175             :   // In some cases the vector type is legal but the element type is illegal and
    1176             :   // needs to be promoted, for example v8i8 on ARM.  In this case, promote the
    1177             :   // inserted value (the type does not need to match the vector element type).
    1178             :   // Any extra bits introduced will be truncated away.
    1179     9669063 :   if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
    1180             :       TargetLowering::TypePromoteInteger) {
    1181       14618 :    EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
    1182        7309 :    APInt NewVal = Elt->getValue().zextOrTrunc(EltVT.getSizeInBits());
    1183        7309 :    Elt = ConstantInt::get(*getContext(), NewVal);
    1184             :   }
    1185             :   // In other cases the element type is illegal and needs to be expanded, for
    1186             :   // example v2i64 on MIPS32. In this case, find the nearest legal type, split
    1187             :   // the value into n parts and use a vector type with n-times the elements.
    1188             :   // Then bitcast to the type requested.
    1189             :   // Legalizing constants too early makes the DAGCombiner's job harder so we
    1190             :   // only legalize if the DAG tells us we must produce legal types.
    1191    15103908 :   else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
    1192       49749 :            TLI->getTypeAction(*getContext(), EltVT) ==
    1193             :            TargetLowering::TypeExpandInteger) {
    1194             :     const APInt &NewVal = Elt->getValue();
    1195         586 :     EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
    1196         293 :     unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
    1197         293 :     unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
    1198         293 :     EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
    1199             : 
    1200             :     // Check the temporary vector is the correct size. If this fails then
    1201             :     // getTypeToTransformTo() probably returned a type whose size (in bits)
    1202             :     // isn't a power-of-2 factor of the requested type size.
    1203             :     assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
    1204             : 
    1205             :     SmallVector<SDValue, 2> EltParts;
    1206        1465 :     for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
    1207        1758 :       EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
    1208        1172 :                                            .zextOrTrunc(ViaEltSizeInBits), DL,
    1209         586 :                                      ViaEltVT, isT, isO));
    1210             :     }
    1211             : 
    1212             :     // EltParts is currently in little endian order. If we actually want
    1213             :     // big-endian order then reverse it now.
    1214         586 :     if (getDataLayout().isBigEndian())
    1215             :       std::reverse(EltParts.begin(), EltParts.end());
    1216             : 
    1217             :     // The elements must be reversed when the element order is different
    1218             :     // to the endianness of the elements (because the BITCAST is itself a
    1219             :     // vector shuffle in this situation). However, we do not need any code to
    1220             :     // perform this reversal because getConstant() is producing a vector
    1221             :     // splat.
    1222             :     // This situation occurs in MIPS MSA.
    1223             : 
    1224             :     SmallVector<SDValue, 8> Ops;
    1225         957 :     for (unsigned i = 0, e = VT.getVectorNumElements(); i != e; ++i)
    1226         664 :       Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
    1227             : 
    1228         293 :     SDValue V = getNode(ISD::BITCAST, DL, VT, getBuildVector(ViaVecVT, DL, Ops));
    1229         293 :     return V;
    1230             :   }
    1231             : 
    1232             :   assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
    1233             :          "APInt size does not match type size!");
    1234     9515500 :   unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
    1235             :   FoldingSetNodeID ID;
    1236     9515500 :   AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
    1237     9515500 :   ID.AddPointer(Elt);
    1238             :   ID.AddBoolean(isO);
    1239     9515500 :   void *IP = nullptr;
    1240             :   SDNode *N = nullptr;
    1241     9515500 :   if ((N = FindNodeOrInsertPos(ID, DL, IP)))
    1242     5933588 :     if (!VT.isVector())
    1243     5886926 :       return SDValue(N, 0);
    1244             : 
    1245     3628574 :   if (!N) {
    1246     3581912 :     N = newSDNode<ConstantSDNode>(isT, isO, Elt, DL.getDebugLoc(), EltVT);
    1247     3581912 :     CSEMap.InsertNode(N, IP);
    1248     3581912 :     InsertNode(N);
    1249             :     NewSDValueDbgMsg(SDValue(N, 0), "Creating constant: ", this);
    1250             :   }
    1251             : 
    1252             :   SDValue Result(N, 0);
    1253     3628574 :   if (VT.isVector())
    1254      152977 :     Result = getSplatBuildVector(VT, DL, Result);
    1255             : 
    1256     3628574 :   return Result;
    1257             : }
    1258             : 
    1259      903556 : SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, const SDLoc &DL,
    1260             :                                         bool isTarget) {
    1261     1807112 :   return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
    1262             : }
    1263             : 
    1264       15486 : SDValue SelectionDAG::getConstantFP(const APFloat &V, const SDLoc &DL, EVT VT,
    1265             :                                     bool isTarget) {
    1266       15486 :   return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
    1267             : }
    1268             : 
    1269       33890 : SDValue SelectionDAG::getConstantFP(const ConstantFP &V, const SDLoc &DL,
    1270             :                                     EVT VT, bool isTarget) {
    1271             :   assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
    1272             : 
    1273       33890 :   EVT EltVT = VT.getScalarType();
    1274             : 
    1275             :   // Do the map lookup using the actual bit pattern for the floating point
    1276             :   // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
    1277             :   // we don't have issues with SNANs.
    1278       33890 :   unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
    1279             :   FoldingSetNodeID ID;
    1280       33890 :   AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
    1281       33890 :   ID.AddPointer(&V);
    1282       33890 :   void *IP = nullptr;
    1283             :   SDNode *N = nullptr;
    1284       33890 :   if ((N = FindNodeOrInsertPos(ID, DL, IP)))
    1285        6560 :     if (!VT.isVector())
    1286        5269 :       return SDValue(N, 0);
    1287             : 
    1288       28621 :   if (!N) {
    1289       27330 :     N = newSDNode<ConstantFPSDNode>(isTarget, &V, DL.getDebugLoc(), EltVT);
    1290       27330 :     CSEMap.InsertNode(N, IP);
    1291       27330 :     InsertNode(N);
    1292             :   }
    1293             : 
    1294             :   SDValue Result(N, 0);
    1295       28621 :   if (VT.isVector())
    1296        2627 :     Result = getSplatBuildVector(VT, DL, Result);
    1297             :   NewSDValueDbgMsg(Result, "Creating fp constant: ", this);
    1298       28621 :   return Result;
    1299             : }
    1300             : 
    1301        6757 : SDValue SelectionDAG::getConstantFP(double Val, const SDLoc &DL, EVT VT,
    1302             :                                     bool isTarget) {
    1303        6757 :   EVT EltVT = VT.getScalarType();
    1304             :   if (EltVT == MVT::f32)
    1305        9070 :     return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
    1306             :   else if (EltVT == MVT::f64)
    1307        4116 :     return getConstantFP(APFloat(Val), DL, VT, isTarget);
    1308             :   else if (EltVT == MVT::f80 || EltVT == MVT::f128 || EltVT == MVT::ppcf128 ||
    1309             :            EltVT == MVT::f16) {
    1310             :     bool Ignored;
    1311         164 :     APFloat APF = APFloat(Val);
    1312         164 :     APF.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
    1313             :                 &Ignored);
    1314         164 :     return getConstantFP(APF, DL, VT, isTarget);
    1315             :   } else
    1316           0 :     llvm_unreachable("Unsupported type in getConstantFP");
    1317             : }
    1318             : 
    1319     1652916 : SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, const SDLoc &DL,
    1320             :                                        EVT VT, int64_t Offset, bool isTargetGA,
    1321             :                                        unsigned char TargetFlags) {
    1322             :   assert((TargetFlags == 0 || isTargetGA) &&
    1323             :          "Cannot set target flags on target-independent globals");
    1324             : 
    1325             :   // Truncate (with sign-extension) the offset value to the pointer size.
    1326     3305832 :   unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
    1327     1652916 :   if (BitWidth < 64)
    1328      818304 :     Offset = SignExtend64(Offset, BitWidth);
    1329             : 
    1330             :   unsigned Opc;
    1331     1652916 :   if (GV->isThreadLocal())
    1332        2179 :     Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
    1333             :   else
    1334     1650737 :     Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
    1335             : 
    1336             :   FoldingSetNodeID ID;
    1337     1652916 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1338     1652916 :   ID.AddPointer(GV);
    1339     1652916 :   ID.AddInteger(Offset);
    1340     1652916 :   ID.AddInteger(TargetFlags);
    1341     1652916 :   void *IP = nullptr;
    1342     1652916 :   if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    1343      206206 :     return SDValue(E, 0);
    1344             : 
    1345             :   auto *N = newSDNode<GlobalAddressSDNode>(
    1346     2893420 :       Opc, DL.getIROrder(), DL.getDebugLoc(), GV, VT, Offset, TargetFlags);
    1347     1446710 :   CSEMap.InsertNode(N, IP);
    1348     1446710 :     InsertNode(N);
    1349     1446710 :   return SDValue(N, 0);
    1350             : }
    1351             : 
    1352      421277 : SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
    1353      421277 :   unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
    1354             :   FoldingSetNodeID ID;
    1355      421277 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1356      421277 :   ID.AddInteger(FI);
    1357      421277 :   void *IP = nullptr;
    1358      421277 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1359       65028 :     return SDValue(E, 0);
    1360             : 
    1361      356249 :   auto *N = newSDNode<FrameIndexSDNode>(FI, VT, isTarget);
    1362      356249 :   CSEMap.InsertNode(N, IP);
    1363      356249 :   InsertNode(N);
    1364      356249 :   return SDValue(N, 0);
    1365             : }
    1366             : 
    1367         715 : SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
    1368             :                                    unsigned char TargetFlags) {
    1369             :   assert((TargetFlags == 0 || isTarget) &&
    1370             :          "Cannot set target flags on target-independent jump tables");
    1371         715 :   unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
    1372             :   FoldingSetNodeID ID;
    1373         715 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1374         715 :   ID.AddInteger(JTI);
    1375         715 :   ID.AddInteger(TargetFlags);
    1376         715 :   void *IP = nullptr;
    1377         715 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1378          49 :     return SDValue(E, 0);
    1379             : 
    1380         666 :   auto *N = newSDNode<JumpTableSDNode>(JTI, VT, isTarget, TargetFlags);
    1381         666 :   CSEMap.InsertNode(N, IP);
    1382         666 :   InsertNode(N);
    1383         666 :   return SDValue(N, 0);
    1384             : }
    1385             : 
    1386       72987 : SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
    1387             :                                       unsigned Alignment, int Offset,
    1388             :                                       bool isTarget,
    1389             :                                       unsigned char TargetFlags) {
    1390             :   assert((TargetFlags == 0 || isTarget) &&
    1391             :          "Cannot set target flags on target-independent globals");
    1392       72987 :   if (Alignment == 0)
    1393       25797 :     Alignment = MF->getFunction().optForSize()
    1394       51594 :                     ? getDataLayout().getABITypeAlignment(C->getType())
    1395       51182 :                     : getDataLayout().getPrefTypeAlignment(C->getType());
    1396       72987 :   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
    1397             :   FoldingSetNodeID ID;
    1398       72987 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1399       72987 :   ID.AddInteger(Alignment);
    1400       72987 :   ID.AddInteger(Offset);
    1401       72987 :   ID.AddPointer(C);
    1402       72987 :   ID.AddInteger(TargetFlags);
    1403       72987 :   void *IP = nullptr;
    1404       72987 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1405        4050 :     return SDValue(E, 0);
    1406             : 
    1407             :   auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
    1408       68937 :                                           TargetFlags);
    1409       68937 :   CSEMap.InsertNode(N, IP);
    1410       68937 :   InsertNode(N);
    1411       68937 :   return SDValue(N, 0);
    1412             : }
    1413             : 
    1414         273 : SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
    1415             :                                       unsigned Alignment, int Offset,
    1416             :                                       bool isTarget,
    1417             :                                       unsigned char TargetFlags) {
    1418             :   assert((TargetFlags == 0 || isTarget) &&
    1419             :          "Cannot set target flags on target-independent globals");
    1420         273 :   if (Alignment == 0)
    1421           0 :     Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
    1422         273 :   unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
    1423             :   FoldingSetNodeID ID;
    1424         273 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1425         273 :   ID.AddInteger(Alignment);
    1426         273 :   ID.AddInteger(Offset);
    1427         273 :   C->addSelectionDAGCSEId(ID);
    1428         273 :   ID.AddInteger(TargetFlags);
    1429         273 :   void *IP = nullptr;
    1430         273 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1431           0 :     return SDValue(E, 0);
    1432             : 
    1433             :   auto *N = newSDNode<ConstantPoolSDNode>(isTarget, C, VT, Offset, Alignment,
    1434         273 :                                           TargetFlags);
    1435         273 :   CSEMap.InsertNode(N, IP);
    1436         273 :   InsertNode(N);
    1437         273 :   return SDValue(N, 0);
    1438             : }
    1439             : 
    1440           0 : SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
    1441             :                                      unsigned char TargetFlags) {
    1442             :   FoldingSetNodeID ID;
    1443           0 :   AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
    1444           0 :   ID.AddInteger(Index);
    1445           0 :   ID.AddInteger(Offset);
    1446           0 :   ID.AddInteger(TargetFlags);
    1447           0 :   void *IP = nullptr;
    1448           0 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1449           0 :     return SDValue(E, 0);
    1450             : 
    1451           0 :   auto *N = newSDNode<TargetIndexSDNode>(Index, VT, Offset, TargetFlags);
    1452           0 :   CSEMap.InsertNode(N, IP);
    1453           0 :   InsertNode(N);
    1454           0 :   return SDValue(N, 0);
    1455             : }
    1456             : 
    1457      163764 : SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
    1458             :   FoldingSetNodeID ID;
    1459      163764 :   AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
    1460      163764 :   ID.AddPointer(MBB);
    1461      163764 :   void *IP = nullptr;
    1462      163764 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1463          45 :     return SDValue(E, 0);
    1464             : 
    1465      163719 :   auto *N = newSDNode<BasicBlockSDNode>(MBB);
    1466      163719 :   CSEMap.InsertNode(N, IP);
    1467      163719 :   InsertNode(N);
    1468      163719 :   return SDValue(N, 0);
    1469             : }
    1470             : 
    1471       82788 : SDValue SelectionDAG::getValueType(EVT VT) {
    1472      163564 :   if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
    1473       80776 :       ValueTypeNodes.size())
    1474        4563 :     ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
    1475             : 
    1476      165576 :   SDNode *&N = VT.isExtended() ?
    1477       82788 :     ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
    1478             : 
    1479       82788 :   if (N) return SDValue(N, 0);
    1480       44946 :   N = newSDNode<VTSDNode>(VT);
    1481       44946 :   InsertNode(N);
    1482       44946 :   return SDValue(N, 0);
    1483             : }
    1484             : 
    1485        8831 : SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
    1486        8831 :   SDNode *&N = ExternalSymbols[Sym];
    1487        8831 :   if (N) return SDValue(N, 0);
    1488        6422 :   N = newSDNode<ExternalSymbolSDNode>(false, Sym, 0, VT);
    1489        6422 :   InsertNode(N);
    1490        6422 :   return SDValue(N, 0);
    1491             : }
    1492             : 
    1493          70 : SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
    1494          70 :   SDNode *&N = MCSymbols[Sym];
    1495          70 :   if (N)
    1496          17 :     return SDValue(N, 0);
    1497          53 :   N = newSDNode<MCSymbolSDNode>(Sym, VT);
    1498          53 :   InsertNode(N);
    1499          53 :   return SDValue(N, 0);
    1500             : }
    1501             : 
    1502       27800 : SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
    1503             :                                               unsigned char TargetFlags) {
    1504             :   SDNode *&N =
    1505       27800 :     TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
    1506       27800 :                                                                TargetFlags)];
    1507       27800 :   if (N) return SDValue(N, 0);
    1508       17087 :   N = newSDNode<ExternalSymbolSDNode>(true, Sym, TargetFlags, VT);
    1509       17087 :   InsertNode(N);
    1510       17087 :   return SDValue(N, 0);
    1511             : }
    1512             : 
    1513      169693 : SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
    1514      339386 :   if ((unsigned)Cond >= CondCodeNodes.size())
    1515        9759 :     CondCodeNodes.resize(Cond+1);
    1516             : 
    1517      339386 :   if (!CondCodeNodes[Cond]) {
    1518      116813 :     auto *N = newSDNode<CondCodeSDNode>(Cond);
    1519      233626 :     CondCodeNodes[Cond] = N;
    1520      116813 :     InsertNode(N);
    1521             :   }
    1522             : 
    1523      339386 :   return SDValue(CondCodeNodes[Cond], 0);
    1524             : }
    1525             : 
    1526             : /// Swaps the values of N1 and N2. Swaps all indices in the shuffle mask M that
    1527             : /// point at N1 to point at N2 and indices that point at N2 to point at N1.
    1528             : static void commuteShuffle(SDValue &N1, SDValue &N2, MutableArrayRef<int> M) {
    1529             :   std::swap(N1, N2);
    1530             :   ShuffleVectorSDNode::commuteMask(M);
    1531             : }
    1532             : 
    1533      111893 : SDValue SelectionDAG::getVectorShuffle(EVT VT, const SDLoc &dl, SDValue N1,
    1534             :                                        SDValue N2, ArrayRef<int> Mask) {
    1535             :   assert(VT.getVectorNumElements() == Mask.size() &&
    1536             :            "Must have the same number of vector elements as mask elements!");
    1537             :   assert(VT == N1.getValueType() && VT == N2.getValueType() &&
    1538             :          "Invalid VECTOR_SHUFFLE");
    1539             : 
    1540             :   // Canonicalize shuffle undef, undef -> undef
    1541      112150 :   if (N1.isUndef() && N2.isUndef())
    1542          72 :     return getUNDEF(VT);
    1543             : 
    1544             :   // Validate that all indices in Mask are within the range of the elements
    1545             :   // input to the shuffle.
    1546      111821 :   int NElts = Mask.size();
    1547             :   assert(llvm::all_of(Mask,
    1548             :                       [&](int M) { return M < (NElts * 2) && M >= -1; }) &&
    1549             :          "Index out of range");
    1550             : 
    1551             :   // Copy the mask so we can do any needed cleanup.
    1552             :   SmallVector<int, 8> MaskVec(Mask.begin(), Mask.end());
    1553             : 
    1554             :   // Canonicalize shuffle v, v -> v, undef
    1555             :   if (N1 == N2) {
    1556        6679 :     N2 = getUNDEF(VT);
    1557      113477 :     for (int i = 0; i != NElts; ++i)
    1558      106798 :       if (MaskVec[i] >= NElts) MaskVec[i] -= NElts;
    1559             :   }
    1560             : 
    1561             :   // Canonicalize shuffle undef, v -> v, undef.  Commute the shuffle mask.
    1562      111821 :   if (N1.isUndef())
    1563             :     commuteShuffle(N1, N2, MaskVec);
    1564             : 
    1565      111821 :   if (TLI->hasVectorBlend()) {
    1566             :     // If shuffling a splat, try to blend the splat instead. We do this here so
    1567             :     // that even when this arises during lowering we don't have to re-handle it.
    1568        8972 :     auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
    1569             :       BitVector UndefElements;
    1570        8972 :       SDValue Splat = BV->getSplatValue(&UndefElements);
    1571        8972 :       if (!Splat)
    1572             :         return;
    1573             : 
    1574      205913 :       for (int i = 0; i < NElts; ++i) {
    1575      197664 :         if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + NElts))
    1576       38774 :           continue;
    1577             : 
    1578             :         // If this input comes from undef, mark it as such.
    1579      120199 :         if (UndefElements[MaskVec[i] - Offset]) {
    1580          83 :           MaskVec[i] = -1;
    1581          83 :           continue;
    1582             :         }
    1583             : 
    1584             :         // If we can blend a non-undef lane, use that instead.
    1585      119950 :         if (!UndefElements[i])
    1586       57534 :           MaskVec[i] = i + Offset;
    1587             :       }
    1588      102974 :     };
    1589             :     if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
    1590        3910 :       BlendSplat(N1BV, 0);
    1591             :     if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
    1592        5062 :       BlendSplat(N2BV, NElts);
    1593             :   }
    1594             : 
    1595             :   // Canonicalize all index into lhs, -> shuffle lhs, undef
    1596             :   // Canonicalize all index into rhs, -> shuffle rhs, undef
    1597             :   bool AllLHS = true, AllRHS = true;
    1598             :   bool N2Undef = N2.isUndef();
    1599     2706347 :   for (int i = 0; i != NElts; ++i) {
    1600     2594526 :     if (MaskVec[i] >= NElts) {
    1601      161787 :       if (N2Undef)
    1602        3131 :         MaskVec[i] = -1;
    1603             :       else
    1604             :         AllLHS = false;
    1605     1135476 :     } else if (MaskVec[i] >= 0) {
    1606             :       AllRHS = false;
    1607             :     }
    1608             :   }
    1609      111821 :   if (AllLHS && AllRHS)
    1610          55 :     return getUNDEF(VT);
    1611      111766 :   if (AllLHS && !N2Undef)
    1612        3602 :     N2 = getUNDEF(VT);
    1613      111766 :   if (AllRHS) {
    1614         980 :     N1 = getUNDEF(VT);
    1615             :     commuteShuffle(N1, N2, MaskVec);
    1616             :   }
    1617             :   // Reset our undef status after accounting for the mask.
    1618             :   N2Undef = N2.isUndef();
    1619             :   // Re-check whether both sides ended up undef.
    1620      111766 :   if (N1.isUndef() && N2Undef)
    1621           0 :     return getUNDEF(VT);
    1622             : 
    1623             :   // If Identity shuffle return that node.
    1624             :   bool Identity = true, AllSame = true;
    1625     2705742 :   for (int i = 0; i != NElts; ++i) {
    1626     2593976 :     if (MaskVec[i] >= 0 && MaskVec[i] != i) Identity = false;
    1627     1296988 :     if (MaskVec[i] != MaskVec[0]) AllSame = false;
    1628             :   }
    1629      111766 :   if (Identity && NElts)
    1630       11905 :     return N1;
    1631             : 
    1632             :   // Shuffling a constant splat doesn't change the result.
    1633       99861 :   if (N2Undef) {
    1634             :     SDValue V = N1;
    1635             : 
    1636             :     // Look through any bitcasts. We check that these don't change the number
    1637             :     // (and size) of elements and just changes their types.
    1638       91840 :     while (V.getOpcode() == ISD::BITCAST)
    1639       15921 :       V = V->getOperand(0);
    1640             : 
    1641             :     // A splat should always show up as a build vector node.
    1642             :     if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
    1643             :       BitVector UndefElements;
    1644        1418 :       SDValue Splat = BV->getSplatValue(&UndefElements);
    1645             :       // If this is a splat of an undef, shuffling it is also undef.
    1646        1809 :       if (Splat && Splat.isUndef())
    1647           0 :         return getUNDEF(VT);
    1648             : 
    1649             :       bool SameNumElts =
    1650        1418 :           V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
    1651             : 
    1652             :       // We only have a splat which can skip shuffles if there is a splatted
    1653             :       // value and no undef lanes rearranged by the shuffle.
    1654        1809 :       if (Splat && UndefElements.none()) {
    1655             :         // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
    1656             :         // number of elements match or the value splatted is a zero constant.
    1657         246 :         if (SameNumElts)
    1658         215 :           return N1;
    1659             :         if (auto *C = dyn_cast<ConstantSDNode>(Splat))
    1660          60 :           if (C->isNullValue())
    1661          23 :             return N1;
    1662             :       }
    1663             : 
    1664             :       // If the shuffle itself creates a splat, build the vector directly.
    1665        1180 :       if (AllSame && SameNumElts) {
    1666         258 :         EVT BuildVT = BV->getValueType(0);
    1667         258 :         const SDValue &Splatted = BV->getOperand(MaskVec[0]);
    1668         258 :         SDValue NewBV = getSplatBuildVector(BuildVT, dl, Splatted);
    1669             : 
    1670             :         // We may have jumped through bitcasts, so the type of the
    1671             :         // BUILD_VECTOR may not match the type of the shuffle.
    1672         258 :         if (BuildVT != VT)
    1673           0 :           NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
    1674         258 :         return NewBV;
    1675             :       }
    1676             :     }
    1677             :   }
    1678             : 
    1679             :   FoldingSetNodeID ID;
    1680       99365 :   SDValue Ops[2] = { N1, N2 };
    1681       99365 :   AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
    1682     2525449 :   for (int i = 0; i != NElts; ++i)
    1683     2426084 :     ID.AddInteger(MaskVec[i]);
    1684             : 
    1685       99365 :   void* IP = nullptr;
    1686       99365 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
    1687        1567 :     return SDValue(E, 0);
    1688             : 
    1689             :   // Allocate the mask array for the node out of the BumpPtrAllocator, since
    1690             :   // SDNode doesn't have access to it.  This memory will be "leaked" when
    1691             :   // the node is deallocated, but recovered when the NodeAllocator is released.
    1692       97798 :   int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
    1693             :   std::copy(MaskVec.begin(), MaskVec.end(), MaskAlloc);
    1694             : 
    1695       97798 :   auto *N = newSDNode<ShuffleVectorSDNode>(VT, dl.getIROrder(),
    1696       97798 :                                            dl.getDebugLoc(), MaskAlloc);
    1697       97798 :   createOperands(N, Ops);
    1698             : 
    1699       97798 :   CSEMap.InsertNode(N, IP);
    1700       97798 :   InsertNode(N);
    1701             :   SDValue V = SDValue(N, 0);
    1702             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    1703       97798 :   return V;
    1704             : }
    1705             : 
    1706        4883 : SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
    1707        9766 :   EVT VT = SV.getValueType(0);
    1708             :   SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
    1709             :   ShuffleVectorSDNode::commuteMask(MaskVec);
    1710             : 
    1711        4883 :   SDValue Op0 = SV.getOperand(0);
    1712        4883 :   SDValue Op1 = SV.getOperand(1);
    1713       14649 :   return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, MaskVec);
    1714             : }
    1715             : 
    1716     4596154 : SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
    1717             :   FoldingSetNodeID ID;
    1718     4596154 :   AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
    1719     4596154 :   ID.AddInteger(RegNo);
    1720     4596154 :   void *IP = nullptr;
    1721     4596154 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1722     2837767 :     return SDValue(E, 0);
    1723             : 
    1724     1758387 :   auto *N = newSDNode<RegisterSDNode>(RegNo, VT);
    1725     1758387 :   N->SDNodeBits.IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
    1726     1758387 :   CSEMap.InsertNode(N, IP);
    1727     1758387 :   InsertNode(N);
    1728     1758387 :   return SDValue(N, 0);
    1729             : }
    1730             : 
    1731      180457 : SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
    1732             :   FoldingSetNodeID ID;
    1733      180457 :   AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
    1734      180457 :   ID.AddPointer(RegMask);
    1735      180457 :   void *IP = nullptr;
    1736      180457 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1737       62661 :     return SDValue(E, 0);
    1738             : 
    1739      117796 :   auto *N = newSDNode<RegisterMaskSDNode>(RegMask);
    1740      117796 :   CSEMap.InsertNode(N, IP);
    1741      117796 :   InsertNode(N);
    1742      117796 :   return SDValue(N, 0);
    1743             : }
    1744             : 
    1745       85480 : SDValue SelectionDAG::getEHLabel(const SDLoc &dl, SDValue Root,
    1746             :                                  MCSymbol *Label) {
    1747       85480 :   return getLabelNode(ISD::EH_LABEL, dl, Root, Label);
    1748             : }
    1749             : 
    1750       85481 : SDValue SelectionDAG::getLabelNode(unsigned Opcode, const SDLoc &dl,
    1751             :                                    SDValue Root, MCSymbol *Label) {
    1752             :   FoldingSetNodeID ID;
    1753       85481 :   SDValue Ops[] = { Root };
    1754       85481 :   AddNodeIDNode(ID, Opcode, getVTList(MVT::Other), Ops);
    1755       85481 :   ID.AddPointer(Label);
    1756       85481 :   void *IP = nullptr;
    1757       85481 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1758           0 :     return SDValue(E, 0);
    1759             : 
    1760      170962 :   auto *N = newSDNode<LabelSDNode>(dl.getIROrder(), dl.getDebugLoc(), Label);
    1761       85481 :   createOperands(N, Ops);
    1762             : 
    1763       85481 :   CSEMap.InsertNode(N, IP);
    1764       85481 :   InsertNode(N);
    1765       85481 :   return SDValue(N, 0);
    1766             : }
    1767             : 
    1768         264 : SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
    1769             :                                       int64_t Offset,
    1770             :                                       bool isTarget,
    1771             :                                       unsigned char TargetFlags) {
    1772         264 :   unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
    1773             : 
    1774             :   FoldingSetNodeID ID;
    1775         264 :   AddNodeIDNode(ID, Opc, getVTList(VT), None);
    1776         264 :   ID.AddPointer(BA);
    1777         264 :   ID.AddInteger(Offset);
    1778         264 :   ID.AddInteger(TargetFlags);
    1779         264 :   void *IP = nullptr;
    1780         264 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1781           2 :     return SDValue(E, 0);
    1782             : 
    1783         262 :   auto *N = newSDNode<BlockAddressSDNode>(Opc, VT, BA, Offset, TargetFlags);
    1784         262 :   CSEMap.InsertNode(N, IP);
    1785         262 :   InsertNode(N);
    1786         262 :   return SDValue(N, 0);
    1787             : }
    1788             : 
    1789         626 : SDValue SelectionDAG::getSrcValue(const Value *V) {
    1790             :   assert((!V || V->getType()->isPointerTy()) &&
    1791             :          "SrcValue is not a pointer?");
    1792             : 
    1793             :   FoldingSetNodeID ID;
    1794         626 :   AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
    1795         626 :   ID.AddPointer(V);
    1796             : 
    1797         626 :   void *IP = nullptr;
    1798         626 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1799         171 :     return SDValue(E, 0);
    1800             : 
    1801         455 :   auto *N = newSDNode<SrcValueSDNode>(V);
    1802         455 :   CSEMap.InsertNode(N, IP);
    1803         455 :   InsertNode(N);
    1804         455 :   return SDValue(N, 0);
    1805             : }
    1806             : 
    1807       16844 : SDValue SelectionDAG::getMDNode(const MDNode *MD) {
    1808             :   FoldingSetNodeID ID;
    1809       16844 :   AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
    1810       16844 :   ID.AddPointer(MD);
    1811             : 
    1812       16844 :   void *IP = nullptr;
    1813       16844 :   if (SDNode *E = FindNodeOrInsertPos(ID, IP))
    1814           0 :     return SDValue(E, 0);
    1815             : 
    1816       16844 :   auto *N = newSDNode<MDNodeSDNode>(MD);
    1817       16844 :   CSEMap.InsertNode(N, IP);
    1818       16844 :   InsertNode(N);
    1819       16844 :   return SDValue(N, 0);
    1820             : }
    1821             : 
    1822      343210 : SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
    1823          50 :   if (VT == V.getValueType())
    1824       87397 :     return V;
    1825             : 
    1826      511626 :   return getNode(ISD::BITCAST, SDLoc(V), VT, V);
    1827             : }
    1828             : 
    1829         212 : SDValue SelectionDAG::getAddrSpaceCast(const SDLoc &dl, EVT VT, SDValue Ptr,
    1830             :                                        unsigned SrcAS, unsigned DestAS) {
    1831         212 :   SDValue Ops[] = {Ptr};
    1832             :   FoldingSetNodeID ID;
    1833         212 :   AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
    1834         212 :   ID.AddInteger(SrcAS);
    1835         212 :   ID.AddInteger(DestAS);
    1836             : 
    1837         212 :   void *IP = nullptr;
    1838         212 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
    1839           0 :     return SDValue(E, 0);
    1840             : 
    1841         212 :   auto *N = newSDNode<AddrSpaceCastSDNode>(dl.getIROrder(), dl.getDebugLoc(),
    1842         212 :                                            VT, SrcAS, DestAS);
    1843         212 :   createOperands(N, Ops);
    1844             : 
    1845         212 :   CSEMap.InsertNode(N, IP);
    1846         212 :   InsertNode(N);
    1847         212 :   return SDValue(N, 0);
    1848             : }
    1849             : 
    1850             : /// getShiftAmountOperand - Return the specified value casted to
    1851             : /// the target's desired shift amount type.
    1852      281904 : SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
    1853      281904 :   EVT OpTy = Op.getValueType();
    1854      563808 :   EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
    1855      563808 :   if (OpTy == ShTy || OpTy.isVector()) return Op;
    1856             : 
    1857       85286 :   return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
    1858             : }
    1859             : 
    1860          32 : SDValue SelectionDAG::expandVAArg(SDNode *Node) {
    1861             :   SDLoc dl(Node);
    1862          32 :   const TargetLowering &TLI = getTargetLoweringInfo();
    1863          64 :   const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
    1864          64 :   EVT VT = Node->getValueType(0);
    1865          32 :   SDValue Tmp1 = Node->getOperand(0);
    1866          32 :   SDValue Tmp2 = Node->getOperand(1);
    1867          32 :   unsigned Align = Node->getConstantOperandVal(3);
    1868             : 
    1869             :   SDValue VAListLoad = getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1,
    1870          64 :                                Tmp2, MachinePointerInfo(V));
    1871          32 :   SDValue VAList = VAListLoad;
    1872             : 
    1873          32 :   if (Align > TLI.getMinStackArgumentAlignment()) {
    1874             :     assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2");
    1875             : 
    1876          13 :     VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
    1877          26 :                      getConstant(Align - 1, dl, VAList.getValueType()));
    1878             : 
    1879          13 :     VAList = getNode(ISD::AND, dl, VAList.getValueType(), VAList,
    1880          26 :                      getConstant(-(int64_t)Align, dl, VAList.getValueType()));
    1881             :   }
    1882             : 
    1883             :   // Increment the pointer, VAList, to the next vaarg
    1884          32 :   Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
    1885          32 :                  getConstant(getDataLayout().getTypeAllocSize(
    1886          32 :                                                VT.getTypeForEVT(*getContext())),
    1887          64 :                              dl, VAList.getValueType()));
    1888             :   // Store the incremented VAList to the legalized pointer
    1889          32 :   Tmp1 =
    1890          64 :       getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2, MachinePointerInfo(V));
    1891             :   // Load the actual argument out of the pointer VAList
    1892          64 :   return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo());
    1893             : }
    1894             : 
    1895           7 : SDValue SelectionDAG::expandVACopy(SDNode *Node) {
    1896             :   SDLoc dl(Node);
    1897             :   const TargetLowering &TLI = getTargetLoweringInfo();
    1898             :   // This defaults to loading a pointer from the input and storing it to the
    1899             :   // output, returning the chain.
    1900          14 :   const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
    1901           7 :   const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
    1902             :   SDValue Tmp1 =
    1903             :       getLoad(TLI.getPointerTy(getDataLayout()), dl, Node->getOperand(0),
    1904          14 :               Node->getOperand(2), MachinePointerInfo(VS));
    1905           7 :   return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
    1906          14 :                   MachinePointerInfo(VD));
    1907             : }
    1908             : 
    1909        2594 : SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
    1910        2594 :   MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
    1911             :   unsigned ByteSize = VT.getStoreSize();
    1912        2594 :   Type *Ty = VT.getTypeForEVT(*getContext());
    1913             :   unsigned StackAlign =
    1914        7782 :       std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
    1915             : 
    1916        2594 :   int FrameIdx = MFI.CreateStackObject(ByteSize, StackAlign, false);
    1917        7782 :   return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
    1918             : }
    1919             : 
    1920        2612 : SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
    1921        7836 :   unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
    1922        2612 :   Type *Ty1 = VT1.getTypeForEVT(*getContext());
    1923        2612 :   Type *Ty2 = VT2.getTypeForEVT(*getContext());
    1924        2612 :   const DataLayout &DL = getDataLayout();
    1925             :   unsigned Align =
    1926        5224 :       std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
    1927             : 
    1928        2612 :   MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
    1929        2612 :   int FrameIdx = MFI.CreateStackObject(Bytes, Align, false);
    1930        7836 :   return getFrameIndex(FrameIdx, TLI->getFrameIndexTy(getDataLayout()));
    1931             : }
    1932             : 
    1933      211744 : SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2,
    1934             :                                 ISD::CondCode Cond, const SDLoc &dl) {
    1935      211744 :   EVT OpVT = N1.getValueType();
    1936             : 
    1937             :   // These setcc operations always fold.
    1938      211744 :   switch (Cond) {
    1939             :   default: break;
    1940          35 :   case ISD::SETFALSE:
    1941          35 :   case ISD::SETFALSE2: return getBoolConstant(false, dl, VT, OpVT);
    1942          40 :   case ISD::SETTRUE:
    1943          40 :   case ISD::SETTRUE2: return getBoolConstant(true, dl, VT, OpVT);
    1944             : 
    1945             :   case ISD::SETOEQ:
    1946             :   case ISD::SETOGT:
    1947             :   case ISD::SETOGE:
    1948             :   case ISD::SETOLT:
    1949             :   case ISD::SETOLE:
    1950             :   case ISD::SETONE:
    1951             :   case ISD::SETO:
    1952             :   case ISD::SETUO:
    1953             :   case ISD::SETUEQ:
    1954             :   case ISD::SETUNE:
    1955             :     assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
    1956             :     break;
    1957             :   }
    1958             : 
    1959             :   if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
    1960      127900 :     const APInt &C2 = N2C->getAPIntValue();
    1961             :     if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
    1962         612 :       const APInt &C1 = N1C->getAPIntValue();
    1963             : 
    1964         612 :       switch (Cond) {
    1965           0 :       default: llvm_unreachable("Unknown integer setcc!");
    1966         235 :       case ISD::SETEQ:  return getBoolConstant(C1 == C2, dl, VT, OpVT);
    1967         144 :       case ISD::SETNE:  return getBoolConstant(C1 != C2, dl, VT, OpVT);
    1968          22 :       case ISD::SETULT: return getBoolConstant(C1.ult(C2), dl, VT, OpVT);
    1969          19 :       case ISD::SETUGT: return getBoolConstant(C1.ugt(C2), dl, VT, OpVT);
    1970          38 :       case ISD::SETULE: return getBoolConstant(C1.ule(C2), dl, VT, OpVT);
    1971          16 :       case ISD::SETUGE: return getBoolConstant(C1.uge(C2), dl, VT, OpVT);
    1972          65 :       case ISD::SETLT:  return getBoolConstant(C1.slt(C2), dl, VT, OpVT);
    1973          56 :       case ISD::SETGT:  return getBoolConstant(C1.sgt(C2), dl, VT, OpVT);
    1974           4 :       case ISD::SETLE:  return getBoolConstant(C1.sle(C2), dl, VT, OpVT);
    1975          13 :       case ISD::SETGE:  return getBoolConstant(C1.sge(C2), dl, VT, OpVT);
    1976             :       }
    1977             :     }
    1978             :   }
    1979             :   if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1)) {
    1980             :     if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2)) {
    1981         672 :       APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
    1982         224 :       switch (Cond) {
    1983             :       default: break;
    1984           0 :       case ISD::SETEQ:  if (R==APFloat::cmpUnordered)
    1985           0 :                           return getUNDEF(VT);
    1986             :                         LLVM_FALLTHROUGH;
    1987             :       case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT,
    1988          88 :                                                OpVT);
    1989           0 :       case ISD::SETNE:  if (R==APFloat::cmpUnordered)
    1990           0 :                           return getUNDEF(VT);
    1991             :                         LLVM_FALLTHROUGH;
    1992           0 :       case ISD::SETONE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
    1993           0 :                                                R==APFloat::cmpLessThan, dl, VT,
    1994           0 :                                                OpVT);
    1995           0 :       case ISD::SETLT:  if (R==APFloat::cmpUnordered)
    1996           0 :                           return getUNDEF(VT);
    1997             :                         LLVM_FALLTHROUGH;
    1998             :       case ISD::SETOLT: return getBoolConstant(R==APFloat::cmpLessThan, dl, VT,
    1999          23 :                                                OpVT);
    2000           0 :       case ISD::SETGT:  if (R==APFloat::cmpUnordered)
    2001           0 :                           return getUNDEF(VT);
    2002             :                         LLVM_FALLTHROUGH;
    2003             :       case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl,
    2004          10 :                                                VT, OpVT);
    2005           0 :       case ISD::SETLE:  if (R==APFloat::cmpUnordered)
    2006           0 :                           return getUNDEF(VT);
    2007             :                         LLVM_FALLTHROUGH;
    2008             :       case ISD::SETOLE: return getBoolConstant(R==APFloat::cmpLessThan ||
    2009             :                                                R==APFloat::cmpEqual, dl, VT,
    2010           4 :                                                OpVT);
    2011           0 :       case ISD::SETGE:  if (R==APFloat::cmpUnordered)
    2012           0 :                           return getUNDEF(VT);
    2013             :                         LLVM_FALLTHROUGH;
    2014           6 :       case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan ||
    2015           6 :                                            R==APFloat::cmpEqual, dl, VT, OpVT);
    2016           8 :       case ISD::SETO:   return getBoolConstant(R!=APFloat::cmpUnordered, dl, VT,
    2017           8 :                                                OpVT);
    2018          23 :       case ISD::SETUO:  return getBoolConstant(R==APFloat::cmpUnordered, dl, VT,
    2019          23 :                                                OpVT);
    2020           0 :       case ISD::SETUEQ: return getBoolConstant(R==APFloat::cmpUnordered ||
    2021           0 :                                                R==APFloat::cmpEqual, dl, VT,
    2022           0 :                                                OpVT);
    2023          16 :       case ISD::SETUNE: return getBoolConstant(R!=APFloat::cmpEqual, dl, VT,
    2024          16 :                                                OpVT);
    2025          14 :       case ISD::SETULT: return getBoolConstant(R==APFloat::cmpUnordered ||
    2026           7 :                                                R==APFloat::cmpLessThan, dl, VT,
    2027           7 :                                                OpVT);
    2028          36 :       case ISD::SETUGT: return getBoolConstant(R==APFloat::cmpGreaterThan ||
    2029             :                                                R==APFloat::cmpUnordered, dl, VT,
    2030          36 :                                                OpVT);
    2031           1 :       case ISD::SETULE: return getBoolConstant(R!=APFloat::cmpGreaterThan, dl,
    2032           1 :                                                VT, OpVT);
    2033           2 :       case ISD::SETUGE: return getBoolConstant(R!=APFloat::cmpLessThan, dl, VT,
    2034           2 :                                                OpVT);
    2035             :       }
    2036             :     } else {
    2037             :       // Ensure that the constant occurs on the RHS.
    2038         302 :       ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
    2039             :       MVT CompVT = N1.getValueType().getSimpleVT();
    2040         604 :       if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
    2041         100 :         return SDValue();
    2042             : 
    2043         202 :       return getSetCC(dl, VT, N2, N1, SwappedCond);
    2044             :     }
    2045             :   }
    2046             : 
    2047             :   // Could not fold it.
    2048      210531 :   return SDValue();
    2049             : }
    2050             : 
    2051             : /// See if the specified operand can be simplified with the knowledge that only
    2052             : /// the bits specified by Mask are used.
    2053      252814 : SDValue SelectionDAG::GetDemandedBits(SDValue V, const APInt &Mask) {
    2054      252814 :   switch (V.getOpcode()) {
    2055             :   default:
    2056             :     break;
    2057        4532 :   case ISD::Constant: {
    2058             :     const ConstantSDNode *CV = cast<ConstantSDNode>(V.getNode());
    2059             :     assert(CV && "Const value should be ConstSDNode.");
    2060        4532 :     const APInt &CVal = CV->getAPIntValue();
    2061        4532 :     APInt NewVal = CVal & Mask;
    2062        4532 :     if (NewVal != CVal)
    2063         470 :       return getConstant(NewVal, SDLoc(V), V.getValueType());
    2064             :     break;
    2065             :   }
    2066        4268 :   case ISD::OR:
    2067             :   case ISD::XOR:
    2068             :     // If the LHS or RHS don't contribute bits to the or, drop them.
    2069        4268 :     if (MaskedValueIsZero(V.getOperand(0), Mask))
    2070         671 :       return V.getOperand(1);
    2071        3597 :     if (MaskedValueIsZero(V.getOperand(1), Mask))
    2072         796 :       return V.getOperand(0);
    2073             :     break;
    2074       45514 :   case ISD::SRL:
    2075             :     // Only look at single-use SRLs.
    2076             :     if (!V.getNode()->hasOneUse())
    2077             :       break;
    2078             :     if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(V.getOperand(1))) {
    2079             :       // See if we can recursively simplify the LHS.
    2080       84116 :       unsigned Amt = RHSC->getZExtValue();
    2081             : 
    2082             :       // Watch out for shift count overflow though.
    2083       42058 :       if (Amt >= Mask.getBitWidth())
    2084             :         break;
    2085             :       APInt NewMask = Mask << Amt;
    2086       42057 :       if (SDValue SimplifyLHS = GetDemandedBits(V.getOperand(0), NewMask))
    2087        1145 :         return getNode(ISD::SRL, SDLoc(V), V.getValueType(), SimplifyLHS,
    2088        2290 :                        V.getOperand(1));
    2089             :     }
    2090             :     break;
    2091        8163 :   case ISD::AND: {
    2092             :     // X & -1 -> X (ignoring bits which aren't demanded).
    2093        8163 :     ConstantSDNode *AndVal = isConstOrConstSplat(V.getOperand(1));
    2094       15981 :     if (AndVal && Mask.isSubsetOf(AndVal->getAPIntValue()))
    2095        1451 :       return V.getOperand(0);
    2096             :     break;
    2097             :   }
    2098         628 :   case ISD::ANY_EXTEND: {
    2099         628 :     SDValue Src = V.getOperand(0);
    2100         628 :     unsigned SrcBitWidth = Src.getScalarValueSizeInBits();
    2101             :     // Being conservative here - only peek through if we only demand bits in the
    2102             :     // non-extended source (even though the extended bits are technically undef).
    2103         628 :     if (Mask.getActiveBits() > SrcBitWidth)
    2104             :       break;
    2105         623 :     APInt SrcMask = Mask.trunc(SrcBitWidth);
    2106         623 :     if (SDValue DemandedSrc = GetDemandedBits(Src, SrcMask))
    2107         136 :       return getNode(ISD::ANY_EXTEND, SDLoc(V), V.getValueType(), DemandedSrc);
    2108             :     break;
    2109             :   }
    2110             :   }
    2111      248448 :   return SDValue();
    2112             : }
    2113             : 
    2114             : /// SignBitIsZero - Return true if the sign bit of Op is known to be zero.  We
    2115             : /// use this predicate to simplify operations downstream.
    2116       70459 : bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
    2117       70459 :   unsigned BitWidth = Op.getScalarValueSizeInBits();
    2118      140918 :   return MaskedValueIsZero(Op, APInt::getSignMask(BitWidth), Depth);
    2119             : }
    2120             : 
    2121             : /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero.  We use
    2122             : /// this predicate to simplify operations downstream.  Mask is known to be zero
    2123             : /// for bits that V cannot have.
    2124     1377988 : bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
    2125             :                                      unsigned Depth) const {
    2126     1377988 :   KnownBits Known;
    2127     1377988 :   computeKnownBits(Op, Known, Depth);
    2128     1377988 :   return Mask.isSubsetOf(Known.Zero);
    2129             : }
    2130             : 
    2131             : /// Helper function that checks to see if a node is a constant or a
    2132             : /// build vector of splat constants at least within the demanded elts.
    2133       27752 : static ConstantSDNode *isConstOrDemandedConstSplat(SDValue N,
    2134             :                                                    const APInt &DemandedElts) {
    2135             :   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N))
    2136             :     return CN;
    2137       20777 :   if (N.getOpcode() != ISD::BUILD_VECTOR)
    2138             :     return nullptr;
    2139        8978 :   EVT VT = N.getValueType();
    2140             :   ConstantSDNode *Cst = nullptr;
    2141        4489 :   unsigned NumElts = VT.getVectorNumElements();
    2142             :   assert(DemandedElts.getBitWidth() == NumElts && "Unexpected vector size");
    2143       57857 :   for (unsigned i = 0; i != NumElts; ++i) {
    2144       26709 :     if (!DemandedElts[i])
    2145             :       continue;
    2146             :     ConstantSDNode *C = dyn_cast<ConstantSDNode>(N.getOperand(i));
    2147       43453 :     if (!C || (Cst && Cst->getAPIntValue() != C->getAPIntValue()) ||
    2148       34920 :         C->getValueType(0) != VT.getScalarType())
    2149             :       return nullptr;
    2150             :     Cst = C;
    2151             :   }
    2152             :   return Cst;
    2153             : }
    2154             : 
    2155             : /// If a SHL/SRA/SRL node has a constant or splat constant shift amount that
    2156             : /// is less than the element bit-width of the shift node, return it.
    2157     1602242 : static const APInt *getValidShiftAmountConstant(SDValue V) {
    2158     3204484 :   if (ConstantSDNode *SA = isConstOrConstSplat(V.getOperand(1))) {
    2159             :     // Shifting more than the bitwidth is not valid.
    2160     1568602 :     const APInt &ShAmt = SA->getAPIntValue();
    2161     1568602 :     if (ShAmt.ult(V.getScalarValueSizeInBits()))
    2162             :       return &ShAmt;
    2163             :   }
    2164             :   return nullptr;
    2165             : }
    2166             : 
    2167             : /// Determine which bits of Op are known to be either zero or one and return
    2168             : /// them in Known. For vectors, the known bits are those that are shared by
    2169             : /// every vector element.
    2170    12297687 : void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known,
    2171             :                                     unsigned Depth) const {
    2172    24595374 :   EVT VT = Op.getValueType();
    2173             :   APInt DemandedElts = VT.isVector()
    2174             :                            ? APInt::getAllOnesValue(VT.getVectorNumElements())
    2175    12297687 :                            : APInt(1, 1);
    2176    12297687 :   computeKnownBits(Op, Known, DemandedElts, Depth);
    2177    12297687 : }
    2178             : 
    2179             : /// Determine which bits of Op are known to be either zero or one and return
    2180             : /// them in Known. The DemandedElts argument allows us to only collect the known
    2181             : /// bits that are shared by the requested vector elements.
    2182    27388769 : void SelectionDAG::computeKnownBits(SDValue Op, KnownBits &Known,
    2183             :                                     const APInt &DemandedElts,
    2184             :                                     unsigned Depth) const {
    2185    27388769 :   unsigned BitWidth = Op.getScalarValueSizeInBits();
    2186             : 
    2187    27388769 :   Known = KnownBits(BitWidth);   // Don't know anything.
    2188             : 
    2189             :   if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
    2190             :     // We know all of the bits for a constant!
    2191     9285014 :     Known.One = C->getAPIntValue();
    2192     4642507 :     Known.Zero = ~Known.One;
    2193    10392093 :     return;
    2194             :   }
    2195             :   if (auto *C = dyn_cast<ConstantFPSDNode>(Op)) {
    2196             :     // We know all of the bits for a constant fp!
    2197       24273 :     Known.One = C->getValueAPF().bitcastToAPInt();
    2198        8091 :     Known.Zero = ~Known.One;
    2199        8091 :     return;
    2200             :   }
    2201             : 
    2202    22738171 :   if (Depth == 6)
    2203             :     return;  // Limit search depth.
    2204             : 
    2205    21639183 :   KnownBits Known2;
    2206    21639183 :   unsigned NumElts = DemandedElts.getBitWidth();
    2207             : 
    2208    21639183 :   if (!DemandedElts)
    2209           0 :     return;  // No demanded elts, better to assume we don't know anything.
    2210             : 
    2211             :   unsigned Opcode = Op.getOpcode();
    2212    21639183 :   switch (Opcode) {
    2213      527334 :   case ISD::BUILD_VECTOR:
    2214             :     // Collect the known bits that are shared by every demanded vector element.
    2215             :     assert(NumElts == Op.getValueType().getVectorNumElements() &&
    2216             :            "Unexpected vector size");
    2217      527334 :     Known.Zero.setAllBits(); Known.One.setAllBits();
    2218     7216312 :     for (unsigned i = 0, e = Op.getNumOperands(); i != e; ++i) {
    2219     3217087 :       if (!DemandedElts[i])
    2220     1996243 :         continue;
    2221             : 
    2222     2441688 :       SDValue SrcOp = Op.getOperand(i);
    2223     1220844 :       computeKnownBits(SrcOp, Known2, Depth + 1);
    2224             : 
    2225             :       // BUILD_VECTOR can implicitly truncate sources, we must handle this.
    2226     1220844 :       if (SrcOp.getValueSizeInBits() != BitWidth) {
    2227             :         assert(SrcOp.getValueSizeInBits() > BitWidth &&
    2228             :                "Expected BUILD_VECTOR implicit truncation");
    2229       24108 :         Known2 = Known2.trunc(BitWidth);
    2230             :       }
    2231             : 
    2232             :       // Known bits are the values that are shared by every demanded element.
    2233             :       Known.One &= Known2.One;
    2234             :       Known.Zero &= Known2.Zero;
    2235             : 
    2236             :       // If we don't know any bits, early out.
    2237     1220844 :       if (Known.isUnknown())
    2238             :         break;
    2239      391069 :     }
    2240             :     break;
    2241             :   case ISD::VECTOR_SHUFFLE: {
    2242             :     // Collect the known bits that are shared by every vector element referenced
    2243             :     // by the shuffle.
    2244             :     APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
    2245      157243 :     Known.Zero.setAllBits(); Known.One.setAllBits();
    2246             :     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
    2247             :     assert(NumElts == SVN->getMask().size() && "Unexpected vector size");
    2248     3565503 :     for (unsigned i = 0; i != NumElts; ++i) {
    2249     1749977 :       if (!DemandedElts[i])
    2250     1213347 :         continue;
    2251             : 
    2252      536630 :       int M = SVN->getMaskElt(i);
    2253      536630 :       if (M < 0) {
    2254             :         // For UNDEF elements, we don't know anything about the common state of
    2255             :         // the shuffle result.
    2256             :         Known.resetAll();
    2257       45847 :         DemandedLHS.clearAllBits();
    2258       45847 :         DemandedRHS.clearAllBits();
    2259       45847 :         break;
    2260             :       }
    2261             : 
    2262      490783 :       if ((unsigned)M < NumElts)
    2263      386204 :         DemandedLHS.setBit((unsigned)M % NumElts);
    2264             :       else
    2265      104579 :         DemandedRHS.setBit((unsigned)M % NumElts);
    2266             :     }
    2267             :     // Known bits are the values that are shared by every demanded element.
    2268      157243 :     if (!!DemandedLHS) {
    2269      167614 :       SDValue LHS = Op.getOperand(0);
    2270       83807 :       computeKnownBits(LHS, Known2, DemandedLHS, Depth + 1);
    2271             :       Known.One &= Known2.One;
    2272             :       Known.Zero &= Known2.Zero;
    2273             :     }
    2274             :     // If we don't know any bits, early out.
    2275      157243 :     if (Known.isUnknown())
    2276             :       break;
    2277       29471 :     if (!!DemandedRHS) {
    2278       55668 :       SDValue RHS = Op.getOperand(1);
    2279       27834 :       computeKnownBits(RHS, Known2, DemandedRHS, Depth + 1);
    2280             :       Known.One &= Known2.One;
    2281             :       Known.Zero &= Known2.Zero;
    2282             :     }
    2283             :     break;
    2284             :   }
    2285       40156 :   case ISD::CONCAT_VECTORS: {
    2286             :     // Split DemandedElts and test each of the demanded subvectors.
    2287       40156 :     Known.Zero.setAllBits(); Known.One.setAllBits();
    2288      120468 :     EVT SubVectorVT = Op.getOperand(0).getValueType();
    2289       40156 :     unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
    2290             :     unsigned NumSubVectors = Op.getNumOperands();
    2291      107050 :     for (unsigned i = 0; i != NumSubVectors; ++i) {
    2292       64641 :       APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
    2293      129282 :       DemandedSub = DemandedSub.trunc(NumSubVectorElts);
    2294       64641 :       if (!!DemandedSub) {
    2295       81440 :         SDValue Sub = Op.getOperand(i);
    2296       40720 :         computeKnownBits(Sub, Known2, DemandedSub, Depth + 1);
    2297             :         Known.One &= Known2.One;
    2298             :         Known.Zero &= Known2.Zero;
    2299             :       }
    2300             :       // If we don't know any bits, early out.
    2301       64641 :       if (Known.isUnknown())
    2302             :         break;
    2303             :     }
    2304             :     break;
    2305             :   }
    2306       36079 :   case ISD::INSERT_SUBVECTOR: {
    2307             :     // If we know the element index, demand any elements from the subvector and
    2308             :     // the remainder from the src its inserted into, otherwise demand them all.
    2309       36079 :     SDValue Src = Op.getOperand(0);
    2310       36079 :     SDValue Sub = Op.getOperand(1);
    2311             :     ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(2));
    2312       36079 :     unsigned NumSubElts = Sub.getValueType().getVectorNumElements();
    2313      108237 :     if (SubIdx && SubIdx->getAPIntValue().ule(NumElts - NumSubElts)) {
    2314       36079 :       Known.One.setAllBits();
    2315       36079 :       Known.Zero.setAllBits();
    2316       36079 :       uint64_t Idx = SubIdx->getZExtValue();
    2317       36079 :       APInt DemandedSubElts = DemandedElts.extractBits(NumSubElts, Idx);
    2318       36079 :       if (!!DemandedSubElts) {
    2319       27923 :         computeKnownBits(Sub, Known, DemandedSubElts, Depth + 1);
    2320       27923 :         if (Known.isUnknown())
    2321             :           break; // early-out.
    2322             :       }
    2323        9513 :       APInt SubMask = APInt::getBitsSet(NumElts, Idx, Idx + NumSubElts);
    2324       19026 :       APInt DemandedSrcElts = DemandedElts & ~SubMask;
    2325        9513 :       if (!!DemandedSrcElts) {
    2326        8854 :         computeKnownBits(Src, Known2, DemandedSrcElts, Depth + 1);
    2327             :         Known.One &= Known2.One;
    2328             :         Known.Zero &= Known2.Zero;
    2329             :       }
    2330             :     } else {
    2331           0 :       computeKnownBits(Sub, Known, Depth + 1);
    2332           0 :       if (Known.isUnknown())
    2333             :         break; // early-out.
    2334           0 :       computeKnownBits(Src, Known2, Depth + 1);
    2335           0 :       Known.One &= Known2.One;
    2336           0 :       Known.Zero &= Known2.Zero;
    2337             :     }
    2338             :     break;
    2339             :   }
    2340      163191 :   case ISD::EXTRACT_SUBVECTOR: {
    2341             :     // If we know the element index, just demand that subvector elements,
    2342             :     // otherwise demand them all.
    2343      163191 :     SDValue Src = Op.getOperand(0);
    2344             :     ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
    2345      163191 :     unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
    2346      489573 :     if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    2347             :       // Offset the demanded elts by the subvector index.
    2348             :       uint64_t Idx = SubIdx->getZExtValue();
    2349      326382 :       APInt DemandedSrc = DemandedElts.zext(NumSrcElts).shl(Idx);
    2350      163191 :       computeKnownBits(Src, Known, DemandedSrc, Depth + 1);
    2351             :     } else {
    2352           0 :       computeKnownBits(Src, Known, Depth + 1);
    2353             :     }
    2354             :     break;
    2355             :   }
    2356     1067951 :   case ISD::BITCAST: {
    2357     1067951 :     SDValue N0 = Op.getOperand(0);
    2358     1067951 :     EVT SubVT = N0.getValueType();
    2359             :     unsigned SubBitWidth = SubVT.getScalarSizeInBits();
    2360             : 
    2361             :     // Ignore bitcasts from unsupported types.
    2362     1067951 :     if (!(SubVT.isInteger() || SubVT.isFloatingPoint()))
    2363             :       break;
    2364             : 
    2365             :     // Fast handling of 'identity' bitcasts.
    2366     1067721 :     if (BitWidth == SubBitWidth) {
    2367       32516 :       computeKnownBits(N0, Known, DemandedElts, Depth + 1);
    2368       32516 :       break;
    2369             :     }
    2370             : 
    2371     2070410 :     bool IsLE = getDataLayout().isLittleEndian();
    2372             : 
    2373             :     // Bitcast 'small element' vector to 'large element' scalar/vector.
    2374     1035205 :     if ((BitWidth % SubBitWidth) == 0) {
    2375             :       assert(N0.getValueType().isVector() && "Expected bitcast from vector");
    2376             : 
    2377             :       // Collect known bits for the (larger) output by collecting the known
    2378             :       // bits from each set of sub elements and shift these into place.
    2379             :       // We need to separately call computeKnownBits for each set of
    2380             :       // sub elements as the knownbits for each is likely to be different.
    2381      540679 :       unsigned SubScale = BitWidth / SubBitWidth;
    2382      540679 :       APInt SubDemandedElts(NumElts * SubScale, 0);
    2383     3742063 :       for (unsigned i = 0; i != NumElts; ++i)
    2384     1600692 :         if (DemandedElts[i])
    2385     1239745 :           SubDemandedElts.setBit(i * SubScale);
    2386             : 
    2387     4271395 :       for (unsigned i = 0; i != SubScale; ++i) {
    2388     3730716 :         computeKnownBits(N0, Known2, SubDemandedElts.shl(i),
    2389             :                          Depth + 1);
    2390     1865358 :         unsigned Shifts = IsLE ? i : SubScale - 1 - i;
    2391     5596074 :         Known.One |= Known2.One.zext(BitWidth).shl(SubBitWidth * Shifts);
    2392     5596074 :         Known.Zero |= Known2.Zero.zext(BitWidth).shl(SubBitWidth * Shifts);
    2393             :       }
    2394             :     }
    2395             : 
    2396             :     // Bitcast 'large element' scalar/vector to 'small element' vector.
    2397     1035205 :     if ((SubBitWidth % BitWidth) == 0) {
    2398             :       assert(Op.getValueType().isVector() && "Expected bitcast to vector");
    2399             : 
    2400             :       // Collect known bits for the (smaller) output by collecting the known
    2401             :       // bits from the overlapping larger input elements and extracting the
    2402             :       // sub sections we actually care about.
    2403      494526 :       unsigned SubScale = SubBitWidth / BitWidth;
    2404      494526 :       APInt SubDemandedElts(NumElts / SubScale, 0);
    2405    19803260 :       for (unsigned i = 0; i != NumElts; ++i)
    2406     9654367 :         if (DemandedElts[i])
    2407     1672084 :           SubDemandedElts.setBit(i / SubScale);
    2408             : 
    2409      494526 :       computeKnownBits(N0, Known2, SubDemandedElts, Depth + 1);
    2410             : 
    2411      494526 :       Known.Zero.setAllBits(); Known.One.setAllBits();
    2412     7089682 :       for (unsigned i = 0; i != NumElts; ++i)
    2413     3767705 :         if (DemandedElts[i]) {
    2414      622100 :           unsigned Shifts = IsLE ? i : NumElts - 1 - i;
    2415      622100 :           unsigned Offset = (Shifts % SubScale) * BitWidth;
    2416     1866300 :           Known.One &= Known2.One.lshr(Offset).trunc(BitWidth);
    2417     1866300 :           Known.Zero &= Known2.Zero.lshr(Offset).trunc(BitWidth);
    2418             :           // If we don't know any bits, early out.
    2419      622100 :           if (Known.isUnknown())
    2420             :             break;
    2421             :         }
    2422             :     }
    2423             :     break;
    2424             :   }
    2425      677202 :   case ISD::AND:
    2426             :     // If either the LHS or the RHS are Zero, the result is zero.
    2427     1354404 :     computeKnownBits(Op.getOperand(1), Known, DemandedElts, Depth + 1);
    2428     1354404 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2429             : 
    2430             :     // Output known-1 bits are only known if set in both the LHS & RHS.
    2431      677202 :     Known.One &= Known2.One;
    2432             :     // Output known-0 are known to be clear if zero in either the LHS | RHS.
    2433      677202 :     Known.Zero |= Known2.Zero;
    2434             :     break;
    2435      182324 :   case ISD::OR:
    2436      364648 :     computeKnownBits(Op.getOperand(1), Known, DemandedElts, Depth + 1);
    2437      364648 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2438             : 
    2439             :     // Output known-0 bits are only known if clear in both the LHS & RHS.
    2440      182324 :     Known.Zero &= Known2.Zero;
    2441             :     // Output known-1 are known to be set if set in either the LHS | RHS.
    2442      182324 :     Known.One |= Known2.One;
    2443             :     break;
    2444      177879 :   case ISD::XOR: {
    2445      355758 :     computeKnownBits(Op.getOperand(1), Known, DemandedElts, Depth + 1);
    2446      355758 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2447             : 
    2448             :     // Output known-0 bits are known if clear or set in both the LHS & RHS.
    2449     1067274 :     APInt KnownZeroOut = (Known.Zero & Known2.Zero) | (Known.One & Known2.One);
    2450             :     // Output known-1 are known to be set if set in only one of the LHS, RHS.
    2451      711516 :     Known.One = (Known.Zero & Known2.One) | (Known.One & Known2.Zero);
    2452      177879 :     Known.Zero = KnownZeroOut;
    2453             :     break;
    2454             :   }
    2455      101213 :   case ISD::MUL: {
    2456      202426 :     computeKnownBits(Op.getOperand(1), Known, DemandedElts, Depth + 1);
    2457      202426 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2458             : 
    2459             :     // If low bits are zero in either operand, output low known-0 bits.
    2460             :     // Also compute a conservative estimate for high known-0 bits.
    2461             :     // More trickiness is possible, but this is sufficient for the
    2462             :     // interesting case of alignment computation.
    2463      101213 :     unsigned TrailZ = Known.countMinTrailingZeros() +
    2464      101213 :                       Known2.countMinTrailingZeros();
    2465      303639 :     unsigned LeadZ =  std::max(Known.countMinLeadingZeros() +
    2466             :                                Known2.countMinLeadingZeros(),
    2467      101213 :                                BitWidth) - BitWidth;
    2468             : 
    2469             :     Known.resetAll();
    2470      101213 :     Known.Zero.setLowBits(std::min(TrailZ, BitWidth));
    2471      101213 :     Known.Zero.setHighBits(std::min(LeadZ, BitWidth));
    2472             :     break;
    2473             :   }
    2474        1491 :   case ISD::UDIV: {
    2475             :     // For the purposes of computing leading zeros we can conservatively
    2476             :     // treat a udiv as a logical right shift by the power of 2 known to
    2477             :     // be less than the denominator.
    2478        2982 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2479             :     unsigned LeadZ = Known2.countMinLeadingZeros();
    2480             : 
    2481        2982 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth + 1);
    2482             :     unsigned RHSMaxLeadingZeros = Known2.countMaxLeadingZeros();
    2483        1491 :     if (RHSMaxLeadingZeros != BitWidth)
    2484        1852 :       LeadZ = std::min(BitWidth, LeadZ + BitWidth - RHSMaxLeadingZeros - 1);
    2485             : 
    2486        1491 :     Known.Zero.setHighBits(LeadZ);
    2487             :     break;
    2488             :   }
    2489      161170 :   case ISD::SELECT:
    2490             :   case ISD::VSELECT:
    2491      322340 :     computeKnownBits(Op.getOperand(2), Known, DemandedElts, Depth+1);
    2492             :     // If we don't know any bits, early out.
    2493      161170 :     if (Known.isUnknown())
    2494             :       break;
    2495      234166 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth+1);
    2496             : 
    2497             :     // Only known if known in both the LHS and RHS.
    2498      117083 :     Known.One &= Known2.One;
    2499      117083 :     Known.Zero &= Known2.Zero;
    2500             :     break;
    2501       35837 :   case ISD::SELECT_CC:
    2502       71674 :     computeKnownBits(Op.getOperand(3), Known, DemandedElts, Depth+1);
    2503             :     // If we don't know any bits, early out.
    2504       35837 :     if (Known.isUnknown())
    2505             :       break;
    2506       13144 :     computeKnownBits(Op.getOperand(2), Known2, DemandedElts, Depth+1);
    2507             : 
    2508             :     // Only known if known in both the LHS and RHS.
    2509        6572 :     Known.One &= Known2.One;
    2510        6572 :     Known.Zero &= Known2.Zero;
    2511             :     break;
    2512        2404 :   case ISD::SMULO:
    2513             :   case ISD::UMULO:
    2514             :   case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
    2515        2404 :     if (Op.getResNo() != 1)
    2516             :       break;
    2517             :     // The boolean result conforms to getBooleanContents.
    2518             :     // If we know the result of a setcc has the top bits zero, use this info.
    2519             :     // We know that we have an integer-based boolean since these operations
    2520             :     // are only available for integer.
    2521        5406 :     if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
    2522        2285 :             TargetLowering::ZeroOrOneBooleanContent &&
    2523             :         BitWidth > 1)
    2524        1449 :       Known.Zero.setBitsFrom(1);
    2525             :     break;
    2526      608308 :   case ISD::SETCC:
    2527             :     // If we know the result of a setcc has the top bits zero, use this info.
    2528     1824924 :     if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    2529      608308 :             TargetLowering::ZeroOrOneBooleanContent &&
    2530             :         BitWidth > 1)
    2531      325937 :       Known.Zero.setBitsFrom(1);
    2532             :     break;
    2533      990717 :   case ISD::SHL:
    2534      990717 :     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    2535     1940262 :       computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2536      970131 :       unsigned Shift = ShAmt->getZExtValue();
    2537      970131 :       Known.Zero <<= Shift;
    2538      970131 :       Known.One <<= Shift;
    2539             :       // Low bits are known zero.
    2540             :       Known.Zero.setLowBits(Shift);
    2541             :     }
    2542             :     break;
    2543      570113 :   case ISD::SRL:
    2544      570113 :     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    2545     1116080 :       computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2546      558040 :       unsigned Shift = ShAmt->getZExtValue();
    2547      558040 :       Known.Zero.lshrInPlace(Shift);
    2548      558040 :       Known.One.lshrInPlace(Shift);
    2549             :       // High bits are known zero.
    2550             :       Known.Zero.setHighBits(Shift);
    2551       12073 :     } else if (auto *BV = dyn_cast<BuildVectorSDNode>(Op.getOperand(1))) {
    2552             :       // If the shift amount is a vector of constants see if we can bound
    2553             :       // the number of upper zero bits.
    2554         175 :       unsigned ShiftAmountMin = BitWidth;
    2555        4736 :       for (unsigned i = 0; i != BV->getNumOperands(); ++i) {
    2556        1517 :         if (auto *C = dyn_cast<ConstantSDNode>(BV->getOperand(i))) {
    2557        1492 :           const APInt &ShAmt = C->getAPIntValue();
    2558        2954 :           if (ShAmt.ult(BitWidth)) {
    2559        1462 :             ShiftAmountMin = std::min<unsigned>(ShiftAmountMin,
    2560        2924 :                                                 ShAmt.getZExtValue());
    2561             :             continue;
    2562             :           }
    2563             :         }
    2564             :         // Don't know anything.
    2565          55 :         ShiftAmountMin = 0;
    2566          55 :         break;
    2567             :       }
    2568             : 
    2569         175 :       Known.Zero.setHighBits(ShiftAmountMin);
    2570             :     }
    2571             :     break;
    2572       41412 :   case ISD::SRA:
    2573       41412 :     if (const APInt *ShAmt = getValidShiftAmountConstant(Op)) {
    2574       80794 :       computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2575       40397 :       unsigned Shift = ShAmt->getZExtValue();
    2576             :       // Sign extend known zero/one bit (else is unknown).
    2577       40397 :       Known.Zero.ashrInPlace(Shift);
    2578       40397 :       Known.One.ashrInPlace(Shift);
    2579             :     }
    2580             :     break;
    2581       29046 :   case ISD::SIGN_EXTEND_INREG: {
    2582       29046 :     EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
    2583             :     unsigned EBits = EVT.getScalarSizeInBits();
    2584             : 
    2585             :     // Sign extension.  Compute the demanded bits in the result that are not
    2586             :     // present in the input.
    2587       29046 :     APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
    2588             : 
    2589             :     APInt InSignMask = APInt::getSignMask(EBits);
    2590       29046 :     APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
    2591             : 
    2592             :     // If the sign extended bits are demanded, we know that the sign
    2593             :     // bit is demanded.
    2594       58092 :     InSignMask = InSignMask.zext(BitWidth);
    2595       29046 :     if (NewBits.getBoolValue())
    2596             :       InputDemandedBits |= InSignMask;
    2597             : 
    2598       58092 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2599       29046 :     Known.One &= InputDemandedBits;
    2600       29046 :     Known.Zero &= InputDemandedBits;
    2601             : 
    2602             :     // If the sign bit of the input is known set or clear, then we know the
    2603             :     // top bits of the result.
    2604       29046 :     if (Known.Zero.intersects(InSignMask)) {        // Input sign bit known clear
    2605             :       Known.Zero |= NewBits;
    2606           4 :       Known.One  &= ~NewBits;
    2607       29044 :     } else if (Known.One.intersects(InSignMask)) {  // Input sign bit known set
    2608             :       Known.One  |= NewBits;
    2609           6 :       Known.Zero &= ~NewBits;
    2610             :     } else {                              // Input sign bit unknown
    2611       58082 :       Known.Zero &= ~NewBits;
    2612       58082 :       Known.One  &= ~NewBits;
    2613             :     }
    2614             :     break;
    2615             :   }
    2616         666 :   case ISD::CTTZ:
    2617             :   case ISD::CTTZ_ZERO_UNDEF: {
    2618        1332 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2619             :     // If we have a known 1, its position is our upper bound.
    2620             :     unsigned PossibleTZ = Known2.countMaxTrailingZeros();
    2621         666 :     unsigned LowBits = Log2_32(PossibleTZ) + 1;
    2622         666 :     Known.Zero.setBitsFrom(LowBits);
    2623             :     break;
    2624             :   }
    2625        2571 :   case ISD::CTLZ:
    2626             :   case ISD::CTLZ_ZERO_UNDEF: {
    2627        5142 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2628             :     // If we have a known 1, its position is our upper bound.
    2629             :     unsigned PossibleLZ = Known2.countMaxLeadingZeros();
    2630        2571 :     unsigned LowBits = Log2_32(PossibleLZ) + 1;
    2631        2571 :     Known.Zero.setBitsFrom(LowBits);
    2632             :     break;
    2633             :   }
    2634        3196 :   case ISD::CTPOP: {
    2635        6392 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2636             :     // If we know some of the bits are zero, they can't be one.
    2637             :     unsigned PossibleOnes = Known2.countMaxPopulation();
    2638        6392 :     Known.Zero.setBitsFrom(Log2_32(PossibleOnes) + 1);
    2639             :     break;
    2640             :   }
    2641             :   case ISD::LOAD: {
    2642             :     LoadSDNode *LD = cast<LoadSDNode>(Op);
    2643             :     // If this is a ZEXTLoad and we are looking at the loaded value.
    2644       66129 :     if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
    2645       66039 :       EVT VT = LD->getMemoryVT();
    2646             :       unsigned MemBits = VT.getScalarSizeInBits();
    2647       66039 :       Known.Zero.setBitsFrom(MemBits);
    2648     4699460 :     } else if (const MDNode *Ranges = LD->getRanges()) {
    2649        2284 :       if (LD->getExtensionType() == ISD::NON_EXTLOAD)
    2650        2278 :         computeKnownBitsFromRangeMetadata(*Ranges, Known);
    2651             :     }
    2652             :     break;
    2653             :   }
    2654        7505 :   case ISD::ZERO_EXTEND_VECTOR_INREG: {
    2655       15010 :     EVT InVT = Op.getOperand(0).getValueType();
    2656        7505 :     APInt InDemandedElts = DemandedElts.zext(InVT.getVectorNumElements());
    2657       15010 :     computeKnownBits(Op.getOperand(0), Known, InDemandedElts, Depth + 1);
    2658        7505 :     Known = Known.zext(BitWidth);
    2659        7505 :     Known.Zero.setBitsFrom(InVT.getScalarSizeInBits());
    2660             :     break;
    2661             :   }
    2662      621904 :   case ISD::ZERO_EXTEND: {
    2663     1243808 :     EVT InVT = Op.getOperand(0).getValueType();
    2664     1243808 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2665      621904 :     Known = Known.zext(BitWidth);
    2666      621904 :     Known.Zero.setBitsFrom(InVT.getScalarSizeInBits());
    2667             :     break;
    2668             :   }
    2669             :   // TODO ISD::SIGN_EXTEND_VECTOR_INREG
    2670       62174 :   case ISD::SIGN_EXTEND: {
    2671      124348 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2672             :     // If the sign bit is known to be zero or one, then sext will extend
    2673             :     // it to the top bits, else it will just zext.
    2674       62174 :     Known = Known.sext(BitWidth);
    2675       62174 :     break;
    2676             :   }
    2677      179813 :   case ISD::ANY_EXTEND: {
    2678      359626 :     computeKnownBits(Op.getOperand(0), Known, Depth+1);
    2679      179813 :     Known = Known.zext(BitWidth);
    2680      179813 :     break;
    2681             :   }
    2682      390613 :   case ISD::TRUNCATE: {
    2683      781226 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2684      390613 :     Known = Known.trunc(BitWidth);
    2685      390613 :     break;
    2686             :   }
    2687      278779 :   case ISD::AssertZext: {
    2688      278779 :     EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
    2689      278779 :     APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
    2690      557558 :     computeKnownBits(Op.getOperand(0), Known, Depth+1);
    2691      836337 :     Known.Zero |= (~InMask);
    2692      836337 :     Known.One  &= (~Known.Zero);
    2693             :     break;
    2694             :   }
    2695          26 :   case ISD::FGETSIGN:
    2696             :     // All bits are zero except the low bit.
    2697          26 :     Known.Zero.setBitsFrom(1);
    2698             :     break;
    2699        6802 :   case ISD::USUBO:
    2700             :   case ISD::SSUBO:
    2701        6802 :     if (Op.getResNo() == 1) {
    2702             :       // If we know the result of a setcc has the top bits zero, use this info.
    2703       19605 :       if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    2704        6535 :               TargetLowering::ZeroOrOneBooleanContent &&
    2705             :           BitWidth > 1)
    2706        1456 :         Known.Zero.setBitsFrom(1);
    2707             :       break;
    2708             :     }
    2709             :     LLVM_FALLTHROUGH;
    2710             :   case ISD::SUB:
    2711             :   case ISD::SUBC: {
    2712       88737 :     if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0))) {
    2713             :       // We know that the top bits of C-X are clear if X contains less bits
    2714             :       // than C (i.e. no wrap-around can happen).  For example, 20-X is
    2715             :       // positive if we can prove that X is >= 0 and < 16.
    2716       29352 :       if (CLHS->getAPIntValue().isNonNegative()) {
    2717       42702 :         unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
    2718             :         // NLZ can't be BitWidth with no sign bit
    2719       14234 :         APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
    2720       28468 :         computeKnownBits(Op.getOperand(1), Known2, DemandedElts,
    2721             :                          Depth + 1);
    2722             : 
    2723             :         // If all of the MaskV bits are known to be zero, then we know the
    2724             :         // output top bits are zero, because we now know that the output is
    2725             :         // from [0-C].
    2726       28468 :         if ((Known2.Zero & MaskV) == MaskV) {
    2727        1018 :           unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
    2728             :           // Top bits known zero.
    2729         509 :           Known.Zero.setHighBits(NLZ2);
    2730             :         }
    2731             :       }
    2732             :     }
    2733             : 
    2734             :     // If low bits are know to be zero in both operands, then we know they are
    2735             :     // going to be 0 in the result. Both addition and complement operations
    2736             :     // preserve the low zero bits.
    2737      177474 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2738       88737 :     unsigned KnownZeroLow = Known2.countMinTrailingZeros();
    2739       88737 :     if (KnownZeroLow == 0)
    2740             :       break;
    2741             : 
    2742       30512 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth + 1);
    2743       30512 :     KnownZeroLow = std::min(KnownZeroLow, Known2.countMinTrailingZeros());
    2744       15256 :     Known.Zero.setLowBits(KnownZeroLow);
    2745             :     break;
    2746             :   }
    2747       22913 :   case ISD::UADDO:
    2748             :   case ISD::SADDO:
    2749             :   case ISD::ADDCARRY:
    2750       22913 :     if (Op.getResNo() == 1) {
    2751             :       // If we know the result of a setcc has the top bits zero, use this info.
    2752       11559 :       if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    2753        3853 :               TargetLowering::ZeroOrOneBooleanContent &&
    2754             :           BitWidth > 1)
    2755        2787 :         Known.Zero.setBitsFrom(1);
    2756             :       break;
    2757             :     }
    2758             :     LLVM_FALLTHROUGH;
    2759             :   case ISD::ADD:
    2760             :   case ISD::ADDC:
    2761             :   case ISD::ADDE: {
    2762             :     // Output known-0 bits are known if clear or set in both the low clear bits
    2763             :     // common to both LHS & RHS.  For example, 8+(X<<3) is known to have the
    2764             :     // low 3 bits clear.
    2765             :     // Output known-0 bits are also known if the top bits of each input are
    2766             :     // known to be clear. For example, if one input has the top 10 bits clear
    2767             :     // and the other has the top 8 bits clear, we know the top 7 bits of the
    2768             :     // output must be clear.
    2769     5973232 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2770     2986616 :     unsigned KnownZeroHigh = Known2.countMinLeadingZeros();
    2771     2986616 :     unsigned KnownZeroLow = Known2.countMinTrailingZeros();
    2772             : 
    2773     5973232 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts,
    2774             :                      Depth + 1);
    2775     5973232 :     KnownZeroHigh = std::min(KnownZeroHigh, Known2.countMinLeadingZeros());
    2776     5973232 :     KnownZeroLow = std::min(KnownZeroLow, Known2.countMinTrailingZeros());
    2777             : 
    2778     2986616 :     if (Opcode == ISD::ADDE || Opcode == ISD::ADDCARRY) {
    2779             :       // With ADDE and ADDCARRY, a carry bit may be added in, so we can only
    2780             :       // use this information if we know (at least) that the low two bits are
    2781             :       // clear. We then return to the caller that the low bit is unknown but
    2782             :       // that other bits are known zero.
    2783       12936 :       if (KnownZeroLow >= 2)
    2784         356 :         Known.Zero.setBits(1, KnownZeroLow);
    2785             :       break;
    2786             :     }
    2787             : 
    2788     2973680 :     Known.Zero.setLowBits(KnownZeroLow);
    2789     2973680 :     if (KnownZeroHigh > 1)
    2790       36876 :       Known.Zero.setHighBits(KnownZeroHigh - 1);
    2791             :     break;
    2792             :   }
    2793        1316 :   case ISD::SREM:
    2794        1316 :     if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
    2795         794 :       const APInt &RA = Rem->getAPIntValue().abs();
    2796         397 :       if (RA.isPowerOf2()) {
    2797          73 :         APInt LowBits = RA - 1;
    2798         146 :         computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2799             : 
    2800             :         // The low bits of the first operand are unchanged by the srem.
    2801         146 :         Known.Zero = Known2.Zero & LowBits;
    2802         146 :         Known.One = Known2.One & LowBits;
    2803             : 
    2804             :         // If the first operand is non-negative or has all low bits zero, then
    2805             :         // the upper bits are all zero.
    2806         365 :         if (Known2.Zero[BitWidth-1] || ((Known2.Zero & LowBits) == LowBits))
    2807          16 :           Known.Zero |= ~LowBits;
    2808             : 
    2809             :         // If the first operand is negative and not all low bits are zero, then
    2810             :         // the upper bits are all one.
    2811         292 :         if (Known2.One[BitWidth-1] && ((Known2.One & LowBits) != 0))
    2812           0 :           Known.One |= ~LowBits;
    2813             :         assert((Known.Zero & Known.One) == 0&&"Bits known to be one AND zero?");
    2814             :       }
    2815             :     }
    2816             :     break;
    2817        1541 :   case ISD::UREM: {
    2818        1541 :     if (ConstantSDNode *Rem = isConstOrConstSplat(Op.getOperand(1))) {
    2819         785 :       const APInt &RA = Rem->getAPIntValue();
    2820         785 :       if (RA.isPowerOf2()) {
    2821           8 :         APInt LowBits = (RA - 1);
    2822          16 :         computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2823             : 
    2824             :         // The upper bits are all zero, the lower ones are unchanged.
    2825          16 :         Known.Zero = Known2.Zero | ~LowBits;
    2826           8 :         Known.One = Known2.One & LowBits;
    2827             :         break;
    2828             :       }
    2829             :     }
    2830             : 
    2831             :     // Since the result is less than or equal to either operand, any leading
    2832             :     // zero bits in either operand must also exist in the result.
    2833        3066 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2834        3066 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth + 1);
    2835             : 
    2836             :     uint32_t Leaders =
    2837        4599 :         std::max(Known.countMinLeadingZeros(), Known2.countMinLeadingZeros());
    2838             :     Known.resetAll();
    2839             :     Known.Zero.setHighBits(Leaders);
    2840             :     break;
    2841             :   }
    2842         128 :   case ISD::EXTRACT_ELEMENT: {
    2843         256 :     computeKnownBits(Op.getOperand(0), Known, Depth+1);
    2844         256 :     const unsigned Index = Op.getConstantOperandVal(1);
    2845         128 :     const unsigned BitWidth = Op.getValueSizeInBits();
    2846             : 
    2847             :     // Remove low part of known bits mask
    2848         256 :     Known.Zero = Known.Zero.getHiBits(Known.Zero.getBitWidth() - Index * BitWidth);
    2849         256 :     Known.One = Known.One.getHiBits(Known.One.getBitWidth() - Index * BitWidth);
    2850             : 
    2851             :     // Remove high part of known bit mask
    2852         128 :     Known = Known.trunc(BitWidth);
    2853         128 :     break;
    2854             :   }
    2855      397574 :   case ISD::EXTRACT_VECTOR_ELT: {
    2856      397574 :     SDValue InVec = Op.getOperand(0);
    2857      397574 :     SDValue EltNo = Op.getOperand(1);
    2858      397574 :     EVT VecVT = InVec.getValueType();
    2859      397574 :     const unsigned BitWidth = Op.getValueSizeInBits();
    2860             :     const unsigned EltBitWidth = VecVT.getScalarSizeInBits();
    2861      397574 :     const unsigned NumSrcElts = VecVT.getVectorNumElements();
    2862             :     // If BitWidth > EltBitWidth the value is anyext:ed. So we do not know
    2863             :     // anything about the extended bits.
    2864      397574 :     if (BitWidth > EltBitWidth)
    2865       11885 :       Known = Known.trunc(EltBitWidth);
    2866             :     ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
    2867      793482 :     if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts)) {
    2868             :       // If we know the element index, just demand that vector element.
    2869      396741 :       unsigned Idx = ConstEltNo->getZExtValue();
    2870      396741 :       APInt DemandedElt = APInt::getOneBitSet(NumSrcElts, Idx);
    2871      396741 :       computeKnownBits(InVec, Known, DemandedElt, Depth + 1);
    2872             :     } else {
    2873             :       // Unknown element index, so ignore DemandedElts and demand them all.
    2874         833 :       computeKnownBits(InVec, Known, Depth + 1);
    2875             :     }
    2876      397574 :     if (BitWidth > EltBitWidth)
    2877       11885 :       Known = Known.zext(BitWidth);
    2878             :     break;
    2879             :   }
    2880        7831 :   case ISD::INSERT_VECTOR_ELT: {
    2881        7831 :     SDValue InVec = Op.getOperand(0);
    2882        7831 :     SDValue InVal = Op.getOperand(1);
    2883        7831 :     SDValue EltNo = Op.getOperand(2);
    2884             : 
    2885             :     ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
    2886       15650 :     if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
    2887             :       // If we know the element index, split the demand between the
    2888             :       // source vector and the inserted element.
    2889       23475 :       Known.Zero = Known.One = APInt::getAllOnesValue(BitWidth);
    2890       15650 :       unsigned EltIdx = CEltNo->getZExtValue();
    2891             : 
    2892             :       // If we demand the inserted element then add its common known bits.
    2893        7825 :       if (DemandedElts[EltIdx]) {
    2894        6526 :         computeKnownBits(InVal, Known2, Depth + 1);
    2895       13052 :         Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
    2896       13052 :         Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
    2897             :       }
    2898             : 
    2899             :       // If we demand the source vector then add its common known bits, ensuring
    2900             :       // that we don't demand the inserted element.
    2901       23475 :       APInt VectorElts = DemandedElts & ~(APInt::getOneBitSet(NumElts, EltIdx));
    2902        7825 :       if (!!VectorElts) {
    2903        5030 :         computeKnownBits(InVec, Known2, VectorElts, Depth + 1);
    2904             :         Known.One &= Known2.One;
    2905             :         Known.Zero &= Known2.Zero;
    2906             :       }
    2907             :     } else {
    2908             :       // Unknown element index, so ignore DemandedElts and demand them all.
    2909           6 :       computeKnownBits(InVec, Known, Depth + 1);
    2910           6 :       computeKnownBits(InVal, Known2, Depth + 1);
    2911          12 :       Known.One &= Known2.One.zextOrTrunc(Known.One.getBitWidth());
    2912          12 :       Known.Zero &= Known2.Zero.zextOrTrunc(Known.Zero.getBitWidth());
    2913             :     }
    2914             :     break;
    2915             :   }
    2916         133 :   case ISD::BITREVERSE: {
    2917         266 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2918         266 :     Known.Zero = Known2.Zero.reverseBits();
    2919         266 :     Known.One = Known2.One.reverseBits();
    2920         133 :     break;
    2921             :   }
    2922        2589 :   case ISD::BSWAP: {
    2923        5178 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2924        5178 :     Known.Zero = Known2.Zero.byteSwap();
    2925        5178 :     Known.One = Known2.One.byteSwap();
    2926        2589 :     break;
    2927             :   }
    2928        2721 :   case ISD::ABS: {
    2929        5442 :     computeKnownBits(Op.getOperand(0), Known2, DemandedElts, Depth + 1);
    2930             : 
    2931             :     // If the source's MSB is zero then we know the rest of the bits already.
    2932        2721 :     if (Known2.isNonNegative()) {
    2933           0 :       Known.Zero = Known2.Zero;
    2934           0 :       Known.One = Known2.One;
    2935           0 :       break;
    2936             :     }
    2937             : 
    2938             :     // We only know that the absolute values's MSB will be zero iff there is
    2939             :     // a set bit that isn't the sign bit (otherwise it could be INT_MIN).
    2940        2721 :     Known2.One.clearSignBit();
    2941        2721 :     if (Known2.One.getBoolValue()) {
    2942           2 :       Known.Zero = APInt::getSignMask(BitWidth);
    2943           2 :       break;
    2944             :     }
    2945             :     break;
    2946             :   }
    2947        3290 :   case ISD::UMIN: {
    2948        6580 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    2949        6580 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth + 1);
    2950             : 
    2951             :     // UMIN - we know that the result will have the maximum of the
    2952             :     // known zero leading bits of the inputs.
    2953        3290 :     unsigned LeadZero = Known.countMinLeadingZeros();
    2954        6580 :     LeadZero = std::max(LeadZero, Known2.countMinLeadingZeros());
    2955             : 
    2956             :     Known.Zero &= Known2.Zero;
    2957        3290 :     Known.One &= Known2.One;
    2958             :     Known.Zero.setHighBits(LeadZero);
    2959             :     break;
    2960             :   }
    2961        4258 :   case ISD::UMAX: {
    2962        8516 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts,
    2963             :                      Depth + 1);
    2964        8516 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth + 1);
    2965             : 
    2966             :     // UMAX - we know that the result will have the maximum of the
    2967             :     // known one leading bits of the inputs.
    2968        4258 :     unsigned LeadOne = Known.countMinLeadingOnes();
    2969        8516 :     LeadOne = std::max(LeadOne, Known2.countMinLeadingOnes());
    2970             : 
    2971        4258 :     Known.Zero &= Known2.Zero;
    2972             :     Known.One &= Known2.One;
    2973             :     Known.One.setHighBits(LeadOne);
    2974             :     break;
    2975             :   }
    2976       17436 :   case ISD::SMIN:
    2977             :   case ISD::SMAX: {
    2978             :     // If we have a clamp pattern, we know that the number of sign bits will be
    2979             :     // the minimum of the clamp min/max range.
    2980             :     bool IsMax = (Opcode == ISD::SMAX);
    2981             :     ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
    2982       17436 :     if ((CstLow = isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)))
    2983        5334 :       if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
    2984         926 :         CstHigh = isConstOrDemandedConstSplat(Op.getOperand(0).getOperand(1),
    2985             :                                               DemandedElts);
    2986       17436 :     if (CstLow && CstHigh) {
    2987         918 :       if (!IsMax)
    2988             :         std::swap(CstLow, CstHigh);
    2989             : 
    2990         918 :       const APInt &ValueLow = CstLow->getAPIntValue();
    2991         918 :       const APInt &ValueHigh = CstHigh->getAPIntValue();
    2992         918 :       if (ValueLow.sle(ValueHigh)) {
    2993         917 :         unsigned LowSignBits = ValueLow.getNumSignBits();
    2994         917 :         unsigned HighSignBits = ValueHigh.getNumSignBits();
    2995         917 :         unsigned MinSignBits = std::min(LowSignBits, HighSignBits);
    2996        2083 :         if (ValueLow.isNegative() && ValueHigh.isNegative()) {
    2997           1 :           Known.One.setHighBits(MinSignBits);
    2998         669 :           break;
    2999             :         }
    3000        1584 :         if (ValueLow.isNonNegative() && ValueHigh.isNonNegative()) {
    3001         668 :           Known.Zero.setHighBits(MinSignBits);
    3002             :           break;
    3003             :         }
    3004             :       }
    3005             :     }
    3006             : 
    3007             :     // Fallback - just get the shared known bits of the operands.
    3008       33534 :     computeKnownBits(Op.getOperand(0), Known, DemandedElts, Depth + 1);
    3009       16767 :     if (Known.isUnknown()) break; // Early-out
    3010           0 :     computeKnownBits(Op.getOperand(1), Known2, DemandedElts, Depth + 1);
    3011           0 :     Known.Zero &= Known2.Zero;
    3012           0 :     Known.One &= Known2.One;
    3013             :     break;
    3014             :   }
    3015      943441 :   case ISD::FrameIndex:
    3016             :   case ISD::TargetFrameIndex:
    3017      943441 :     TLI->computeKnownBitsForFrameIndex(Op, Known, DemandedElts, *this, Depth);
    3018      943441 :     break;
    3019             : 
    3020     7534403 :   default:
    3021     7534403 :     if (Opcode < ISD::BUILTIN_OP_END)
    3022             :       break;
    3023             :     LLVM_FALLTHROUGH;
    3024             :   case ISD::INTRINSIC_WO_CHAIN:
    3025             :   case ISD::INTRINSIC_W_CHAIN:
    3026             :   case ISD::INTRINSIC_VOID:
    3027             :     // Allow the target to implement this method for its nodes.
    3028     3640653 :     TLI->computeKnownBitsForTargetNode(Op, Known, DemandedElts, *this, Depth);
    3029     3640653 :     break;
    3030             :   }
    3031             : 
    3032             :   assert(!Known.hasConflict() && "Bits known to be one AND zero?");
    3033             : }
    3034             : 
    3035       83166 : SelectionDAG::OverflowKind SelectionDAG::computeOverflowKind(SDValue N0,
    3036             :                                                              SDValue N1) const {
    3037             :   // X + 0 never overflow
    3038       83166 :   if (isNullConstant(N1))
    3039             :     return OFK_Never;
    3040             : 
    3041       83166 :   KnownBits N1Known;
    3042       83166 :   computeKnownBits(N1, N1Known);
    3043       83166 :   if (N1Known.Zero.getBoolValue()) {
    3044       78416 :     KnownBits N0Known;
    3045       78507 :     computeKnownBits(N0, N0Known);
    3046             : 
    3047             :     bool overflow;
    3048      471042 :     (void)(~N0Known.Zero).uadd_ov(~N1Known.Zero, overflow);
    3049       78507 :     if (!overflow)
    3050          91 :       return OFK_Never;
    3051             :   }
    3052             : 
    3053             :   // mulhi + 1 never overflow
    3054      249447 :   if (N0.getOpcode() == ISD::UMUL_LOHI && N0.getResNo() == 1 &&
    3055      498450 :       (~N1Known.Zero & 0x01) == ~N1Known.Zero)
    3056             :     return OFK_Never;
    3057             : 
    3058      165706 :   if (N1.getOpcode() == ISD::UMUL_LOHI && N1.getResNo() == 1) {
    3059         232 :     KnownBits N0Known;
    3060         232 :     computeKnownBits(N0, N0Known);
    3061             : 
    3062        1160 :     if ((~N0Known.Zero & 0x01) == ~N0Known.Zero)
    3063           0 :       return OFK_Never;
    3064             :   }
    3065             : 
    3066             :   return OFK_Sometime;
    3067             : }
    3068             : 
    3069       38288 : bool SelectionDAG::isKnownToBeAPowerOfTwo(SDValue Val) const {
    3070       76576 :   EVT OpVT = Val.getValueType();
    3071             :   unsigned BitWidth = OpVT.getScalarSizeInBits();
    3072             : 
    3073             :   // Is the constant a known power of 2?
    3074             :   if (ConstantSDNode *Const = dyn_cast<ConstantSDNode>(Val))
    3075      104061 :     return Const->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
    3076             : 
    3077             :   // A left-shift of a constant one will have exactly one bit set because
    3078             :   // shifting the bit off the end is undefined.
    3079        3601 :   if (Val.getOpcode() == ISD::SHL) {
    3080          51 :     auto *C = isConstOrConstSplat(Val.getOperand(0));
    3081          99 :     if (C && C->getAPIntValue() == 1)
    3082             :       return true;
    3083             :   }
    3084             : 
    3085             :   // Similarly, a logical right-shift of a constant sign-bit will have exactly
    3086             :   // one bit set.
    3087        3556 :   if (Val.getOpcode() == ISD::SRL) {
    3088          25 :     auto *C = isConstOrConstSplat(Val.getOperand(0));
    3089          30 :     if (C && C->getAPIntValue().isSignMask())
    3090             :       return true;
    3091             :   }
    3092             : 
    3093             :   // Are all operands of a build vector constant powers of two?
    3094        3551 :   if (Val.getOpcode() == ISD::BUILD_VECTOR)
    3095       12640 :     if (llvm::all_of(Val->ops(), [BitWidth](SDValue E) {
    3096             :           if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(E))
    3097       16005 :             return C->getAPIntValue().zextOrTrunc(BitWidth).isPowerOf2();
    3098             :           return false;
    3099             :         }))
    3100             :       return true;
    3101             : 
    3102             :   // More could be done here, though the above checks are enough
    3103             :   // to handle some common cases.
    3104             : 
    3105             :   // Fall back to computeKnownBits to catch other known cases.
    3106        3203 :   KnownBits Known;
    3107        3203 :   computeKnownBits(Val, Known);
    3108        3336 :   return (Known.countMaxPopulation() == 1) && (Known.countMinPopulation() == 1);
    3109             : }
    3110             : 
    3111      321922 : unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const {
    3112      643844 :   EVT VT = Op.getValueType();
    3113             :   APInt DemandedElts = VT.isVector()
    3114             :                            ? APInt::getAllOnesValue(VT.getVectorNumElements())
    3115      321922 :                            : APInt(1, 1);
    3116      643844 :   return ComputeNumSignBits(Op, DemandedElts, Depth);
    3117             : }
    3118             : 
    3119      390957 : unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, const APInt &DemandedElts,
    3120             :                                           unsigned Depth) const {
    3121      781914 :   EVT VT = Op.getValueType();
    3122             :   assert((VT.isInteger() || VT.isFloatingPoint()) && "Invalid VT!");
    3123      390957 :   unsigned VTBits = VT.getScalarSizeInBits();
    3124      390957 :   unsigned NumElts = DemandedElts.getBitWidth();
    3125             :   unsigned Tmp, Tmp2;
    3126      390957 :   unsigned FirstAnswer = 1;
    3127             : 
    3128             :   if (auto *C = dyn_cast<ConstantSDNode>(Op)) {
    3129       22011 :     const APInt &Val = C->getAPIntValue();
    3130       22011 :     return Val.getNumSignBits();
    3131             :   }
    3132             : 
    3133      368946 :   if (Depth == 6)
    3134             :     return 1;  // Limit search depth.
    3135             : 
    3136      368690 :   if (!DemandedElts)
    3137             :     return 1;  // No demanded elts, better to assume we don't know anything.
    3138             : 
    3139             :   unsigned Opcode = Op.getOpcode();
    3140      368690 :   switch (Opcode) {
    3141      281383 :   default: break;
    3142        3933 :   case ISD::AssertSext:
    3143        3933 :     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
    3144       91240 :     return VTBits-Tmp+1;
    3145        4820 :   case ISD::AssertZext:
    3146        4820 :     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
    3147        4820 :     return VTBits-Tmp;
    3148             : 
    3149        3409 :   case ISD::BUILD_VECTOR:
    3150        3409 :     Tmp = VTBits;
    3151       25515 :     for (unsigned i = 0, e = Op.getNumOperands(); (i < e) && (Tmp > 1); ++i) {
    3152       11053 :       if (!DemandedElts[i])
    3153        3700 :         continue;
    3154             : 
    3155       14706 :       SDValue SrcOp = Op.getOperand(i);
    3156       14706 :       Tmp2 = ComputeNumSignBits(Op.getOperand(i), Depth + 1);
    3157             : 
    3158             :       // BUILD_VECTOR can implicitly truncate sources, we must handle this.
    3159        7353 :       if (SrcOp.getValueSizeInBits() != VTBits) {
    3160             :         assert(SrcOp.getValueSizeInBits() > VTBits &&
    3161             :                "Expected BUILD_VECTOR implicit truncation");
    3162          17 :         unsigned ExtraBits = SrcOp.getValueSizeInBits() - VTBits;
    3163          17 :         Tmp2 = (Tmp2 > ExtraBits ? Tmp2 - ExtraBits : 1);
    3164             :       }
    3165        7353 :       Tmp = std::min(Tmp, Tmp2);
    3166        3409 :     }
    3167        3409 :     return Tmp;
    3168             : 
    3169             :   case ISD::VECTOR_SHUFFLE: {
    3170             :     // Collect the minimum number of sign bits that are shared by every vector
    3171             :     // element referenced by the shuffle.
    3172             :     APInt DemandedLHS(NumElts, 0), DemandedRHS(NumElts, 0);
    3173             :     const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(Op);
    3174             :     assert(NumElts == SVN->getMask().size() && "Unexpected vector size");
    3175       12308 :     for (unsigned i = 0; i != NumElts; ++i) {
    3176        5836 :       int M = SVN->getMaskElt(i);
    3177        5836 :       if (!DemandedElts[i])
    3178        1254 :         continue;
    3179             :       // For UNDEF elements, we don't know anything about the common state of
    3180             :       // the shuffle result.
    3181        4582 :       if (M < 0)
    3182             :         return 1;
    3183        4501 :       if ((unsigned)M < NumElts)
    3184        3866 :         DemandedLHS.setBit((unsigned)M % NumElts);
    3185             :       else
    3186         635 :         DemandedRHS.setBit((unsigned)M % NumElts);
    3187             :     }
    3188         717 :     Tmp = std::numeric_limits<unsigned>::max();
    3189         717 :     if (!!DemandedLHS)
    3190        1428 :       Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedLHS, Depth + 1);
    3191         717 :     if (!!DemandedRHS) {
    3192         394 :       Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedRHS, Depth + 1);
    3193         197 :       Tmp = std::min(Tmp, Tmp2);
    3194             :     }
    3195             :     // If we don't know anything, early out and try computeKnownBits fall-back.
    3196         717 :     if (Tmp == 1)
    3197             :       break;
    3198             :     assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
    3199             :     return Tmp;
    3200             :   }
    3201             : 
    3202       24302 :   case ISD::BITCAST: {
    3203       24302 :     SDValue N0 = Op.getOperand(0);
    3204       24302 :     EVT SrcVT = N0.getValueType();
    3205             :     unsigned SrcBits = SrcVT.getScalarSizeInBits();
    3206             : 
    3207             :     // Ignore bitcasts from unsupported types..
    3208       24302 :     if (!(SrcVT.isInteger() || SrcVT.isFloatingPoint()))
    3209             :       break;
    3210             : 
    3211             :     // Fast handling of 'identity' bitcasts.
    3212       24293 :     if (VTBits == SrcBits)
    3213        5861 :       return ComputeNumSignBits(N0, DemandedElts, Depth + 1);
    3214             : 
    3215             :     // Bitcast 'large element' scalar/vector to 'small element' vector.
    3216             :     // TODO: Handle cases other than 'sign splat' when we have a use case.
    3217             :     // Requires handling of DemandedElts and Endianness.
    3218       22570 :     if ((SrcBits % VTBits) == 0) {
    3219             :       assert(Op.getValueType().isVector() && "Expected bitcast to vector");
    3220        8900 :       Tmp = ComputeNumSignBits(N0, Depth + 1);
    3221        8900 :       if (Tmp == SrcBits)
    3222             :         return VTBits;
    3223             :     }
    3224             :     break;
    3225             :   }
    3226             : 
    3227        1847 :   case ISD::SIGN_EXTEND:
    3228        1847 :     Tmp = VTBits - Op.getOperand(0).getScalarValueSizeInBits();
    3229        3694 :     return ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1) + Tmp;
    3230        3099 :   case ISD::SIGN_EXTEND_INREG:
    3231             :     // Max of the input and what this extends.
    3232        6198 :     Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarSizeInBits();
    3233        3099 :     Tmp = VTBits-Tmp+1;
    3234        6198 :     Tmp2 = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3235        3099 :     return std::max(Tmp, Tmp2);
    3236          79 :   case ISD::SIGN_EXTEND_VECTOR_INREG: {
    3237          79 :     SDValue Src = Op.getOperand(0);
    3238          79 :     EVT SrcVT = Src.getValueType();
    3239          79 :     APInt DemandedSrcElts = DemandedElts.zext(SrcVT.getVectorNumElements());
    3240          79 :     Tmp = VTBits - SrcVT.getScalarSizeInBits();
    3241          79 :     return ComputeNumSignBits(Src, DemandedSrcElts, Depth+1) + Tmp;
    3242             :   }
    3243             : 
    3244        2326 :   case ISD::SRA:
    3245        4652 :     Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3246             :     // SRA X, C   -> adds C sign bits.
    3247        2326 :     if (ConstantSDNode *C =
    3248        4652 :             isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)) {
    3249        2171 :       APInt ShiftVal = C->getAPIntValue();
    3250        2171 :       ShiftVal += Tmp;
    3251        6345 :       Tmp = ShiftVal.uge(VTBits) ? VTBits : ShiftVal.getZExtValue();
    3252             :     }
    3253        2326 :     return Tmp;
    3254        6452 :   case ISD::SHL:
    3255        6452 :     if (ConstantSDNode *C =
    3256        6452 :             isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)) {
    3257             :       // shl destroys sign bits.
    3258       12058 :       Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3259       24116 :       if (C->getAPIntValue().uge(VTBits) ||      // Bad shift.
    3260        6029 :           C->getAPIntValue().uge(Tmp)) break;    // Shifted all sign bits out.
    3261         318 :       return Tmp - C->getZExtValue();
    3262         423 :     }
    3263             :     break;
    3264       17242 :   case ISD::AND:
    3265             :   case ISD::OR:
    3266             :   case ISD::XOR:    // NOT is handled here.
    3267             :     // Logical binary ops preserve the number of sign bits at the worst.
    3268       34484 :     Tmp = ComputeNumSignBits(Op.getOperand(0), DemandedElts, Depth+1);
    3269       17242 :     if (Tmp != 1) {
    3270       11736 :       Tmp2 = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
    3271        5868 :       FirstAnswer = std::min(Tmp, Tmp2);
    3272             :       // We computed what we know about the sign bits as our first
    3273             :       // answer. Now proceed to the generic code that uses
    3274             :       // computeKnownBits, and pick whichever answer is better.
    3275             :     }
    3276             :     break;
    3277             : 
    3278         475 :   case ISD::SELECT:
    3279             :   case ISD::VSELECT:
    3280         950 :     Tmp = ComputeNumSignBits(Op.getOperand(1), DemandedElts, Depth+1);
    3281         475 :     if (Tmp == 1) return 1;  // Early out.
    3282         352 :     Tmp2 = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
    3283         176 :     return std::min(Tmp, Tmp2);
    3284         160 :   case ISD::SELECT_CC:
    3285         320 :     Tmp = ComputeNumSignBits(Op.getOperand(2), DemandedElts, Depth+1);
    3286         160 :     if (Tmp == 1) return 1;  // Early out.
    3287         218 :     Tmp2 = ComputeNumSignBits(Op.getOperand(3), DemandedElts, Depth+1);
    3288         109 :     return std::min(Tmp, Tmp2);
    3289             : 
    3290         343 :   case ISD::SMIN:
    3291             :   case ISD::SMAX: {
    3292             :     // If we have a clamp pattern, we know that the number of sign bits will be
    3293             :     // the minimum of the clamp min/max range.
    3294             :     bool IsMax = (Opcode == ISD::SMAX);
    3295             :     ConstantSDNode *CstLow = nullptr, *CstHigh = nullptr;
    3296         343 :     if ((CstLow = isConstOrDemandedConstSplat(Op.getOperand(1), DemandedElts)))
    3297         822 :       if (Op.getOperand(0).getOpcode() == (IsMax ? ISD::SMIN : ISD::SMAX))
    3298         269 :         CstHigh = isConstOrDemandedConstSplat(Op.getOperand(0).getOperand(1),
    3299             :                                               DemandedElts);
    3300         343 :     if (CstLow && CstHigh) {
    3301         269 :       if (!IsMax)
    3302             :         std::swap(CstLow, CstHigh);
    3303         807 :       if (CstLow->getAPIntValue().sle(CstHigh->getAPIntValue())) {
    3304         269 :         Tmp = CstLow->getAPIntValue().getNumSignBits();
    3305         269 :         Tmp2 = CstHigh->getAPIntValue().getNumSignBits();
    3306         269 :         return std::min(Tmp, Tmp2);
    3307             :       }
    3308             :     }
    3309             : 
    3310             :     // Fallback - just get the minimum number of sign bits of the operands.
    3311         148 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
    3312          74 :     if (Tmp == 1)
    3313             :       return 1;  // Early out.
    3314         104 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
    3315          52 :     return std::min(Tmp, Tmp2);
    3316             :   }
    3317         102 :   case ISD::UMIN:
    3318             :   case ISD::UMAX:
    3319         204 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
    3320         102 :     if (Tmp == 1)
    3321             :       return 1;  // Early out.
    3322          34 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
    3323          17 :     return std::min(Tmp, Tmp2);
    3324         138 :   case ISD::SADDO:
    3325             :   case ISD::UADDO:
    3326             :   case ISD::SSUBO:
    3327             :   case ISD::USUBO:
    3328             :   case ISD::SMULO:
    3329             :   case ISD::UMULO:
    3330         138 :     if (Op.getResNo() != 1)
    3331             :       break;
    3332             :     // The boolean result conforms to getBooleanContents.  Fall through.
    3333             :     // If setcc returns 0/-1, all bits are sign bits.
    3334             :     // We know that we have an integer-based boolean since these operations
    3335             :     // are only available for integer.
    3336         300 :     if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
    3337             :         TargetLowering::ZeroOrNegativeOneBooleanContent)
    3338             :       return VTBits;
    3339             :     break;
    3340        5314 :   case ISD::SETCC:
    3341             :     // If setcc returns 0/-1, all bits are sign bits.
    3342       15942 :     if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
    3343             :         TargetLowering::ZeroOrNegativeOneBooleanContent)
    3344             :       return VTBits;
    3345             :     break;
    3346          56 :   case ISD::ROTL:
    3347             :   case ISD::ROTR:
    3348             :     if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
    3349         112 :       unsigned RotAmt = C->getAPIntValue().urem(VTBits);
    3350             : 
    3351             :       // Handle rotate right by N like a rotate left by 32-N.
    3352          56 :       if (Opcode == ISD::ROTR)
    3353          28 :         RotAmt = (VTBits - RotAmt) % VTBits;
    3354             : 
    3355             :       // If we aren't rotating out all of the known-in sign bits, return the
    3356             :       // number that are left.  This handles rotl(sext(x), 1) for example.
    3357         112 :       Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3358          56 :       if (Tmp > (RotAmt + 1)) return (Tmp - RotAmt);
    3359             :     }
    3360             :     break;
    3361       20135 :   case ISD::ADD:
    3362             :   case ISD::ADDC:
    3363             :     // Add can have at most one carry bit.  Thus we know that the output
    3364             :     // is, at worst, one more bit than the inputs.
    3365       40270 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3366       20135 :     if (Tmp == 1) return 1;  // Early out.
    3367             : 
    3368             :     // Special case decrementing a value (ADD X, -1):
    3369        1153 :     if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
    3370        1148 :       if (CRHS->isAllOnesValue()) {
    3371          12 :         KnownBits Known;
    3372          73 :         computeKnownBits(Op.getOperand(0), Known, Depth+1);
    3373             : 
    3374             :         // If the input is known to be 0 or 1, the output is 0/-1, which is all
    3375             :         // sign bits set.
    3376         219 :         if ((Known.Zero | 1).isAllOnesValue())
    3377          61 :           return VTBits;
    3378             : 
    3379             :         // If we are subtracting one from a positive number, there is no carry
    3380             :         // out of the result.
    3381          65 :         if (Known.isNonNegative())
    3382             :           return Tmp;
    3383             :       }
    3384             : 
    3385        2184 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
    3386        1092 :     if (Tmp2 == 1) return 1;
    3387        1013 :     return std::min(Tmp, Tmp2)-1;
    3388             : 
    3389        5762 :   case ISD::SUB:
    3390       11524 :     Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
    3391        5762 :     if (Tmp2 == 1) return 1;
    3392             : 
    3393             :     // Handle NEG.
    3394        1432 :     if (ConstantSDNode *CLHS = isConstOrConstSplat(Op.getOperand(0)))
    3395         320 :       if (CLHS->isNullValue()) {
    3396          47 :         KnownBits Known;
    3397         192 :         computeKnownBits(Op.getOperand(1), Known, Depth+1);
    3398             :         // If the input is known to be 0 or 1, the output is 0/-1, which is all
    3399             :         // sign bits set.
    3400         288 :         if ((Known.Zero | 1).isAllOnesValue())
    3401          49 :           return VTBits;
    3402             : 
    3403             :         // If the input is known to be positive (the sign bit is known clear),
    3404             :         // the output of the NEG has the same number of sign bits as the input.
    3405          91 :         if (Known.isNonNegative())
    3406             :           return Tmp2;
    3407             : 
    3408             :         // Otherwise, we treat this like a SUB.
    3409             :       }
    3410             : 
    3411             :     // Sub can have at most one carry bit.  Thus we know that the output
    3412             :     // is, at worst, one more bit than the inputs.
    3413        1334 :     Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3414         667 :     if (Tmp == 1) return 1;  // Early out.
    3415         463 :     return std::min(Tmp, Tmp2)-1;
    3416       32216 :   case ISD::TRUNCATE: {
    3417             :     // Check if the sign bits of source go down as far as the truncated value.
    3418       32216 :     unsigned NumSrcBits = Op.getOperand(0).getScalarValueSizeInBits();
    3419       64432 :     unsigned NumSrcSignBits = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
    3420       32216 :     if (NumSrcSignBits > (NumSrcBits - VTBits))
    3421        4171 :       return NumSrcSignBits - (NumSrcBits - VTBits);
    3422             :     break;
    3423             :   }
    3424          30 :   case ISD::EXTRACT_ELEMENT: {
    3425          60 :     const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
    3426          30 :     const int BitWidth = Op.getValueSizeInBits();
    3427          60 :     const int Items = Op.getOperand(0).getValueSizeInBits() / BitWidth;
    3428             : 
    3429             :     // Get reverse index (starting from 1), Op1 value indexes elements from
    3430             :     // little end. Sign starts at big end.
    3431          60 :     const int rIndex = Items - 1 - Op.getConstantOperandVal(1);
    3432             : 
    3433             :     // If the sign portion ends in our element the subtraction gives correct
    3434             :     // result. Otherwise it gives either negative or > bitwidth result
    3435          60 :     return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
    3436             :   }
    3437         162 :   case ISD::INSERT_VECTOR_ELT: {
    3438         162 :     SDValue InVec = Op.getOperand(0);
    3439         162 :     SDValue InVal = Op.getOperand(1);
    3440         162 :     SDValue EltNo = Op.getOperand(2);
    3441         162 :     unsigned NumElts = InVec.getValueType().getVectorNumElements();
    3442             : 
    3443             :     ConstantSDNode *CEltNo = dyn_cast<ConstantSDNode>(EltNo);
    3444         308 :     if (CEltNo && CEltNo->getAPIntValue().ult(NumElts)) {
    3445             :       // If we know the element index, split the demand between the
    3446             :       // source vector and the inserted element.
    3447         154 :       unsigned EltIdx = CEltNo->getZExtValue();
    3448             : 
    3449             :       // If we demand the inserted element then get its sign bits.
    3450         154 :       Tmp = std::numeric_limits<unsigned>::max();
    3451         154 :       if (DemandedElts[EltIdx]) {
    3452             :         // TODO - handle implicit truncation of inserted elements.
    3453         152 :         if (InVal.getScalarValueSizeInBits() != VTBits)
    3454             :           break;
    3455         152 :         Tmp = ComputeNumSignBits(InVal, Depth + 1);
    3456             :       }
    3457             : 
    3458             :       // If we demand the source vector then get its sign bits, and determine
    3459             :       // the minimum.
    3460             :       APInt VectorElts = DemandedElts;
    3461             :       VectorElts.clearBit(EltIdx);
    3462         154 :       if (!!VectorElts) {
    3463          87 :         Tmp2 = ComputeNumSignBits(InVec, VectorElts, Depth + 1);
    3464          87 :         Tmp = std::min(Tmp, Tmp2);
    3465             :       }
    3466             :     } else {
    3467             :       // Unknown element index, so ignore DemandedElts and demand them all.
    3468           8 :       Tmp = ComputeNumSignBits(InVec, Depth + 1);
    3469           8 :       Tmp2 = ComputeNumSignBits(InVal, Depth + 1);
    3470           8 :       Tmp = std::min(Tmp, Tmp2);
    3471             :     }
    3472             :     assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
    3473         162 :     return Tmp;
    3474             :   }
    3475       16877 :   case ISD::EXTRACT_VECTOR_ELT: {
    3476       16877 :     SDValue InVec = Op.getOperand(0);
    3477       16877 :     SDValue EltNo = Op.getOperand(1);
    3478       16877 :     EVT VecVT = InVec.getValueType();
    3479       16877 :     const unsigned BitWidth = Op.getValueSizeInBits();
    3480       33754 :     const unsigned EltBitWidth = Op.getOperand(0).getScalarValueSizeInBits();
    3481       16877 :     const unsigned NumSrcElts = VecVT.getVectorNumElements();
    3482             : 
    3483             :     // If BitWidth > EltBitWidth the value is anyext:ed, and we do not know
    3484             :     // anything about sign bits. But if the sizes match we can derive knowledge
    3485             :     // about sign bits from the vector operand.
    3486       16877 :     if (BitWidth != EltBitWidth)
    3487             :       break;
    3488             : 
    3489             :     // If we know the element index, just demand that vector element, else for
    3490             :     // an unknown element index, ignore DemandedElts and demand them all.
    3491       15795 :     APInt DemandedSrcElts = APInt::getAllOnesValue(NumSrcElts);
    3492             :     ConstantSDNode *ConstEltNo = dyn_cast<ConstantSDNode>(EltNo);
    3493       31590 :     if (ConstEltNo && ConstEltNo->getAPIntValue().ult(NumSrcElts))
    3494             :       DemandedSrcElts =
    3495       31590 :           APInt::getOneBitSet(NumSrcElts, ConstEltNo->getZExtValue());
    3496             : 
    3497       15795 :     return ComputeNumSignBits(InVec, DemandedSrcElts, Depth + 1);
    3498             :   }
    3499        8528 :   case ISD::EXTRACT_SUBVECTOR: {
    3500             :     // If we know the element index, just demand that subvector elements,
    3501             :     // otherwise demand them all.
    3502        8528 :     SDValue Src = Op.getOperand(0);
    3503             :     ConstantSDNode *SubIdx = dyn_cast<ConstantSDNode>(Op.getOperand(1));
    3504        8528 :     unsigned NumSrcElts = Src.getValueType().getVectorNumElements();
    3505       25584 :     if (SubIdx && SubIdx->getAPIntValue().ule(NumSrcElts - NumElts)) {
    3506             :       // Offset the demanded elts by the subvector index.
    3507             :       uint64_t Idx = SubIdx->getZExtValue();
    3508       17056 :       APInt DemandedSrc = DemandedElts.zext(NumSrcElts).shl(Idx);
    3509        8528 :       return ComputeNumSignBits(Src, DemandedSrc, Depth + 1);
    3510             :     }
    3511           0 :     return ComputeNumSignBits(Src, Depth + 1);
    3512             :   }
    3513        2239 :   case ISD::CONCAT_VECTORS:
    3514             :     // Determine the minimum number of sign bits across all demanded
    3515             :     // elts of the input vectors. Early out if the result is already 1.
    3516        2239 :     Tmp = std::numeric_limits<unsigned>::max();
    3517        4478 :     EVT SubVectorVT = Op.getOperand(0).getValueType();
    3518        2239 :     unsigned NumSubVectorElts = SubVectorVT.getVectorNumElements();
    3519             :     unsigned NumSubVectors = Op.getNumOperands();
    3520        9171 :     for (unsigned i = 0; (i < NumSubVectors) && (Tmp > 1); ++i) {
    3521        3466 :       APInt DemandedSub = DemandedElts.lshr(i * NumSubVectorElts);
    3522        6932 :       DemandedSub = DemandedSub.trunc(NumSubVectorElts);
    3523        3466 :       if (!DemandedSub)
    3524             :         continue;
    3525        5082 :       Tmp2 = ComputeNumSignBits(Op.getOperand(i), DemandedSub, Depth + 1);
    3526        2541 :       Tmp = std::min(Tmp, Tmp2);
    3527        2239 :     }
    3528             :     assert(Tmp <= VTBits && "Failed to determine minimum sign bits");
    3529        2239 :     return Tmp;
    3530             :   }
    3531             : 
    3532             :   // If we are looking at the loaded value of the SDNode.
    3533      281383 :   if (Op.getResNo() == 0) {
    3534             :     // Handle LOADX separately here. EXTLOAD case will fallthrough.
    3535             :     if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
    3536             :       unsigned ExtType = LD->getExtensionType();
    3537       50109 :       switch (ExtType) {
    3538             :         default: break;
    3539        1356 :         case ISD::SEXTLOAD:    // '17' bits known
    3540        2712 :           Tmp = LD->getMemoryVT().getScalarSizeInBits();
    3541        1356 :           return VTBits-Tmp+1;
    3542        1544 :         case ISD::ZEXTLOAD:    // '16' bits known
    3543        3088 :           Tmp = LD->getMemoryVT().getScalarSizeInBits();
    3544        1544 :           return VTBits-Tmp;
    3545             :       }
    3546             :     }
    3547             :   }
    3548             : 
    3549             :   // Allow the target to implement this method for its nodes.
    3550      556966 :   if (Opcode >= ISD::BUILTIN_OP_END ||
    3551      278483 :       Opcode == ISD::INTRINSIC_WO_CHAIN ||
    3552      258292 :       Opcode == ISD::INTRINSIC_W_CHAIN ||
    3553             :       Opcode == ISD::INTRINSIC_VOID) {
    3554             :     unsigned NumBits =
    3555       20938 :         TLI->ComputeNumSignBitsForTargetNode(Op, DemandedElts, *this, Depth);
    3556       20938 :     if (NumBits > 1)
    3557       10704 :       FirstAnswer = std::max(FirstAnswer, NumBits);
    3558             :   }
    3559             : 
    3560             :   // Finally, if we can prove that the top bits of the result are 0's or 1's,
    3561             :   // use this information.
    3562      278483 :   KnownBits Known;
    3563      278483 :   computeKnownBits(Op, Known, DemandedElts, Depth);
    3564             : 
    3565             :   APInt Mask;
    3566      278483 :   if (Known.isNonNegative()) {        // sign bit is 0
    3567       45024 :     Mask = Known.Zero;
    3568      233459 :   } else if (Known.isNegative()) {  // sign bit is 1;
    3569          65 :     Mask = Known.One;
    3570             :   } else {
    3571             :     // Nothing known.
    3572      233394 :     return FirstAnswer;
    3573             :   }
    3574             : 
    3575             :   // Okay, we know that the sign bit in Mask is set.  Use CLZ to determine
    3576             :   // the number of identical bits in the top of the input value.
    3577       45089 :   Mask = ~Mask;
    3578       45089 :   Mask <<= Mask.getBitWidth()-VTBits;
    3579             :   // Return # leading zeros.  We use 'min' here in case Val was zero before
    3580             :   // shifting.  We don't want to return '64' as for an i32 "0".
    3581       90178 :   return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
    3582             : }
    3583             : 
    3584     2900970 : bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
    3585     2900970 :   if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
    3586             :       !isa<ConstantSDNode>(Op.getOperand(1)))
    3587             :     return false;
    3588             : 
    3589     2005189 :   if (Op.getOpcode() == ISD::OR &&
    3590      402146 :       !MaskedValueIsZero(Op.getOperand(0),
    3591             :                      cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
    3592             :     return false;
    3593             : 
    3594             :   return true;
    3595             : }
    3596             : 
    3597         610 : bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
    3598             :   // If we're told that NaNs won't happen, assume they won't.
    3599         610 :   if (getTarget().Options.NoNaNsFPMath)
    3600             :     return true;
    3601             : 
    3602         418 :   if (Op->getFlags().hasNoNaNs())
    3603             :     return true;
    3604             : 
    3605             :   // If the value is a constant, we can obviously see if it is a NaN or not.
    3606             :   if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
    3607          94 :     return !C->getValueAPF().isNaN();
    3608             : 
    3609             :   // TODO: Recognize more cases here.
    3610             : 
    3611             :   return false;
    3612             : }
    3613             : 
    3614         885 : bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
    3615             :   // If the value is a constant, we can obviously see if it is a zero or not.
    3616             :   if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
    3617          52 :     return !C->isZero();
    3618             : 
    3619             :   // TODO: Recognize more cases here.
    3620         859 :   switch (Op.getOpcode()) {
    3621             :   default: break;
    3622          38 :   case ISD::OR:
    3623             :     if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
    3624          42 :       return !C->isNullValue();
    3625             :     break;
    3626             :   }
    3627             : 
    3628             :   return false;
    3629             : }
    3630             : 
    3631       12733 : bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
    3632             :   // Check the obvious case.
    3633             :   if (A == B) return true;
    3634             : 
    3635             :   // For for negative and positive zero.
    3636             :   if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
    3637             :     if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
    3638          33 :       if (CA->isZero() && CB->isZero()) return true;
    3639             : 
    3640             :   // Otherwise they may not be equal.
    3641             :   return false;
    3642             : }
    3643             : 
    3644             : // FIXME: unify with llvm::haveNoCommonBitsSet.
    3645             : // FIXME: could also handle masked merge pattern (X & ~M) op (Y & M)
    3646     1741422 : bool SelectionDAG::haveNoCommonBitsSet(SDValue A, SDValue B) const {
    3647             :   assert(A.getValueType() == B.getValueType() &&
    3648             :          "Values must have the same type");
    3649     1741422 :   KnownBits AKnown, BKnown;
    3650     1741422 :   computeKnownBits(A, AKnown);
    3651     1741422 :   computeKnownBits(B, BKnown);
    3652     5224266 :   return (AKnown.Zero | BKnown.Zero).isAllOnesValue();
    3653             : }
    3654             : 
    3655       46785 : static SDValue FoldCONCAT_VECTORS(const SDLoc &DL, EVT VT,
    3656             :                                   ArrayRef<SDValue> Ops,
    3657             :                                   SelectionDAG &DAG) {
    3658             :   assert(!Ops.empty() && "Can't concatenate an empty list of vectors!");
    3659             :   assert(llvm::all_of(Ops,
    3660             :                       [Ops](SDValue Op) {
    3661             :                         return Ops[0].getValueType() == Op.getValueType();
    3662             :                       }) &&
    3663             :          "Concatenation of vectors with inconsistent value types!");
    3664             :   assert((Ops.size() * Ops[0].getValueType().getVectorNumElements()) ==
    3665             :              VT.getVectorNumElements() &&
    3666             :          "Incorrect element count in vector concatenation!");
    3667             : 
    3668       46785 :   if (Ops.size() == 1)
    3669           0 :     return Ops[0];
    3670             : 
    3671             :   // Concat of UNDEFs is UNDEF.
    3672       46785 :   if (llvm::all_of(Ops, [](SDValue Op) { return Op.isUndef(); }))
    3673         487 :     return DAG.getUNDEF(VT);
    3674             : 
    3675             :   // A CONCAT_VECTOR with all UNDEF/BUILD_VECTOR operands can be
    3676             :   // simplified to one big BUILD_VECTOR.
    3677             :   // FIXME: Add support for SCALAR_TO_VECTOR as well.
    3678       46298 :   EVT SVT = VT.getScalarType();
    3679             :   SmallVector<SDValue, 16> Elts;
    3680       53798 :   for (SDValue Op : Ops) {
    3681       49092 :     EVT OpVT = Op.getValueType();
    3682       49092 :     if (Op.isUndef())
    3683         510 :       Elts.append(OpVT.getVectorNumElements(), DAG.getUNDEF(SVT));
    3684       48582 :     else if (Op.getOpcode() == ISD::BUILD_VECTOR)
    3685        6480 :       Elts.append(Op->op_begin(), Op->op_end());
    3686             :     else
    3687       45342 :       return SDValue();
    3688             :   }
    3689             : 
    3690             :   // BUILD_VECTOR requires all inputs to be of the same type, find the
    3691             :   // maximum type and extend them all.
    3692       34448 :   for (SDValue Op : Elts)
    3693       16746 :     SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
    3694             : 
    3695         956 :   if (SVT.bitsGT(VT.getScalarType()))
    3696       26106 :     for (SDValue &Op : Elts)
    3697       38292 :       Op = DAG.getTargetLoweringInfo().isZExtFree(Op.getValueType(), SVT)
    3698       25528 :                ? DAG.getZExtOrTrunc(Op, DL, SVT)
    3699             :                : DAG.getSExtOrTrunc(Op, DL, SVT);
    3700             : 
    3701         956 :   SDValue V = DAG.getBuildVector(VT, DL, Elts);
    3702             :   NewSDValueDbgMsg(V, "New node fold concat vectors: ", &DAG);
    3703         956 :   return V;
    3704             : }
    3705             : 
    3706             : /// Gets or creates the specified node.
    3707     2624760 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT) {
    3708             :   FoldingSetNodeID ID;
    3709     2624760 :   AddNodeIDNode(ID, Opcode, getVTList(VT), None);
    3710     2624760 :   void *IP = nullptr;
    3711     2624760 :   if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    3712     2186860 :     return SDValue(E, 0);
    3713             : 
    3714      437900 :   auto *N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(),
    3715      875800 :                               getVTList(VT));
    3716      437900 :   CSEMap.InsertNode(N, IP);
    3717             : 
    3718      437900 :   InsertNode(N);
    3719             :   SDValue V = SDValue(N, 0);
    3720             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    3721      437900 :   return V;
    3722             : }
    3723             : 
    3724     4205358 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    3725             :                               SDValue Operand, const SDNodeFlags Flags) {
    3726             :   // Constant fold unary operations with an integer constant operand. Even
    3727             :   // opaque constant will be folded, because the folding of unary operations
    3728             :   // doesn't create new constants with different values. Nevertheless, the
    3729             :   // opaque flag is preserved during folding to prevent future folding with
    3730             :   // other constants.
    3731             :   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
    3732      281611 :     const APInt &Val = C->getAPIntValue();
    3733      281611 :     switch (Opcode) {
    3734             :     default: break;
    3735       41511 :     case ISD::SIGN_EXTEND:
    3736       83022 :       return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
    3737      124533 :                          C->isTargetOpcode(), C->isOpaque());
    3738      162655 :     case ISD::ANY_EXTEND:
    3739             :     case ISD::ZERO_EXTEND:
    3740             :     case ISD::TRUNCATE:
    3741      325310 :       return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
    3742      487965 :                          C->isTargetOpcode(), C->isOpaque());
    3743         373 :     case ISD::UINT_TO_FP:
    3744             :     case ISD::SINT_TO_FP: {
    3745             :       APFloat apf(EVTToAPFloatSemantics(VT),
    3746         746 :                   APInt::getNullValue(VT.getSizeInBits()));
    3747         373 :       (void)apf.convertFromAPInt(Val,
    3748             :                                  Opcode==ISD::SINT_TO_FP,
    3749             :                                  APFloat::rmNearestTiesToEven);
    3750         373 :       return getConstantFP(apf, DL, VT);
    3751             :     }
    3752             :     case ISD::BITCAST:
    3753           9 :       if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
    3754          27 :         return getConstantFP(APFloat(APFloat::IEEEhalf(), Val), DL, VT);
    3755         409 :       if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
    3756        1227 :         return getConstantFP(APFloat(APFloat::IEEEsingle(), Val), DL, VT);
    3757         114 :       if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
    3758         342 :         return getConstantFP(APFloat(APFloat::IEEEdouble(), Val), DL, VT);
    3759           0 :       if (VT == MVT::f128 && C->getValueType(0) == MVT::i128)
    3760           0 :         return getConstantFP(APFloat(APFloat::IEEEquad(), Val), DL, VT);
    3761             :       break;
    3762          14 :     case ISD::ABS:
    3763          28 :       return getConstant(Val.abs(), DL, VT, C->isTargetOpcode(),
    3764          42 :                          C->isOpaque());
    3765         452 :     case ISD::BITREVERSE:
    3766         904 :       return getConstant(Val.reverseBits(), DL, VT, C->isTargetOpcode(),
    3767        1356 :                          C->isOpaque());
    3768         170 :     case ISD::BSWAP:
    3769         340 :       return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
    3770         510 :                          C->isOpaque());
    3771         660 :     case ISD::CTPOP:
    3772             :       return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
    3773        1980 :                          C->isOpaque());
    3774       29562 :     case ISD::CTLZ:
    3775             :     case ISD::CTLZ_ZERO_UNDEF:
    3776       29562 :       return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
    3777       88686 :                          C->isOpaque());
    3778        2835 :     case ISD::CTTZ:
    3779             :     case ISD::CTTZ_ZERO_UNDEF:
    3780        2835 :       return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
    3781        8505 :                          C->isOpaque());
    3782         684 :     case ISD::FP16_TO_FP: {
    3783             :       bool Ignored;
    3784             :       APFloat FPV(APFloat::IEEEhalf(),
    3785        1368 :                   (Val.getBitWidth() == 16) ? Val : Val.trunc(16));
    3786             : 
    3787             :       // This can return overflow, underflow, or inexact; we don't care.
    3788             :       // FIXME need to be more flexible about rounding mode.
    3789         684 :       (void)FPV.convert(EVTToAPFloatSemantics(VT),
    3790             :                         APFloat::rmNearestTiesToEven, &Ignored);
    3791         684 :       return getConstantFP(FPV, DL, VT);
    3792             :     }
    3793             :     }
    3794             :   }
    3795             : 
    3796             :   // Constant fold unary operations with a floating point constant operand.
    3797             :   if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
    3798        4953 :     APFloat V = C->getValueAPF();    // make copy
    3799        4953 :     switch (Opcode) {
    3800         214 :     case ISD::FNEG:
    3801         214 :       V.changeSign();
    3802         214 :       return getConstantFP(V, DL, VT);
    3803          13 :     case ISD::FABS:
    3804          13 :       V.clearSign();
    3805          13 :       return getConstantFP(V, DL, VT);
    3806          22 :     case ISD::FCEIL: {
    3807          22 :       APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
    3808          22 :       if (fs == APFloat::opOK || fs == APFloat::opInexact)
    3809          22 :         return getConstantFP(V, DL, VT);
    3810             :       break;
    3811             :     }
    3812          19 :     case ISD::FTRUNC: {
    3813          19 :       APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
    3814          19 :       if (fs == APFloat::opOK || fs == APFloat::opInexact)
    3815          19 :         return getConstantFP(V, DL, VT);
    3816             :       break;
    3817             :     }
    3818          19 :     case ISD::FFLOOR: {
    3819          19 :       APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
    3820          19 :       if (fs == APFloat::opOK || fs == APFloat::opInexact)
    3821          19 :         return getConstantFP(V, DL, VT);
    3822             :       break;
    3823             :     }
    3824         104 :     case ISD::FP_EXTEND: {
    3825             :       bool ignored;
    3826             :       // This can return overflow, underflow, or inexact; we don't care.
    3827             :       // FIXME need to be more flexible about rounding mode.
    3828         104 :       (void)V.convert(EVTToAPFloatSemantics(VT),
    3829             :                       APFloat::rmNearestTiesToEven, &ignored);
    3830         104 :       return getConstantFP(V, DL, VT);
    3831             :     }
    3832         647 :     case ISD::FP_TO_SINT:
    3833             :     case ISD::FP_TO_UINT: {
    3834             :       bool ignored;
    3835         647 :       APSInt IntVal(VT.getSizeInBits(), Opcode == ISD::FP_TO_UINT);
    3836             :       // FIXME need to be more flexible about rounding mode.
    3837             :       APFloat::opStatus s =
    3838         647 :           V.convertToInteger(IntVal, APFloat::rmTowardZero, &ignored);
    3839         647 :       if (s == APFloat::opInvalidOp) // inexact is OK, in fact usual
    3840             :         break;
    3841         609 :       return getConstant(IntVal, DL, VT);
    3842             :     }
    3843             :     case ISD::BITCAST:
    3844         228 :       if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
    3845         684 :         return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
    3846        2515 :       else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
    3847        7545 :         return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
    3848         305 :       else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
    3849         915 :         return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
    3850             :       break;
    3851          48 :     case ISD::FP_TO_FP16: {
    3852             :       bool Ignored;
    3853             :       // This can return overflow, underflow, or inexact; we don't care.
    3854             :       // FIXME need to be more flexible about rounding mode.
    3855          48 :       (void)V.convert(APFloat::IEEEhalf(),
    3856             :                       APFloat::rmNearestTiesToEven, &Ignored);
    3857          96 :       return getConstant(V.bitcastToAPInt(), DL, VT);
    3858             :     }
    3859             :     }
    3860             :   }
    3861             : 
    3862             :   // Constant fold unary operations with a vector integer or float operand.
    3863             :   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
    3864      175620 :     if (BV->isConstant()) {
    3865             :       switch (Opcode) {
    3866             :       default:
    3867             :         // FIXME: Entirely reasonable to perform folding of other unary
    3868             :         // operations here as the need arises.
    3869             :         break;
    3870        1935 :       case ISD::FNEG:
    3871             :       case ISD::FABS:
    3872             :       case ISD::FCEIL:
    3873             :       case ISD::FTRUNC:
    3874             :       case ISD::FFLOOR:
    3875             :       case ISD::FP_EXTEND:
    3876             :       case ISD::FP_TO_SINT:
    3877             :       case ISD::FP_TO_UINT:
    3878             :       case ISD::TRUNCATE:
    3879             :       case ISD::ANY_EXTEND:
    3880             :       case ISD::ZERO_EXTEND:
    3881             :       case ISD::SIGN_EXTEND:
    3882             :       case ISD::UINT_TO_FP:
    3883             :       case ISD::SINT_TO_FP:
    3884             :       case ISD::ABS:
    3885             :       case ISD::BITREVERSE:
    3886             :       case ISD::BSWAP:
    3887             :       case ISD::CTLZ:
    3888             :       case ISD::CTLZ_ZERO_UNDEF:
    3889             :       case ISD::CTTZ:
    3890             :       case ISD::CTTZ_ZERO_UNDEF:
    3891             :       case ISD::CTPOP: {
    3892        1935 :         SDValue Ops = { Operand };
    3893        1935 :         if (SDValue Fold = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops))
    3894        1915 :           return Fold;
    3895             :       }
    3896             :       }
    3897             :     }
    3898             :   }
    3899             : 
    3900     3959899 :   unsigned OpOpcode = Operand.getNode()->getOpcode();
    3901     3959899 :   switch (Opcode) {
    3902     1514154 :   case ISD::TokenFactor:
    3903             :   case ISD::MERGE_VALUES:
    3904             :   case ISD::CONCAT_VECTORS:
    3905     1514154 :     return Operand;         // Factor, merge or concat of one node?  No need.
    3906           0 :   case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
    3907        9767 :   case ISD::FP_EXTEND:
    3908             :     assert(VT.isFloatingPoint() &&
    3909             :            Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
    3910        9808 :     if (Operand.getValueType() == VT) return Operand;  // noop conversion.
    3911             :     assert((!VT.isVector() ||
    3912             :             VT.getVectorNumElements() ==
    3913             :             Operand.getValueType().getVectorNumElements()) &&
    3914             :            "Vector element count mismatch!");
    3915             :     assert(Operand.getValueType().bitsLT(VT) &&
    3916             :            "Invalid fpext node, dst < src!");
    3917        7444 :     if (Operand.isUndef())
    3918          21 :       return getUNDEF(VT);
    3919             :     break;
    3920       59710 :   case ISD::SIGN_EXTEND:
    3921             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    3922             :            "Invalid SIGN_EXTEND!");
    3923       59795 :     if (Operand.getValueType() == VT) return Operand;   // noop extension
    3924             :     assert((!VT.isVector() ||
    3925             :             VT.getVectorNumElements() ==
    3926             :             Operand.getValueType().getVectorNumElements()) &&
    3927             :            "Vector element count mismatch!");
    3928             :     assert(Operand.getValueType().bitsLT(VT) &&
    3929             :            "Invalid sext node, dst < src!");
    3930       57016 :     if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
    3931         454 :       return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    3932       56562 :     else if (OpOpcode == ISD::UNDEF)
    3933             :       // sext(undef) = 0, because the top bits will all be the same.
    3934         215 :       return getConstant(0, DL, VT);
    3935             :     break;
    3936      177426 :   case ISD::ZERO_EXTEND:
    3937             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    3938             :            "Invalid ZERO_EXTEND!");
    3939      179420 :     if (Operand.getValueType() == VT) return Operand;   // noop extension
    3940             :     assert((!VT.isVector() ||
    3941             :             VT.getVectorNumElements() ==
    3942             :             Operand.getValueType().getVectorNumElements()) &&
    3943             :            "Vector element count mismatch!");
    3944             :     assert(Operand.getValueType().bitsLT(VT) &&
    3945             :            "Invalid zext node, dst < src!");
    3946      172287 :     if (OpOpcode == ISD::ZERO_EXTEND)   // (zext (zext x)) -> (zext x)
    3947         831 :       return getNode(ISD::ZERO_EXTEND, DL, VT, Operand.getOperand(0));
    3948      171456 :     else if (OpOpcode == ISD::UNDEF)
    3949             :       // zext(undef) = 0, because the top bits will be zero.
    3950         887 :       return getConstant(0, DL, VT);
    3951             :     break;
    3952      157435 :   case ISD::ANY_EXTEND:
    3953             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    3954             :            "Invalid ANY_EXTEND!");
    3955      159297 :     if (Operand.getValueType() == VT) return Operand;   // noop extension
    3956             :     assert((!VT.isVector() ||
    3957             :             VT.getVectorNumElements() ==
    3958             :             Operand.getValueType().getVectorNumElements()) &&
    3959             :            "Vector element count mismatch!");
    3960             :     assert(Operand.getValueType().bitsLT(VT) &&
    3961             :            "Invalid anyext node, dst < src!");
    3962             : 
    3963       91529 :     if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
    3964             :         OpOpcode == ISD::ANY_EXTEND)
    3965             :       // (ext (zext x)) -> (zext x)  and  (ext (sext x)) -> (sext x)
    3966        2498 :       return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    3967       89031 :     else if (OpOpcode == ISD::UNDEF)
    3968         339 :       return getUNDEF(VT);
    3969             : 
    3970             :     // (ext (trunc x)) -> x
    3971       88692 :     if (OpOpcode == ISD::TRUNCATE) {
    3972       12975 :       SDValue OpOp = Operand.getOperand(0);
    3973           7 :       if (OpOp.getValueType() == VT) {
    3974       10988 :         transferDbgValues(Operand, OpOp);
    3975       10988 :         return OpOp;
    3976             :       }
    3977             :     }
    3978             :     break;
    3979      673482 :   case ISD::TRUNCATE:
    3980             :     assert(VT.isInteger() && Operand.getValueType().isInteger() &&
    3981             :            "Invalid TRUNCATE!");
    3982      678610 :     if (Operand.getValueType() == VT) return Operand;   // noop truncate
    3983             :     assert((!VT.isVector() ||
    3984             :             VT.getVectorNumElements() ==
    3985             :             Operand.getValueType().getVectorNumElements()) &&
    3986             :            "Vector element count mismatch!");
    3987             :     assert(Operand.getValueType().bitsGT(VT) &&
    3988             :            "Invalid truncate node, src < dst!");
    3989      373601 :     if (OpOpcode == ISD::TRUNCATE)
    3990       39443 :       return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
    3991      334158 :     if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
    3992             :         OpOpcode == ISD::ANY_EXTEND) {
    3993             :       // If the source is smaller than the dest, we still need an extend.
    3994       35217 :       if (Operand.getOperand(0).getValueType().getScalarType()
    3995       11739 :             .bitsLT(VT.getScalarType()))
    3996        4157 :         return getNode(OpOpcode, DL, VT, Operand.getOperand(0));
    3997       15164 :       if (Operand.getOperand(0).getValueType().bitsGT(VT))
    3998         263 :         return getNode(ISD::TRUNCATE, DL, VT, Operand.getOperand(0));
    3999        7319 :       return Operand.getOperand(0);
    4000             :     }
    4001      322419 :     if (OpOpcode == ISD::UNDEF)
    4002       13410 :       return getUNDEF(VT);
    4003             :     break;
    4004         527 :   case ISD::ABS:
    4005             :     assert(VT.isInteger() && VT == Operand.getValueType() &&
    4006             :            "Invalid ABS!");
    4007         527 :     if (OpOpcode == ISD::UNDEF)
    4008           1 :       return getUNDEF(VT);
    4009             :     break;
    4010         957 :   case ISD::BSWAP:
    4011             :     assert(VT.isInteger() && VT == Operand.getValueType() &&
    4012             :            "Invalid BSWAP!");
    4013             :     assert((VT.getScalarSizeInBits() % 16 == 0) &&
    4014             :            "BSWAP types must be a multiple of 16 bits!");
    4015         957 :     if (OpOpcode == ISD::UNDEF)
    4016           4 :       return getUNDEF(VT);
    4017             :     break;
    4018         698 :   case ISD::BITREVERSE:
    4019             :     assert(VT.isInteger() && VT == Operand.getValueType() &&
    4020             :            "Invalid BITREVERSE!");
    4021         698 :     if (OpOpcode == ISD::UNDEF)
    4022           4 :       return getUNDEF(VT);
    4023             :     break;
    4024      783500 :   case ISD::BITCAST:
    4025             :     // Basic sanity checking.
    4026             :     assert(VT.getSizeInBits() == Operand.getValueSizeInBits() &&
    4027             :            "Cannot BITCAST between types of different sizes!");
    4028        4957 :     if (VT == Operand.getValueType()) return Operand;  // noop conversion.
    4029      602962 :     if (OpOpcode == ISD::BITCAST)  // bitconv(bitconv(x)) -> bitconv(x)
    4030       47152 :       return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
    4031      555810 :     if (OpOpcode == ISD::UNDEF)
    4032       11916 :       return getUNDEF(VT);
    4033             :     break;
    4034       20568 :   case ISD::SCALAR_TO_VECTOR:
    4035             :     assert(VT.isVector() && !Operand.getValueType().isVector() &&
    4036             :            (VT.getVectorElementType() == Operand.getValueType() ||
    4037             :             (VT.getVectorElementType().isInteger() &&
    4038             :              Operand.getValueType().isInteger() &&
    4039             :              VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
    4040             :            "Illegal SCALAR_TO_VECTOR node!");
    4041       20568 :     if (OpOpcode == ISD::UNDEF)
    4042           1 :       return getUNDEF(VT);
    4043             :     // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
    4044             :     if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
    4045        1396 :         isa<ConstantSDNode>(Operand.getOperand(1)) &&
    4046       20567 :         Operand.getConstantOperandVal(1) == 0 &&
    4047        1916 :         Operand.getOperand(0).getValueType() == VT)
    4048         762 :       return Operand.getOperand(0);
    4049             :     break;
    4050        5931 :   case ISD::FNEG:
    4051             :     // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
    4052        5931 :     if ((getTarget().Options.UnsafeFPMath || Flags.hasNoSignedZeros()) &&
    4053             :         OpOpcode == ISD::FSUB)
    4054             :       return getNode(ISD::FSUB, DL, VT, Operand.getOperand(1),
    4055          58 :                      Operand.getOperand(0), Flags);
    4056        5873 :     if (OpOpcode == ISD::FNEG)  // --X -> X
    4057           9 :       return Operand.getOperand(0);
    4058             :     break;
    4059        1426 :   case ISD::FABS:
    4060        1426 :     if (OpOpcode == ISD::FNEG)  // abs(-X) -> abs(X)
    4061          18 :       return getNode(ISD::FABS, DL, VT, Operand.getOperand(0));
    4062             :     break;
    4063             :   }
    4064             : 
    4065             :   SDNode *N;
    4066     1748514 :   SDVTList VTs = getVTList(VT);
    4067     1748514 :   SDValue Ops[] = {Operand};
    4068     1748514 :   if (VT != MVT::Glue) { // Don't CSE flag producing nodes
    4069             :     FoldingSetNodeID ID;
    4070     1747909 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    4071     1747909 :     void *IP = nullptr;
    4072     1747909 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    4073       84724 :       E->intersectFlagsWith(Flags);
    4074       84724 :       return SDValue(E, 0);
    4075             :     }
    4076             : 
    4077     3326370 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4078             :     N->setFlags(Flags);
    4079     1663185 :     createOperands(N, Ops);
    4080     1663185 :     CSEMap.InsertNode(N, IP);
    4081             :   } else {
    4082        1210 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4083         605 :     createOperands(N, Ops);
    4084             :   }
    4085             : 
    4086     1663790 :   InsertNode(N);
    4087             :   SDValue V = SDValue(N, 0);
    4088             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    4089     1663790 :   return V;
    4090             : }
    4091             : 
    4092      513571 : static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
    4093             :                                         const APInt &C2) {
    4094      513571 :   switch (Opcode) {
    4095      520742 :   case ISD::ADD:  return std::make_pair(C1 + C2, true);
    4096       62350 :   case ISD::SUB:  return std::make_pair(C1 - C2, true);
    4097        8368 :   case ISD::MUL:  return std::make_pair(C1 * C2, true);
    4098       20052 :   case ISD::AND:  return std::make_pair(C1 & C2, true);
    4099        3754 :   case ISD::OR:   return std::make_pair(C1 | C2, true);
    4100        4378 :   case ISD::XOR:  return std::make_pair(C1 ^ C2, true);
    4101      144434 :   case ISD::SHL:  return std::make_pair(C1 << C2, true);
    4102       30072 :   case ISD::SRL:  return std::make_pair(C1.lshr(C2), true);
    4103        1260 :   case ISD::SRA:  return std::make_pair(C1.ashr(C2), true);
    4104          32 :   case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
    4105           0 :   case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
    4106        1624 :   case ISD::SMIN: return std::make_pair(C1.sle(C2) ? C1 : C2, true);
    4107        1632 :   case ISD::SMAX: return std::make_pair(C1.sge(C2) ? C1 : C2, true);
    4108        1624 :   case ISD::UMIN: return std::make_pair(C1.ule(C2) ? C1 : C2, true);
    4109        1626 :   case ISD::UMAX: return std::make_pair(C1.uge(C2) ? C1 : C2, true);
    4110             :   case ISD::UDIV:
    4111          31 :     if (!C2.getBoolValue())
    4112             :       break;
    4113          62 :     return std::make_pair(C1.udiv(C2), true);
    4114             :   case ISD::UREM:
    4115          34 :     if (!C2.getBoolValue())
    4116             :       break;
    4117          68 :     return std::make_pair(C1.urem(C2), true);
    4118             :   case ISD::SDIV:
    4119         100 :     if (!C2.getBoolValue())
    4120             :       break;
    4121         200 :     return std::make_pair(C1.sdiv(C2), true);
    4122             :   case ISD::SREM:
    4123          81 :     if (!C2.getBoolValue())
    4124             :       break;
    4125         162 :     return std::make_pair(C1.srem(C2), true);
    4126             :   }
    4127      112351 :   return std::make_pair(APInt(1, 0), false);
    4128             : }
    4129             : 
    4130      513678 : SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
    4131             :                                              EVT VT, const ConstantSDNode *Cst1,
    4132             :                                              const ConstantSDNode *Cst2) {
    4133     1027250 :   if (Cst1->isOpaque() || Cst2->isOpaque())
    4134         107 :     return SDValue();
    4135             : 
    4136             :   std::pair<APInt, bool> Folded = FoldValue(Opcode, Cst1->getAPIntValue(),
    4137     1540713 :                                             Cst2->getAPIntValue());
    4138      513571 :   if (!Folded.second)
    4139      112351 :     return SDValue();
    4140      401220 :   return getConstant(Folded.first, DL, VT);
    4141             : }
    4142             : 
    4143      271523 : SDValue SelectionDAG::FoldSymbolOffset(unsigned Opcode, EVT VT,
    4144             :                                        const GlobalAddressSDNode *GA,
    4145             :                                        const SDNode *N2) {
    4146      271523 :   if (GA->getOpcode() != ISD::GlobalAddress)
    4147          12 :     return SDValue();
    4148      271511 :   if (!TLI->isOffsetFoldingLegal(GA))
    4149      265170 :     return SDValue();
    4150             :   const ConstantSDNode *Cst2 = dyn_cast<ConstantSDNode>(N2);
    4151             :   if (!Cst2)
    4152        1910 :     return SDValue();
    4153        4431 :   int64_t Offset = Cst2->getSExtValue();
    4154        4431 :   switch (Opcode) {
    4155             :   case ISD::ADD: break;
    4156           1 :   case ISD::SUB: Offset = -uint64_t(Offset); break;
    4157          16 :   default: return SDValue();
    4158             :   }
    4159        4415 :   return getGlobalAddress(GA->getGlobal(), SDLoc(Cst2), VT,
    4160        8830 :                           GA->getOffset() + uint64_t(Offset));
    4161             : }
    4162             : 
    4163     5386007 : bool SelectionDAG::isUndef(unsigned Opcode, ArrayRef<SDValue> Ops) {
    4164     5386007 :   switch (Opcode) {
    4165       16542 :   case ISD::SDIV:
    4166             :   case ISD::UDIV:
    4167             :   case ISD::SREM:
    4168             :   case ISD::UREM: {
    4169             :     // If a divisor is zero/undef or any element of a divisor vector is
    4170             :     // zero/undef, the whole op is undef.
    4171             :     assert(Ops.size() == 2 && "Div/rem should have 2 operands");
    4172       16542 :     SDValue Divisor = Ops[1];
    4173       16542 :     if (Divisor.isUndef() || isNullConstant(Divisor))
    4174             :       return true;
    4175             : 
    4176       18123 :     return ISD::isBuildVectorOfConstantSDNodes(Divisor.getNode()) &&
    4177             :            llvm::any_of(Divisor->op_values(),
    4178       33182 :                         [](SDValue V) { return V.isUndef() ||
    4179       16582 :                                         isNullConstant(V); });
    4180             :     // TODO: Handle signed overflow.
    4181             :   }
    4182             :   // TODO: Handle oversized shifts.
    4183             :   default:
    4184             :     return false;
    4185             :   }
    4186             : }
    4187             : 
    4188     4875736 : SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, const SDLoc &DL,
    4189             :                                              EVT VT, SDNode *Cst1,
    4190             :                                              SDNode *Cst2) {
    4191             :   // If the opcode is a target-specific ISD node, there's nothing we can
    4192             :   // do here and the operand rules may not line up with the below, so
    4193             :   // bail early.
    4194     4875736 :   if (Opcode >= ISD::BUILTIN_OP_END)
    4195      366859 :     return SDValue();
    4196             : 
    4197     4508877 :   if (isUndef(Opcode, {SDValue(Cst1, 0), SDValue(Cst2, 0)}))
    4198          90 :     return getUNDEF(VT);
    4199             : 
    4200             :   // Handle the case of two scalars.
    4201             :   if (const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
    4202             :     if (const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
    4203      506267 :       SDValue Folded = FoldConstantArithmetic(Opcode, DL, VT, Scalar1, Scalar2);
    4204             :       assert((!Folded || !VT.isVector()) &&
    4205             :              "Can't fold vectors ops with scalar operands");
    4206      506267 :       return Folded;
    4207             :     }
    4208             :   }
    4209             : 
    4210             :   // fold (add Sym, c) -> Sym+c
    4211             :   if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Cst1))
    4212      270099 :     return FoldSymbolOffset(Opcode, VT, GA, Cst2);
    4213     3732421 :   if (TLI->isCommutativeBinOp(Opcode))
    4214             :     if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(Cst2))
    4215        1424 :       return FoldSymbolOffset(Opcode, VT, GA, Cst1);
    4216             : 
    4217             :   // For vectors extract each constant element into Inputs so we can constant
    4218             :   // fold them individually.
    4219             :   BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
    4220             :   BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
    4221     3730997 :   if (!BV1 || !BV2)
    4222     3726775 :     return SDValue();
    4223             : 
    4224             :   assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
    4225             : 
    4226        4222 :   EVT SVT = VT.getScalarType();
    4227        4222 :   EVT LegalSVT = SVT;
    4228        4222 :   if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
    4229        1588 :     LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
    4230         794 :     if (LegalSVT.bitsLT(SVT))
    4231           0 :       return SDValue();
    4232             :   }
    4233             :   SmallVector<SDValue, 4> Outputs;
    4234       32004 :   for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
    4235       28660 :     SDValue V1 = BV1->getOperand(I);
    4236       28660 :     SDValue V2 = BV2->getOperand(I);
    4237             : 
    4238       14330 :     if (SVT.isInteger()) {
    4239       26460 :         if (V1->getValueType(0).bitsGT(SVT))
    4240         364 :           V1 = getNode(ISD::TRUNCATE, DL, SVT, V1);
    4241       26460 :         if (V2->getValueType(0).bitsGT(SVT))
    4242         337 :           V2 = getNode(ISD::TRUNCATE, DL, SVT, V2);
    4243             :     }
    4244             : 
    4245       28760 :     if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
    4246           0 :       return SDValue();
    4247             : 
    4248             :     // Fold one vector element.
    4249       14330 :     SDValue ScalarResult = getNode(Opcode, DL, SVT, V1, V2);
    4250       14380 :     if (LegalSVT != SVT)
    4251         298 :       ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);
    4252             : 
    4253             :     // Scalar folding only succeeded if the result is a constant or UNDEF.
    4254       42967 :     if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
    4255             :         ScalarResult.getOpcode() != ISD::ConstantFP)
    4256        2550 :       return SDValue();
    4257       11780 :     Outputs.push_back(ScalarResult);
    4258             :   }
    4259             : 
    4260             :   assert(VT.getVectorNumElements() == Outputs.size() &&
    4261             :          "Vector size mismatch!");
    4262             : 
    4263             :   // We may have a vector type but a scalar result. Create a splat.
    4264        3344 :   Outputs.resize(VT.getVectorNumElements(), Outputs.back());
    4265             : 
    4266             :   // Build a big vector out of the scalar elements we generated.
    4267        3344 :   return getBuildVector(VT, SDLoc(), Outputs);
    4268             : }
    4269             : 
    4270             : // TODO: Merge with FoldConstantArithmetic
    4271      868714 : SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode,
    4272             :                                                    const SDLoc &DL, EVT VT,
    4273             :                                                    ArrayRef<SDValue> Ops,
    4274             :                                                    const SDNodeFlags Flags) {
    4275             :   // If the opcode is a target-specific ISD node, there's nothing we can
    4276             :   // do here and the operand rules may not line up with the below, so
    4277             :   // bail early.
    4278      868714 :   if (Opcode >= ISD::BUILTIN_OP_END)
    4279           0 :     return SDValue();
    4280             : 
    4281      868714 :   if (isUndef(Opcode, Ops))
    4282           1 :     return getUNDEF(VT);
    4283             : 
    4284             :   // We can only fold vectors - maybe merge with FoldConstantArithmetic someday?
    4285      868713 :   if (!VT.isVector())
    4286      175621 :     return SDValue();
    4287             : 
    4288      693092 :   unsigned NumElts = VT.getVectorNumElements();
    4289             : 
    4290        3135 :   auto IsScalarOrSameVectorSize = [&](const SDValue &Op) {
    4291       15565 :     return !Op.getValueType().isVector() ||
    4292        6160 :            Op.getValueType().getVectorNumElements() == NumElts;
    4293        3135 :   };
    4294             : 
    4295      697954 :   auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
    4296             :     BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
    4297     1395763 :     return (Op.isUndef()) || (Op.getOpcode() == ISD::CONDCODE) ||
    4298        8858 :            (BV && BV->isConstant());
    4299             :   };
    4300             : 
    4301             :   // All operands must be vector types with the same number of elements as
    4302             :   // the result type and must be either UNDEF or a build vector of constant
    4303             :   // or UNDEF scalars.
    4304      695572 :   if (!llvm::all_of(Ops, IsConstantBuildVectorOrUndef) ||
    4305             :       !llvm::all_of(Ops, IsScalarOrSameVectorSize))
    4306      690612 :     return SDValue();
    4307             : 
    4308             :   // If we are comparing vectors, then the result needs to be a i1 boolean
    4309             :   // that is then sign-extended back to the legal result type.
    4310        4850 :   EVT SVT = (Opcode == ISD::SETCC ? MVT::i1 : VT.getScalarType());
    4311             : 
    4312             :   // Find legal integer scalar type for constant promotion and
    4313             :   // ensure that its scalar size is at least as large as source.
    4314        2480 :   EVT LegalSVT = VT.getScalarType();
    4315        2480 :   if (NewNodesMustHaveLegalTypes && LegalSVT.isInteger()) {
    4316         768 :     LegalSVT = TLI->getTypeToTransformTo(*getContext(), LegalSVT);
    4317         384 :     if (LegalSVT.bitsLT(VT.getScalarType()))
    4318           0 :       return SDValue();
    4319             :   }
    4320             : 
    4321             :   // Constant fold each scalar lane separately.
    4322             :   SmallVector<SDValue, 4> ScalarResults;
    4323       43584 :   for (unsigned i = 0; i != NumElts; i++) {
    4324             :     SmallVector<SDValue, 4> ScalarOps;
    4325       70182 :     for (SDValue Op : Ops) {
    4326       49552 :       EVT InSVT = Op.getValueType().getScalarType();
    4327             :       BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
    4328         437 :       if (!InBV) {
    4329             :         // We've checked that this is UNDEF or a constant of some kind.
    4330         437 :         if (Op.isUndef())
    4331         110 :           ScalarOps.push_back(getUNDEF(InSVT));
    4332             :         else
    4333         327 :           ScalarOps.push_back(Op);
    4334         437 :         continue;
    4335             :       }
    4336             : 
    4337       48678 :       SDValue ScalarOp = InBV->getOperand(i);
    4338       48678 :       EVT ScalarVT = ScalarOp.getValueType();
    4339             : 
    4340             :       // Build vector (integer) scalar operands may need implicit
    4341             :       // truncation - do this before constant folding.
    4342       24339 :       if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT))
    4343         226 :         ScalarOp = getNode(ISD::TRUNCATE, DL, InSVT, ScalarOp);
    4344             : 
    4345       24339 :       ScalarOps.push_back(ScalarOp);
    4346             :     }
    4347             : 
    4348             :     // Constant fold the scalar operands.
    4349       20630 :     SDValue ScalarResult = getNode(Opcode, DL, SVT, ScalarOps, Flags);
    4350             : 
    4351             :     // Legalize the (integer) scalar constant if necessary.
    4352       20646 :     if (LegalSVT != SVT)
    4353          79 :       ScalarResult = getNode(ISD::SIGN_EXTEND, DL, LegalSVT, ScalarResult);
    4354             : 
    4355             :     // Scalar folding only succeeded if the result is a constant or UNDEF.
    4356       61744 :     if (!ScalarResult.isUndef() && ScalarResult.getOpcode() != ISD::Constant &&
    4357             :         ScalarResult.getOpcode() != ISD::ConstantFP)
    4358          78 :       return SDValue();
    4359       20552 :     ScalarResults.push_back(ScalarResult);
    4360             :   }
    4361             : 
    4362        2402 :   SDValue V = getBuildVector(VT, DL, ScalarResults);
    4363             :   NewSDValueDbgMsg(V, "New node fold constant vector: ", this);
    4364        2402 :   return V;
    4365             : }
    4366             : 
    4367     5672106 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    4368             :                               SDValue N1, SDValue N2, const SDNodeFlags Flags) {
    4369             :   ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
    4370             :   ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
    4371             :   ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
    4372             :   ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
    4373             : 
    4374             :   // Canonicalize constant to RHS if commutative.
    4375     5672106 :   if (TLI->isCommutativeBinOp(Opcode)) {
    4376     2562586 :     if (N1C && !N2C) {
    4377             :       std::swap(N1C, N2C);
    4378             :       std::swap(N1, N2);
    4379     2549579 :     } else if (N1CFP && !N2CFP) {
    4380             :       std::swap(N1CFP, N2CFP);
    4381             :       std::swap(N1, N2);
    4382             :     }
    4383             :   }
    4384             : 
    4385     5672106 :   switch (Opcode) {
    4386             :   default: break;
    4387     1251395 :   case ISD::TokenFactor:
    4388             :     assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
    4389             :            N2.getValueType() == MVT::Other && "Invalid token factor!");
    4390             :     // Fold trivial token factors.
    4391     1251395 :     if (N1.getOpcode() == ISD::EntryToken) return N2;
    4392     1251152 :     if (N2.getOpcode() == ISD::EntryToken) return N1;
    4393         829 :     if (N1 == N2) return N1;
    4394             :     break;
    4395       38687 :   case ISD::CONCAT_VECTORS: {
    4396             :     // Attempt to fold CONCAT_VECTORS into BUILD_VECTOR or UNDEF.
    4397       38687 :     SDValue Ops[] = {N1, N2};
    4398       38687 :     if (SDValue V = FoldCONCAT_VECTORS(DL, VT, Ops, *this))
    4399         912 :       return V;
    4400       37775 :     break;
    4401             :   }
    4402      196758 :   case ISD::AND:
    4403             :     assert(VT.isInteger() && "This operator does not apply to FP types!");
    4404             :     assert(N1.getValueType() == N2.getValueType() &&
    4405             :            N1.getValueType() == VT && "Binary operator types must match!");
    4406             :     // (X & 0) -> 0.  This commonly occurs when legalizing i64 values, so it's
    4407             :     // worth handling here.
    4408      355788 :     if (N2C && N2C->isNullValue())
    4409        3124 :       return N2;
    4410      505446 :     if (N2C && N2C->isAllOnesValue())  // X & -1 -> X
    4411        2073 :       return N1;
    4412             :     break;
    4413     2370534 :   case ISD::OR:
    4414             :   case ISD::XOR:
    4415             :   case ISD::ADD:
    4416             :   case ISD::SUB:
    4417             :     assert(VT.isInteger() && "This operator does not apply to FP types!");
    4418             :     assert(N1.getValueType() == N2.getValueType() &&
    4419             :            N1.getValueType() == VT && "Binary operator types must match!");
    4420             :     // (X ^|+- 0) -> X.  This commonly occurs when legalizing i64 values, so
    4421             :     // it's worth handling here.
    4422     4211497 :     if (N2C && N2C->isNullValue())
    4423      776545 :       return N1;
    4424             :     break;
    4425             :   case ISD::UDIV:
    4426             :   case ISD::UREM:
    4427             :   case ISD::MULHU:
    4428             :   case ISD::MULHS:
    4429             :   case ISD::MUL:
    4430             :   case ISD::SDIV:
    4431             :   case ISD::SREM:
    4432             :   case ISD::SMIN:
    4433             :   case ISD::SMAX:
    4434             :   case ISD::UMIN:
    4435             :   case ISD::UMAX:
    4436             :     assert(VT.isInteger() && "This operator does not apply to FP types!");
    4437             :     assert(N1.getValueType() == N2.getValueType() &&
    4438             :            N1.getValueType() == VT && "Binary operator types must match!");
    4439             :     break;
    4440       45077 :   case ISD::FADD:
    4441             :   case ISD::FSUB:
    4442             :   case ISD::FMUL:
    4443             :   case ISD::FDIV:
    4444             :   case ISD::FREM:
    4445       45077 :     if (getTarget().Options.UnsafeFPMath) {
    4446        7233 :       if (Opcode == ISD::FADD) {
    4447             :         // x+0 --> x
    4448        2148 :         if (N2CFP && N2CFP->getValueAPF().isZero())
    4449          19 :           return N1;
    4450        5368 :       } else if (Opcode == ISD::FSUB) {
    4451             :         // x-0 --> x
    4452         963 :         if (N2CFP && N2CFP->getValueAPF().isZero())
    4453           4 :           return N1;
    4454        4423 :       } else if (Opcode == ISD::FMUL) {
    4455             :         // x*0 --> 0
    4456        4272 :         if (N2CFP && N2CFP->isZero())
    4457           7 :           return N2;
    4458             :         // x*1 --> x
    4459        4873 :         if (N2CFP && N2CFP->isExactlyValue(1.0))
    4460          70 :           return N1;
    4461             :       }
    4462             :     }
    4463             :     assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
    4464             :     assert(N1.getValueType() == N2.getValueType() &&
    4465             :            N1.getValueType() == VT && "Binary operator types must match!");
    4466             :     break;
    4467             :   case ISD::FCOPYSIGN:   // N1 and result must match.  N1/N2 need not match.
    4468             :     assert(N1.getValueType() == VT &&
    4469             :            N1.getValueType().isFloatingPoint() &&
    4470             :            N2.getValueType().isFloatingPoint() &&
    4471             :            "Invalid FCOPYSIGN!");
    4472             :     break;
    4473             :   case ISD::SHL:
    4474             :   case ISD::SRA:
    4475             :   case ISD::SRL:
    4476             :   case ISD::ROTL:
    4477             :   case ISD::ROTR:
    4478             :     assert(VT == N1.getValueType() &&
    4479             :            "Shift operators return type must be the same as their first arg");
    4480             :     assert(VT.isInteger() && N2.getValueType().isInteger() &&
    4481             :            "Shifts only work on integers");
    4482             :     assert((!VT.isVector() || VT == N2.getValueType()) &&
    4483             :            "Vector shift amounts must be in the same as their first arg");
    4484             :     // Verify that the shift amount VT is bit enough to hold valid shift
    4485             :     // amounts.  This catches things like trying to shift an i1024 value by an
    4486             :     // i8, which is easy to fall into in generic code that uses
    4487             :     // TLI.getShiftAmount().
    4488             :     assert(N2.getValueSizeInBits() >= Log2_32_Ceil(N1.getValueSizeInBits()) &&
    4489             :            "Invalid use of small shift amount with oversized value!");
    4490             : 
    4491             :     // Always fold shifts of i1 values so the code generator doesn't need to
    4492             :     // handle them.  Since we know the size of the shift has to be less than the
    4493             :     // size of the value, the shift/rotate count is guaranteed to be zero.
    4494             :     if (VT == MVT::i1)
    4495          45 :       return N1;
    4496     1174522 :     if (N2C && N2C->isNullValue())
    4497       12267 :       return N1;
    4498             :     break;
    4499             :   case ISD::FP_ROUND_INREG: {
    4500             :     EVT EVT = cast<VTSDNode>(N2)->getVT();
    4501             :     assert(VT == N1.getValueType() && "Not an inreg round!");
    4502             :     assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
    4503             :            "Cannot FP_ROUND_INREG integer types");
    4504             :     assert(EVT.isVector() == VT.isVector() &&
    4505             :            "FP_ROUND_INREG type should be vector iff the operand "
    4506             :            "type is vector!");
    4507             :     assert((!EVT.isVector() ||
    4508             :             EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
    4509             :            "Vector element counts must match in FP_ROUND_INREG");
    4510             :     assert(EVT.bitsLE(VT) && "Not rounding down!");
    4511             :     (void)EVT;
    4512           0 :     if (cast<VTSDNode>(N2)->getVT() == VT) return N1;  // Not actually rounding.
    4513             :     break;
    4514             :   }
    4515        6153 :   case ISD::FP_ROUND:
    4516             :     assert(VT.isFloatingPoint() &&
    4517             :            N1.getValueType().isFloatingPoint() &&
    4518             :            VT.bitsLE(N1.getValueType()) &&
    4519             :            N2C && (N2C->getZExtValue() == 0 || N2C->getZExtValue() == 1) &&
    4520             :            "Invalid FP_ROUND!");
    4521        6166 :     if (N1.getValueType() == VT) return N1;  // noop conversion.
    4522             :     break;
    4523             :   case ISD::AssertSext:
    4524             :   case ISD::AssertZext: {
    4525             :     EVT EVT = cast<VTSDNode>(N2)->getVT();
    4526             :     assert(VT == N1.getValueType() && "Not an inreg extend!");
    4527             :     assert(VT.isInteger() && EVT.isInteger() &&
    4528             :            "Cannot *_EXTEND_INREG FP types");
    4529             :     assert(!EVT.isVector() &&
    4530             :            "AssertSExt/AssertZExt type should be the vector element type "
    4531             :            "rather than the vector type!");
    4532             :     assert(EVT.bitsLE(VT) && "Not extending!");
    4533         378 :     if (VT == EVT) return N1; // noop assertion.
    4534             :     break;
    4535             :   }
    4536             :   case ISD::SIGN_EXTEND_INREG: {
    4537       19287 :     EVT EVT = cast<VTSDNode>(N2)->getVT();
    4538             :     assert(VT == N1.getValueType() && "Not an inreg extend!");
    4539             :     assert(VT.isInteger() && EVT.isInteger() &&
    4540             :            "Cannot *_EXTEND_INREG FP types");
    4541             :     assert(EVT.isVector() == VT.isVector() &&
    4542             :            "SIGN_EXTEND_INREG type should be vector iff the operand "
    4543             :            "type is vector!");
    4544             :     assert((!EVT.isVector() ||
    4545             :             EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
    4546             :            "Vector element counts must match in SIGN_EXTEND_INREG");
    4547             :     assert(EVT.bitsLE(VT) && "Not extending!");
    4548       19677 :     if (EVT == VT) return N1;  // Not actually extending
    4549             : 
    4550         240 :     auto SignExtendInReg = [&](APInt Val, llvm::EVT ConstantVT) {
    4551         240 :       unsigned FromBits = EVT.getScalarSizeInBits();
    4552         240 :       Val <<= Val.getBitWidth() - FromBits;
    4553         240 :       Val.ashrInPlace(Val.getBitWidth() - FromBits);
    4554         240 :       return getConstant(Val, DL, ConstantVT);
    4555       19197 :     };
    4556             : 
    4557       19197 :     if (N1C) {
    4558         202 :       const APInt &Val = N1C->getAPIntValue();
    4559         404 :       return SignExtendInReg(Val, VT);
    4560             :     }
    4561       18995 :     if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
    4562             :       SmallVector<SDValue, 8> Ops;
    4563          22 :       llvm::EVT OpVT = N1.getOperand(0).getValueType();
    4564          51 :       for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
    4565          80 :         SDValue Op = N1.getOperand(i);
    4566          42 :         if (Op.isUndef()) {
    4567           2 :           Ops.push_back(getUNDEF(OpVT));
    4568           2 :           continue;
    4569             :         }
    4570             :         ConstantSDNode *C = cast<ConstantSDNode>(Op);
    4571          38 :         APInt Val = C->getAPIntValue();
    4572          76 :         Ops.push_back(SignExtendInReg(Val, OpVT));
    4573             :       }
    4574          11 :       return getBuildVector(VT, DL, Ops);
    4575             :     }
    4576       18984 :     break;
    4577             :   }
    4578      326829 :   case ISD::EXTRACT_VECTOR_ELT:
    4579             :     assert(VT.getSizeInBits() >= N1.getValueType().getScalarSizeInBits() &&
    4580             :            "The result of EXTRACT_VECTOR_ELT must be at least as wide as the \
    4581             :              element type of the vector.");
    4582             : 
    4583             :     // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
    4584      326829 :     if (N1.isUndef())
    4585       16447 :       return getUNDEF(VT);
    4586             : 
    4587             :     // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
    4588      923110 :     if (N2C && N2C->getAPIntValue().uge(N1.getValueType().getVectorNumElements()))
    4589          84 :       return getUNDEF(VT);
    4590             : 
    4591             :     // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
    4592             :     // expanding copies of large vectors from registers.
    4593      306238 :     if (N2C &&
    4594      314732 :         N1.getOpcode() == ISD::CONCAT_VECTORS &&
    4595             :         N1.getNumOperands() > 0) {
    4596             :       unsigned Factor =
    4597        8868 :         N1.getOperand(0).getValueType().getVectorNumElements();
    4598             :       return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
    4599        8868 :                      N1.getOperand(N2C->getZExtValue() / Factor),
    4600        4434 :                      getConstant(N2C->getZExtValue() % Factor, DL,
    4601        8868 :                                  N2.getValueType()));
    4602             :     }
    4603             : 
    4604             :     // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
    4605             :     // expanding large vector constants.
    4606      607668 :     if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
    4607      219782 :       SDValue Elt = N1.getOperand(N2C->getZExtValue());
    4608             : 
    4609      109931 :       if (VT != Elt.getValueType())
    4610             :         // If the vector element type is not legal, the BUILD_VECTOR operands
    4611             :         // are promoted and implicitly truncated, and the result implicitly
    4612             :         // extended. Make that explicit here.
    4613         535 :         Elt = getAnyExtOrTrunc(Elt, DL, VT);
    4614             : 
    4615      109891 :       return Elt;
    4616             :     }
    4617             : 
    4618             :     // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
    4619             :     // operations are lowered to scalars.
    4620      195973 :     if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
    4621             :       // If the indices are the same, return the inserted element else
    4622             :       // if the indices are known different, extract the element from
    4623             :       // the original vector.
    4624        4634 :       SDValue N1Op2 = N1.getOperand(2);
    4625             :       ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
    4626             : 
    4627        3491 :       if (N1Op2C && N2C) {
    4628       10437 :         if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
    4629         569 :           if (VT == N1.getOperand(1).getValueType())
    4630         544 :             return N1.getOperand(1);
    4631             :           else
    4632          25 :             return getSExtOrTrunc(N1.getOperand(1), DL, VT);
    4633             :         }
    4634             : 
    4635        2910 :         return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
    4636             :       }
    4637             :     }
    4638             : 
    4639             :     // EXTRACT_VECTOR_ELT of v1iX EXTRACT_SUBVECTOR could be formed
    4640             :     // when vector types are scalarized and v1iX is legal.
    4641             :     // vextract (v1iX extract_subvector(vNiX, Idx)) -> vextract(vNiX,Idx)
    4642      208961 :     if (N1.getOpcode() == ISD::EXTRACT_SUBVECTOR &&
    4643      208931 :         N1.getValueType().getVectorNumElements() == 1) {
    4644             :       return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0),
    4645          30 :                      N1.getOperand(1));
    4646             :     }
    4647             :     break;
    4648       33989 :   case ISD::EXTRACT_ELEMENT:
    4649             :     assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
    4650             :     assert(!N1.getValueType().isVector() && !VT.isVector() &&
    4651             :            (N1.getValueType().isInteger() == VT.isInteger()) &&
    4652             :            N1.getValueType() != VT &&
    4653             :            "Wrong types for EXTRACT_ELEMENT!");
    4654             : 
    4655             :     // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
    4656             :     // 64-bit integers into 32-bit parts.  Instead of building the extract of
    4657             :     // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
    4658       33989 :     if (N1.getOpcode() == ISD::BUILD_PAIR)
    4659       12884 :       return N1.getOperand(N2C->getZExtValue());
    4660             : 
    4661             :     // EXTRACT_ELEMENT of a constant int is also very common.
    4662       27547 :     if (N1C) {
    4663        5866 :       unsigned ElementSize = VT.getSizeInBits();
    4664       11732 :       unsigned Shift = ElementSize * N2C->getZExtValue();
    4665       11732 :       APInt ShiftedVal = N1C->getAPIntValue().lshr(Shift);
    4666       11732 :       return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
    4667       21681 :     }
    4668             :     break;
    4669      108132 :   case ISD::EXTRACT_SUBVECTOR:
    4670      215522 :     if (VT.isSimple() && N1.getValueType().isSimple()) {
    4671             :       assert(VT.isVector() && N1.getValueType().isVector() &&
    4672             :              "Extract subvector VTs must be a vectors!");
    4673             :       assert(VT.getVectorElementType() ==
    4674             :              N1.getValueType().getVectorElementType() &&
    4675             :              "Extract subvector VTs must have the same element type!");
    4676             :       assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
    4677             :              "Extract subvector must be from larger vector to smaller vector!");
    4678             : 
    4679             :       if (N2C) {
    4680             :         assert((VT.getVectorNumElements() + N2C->getZExtValue()
    4681             :                 <= N1.getValueType().getVectorNumElements())
    4682             :                && "Extract subvector overflow!");
    4683             :       }
    4684             : 
    4685             :       // Trivial extraction.
    4686      103571 :       if (VT.getSimpleVT() == N1.getSimpleValueType())
    4687       16058 :         return N1;
    4688             : 
    4689             :       // EXTRACT_SUBVECTOR of an UNDEF is an UNDEF.
    4690       87513 :       if (N1.isUndef())
    4691         823 :         return getUNDEF(VT);
    4692             : 
    4693             :       // EXTRACT_SUBVECTOR of CONCAT_VECTOR can be simplified if the pieces of
    4694             :       // the concat have the same type as the extract.
    4695       92751 :       if (N2C && N1.getOpcode() == ISD::CONCAT_VECTORS &&
    4696       86690 :           N1.getNumOperands() > 0 &&
    4697        6061 :           VT == N1.getOperand(0).getValueType()) {
    4698        4871 :         unsigned Factor = VT.getVectorNumElements();
    4699       14613 :         return N1.getOperand(N2C->getZExtValue() / Factor);
    4700             :       }
    4701             : 
    4702             :       // EXTRACT_SUBVECTOR of INSERT_SUBVECTOR is often created
    4703             :       // during shuffle legalization.
    4704       81819 :       if (N1.getOpcode() == ISD::INSERT_SUBVECTOR && N2 == N1.getOperand(2) &&
    4705         793 :           VT == N1.getOperand(1).getValueType())
    4706         314 :         return N1.getOperand(1);
    4707             :     }
    4708             :     break;
    4709             :   }
    4710             : 
    4711             :   // Perform trivial constant folding.
    4712     4678256 :   if (SDValue SV =
    4713     4678256 :           FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
    4714      202590 :     return SV;
    4715             : 
    4716             :   // Constant fold FP operations.
    4717     4475666 :   bool HasFPExceptions = TLI->hasFloatingPointExceptions();
    4718     4475666 :   if (N1CFP) {
    4719        4489 :     if (N2CFP) {
    4720        6104 :       APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
    4721             :       APFloat::opStatus s;
    4722        3052 :       switch (Opcode) {
    4723         402 :       case ISD::FADD:
    4724         402 :         s = V1.add(V2, APFloat::rmNearestTiesToEven);
    4725         402 :         if (!HasFPExceptions || s != APFloat::opInvalidOp)
    4726         402 :           return getConstantFP(V1, DL, VT);
    4727             :         break;
    4728          47 :       case ISD::FSUB:
    4729          47 :         s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
    4730          47 :         if (!HasFPExceptions || s!=APFloat::opInvalidOp)
    4731          47 :           return getConstantFP(V1, DL, VT);
    4732             :         break;
    4733         416 :       case ISD::FMUL:
    4734         416 :         s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
    4735         416 :         if (!HasFPExceptions || s!=APFloat::opInvalidOp)
    4736         416 :           return getConstantFP(V1, DL, VT);
    4737             :         break;
    4738          48 :       case ISD::FDIV:
    4739          48 :         s = V1.divide(V2, APFloat::rmNearestTiesToEven);
    4740          48 :         if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
    4741             :                                  s!=APFloat::opDivByZero)) {
    4742          25 :           return getConstantFP(V1, DL, VT);
    4743             :         }
    4744             :         break;
    4745          25 :       case ISD::FREM :
    4746          25 :         s = V1.mod(V2);
    4747          25 :         if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
    4748             :                                  s!=APFloat::opDivByZero)) {
    4749          11 :           return getConstantFP(V1, DL, VT);
    4750             :         }
    4751             :         break;
    4752           4 :       case ISD::FCOPYSIGN:
    4753           4 :         V1.copySign(V2);
    4754           4 :         return getConstantFP(V1, DL, VT);
    4755             :       default: break;
    4756             :       }
    4757             :     }
    4758             : 
    4759        3584 :     if (Opcode == ISD::FP_ROUND) {
    4760           4 :       APFloat V = N1CFP->getValueAPF();    // make copy
    4761             :       bool ignored;
    4762             :       // This can return overflow, underflow, or inexact; we don't care.
    4763             :       // FIXME need to be more flexible about rounding mode.
    4764           4 :       (void)V.convert(EVTToAPFloatSemantics(VT),
    4765             :                       APFloat::rmNearestTiesToEven, &ignored);
    4766           4 :       return getConstantFP(V, DL, VT);
    4767             :     }
    4768             :   }
    4769             : 
    4770             :   // Any FP binop with an undef operand is folded to NaN. This matches the
    4771             :   // behavior of the IR optimizer.
    4772     4474757 :   switch (Opcode) {
    4773       43963 :   case ISD::FADD:
    4774             :   case ISD::FSUB:
    4775             :   case ISD::FMUL:
    4776             :   case ISD::FDIV:
    4777             :   case ISD::FREM:
    4778       87373 :     if (N1.isUndef() || N2.isUndef())
    4779        2512 :       return getConstantFP(APFloat::getNaN(EVTToAPFloatSemantics(VT)), DL, VT);
    4780             :   }
    4781             : 
    4782             :   // Canonicalize an UNDEF to the RHS, even over a constant.
    4783     4473501 :   if (N1.isUndef()) {
    4784        4493 :     if (TLI->isCommutativeBinOp(Opcode)) {
    4785             :       std::swap(N1, N2);
    4786             :     } else {
    4787        1676 :       switch (Opcode) {
    4788          28 :       case ISD::FP_ROUND_INREG:
    4789             :       case ISD::SIGN_EXTEND_INREG:
    4790             :       case ISD::SUB:
    4791          28 :         return getUNDEF(VT);     // fold op(undef, arg2) -> undef
    4792         272 :       case ISD::UDIV:
    4793             :       case ISD::SDIV:
    4794             :       case ISD::UREM:
    4795             :       case ISD::SREM:
    4796             :       case ISD::SRA:
    4797             :       case ISD::SRL:
    4798             :       case ISD::SHL:
    4799         272 :         return getConstant(0, DL, VT);    // fold op(undef, arg2) -> 0
    4800             :       }
    4801             :     }
    4802             :   }
    4803             : 
    4804             :   // Fold a bunch of operators when the RHS is undef.
    4805     4473201 :   if (N2.isUndef()) {
    4806       16720 :     switch (Opcode) {
    4807         917 :     case ISD::XOR:
    4808         917 :       if (N1.isUndef())
    4809             :         // Handle undef ^ undef -> 0 special case. This is a common
    4810             :         // idiom (misuse).
    4811         166 :         return getConstant(0, DL, VT);
    4812             :       LLVM_FALLTHROUGH;
    4813             :     case ISD::ADD:
    4814             :     case ISD::ADDC:
    4815             :     case ISD::ADDE:
    4816             :     case ISD::SUB:
    4817             :     case ISD::UDIV:
    4818             :     case ISD::SDIV:
    4819             :     case ISD::UREM:
    4820             :     case ISD::SREM:
    4821             :     case ISD::SRA:
    4822             :     case ISD::SRL:
    4823             :     case ISD::SHL:
    4824        2887 :       return getUNDEF(VT);       // fold op(arg1, undef) -> undef
    4825         989 :     case ISD::MUL:
    4826             :     case ISD::AND:
    4827         989 :       return getConstant(0, DL, VT);  // fold op(arg1, undef) -> 0
    4828         454 :     case ISD::OR:
    4829         454 :       return getAllOnesConstant(DL, VT);
    4830             :     }
    4831             :   }
    4832             : 
    4833             :   // Memoize this node if possible.
    4834             :   SDNode *N;
    4835     4468705 :   SDVTList VTs = getVTList(VT);
    4836     4468705 :   SDValue Ops[] = {N1, N2};
    4837     4468705 :   if (VT != MVT::Glue) {
    4838             :     FoldingSetNodeID ID;
    4839     4465373 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    4840     4465373 :     void *IP = nullptr;
    4841     4465373 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    4842      470649 :       E->intersectFlagsWith(Flags);
    4843      470649 :       return SDValue(E, 0);
    4844             :     }
    4845             : 
    4846     7989448 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4847             :     N->setFlags(Flags);
    4848     3994724 :     createOperands(N, Ops);
    4849     3994724 :     CSEMap.InsertNode(N, IP);
    4850             :   } else {
    4851        6664 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4852        3332 :     createOperands(N, Ops);
    4853             :   }
    4854             : 
    4855     3998056 :   InsertNode(N);
    4856             :   SDValue V = SDValue(N, 0);
    4857             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    4858     3998056 :   return V;
    4859             : }
    4860             : 
    4861      942990 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    4862             :                               SDValue N1, SDValue N2, SDValue N3,
    4863             :                               const SDNodeFlags Flags) {
    4864             :   // Perform various simplifications.
    4865      942990 :   switch (Opcode) {
    4866             :   case ISD::FMA: {
    4867             :     ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
    4868             :     ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
    4869             :     ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
    4870        5120 :     if (N1CFP && N2CFP && N3CFP) {
    4871           8 :       APFloat  V1 = N1CFP->getValueAPF();
    4872           8 :       const APFloat &V2 = N2CFP->getValueAPF();
    4873           8 :       const APFloat &V3 = N3CFP->getValueAPF();
    4874             :       APFloat::opStatus s =
    4875           8 :         V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
    4876           8 :       if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
    4877           8 :         return getConstantFP(V1, DL, VT);
    4878             :     }
    4879             :     break;
    4880             :   }
    4881          10 :   case ISD::CONCAT_VECTORS: {
    4882             :     // Attempt to fold CONCAT_VECTORS into BUILD_VECTOR or UNDEF.
    4883          10 :     SDValue Ops[] = {N1, N2, N3};
    4884          10 :     if (SDValue V = FoldCONCAT_VECTORS(DL, VT, Ops, *this))
    4885           2 :       return V;
    4886           8 :     break;
    4887             :   }
    4888             :   case ISD::SETCC: {
    4889             :     // Use FoldSetCC to simplify SETCC's.
    4890      211685 :     if (SDValue V = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL))
    4891        1112 :       return V;
    4892             :     // Vector constant folding.
    4893      210573 :     SDValue Ops[] = {N1, N2, N3};
    4894      210573 :     if (SDValue V = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops)) {
    4895             :       NewSDValueDbgMsg(V, "New node vector constant folding: ", this);
    4896          57 :       return V;
    4897             :     }
    4898      210516 :     break;
    4899             :   }
    4900             :   case ISD::SELECT:
    4901             :     if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
    4902         782 :      if (N1C->getZExtValue())
    4903         133 :        return N2;             // select true, X, Y -> X
    4904         258 :      return N3;             // select false, X, Y -> Y
    4905             :     }
    4906             : 
    4907          74 :     if (N2 == N3) return N2;   // select C, X, X -> X
    4908             :     break;
    4909           0 :   case ISD::VECTOR_SHUFFLE:
    4910           0 :     llvm_unreachable("should use getVectorShuffle constructor!");
    4911             :   case ISD::INSERT_VECTOR_ELT: {
    4912             :     ConstantSDNode *N3C = dyn_cast<ConstantSDNode>(N3);
    4913             :     // INSERT_VECTOR_ELT into out-of-bounds element is an UNDEF
    4914       76876 :     if (N3C && N3C->getZExtValue() >= N1.getValueType().getVectorNumElements())
    4915           8 :       return getUNDEF(VT);
    4916             :     break;
    4917             :   }
    4918       22452 :   case ISD::INSERT_SUBVECTOR: {
    4919             :     SDValue Index = N3;
    4920       22452 :     if (VT.isSimple() && N1.getValueType().isSimple()
    4921       44904 :         && N2.getValueType().isSimple()) {
    4922             :       assert(VT.isVector() && N1.getValueType().isVector() &&
    4923             :              N2.getValueType().isVector() &&
    4924             :              "Insert subvector VTs must be a vectors");
    4925             :       assert(VT == N1.getValueType() &&
    4926             :              "Dest and insert subvector source types must match!");
    4927             :       assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
    4928             :              "Insert subvector must be from smaller vector to larger vector!");
    4929             :       if (isa<ConstantSDNode>(Index)) {
    4930             :         assert((N2.getValueType().getVectorNumElements() +
    4931             :                 cast<ConstantSDNode>(Index)->getZExtValue()
    4932             :                 <= VT.getVectorNumElements())
    4933             :                && "Insert subvector overflow!");
    4934             :       }
    4935             : 
    4936             :       // Trivial insertion.
    4937       22452 :       if (VT.getSimpleVT() == N2.getSimpleValueType())
    4938          98 :         return N2;
    4939             :     }
    4940             :     break;
    4941             :   }
    4942           0 :   case ISD::BITCAST:
    4943             :     // Fold bit_convert nodes from a type to themselves.
    4944           0 :     if (N1.getValueType() == VT)
    4945           0 :       return N1;
    4946             :     break;
    4947             :   }
    4948             : 
    4949             :   // Memoize node if it doesn't produce a flag.
    4950             :   SDNode *N;
    4951      941240 :   SDVTList VTs = getVTList(VT);
    4952      941240 :   SDValue Ops[] = {N1, N2, N3};
    4953             :   if (VT != MVT::Glue) {
    4954             :     FoldingSetNodeID ID;
    4955      940146 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    4956      940146 :     void *IP = nullptr;
    4957      940146 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    4958      100144 :       E->intersectFlagsWith(Flags);
    4959      100144 :       return SDValue(E, 0);
    4960             :     }
    4961             : 
    4962     1680004 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4963             :     N->setFlags(Flags);
    4964      840002 :     createOperands(N, Ops);
    4965      840002 :     CSEMap.InsertNode(N, IP);
    4966             :   } else {
    4967        2188 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    4968        1094 :     createOperands(N, Ops);
    4969             :   }
    4970             : 
    4971      841096 :   InsertNode(N);
    4972             :   SDValue V = SDValue(N, 0);
    4973             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    4974      841096 :   return V;
    4975             : }
    4976             : 
    4977       41096 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    4978             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4) {
    4979       41096 :   SDValue Ops[] = { N1, N2, N3, N4 };
    4980       41096 :   return getNode(Opcode, DL, VT, Ops);
    4981             : }
    4982             : 
    4983       39234 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    4984             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4,
    4985             :                               SDValue N5) {
    4986       39234 :   SDValue Ops[] = { N1, N2, N3, N4, N5 };
    4987       39234 :   return getNode(Opcode, DL, VT, Ops);
    4988             : }
    4989             : 
    4990             : /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
    4991             : /// the incoming stack arguments to be loaded from the stack.
    4992         156 : SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
    4993             :   SmallVector<SDValue, 8> ArgChains;
    4994             : 
    4995             :   // Include the original chain at the beginning of the list. When this is
    4996             :   // used by target LowerCall hooks, this helps legalize find the
    4997             :   // CALLSEQ_BEGIN node.
    4998         156 :   ArgChains.push_back(Chain);
    4999             : 
    5000             :   // Add a chain value for each stack argument.
    5001         156 :   for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
    5002         744 :        UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
    5003             :     if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
    5004             :       if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
    5005         102 :         if (FI->getIndex() < 0)
    5006         102 :           ArgChains.push_back(SDValue(L, 1));
    5007             : 
    5008             :   // Build a tokenfactor for all the chains.
    5009         468 :   return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
    5010             : }
    5011             : 
    5012             : /// getMemsetValue - Vectorized representation of the memset value
    5013             : /// operand.
    5014       24978 : static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
    5015             :                               const SDLoc &dl) {
    5016             :   assert(!Value.isUndef());
    5017             : 
    5018             :   unsigned NumBits = VT.getScalarSizeInBits();
    5019             :   if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
    5020             :     assert(C->getAPIntValue().getBitWidth() == 8);
    5021       49888 :     APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
    5022       24944 :     if (VT.isInteger())
    5023       22666 :       return DAG.getConstant(Val, dl, VT);
    5024        4556 :     return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
    5025        2278 :                              VT);
    5026             :   }
    5027             : 
    5028             :   assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
    5029          34 :   EVT IntVT = VT.getScalarType();
    5030          34 :   if (!IntVT.isInteger())
    5031           1 :     IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
    5032             : 
    5033          34 :   Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
    5034          34 :   if (NumBits > 8) {
    5035             :     // Use a multiplication with 0x010101... to extend the input to the
    5036             :     // required length.
    5037          36 :     APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
    5038          18 :     Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
    5039          36 :                         DAG.getConstant(Magic, dl, IntVT));
    5040             :   }
    5041             : 
    5042          34 :   if (VT != Value.getValueType() && !VT.isInteger())
    5043           1 :     Value = DAG.getBitcast(VT.getScalarType(), Value);
    5044          34 :   if (VT != Value.getValueType())
    5045          18 :     Value = DAG.getSplatBuildVector(VT, dl, Value);
    5046             : 
    5047          34 :   return Value;
    5048             : }
    5049             : 
    5050             : /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
    5051             : /// used when a memcpy is turned into a memset when the source is a constant
    5052             : /// string ptr.
    5053         367 : static SDValue getMemsetStringVal(EVT VT, const SDLoc &dl, SelectionDAG &DAG,
    5054             :                                   const TargetLowering &TLI,
    5055             :                                   const ConstantDataArraySlice &Slice) {
    5056             :   // Handle vector with all elements zero.
    5057         367 :   if (Slice.Array == nullptr) {
    5058          45 :     if (VT.isInteger())
    5059          42 :       return DAG.getConstant(0, dl, VT);
    5060             :     else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
    5061           3 :       return DAG.getConstantFP(0.0, dl, VT);
    5062           0 :     else if (VT.isVector()) {
    5063           0 :       unsigned NumElts = VT.getVectorNumElements();
    5064           0 :       MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
    5065             :       return DAG.getNode(ISD::BITCAST, dl, VT,
    5066             :                          DAG.getConstant(0, dl,
    5067           0 :                                          EVT::getVectorVT(*DAG.getContext(),
    5068           0 :                                                           EltVT, NumElts)));
    5069             :     } else
    5070           0 :       llvm_unreachable("Expected type!");
    5071             :   }
    5072             : 
    5073             :   assert(!VT.isVector() && "Can't handle vector type here!");
    5074         322 :   unsigned NumVTBits = VT.getSizeInBits();
    5075         322 :   unsigned NumVTBytes = NumVTBits / 8;
    5076         644 :   unsigned NumBytes = std::min(NumVTBytes, unsigned(Slice.Length));
    5077             : 
    5078             :   APInt Val(NumVTBits, 0);
    5079         644 :   if (DAG.getDataLayout().isLittleEndian()) {
    5080        2584 :     for (unsigned i = 0; i != NumBytes; ++i)
    5081        2262 :       Val |= (uint64_t)(unsigned char)Slice[i] << i*8;
    5082             :   } else {
    5083           0 :     for (unsigned i = 0; i != NumBytes; ++i)
    5084           0 :       Val |= (uint64_t)(unsigned char)Slice[i] << (NumVTBytes-i-1)*8;
    5085             :   }
    5086             : 
    5087             :   // If the "cost" of materializing the integer immediate is less than the cost
    5088             :   // of a load, then it is cost effective to turn the load into the immediate.
    5089         322 :   Type *Ty = VT.getTypeForEVT(*DAG.getContext());
    5090         322 :   if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
    5091         307 :     return DAG.getConstant(Val, dl, VT);
    5092          15 :   return SDValue(nullptr, 0);
    5093             : }
    5094             : 
    5095       55677 : SDValue SelectionDAG::getMemBasePlusOffset(SDValue Base, unsigned Offset,
    5096             :                                            const SDLoc &DL) {
    5097      111354 :   EVT VT = Base.getValueType();
    5098       55677 :   return getNode(ISD::ADD, DL, VT, Base, getConstant(Offset, DL, VT));
    5099             : }
    5100             : 
    5101             : /// Returns true if memcpy source is constant data.
    5102        2543 : static bool isMemSrcFromConstant(SDValue Src, ConstantDataArraySlice &Slice) {
    5103             :   uint64_t SrcDelta = 0;
    5104             :   GlobalAddressSDNode *G = nullptr;
    5105        2543 :   if (Src.getOpcode() == ISD::GlobalAddress)
    5106             :     G = cast<GlobalAddressSDNode>(Src);
    5107         149 :   else if (Src.getOpcode() == ISD::ADD &&
    5108        1887 :            Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
    5109          10 :            Src.getOperand(1).getOpcode() == ISD::Constant) {
    5110             :     G = cast<GlobalAddressSDNode>(Src.getOperand(0));
    5111           9 :     SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
    5112             :   }
    5113         824 :   if (!G)
    5114             :     return false;
    5115             : 
    5116         824 :   return getConstantDataArrayInfo(G->getGlobal(), Slice, 8,
    5117        1648 :                                   SrcDelta + G->getOffset());
    5118             : }
    5119             : 
    5120             : /// Determines the optimal series of memory ops to replace the memset / memcpy.
    5121             : /// Return true if the number of memory ops is below the threshold (Limit).
    5122             : /// It returns the types of the sequence of memory ops to perform
    5123             : /// memset / memcpy by reference.
    5124       27028 : static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
    5125             :                                      unsigned Limit, uint64_t Size,
    5126             :                                      unsigned DstAlign, unsigned SrcAlign,
    5127             :                                      bool IsMemset,
    5128             :                                      bool ZeroMemset,
    5129             :                                      bool MemcpyStrSrc,
    5130             :                                      bool AllowOverlap,
    5131             :                                      unsigned DstAS, unsigned SrcAS,
    5132             :                                      SelectionDAG &DAG,
    5133             :                                      const TargetLowering &TLI) {
    5134             :   assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
    5135             :          "Expecting memcpy / memset source to meet alignment requirement!");
    5136             :   // If 'SrcAlign' is zero, that means the memory operation does not need to
    5137             :   // load the value, i.e. memset or memcpy from constant string. Otherwise,
    5138             :   // it's the inferred alignment of the source. 'DstAlign', on the other hand,
    5139             :   // is the specified alignment of the memory operation. If it is zero, that
    5140             :   // means it's possible to change the alignment of the destination.
    5141             :   // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
    5142             :   // not need to be loaded.
    5143             :   EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
    5144             :                                    IsMemset, ZeroMemset, MemcpyStrSrc,
    5145       27028 :                                    DAG.getMachineFunction());
    5146             : 
    5147             :   if (VT == MVT::Other) {
    5148             :     // Use the largest integer type whose alignment constraints are satisfied.
    5149             :     // We only need to check DstAlign here as SrcAlign is always greater or
    5150             :     // equal to DstAlign (or zero).
    5151         490 :     VT = MVT::i64;
    5152        1749 :     while (DstAlign && DstAlign < VT.getSizeInBits() / 8 &&
    5153         597 :            !TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign))
    5154         331 :       VT = (MVT::SimpleValueType)(VT.getSimpleVT().SimpleTy - 1);
    5155             :     assert(VT.isInteger());
    5156             : 
    5157             :     // Find the largest legal integer type.
    5158             :     MVT LVT = MVT::i64;
    5159         338 :     while (!TLI.isTypeLegal(LVT))
    5160         338 :       LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
    5161             :     assert(LVT.isInteger());
    5162             : 
    5163             :     // If the type we've chosen is larger than the largest legal integer type
    5164             :     // then use that instead.
    5165         490 :     if (VT.bitsGT(LVT))
    5166          67 :       VT = LVT;
    5167             :   }
    5168             : 
    5169             :   unsigned NumMemOps = 0;
    5170      157204 :   while (Size != 0) {
    5171       66417 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5172       71645 :     while (VTSize > Size) {
    5173             :       // For now, only use non-vector load / store's for the left-over pieces.
    5174        2614 :       EVT NewVT = VT;
    5175             :       unsigned NewVTSize;
    5176             : 
    5177             :       bool Found = false;
    5178        2614 :       if (VT.isVector() || VT.isFloatingPoint()) {
    5179        1801 :         NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
    5180        1079 :         if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
    5181        1079 :             TLI.isSafeMemOpType(NewVT.getSimpleVT()))
    5182             :           Found = true;
    5183             :         else if (NewVT == MVT::i64 &&
    5184         664 :                  TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
    5185        1387 :                  TLI.isSafeMemOpType(MVT::f64)) {
    5186             :           // i64 is usually not legal on 32-bit targets, but f64 may be.
    5187         663 :           NewVT = MVT::f64;
    5188             :           Found = true;
    5189             :         }
    5190             :       }
    5191             : 
    5192             :       if (!Found) {
    5193             :         do {
    5194         872 :           NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
    5195             :           if (NewVT == MVT::i8)
    5196             :             break;
    5197         717 :         } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
    5198             :       }
    5199        2614 :       NewVTSize = NewVT.getSizeInBits() / 8;
    5200             : 
    5201             :       // If the new VT cannot cover all of the remaining bits, then consider
    5202             :       // issuing a (or a pair of) unaligned and overlapping load / store.
    5203             :       // FIXME: Only does this for 64-bit or more since we don't have proper
    5204             :       // cost model for unaligned load / store.
    5205             :       bool Fast;
    5206        4946 :       if (NumMemOps && AllowOverlap &&
    5207        2168 :           VTSize >= 8 && NewVTSize < Size &&
    5208        2836 :           TLI.allowsMisalignedMemoryAccesses(VT, DstAS, DstAlign, &Fast) && Fast)
    5209         102 :         VTSize = Size;
    5210             :       else {
    5211        2512 :         VT = NewVT;
    5212             :         VTSize = NewVTSize;
    5213             :       }
    5214             :     }
    5215             : 
    5216       66417 :     if (++NumMemOps > Limit)
    5217             :       return false;
    5218             : 
    5219       65088 :     MemOps.push_back(VT);
    5220       65088 :     Size -= VTSize;
    5221             :   }
    5222             : 
    5223             :   return true;
    5224             : }
    5225             : 
    5226       27028 : static bool shouldLowerMemFuncForSize(const MachineFunction &MF) {
    5227             :   // On Darwin, -Os means optimize for size without hurting performance, so
    5228             :   // only really optimize for size when -Oz (MinSize) is used.
    5229       27028 :   if (MF.getTarget().getTargetTriple().isOSDarwin())
    5230         332 :     return MF.getFunction().optForMinSize();
    5231       26862 :   return MF.getFunction().optForSize();
    5232             : }
    5233             : 
    5234          38 : static void chainLoadsAndStoresForMemcpy(SelectionDAG &DAG, const SDLoc &dl,
    5235             :                           SmallVector<SDValue, 32> &OutChains, unsigned From,
    5236             :                           unsigned To, SmallVector<SDValue, 16> &OutLoadChains,
    5237             :                           SmallVector<SDValue, 16> &OutStoreChains) {
    5238             :   assert(OutLoadChains.size() && "Missing loads in memcpy inlining");
    5239             :   assert(OutStoreChains.size() && "Missing stores in memcpy inlining");
    5240             :   SmallVector<SDValue, 16> GluedLoadChains;
    5241         188 :   for (unsigned i = From; i < To; ++i) {
    5242         150 :     OutChains.push_back(OutLoadChains[i]);
    5243          75 :     GluedLoadChains.push_back(OutLoadChains[i]);
    5244             :   }
    5245             : 
    5246             :   // Chain for all loads.
    5247             :   SDValue LoadToken = DAG.getNode(ISD::TokenFactor, dl, MVT::Other,
    5248          38 :                                   GluedLoadChains);
    5249             : 
    5250         188 :   for (unsigned i = From; i < To; ++i) {
    5251          75 :     StoreSDNode *ST = dyn_cast<StoreSDNode>(OutStoreChains[i]);
    5252             :     SDValue NewStore = DAG.getTruncStore(LoadToken, dl, ST->getValue(),
    5253             :                                   ST->getBasePtr(), ST->getMemoryVT(),
    5254         150 :                                   ST->getMemOperand());
    5255          75 :     OutChains.push_back(NewStore);
    5256             :   }
    5257          38 : }
    5258             : 
    5259        2548 : static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
    5260             :                                        SDValue Chain, SDValue Dst, SDValue Src,
    5261             :                                        uint64_t Size, unsigned Align,
    5262             :                                        bool isVol, bool AlwaysInline,
    5263             :                                        MachinePointerInfo DstPtrInfo,
    5264             :                                        MachinePointerInfo SrcPtrInfo) {
    5265             :   // Turn a memcpy of undef to nop.
    5266        2548 :   if (Src.isUndef())
    5267           5 :     return Chain;
    5268             : 
    5269             :   // Expand memcpy to a series of load and store ops if the size operand falls
    5270             :   // below a certain threshold.
    5271             :   // TODO: In the AlwaysInline case, if the size is big then generate a loop
    5272             :   // rather than maybe a humongous number of loads and stores.
    5273        2543 :   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
    5274        2543 :   const DataLayout &DL = DAG.getDataLayout();
    5275        2543 :   LLVMContext &C = *DAG.getContext();
    5276             :   std::vector<EVT> MemOps;
    5277             :   bool DstAlignCanChange = false;
    5278        2543 :   MachineFunction &MF = DAG.getMachineFunction();
    5279        2543 :   MachineFrameInfo &MFI = MF.getFrameInfo();
    5280        2543 :   bool OptSize = shouldLowerMemFuncForSize(MF);
    5281             :   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
    5282        1107 :   if (FI && !MFI.isFixedObjectIndex(FI->getIndex()))
    5283             :     DstAlignCanChange = true;
    5284        2543 :   unsigned SrcAlign = DAG.InferPtrAlignment(Src);
    5285        2543 :   if (Align > SrcAlign)
    5286             :     SrcAlign = Align;
    5287             :   ConstantDataArraySlice Slice;
    5288        2543 :   bool CopyFromConstant = isMemSrcFromConstant(Src, Slice);
    5289        2543 :   bool isZeroConstant = CopyFromConstant && Slice.Array == nullptr;
    5290        2543 :   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
    5291             : 
    5292        2543 :   if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
    5293             :                                 (DstAlignCanChange ? 0 : Align),
    5294             :                                 (isZeroConstant ? 0 : SrcAlign),
    5295             :                                 false, false, CopyFromConstant, true,
    5296             :                                 DstPtrInfo.getAddrSpace(),
    5297             :                                 SrcPtrInfo.getAddrSpace(),
    5298             :                                 DAG, TLI))
    5299         284 :     return SDValue();
    5300             : 
    5301        2259 :   if (DstAlignCanChange) {
    5302        1077 :     Type *Ty = MemOps[0].getTypeForEVT(C);
    5303        1077 :     unsigned NewAlign = (unsigned)DL.getABITypeAlignment(Ty);
    5304             : 
    5305             :     // Don't promote to an alignment that would require dynamic stack
    5306             :     // realignment.
    5307        1077 :     const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
    5308        1077 :     if (!TRI->needsStackRealignment(MF))
    5309        1030 :       while (NewAlign > Align &&
    5310         653 :              DL.exceedsNaturalStackAlignment(NewAlign))
    5311           3 :           NewAlign /= 2;
    5312             : 
    5313        1077 :     if (NewAlign > Align) {
    5314             :       // Give the stack frame object a larger alignment if needed.
    5315        1402 :       if (MFI.getObjectAlignment(FI->getIndex()) < NewAlign)
    5316             :         MFI.setObjectAlignment(FI->getIndex(), NewAlign);
    5317             :       Align = NewAlign;
    5318             :     }
    5319             :   }
    5320             : 
    5321             :   MachineMemOperand::Flags MMOFlags =
    5322        2259 :       isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone;
    5323             :   SmallVector<SDValue, 16> OutLoadChains;
    5324             :   SmallVector<SDValue, 16> OutStoreChains;
    5325             :   SmallVector<SDValue, 32> OutChains;
    5326        4518 :   unsigned NumMemOps = MemOps.size();
    5327             :   uint64_t SrcOff = 0, DstOff = 0;
    5328        9949 :   for (unsigned i = 0; i != NumMemOps; ++i) {
    5329        7690 :     EVT VT = MemOps[i];
    5330        3845 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5331        3845 :     SDValue Value, Store;
    5332             : 
    5333        3845 :     if (VTSize > Size) {
    5334             :       // Issuing an unaligned load / store pair  that overlaps with the previous
    5335             :       // pair. Adjust the offset accordingly.
    5336             :       assert(i == NumMemOps-1 && i != 0);
    5337          98 :       SrcOff -= VTSize - Size;
    5338             :       DstOff -= VTSize - Size;
    5339             :     }
    5340             : 
    5341        3845 :     if (CopyFromConstant &&
    5342         803 :         (isZeroConstant || (VT.isInteger() && !VT.isVector()))) {
    5343             :       // It's unlikely a store of a vector immediate can be done in a single
    5344             :       // instruction. It would require a load from a constantpool first.
    5345             :       // We only handle zero vectors here.
    5346             :       // FIXME: Handle other cases where store of vector immediate is done in
    5347             :       // a single instruction.
    5348             :       ConstantDataArraySlice SubSlice;
    5349         367 :       if (SrcOff < Slice.Length) {
    5350         323 :         SubSlice = Slice;
    5351             :         SubSlice.move(SrcOff);
    5352             :       } else {
    5353             :         // This is an out-of-bounds access and hence UB. Pretend we read zero.
    5354          44 :         SubSlice.Array = nullptr;
    5355          44 :         SubSlice.Offset = 0;
    5356          44 :         SubSlice.Length = VTSize;
    5357             :       }
    5358         367 :       Value = getMemsetStringVal(VT, dl, DAG, TLI, SubSlice);
    5359         367 :       if (Value.getNode()) {
    5360         352 :         Store = DAG.getStore(Chain, dl, Value,
    5361             :                              DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5362             :                              DstPtrInfo.getWithOffset(DstOff), Align,
    5363         704 :                              MMOFlags);
    5364         352 :         OutChains.push_back(Store);
    5365             :       }
    5366             :     }
    5367             : 
    5368        3845 :     if (!Store.getNode()) {
    5369             :       // The type might not be legal for the target.  This should only happen
    5370             :       // if the type is smaller than a legal type, as on PPC, so the right
    5371             :       // thing to do is generate a LoadExt/StoreTrunc pair.  These simplify
    5372             :       // to Load/Store if NVT==VT.
    5373             :       // FIXME does the case above also need this?
    5374        6986 :       EVT NVT = TLI.getTypeToTransformTo(C, VT);
    5375             :       assert(NVT.bitsGE(VT));
    5376             : 
    5377             :       bool isDereferenceable =
    5378        3493 :         SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
    5379             :       MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
    5380        3493 :       if (isDereferenceable)
    5381             :         SrcMMOFlags |= MachineMemOperand::MODereferenceable;
    5382             : 
    5383        3493 :       Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
    5384             :                              DAG.getMemBasePlusOffset(Src, SrcOff, dl),
    5385             :                              SrcPtrInfo.getWithOffset(SrcOff), VT,
    5386       10479 :                              MinAlign(SrcAlign, SrcOff), SrcMMOFlags);
    5387        3493 :       OutLoadChains.push_back(Value.getValue(1));
    5388             : 
    5389        3493 :       Store = DAG.getTruncStore(
    5390             :           Chain, dl, Value, DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5391        6986 :           DstPtrInfo.getWithOffset(DstOff), VT, Align, MMOFlags);
    5392        3493 :       OutStoreChains.push_back(Store);
    5393             :     }
    5394        3845 :     SrcOff += VTSize;
    5395             :     DstOff += VTSize;
    5396        3845 :     Size -= VTSize;
    5397             :   }
    5398             : 
    5399        4518 :   unsigned GluedLdStLimit = MaxLdStGlue == 0 ?
    5400        2259 :                                 TLI.getMaxGluedStoresPerMemcpy() : MaxLdStGlue;
    5401        2259 :   unsigned NumLdStInMemcpy = OutStoreChains.size();
    5402             : 
    5403        2259 :   if (NumLdStInMemcpy) {
    5404             :     // It may be that memcpy might be converted to memset if it's memcpy
    5405             :     // of constants. In such a case, we won't have loads and stores, but
    5406             :     // just stores. In the absence of loads, there is nothing to gang up.
    5407        2186 :     if ((GluedLdStLimit <= 1) || !EnableMemCpyDAGOpt) {
    5408             :       // If target does not care, just leave as it.
    5409        8946 :       for (unsigned i = 0; i < NumLdStInMemcpy; ++i) {
    5410        6836 :         OutChains.push_back(OutLoadChains[i]);
    5411        3418 :         OutChains.push_back(OutStoreChains[i]);
    5412             :       }
    5413             :     } else {
    5414             :       // Ld/St less than/equal limit set by target.
    5415          38 :       if (NumLdStInMemcpy <= GluedLdStLimit) {
    5416          38 :           chainLoadsAndStoresForMemcpy(DAG, dl, OutChains, 0,
    5417             :                                         NumLdStInMemcpy, OutLoadChains,
    5418             :                                         OutStoreChains);
    5419             :       } else {
    5420           0 :         unsigned NumberLdChain =  NumLdStInMemcpy / GluedLdStLimit;
    5421           0 :         unsigned RemainingLdStInMemcpy = NumLdStInMemcpy % GluedLdStLimit;
    5422             :         unsigned GlueIter = 0;
    5423             : 
    5424           0 :         for (unsigned cnt = 0; cnt < NumberLdChain; ++cnt) {
    5425           0 :           unsigned IndexFrom = NumLdStInMemcpy - GlueIter - GluedLdStLimit;
    5426             :           unsigned IndexTo   = NumLdStInMemcpy - GlueIter;
    5427             : 
    5428           0 :           chainLoadsAndStoresForMemcpy(DAG, dl, OutChains, IndexFrom, IndexTo,
    5429             :                                        OutLoadChains, OutStoreChains);
    5430           0 :           GlueIter += GluedLdStLimit;
    5431             :         }
    5432             : 
    5433             :         // Residual ld/st.
    5434           0 :         if (RemainingLdStInMemcpy) {
    5435           0 :           chainLoadsAndStoresForMemcpy(DAG, dl, OutChains, 0,
    5436             :                                         RemainingLdStInMemcpy, OutLoadChains,
    5437             :                                         OutStoreChains);
    5438             :         }
    5439             :       }
    5440             :     }
    5441             :   }
    5442        2259 :   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
    5443             : }
    5444             : 
    5445          84 : static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, const SDLoc &dl,
    5446             :                                         SDValue Chain, SDValue Dst, SDValue Src,
    5447             :                                         uint64_t Size, unsigned Align,
    5448             :                                         bool isVol, bool AlwaysInline,
    5449             :                                         MachinePointerInfo DstPtrInfo,
    5450             :                                         MachinePointerInfo SrcPtrInfo) {
    5451             :   // Turn a memmove of undef to nop.
    5452         168 :   if (Src.isUndef())
    5453           0 :     return Chain;
    5454             : 
    5455             :   // Expand memmove to a series of load and store ops if the size operand falls
    5456             :   // below a certain threshold.
    5457          84 :   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
    5458          84 :   const DataLayout &DL = DAG.getDataLayout();
    5459          84 :   LLVMContext &C = *DAG.getContext();
    5460             :   std::vector<EVT> MemOps;
    5461             :   bool DstAlignCanChange = false;
    5462          84 :   MachineFunction &MF = DAG.getMachineFunction();
    5463          84 :   MachineFrameInfo &MFI = MF.getFrameInfo();
    5464          84 :   bool OptSize = shouldLowerMemFuncForSize(MF);
    5465             :   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
    5466           1 :   if (FI && !MFI.isFixedObjectIndex(FI->getIndex()))
    5467             :     DstAlignCanChange = true;
    5468          84 :   unsigned SrcAlign = DAG.InferPtrAlignment(Src);
    5469          84 :   if (Align > SrcAlign)
    5470             :     SrcAlign = Align;
    5471          84 :   unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
    5472             : 
    5473          84 :   if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
    5474             :                                 (DstAlignCanChange ? 0 : Align), SrcAlign,
    5475             :                                 false, false, false, false,
    5476             :                                 DstPtrInfo.getAddrSpace(),
    5477             :                                 SrcPtrInfo.getAddrSpace(),
    5478             :                                 DAG, TLI))
    5479          57 :     return SDValue();
    5480             : 
    5481          27 :   if (DstAlignCanChange) {
    5482           1 :     Type *Ty = MemOps[0].getTypeForEVT(C);
    5483           1 :     unsigned NewAlign = (unsigned)DL.getABITypeAlignment(Ty);
    5484           1 :     if (NewAlign > Align) {
    5485             :       // Give the stack frame object a larger alignment if needed.
    5486           2 :       if (MFI.getObjectAlignment(FI->getIndex()) < NewAlign)
    5487             :         MFI.setObjectAlignment(FI->getIndex(), NewAlign);
    5488             :       Align = NewAlign;
    5489             :     }
    5490             :   }
    5491             : 
    5492             :   MachineMemOperand::Flags MMOFlags =
    5493          27 :       isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone;
    5494             :   uint64_t SrcOff = 0, DstOff = 0;
    5495             :   SmallVector<SDValue, 8> LoadValues;
    5496             :   SmallVector<SDValue, 8> LoadChains;
    5497             :   SmallVector<SDValue, 8> OutChains;
    5498          54 :   unsigned NumMemOps = MemOps.size();
    5499          85 :   for (unsigned i = 0; i < NumMemOps; i++) {
    5500          58 :     EVT VT = MemOps[i];
    5501          29 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5502          29 :     SDValue Value;
    5503             : 
    5504             :     bool isDereferenceable =
    5505          29 :       SrcPtrInfo.getWithOffset(SrcOff).isDereferenceable(VTSize, C, DL);
    5506             :     MachineMemOperand::Flags SrcMMOFlags = MMOFlags;
    5507          29 :     if (isDereferenceable)
    5508             :       SrcMMOFlags |= MachineMemOperand::MODereferenceable;
    5509             : 
    5510          29 :     Value =
    5511          58 :         DAG.getLoad(VT, dl, Chain, DAG.getMemBasePlusOffset(Src, SrcOff, dl),
    5512          58 :                     SrcPtrInfo.getWithOffset(SrcOff), SrcAlign, SrcMMOFlags);
    5513          29 :     LoadValues.push_back(Value);
    5514          29 :     LoadChains.push_back(Value.getValue(1));
    5515          29 :     SrcOff += VTSize;
    5516             :   }
    5517          27 :   Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
    5518             :   OutChains.clear();
    5519          85 :   for (unsigned i = 0; i < NumMemOps; i++) {
    5520          58 :     EVT VT = MemOps[i];
    5521          29 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5522          29 :     SDValue Store;
    5523             : 
    5524          29 :     Store = DAG.getStore(Chain, dl, LoadValues[i],
    5525             :                          DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5526          58 :                          DstPtrInfo.getWithOffset(DstOff), Align, MMOFlags);
    5527          29 :     OutChains.push_back(Store);
    5528          29 :     DstOff += VTSize;
    5529             :   }
    5530             : 
    5531          27 :   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
    5532             : }
    5533             : 
    5534             : /// Lower the call to 'memset' intrinsic function into a series of store
    5535             : /// operations.
    5536             : ///
    5537             : /// \param DAG Selection DAG where lowered code is placed.
    5538             : /// \param dl Link to corresponding IR location.
    5539             : /// \param Chain Control flow dependency.
    5540             : /// \param Dst Pointer to destination memory location.
    5541             : /// \param Src Value of byte to write into the memory.
    5542             : /// \param Size Number of bytes to write.
    5543             : /// \param Align Alignment of the destination in bytes.
    5544             : /// \param isVol True if destination is volatile.
    5545             : /// \param DstPtrInfo IR information on the memory pointer.
    5546             : /// \returns New head in the control flow, if lowering was successful, empty
    5547             : /// SDValue otherwise.
    5548             : ///
    5549             : /// The function tries to replace 'llvm.memset' intrinsic with several store
    5550             : /// operations and value calculation code. This is usually profitable for small
    5551             : /// memory size.
    5552       24402 : static SDValue getMemsetStores(SelectionDAG &DAG, const SDLoc &dl,
    5553             :                                SDValue Chain, SDValue Dst, SDValue Src,
    5554             :                                uint64_t Size, unsigned Align, bool isVol,
    5555             :                                MachinePointerInfo DstPtrInfo) {
    5556             :   // Turn a memset of undef to nop.
    5557       24402 :   if (Src.isUndef())
    5558           1 :     return Chain;
    5559             : 
    5560             :   // Expand memset to a series of load/store ops if the size operand
    5561             :   // falls below a certain threshold.
    5562       24401 :   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
    5563             :   std::vector<EVT> MemOps;
    5564             :   bool DstAlignCanChange = false;
    5565       24401 :   MachineFunction &MF = DAG.getMachineFunction();
    5566       24401 :   MachineFrameInfo &MFI = MF.getFrameInfo();
    5567       24401 :   bool OptSize = shouldLowerMemFuncForSize(MF);
    5568             :   FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
    5569         223 :   if (FI && !MFI.isFixedObjectIndex(FI->getIndex()))
    5570             :     DstAlignCanChange = true;
    5571             :   bool IsZeroVal =
    5572       48704 :     isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
    5573       48802 :   if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
    5574             :                                 Size, (DstAlignCanChange ? 0 : Align), 0,
    5575             :                                 true, IsZeroVal, false, true,
    5576             :                                 DstPtrInfo.getAddrSpace(), ~0u,
    5577             :                                 DAG, TLI))
    5578         988 :     return SDValue();
    5579             : 
    5580       23413 :   if (DstAlignCanChange) {
    5581         154 :     Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
    5582         308 :     unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
    5583         154 :     if (NewAlign > Align) {
    5584             :       // Give the stack frame object a larger alignment if needed.
    5585         272 :       if (MFI.getObjectAlignment(FI->getIndex()) < NewAlign)
    5586             :         MFI.setObjectAlignment(FI->getIndex(), NewAlign);
    5587             :       Align = NewAlign;
    5588             :     }
    5589             :   }
    5590             : 
    5591             :   SmallVector<SDValue, 8> OutChains;
    5592             :   uint64_t DstOff = 0;
    5593       46826 :   unsigned NumMemOps = MemOps.size();
    5594             : 
    5595             :   // Find the largest store and generate the bit pattern for it.
    5596       23413 :   EVT LargestVT = MemOps[0];
    5597       69103 :   for (unsigned i = 1; i < NumMemOps; i++)
    5598       45690 :     if (MemOps[i].bitsGT(LargestVT))
    5599           0 :       LargestVT = MemOps[i];
    5600       23413 :   SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
    5601             : 
    5602      115929 :   for (unsigned i = 0; i < NumMemOps; i++) {
    5603       92516 :     EVT VT = MemOps[i];
    5604       46258 :     unsigned VTSize = VT.getSizeInBits() / 8;
    5605       46258 :     if (VTSize > Size) {
    5606             :       // Issuing an unaligned load / store pair  that overlaps with the previous
    5607             :       // pair. Adjust the offset accordingly.
    5608             :       assert(i == NumMemOps-1 && i != 0);
    5609           4 :       DstOff -= VTSize - Size;
    5610             :     }
    5611             : 
    5612             :     // If this store is smaller than the largest store see whether we can get
    5613             :     // the smaller value for free with a truncate.
    5614       46258 :     SDValue Value = MemSetValue;
    5615       46258 :     if (VT.bitsLT(LargestVT)) {
    5616        1636 :       if (!LargestVT.isVector() && !VT.isVector() &&
    5617          30 :           TLI.isTruncateFree(LargestVT, VT))
    5618          11 :         Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
    5619             :       else
    5620        1565 :         Value = getMemsetValue(Src, VT, DAG, dl);
    5621             :     }
    5622             :     assert(Value.getValueType() == VT && "Value with wrong type.");
    5623             :     SDValue Store = DAG.getStore(
    5624             :         Chain, dl, Value, DAG.getMemBasePlusOffset(Dst, DstOff, dl),
    5625             :         DstPtrInfo.getWithOffset(DstOff), Align,
    5626       46258 :         isVol ? MachineMemOperand::MOVolatile : MachineMemOperand::MONone);
    5627       46258 :     OutChains.push_back(Store);
    5628       46258 :     DstOff += VT.getSizeInBits() / 8;
    5629       46258 :     Size -= VTSize;
    5630             :   }
    5631             : 
    5632       23413 :   return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
    5633             : }
    5634             : 
    5635        2391 : static void checkAddrSpaceIsValidForLibcall(const TargetLowering *TLI,
    5636             :                                             unsigned AS) {
    5637             :   // Lowering memcpy / memset / memmove intrinsics to calls is only valid if all
    5638             :   // pointer operands can be losslessly bitcasted to pointers of address space 0
    5639        2391 :   if (AS != 0 && !TLI->isNoopAddrSpaceCast(AS, 0)) {
    5640           0 :     report_fatal_error("cannot lower memory intrinsic in address space " +
    5641             :                        Twine(AS));
    5642             :   }
    5643        2391 : }
    5644             : 
    5645        2832 : SDValue SelectionDAG::getMemcpy(SDValue Chain, const SDLoc &dl, SDValue Dst,
    5646             :                                 SDValue Src, SDValue Size, unsigned Align,
    5647             :                                 bool isVol, bool AlwaysInline, bool isTailCall,
    5648             :                                 MachinePointerInfo DstPtrInfo,
    5649             :                                 MachinePointerInfo SrcPtrInfo) {
    5650             :   assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
    5651             : 
    5652             :   // Check to see if we should lower the memcpy to loads and stores first.
    5653             :   // For cases within the target-specified limits, this is the best choice.
    5654             :   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
    5655             :   if (ConstantSize) {
    5656             :     // Memcpy with size zero? Just return the original chain.
    5657        5100 :     if (ConstantSize->isNullValue())
    5658        2271 :       return Chain;
    5659             : 
    5660             :     SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
    5661             :                                              ConstantSize->getZExtValue(),Align,
    5662        5090 :                                 isVol, false, DstPtrInfo, SrcPtrInfo);
    5663        2545 :     if (Result.getNode())
    5664        2261 :       return Result;
    5665             :   }
    5666             : 
    5667             :   // Then check to see if we should lower the memcpy with target-specific
    5668             :   // code. If the target chooses to do this, this is the next best.
    5669         566 :   if (TSI) {
    5670             :     SDValue Result = TSI->EmitTargetCodeForMemcpy(
    5671             :         *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
    5672         566 :         DstPtrInfo, SrcPtrInfo);
    5673         566 :     if (Result.getNode())
    5674         148 :       return Result;
    5675             :   }
    5676             : 
    5677             :   // If we really need inline code and the target declined to provide it,
    5678             :   // use a (potentially long) sequence of loads and stores.
    5679         418 :   if (AlwaysInline) {
    5680             :     assert(ConstantSize && "AlwaysInline requires a constant size!");
    5681             :     return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
    5682             :                                    ConstantSize->getZExtValue(), Align, isVol,
    5683           6 :                                    true, DstPtrInfo, SrcPtrInfo);
    5684             :   }
    5685             : 
    5686         415 :   checkAddrSpaceIsValidForLibcall(TLI, DstPtrInfo.getAddrSpace());
    5687         415 :   checkAddrSpaceIsValidForLibcall(TLI, SrcPtrInfo.getAddrSpace());
    5688             : 
    5689             :   // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
    5690             :   // memcpy is not guaranteed to be safe. libc memcpys aren't required to
    5691             :   // respect volatile, so they may do things like read or write memory
    5692             :   // beyond the given memory regions. But fixing this isn't easy, and most
    5693             :   // people don't care.
    5694             : 
    5695             :   // Emit a library call.
    5696             :   TargetLowering::ArgListTy Args;
    5697             :   TargetLowering::ArgListEntry Entry;
    5698         830 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5699         415 :   Entry.Node = Dst; Args.push_back(Entry);
    5700         415 :   Entry.Node = Src; Args.push_back(Entry);
    5701         415 :   Entry.Node = Size; Args.push_back(Entry);
    5702             :   // FIXME: pass in SDLoc
    5703         830 :   TargetLowering::CallLoweringInfo CLI(*this);
    5704             :   CLI.setDebugLoc(dl)
    5705             :       .setChain(Chain)
    5706         415 :       .setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
    5707        1245 :                     Dst.getValueType().getTypeForEVT(*getContext()),
    5708         415 :                     getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
    5709             :                                       TLI->getPointerTy(getDataLayout())),
    5710        2075 :                     std::move(Args))
    5711             :       .setDiscardResult()
    5712             :       .setTailCall(isTailCall);
    5713             : 
    5714         415 :   std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
    5715         415 :   return CallResult.second;
    5716             : }
    5717             : 
    5718           6 : SDValue SelectionDAG::getAtomicMemcpy(SDValue Chain, const SDLoc &dl,
    5719             :                                       SDValue Dst, unsigned DstAlign,
    5720             :                                       SDValue Src, unsigned SrcAlign,
    5721             :                                       SDValue Size, Type *SizeTy,
    5722             :                                       unsigned ElemSz, bool isTailCall,
    5723             :                                       MachinePointerInfo DstPtrInfo,
    5724             :                                       MachinePointerInfo SrcPtrInfo) {
    5725             :   // Emit a library call.
    5726             :   TargetLowering::ArgListTy Args;
    5727             :   TargetLowering::ArgListEntry Entry;
    5728          12 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5729           6 :   Entry.Node = Dst;
    5730           6 :   Args.push_back(Entry);
    5731             : 
    5732           6 :   Entry.Node = Src;
    5733           6 :   Args.push_back(Entry);
    5734             : 
    5735           6 :   Entry.Ty = SizeTy;
    5736           6 :   Entry.Node = Size;
    5737           6 :   Args.push_back(Entry);
    5738             : 
    5739             :   RTLIB::Libcall LibraryCall =
    5740           6 :       RTLIB::getMEMCPY_ELEMENT_UNORDERED_ATOMIC(ElemSz);
    5741           6 :   if (LibraryCall == RTLIB::UNKNOWN_LIBCALL)
    5742           0 :     report_fatal_error("Unsupported element size");
    5743             : 
    5744          12 :   TargetLowering::CallLoweringInfo CLI(*this);
    5745             :   CLI.setDebugLoc(dl)
    5746             :       .setChain(Chain)
    5747           6 :       .setLibCallee(TLI->getLibcallCallingConv(LibraryCall),
    5748           6 :                     Type::getVoidTy(*getContext()),
    5749           6 :                     getExternalSymbol(TLI->getLibcallName(LibraryCall),
    5750             :                                       TLI->getPointerTy(getDataLayout())),
    5751          30 :                     std::move(Args))
    5752             :       .setDiscardResult()
    5753             :       .setTailCall(isTailCall);
    5754             : 
    5755           6 :   std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
    5756          12 :   return CallResult.second;
    5757             : }
    5758             : 
    5759         385 : SDValue SelectionDAG::getMemmove(SDValue Chain, const SDLoc &dl, SDValue Dst,
    5760             :                                  SDValue Src, SDValue Size, unsigned Align,
    5761             :                                  bool isVol, bool isTailCall,
    5762             :                                  MachinePointerInfo DstPtrInfo,
    5763             :                                  MachinePointerInfo SrcPtrInfo) {
    5764             :   assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
    5765             : 
    5766             :   // Check to see if we should lower the memmove to loads and stores first.
    5767             :   // For cases within the target-specified limits, this is the best choice.
    5768             :   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
    5769             :   if (ConstantSize) {
    5770             :     // Memmove with size zero? Just return the original chain.
    5771         168 :     if (ConstantSize->isNullValue())
    5772          27 :       return Chain;
    5773             : 
    5774             :     SDValue Result =
    5775             :       getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
    5776             :                                ConstantSize->getZExtValue(), Align, isVol,
    5777         168 :                                false, DstPtrInfo, SrcPtrInfo);
    5778          84 :     if (Result.getNode())
    5779          27 :       return Result;
    5780             :   }
    5781             : 
    5782             :   // Then check to see if we should lower the memmove with target-specific
    5783             :   // code. If the target chooses to do this, this is the next best.
    5784         358 :   if (TSI) {
    5785             :     SDValue Result = TSI->EmitTargetCodeForMemmove(
    5786         358 :         *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
    5787         358 :     if (Result.getNode())
    5788          48 :       return Result;
    5789             :   }
    5790             : 
    5791         310 :   checkAddrSpaceIsValidForLibcall(TLI, DstPtrInfo.getAddrSpace());
    5792         310 :   checkAddrSpaceIsValidForLibcall(TLI, SrcPtrInfo.getAddrSpace());
    5793             : 
    5794             :   // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
    5795             :   // not be safe.  See memcpy above for more details.
    5796             : 
    5797             :   // Emit a library call.
    5798             :   TargetLowering::ArgListTy Args;
    5799             :   TargetLowering::ArgListEntry Entry;
    5800         620 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5801         310 :   Entry.Node = Dst; Args.push_back(Entry);
    5802         310 :   Entry.Node = Src; Args.push_back(Entry);
    5803         310 :   Entry.Node = Size; Args.push_back(Entry);
    5804             :   // FIXME:  pass in SDLoc
    5805         620 :   TargetLowering::CallLoweringInfo CLI(*this);
    5806             :   CLI.setDebugLoc(dl)
    5807             :       .setChain(Chain)
    5808         310 :       .setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
    5809         930 :                     Dst.getValueType().getTypeForEVT(*getContext()),
    5810         310 :                     getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
    5811             :                                       TLI->getPointerTy(getDataLayout())),
    5812        1550 :                     std::move(Args))
    5813             :       .setDiscardResult()
    5814             :       .setTailCall(isTailCall);
    5815             : 
    5816         310 :   std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
    5817         310 :   return CallResult.second;
    5818             : }
    5819             : 
    5820           6 : SDValue SelectionDAG::getAtomicMemmove(SDValue Chain, const SDLoc &dl,
    5821             :                                        SDValue Dst, unsigned DstAlign,
    5822             :                                        SDValue Src, unsigned SrcAlign,
    5823             :                                        SDValue Size, Type *SizeTy,
    5824             :                                        unsigned ElemSz, bool isTailCall,
    5825             :                                        MachinePointerInfo DstPtrInfo,
    5826             :                                        MachinePointerInfo SrcPtrInfo) {
    5827             :   // Emit a library call.
    5828             :   TargetLowering::ArgListTy Args;
    5829             :   TargetLowering::ArgListEntry Entry;
    5830          12 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5831           6 :   Entry.Node = Dst;
    5832           6 :   Args.push_back(Entry);
    5833             : 
    5834           6 :   Entry.Node = Src;
    5835           6 :   Args.push_back(Entry);
    5836             : 
    5837           6 :   Entry.Ty = SizeTy;
    5838           6 :   Entry.Node = Size;
    5839           6 :   Args.push_back(Entry);
    5840             : 
    5841             :   RTLIB::Libcall LibraryCall =
    5842           6 :       RTLIB::getMEMMOVE_ELEMENT_UNORDERED_ATOMIC(ElemSz);
    5843           6 :   if (LibraryCall == RTLIB::UNKNOWN_LIBCALL)
    5844           0 :     report_fatal_error("Unsupported element size");
    5845             : 
    5846          12 :   TargetLowering::CallLoweringInfo CLI(*this);
    5847             :   CLI.setDebugLoc(dl)
    5848             :       .setChain(Chain)
    5849           6 :       .setLibCallee(TLI->getLibcallCallingConv(LibraryCall),
    5850           6 :                     Type::getVoidTy(*getContext()),
    5851           6 :                     getExternalSymbol(TLI->getLibcallName(LibraryCall),
    5852             :                                       TLI->getPointerTy(getDataLayout())),
    5853          30 :                     std::move(Args))
    5854             :       .setDiscardResult()
    5855             :       .setTailCall(isTailCall);
    5856             : 
    5857           6 :   std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
    5858          12 :   return CallResult.second;
    5859             : }
    5860             : 
    5861       24536 : SDValue SelectionDAG::getMemset(SDValue Chain, const SDLoc &dl, SDValue Dst,
    5862             :                                 SDValue Src, SDValue Size, unsigned Align,
    5863             :                                 bool isVol, bool isTailCall,
    5864             :                                 MachinePointerInfo DstPtrInfo) {
    5865             :   assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
    5866             : 
    5867             :   // Check to see if we should lower the memset to stores first.
    5868             :   // For cases within the target-specified limits, this is the best choice.
    5869             :   ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
    5870             :   if (ConstantSize) {
    5871             :     // Memset with size zero? Just return the original chain.
    5872       48820 :     if (ConstantSize->isNullValue())
    5873       23430 :       return Chain;
    5874             : 
    5875             :     SDValue Result =
    5876             :       getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
    5877       48804 :                       Align, isVol, DstPtrInfo);
    5878             : 
    5879       24402 :     if (Result.getNode())
    5880       23414 :       return Result;
    5881             :   }
    5882             : 
    5883             :   // Then check to see if we should lower the memset with target-specific
    5884             :   // code. If the target chooses to do this, this is the next best.
    5885        1114 :   if (TSI) {
    5886             :     SDValue Result = TSI->EmitTargetCodeForMemset(
    5887        1114 :         *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
    5888        1114 :     if (Result.getNode())
    5889         173 :       return Result;
    5890             :   }
    5891             : 
    5892         941 :   checkAddrSpaceIsValidForLibcall(TLI, DstPtrInfo.getAddrSpace());
    5893             : 
    5894             :   // Emit a library call.
    5895        1882 :   Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext());
    5896             :   TargetLowering::ArgListTy Args;
    5897             :   TargetLowering::ArgListEntry Entry;
    5898         941 :   Entry.Node = Dst; Entry.Ty = IntPtrTy;
    5899         941 :   Args.push_back(Entry);
    5900         941 :   Entry.Node = Src;
    5901        1882 :   Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
    5902         941 :   Args.push_back(Entry);
    5903         941 :   Entry.Node = Size;
    5904         941 :   Entry.Ty = IntPtrTy;
    5905         941 :   Args.push_back(Entry);
    5906             : 
    5907             :   // FIXME: pass in SDLoc
    5908        1882 :   TargetLowering::CallLoweringInfo CLI(*this);
    5909             :   CLI.setDebugLoc(dl)
    5910             :       .setChain(Chain)
    5911         941 :       .setLibCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
    5912        2823 :                     Dst.getValueType().getTypeForEVT(*getContext()),
    5913         941 :                     getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
    5914             :                                       TLI->getPointerTy(getDataLayout())),
    5915        4705 :                     std::move(Args))
    5916             :       .setDiscardResult()
    5917             :       .setTailCall(isTailCall);
    5918             : 
    5919         941 :   std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
    5920         941 :   return CallResult.second;
    5921             : }
    5922             : 
    5923           6 : SDValue SelectionDAG::getAtomicMemset(SDValue Chain, const SDLoc &dl,
    5924             :                                       SDValue Dst, unsigned DstAlign,
    5925             :                                       SDValue Value, SDValue Size, Type *SizeTy,
    5926             :                                       unsigned ElemSz, bool isTailCall,
    5927             :                                       MachinePointerInfo DstPtrInfo) {
    5928             :   // Emit a library call.
    5929             :   TargetLowering::ArgListTy Args;
    5930             :   TargetLowering::ArgListEntry Entry;
    5931          12 :   Entry.Ty = getDataLayout().getIntPtrType(*getContext());
    5932           6 :   Entry.Node = Dst;
    5933           6 :   Args.push_back(Entry);
    5934             : 
    5935           6 :   Entry.Ty = Type::getInt8Ty(*getContext());
    5936           6 :   Entry.Node = Value;
    5937           6 :   Args.push_back(Entry);
    5938             : 
    5939           6 :   Entry.Ty = SizeTy;
    5940           6 :   Entry.Node = Size;
    5941           6 :   Args.push_back(Entry);
    5942             : 
    5943             :   RTLIB::Libcall LibraryCall =
    5944           6 :       RTLIB::getMEMSET_ELEMENT_UNORDERED_ATOMIC(ElemSz);
    5945           6 :   if (LibraryCall == RTLIB::UNKNOWN_LIBCALL)
    5946           0 :     report_fatal_error("Unsupported element size");
    5947             : 
    5948          12 :   TargetLowering::CallLoweringInfo CLI(*this);
    5949             :   CLI.setDebugLoc(dl)
    5950             :       .setChain(Chain)
    5951           6 :       .setLibCallee(TLI->getLibcallCallingConv(LibraryCall),
    5952           6 :                     Type::getVoidTy(*getContext()),
    5953           6 :                     getExternalSymbol(TLI->getLibcallName(LibraryCall),
    5954             :                                       TLI->getPointerTy(getDataLayout())),
    5955          30 :                     std::move(Args))
    5956             :       .setDiscardResult()
    5957             :       .setTailCall(isTailCall);
    5958             : 
    5959           6 :   std::pair<SDValue, SDValue> CallResult = TLI->LowerCallTo(CLI);
    5960          12 :   return CallResult.second;
    5961             : }
    5962             : 
    5963       11963 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    5964             :                                 SDVTList VTList, ArrayRef<SDValue> Ops,
    5965             :                                 MachineMemOperand *MMO) {
    5966             :   FoldingSetNodeID ID;
    5967       11963 :   ID.AddInteger(MemVT.getRawBits());
    5968       11963 :   AddNodeIDNode(ID, Opcode, VTList, Ops);
    5969       11963 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    5970       11963 :   void* IP = nullptr;
    5971       11963 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    5972           0 :     cast<AtomicSDNode>(E)->refineAlignment(MMO);
    5973           0 :     return SDValue(E, 0);
    5974             :   }
    5975             : 
    5976       11963 :   auto *N = newSDNode<AtomicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),
    5977       11963 :                                     VTList, MemVT, MMO);
    5978       11963 :   createOperands(N, Ops);
    5979             : 
    5980       11963 :   CSEMap.InsertNode(N, IP);
    5981       11963 :   InsertNode(N);
    5982       11963 :   return SDValue(N, 0);
    5983             : }
    5984             : 
    5985        1181 : SDValue SelectionDAG::getAtomicCmpSwap(
    5986             :     unsigned Opcode, const SDLoc &dl, EVT MemVT, SDVTList VTs, SDValue Chain,
    5987             :     SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
    5988             :     unsigned Alignment, AtomicOrdering SuccessOrdering,
    5989             :     AtomicOrdering FailureOrdering, SyncScope::ID SSID) {
    5990             :   assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
    5991             :          Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
    5992             :   assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
    5993             : 
    5994        1181 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    5995        1181 :     Alignment = getEVTAlignment(MemVT);
    5996             : 
    5997        1181 :   MachineFunction &MF = getMachineFunction();
    5998             : 
    5999             :   // FIXME: Volatile isn't really correct; we should keep track of atomic
    6000             :   // orderings in the memoperand.
    6001             :   auto Flags = MachineMemOperand::MOVolatile | MachineMemOperand::MOLoad |
    6002             :                MachineMemOperand::MOStore;
    6003             :   MachineMemOperand *MMO =
    6004        2362 :     MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
    6005        1181 :                             AAMDNodes(), nullptr, SSID, SuccessOrdering,
    6006        1181 :                             FailureOrdering);
    6007             : 
    6008        1181 :   return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO);
    6009             : }
    6010             : 
    6011        2957 : SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, const SDLoc &dl,
    6012             :                                        EVT MemVT, SDVTList VTs, SDValue Chain,
    6013             :                                        SDValue Ptr, SDValue Cmp, SDValue Swp,
    6014             :                                        MachineMemOperand *MMO) {
    6015             :   assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
    6016             :          Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
    6017             :   assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
    6018             : 
    6019        2957 :   SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
    6020        2957 :   return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
    6021             : }
    6022             : 
    6023        5621 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6024             :                                 SDValue Chain, SDValue Ptr, SDValue Val,
    6025             :                                 const Value *PtrVal, unsigned Alignment,
    6026             :                                 AtomicOrdering Ordering,
    6027             :                                 SyncScope::ID SSID) {
    6028        5621 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6029        4789 :     Alignment = getEVTAlignment(MemVT);
    6030             : 
    6031        5621 :   MachineFunction &MF = getMachineFunction();
    6032             :   // An atomic store does not load. An atomic load does not store.
    6033             :   // (An atomicrmw obviously both loads and stores.)
    6034             :   // For now, atomics are considered to be volatile always, and they are
    6035             :   // chained as such.
    6036             :   // FIXME: Volatile isn't really correct; we should keep track of atomic
    6037             :   // orderings in the memoperand.
    6038             :   auto Flags = MachineMemOperand::MOVolatile;
    6039        5621 :   if (Opcode != ISD::ATOMIC_STORE)
    6040             :     Flags |= MachineMemOperand::MOLoad;
    6041        5621 :   if (Opcode != ISD::ATOMIC_LOAD)
    6042             :     Flags |= MachineMemOperand::MOStore;
    6043             : 
    6044             :   MachineMemOperand *MMO =
    6045       16863 :     MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
    6046        5621 :                             MemVT.getStoreSize(), Alignment, AAMDNodes(),
    6047        5621 :                             nullptr, SSID, Ordering);
    6048             : 
    6049        5621 :   return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO);
    6050             : }
    6051             : 
    6052        7515 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6053             :                                 SDValue Chain, SDValue Ptr, SDValue Val,
    6054             :                                 MachineMemOperand *MMO) {
    6055             :   assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
    6056             :           Opcode == ISD::ATOMIC_LOAD_SUB ||
    6057             :           Opcode == ISD::ATOMIC_LOAD_AND ||
    6058             :           Opcode == ISD::ATOMIC_LOAD_CLR ||
    6059             :           Opcode == ISD::ATOMIC_LOAD_OR ||
    6060             :           Opcode == ISD::ATOMIC_LOAD_XOR ||
    6061             :           Opcode == ISD::ATOMIC_LOAD_NAND ||
    6062             :           Opcode == ISD::ATOMIC_LOAD_MIN ||
    6063             :           Opcode == ISD::ATOMIC_LOAD_MAX ||
    6064             :           Opcode == ISD::ATOMIC_LOAD_UMIN ||
    6065             :           Opcode == ISD::ATOMIC_LOAD_UMAX ||
    6066             :           Opcode == ISD::ATOMIC_SWAP ||
    6067             :           Opcode == ISD::ATOMIC_STORE) &&
    6068             :          "Invalid Atomic Op");
    6069             : 
    6070       15030 :   EVT VT = Val.getValueType();
    6071             : 
    6072        7515 :   SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
    6073       15030 :                                                getVTList(VT, MVT::Other);
    6074        7515 :   SDValue Ops[] = {Chain, Ptr, Val};
    6075        7515 :   return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
    6076             : }
    6077             : 
    6078        1491 : SDValue SelectionDAG::getAtomic(unsigned Opcode, const SDLoc &dl, EVT MemVT,
    6079             :                                 EVT VT, SDValue Chain, SDValue Ptr,
    6080             :                                 MachineMemOperand *MMO) {
    6081             :   assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
    6082             : 
    6083        1491 :   SDVTList VTs = getVTList(VT, MVT::Other);
    6084        1491 :   SDValue Ops[] = {Chain, Ptr};
    6085        1491 :   return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO);
    6086             : }
    6087             : 
    6088             : /// getMergeValues - Create a MERGE_VALUES node from the given operands.
    6089      374919 : SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, const SDLoc &dl) {
    6090      374919 :   if (Ops.size() == 1)
    6091      320573 :     return Ops[0];
    6092             : 
    6093             :   SmallVector<EVT, 4> VTs;
    6094       54346 :   VTs.reserve(Ops.size());
    6095      276096 :   for (unsigned i = 0; i < Ops.size(); ++i)
    6096      221750 :     VTs.push_back(Ops[i].getValueType());
    6097       54346 :   return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
    6098             : }
    6099             : 
    6100        8915 : SDValue SelectionDAG::getMemIntrinsicNode(
    6101             :     unsigned Opcode, const SDLoc &dl, SDVTList VTList, ArrayRef<SDValue> Ops,
    6102             :     EVT MemVT, MachinePointerInfo PtrInfo, unsigned Align,
    6103             :     MachineMemOperand::Flags Flags, unsigned Size) {
    6104        8915 :   if (Align == 0)  // Ensure that codegen never sees alignment 0
    6105        4628 :     Align = getEVTAlignment(MemVT);
    6106             : 
    6107        8915 :   if (!Size)
    6108             :     Size = MemVT.getStoreSize();
    6109             : 
    6110        8915 :   MachineFunction &MF = getMachineFunction();
    6111             :   MachineMemOperand *MMO =
    6112        8915 :     MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
    6113             : 
    6114        8915 :   return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
    6115             : }
    6116             : 
    6117       15717 : SDValue SelectionDAG::getMemIntrinsicNode(unsigned Opcode, const SDLoc &dl,
    6118             :                                           SDVTList VTList,
    6119             :                                           ArrayRef<SDValue> Ops, EVT MemVT,
    6120             :                                           MachineMemOperand *MMO) {
    6121             :   assert((Opcode == ISD::INTRINSIC_VOID ||
    6122             :           Opcode == ISD::INTRINSIC_W_CHAIN ||
    6123             :           Opcode == ISD::PREFETCH ||
    6124             :           Opcode == ISD::LIFETIME_START ||
    6125             :           Opcode == ISD::LIFETIME_END ||
    6126             :           ((int)Opcode <= std::numeric_limits<int>::max() &&
    6127             :            (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
    6128             :          "Opcode is not a memory-accessing opcode!");
    6129             : 
    6130             :   // Memoize the node unless it returns a flag.
    6131             :   MemIntrinsicSDNode *N;
    6132       15717 :   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
    6133             :     FoldingSetNodeID ID;
    6134       14756 :     AddNodeIDNode(ID, Opcode, VTList, Ops);
    6135       29512 :     ID.AddInteger(getSyntheticNodeSubclassData<MemIntrinsicSDNode>(
    6136             :         Opcode, dl.getIROrder(), VTList, MemVT, MMO));
    6137       14756 :     ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6138       14756 :     void *IP = nullptr;
    6139       14756 :     if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6140           0 :       cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
    6141           0 :       return SDValue(E, 0);
    6142             :     }
    6143             : 
    6144       29512 :     N = newSDNode<MemIntrinsicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),
    6145             :                                       VTList, MemVT, MMO);
    6146       14756 :     createOperands(N, Ops);
    6147             : 
    6148       14756 :   CSEMap.InsertNode(N, IP);
    6149             :   } else {
    6150        1922 :     N = newSDNode<MemIntrinsicSDNode>(Opcode, dl.getIROrder(), dl.getDebugLoc(),
    6151             :                                       VTList, MemVT, MMO);
    6152         961 :     createOperands(N, Ops);
    6153             :   }
    6154       15717 :   InsertNode(N);
    6155       15717 :   return SDValue(N, 0);
    6156             : }
    6157             : 
    6158             : /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
    6159             : /// MachinePointerInfo record from it.  This is particularly useful because the
    6160             : /// code generator has many cases where it doesn't bother passing in a
    6161             : /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
    6162       30352 : static MachinePointerInfo InferPointerInfo(const MachinePointerInfo &Info,
    6163             :                                            SelectionDAG &DAG, SDValue Ptr,
    6164             :                                            int64_t Offset = 0) {
    6165             :   // If this is FI+Offset, we can model it.
    6166             :   if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
    6167             :     return MachinePointerInfo::getFixedStack(DAG.getMachineFunction(),
    6168       10560 :                                              FI->getIndex(), Offset);
    6169             : 
    6170             :   // If this is (FI+Offset1)+Offset2, we can model it.
    6171             :   if (Ptr.getOpcode() != ISD::ADD ||
    6172       19792 :       !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
    6173             :       !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
    6174       17454 :     return Info;
    6175             : 
    6176        2338 :   int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
    6177             :   return MachinePointerInfo::getFixedStack(
    6178             :       DAG.getMachineFunction(), FI,
    6179        4676 :       Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
    6180             : }
    6181             : 
    6182             : /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
    6183             : /// MachinePointerInfo record from it.  This is particularly useful because the
    6184             : /// code generator has many cases where it doesn't bother passing in a
    6185             : /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
    6186       11705 : static MachinePointerInfo InferPointerInfo(const MachinePointerInfo &Info,
    6187             :                                            SelectionDAG &DAG, SDValue Ptr,
    6188             :                                            SDValue OffsetOp) {
    6189             :   // If the 'Offset' value isn't a constant, we can't handle this.
    6190             :   if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
    6191          20 :     return InferPointerInfo(Info, DAG, Ptr, OffsetNode->getSExtValue());
    6192       11695 :   if (OffsetOp.isUndef())
    6193       11695 :     return InferPointerInfo(Info, DAG, Ptr);
    6194           0 :   return Info;
    6195             : }
    6196             : 
    6197      682903 : SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
    6198             :                               EVT VT, const SDLoc &dl, SDValue Chain,
    6199             :                               SDValue Ptr, SDValue Offset,
    6200             :                               MachinePointerInfo PtrInfo, EVT MemVT,
    6201             :                               unsigned Alignment,
    6202             :                               MachineMemOperand::Flags MMOFlags,
    6203             :                               const AAMDNodes &AAInfo, const MDNode *Ranges) {
    6204             :   assert(Chain.getValueType() == MVT::Other &&
    6205             :         "Invalid chain type");
    6206      682903 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6207      110249 :     Alignment = getEVTAlignment(MemVT);
    6208             : 
    6209             :   MMOFlags |= MachineMemOperand::MOLoad;
    6210             :   assert((MMOFlags & MachineMemOperand::MOStore) == 0);
    6211             :   // If we don't have a PtrInfo, infer the trivial frame index case to simplify
    6212             :   // clients.
    6213      682903 :   if (PtrInfo.V.isNull())
    6214       11705 :     PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr, Offset);
    6215             : 
    6216      682903 :   MachineFunction &MF = getMachineFunction();
    6217      682903 :   MachineMemOperand *MMO = MF.getMachineMemOperand(
    6218      682903 :       PtrInfo, MMOFlags, MemVT.getStoreSize(), Alignment, AAInfo, Ranges);
    6219      682903 :   return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
    6220             : }
    6221             : 
    6222      914851 : SDValue SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
    6223             :                               EVT VT, const SDLoc &dl, SDValue Chain,
    6224             :                               SDValue Ptr, SDValue Offset, EVT MemVT,
    6225             :                               MachineMemOperand *MMO) {
    6226      918595 :   if (VT == MemVT) {
    6227             :     ExtType = ISD::NON_EXTLOAD;
    6228             :   } else if (ExtType == ISD::NON_EXTLOAD) {
    6229             :     assert(VT == MemVT && "Non-extending load from different memory type!");
    6230             :   } else {
    6231             :     // Extending load.
    6232             :     assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
    6233             :            "Should only be an extending load, not truncating!");
    6234             :     assert(VT.isInteger() == MemVT.isInteger() &&
    6235             :            "Cannot convert from FP to Int or Int -> FP!");
    6236             :     assert(VT.isVector() == MemVT.isVector() &&
    6237             :            "Cannot use an ext load to convert to or from a vector!");
    6238             :     assert((!VT.isVector() ||
    6239             :             VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
    6240             :            "Cannot use an ext load to change the number of vector elements!");
    6241             :   }
    6242             : 
    6243             :   bool Indexed = AM != ISD::UNINDEXED;
    6244             :   assert((Indexed || Offset.isUndef()) && "Unindexed load with an offset!");
    6245             : 
    6246             :   SDVTList VTs = Indexed ?
    6247     1830261 :     getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
    6248      914851 :   SDValue Ops[] = { Chain, Ptr, Offset };
    6249             :   FoldingSetNodeID ID;
    6250      914851 :   AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
    6251      914851 :   ID.AddInteger(MemVT.getRawBits());
    6252     1829702 :   ID.AddInteger(getSyntheticNodeSubclassData<LoadSDNode>(
    6253             :       dl.getIROrder(), VTs, AM, ExtType, MemVT, MMO));
    6254      914851 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6255      914851 :   void *IP = nullptr;
    6256      914851 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6257       23525 :     cast<LoadSDNode>(E)->refineAlignment(MMO);
    6258       23525 :     return SDValue(E, 0);
    6259             :   }
    6260      891326 :   auto *N = newSDNode<LoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
    6261      891326 :                                   ExtType, MemVT, MMO);
    6262      891326 :   createOperands(N, Ops);
    6263             : 
    6264      891326 :   CSEMap.InsertNode(N, IP);
    6265      891326 :   InsertNode(N);
    6266             :   SDValue V(N, 0);
    6267             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6268      891326 :   return V;
    6269             : }
    6270             : 
    6271      617800 : SDValue SelectionDAG::getLoad(EVT VT, const SDLoc &dl, SDValue Chain,
    6272             :                               SDValue Ptr, MachinePointerInfo PtrInfo,
    6273             :                               unsigned Alignment,
    6274             :                               MachineMemOperand::Flags MMOFlags,
    6275             :                               const AAMDNodes &AAInfo, const MDNode *Ranges) {
    6276     1235600 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6277             :   return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
    6278      617800 :                  PtrInfo, VT, Alignment, MMOFlags, AAInfo, Ranges);
    6279             : }
    6280             : 
    6281      204163 : SDValue SelectionDAG::getLoad(EVT VT, const SDLoc &dl, SDValue Chain,
    6282             :                               SDValue Ptr, MachineMemOperand *MMO) {
    6283      408326 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6284             :   return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
    6285      204163 :                  VT, MMO);
    6286             : }
    6287             : 
    6288       44309 : SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl,
    6289             :                                  EVT VT, SDValue Chain, SDValue Ptr,
    6290             :                                  MachinePointerInfo PtrInfo, EVT MemVT,
    6291             :                                  unsigned Alignment,
    6292             :                                  MachineMemOperand::Flags MMOFlags,
    6293             :                                  const AAMDNodes &AAInfo) {
    6294       88618 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6295             :   return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef, PtrInfo,
    6296       44309 :                  MemVT, Alignment, MMOFlags, AAInfo);
    6297             : }
    6298             : 
    6299       26620 : SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl,
    6300             :                                  EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT,
    6301             :                                  MachineMemOperand *MMO) {
    6302       53240 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6303             :   return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
    6304       26620 :                  MemVT, MMO);
    6305             : }
    6306             : 
    6307         559 : SDValue SelectionDAG::getIndexedLoad(SDValue OrigLoad, const SDLoc &dl,
    6308             :                                      SDValue Base, SDValue Offset,
    6309             :                                      ISD::MemIndexedMode AM) {
    6310             :   LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
    6311             :   assert(LD->getOffset().isUndef() && "Load is already a indexed load!");
    6312             :   // Don't propagate the invariant or dereferenceable flags.
    6313             :   auto MMOFlags =
    6314         559 :       LD->getMemOperand()->getFlags() &
    6315             :       ~(MachineMemOperand::MOInvariant | MachineMemOperand::MODereferenceable);
    6316             :   return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
    6317         559 :                  LD->getChain(), Base, Offset, LD->getPointerInfo(),
    6318             :                  LD->getMemoryVT(), LD->getAlignment(), MMOFlags,
    6319        1677 :                  LD->getAAInfo());
    6320             : }
    6321             : 
    6322      683026 : SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6323             :                                SDValue Ptr, MachinePointerInfo PtrInfo,
    6324             :                                unsigned Alignment,
    6325             :                                MachineMemOperand::Flags MMOFlags,
    6326             :                                const AAMDNodes &AAInfo) {
    6327             :   assert(Chain.getValueType() == MVT::Other && "Invalid chain type");
    6328      683026 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6329      122118 :     Alignment = getEVTAlignment(Val.getValueType());
    6330             : 
    6331             :   MMOFlags |= MachineMemOperand::MOStore;
    6332             :   assert((MMOFlags & MachineMemOperand::MOLoad) == 0);
    6333             : 
    6334      683026 :   if (PtrInfo.V.isNull())
    6335       16730 :     PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr);
    6336             : 
    6337      683026 :   MachineFunction &MF = getMachineFunction();
    6338      683026 :   MachineMemOperand *MMO = MF.getMachineMemOperand(
    6339     1366052 :       PtrInfo, MMOFlags, Val.getValueType().getStoreSize(), Alignment, AAInfo);
    6340      683026 :   return getStore(Chain, dl, Val, Ptr, MMO);
    6341             : }
    6342             : 
    6343     1035783 : SDValue SelectionDAG::getStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6344             :                                SDValue Ptr, MachineMemOperand *MMO) {
    6345             :   assert(Chain.getValueType() == MVT::Other &&
    6346             :         "Invalid chain type");
    6347     2071566 :   EVT VT = Val.getValueType();
    6348     1035783 :   SDVTList VTs = getVTList(MVT::Other);
    6349     2071566 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6350     1035783 :   SDValue Ops[] = { Chain, Val, Ptr, Undef };
    6351             :   FoldingSetNodeID ID;
    6352     1035783 :   AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
    6353     1035783 :   ID.AddInteger(VT.getRawBits());
    6354     2071566 :   ID.AddInteger(getSyntheticNodeSubclassData<StoreSDNode>(
    6355             :       dl.getIROrder(), VTs, ISD::UNINDEXED, false, VT, MMO));
    6356     1035783 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6357     1035783 :   void *IP = nullptr;
    6358     1035783 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6359        5362 :     cast<StoreSDNode>(E)->refineAlignment(MMO);
    6360        5362 :     return SDValue(E, 0);
    6361             :   }
    6362     1030421 :   auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6363     1030421 :                                    ISD::UNINDEXED, false, VT, MMO);
    6364     1030421 :   createOperands(N, Ops);
    6365             : 
    6366     1030421 :   CSEMap.InsertNode(N, IP);
    6367     1030421 :   InsertNode(N);
    6368             :   SDValue V(N, 0);
    6369             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6370     1030421 :   return V;
    6371             : }
    6372             : 
    6373       39589 : SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6374             :                                     SDValue Ptr, MachinePointerInfo PtrInfo,
    6375             :                                     EVT SVT, unsigned Alignment,
    6376             :                                     MachineMemOperand::Flags MMOFlags,
    6377             :                                     const AAMDNodes &AAInfo) {
    6378             :   assert(Chain.getValueType() == MVT::Other &&
    6379             :         "Invalid chain type");
    6380       39589 :   if (Alignment == 0)  // Ensure that codegen never sees alignment 0
    6381         582 :     Alignment = getEVTAlignment(SVT);
    6382             : 
    6383             :   MMOFlags |= MachineMemOperand::MOStore;
    6384             :   assert((MMOFlags & MachineMemOperand::MOLoad) == 0);
    6385             : 
    6386       39589 :   if (PtrInfo.V.isNull())
    6387        1917 :     PtrInfo = InferPointerInfo(PtrInfo, *this, Ptr);
    6388             : 
    6389       39589 :   MachineFunction &MF = getMachineFunction();
    6390       39589 :   MachineMemOperand *MMO = MF.getMachineMemOperand(
    6391       39589 :       PtrInfo, MMOFlags, SVT.getStoreSize(), Alignment, AAInfo);
    6392       39589 :   return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
    6393             : }
    6394             : 
    6395       52333 : SDValue SelectionDAG::getTruncStore(SDValue Chain, const SDLoc &dl, SDValue Val,
    6396             :                                     SDValue Ptr, EVT SVT,
    6397             :                                     MachineMemOperand *MMO) {
    6398       52333 :   EVT VT = Val.getValueType();
    6399             : 
    6400             :   assert(Chain.getValueType() == MVT::Other &&
    6401             :         "Invalid chain type");
    6402       52863 :   if (VT == SVT)
    6403       30924 :     return getStore(Chain, dl, Val, Ptr, MMO);
    6404             : 
    6405             :   assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
    6406             :          "Should only be a truncating store, not extending!");
    6407             :   assert(VT.isInteger() == SVT.isInteger() &&
    6408             :          "Can't do FP-INT conversion!");
    6409             :   assert(VT.isVector() == SVT.isVector() &&
    6410             :          "Cannot use trunc store to convert to or from a vector!");
    6411             :   assert((!VT.isVector() ||
    6412             :           VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
    6413             :          "Cannot use trunc store to change the number of vector elements!");
    6414             : 
    6415       21409 :   SDVTList VTs = getVTList(MVT::Other);
    6416       42818 :   SDValue Undef = getUNDEF(Ptr.getValueType());
    6417       21409 :   SDValue Ops[] = { Chain, Val, Ptr, Undef };
    6418             :   FoldingSetNodeID ID;
    6419       21409 :   AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
    6420       21409 :   ID.AddInteger(SVT.getRawBits());
    6421       42818 :   ID.AddInteger(getSyntheticNodeSubclassData<StoreSDNode>(
    6422             :       dl.getIROrder(), VTs, ISD::UNINDEXED, true, SVT, MMO));
    6423       21409 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6424       21409 :   void *IP = nullptr;
    6425       21409 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6426         638 :     cast<StoreSDNode>(E)->refineAlignment(MMO);
    6427         638 :     return SDValue(E, 0);
    6428             :   }
    6429       20771 :   auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6430       20771 :                                    ISD::UNINDEXED, true, SVT, MMO);
    6431       20771 :   createOperands(N, Ops);
    6432             : 
    6433       20771 :   CSEMap.InsertNode(N, IP);
    6434       20771 :   InsertNode(N);
    6435             :   SDValue V(N, 0);
    6436             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6437       20771 :   return V;
    6438             : }
    6439             : 
    6440         308 : SDValue SelectionDAG::getIndexedStore(SDValue OrigStore, const SDLoc &dl,
    6441             :                                       SDValue Base, SDValue Offset,
    6442             :                                       ISD::MemIndexedMode AM) {
    6443             :   StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
    6444             :   assert(ST->getOffset().isUndef() && "Store is already a indexed store!");
    6445         616 :   SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
    6446         308 :   SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
    6447             :   FoldingSetNodeID ID;
    6448         308 :   AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
    6449         308 :   ID.AddInteger(ST->getMemoryVT().getRawBits());
    6450         308 :   ID.AddInteger(ST->getRawSubclassData());
    6451         616 :   ID.AddInteger(ST->getPointerInfo().getAddrSpace());
    6452         308 :   void *IP = nullptr;
    6453         308 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP))
    6454           0 :     return SDValue(E, 0);
    6455             : 
    6456         308 :   auto *N = newSDNode<StoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs, AM,
    6457         616 :                                    ST->isTruncatingStore(), ST->getMemoryVT(),
    6458         616 :                                    ST->getMemOperand());
    6459         308 :   createOperands(N, Ops);
    6460             : 
    6461         308 :   CSEMap.InsertNode(N, IP);
    6462         308 :   InsertNode(N);
    6463             :   SDValue V(N, 0);
    6464             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6465         308 :   return V;
    6466             : }
    6467             : 
    6468         612 : SDValue SelectionDAG::getMaskedLoad(EVT VT, const SDLoc &dl, SDValue Chain,
    6469             :                                     SDValue Ptr, SDValue Mask, SDValue Src0,
    6470             :                                     EVT MemVT, MachineMemOperand *MMO,
    6471             :                                     ISD::LoadExtType ExtTy, bool isExpanding) {
    6472         612 :   SDVTList VTs = getVTList(VT, MVT::Other);
    6473         612 :   SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
    6474             :   FoldingSetNodeID ID;
    6475         612 :   AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
    6476         612 :   ID.AddInteger(VT.getRawBits());
    6477        1224 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedLoadSDNode>(
    6478             :       dl.getIROrder(), VTs, ExtTy, isExpanding, MemVT, MMO));
    6479         612 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6480         612 :   void *IP = nullptr;
    6481         612 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6482           0 :     cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
    6483           0 :     return SDValue(E, 0);
    6484             :   }
    6485         612 :   auto *N = newSDNode<MaskedLoadSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6486         612 :                                         ExtTy, isExpanding, MemVT, MMO);
    6487         612 :   createOperands(N, Ops);
    6488             : 
    6489         612 :   CSEMap.InsertNode(N, IP);
    6490         612 :   InsertNode(N);
    6491             :   SDValue V(N, 0);
    6492             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6493         612 :   return V;
    6494             : }
    6495             : 
    6496         362 : SDValue SelectionDAG::getMaskedStore(SDValue Chain, const SDLoc &dl,
    6497             :                                      SDValue Val, SDValue Ptr, SDValue Mask,
    6498             :                                      EVT MemVT, MachineMemOperand *MMO,
    6499             :                                      bool IsTruncating, bool IsCompressing) {
    6500             :   assert(Chain.getValueType() == MVT::Other &&
    6501             :         "Invalid chain type");
    6502         362 :   EVT VT = Val.getValueType();
    6503         362 :   SDVTList VTs = getVTList(MVT::Other);
    6504         362 :   SDValue Ops[] = { Chain, Ptr, Mask, Val };
    6505             :   FoldingSetNodeID ID;
    6506         362 :   AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
    6507         362 :   ID.AddInteger(VT.getRawBits());
    6508         724 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedStoreSDNode>(
    6509             :       dl.getIROrder(), VTs, IsTruncating, IsCompressing, MemVT, MMO));
    6510         362 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6511         362 :   void *IP = nullptr;
    6512         362 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6513           0 :     cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
    6514           0 :     return SDValue(E, 0);
    6515             :   }
    6516         362 :   auto *N = newSDNode<MaskedStoreSDNode>(dl.getIROrder(), dl.getDebugLoc(), VTs,
    6517         362 :                                          IsTruncating, IsCompressing, MemVT, MMO);
    6518         362 :   createOperands(N, Ops);
    6519             : 
    6520         362 :   CSEMap.InsertNode(N, IP);
    6521         362 :   InsertNode(N);
    6522             :   SDValue V(N, 0);
    6523             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6524         362 :   return V;
    6525             : }
    6526             : 
    6527         430 : SDValue SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, const SDLoc &dl,
    6528             :                                       ArrayRef<SDValue> Ops,
    6529             :                                       MachineMemOperand *MMO) {
    6530             :   assert(Ops.size() == 6 && "Incompatible number of operands");
    6531             : 
    6532             :   FoldingSetNodeID ID;
    6533         430 :   AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
    6534         430 :   ID.AddInteger(VT.getRawBits());
    6535         860 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedGatherSDNode>(
    6536             :       dl.getIROrder(), VTs, VT, MMO));
    6537         430 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6538         430 :   void *IP = nullptr;
    6539         430 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6540           0 :     cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
    6541           0 :     return SDValue(E, 0);
    6542             :   }
    6543             : 
    6544         430 :   auto *N = newSDNode<MaskedGatherSDNode>(dl.getIROrder(), dl.getDebugLoc(),
    6545         430 :                                           VTs, VT, MMO);
    6546         430 :   createOperands(N, Ops);
    6547             : 
    6548             :   assert(N->getValue().getValueType() == N->getValueType(0) &&
    6549             :          "Incompatible type of the PassThru value in MaskedGatherSDNode");
    6550             :   assert(N->getMask().getValueType().getVectorNumElements() ==
    6551             :              N->getValueType(0).getVectorNumElements() &&
    6552             :          "Vector width mismatch between mask and data");
    6553             :   assert(N->getIndex().getValueType().getVectorNumElements() ==
    6554             :              N->getValueType(0).getVectorNumElements() &&
    6555             :          "Vector width mismatch between index and data");
    6556             :   assert(isa<ConstantSDNode>(N->getScale()) &&
    6557             :          cast<ConstantSDNode>(N->getScale())->getAPIntValue().isPowerOf2() &&
    6558             :          "Scale should be a constant power of 2");
    6559             : 
    6560         430 :   CSEMap.InsertNode(N, IP);
    6561         430 :   InsertNode(N);
    6562             :   SDValue V(N, 0);
    6563             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6564         430 :   return V;
    6565             : }
    6566             : 
    6567         148 : SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, const SDLoc &dl,
    6568             :                                        ArrayRef<SDValue> Ops,
    6569             :                                        MachineMemOperand *MMO) {
    6570             :   assert(Ops.size() == 6 && "Incompatible number of operands");
    6571             : 
    6572             :   FoldingSetNodeID ID;
    6573         148 :   AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
    6574         148 :   ID.AddInteger(VT.getRawBits());
    6575         296 :   ID.AddInteger(getSyntheticNodeSubclassData<MaskedScatterSDNode>(
    6576             :       dl.getIROrder(), VTs, VT, MMO));
    6577         148 :   ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
    6578         148 :   void *IP = nullptr;
    6579         148 :   if (SDNode *E = FindNodeOrInsertPos(ID, dl, IP)) {
    6580           0 :     cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
    6581           0 :     return SDValue(E, 0);
    6582             :   }
    6583         148 :   auto *N = newSDNode<MaskedScatterSDNode>(dl.getIROrder(), dl.getDebugLoc(),
    6584         148 :                                            VTs, VT, MMO);
    6585         148 :   createOperands(N, Ops);
    6586             : 
    6587             :   assert(N->getMask().getValueType().getVectorNumElements() ==
    6588             :              N->getValue().getValueType().getVectorNumElements() &&
    6589             :          "Vector width mismatch between mask and data");
    6590             :   assert(N->getIndex().getValueType().getVectorNumElements() ==
    6591             :              N->getValue().getValueType().getVectorNumElements() &&
    6592             :          "Vector width mismatch between index and data");
    6593             :   assert(isa<ConstantSDNode>(N->getScale()) &&
    6594             :          cast<ConstantSDNode>(N->getScale())->getAPIntValue().isPowerOf2() &&
    6595             :          "Scale should be a constant power of 2");
    6596             : 
    6597         148 :   CSEMap.InsertNode(N, IP);
    6598         148 :   InsertNode(N);
    6599             :   SDValue V(N, 0);
    6600             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6601         148 :   return V;
    6602             : }
    6603             : 
    6604         252 : SDValue SelectionDAG::getVAArg(EVT VT, const SDLoc &dl, SDValue Chain,
    6605             :                                SDValue Ptr, SDValue SV, unsigned Align) {
    6606         504 :   SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
    6607         252 :   return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
    6608             : }
    6609             : 
    6610        5537 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    6611             :                               ArrayRef<SDUse> Ops) {
    6612        5537 :   switch (Ops.size()) {
    6613           0 :   case 0: return getNode(Opcode, DL, VT);
    6614          30 :   case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
    6615        2945 :   case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
    6616          55 :   case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
    6617             :   default: break;
    6618             :   }
    6619             : 
    6620             :   // Copy from an SDUse array into an SDValue array for use with
    6621             :   // the regular getNode logic.
    6622             :   SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
    6623        2507 :   return getNode(Opcode, DL, VT, NewOps);
    6624             : }
    6625             : 
    6626     3777109 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, EVT VT,
    6627             :                               ArrayRef<SDValue> Ops, const SDNodeFlags Flags) {
    6628     3777109 :   unsigned NumOps = Ops.size();
    6629     3777109 :   switch (NumOps) {
    6630           0 :   case 0: return getNode(Opcode, DL, VT);
    6631     1567547 :   case 1: return getNode(Opcode, DL, VT, Ops[0], Flags);
    6632     1818168 :   case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Flags);
    6633      349066 :   case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
    6634             :   default: break;
    6635             :   }
    6636             : 
    6637      951412 :   switch (Opcode) {
    6638             :   default: break;
    6639        8088 :   case ISD::CONCAT_VECTORS:
    6640             :     // Attempt to fold CONCAT_VECTORS into BUILD_VECTOR or UNDEF.
    6641        8088 :     if (SDValue V = FoldCONCAT_VECTORS(DL, VT, Ops, *this))
    6642         529 :       return V;
    6643        7559 :     break;
    6644             :   case ISD::SELECT_CC:
    6645             :     assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
    6646             :     assert(Ops[0].getValueType() == Ops[1].getValueType() &&
    6647             :            "LHS and RHS of condition must have same type!");
    6648             :     assert(Ops[2].getValueType() == Ops[3].getValueType() &&
    6649             :            "True and False arms of SelectCC must have same type!");
    6650             :     assert(Ops[2].getValueType() == VT &&
    6651             :            "select_cc node must be of same type as true and false value!");
    6652             :     break;
    6653             :   case ISD::BR_CC:
    6654             :     assert(NumOps == 5 && "BR_CC takes 5 operands!");
    6655             :     assert(Ops[2].getValueType() == Ops[3].getValueType() &&
    6656             :            "LHS/RHS of comparison should match types!");
    6657             :     break;
    6658             :   }
    6659             : 
    6660             :   // Memoize nodes.
    6661             :   SDNode *N;
    6662      950883 :   SDVTList VTs = getVTList(VT);
    6663             : 
    6664      950883 :   if (VT != MVT::Glue) {
    6665             :     FoldingSetNodeID ID;
    6666      950883 :     AddNodeIDNode(ID, Opcode, VTs, Ops);
    6667      950883 :     void *IP = nullptr;
    6668             : 
    6669      950883 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    6670      298523 :       return SDValue(E, 0);
    6671             : 
    6672     1304720 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    6673      652360 :     createOperands(N, Ops);
    6674             : 
    6675      652360 :     CSEMap.InsertNode(N, IP);
    6676             :   } else {
    6677           0 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    6678           0 :     createOperands(N, Ops);
    6679             :   }
    6680             : 
    6681      652360 :   InsertNode(N);
    6682             :   SDValue V(N, 0);
    6683             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6684      652360 :   return V;
    6685             : }
    6686             : 
    6687       18124 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL,
    6688             :                               ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
    6689       18124 :   return getNode(Opcode, DL, getVTList(ResultTys), Ops);
    6690             : }
    6691             : 
    6692     3239913 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6693             :                               ArrayRef<SDValue> Ops) {
    6694     3239913 :   if (VTList.NumVTs == 1)
    6695      680852 :     return getNode(Opcode, DL, VTList.VTs[0], Ops);
    6696             : 
    6697             : #if 0
    6698             :   switch (Opcode) {
    6699             :   // FIXME: figure out how to safely handle things like
    6700             :   // int foo(int x) { return 1 << (x & 255); }
    6701             :   // int bar() { return foo(256); }
    6702             :   case ISD::SRA_PARTS:
    6703             :   case ISD::SRL_PARTS:
    6704             :   case ISD::SHL_PARTS:
    6705             :     if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
    6706             :         cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
    6707             :       return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
    6708             :     else if (N3.getOpcode() == ISD::AND)
    6709             :       if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
    6710             :         // If the and is only masking out bits that cannot effect the shift,
    6711             :         // eliminate the and.
    6712             :         unsigned NumBits = VT.getScalarSizeInBits()*2;
    6713             :         if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
    6714             :           return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
    6715             :       }
    6716             :     break;
    6717             :   }
    6718             : #endif
    6719             : 
    6720             :   // Memoize the node unless it returns a flag.
    6721             :   SDNode *N;
    6722     2559061 :   if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
    6723             :     FoldingSetNodeID ID;
    6724     1303248 :     AddNodeIDNode(ID, Opcode, VTList, Ops);
    6725     1303248 :     void *IP = nullptr;
    6726     1303248 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP))
    6727       63978 :       return SDValue(E, 0);
    6728             : 
    6729     2478540 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList);
    6730     1239270 :     createOperands(N, Ops);
    6731     1239270 :     CSEMap.InsertNode(N, IP);
    6732             :   } else {
    6733     2511626 :     N = newSDNode<SDNode>(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTList);
    6734     1255813 :     createOperands(N, Ops);
    6735             :   }
    6736     2495083 :   InsertNode(N);
    6737             :   SDValue V(N, 0);
    6738             :   NewSDValueDbgMsg(V, "Creating new node: ", this);
    6739     2495083 :   return V;
    6740             : }
    6741             : 
    6742           0 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL,
    6743             :                               SDVTList VTList) {
    6744           0 :   return getNode(Opcode, DL, VTList, None);
    6745             : }
    6746             : 
    6747        3546 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6748             :                               SDValue N1) {
    6749        3546 :   SDValue Ops[] = { N1 };
    6750        3546 :   return getNode(Opcode, DL, VTList, Ops);
    6751             : }
    6752             : 
    6753      308165 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6754             :                               SDValue N1, SDValue N2) {
    6755      308165 :   SDValue Ops[] = { N1, N2 };
    6756      308165 :   return getNode(Opcode, DL, VTList, Ops);
    6757             : }
    6758             : 
    6759      140471 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6760             :                               SDValue N1, SDValue N2, SDValue N3) {
    6761      140471 :   SDValue Ops[] = { N1, N2, N3 };
    6762      140471 :   return getNode(Opcode, DL, VTList, Ops);
    6763             : }
    6764             : 
    6765         798 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6766             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4) {
    6767         798 :   SDValue Ops[] = { N1, N2, N3, N4 };
    6768         798 :   return getNode(Opcode, DL, VTList, Ops);
    6769             : }
    6770             : 
    6771         335 : SDValue SelectionDAG::getNode(unsigned Opcode, const SDLoc &DL, SDVTList VTList,
    6772             :                               SDValue N1, SDValue N2, SDValue N3, SDValue N4,
    6773             :                               SDValue N5) {
    6774         335 :   SDValue Ops[] = { N1, N2, N3, N4, N5 };
    6775         335 :   return getNode(Opcode, DL, VTList, Ops);
    6776             : }
    6777             : 
    6778    31068755 : SDVTList SelectionDAG::getVTList(EVT VT) {
    6779    31068755 :   return makeVTList(SDNode::getValueTypeList(VT), 1);
    6780             : }
    6781             : 
    6782     3995902 : SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
    6783             :   FoldingSetNodeID ID;
    6784     3995902 :   ID.AddInteger(2U);
    6785     3995902 :   ID.AddInteger(VT1.getRawBits());
    6786     3995902 :   ID.AddInteger(VT2.getRawBits());
    6787             : 
    6788     3995902 :   void *IP = nullptr;
    6789             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6790     3995902 :   if (!Result) {
    6791       80770 :     EVT *Array = Allocator.Allocate<EVT>(2);
    6792       80770 :     Array[0] = VT1;
    6793       80770 :     Array[1] = VT2;
    6794      161540 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
    6795       80770 :     VTListMap.InsertNode(Result, IP);
    6796             :   }
    6797     7991804 :   return Result->getSDVTList();
    6798             : }
    6799             : 
    6800       62304 : SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
    6801             :   FoldingSetNodeID ID;
    6802       62304 :   ID.AddInteger(3U);
    6803       62304 :   ID.AddInteger(VT1.getRawBits());
    6804       62304 :   ID.AddInteger(VT2.getRawBits());
    6805       62304 :   ID.AddInteger(VT3.getRawBits());
    6806             : 
    6807       62304 :   void *IP = nullptr;
    6808             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6809       62304 :   if (!Result) {
    6810        5806 :     EVT *Array = Allocator.Allocate<EVT>(3);
    6811        5806 :     Array[0] = VT1;
    6812        5806 :     Array[1] = VT2;
    6813        5806 :     Array[2] = VT3;
    6814       11612 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
    6815        5806 :     VTListMap.InsertNode(Result, IP);
    6816             :   }
    6817      124608 :   return Result->getSDVTList();
    6818             : }
    6819             : 
    6820         124 : SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
    6821             :   FoldingSetNodeID ID;
    6822         124 :   ID.AddInteger(4U);
    6823         124 :   ID.AddInteger(VT1.getRawBits());
    6824         124 :   ID.AddInteger(VT2.getRawBits());
    6825         124 :   ID.AddInteger(VT3.getRawBits());
    6826         124 :   ID.AddInteger(VT4.getRawBits());
    6827             : 
    6828         124 :   void *IP = nullptr;
    6829             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6830         124 :   if (!Result) {
    6831          74 :     EVT *Array = Allocator.Allocate<EVT>(4);
    6832          74 :     Array[0] = VT1;
    6833          74 :     Array[1] = VT2;
    6834          74 :     Array[2] = VT3;
    6835          74 :     Array[3] = VT4;
    6836         148 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
    6837          74 :     VTListMap.InsertNode(Result, IP);
    6838             :   }
    6839         248 :   return Result->getSDVTList();
    6840             : }
    6841             : 
    6842     1228665 : SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
    6843     1228665 :   unsigned NumVTs = VTs.size();
    6844             :   FoldingSetNodeID ID;
    6845     1228665 :   ID.AddInteger(NumVTs);
    6846     5579809 :   for (unsigned index = 0; index < NumVTs; index++) {
    6847     4351144 :     ID.AddInteger(VTs[index].getRawBits());
    6848             :   }
    6849             : 
    6850     1228665 :   void *IP = nullptr;
    6851             :   SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
    6852     1228665 :   if (!Result) {
    6853       41344 :     EVT *Array = Allocator.Allocate<EVT>(NumVTs);
    6854             :     std::copy(VTs.begin(), VTs.end(), Array);
    6855       82688 :     Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
    6856       41344 :     VTListMap.InsertNode(Result, IP);
    6857             :   }
    6858     2457330 :   return Result->getSDVTList();
    6859             : }
    6860             : 
    6861             : 
    6862             : /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
    6863             : /// specified operands.  If the resultant node already exists in the DAG,
    6864             : /// this does not modify the specified node, instead it returns the node that
    6865             : /// already exists.  If the resultant node does not exist in the DAG, the
    6866             : /// input node is returned.  As a degenerate case, if you specify the same
    6867             : /// input operands as the node already has, the input node is returned.
    6868        2612 : SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
    6869             :   assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
    6870             : 
    6871             :   // Check to see if there is no change.
    6872        2612 :   if (Op == N->getOperand(0)) return N;
    6873             : 
    6874             :   // See if the modified node already exists.
    6875        2612 :   void *InsertPos = nullptr;
    6876        2612 :   if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
    6877             :     return Existing;
    6878             : 
    6879             :   // Nope it doesn't.  Remove the node from its current place in the maps.
    6880        2612 :   if (InsertPos)
    6881        2612 :     if (!RemoveNodeFromCSEMaps(N))
    6882           0 :       InsertPos = nullptr;
    6883             : 
    6884             :   // Now we update the operands.
    6885        2612 :   N->OperandList[0].set(Op);
    6886             : 
    6887        2612 :   updateDivergence(N);
    6888             :   // If this gets put into a CSE map, add it.
    6889        2612 :   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
    6890             :   return N;
    6891             : }
    6892             : 
    6893       58951 : SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
    6894             :   assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
    6895             : 
    6896             :   // Check to see if there is no change.
    6897       58951 :   if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
    6898             :     return N;   // No operands changed, just return the input node.
    6899             : 
    6900             :   // See if the modified node already exists.
    6901       58951 :   void *InsertPos = nullptr;
    6902       58951 :   if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
    6903             :     return Existing;
    6904             : 
    6905             :   // Nope it doesn't.  Remove the node from its current place in the maps.
    6906       58246 :   if (InsertPos)
    6907       58246 :     if (!RemoveNodeFromCSEMaps(N))
    6908           0 :       InsertPos = nullptr;
    6909             : 
    6910             :   // Now we update the operands.
    6911       58246 :   if (N->OperandList[0] != Op1)
    6912       13259 :     N->OperandList[0].set(Op1);
    6913       58246 :   if (N->OperandList[1] != Op2)
    6914       50399 :     N->OperandList[1].set(Op2);
    6915             : 
    6916       58246 :   updateDivergence(N);
    6917             :   // If this gets put into a CSE map, add it.
    6918       58246 :   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
    6919             :   return N;
    6920             : }
    6921             : 
    6922       46385 : SDNode *SelectionDAG::
    6923             : UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
    6924       46385 :   SDValue Ops[] = { Op1, Op2, Op3 };
    6925       46385 :   return UpdateNodeOperands(N, Ops);
    6926             : }
    6927             : 
    6928         751 : SDNode *SelectionDAG::
    6929             : UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
    6930             :                    SDValue Op3, SDValue Op4) {
    6931         751 :   SDValue Ops[] = { Op1, Op2, Op3, Op4 };
    6932         751 :   return UpdateNodeOperands(N, Ops);
    6933             : }
    6934             : 
    6935        1966 : SDNode *SelectionDAG::
    6936             : UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
    6937             :                    SDValue Op3, SDValue Op4, SDValue Op5) {
    6938        1966 :   SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
    6939        1966 :   return UpdateNodeOperands(N, Ops);
    6940             : }
    6941             : 
    6942     4232486 : SDNode *SelectionDAG::
    6943             : UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
    6944     4232486 :   unsigned NumOps = Ops.size();
    6945             :   assert(N->getNumOperands() == NumOps &&
    6946             :          "Update with wrong number of operands");
    6947             : 
    6948             :   // If no operands changed just return the input node.
    6949     8464972 :   if (std::equal(Ops.begin(), Ops.end(), N->op_begin()))
    6950             :     return N;
    6951             : 
    6952             :   // See if the modified node already exists.
    6953      117970 :   void *InsertPos = nullptr;
    6954      117970 :   if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
    6955             :     return Existing;
    6956             : 
    6957             :   // Nope it doesn't.  Remove the node from its current place in the maps.
    6958      117757 :   if (InsertPos)
    6959      106686 :     if (!RemoveNodeFromCSEMaps(N))
    6960           0 :       InsertPos = nullptr;
    6961             : 
    6962             :   // Now we update the operands.
    6963      808859 :   for (unsigned i = 0; i != NumOps; ++i)
    6964      691102 :     if (N->OperandList[i] != Ops[i])
    6965      166552 :       N->OperandList[i].set(Ops[i]);
    6966             : 
    6967      117757 :   updateDivergence(N);
    6968             :   // If this gets put into a CSE map, add it.
    6969      117757 :   if (InsertPos) CSEMap.InsertNode(N, InsertPos);
    6970             :   return N;
    6971             : }
    6972             : 
    6973             : /// DropOperands - Release the operands and set this node to have
    6974             : /// zero operands.
    6975    11063165 : void SDNode::DropOperands() {
    6976             :   // Unlike the code in MorphNodeTo that does this, we don't need to
    6977             :   // watch for dead nodes here.
    6978    56196650 :   for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
    6979    17035160 :     SDUse &Use = *I++;
    6980    17035160 :     Use.set(SDValue());
    6981             :   }
    6982    11063165 : }
    6983             : 
    6984             : /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
    6985             : /// machine opcode.
    6986             : ///
    6987        6706 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    6988             :                                    EVT VT) {
    6989        6706 :   SDVTList VTs = getVTList(VT);
    6990        6706 :   return SelectNodeTo(N, MachineOpc, VTs, None);
    6991             : }
    6992             : 
    6993         222 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    6994             :                                    EVT VT, SDValue Op1) {
    6995         222 :   SDVTList VTs = getVTList(VT);
    6996         222 :   SDValue Ops[] = { Op1 };
    6997         222 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    6998             : }
    6999             : 
    7000        2161 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7001             :                                    EVT VT, SDValue Op1,
    7002             :                                    SDValue Op2) {
    7003        2161 :   SDVTList VTs = getVTList(VT);
    7004        2161 :   SDValue Ops[] = { Op1, Op2 };
    7005        2161 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7006             : }
    7007             : 
    7008          53 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7009             :                                    EVT VT, SDValue Op1,
    7010             :                                    SDValue Op2, SDValue Op3) {
    7011          53 :   SDVTList VTs = getVTList(VT);
    7012          53 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7013          53 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7014             : }
    7015             : 
    7016        4176 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7017             :                                    EVT VT, ArrayRef<SDValue> Ops) {
    7018        4176 :   SDVTList VTs = getVTList(VT);
    7019        4176 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7020             : }
    7021             : 
    7022          10 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7023             :                                    EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
    7024          10 :   SDVTList VTs = getVTList(VT1, VT2);
    7025          10 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7026             : }
    7027             : 
    7028           7 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7029             :                                    EVT VT1, EVT VT2) {
    7030           7 :   SDVTList VTs = getVTList(VT1, VT2);
    7031           7 :   return SelectNodeTo(N, MachineOpc, VTs, None);
    7032             : }
    7033             : 
    7034           5 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7035             :                                    EVT VT1, EVT VT2, EVT VT3,
    7036             :                                    ArrayRef<SDValue> Ops) {
    7037           5 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7038           5 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7039             : }
    7040             : 
    7041           0 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7042             :                                    EVT VT1, EVT VT2,
    7043             :                                    SDValue Op1, SDValue Op2) {
    7044           0 :   SDVTList VTs = getVTList(VT1, VT2);
    7045           0 :   SDValue Ops[] = { Op1, Op2 };
    7046           0 :   return SelectNodeTo(N, MachineOpc, VTs, Ops);
    7047             : }
    7048             : 
    7049       32772 : SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
    7050             :                                    SDVTList VTs,ArrayRef<SDValue> Ops) {
    7051       32772 :   SDNode *New = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
    7052             :   // Reset the NodeID to -1.
    7053             :   New->setNodeId(-1);
    7054       32772 :   if (New != N) {
    7055          77 :     ReplaceAllUsesWith(N, New);
    7056          77 :     RemoveDeadNode(N);
    7057             :   }
    7058       32772 :   return New;
    7059             : }
    7060             : 
    7061             : /// UpdateSDLocOnMergeSDNode - If the opt level is -O0 then it throws away
    7062             : /// the line number information on the merged node since it is not possible to
    7063             : /// preserve the information that operation is associated with multiple lines.
    7064             : /// This will make the debugger working better at -O0, were there is a higher
    7065             : /// probability having other instructions associated with that line.
    7066             : ///
    7067             : /// For IROrder, we keep the smaller of the two
    7068       89798 : SDNode *SelectionDAG::UpdateSDLocOnMergeSDNode(SDNode *N, const SDLoc &OLoc) {
    7069             :   DebugLoc NLoc = N->getDebugLoc();
    7070       89965 :   if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
    7071          70 :     N->setDebugLoc(DebugLoc());
    7072             :   }
    7073      269394 :   unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
    7074             :   N->setIROrder(Order);
    7075       89798 :   return N;
    7076             : }
    7077             : 
    7078             : /// MorphNodeTo - This *mutates* the specified node to have the specified
    7079             : /// return type, opcode, and operands.
    7080             : ///
    7081             : /// Note that MorphNodeTo returns the resultant node.  If there is already a
    7082             : /// node of the specified opcode and operands, it returns that node instead of
    7083             : /// the current one.  Note that the SDLoc need not be the same.
    7084             : ///
    7085             : /// Using MorphNodeTo is faster than creating a new node and swapping it in
    7086             : /// with ReplaceAllUsesWith both because it often avoids allocating a new
    7087             : /// node, and because it doesn't require CSE recalculation for any of
    7088             : /// the node's users.
    7089             : ///
    7090             : /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
    7091             : /// As a consequence it isn't appropriate to use from within the DAG combiner or
    7092             : /// the legalizer which maintain worklists that would need to be updated when
    7093             : /// deleting things.
    7094     2865801 : SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
    7095             :                                   SDVTList VTs, ArrayRef<SDValue> Ops) {
    7096             :   // If an identical node already exists, use it.
    7097     2865801 :   void *IP = nullptr;
    7098     2865801 :   if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
    7099             :     FoldingSetNodeID ID;
    7100     2298104 :     AddNodeIDNode(ID, Opc, VTs, Ops);
    7101     4596208 :     if (SDNode *ON = FindNodeOrInsertPos(ID, SDLoc(N), IP))
    7102       33846 :       return UpdateSDLocOnMergeSDNode(ON, SDLoc(N));
    7103             :   }
    7104             : 
    7105     2848878 :   if (!RemoveNodeFromCSEMaps(N))
    7106      545909 :     IP = nullptr;
    7107             : 
    7108             :   // Start the morphing.
    7109     2848878 :   N->NodeType = Opc;
    7110     2848878 :   N->ValueList = VTs.VTs;
    7111     2848878 :   N->NumValues = VTs.NumVTs;
    7112             : 
    7113             :   // Clear the operands list, updating used nodes to remove this from their
    7114             :   // use list.  Keep track of any operands that become dead as a result.
    7115             :   SmallPtrSet<SDNode*, 16> DeadNodeSet;
    7116    13885848 :   for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
    7117     8188092 :     SDUse &Use = *I++;
    7118             :     SDNode *Used = Use.getNode();
    7119     8188092 :     Use.set(SDValue());
    7120     8188092 :     if (Used->use_empty())
    7121     3613265 :       DeadNodeSet.insert(Used);
    7122             :   }
    7123             : 
    7124             :   // For MachineNode, initialize the memory references information.
    7125             :   if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N))
    7126             :     MN->setMemRefs(nullptr, nullptr);
    7127             : 
    7128             :   // Swap for an appropriately sized array from the recycler.
    7129     2848878 :   removeOperands(N);
    7130     2848878 :   createOperands(N, Ops);
    7131             : 
    7132             :   // Delete any nodes that are still dead after adding the uses for the
    7133             :   // new operands.
    7134     2848878 :   if (!DeadNodeSet.empty()) {
    7135             :     SmallVector<SDNode *, 16> DeadNodes;
    7136     5988740 :     for (SDNode *N : DeadNodeSet)
    7137     3613265 :       if (N->use_empty())
    7138     1208653 :         DeadNodes.push_back(N);
    7139     2375475 :     RemoveDeadNodes(DeadNodes);
    7140             :   }
    7141             : 
    7142     2848878 :   if (IP)
    7143             :     CSEMap.InsertNode(N, IP);   // Memoize the new node.
    7144             :   return N;
    7145             : }
    7146             : 
    7147         100 : SDNode* SelectionDAG::mutateStrictFPToFP(SDNode *Node) {
    7148         100 :   unsigned OrigOpc = Node->getOpcode();
    7149             :   unsigned NewOpc;
    7150             :   bool IsUnary = false;
    7151             :   bool IsTernary = false;
    7152         100 :   switch (OrigOpc) {
    7153           0 :   default:
    7154           0 :     llvm_unreachable("mutateStrictFPToFP called with unexpected opcode!");
    7155             :   case ISD::STRICT_FADD: NewOpc = ISD::FADD; break;
    7156           8 :   case ISD::STRICT_FSUB: NewOpc = ISD::FSUB; break;
    7157           4 :   case ISD::STRICT_FMUL: NewOpc = ISD::FMUL; break;
    7158           4 :   case ISD::STRICT_FDIV: NewOpc = ISD::FDIV; break;
    7159           0 :   case ISD::STRICT_FREM: NewOpc = ISD::FREM; break;
    7160          12 :   case ISD::STRICT_FMA: NewOpc = ISD::FMA; IsTernary = true; break;
    7161           4 :   case ISD::STRICT_FSQRT: NewOpc = ISD::FSQRT; IsUnary = true; break;
    7162           6 :   case ISD::STRICT_FPOW: NewOpc = ISD::FPOW; break;
    7163           6 :   case ISD::STRICT_FPOWI: NewOpc = ISD::FPOWI; break;
    7164           6 :   case ISD::STRICT_FSIN: NewOpc = ISD::FSIN; IsUnary = true; break;
    7165           6 :   case ISD::STRICT_FCOS: NewOpc = ISD::FCOS; IsUnary = true; break;
    7166           6 :   case ISD::STRICT_FEXP: NewOpc = ISD::FEXP; IsUnary = true; break;
    7167           6 :   case ISD::STRICT_FEXP2: NewOpc = ISD::FEXP2; IsUnary = true; break;
    7168           6 :   case ISD::STRICT_FLOG: NewOpc = ISD::FLOG; IsUnary = true; break;
    7169           6 :   case ISD::STRICT_FLOG10: NewOpc = ISD::FLOG10; IsUnary = true; break;
    7170           6 :   case ISD::STRICT_FLOG2: NewOpc = ISD::FLOG2; IsUnary = true; break;
    7171           5 :   case ISD::STRICT_FRINT: NewOpc = ISD::FRINT; IsUnary = true; break;
    7172           5 :   case ISD::STRICT_FNEARBYINT:
    7173             :     NewOpc = ISD::FNEARBYINT;
    7174             :     IsUnary = true;
    7175           5 :     break;
    7176             :   }
    7177             : 
    7178             :   // We're taking this node out of the chain, so we need to re-link things.
    7179         100 :   SDValue InputChain = Node->getOperand(0);
    7180             :   SDValue OutputChain = SDValue(Node, 1);
    7181         100 :   ReplaceAllUsesOfValueWith(OutputChain, InputChain);
    7182             : 
    7183         200 :   SDVTList VTs = getVTList(Node->getOperand(1).getValueType());
    7184             :   SDNode *Res = nullptr;
    7185         100 :   if (IsUnary)
    7186         112 :     Res = MorphNodeTo(Node, NewOpc, VTs, { Node->getOperand(1) });
    7187          44 :   else if (IsTernary)
    7188          24 :     Res = MorphNodeTo(Node, NewOpc, VTs, { Node->getOperand(1),
    7189             :                                            Node->getOperand(2),
    7190             :                                            Node->getOperand(3)});
    7191             :   else
    7192          64 :     Res = MorphNodeTo(Node, NewOpc, VTs, { Node->getOperand(1),
    7193             :                                            Node->getOperand(2) });
    7194             : 
    7195             :   // MorphNodeTo can operate in two ways: if an existing node with the
    7196             :   // specified operands exists, it can just return it.  Otherwise, it
    7197             :   // updates the node in place to have the requested operands.
    7198         100 :   if (Res == Node) {
    7199             :     // If we updated the node in place, reset the node ID.  To the isel,
    7200             :     // this should be just like a newly allocated machine node.
    7201             :     Res->setNodeId(-1);
    7202             :   } else {
    7203           0 :     ReplaceAllUsesWith(Node, Res);
    7204           0 :     RemoveDeadNode(Node);
    7205             :   }
    7206             : 
    7207         100 :   return Res;
    7208             : }
    7209             : 
    7210             : /// getMachineNode - These are used for target selectors to create a new node
    7211             : /// with specified return type(s), MachineInstr opcode, and operands.
    7212             : ///
    7213             : /// Note that getMachineNode returns the resultant node.  If there is already a
    7214             : /// node of the specified opcode and operands, it returns that node instead of
    7215             : /// the current one.
    7216        3616 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7217             :                                             EVT VT) {
    7218        3616 :   SDVTList VTs = getVTList(VT);
    7219        3616 :   return getMachineNode(Opcode, dl, VTs, None);
    7220             : }
    7221             : 
    7222       50900 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7223             :                                             EVT VT, SDValue Op1) {
    7224       50900 :   SDVTList VTs = getVTList(VT);
    7225       50900 :   SDValue Ops[] = { Op1 };
    7226       50900 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7227             : }
    7228             : 
    7229       57396 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7230             :                                             EVT VT, SDValue Op1, SDValue Op2) {
    7231       57396 :   SDVTList VTs = getVTList(VT);
    7232       57396 :   SDValue Ops[] = { Op1, Op2 };
    7233       57396 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7234             : }
    7235             : 
    7236        5158 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7237             :                                             EVT VT, SDValue Op1, SDValue Op2,
    7238             :                                             SDValue Op3) {
    7239        5158 :   SDVTList VTs = getVTList(VT);
    7240        5158 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7241        5158 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7242             : }
    7243             : 
    7244       38834 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7245             :                                             EVT VT, ArrayRef<SDValue> Ops) {
    7246       38834 :   SDVTList VTs = getVTList(VT);
    7247       38834 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7248             : }
    7249             : 
    7250        9241 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7251             :                                             EVT VT1, EVT VT2, SDValue Op1,
    7252             :                                             SDValue Op2) {
    7253        9241 :   SDVTList VTs = getVTList(VT1, VT2);
    7254        9241 :   SDValue Ops[] = { Op1, Op2 };
    7255        9241 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7256             : }
    7257             : 
    7258          96 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7259             :                                             EVT VT1, EVT VT2, SDValue Op1,
    7260             :                                             SDValue Op2, SDValue Op3) {
    7261          96 :   SDVTList VTs = getVTList(VT1, VT2);
    7262          96 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7263          96 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7264             : }
    7265             : 
    7266      142133 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7267             :                                             EVT VT1, EVT VT2,
    7268             :                                             ArrayRef<SDValue> Ops) {
    7269      142133 :   SDVTList VTs = getVTList(VT1, VT2);
    7270      142133 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7271             : }
    7272             : 
    7273          25 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7274             :                                             EVT VT1, EVT VT2, EVT VT3,
    7275             :                                             SDValue Op1, SDValue Op2) {
    7276          25 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7277          25 :   SDValue Ops[] = { Op1, Op2 };
    7278          25 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7279             : }
    7280             : 
    7281         183 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7282             :                                             EVT VT1, EVT VT2, EVT VT3,
    7283             :                                             SDValue Op1, SDValue Op2,
    7284             :                                             SDValue Op3) {
    7285         183 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7286         183 :   SDValue Ops[] = { Op1, Op2, Op3 };
    7287         183 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7288             : }
    7289             : 
    7290         388 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7291             :                                             EVT VT1, EVT VT2, EVT VT3,
    7292             :                                             ArrayRef<SDValue> Ops) {
    7293         388 :   SDVTList VTs = getVTList(VT1, VT2, VT3);
    7294         388 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7295             : }
    7296             : 
    7297        8274 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &dl,
    7298             :                                             ArrayRef<EVT> ResultTys,
    7299             :                                             ArrayRef<SDValue> Ops) {
    7300        8274 :   SDVTList VTs = getVTList(ResultTys);
    7301        8274 :   return getMachineNode(Opcode, dl, VTs, Ops);
    7302             : }
    7303             : 
    7304      486595 : MachineSDNode *SelectionDAG::getMachineNode(unsigned Opcode, const SDLoc &DL,
    7305             :                                             SDVTList VTs,
    7306             :                                             ArrayRef<SDValue> Ops) {
    7307      486595 :   bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
    7308             :   MachineSDNode *N;
    7309      486595 :   void *IP = nullptr;
    7310             : 
    7311             :   if (DoCSE) {
    7312             :     FoldingSetNodeID ID;
    7313      472031 :     AddNodeIDNode(ID, ~Opcode, VTs, Ops);
    7314      472031 :     IP = nullptr;
    7315      472031 :     if (SDNode *E = FindNodeOrInsertPos(ID, DL, IP)) {
    7316       72875 :       return cast<MachineSDNode>(UpdateSDLocOnMergeSDNode(E, DL));
    7317             :     }
    7318             :   }
    7319             : 
    7320             :   // Allocate a new MachineSDNode.
    7321      827440 :   N = newSDNode<MachineSDNode>(~Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs);
    7322      413720 :   createOperands(N, Ops);
    7323             : 
    7324      413720 :   if (DoCSE)
    7325      399156 :     CSEMap.InsertNode(N, IP);
    7326             : 
    7327      413720 :   InsertNode(N);
    7328      413720 :   return N;
    7329             : }
    7330             : 
    7331             : /// getTargetExtractSubreg - A convenience function for creating
    7332             : /// TargetOpcode::EXTRACT_SUBREG nodes.
    7333       41582 : SDValue SelectionDAG::getTargetExtractSubreg(int SRIdx, const SDLoc &DL, EVT VT,
    7334             :                                              SDValue Operand) {
    7335       83164 :   SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
    7336             :   SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
    7337       41582 :                                   VT, Operand, SRIdxVal);
    7338       41582 :   return SDValue(Subreg, 0);
    7339             : }
    7340             : 
    7341             : /// getTargetInsertSubreg - A convenience function for creating
    7342             : /// TargetOpcode::INSERT_SUBREG nodes.
    7343        1645 : SDValue SelectionDAG::getTargetInsertSubreg(int SRIdx, const SDLoc &DL, EVT VT,
    7344             :                                             SDValue Operand, SDValue Subreg) {
    7345        3290 :   SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
    7346             :   SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
    7347        1645 :                                   VT, Operand, Subreg, SRIdxVal);
    7348        1645 :   return SDValue(Result, 0);
    7349             : }
    7350             : 
    7351             : /// getNodeIfExists - Get the specified node if it's already available, or
    7352             : /// else return NULL.
    7353      678926 : SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
    7354             :                                       ArrayRef<SDValue> Ops,
    7355             :                                       const SDNodeFlags Flags) {
    7356      678926 :   if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
    7357             :     FoldingSetNodeID ID;
    7358      678926 :     AddNodeIDNode(ID, Opcode, VTList, Ops);
    7359      678926 :     void *IP = nullptr;
    7360     1357852 :     if (SDNode *E = FindNodeOrInsertPos(ID, SDLoc(), IP)) {
    7361          26 :       E->intersectFlagsWith(Flags);
    7362             :       return E;
    7363             :     }
    7364             :   }
    7365             :   return nullptr;
    7366             : }
    7367             : 
    7368             : /// getDbgValue - Creates a SDDbgValue node.
    7369             : ///
    7370             : /// SDNode
    7371       14190 : SDDbgValue *SelectionDAG::getDbgValue(DIVariable *Var, DIExpression *Expr,
    7372             :                                       SDNode *N, unsigned R, bool IsIndirect,
    7373             :                                       const DebugLoc &DL, unsigned O) {
    7374             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7375             :          "Expected inlined-at fields to agree");
    7376       14190 :   return new (DbgInfo->getAlloc())
    7377       14190 :       SDDbgValue(Var, Expr, N, R, IsIndirect, DL, O);
    7378             : }
    7379             : 
    7380             : /// Constant
    7381        9274 : SDDbgValue *SelectionDAG::getConstantDbgValue(DIVariable *Var,
    7382             :                                               DIExpression *Expr,
    7383             :                                               const Value *C,
    7384             :                                               const DebugLoc &DL, unsigned O) {
    7385             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7386             :          "Expected inlined-at fields to agree");
    7387       18548 :   return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, C, DL, O);
    7388             : }
    7389             : 
    7390             : /// FrameIndex
    7391        7550 : SDDbgValue *SelectionDAG::getFrameIndexDbgValue(DIVariable *Var,
    7392             :                                                 DIExpression *Expr, unsigned FI,
    7393             :                                                 const DebugLoc &DL,
    7394             :                                                 unsigned O) {
    7395             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7396             :          "Expected inlined-at fields to agree");
    7397       15100 :   return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, FI, DL, O);
    7398             : }
    7399             : 
    7400             : /// VReg
    7401        3805 : SDDbgValue *SelectionDAG::getVRegDbgValue(DIVariable *Var,
    7402             :                                           DIExpression *Expr,
    7403             :                                           unsigned VReg, bool IsIndirect,
    7404             :                                           const DebugLoc &DL, unsigned O) {
    7405             :   assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
    7406             :          "Expected inlined-at fields to agree");
    7407        3805 :   return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, VReg, IsIndirect, DL,
    7408        3805 :                                               O);
    7409             : }
    7410             : 
    7411     6988094 : void SelectionDAG::transferDbgValues(SDValue From, SDValue To,
    7412             :                                      unsigned OffsetInBits, unsigned SizeInBits,
    7413             :                                      bool InvalidateDbg) {
    7414             :   SDNode *FromNode = From.getNode();
    7415             :   SDNode *ToNode = To.getNode();
    7416             :   assert(FromNode && ToNode && "Can't modify dbg values");
    7417             : 
    7418             :   // PR35338
    7419             :   // TODO: assert(From != To && "Redundant dbg value transfer");
    7420             :   // TODO: assert(FromNode != ToNode && "Intranode dbg value transfer");
    7421     6987414 :   if (From == To || FromNode == ToNode)
    7422     6986640 :     return;
    7423             : 
    7424     6199698 :   if (!FromNode->getHasDebugValue())
    7425             :     return;
    7426             : 
    7427             :   SmallVector<SDDbgValue *, 2> ClonedDVs;
    7428        8268 :   for (SDDbgValue *Dbg : GetDbgValues(FromNode)) {
    7429        3221 :     if (Dbg->getKind() != SDDbgValue::SDNODE || Dbg->isInvalidated())
    7430        1143 :       continue;
    7431             : 
    7432             :     // TODO: assert(!Dbg->isInvalidated() && "Transfer of invalid dbg value");
    7433             : 
    7434             :     // Just transfer the dbg value attached to From.
    7435        2195 :     if (Dbg->getResNo() != From.getResNo())
    7436          56 :       continue;
    7437             : 
    7438        2083 :     DIVariable *Var = Dbg->getVariable();
    7439        2083 :     auto *Expr = Dbg->getExpression();
    7440             :     // If a fragment is requested, update the expression.
    7441        2083 :     if (SizeInBits) {
    7442             :       // When splitting a larger (e.g., sign-extended) value whose
    7443             :       // lower bits are described with an SDDbgValue, do not attempt
    7444             :       // to transfer the SDDbgValue to the upper bits.
    7445          42 :       if (auto FI = Expr->getFragmentInfo())
    7446          10 :         if (OffsetInBits + SizeInBits > FI->SizeInBits)
    7447             :           continue;
    7448             :       auto Fragment = DIExpression::createFragmentExpression(Expr, OffsetInBits,
    7449          41 :                                                              SizeInBits);
    7450          41 :       if (!Fragment)
    7451             :         continue;
    7452          37 :       Expr = *Fragment;
    7453             :     }
    7454             :     // Clone the SDDbgValue and move it to To.
    7455             :     SDDbgValue *Clone =
    7456        4156 :         getDbgValue(Var, Expr, ToNode, To.getResNo(), Dbg->isIndirect(),
    7457        4156 :                     Dbg->getDebugLoc(), Dbg->getOrder());
    7458        2078 :     ClonedDVs.push_back(Clone);
    7459             : 
    7460        2078 :     if (InvalidateDbg)
    7461             :       Dbg->setIsInvalidated();
    7462             :   }
    7463             : 
    7464        5610 :   for (SDDbgValue *Dbg : ClonedDVs)
    7465        2078 :     AddDbgValue(Dbg, ToNode, false);
    7466             : }
    7467             : 
    7468     1966521 : void SelectionDAG::salvageDebugInfo(SDNode &N) {
    7469     1966521 :   if (!N.getHasDebugValue())
    7470     1965126 :     return;
    7471             : 
    7472             :   SmallVector<SDDbgValue *, 2> ClonedDVs;
    7473       14336 :   for (auto DV : GetDbgValues(&N)) {
    7474        5773 :     if (DV->isInvalidated())
    7475           0 :       continue;
    7476       11546 :     switch (N.getOpcode()) {
    7477             :     default:
    7478        4837 :       break;
    7479         936 :     case ISD::ADD:
    7480         936 :       SDValue N0 = N.getOperand(0);
    7481         936 :       SDValue N1 = N.getOperand(1);
    7482        1872 :       if (!isConstantIntBuildVectorOrConstantInt(N0) &&
    7483         936 :           isConstantIntBuildVectorOrConstantInt(N1)) {
    7484             :         uint64_t Offset = N.getConstantOperandVal(1);
    7485             :         // Rewrite an ADD constant node into a DIExpression. Since we are
    7486             :         // performing arithmetic to compute the variable's *value* in the
    7487             :         // DIExpression, we need to mark the expression with a
    7488             :         // DW_OP_stack_value.
    7489         692 :         auto *DIExpr = DV->getExpression();
    7490         692 :         DIExpr = DIExpression::prepend(DIExpr, DIExpression::NoDeref, Offset,
    7491             :                                        DIExpression::NoDeref,
    7492             :                                        DIExpression::WithStackValue);
    7493             :         SDDbgValue *Clone =
    7494        1384 :             getDbgValue(DV->getVariable(), DIExpr, N0.getNode(), N0.getResNo(),
    7495        2076 :                         DV->isIndirect(), DV->getDebugLoc(), DV->getOrder());
    7496         692 :         ClonedDVs.push_back(Clone);
    7497             :         DV->setIsInvalidated();
    7498             :         LLVM_DEBUG(dbgs() << "SALVAGE: Rewriting";
    7499             :                    N0.getNode()->dumprFull(this);
    7500             :                    dbgs() << " into " << *DIExpr << '\n');
    7501             :       }
    7502             :     }
    7503             :   }
    7504             : 
    7505        2779 :   for (SDDbgValue *Dbg : ClonedDVs)
    7506         692 :     AddDbgValue(Dbg, Dbg->getSDNode(), false);
    7507             : }
    7508             : 
    7509             : /// Creates a SDDbgLabel node.
    7510           0 : SDDbgLabel *SelectionDAG::getDbgLabel(DILabel *Label,
    7511             :                                       const DebugLoc &DL, unsigned O) {
    7512             :   assert(cast<DILabel>(Label)->isValidLocationForIntrinsic(DL) &&
    7513             :          "Expected inlined-at fields to agree");
    7514           0 :   return new (DbgInfo->getAlloc()) SDDbgLabel(Label, DL, O);
    7515             : }
    7516             : 
    7517             : namespace {
    7518             : 
    7519             : /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
    7520             : /// pointed to by a use iterator is deleted, increment the use iterator
    7521             : /// so that it doesn't dangle.
    7522             : ///
    7523           0 : class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
    7524             :   SDNode::use_iterator &UI;
    7525             :   SDNode::use_iterator &UE;
    7526             : 
    7527       24062 :   void NodeDeleted(SDNode *N, SDNode *E) override {
    7528             :     // Increment the iterator as needed.
    7529       49177 :     while (UI != UE && N == *UI)
    7530             :       ++UI;
    7531       24062 :   }
    7532             : 
    7533             : public:
    7534             :   RAUWUpdateListener(SelectionDAG &d,
    7535             :                      SDNode::use_iterator &ui,
    7536             :                      SDNode::use_iterator &ue)
    7537    11308502 :     : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
    7538             : };
    7539             : 
    7540             : } // end anonymous namespace
    7541             : 
    7542             : /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
    7543             : /// This can cause recursive merging of nodes in the DAG.
    7544             : ///
    7545             : /// This version assumes From has a single result value.
    7546             : ///
    7547     2163481 : void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
    7548             :   SDNode *From = FromN.getNode();
    7549             :   assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
    7550             :          "Cannot replace with this method!");
    7551             :   assert(From != To.getNode() && "Cannot replace uses of with self");
    7552             : 
    7553             :   // Preserve Debug Values
    7554     2163481 :   transferDbgValues(FromN, To);
    7555             : 
    7556             :   // Iterate over all the existing uses of From. New uses will be added
    7557             :   // to the beginning of the use list, which we avoid visiting.
    7558             :   // This specifically avoids visiting uses of From that arise while the
    7559             :   // replacement is happening, because any such uses would be the result
    7560             :   // of CSE: If an existing node looks like From after one of its operands
    7561             :   // is replaced by To, we don't want to replace of all its users with To
    7562             :   // too. See PR3018 for more info.
    7563     2163481 :   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
    7564             :   RAUWUpdateListener Listener(*this, UI, UE);
    7565     7400883 :   while (UI != UE) {
    7566             :     SDNode *User = *UI;
    7567             : 
    7568             :     // This node is about to morph, remove its old self from the CSE maps.
    7569     2618701 :     RemoveNodeFromCSEMaps(User);
    7570             : 
    7571             :     // A user can appear in a use list multiple times, and when this
    7572             :     // happens the uses are usually next to each other in the list.
    7573             :     // To help reduce the number of CSE recomputations, process all
    7574             :     // the uses of this user that we can find this way.
    7575             :     do {
    7576             :       SDUse &Use = UI.getUse();
    7577             :       ++UI;
    7578     2627144 :       Use.set(To);
    7579     5254288 :       if (To->isDivergent() != From->isDivergent())
    7580        4907 :         updateDivergence(User);
    7581     3136756 :     } while (UI != UE && *UI == User);
    7582             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7583             :     // already exists there, recursively merge the results together.
    7584     2618701 :     AddModifiedNodeToCSEMaps(User);
    7585             :   }
    7586             : 
    7587             :   // If we just RAUW'd the root, take note.
    7588             :   if (FromN == getRoot())
    7589        1753 :     setRoot(To);
    7590     2163481 : }
    7591             : 
    7592             : /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
    7593             : /// This can cause recursive merging of nodes in the DAG.
    7594             : ///
    7595             : /// This version assumes that for each value of From, there is a
    7596             : /// corresponding value in To in the same position with the same type.
    7597             : ///
    7598     1517082 : void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
    7599             : #ifndef NDEBUG
    7600             :   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
    7601             :     assert((!From->hasAnyUseOfValue(i) ||
    7602             :             From->getValueType(i) == To->getValueType(i)) &&
    7603             :            "Cannot use this version of ReplaceAllUsesWith!");
    7604             : #endif
    7605             : 
    7606             :   // Handle the trivial case.
    7607     1517082 :   if (From == To)
    7608           0 :     return;
    7609             : 
    7610             :   // Preserve Debug Info. Only do this if there's a use.
    7611     6265566 :   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
    7612     1615701 :     if (From->hasAnyUseOfValue(i)) {
    7613             :       assert((i < To->getNumValues()) && "Invalid To location");
    7614     1525598 :       transferDbgValues(SDValue(From, i), SDValue(To, i));
    7615             :     }
    7616             : 
    7617             :   // Iterate over just the existing users of From. See the comments in
    7618             :   // the ReplaceAllUsesWith above.
    7619     1517082 :   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
    7620             :   RAUWUpdateListener Listener(*this, UI, UE);
    7621     5627288 :   while (UI != UE) {
    7622             :     SDNode *User = *UI;
    7623             : 
    7624             :     // This node is about to morph, remove its old self from the CSE maps.
    7625     2055103 :     RemoveNodeFromCSEMaps(User);
    7626             : 
    7627             :     // A user can appear in a use list multiple times, and when this
    7628             :     // happens the uses are usually next to each other in the list.
    7629             :     // To help reduce the number of CSE recomputations, process all
    7630             :     // the uses of this user that we can find this way.
    7631             :     do {
    7632             :       SDUse &Use = UI.getUse();
    7633             :       ++UI;
    7634             :       Use.setNode(To);
    7635     2061854 :       if (To->isDivergent() != From->isDivergent())
    7636         203 :         updateDivergence(User);
    7637     2607304 :     } while (UI != UE && *UI == User);
    7638             : 
    7639             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7640             :     // already exists there, recursively merge the results together.
    7641     2055103 :     AddModifiedNodeToCSEMaps(User);
    7642             :   }
    7643             : 
    7644             :   // If we just RAUW'd the root, take note.
    7645     1517082 :   if (From == getRoot().getNode())
    7646       12200 :     setRoot(SDValue(To, getRoot().getResNo()));
    7647             : }
    7648             : 
    7649             : /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
    7650             : /// This can cause recursive merging of nodes in the DAG.
    7651             : ///
    7652             : /// This version can replace From with any result values.  To must match the
    7653             : /// number and types of values returned by From.
    7654     1061387 : void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
    7655     2122774 :   if (From->getNumValues() == 1)  // Handle the simple case efficiently.
    7656      607432 :     return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
    7657             : 
    7658             :   // Preserve Debug Info.
    7659     2273315 :   for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
    7660      909680 :     transferDbgValues(SDValue(From, i), *To);
    7661             : 
    7662             :   // Iterate over just the existing users of From. See the comments in
    7663             :   // the ReplaceAllUsesWith above.
    7664      453955 :   SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
    7665             :   RAUWUpdateListener Listener(*this, UI, UE);
    7666     2057523 :   while (UI != UE) {
    7667             :     SDNode *User = *UI;
    7668             : 
    7669             :     // This node is about to morph, remove its old self from the CSE maps.
    7670      801784 :     RemoveNodeFromCSEMaps(User);
    7671             : 
    7672             :     // A user can appear in a use list multiple times, and when this
    7673             :     // happens the uses are usually next to each other in the list.
    7674             :     // To help reduce the number of CSE recomputations, process all
    7675             :     // the uses of this user that we can find this way.
    7676             :     do {
    7677             :       SDUse &Use = UI.getUse();
    7678      806604 :       const SDValue &ToOp = To[Use.getResNo()];
    7679             :       ++UI;
    7680      806604 :       Use.set(ToOp);
    7681     1613208 :       if (To->getNode()->isDivergent() != From->isDivergent())
    7682         413 :         updateDivergence(User);
    7683     1160977 :     } while (UI != UE && *UI == User);
    7684             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7685             :     // already exists there, recursively merge the results together.
    7686      801784 :     AddModifiedNodeToCSEMaps(User);
    7687             :   }
    7688             : 
    7689             :   // If we just RAUW'd the root, take note.
    7690      453955 :   if (From == getRoot().getNode())
    7691           8 :     setRoot(SDValue(To[getRoot().getResNo()]));
    7692             : }
    7693             : 
    7694             : /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
    7695             : /// uses of other values produced by From.getNode() alone.  The Deleted
    7696             : /// vector is handled the same way as for ReplaceAllUsesWith.
    7697     2365227 : void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
    7698             :   // Handle the really simple, really trivial case efficiently.
    7699      845494 :   if (From == To) return;
    7700             : 
    7701             :   // Handle the simple, trivial, case efficiently.
    7702     2364705 :   if (From.getNode()->getNumValues() == 1) {
    7703      844972 :     ReplaceAllUsesWith(From, To);
    7704      844972 :     return;
    7705             :   }
    7706             : 
    7707             :   // Preserve Debug Info.
    7708     1519733 :   transferDbgValues(From, To);
    7709             : 
    7710             :   // Iterate over just the existing users of From. See the comments in
    7711             :   // the ReplaceAllUsesWith above.
    7712     1519733 :   SDNode::use_iterator UI = From.getNode()->use_begin(),
    7713             :                        UE = From.getNode()->use_end();
    7714             :   RAUWUpdateListener Listener(*this, UI, UE);
    7715     3780755 :   while (UI != UE) {
    7716             :     SDNode *User = *UI;
    7717             :     bool UserRemovedFromCSEMaps = false;
    7718             : 
    7719             :     // A user can appear in a use list multiple times, and when this
    7720             :     // happens the uses are usually next to each other in the list.
    7721             :     // To help reduce the number of CSE recomputations, process all
    7722             :     // the uses of this user that we can find this way.
    7723             :     do {
    7724             :       SDUse &Use = UI.getUse();
    7725             : 
    7726             :       // Skip uses of different values from the same node.
    7727     3460551 :       if (Use.getResNo() != From.getResNo()) {
    7728             :         ++UI;
    7729     1092886 :         continue;
    7730             :       }
    7731             : 
    7732             :       // If this node hasn't been modified yet, it's still in the CSE maps,
    7733             :       // so remove its old self from the CSE maps.
    7734     1274779 :       if (!UserRemovedFromCSEMaps) {
    7735     1273570 :         RemoveNodeFromCSEMaps(User);
    7736             :         UserRemovedFromCSEMaps = true;
    7737             :       }
    7738             : 
    7739             :       ++UI;
    7740     1274779 :       Use.set(To);
    7741     2549558 :       if (To->isDivergent() != From->isDivergent())
    7742         805 :         updateDivergence(User);
    7743     3273181 :     } while (UI != UE && *UI == User);
    7744             :     // We are iterating over all uses of the From node, so if a use
    7745             :     // doesn't use the specific value, no changes are made.
    7746     2261022 :     if (!UserRemovedFromCSEMaps)
    7747      987452 :       continue;
    7748             : 
    7749             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7750             :     // already exists there, recursively merge the results together.
    7751     1273570 :     AddModifiedNodeToCSEMaps(User);
    7752             :   }
    7753             : 
    7754             :   // If we just RAUW'd the root, take note.
    7755             :   if (From == getRoot())
    7756       28812 :     setRoot(To);
    7757             : }
    7758             : 
    7759             : namespace {
    7760             : 
    7761             :   /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
    7762             :   /// to record information about a use.
    7763             :   struct UseMemo {
    7764             :     SDNode *User;
    7765             :     unsigned Index;
    7766             :     SDUse *Use;
    7767             :   };
    7768             : 
    7769             :   /// operator< - Sort Memos by User.
    7770             :   bool operator<(const UseMemo &L, const UseMemo &R) {
    7771        1577 :     return (intptr_t)L.User < (intptr_t)R.User;
    7772             :   }
    7773             : 
    7774             : } // end anonymous namespace
    7775             : 
    7776      188056 : void SelectionDAG::updateDivergence(SDNode * N)
    7777             : {
    7778      188056 :   if (TLI->isSDNodeAlwaysUniform(N))
    7779             :     return;
    7780      184127 :   bool IsDivergent = TLI->isSDNodeSourceOfDivergence(N, FLI, DA);
    7781     1140697 :   for (auto &Op : N->ops()) {
    7782      478285 :     if (Op.Val.getValueType() != MVT::Other)
    7783      371166 :       IsDivergent |= Op.getNode()->isDivergent();
    7784             :   }
    7785      184127 :   if (N->SDNodeBits.IsDivergent != IsDivergent) {
    7786        2872 :     N->SDNodeBits.IsDivergent = IsDivergent;
    7787        5985 :     for (auto U : N->uses()) {
    7788        3113 :       updateDivergence(U);
    7789             :     }
    7790             :   }
    7791             : }
    7792             : 
    7793             : 
    7794       92305 : void SelectionDAG::CreateTopologicalOrder(std::vector<SDNode*>& Order) {
    7795             :   DenseMap<SDNode *, unsigned> Degree;
    7796       92305 :   Order.reserve(AllNodes.size());
    7797     2716071 :   for (auto & N : allnodes()) {
    7798     2623766 :     unsigned NOps = N.getNumOperands();
    7799     5247532 :     Degree[&N] = NOps;
    7800     2623766 :     if (0 == NOps)
    7801     1665134 :       Order.push_back(&N);
    7802             :   }
    7803             :   for (std::vector<SDNode *>::iterator I = Order.begin();
    7804     2716071 :   I!=Order.end();++I) {
    7805     2623766 :     SDNode * N = *I;
    7806    10952652 :     for (auto U : N->uses()) {
    7807             :       unsigned &UnsortedOps = Degree[U];
    7808     4164443 :       if (0 == --UnsortedOps)
    7809     1791199 :         Order.push_back(U);
    7810             :     }
    7811             :   }
    7812       92305 : }
    7813             : 
    7814       92305 : void SelectionDAG::VerifyDAGDiverence()
    7815             : {
    7816             :   std::vector<SDNode*> TopoOrder;
    7817       92305 :   CreateTopologicalOrder(TopoOrder);
    7818       92305 :   const TargetLowering &TLI = getTargetLoweringInfo();
    7819             :   DenseMap<const SDNode *, bool> DivergenceMap;
    7820     2716071 :   for (auto &N : allnodes()) {
    7821     5247532 :     DivergenceMap[&N] = false;
    7822             :   }
    7823     2716071 :   for (auto N : TopoOrder) {
    7824     5247532 :     bool IsDivergent = DivergenceMap[N];
    7825     2623766 :     bool IsSDNodeDivergent = TLI.isSDNodeSourceOfDivergence(N, FLI, DA);
    7826    10952652 :     for (auto &Op : N->ops()) {
    7827     4164443 :       if (Op.Val.getValueType() != MVT::Other)
    7828     6257632 :         IsSDNodeDivergent |= DivergenceMap[Op.getNode()];
    7829             :     }
    7830     2623766 :     if (!IsDivergent && IsSDNodeDivergent && !TLI.isSDNodeAlwaysUniform(N)) {
    7831      813748 :       DivergenceMap[N] = true;
    7832             :     }
    7833             :   }
    7834     2716071 :   for (auto &N : allnodes()) {
    7835             :     (void)N;
    7836             :     assert(DivergenceMap[&N] == N.isDivergent() &&
    7837             :            "Divergence bit inconsistency detected\n");
    7838             :   }
    7839       92305 : }
    7840             : 
    7841             : 
    7842             : /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
    7843             : /// uses of other values produced by From.getNode() alone.  The same value
    7844             : /// may appear in both the From and To list.  The Deleted vector is
    7845             : /// handled the same way as for ReplaceAllUsesWith.
    7846         870 : void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
    7847             :                                               const SDValue *To,
    7848             :                                               unsigned Num){
    7849             :   // Handle the simple, trivial case efficiently.
    7850         870 :   if (Num == 1)
    7851           0 :     return ReplaceAllUsesOfValueWith(*From, *To);
    7852             : 
    7853         870 :   transferDbgValues(*From, *To);
    7854             : 
    7855             :   // Read up all the uses and make records of them. This helps
    7856             :   // processing new uses that are introduced during the
    7857             :   // replacement process.
    7858             :   SmallVector<UseMemo, 4> Uses;
    7859        4820 :   for (unsigned i = 0; i != Num; ++i) {
    7860        1975 :     unsigned FromResNo = From[i].getResNo();
    7861        1975 :     SDNode *FromNode = From[i].getNode();
    7862        1975 :     for (SDNode::use_iterator UI = FromNode->use_begin(),
    7863        5793 :          E = FromNode->use_end(); UI != E; ++UI) {
    7864             :       SDUse &Use = UI.getUse();
    7865        3818 :       if (Use.getResNo() == FromResNo) {
    7866        1850 :         UseMemo Memo = { *UI, i, &Use };
    7867        1850 :         Uses.push_back(Memo);
    7868             :       }
    7869             :     }
    7870             :   }
    7871             : 
    7872             :   // Sort the uses, so that all the uses from a given User are together.
    7873             :   llvm::sort(Uses.begin(), Uses.end());
    7874             : 
    7875        2625 :   for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
    7876        2625 :        UseIndex != UseIndexEnd; ) {
    7877             :     // We know that this user uses some value of From.  If it is the right
    7878             :     // value, update it.
    7879        3510 :     SDNode *User = Uses[UseIndex].User;
    7880             : 
    7881             :     // This node is about to morph, remove its old self from the CSE maps.
    7882        1755 :     RemoveNodeFromCSEMaps(User);
    7883             : 
    7884             :     // The Uses array is sorted, so all the uses for a given User
    7885             :     // are next to each other in the list.
    7886             :     // To help reduce the number of CSE recomputations, process all
    7887             :     // the uses of this user that we can find this way.
    7888             :     do {
    7889        3700 :       unsigned i = Uses[UseIndex].Index;
    7890        1850 :       SDUse &Use = *Uses[UseIndex].Use;
    7891        1850 :       ++UseIndex;
    7892             : 
    7893        1850 :       Use.set(To[i]);
    7894        2830 :     } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
    7895             : 
    7896             :     // Now that we have modified User, add it back to the CSE maps.  If it
    7897             :     // already exists there, recursively merge the results together.
    7898        1755 :     AddModifiedNodeToCSEMaps(User);
    7899             :   }
    7900             : }
    7901             : 
    7902             : /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
    7903             : /// based on their topological order. It returns the maximum id and a vector
    7904             : /// of the SDNodes* in assigned order by reference.
    7905      865476 : unsigned SelectionDAG::AssignTopologicalOrder() {
    7906             :   unsigned DAGSize = 0;
    7907             : 
    7908             :   // SortedPos tracks the progress of the algorithm. Nodes before it are
    7909             :   // sorted, nodes after it are unsorted. When the algorithm completes
    7910             :   // it is at the end of the list.
    7911             :   allnodes_iterator SortedPos = allnodes_begin();
    7912             : 
    7913             :   // Visit all the nodes. Move nodes with no operands to the front of
    7914             :   // the list immediately. Annotate nodes that do have operands with their
    7915             :   // operand count. Before we do this, the Node Id fields of the nodes
    7916             :   // may contain arbitrary values. After, the Node Id fields for nodes
    7917             :   // before SortedPos will contain the topological sort index, and the
    7918             :   // Node Id fields for nodes At SortedPos and after will contain the
    7919             :   // count of outstanding operands.
    7920    24126013 :   for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
    7921             :     SDNode *N = &*I++;
    7922    23260537 :     checkForCycles(N, this);
    7923    23260537 :     unsigned Degree = N->getNumOperands();
    7924    23260537 :     if (Degree == 0) {
    7925             :       // A node with no uses, add it to the result array immediately.
    7926     9826476 :       N->setNodeId(DAGSize++);
    7927             :       allnodes_iterator Q(N);
    7928     9826476 :       if (Q != SortedPos)
    7929             :         SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
    7930             :       assert(SortedPos != AllNodes.end() && "Overran node list");
    7931             :       ++SortedPos;
    7932             :     } else {
    7933             :       // Temporarily use the Node Id as scratch space for the degree count.
    7934    13434061 :       N->setNodeId(Degree);
    7935             :     }
    7936             :   }
    7937             : 
    7938             :   // Visit all the nodes. As we iterate, move nodes into sorted order,
    7939             :   // such that by the time the end is reached all nodes will be sorted.
    7940    24126013 :   for (SDNode &Node : allnodes()) {
    7941             :     SDNode *N = &Node;
    7942    23260537 :     checkForCycles(N, this);
    7943             :     // N is in sorted position, so all its uses have one less operand
    7944             :     // that needs to be sorted.
    7945    23260537 :     for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
    7946    60898042 :          UI != UE; ++UI) {
    7947             :       SDNode *P = *UI;
    7948    37637505 :       unsigned Degree = P->getNodeId();
    7949             :       assert(Degree != 0 && "Invalid node degree");
    7950    37637505 :       --Degree;
    7951    37637505 :       if (Degree == 0) {
    7952             :         // All of P's operands are sorted, so P may sorted now.
    7953    13434061 :         P->setNodeId(DAGSize++);
    7954    13434061 :         if (P->getIterator() != SortedPos)
    7955             :           SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
    7956             :         assert(SortedPos != AllNodes.end() && "Overran node list");
    7957             :         ++SortedPos;
    7958             :       } else {
    7959             :         // Update P's outstanding operand count.
    7960    24203444 :         P->setNodeId(Degree);
    7961             :       }
    7962             :     }
    7963    23260537 :     if (Node.getIterator() == SortedPos) {
    7964             : #ifndef NDEBUG
    7965             :       allnodes_iterator I(N);
    7966             :       SDNode *S = &*++I;
    7967             :       dbgs() << "Overran sorted position:\n";
    7968             :       S->dumprFull(this); dbgs() << "\n";
    7969             :       dbgs() << "Checking if this is due to cycles\n";
    7970             :       checkForCycles(this, true);
    7971             : #endif
    7972           0 :       llvm_unreachable(nullptr);
    7973             :     }
    7974             :   }
    7975             : 
    7976             :   assert(SortedPos == AllNodes.end() &&
    7977             :          "Topological sort incomplete!");
    7978             :   assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
    7979             :          "First node in topological sort is not the entry token!");
    7980             :   assert(AllNodes.front().getNodeId() == 0 &&
    7981             :          "First node in topological sort has non-zero id!");
    7982             :   assert(AllNodes.front().getNumOperands() == 0 &&
    7983             :          "First node in topological sort has operands!");
    7984             :   assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
    7985             :          "Last node in topologic sort has unexpected id!");
    7986             :   assert(AllNodes.back().use_empty() &&
    7987             :          "Last node in topologic sort has users!");
    7988             :   assert(DAGSize == allnodes_size() && "Node count mismatch!");
    7989      865476 :   return DAGSize;
    7990             : }
    7991             : 
    7992             : /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
    7993             : /// value is produced by SD.
    7994       34819 : void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
    7995       34819 :   if (SD) {
    7996             :     assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
    7997             :     SD->setHasDebugValue(true);
    7998             :   }
    7999       34819 :   DbgInfo->add(DB, SD, isParameter);
    8000       34819 : }
    8001             : 
    8002           0 : void SelectionDAG::AddDbgLabel(SDDbgLabel *DB) {
    8003           0 :   DbgInfo->add(DB);
    8004           0 : }
    8005             : 
    8006        3256 : SDValue SelectionDAG::makeEquivalentMemoryOrdering(LoadSDNode *OldLoad,
    8007             :                                                    SDValue NewMemOp) {
    8008             :   assert(isa<MemSDNode>(NewMemOp.getNode()) && "Expected a memop node");
    8009             :   // The new memory operation must have the same position as the old load in
    8010             :   // terms of memory dependency. Create a TokenFactor for the old load and new
    8011             :   // memory operation and update uses of the old load's output chain to use that
    8012             :   // TokenFactor.
    8013             :   SDValue OldChain = SDValue(OldLoad, 1);
    8014        3256 :   SDValue NewChain = SDValue(NewMemOp.getNode(), 1);
    8015        3256 :   if (!OldLoad->hasAnyUseOfValue(1))
    8016        2899 :     return NewChain;
    8017             : 
    8018             :   SDValue TokenFactor =
    8019         714 :       getNode(ISD::TokenFactor, SDLoc(OldLoad), MVT::Other, OldChain, NewChain);
    8020         357 :   ReplaceAllUsesOfValueWith(OldChain, TokenFactor);
    8021         357 :   UpdateNodeOperands(TokenFactor.getNode(), OldChain, NewChain);
    8022         357 :   return TokenFactor;
    8023             : }
    8024             : 
    8025             : //===----------------------------------------------------------------------===//
    8026             : //                              SDNode Class
    8027             : //===----------------------------------------------------------------------===//
    8028             : 
    8029     4103726 : bool llvm::isNullConstant(SDValue V) {
    8030             :   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
    8031     5464998 :   return Const != nullptr && Const->isNullValue();
    8032             : }
    8033             : 
    8034      692613 : bool llvm::isNullFPConstant(SDValue V) {
    8035             :   ConstantFPSDNode *Const = dyn_cast<ConstantFPSDNode>(V);
    8036      114753 :   return Const != nullptr && Const->isZero() && !Const->isNegative();
    8037             : }
    8038             : 
    8039      666370 : bool llvm::isAllOnesConstant(SDValue V) {
    8040             :   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
    8041      959118 :   return Const != nullptr && Const->isAllOnesValue();
    8042             : }
    8043             : 
    8044      197049 : bool llvm::isOneConstant(SDValue V) {
    8045             :   ConstantSDNode *Const = dyn_cast<ConstantSDNode>(V);
    8046      215110 :   return Const != nullptr && Const->isOne();
    8047             : }
    8048             : 
    8049     2067410 : bool llvm::isBitwiseNot(SDValue V) {
    8050     2069797 :   return V.getOpcode() == ISD::XOR && isAllOnesConstant(V.getOperand(1));
    8051             : }
    8052             : 
    8053     7187594 : ConstantSDNode *llvm::isConstOrConstSplat(SDValue N) {
    8054             :   if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(N))
    8055             :     return CN;
    8056             : 
    8057             :   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) {
    8058             :     BitVector UndefElements;
    8059      154212 :     ConstantSDNode *CN = BV->getConstantSplatNode(&UndefElements);
    8060             : 
    8061             :     // BuildVectors can truncate their operands. Ignore that case here.
    8062             :     // FIXME: We blindly ignore splats which include undef which is overly
    8063             :     // pessimistic.
    8064      292633 :     if (CN && UndefElements.none() &&
    8065      568398 :         CN->getValueType(0) == N.getValueType().getScalarType())
    8066             :       return CN;
    8067             :   }
    8068             : 
    8069             :   return nullptr;
    8070             : }
    8071             : 
    8072      193747 : ConstantFPSDNode *llvm::isConstOrConstSplatFP(SDValue N) {
    8073             :   if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(N))
    8074             :     return CN;
    8075             : 
    8076             :   if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(N)) {
    8077             :     BitVector UndefElements;
    8078        4460 :     ConstantFPSDNode *CN = BV->getConstantFPSplatNode(&UndefElements);
    8079             : 
    8080        6163 :     if (CN && UndefElements.none())
    8081             :       return CN;
    8082             :   }
    8083             : 
    8084             :   return nullptr;
    8085             : }
    8086             : 
    8087     9220438 : HandleSDNode::~HandleSDNode() {
    8088     4610219 :   DropOperands();
    8089     4610219 : }
    8090             : 
    8091     1446710 : GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
    8092             :                                          const DebugLoc &DL,
    8093             :                                          const GlobalValue *GA, EVT VT,
    8094     1446710 :                                          int64_t o, unsigned char TF)
    8095     4340130 :     : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
    8096     1446710 :   TheGlobal = GA;
    8097     1446710 : }
    8098             : 
    8099         212 : AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, const DebugLoc &dl,
    8100             :                                          EVT VT, unsigned SrcAS,
    8101         212 :                                          unsigned DestAS)
    8102             :     : SDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT)),
    8103         636 :       SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
    8104             : 
    8105     3962221 : MemSDNode::MemSDNode(unsigned Opc, unsigned Order, const DebugLoc &dl,
    8106     3962221 :                      SDVTList VTs, EVT memvt, MachineMemOperand *mmo)
    8107    11886663 :     : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
    8108     7924442 :   MemSDNodeBits.IsVolatile = MMO->isVolatile();
    8109     3962221 :   MemSDNodeBits.IsNonTemporal = MMO->isNonTemporal();
    8110     3962221 :   MemSDNodeBits.IsDereferenceable = MMO->isDereferenceable();
    8111     3962221 :   MemSDNodeBits.IsInvariant = MMO->isInvariant();
    8112             : 
    8113             :   // We check here that the size of the memory operand fits within the size of
    8114             :   // the MMO. This is because the MMO might indicate only a possible address
    8115             :   // range instead of specifying the affected memory addresses precisely.
    8116             :   assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
    8117     3962221 : }
    8118             : 
    8119             : /// Profile - Gather unique data for the node.
    8120             : ///
    8121    36992904 : void SDNode::Profile(FoldingSetNodeID &ID) const {
    8122    36992904 :   AddNodeIDNode(ID, this);
    8123    36992904 : }
    8124             : 
    8125             : namespace {
    8126             : 
    8127       21932 :   struct EVTArray {
    8128             :     std::vector<EVT> VTs;
    8129             : 
    8130       22369 :     EVTArray() {
    8131       22369 :       VTs.reserve(MVT::LAST_VALUETYPE);
    8132     5122501 :       for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
    8133     5100132 :         VTs.push_back(MVT((MVT::SimpleValueType)i));
    8134       22369 :     }
    8135             :   };
    8136             : 
    8137             : } // end anonymous namespace
    8138             : 
    8139             : static ManagedStatic<std::set<EVT, EVT::compareRawBits>> EVTs;
    8140             : static ManagedStatic<EVTArray> SimpleVTArray;
    8141             : static ManagedStatic<sys::SmartMutex<true>> VTMutex;
    8142             : 
    8143             : /// getValueTypeList - Return a pointer to the specified value type.
    8144             : ///
    8145    43587388 : const EVT *SDNode::getValueTypeList(EVT VT) {
    8146    43587388 :   if (VT.isExtended()) {
    8147       85115 :     sys::SmartScopedLock<true> Lock(*VTMutex);
    8148             :     return &(*EVTs->insert(VT).first);
    8149             :   } else {
    8150             :     assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
    8151             :            "Value type out of range!");
    8152   130506817 :     return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
    8153             :   }
    8154             : }
    8155             : 
    8156             : /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
    8157             : /// indicated value.  This method ignores uses of other values defined by this
    8158             : /// operation.
    8159     9031683 : bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
    8160             :   assert(Value < getNumValues() && "Bad value!");
    8161             : 
    8162             :   // TODO: Only iterate over uses of a given value of the node
    8163     9031683 :   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
    8164    13661327 :     if (UI.getUse().getResNo() == Value) {
    8165    11872793 :       if (NUses == 0)
    8166             :         return false;
    8167     9031427 :       --NUses;
    8168             :     }
    8169             :   }
    8170             : 
    8171             :   // Found exactly the right number of uses?
    8172     6190317 :   return NUses == 0;
    8173             : }
    8174             : 
    8175             : /// hasAnyUseOfValue - Return true if there are any use of the indicated
    8176             : /// value. This method ignores uses of other values defined by this operation.
    8177     8853567 : bool SDNode::hasAnyUseOfValue(unsigned Value) const {
    8178             :   assert(Value < getNumValues() && "Bad value!");
    8179             : 
    8180     8853567 :   for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
    8181    10367765 :     if (UI.getUse().getResNo() == Value)
    8182             :       return true;
    8183             : 
    8184             :   return false;
    8185             : }
    8186             : 
    8187             : /// isOnlyUserOf - Return true if this node is the only use of N.
    8188      333039 : bool SDNode::isOnlyUserOf(const SDNode *N) const {
    8189             :   bool Seen = false;
    8190      333039 :   for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
    8191             :     SDNode *User = *I;
    8192      390786 :     if (User == this)
    8193             :       Seen = true;
    8194             :     else
    8195             :       return false;
    8196             :   }
    8197             : 
    8198             :   return Seen;
    8199             : }
    8200             : 
    8201             : /// Return true if the only users of N are contained in Nodes.
    8202       35853 : bool SDNode::areOnlyUsersOf(ArrayRef<const SDNode *> Nodes, const SDNode *N) {
    8203             :   bool Seen = false;
    8204       35853 :   for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
    8205       59237 :     SDNode *User = *I;
    8206       59237 :     if (llvm::any_of(Nodes,
    8207       78388 :                      [&User](const SDNode *Node) { return User == Node; }))
    8208             :       Seen = true;
    8209             :     else
    8210       33117 :       return false;
    8211             :   }
    8212             : 
    8213             :   return Seen;
    8214             : }
    8215             : 
    8216             : /// isOperand - Return true if this node is an operand of N.
    8217      544003 : bool SDValue::isOperandOf(const SDNode *N) const {
    8218     2730575 :   for (const SDValue &Op : N->op_values())
    8219             :     if (*this == Op)
    8220             :       return true;
    8221             :   return false;
    8222             : }
    8223             : 
    8224        2489 : bool SDNode::isOperandOf(const SDNode *N) const {
    8225        7031 :   for (const SDValue &Op : N->op_values())
    8226        6375 :     if (this == Op.getNode())
    8227             :       return true;
    8228             :   return false;
    8229             : }
    8230             : 
    8231             : /// reachesChainWithoutSideEffects - Return true if this operand (which must
    8232             : /// be a chain) reaches the specified operand without crossing any
    8233             : /// side-effecting instructions on any chain path.  In practice, this looks
    8234             : /// through token factors and non-volatile loads.  In order to remain efficient,
    8235             : /// this only looks a couple of nodes in, it does not do an exhaustive search.
    8236             : ///
    8237             : /// Note that we only need to examine chains when we're searching for
    8238             : /// side-effects; SelectionDAG requires that all side-effects are represented
    8239             : /// by chains, even if another operand would force a specific ordering. This
    8240             : /// constraint is necessary to allow transformations like splitting loads.
    8241        2278 : bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
    8242             :                                              unsigned Depth) const {
    8243             :   if (*this == Dest) return true;
    8244             : 
    8245             :   // Don't search too deeply, we just want to be able to see through
    8246             :   // TokenFactor's etc.
    8247         837 :   if (Depth == 0) return false;
    8248             : 
    8249             :   // If this is a token factor, all inputs to the TF happen in parallel.
    8250         800 :   if (getOpcode() == ISD::TokenFactor) {
    8251             :     // First, try a shallow search.
    8252          57 :     if (is_contained((*this)->ops(), Dest)) {
    8253             :       // We found the chain we want as an operand of this TokenFactor.
    8254             :       // Essentially, we reach the chain without side-effects if we could
    8255             :       // serialize the TokenFactor into a simple chain of operations with
    8256             :       // Dest as the last operation. This is automatically true if the
    8257             :       // chain has one use: there are no other ordering constraints.
    8258             :       // If the chain has more than one use, we give up: some other
    8259             :       // use of Dest might force a side-effect between Dest and the current
    8260             :       // node.
    8261          72 :       if (Dest.hasOneUse())
    8262             :         return true;
    8263             :     }
    8264             :     // Next, try a deep search: check whether every operand of the TokenFactor
    8265             :     // reaches Dest.
    8266         126 :     return llvm::all_of((*this)->ops(), [=](SDValue Op) {
    8267          53 :       return Op.reachesChainWithoutSideEffects(Dest, Depth - 1);
    8268          97 :     });
    8269             :   }
    8270             : 
    8271             :   // Loads don't have side effects, look through them.
    8272             :   if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
    8273          82 :     if (!Ld->isVolatile())
    8274          82 :       return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
    8275             :   }
    8276             :   return false;
    8277             : }
    8278             : 
    8279        5535 : bool SDNode::hasPredecessor(const SDNode *N) const {
    8280             :   SmallPtrSet<const SDNode *, 32> Visited;
    8281             :   SmallVector<const SDNode *, 16> Worklist;
    8282        5535 :   Worklist.push_back(this);
    8283       11070 :   return hasPredecessorHelper(N, Visited, Worklist);
    8284             : }
    8285             : 
    8286      658606 : void SDNode::intersectFlagsWith(const SDNodeFlags Flags) {
    8287      658606 :   this->Flags.intersectWith(Flags);
    8288      658606 : }
    8289             : 
    8290        5428 : SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
    8291             :   assert(N->getNumValues() == 1 &&
    8292             :          "Can't unroll a vector with multiple results!");
    8293             : 
    8294       10856 :   EVT VT = N->getValueType(0);
    8295        5428 :   unsigned NE = VT.getVectorNumElements();
    8296        5428 :   EVT EltVT = VT.getVectorElementType();
    8297             :   SDLoc dl(N);
    8298             : 
    8299             :   SmallVector<SDValue, 8> Scalars;
    8300       10856 :   SmallVector<SDValue, 4> Operands(N->getNumOperands());
    8301             : 
    8302             :   // If ResNE is 0, fully unroll the vector op.
    8303        5428 :   if (ResNE == 0)
    8304             :     ResNE = NE;
    8305          13 :   else if (NE > ResNE)
    8306             :     NE = ResNE;
    8307             : 
    8308             :   unsigned i;
    8309       38144 :   for (i= 0; i != NE; ++i) {
    8310       81636 :     for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
    8311       48920 :       SDValue Operand = N->getOperand(j);
    8312       24460 :       EVT OperandVT = Operand.getValueType();
    8313       24460 :       if (OperandVT.isVector()) {
    8314             :         // A vector operand; extract a single element.
    8315       23962 :         EVT OperandEltVT = OperandVT.getVectorElementType();
    8316       23962 :         Operands[j] =
    8317       47924 :             getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
    8318       95848 :                     getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
    8319             :       } else {
    8320             :         // A scalar operand; just use it as is.
    8321         498 :         Operands[j] = Operand;
    8322             :       }
    8323             :     }
    8324             : 
    8325       32716 :     switch (N->getOpcode()) {
    8326       15740 :     default: {
    8327       15740 :       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands,
    8328       15740 :                                 N->getFlags()));
    8329       15740 :       break;
    8330             :     }
    8331             :     case ISD::VSELECT:
    8332          52 :       Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
    8333          52 :       break;
    8334             :     case ISD::SHL:
    8335             :     case ISD::SRA:
    8336             :     case ISD::SRL:
    8337             :     case ISD::ROTL:
    8338             :     case ISD::ROTR:
    8339         494 :       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
    8340             :                                getShiftAmountOperand(Operands[0].getValueType(),
    8341        1976 :                                                      Operands[1])));
    8342         494 :       break;
    8343             :     case ISD::SIGN_EXTEND_INREG:
    8344             :     case ISD::FP_ROUND_INREG: {
    8345          72 :       EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
    8346          72 :       Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
    8347             :                                 Operands[0],
    8348         216 :                                 getValueType(ExtVT)));
    8349             :     }
    8350             :     }
    8351             :   }
    8352             : 
    8353        5438 :   for (; i < ResNE; ++i)
    8354           5 :     Scalars.push_back(getUNDEF(EltVT));
    8355             : 
    8356        5428 :   EVT VecVT = EVT::getVectorVT(*getContext(), EltVT, ResNE);
    8357       10856 :   return getBuildVector(VecVT, dl, Scalars);
    8358             : }
    8359             : 
    8360        5469 : bool SelectionDAG::areNonVolatileConsecutiveLoads(LoadSDNode *LD,
    8361             :                                                   LoadSDNode *Base,
    8362             :                                                   unsigned Bytes,
    8363             :                                                   int Dist) const {
    8364       10892 :   if (LD->isVolatile() || Base->isVolatile())
    8365             :     return false;
    8366       10756 :   if (LD->isIndexed() || Base->isIndexed())
    8367             :     return false;
    8368             :   if (LD->getChain() != Base->getChain())
    8369             :     return false;
    8370       10142 :   EVT VT = LD->getValueType(0);
    8371        5071 :   if (VT.getSizeInBits() / 8 != Bytes)
    8372             :     return false;
    8373             : 
    8374        5071 :   auto BaseLocDecomp = BaseIndexOffset::match(Base, *this);
    8375        5071 :   auto LocDecomp = BaseIndexOffset::match(LD, *this);
    8376             : 
    8377        5071 :   int64_t Offset = 0;
    8378        5071 :   if (BaseLocDecomp.equalBaseIndex(LocDecomp, *this, Offset))
    8379        4822 :     return (Dist * Bytes == Offset);
    8380             :   return false;
    8381             : }
    8382             : 
    8383             : /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
    8384             : /// it cannot be inferred.
    8385     5645750 : unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
    8386             :   // If this is a GlobalAddress + cst, return the alignment.
    8387             :   const GlobalValue *GV;
    8388     5645750 :   int64_t GVOffset = 0;
    8389     5645750 :   if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
    8390     5568105 :     unsigned IdxWidth = getDataLayout().getIndexTypeSizeInBits(GV->getType());
    8391     1860541 :     KnownBits Known(IdxWidth);
    8392     3712070 :     llvm::computeKnownBits(GV, Known, getDataLayout());
    8393     1856035 :     unsigned AlignBits = Known.countMinTrailingZeros();
    8394     3707564 :     unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
    8395     1851529 :     if (Align)
    8396     3703058 :       return MinAlign(Align, GVOffset);
    8397             :   }
    8398             : 
    8399             :   // If this is a direct reference to a stack slot, use information about the
    8400             :   // stack slot's alignment.
    8401             :   int FrameIdx = 1 << 31;
    8402             :   int64_t FrameOffset = 0;
    8403             :   if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
    8404     1140731 :     FrameIdx = FI->getIndex();
    8405     2653490 :   } else if (isBaseWithConstantOffset(Ptr) &&
    8406             :              isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
    8407             :     // Handle FI+Cst
    8408      270044 :     FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
    8409      270044 :     FrameOffset = Ptr.getConstantOperandVal(1);
    8410             :   }
    8411             : 
    8412     1410775 :   if (FrameIdx != (1 << 31)) {
    8413     1410775 :     const MachineFrameInfo &MFI = getMachineFunction().getFrameInfo();
    8414     2821550 :     unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
    8415     1410775 :                                     FrameOffset);
    8416     1410775 :     return FIInfoAlign;
    8417             :   }
    8418             : 
    8419             :   return 0;
    8420             : }
    8421             : 
    8422             : /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
    8423             : /// which is split (or expanded) into two not necessarily identical pieces.
    8424      103619 : std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
    8425             :   // Currently all types are split in half.
    8426             :   EVT LoVT, HiVT;
    8427      103619 :   if (!VT.isVector())
    8428        1851 :     LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
    8429             :   else
    8430      101768 :     LoVT = HiVT = VT.getHalfNumVectorElementsVT(*getContext());
    8431             : 
    8432      103619 :   return std::make_pair(LoVT, HiVT);
    8433             : }
    8434             : 
    8435             : /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
    8436             : /// low/high part.
    8437             : std::pair<SDValue, SDValue>
    8438       15593 : SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
    8439             :                           const EVT &HiVT) {
    8440             :   assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
    8441             :          N.getValueType().getVectorNumElements() &&
    8442             :          "More vector elements requested than available!");
    8443             :   SDValue Lo, Hi;
    8444       15593 :   Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
    8445       62372 :                getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
    8446       15593 :   Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
    8447       15593 :                getConstant(LoVT.getVectorNumElements(), DL,
    8448       62372 :                            TLI->getVectorIdxTy(getDataLayout())));
    8449       15593 :   return std::make_pair(Lo, Hi);
    8450             : }
    8451             : 
    8452       23168 : void SelectionDAG::ExtractVectorElements(SDValue Op,
    8453             :                                          SmallVectorImpl<SDValue> &Args,
    8454             :                                          unsigned Start, unsigned Count) {
    8455       23168 :   EVT VT = Op.getValueType();
    8456       23168 :   if (Count == 0)
    8457        6467 :     Count = VT.getVectorNumElements();
    8458             : 
    8459       23168 :   EVT EltVT = VT.getVectorElementType();
    8460       46336 :   EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
    8461             :   SDLoc SL(Op);
    8462      118188 :   for (unsigned i = Start, e = Start + Count; i != e; ++i) {
    8463      190040 :     Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
    8464      190040 :                            Op, getConstant(i, SL, IdxTy)));
    8465             :   }
    8466       23168 : }
    8467             : 
    8468             : // getAddressSpace - Return the address space this GlobalAddress belongs to.
    8469        8723 : unsigned GlobalAddressSDNode::getAddressSpace() const {
    8470       17446 :   return getGlobal()->getType()->getAddressSpace();
    8471             : }
    8472             : 
    8473       25450 : Type *ConstantPoolSDNode::getType() const {
    8474       25450 :   if (isMachineConstantPoolEntry())
    8475         260 :     return Val.MachineCPVal->getType();
    8476       25190 :   return Val.ConstVal->getType();
    8477             : }
    8478             : 
    8479      328248 : bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue, APInt &SplatUndef,
    8480             :                                         unsigned &SplatBitSize,
    8481             :                                         bool &HasAnyUndefs,
    8482             :                                         unsigned MinSplatBits,
    8483             :                                         bool IsBigEndian) const {
    8484      656496 :   EVT VT = getValueType(0);
    8485             :   assert(VT.isVector() && "Expected a vector type");
    8486      328248 :   unsigned VecWidth = VT.getSizeInBits();
    8487      328248 :   if (MinSplatBits > VecWidth)
    8488             :     return false;
    8489             : 
    8490             :   // FIXME: The widths are based on this node's type, but build vectors can
    8491             :   // truncate their operands.
    8492      328248 :   SplatValue = APInt(VecWidth, 0);
    8493      328248 :   SplatUndef = APInt(VecWidth, 0);
    8494             : 
    8495             :   // Get the bits. Bits with undefined values (when the corresponding element
    8496             :   // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
    8497             :   // in SplatValue. If any of the values are not constant, give up and return
    8498             :   // false.
    8499      328248 :   unsigned int NumOps = getNumOperands();
    8500             :   assert(NumOps > 0 && "isConstantSplat has 0-size build vector");
    8501             :   unsigned EltWidth = VT.getScalarSizeInBits();
    8502             : 
    8503     2116336 :   for (unsigned j = 0; j < NumOps; ++j) {
    8504      900988 :     unsigned i = IsBigEndian ? NumOps - 1 - j : j;
    8505     1801976 :     SDValue OpVal = getOperand(i);
    8506      900988 :     unsigned BitPos = j * EltWidth;
    8507             : 
    8508      900988 :     if (OpVal.isUndef())
    8509       14380 :       SplatUndef.setBits(BitPos, BitPos + EltWidth);
    8510             :     else if (auto *CN = dyn_cast<ConstantSDNode>(OpVal))
    8511     2623674 :       SplatValue.insertBits(CN->getAPIntValue().zextOrTrunc(EltWidth), BitPos);
    8512             :     else if (auto *CN = dyn_cast<ConstantFPSDNode>(OpVal))
    8513       15318 :       SplatValue.insertBits(CN->getValueAPF().bitcastToAPInt(), BitPos);
    8514             :     else
    8515             :       return false;
    8516             :   }
    8517             : 
    8518             :   // The build_vector is all constants or undefs. Find the smallest element
    8519             :   // size that splats the vector.
    8520      321304 :   HasAnyUndefs = (SplatUndef != 0);
    8521             : 
    8522             :   // FIXME: This does not work for vectors with elements less than 8 bits.
    8523      657065 :   while (VecWidth > 8) {
    8524      653424 :     unsigned HalfSize = VecWidth / 2;
    8525     1306848 :     APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
    8526      653424 :     APInt LowValue = SplatValue.trunc(HalfSize);
    8527     1306848 :     APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
    8528      653424 :     APInt LowUndef = SplatUndef.trunc(HalfSize);
    8529             : 
    8530             :     // If the two halves do not match (ignoring undef bits), stop here.
    8531     4573968 :     if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
    8532             :         MinSplatBits > HalfSize)
    8533             :       break;
    8534             : 
    8535      335761 :     SplatValue = HighValue | LowValue;
    8536      335761 :     SplatUndef = HighUndef & LowUndef;
    8537             : 
    8538             :     VecWidth = HalfSize;
    8539             :   }
    8540             : 
    8541      321304 :   SplatBitSize = VecWidth;
    8542      321304 :   return true;
    8543             : }
    8544             : 
    8545      400213 : SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
    8546      400213 :   if (UndefElements) {
    8547             :     UndefElements->clear();
    8548      377322 :     UndefElements->resize(getNumOperands());
    8549             :   }
    8550             :   SDValue Splatted;
    8551     4322726 :   for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
    8552     3705744 :     SDValue Op = getOperand(i);
    8553     1852872 :     if (Op.isUndef()) {
    8554       25261 :       if (UndefElements)
    8555             :         (*UndefElements)[i] = true;
    8556     1827611 :     } else if (!Splatted) {
    8557             :       Splatted = Op;
    8558             :     } else if (Splatted != Op) {
    8559       91722 :       return SDValue();
    8560             :     }
    8561             :   }
    8562             : 
    8563      308491 :   if (!Splatted) {
    8564             :     assert(getOperand(0).isUndef() &&
    8565             :            "Can only have a splat without a constant for all undefs.");
    8566          85 :     return getOperand(0);
    8567             :   }
    8568             : 
    8569      308406 :   return Splatted;
    8570             : }
    8571             : 
    8572             : ConstantSDNode *
    8573      170429 : BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
    8574      340858 :   return dyn_cast_or_null<ConstantSDNode>(getSplatValue(UndefElements));
    8575             : }
    8576             : 
    8577             : ConstantFPSDNode *
    8578        8278 : BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
    8579       16556 :   return dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements));
    8580             : }
    8581             : 
    8582             : int32_t
    8583          55 : BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
    8584             :                                                    uint32_t BitWidth) const {
    8585             :   if (ConstantFPSDNode *CN =
    8586          56 :           dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements))) {
    8587             :     bool IsExact;
    8588          54 :     APSInt IntVal(BitWidth);
    8589          54 :     const APFloat &APF = CN->getValueAPF();
    8590          54 :     if (APF.convertToInteger(IntVal, APFloat::rmTowardZero, &IsExact) !=
    8591         102 :             APFloat::opOK ||
    8592          48 :         !IsExact)
    8593             :       return -1;
    8594             : 
    8595          48 :     return IntVal.exactLogBase2();
    8596             :   }
    8597             :   return -1;
    8598             : }
    8599             : 
    8600      260203 : bool BuildVectorSDNode::isConstant() const {
    8601     1382287 :   for (const SDValue &Op : op_values()) {
    8602     1165238 :     unsigned Opc = Op.getOpcode();
    8603     1165238 :     if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
    8604             :       return false;
    8605             :   }
    8606             :   return true;
    8607             : }
    8608             : 
    8609       75512 : bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
    8610             :   // Find the first non-undef value in the shuffle mask.
    8611             :   unsigned i, e;
    8612       75512 :   for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
    8613             :     /* search */;
    8614             : 
    8615             :   assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
    8616             : 
    8617             :   // Make sure all remaining elements are either undef or the same as the first
    8618             :   // non-undef value.
    8619      286523 :   for (int Idx = Mask[i]; i != e; ++i)
    8620      271965 :     if (Mask[i] >= 0 && Mask[i] != Idx)
    8621             :       return false;
    8622             :   return true;
    8623             : }
    8624             : 
    8625             : // Returns the SDNode if it is a constant integer BuildVector
    8626             : // or constant integer.
    8627     3983441 : SDNode *SelectionDAG::isConstantIntBuildVectorOrConstantInt(SDValue N) {
    8628             :   if (isa<ConstantSDNode>(N))
    8629             :     return N.getNode();
    8630     3529979 :   if (ISD::isBuildVectorOfConstantSDNodes(N.getNode()))
    8631             :     return N.getNode();
    8632             :   // Treat a GlobalAddress supporting constant offset folding as a
    8633             :   // constant integer.
    8634             :   if (GlobalAddressSDNode *GA = dyn_cast<GlobalAddressSDNode>(N))
    8635      867514 :     if (GA->getOpcode() == ISD::GlobalAddress &&
    8636      433749 :         TLI->isOffsetFoldingLegal(GA))
    8637             :       return GA;
    8638             :   return nullptr;
    8639             : }
    8640             : 
    8641        6010 : SDNode *SelectionDAG::isConstantFPBuildVectorOrConstantFP(SDValue N) {
    8642             :   if (isa<ConstantFPSDNode>(N))
    8643             :     return N.getNode();
    8644             : 
    8645        5672 :   if (ISD::isBuildVectorOfConstantFPSDNodes(N.getNode()))
    8646           4 :     return N.getNode();
    8647             : 
    8648             :   return nullptr;
    8649             : }
    8650             : 
    8651    15069136 : void SelectionDAG::createOperands(SDNode *Node, ArrayRef<SDValue> Vals) {
    8652             :   assert(!Node->OperandList && "Node already has operands");
    8653    15069136 :   SDUse *Ops = OperandRecycler.allocate(
    8654    15069136 :     ArrayRecycler<SDUse>::Capacity::get(Vals.size()), OperandAllocator);
    8655             : 
    8656             :   bool IsDivergent = false;
    8657   106870612 :   for (unsigned I = 0; I != Vals.size(); ++I) {
    8658    45900738 :     Ops[I].setUser(Node);
    8659    45900738 :     Ops[I].setInitial(Vals[I]);
    8660    45900738 :     if (Ops[I].Val.getValueType() != MVT::Other) // Skip Chain. It does not carry divergence.
    8661    69076033 :       IsDivergent = IsDivergent || Ops[I].getNode()->isDivergent();
    8662             :   }
    8663    15069136 :   Node->NumOperands = Vals.size();
    8664    15069136 :   Node->OperandList = Ops;
    8665    15069136 :   IsDivergent |= TLI->isSDNodeSourceOfDivergence(Node, FLI, DA);
    8666    15069136 :   if (!TLI->isSDNodeAlwaysUniform(Node))
    8667    14947244 :     Node->SDNodeBits.IsDivergent = IsDivergent;
    8668    15069136 :   checkForCycles(Node);
    8669    15069136 : }
    8670             : 
    8671             : #ifndef NDEBUG
    8672             : static void checkForCyclesHelper(const SDNode *N,
    8673             :                                  SmallPtrSetImpl<const SDNode*> &Visited,
    8674             :                                  SmallPtrSetImpl<const SDNode*> &Checked,
    8675             :                                  const llvm::SelectionDAG *DAG) {
    8676             :   // If this node has already been checked, don't check it again.
    8677             :   if (Checked.count(N))
    8678             :     return;
    8679             : 
    8680             :   // If a node has already been visited on this depth-first walk, reject it as
    8681             :   // a cycle.
    8682             :   if (!Visited.insert(N).second) {
    8683             :     errs() << "Detected cycle in SelectionDAG\n";
    8684             :     dbgs() << "Offending node:\n";
    8685             :     N->dumprFull(DAG); dbgs() << "\n";
    8686             :     abort();
    8687             :   }
    8688             : 
    8689             :   for (const SDValue &Op : N->op_values())
    8690             :     checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
    8691             : 
    8692             :   Checked.insert(N);
    8693             :   Visited.erase(N);
    8694             : }
    8695             : #endif
    8696             : 
    8697    72846362 : void llvm::checkForCycles(const llvm::SDNode *N,
    8698             :                           const llvm::SelectionDAG *DAG,
    8699             :                           bool force) {
    8700             : #ifndef NDEBUG
    8701             :   bool check = force;
    8702             : #ifdef EXPENSIVE_CHECKS
    8703             :   check = true;
    8704             : #endif  // EXPENSIVE_CHECKS
    8705             :   if (check) {
    8706             :     assert(N && "Checking nonexistent SDNode");
    8707             :     SmallPtrSet<const SDNode*, 32> visited;
    8708             :     SmallPtrSet<const SDNode*, 32> checked;
    8709             :     checkForCyclesHelper(N, visited, checked, DAG);
    8710             :   }
    8711             : #endif  // !NDEBUG
    8712    72846362 : }
    8713             : 
    8714     5628076 : void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
    8715     5628076 :   checkForCycles(DAG->getRoot().getNode(), DAG, force);
    8716     5931583 : }

Generated by: LCOV version 1.13