LCOV - code coverage report
Current view: top level - lib/CodeGen/SelectionDAG - SelectionDAGBuilder.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 77 79 97.5 %
Date: 2017-09-14 15:23:50 Functions: 33 34 97.1 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- SelectionDAGBuilder.h - Selection-DAG building --------*- C++ -*---===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This implements routines for translating from LLVM IR into SelectionDAG IR.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
      15             : #define LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
      16             : 
      17             : #include "StatepointLowering.h"
      18             : #include "llvm/ADT/APInt.h"
      19             : #include "llvm/ADT/DenseMap.h"
      20             : #include "llvm/Analysis/AliasAnalysis.h"
      21             : #include "llvm/CodeGen/SelectionDAG.h"
      22             : #include "llvm/CodeGen/SelectionDAGNodes.h"
      23             : #include "llvm/IR/CallSite.h"
      24             : #include "llvm/IR/Constants.h"
      25             : #include "llvm/IR/Statepoint.h"
      26             : #include "llvm/Support/ErrorHandling.h"
      27             : #include "llvm/Target/TargetLowering.h"
      28             : #include <utility>
      29             : #include <vector>
      30             : 
      31             : namespace llvm {
      32             : 
      33             : class AddrSpaceCastInst;
      34             : class AllocaInst;
      35             : class BasicBlock;
      36             : class BitCastInst;
      37             : class BranchInst;
      38             : class CallInst;
      39             : class DbgValueInst;
      40             : class ExtractElementInst;
      41             : class FCmpInst;
      42             : class FPExtInst;
      43             : class FPToSIInst;
      44             : class FPToUIInst;
      45             : class FPTruncInst;
      46             : class Function;
      47             : class FunctionLoweringInfo;
      48             : class GetElementPtrInst;
      49             : class GCFunctionInfo;
      50             : class ICmpInst;
      51             : class IntToPtrInst;
      52             : class IndirectBrInst;
      53             : class InvokeInst;
      54             : class InsertElementInst;
      55             : class Instruction;
      56             : class LoadInst;
      57             : class MachineBasicBlock;
      58             : class MachineInstr;
      59             : class MachineRegisterInfo;
      60             : class MDNode;
      61             : class MVT;
      62             : class PHINode;
      63             : class PtrToIntInst;
      64             : class ReturnInst;
      65             : class SDDbgValue;
      66             : class SExtInst;
      67             : class SelectInst;
      68             : class ShuffleVectorInst;
      69             : class SIToFPInst;
      70             : class StoreInst;
      71             : class SwitchInst;
      72             : class DataLayout;
      73             : class TargetLibraryInfo;
      74             : class TargetLowering;
      75             : class TruncInst;
      76             : class UIToFPInst;
      77             : class UnreachableInst;
      78             : class VAArgInst;
      79             : class ZExtInst;
      80             : 
      81             : //===----------------------------------------------------------------------===//
      82             : /// SelectionDAGBuilder - This is the common target-independent lowering
      83             : /// implementation that is parameterized by a TargetLowering object.
      84             : ///
      85      147360 : class SelectionDAGBuilder {
      86             :   /// CurInst - The current instruction being visited
      87             :   const Instruction *CurInst;
      88             : 
      89             :   DenseMap<const Value*, SDValue> NodeMap;
      90             : 
      91             :   /// UnusedArgNodeMap - Maps argument value for unused arguments. This is used
      92             :   /// to preserve debug information for incoming arguments.
      93             :   DenseMap<const Value*, SDValue> UnusedArgNodeMap;
      94             : 
      95             :   /// DanglingDebugInfo - Helper type for DanglingDebugInfoMap.
      96     2932668 :   class DanglingDebugInfo {
      97             :     const DbgValueInst* DI;
      98             :     DebugLoc dl;
      99             :     unsigned SDNodeOrder;
     100             :   public:
     101     1537318 :     DanglingDebugInfo() : DI(nullptr), dl(DebugLoc()), SDNodeOrder(0) { }
     102             :     DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO)
     103       15238 :         : DI(di), dl(std::move(DL)), SDNodeOrder(SDNO) {}
     104             :     const DbgValueInst* getDI() { return DI; }
     105        5584 :     DebugLoc getdl() { return dl; }
     106             :     unsigned getSDNodeOrder() { return SDNodeOrder; }
     107             :   };
     108             : 
     109             :   /// DanglingDebugInfoMap - Keeps track of dbg_values for which we have not
     110             :   /// yet seen the referent.  We defer handling these until we do see it.
     111             :   DenseMap<const Value*, DanglingDebugInfo> DanglingDebugInfoMap;
     112             : 
     113             : public:
     114             :   /// PendingLoads - Loads are not emitted to the program immediately.  We bunch
     115             :   /// them up and then emit token factor nodes when possible.  This allows us to
     116             :   /// get simple disambiguation between loads without worrying about alias
     117             :   /// analysis.
     118             :   SmallVector<SDValue, 8> PendingLoads;
     119             : 
     120             :   /// State used while lowering a statepoint sequence (gc_statepoint,
     121             :   /// gc_relocate, and gc_result).  See StatepointLowering.hpp/cpp for details.
     122             :   StatepointLoweringState StatepointLowering;
     123             : private:
     124             : 
     125             :   /// PendingExports - CopyToReg nodes that copy values to virtual registers
     126             :   /// for export to other blocks need to be emitted before any terminator
     127             :   /// instruction, but they have no other ordering requirements. We bunch them
     128             :   /// up and the emit a single tokenfactor for them just before terminator
     129             :   /// instructions.
     130             :   SmallVector<SDValue, 8> PendingExports;
     131             : 
     132             :   /// SDNodeOrder - A unique monotonically increasing number used to order the
     133             :   /// SDNodes we create.
     134             :   unsigned SDNodeOrder;
     135             : 
     136             :   enum CaseClusterKind {
     137             :     /// A cluster of adjacent case labels with the same destination, or just one
     138             :     /// case.
     139             :     CC_Range,
     140             :     /// A cluster of cases suitable for jump table lowering.
     141             :     CC_JumpTable,
     142             :     /// A cluster of cases suitable for bit test lowering.
     143             :     CC_BitTests
     144             :   };
     145             : 
     146             :   /// A cluster of case labels.
     147        8686 :   struct CaseCluster {
     148             :     CaseClusterKind Kind;
     149             :     const ConstantInt *Low, *High;
     150             :     union {
     151             :       MachineBasicBlock *MBB;
     152             :       unsigned JTCasesIndex;
     153             :       unsigned BTCasesIndex;
     154             :     };
     155             :     BranchProbability Prob;
     156             : 
     157             :     static CaseCluster range(const ConstantInt *Low, const ConstantInt *High,
     158             :                              MachineBasicBlock *MBB, BranchProbability Prob) {
     159        3211 :       CaseCluster C;
     160        3211 :       C.Kind = CC_Range;
     161        3211 :       C.Low = Low;
     162        3211 :       C.High = High;
     163        3211 :       C.MBB = MBB;
     164        3211 :       C.Prob = Prob;
     165             :       return C;
     166             :     }
     167             : 
     168             :     static CaseCluster jumpTable(const ConstantInt *Low,
     169             :                                  const ConstantInt *High, unsigned JTCasesIndex,
     170             :                                  BranchProbability Prob) {
     171         192 :       CaseCluster C;
     172             :       C.Kind = CC_JumpTable;
     173             :       C.Low = Low;
     174             :       C.High = High;
     175             :       C.JTCasesIndex = JTCasesIndex;
     176             :       C.Prob = Prob;
     177             :       return C;
     178             :     }
     179             : 
     180             :     static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High,
     181             :                                 unsigned BTCasesIndex, BranchProbability Prob) {
     182          26 :       CaseCluster C;
     183             :       C.Kind = CC_BitTests;
     184             :       C.Low = Low;
     185             :       C.High = High;
     186             :       C.BTCasesIndex = BTCasesIndex;
     187             :       C.Prob = Prob;
     188             :       return C;
     189             :     }
     190             :   };
     191             : 
     192             :   typedef std::vector<CaseCluster> CaseClusterVector;
     193             :   typedef CaseClusterVector::iterator CaseClusterIt;
     194             : 
     195             :   struct CaseBits {
     196             :     uint64_t Mask;
     197             :     MachineBasicBlock* BB;
     198             :     unsigned Bits;
     199             :     BranchProbability ExtraProb;
     200             : 
     201             :     CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits,
     202          42 :              BranchProbability Prob):
     203          42 :       Mask(mask), BB(bb), Bits(bits), ExtraProb(Prob) { }
     204             : 
     205             :     CaseBits() : Mask(0), BB(nullptr), Bits(0) {}
     206             :   };
     207             : 
     208             :   typedef std::vector<CaseBits> CaseBitsVector;
     209             : 
     210             :   /// Sort Clusters and merge adjacent cases.
     211             :   void sortAndRangeify(CaseClusterVector &Clusters);
     212             : 
     213             :   /// CaseBlock - This structure is used to communicate between
     214             :   /// SelectionDAGBuilder and SDISel for the code generation of additional basic
     215             :   /// blocks needed by multi-case switch statements.
     216       84878 :   struct CaseBlock {
     217             :     CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
     218             :               const Value *cmpmiddle, MachineBasicBlock *truebb,
     219             :               MachineBasicBlock *falsebb, MachineBasicBlock *me,
     220             :               SDLoc dl,
     221             :               BranchProbability trueprob = BranchProbability::getUnknown(),
     222             :               BranchProbability falseprob = BranchProbability::getUnknown())
     223       38868 :         : CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs),
     224             :           TrueBB(truebb), FalseBB(falsebb), ThisBB(me), DL(dl),
     225       77736 :           TrueProb(trueprob), FalseProb(falseprob) {}
     226             : 
     227             :     // CC - the condition code to use for the case block's setcc node
     228             :     ISD::CondCode CC;
     229             : 
     230             :     // CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit.
     231             :     // Emit by default LHS op RHS. MHS is used for range comparisons:
     232             :     // If MHS is not null: (LHS <= MHS) and (MHS <= RHS).
     233             :     const Value *CmpLHS, *CmpMHS, *CmpRHS;
     234             : 
     235             :     // TrueBB/FalseBB - the block to branch to if the setcc is true/false.
     236             :     MachineBasicBlock *TrueBB, *FalseBB;
     237             : 
     238             :     // ThisBB - the block into which to emit the code for the setcc and branches
     239             :     MachineBasicBlock *ThisBB;
     240             : 
     241             :     /// The debug location of the instruction this CaseBlock was
     242             :     /// produced from.
     243             :     SDLoc DL;
     244             : 
     245             :     // TrueProb/FalseProb - branch weights.
     246             :     BranchProbability TrueProb, FalseProb;
     247             :   };
     248             : 
     249             :   struct JumpTable {
     250             :     JumpTable(unsigned R, unsigned J, MachineBasicBlock *M,
     251         192 :               MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {}
     252             : 
     253             :     /// Reg - the virtual register containing the index of the jump table entry
     254             :     //. to jump to.
     255             :     unsigned Reg;
     256             :     /// JTI - the JumpTableIndex for this jump table in the function.
     257             :     unsigned JTI;
     258             :     /// MBB - the MBB into which to emit the code for the indirect jump.
     259             :     MachineBasicBlock *MBB;
     260             :     /// Default - the MBB of the default bb, which is a successor of the range
     261             :     /// check MBB.  This is when updating PHI nodes in successors.
     262             :     MachineBasicBlock *Default;
     263             :   };
     264        1782 :   struct JumpTableHeader {
     265             :     JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H,
     266             :                     bool E = false)
     267         576 :         : First(std::move(F)), Last(std::move(L)), SValue(SV), HeaderBB(H),
     268         576 :           Emitted(E) {}
     269             :     APInt First;
     270             :     APInt Last;
     271             :     const Value *SValue;
     272             :     MachineBasicBlock *HeaderBB;
     273             :     bool Emitted;
     274             :   };
     275             :   typedef std::pair<JumpTableHeader, JumpTable> JumpTableBlock;
     276             : 
     277             :   struct BitTestCase {
     278             :     BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr,
     279          42 :                 BranchProbability Prob):
     280          42 :       Mask(M), ThisBB(T), TargetBB(Tr), ExtraProb(Prob) { }
     281             :     uint64_t Mask;
     282             :     MachineBasicBlock *ThisBB;
     283             :     MachineBasicBlock *TargetBB;
     284             :     BranchProbability ExtraProb;
     285             :   };
     286             : 
     287             :   typedef SmallVector<BitTestCase, 3> BitTestInfo;
     288             : 
     289         104 :   struct BitTestBlock {
     290             :     BitTestBlock(APInt F, APInt R, const Value *SV, unsigned Rg, MVT RgVT,
     291             :                  bool E, bool CR, MachineBasicBlock *P, MachineBasicBlock *D,
     292             :                  BitTestInfo C, BranchProbability Pr)
     293          78 :         : First(std::move(F)), Range(std::move(R)), SValue(SV), Reg(Rg),
     294             :           RegVT(RgVT), Emitted(E), ContiguousRange(CR), Parent(P), Default(D),
     295         130 :           Cases(std::move(C)), Prob(Pr) {}
     296             :     APInt First;
     297             :     APInt Range;
     298             :     const Value *SValue;
     299             :     unsigned Reg;
     300             :     MVT RegVT;
     301             :     bool Emitted;
     302             :     bool ContiguousRange;
     303             :     MachineBasicBlock *Parent;
     304             :     MachineBasicBlock *Default;
     305             :     BitTestInfo Cases;
     306             :     BranchProbability Prob;
     307             :     BranchProbability DefaultProb;
     308             :   };
     309             : 
     310             :   /// Return the range of value in [First..Last].
     311             :   uint64_t getJumpTableRange(const CaseClusterVector &Clusters, unsigned First,
     312             :                              unsigned Last) const;
     313             : 
     314             :   /// Return the number of cases in [First..Last].
     315             :   uint64_t getJumpTableNumCases(const SmallVectorImpl<unsigned> &TotalCases,
     316             :                                 unsigned First, unsigned Last) const;
     317             : 
     318             :   /// Build a jump table cluster from Clusters[First..Last]. Returns false if it
     319             :   /// decides it's not a good idea.
     320             :   bool buildJumpTable(const CaseClusterVector &Clusters, unsigned First,
     321             :                       unsigned Last, const SwitchInst *SI,
     322             :                       MachineBasicBlock *DefaultMBB, CaseCluster &JTCluster);
     323             : 
     324             :   /// Find clusters of cases suitable for jump table lowering.
     325             :   void findJumpTables(CaseClusterVector &Clusters, const SwitchInst *SI,
     326             :                       MachineBasicBlock *DefaultMBB);
     327             : 
     328             :   /// Build a bit test cluster from Clusters[First..Last]. Returns false if it
     329             :   /// decides it's not a good idea.
     330             :   bool buildBitTests(CaseClusterVector &Clusters, unsigned First, unsigned Last,
     331             :                      const SwitchInst *SI, CaseCluster &BTCluster);
     332             : 
     333             :   /// Find clusters of cases suitable for bit test lowering.
     334             :   void findBitTestClusters(CaseClusterVector &Clusters, const SwitchInst *SI);
     335             : 
     336             :   struct SwitchWorkListItem {
     337             :     MachineBasicBlock *MBB;
     338             :     CaseClusterIt FirstCluster;
     339             :     CaseClusterIt LastCluster;
     340             :     const ConstantInt *GE;
     341             :     const ConstantInt *LT;
     342             :     BranchProbability DefaultProb;
     343             :   };
     344             :   typedef SmallVector<SwitchWorkListItem, 4> SwitchWorkList;
     345             : 
     346             :   /// Determine the rank by weight of CC in [First,Last]. If CC has more weight
     347             :   /// than each cluster in the range, its rank is 0.
     348             :   static unsigned caseClusterRank(const CaseCluster &CC, CaseClusterIt First,
     349             :                                   CaseClusterIt Last);
     350             : 
     351             :   /// Emit comparison and split W into two subtrees.
     352             :   void splitWorkItem(SwitchWorkList &WorkList, const SwitchWorkListItem &W,
     353             :                      Value *Cond, MachineBasicBlock *SwitchMBB);
     354             : 
     355             :   /// Lower W.
     356             :   void lowerWorkItem(SwitchWorkListItem W, Value *Cond,
     357             :                      MachineBasicBlock *SwitchMBB,
     358             :                      MachineBasicBlock *DefaultMBB);
     359             : 
     360             : 
     361             :   /// A class which encapsulates all of the information needed to generate a
     362             :   /// stack protector check and signals to isel via its state being initialized
     363             :   /// that a stack protector needs to be generated.
     364             :   ///
     365             :   /// *NOTE* The following is a high level documentation of SelectionDAG Stack
     366             :   /// Protector Generation. The reason that it is placed here is for a lack of
     367             :   /// other good places to stick it.
     368             :   ///
     369             :   /// High Level Overview of SelectionDAG Stack Protector Generation:
     370             :   ///
     371             :   /// Previously, generation of stack protectors was done exclusively in the
     372             :   /// pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
     373             :   /// splitting basic blocks at the IR level to create the success/failure basic
     374             :   /// blocks in the tail of the basic block in question. As a result of this,
     375             :   /// calls that would have qualified for the sibling call optimization were no
     376             :   /// longer eligible for optimization since said calls were no longer right in
     377             :   /// the "tail position" (i.e. the immediate predecessor of a ReturnInst
     378             :   /// instruction).
     379             :   ///
     380             :   /// Then it was noticed that since the sibling call optimization causes the
     381             :   /// callee to reuse the caller's stack, if we could delay the generation of
     382             :   /// the stack protector check until later in CodeGen after the sibling call
     383             :   /// decision was made, we get both the tail call optimization and the stack
     384             :   /// protector check!
     385             :   ///
     386             :   /// A few goals in solving this problem were:
     387             :   ///
     388             :   ///   1. Preserve the architecture independence of stack protector generation.
     389             :   ///
     390             :   ///   2. Preserve the normal IR level stack protector check for platforms like
     391             :   ///      OpenBSD for which we support platform-specific stack protector
     392             :   ///      generation.
     393             :   ///
     394             :   /// The main problem that guided the present solution is that one can not
     395             :   /// solve this problem in an architecture independent manner at the IR level
     396             :   /// only. This is because:
     397             :   ///
     398             :   ///   1. The decision on whether or not to perform a sibling call on certain
     399             :   ///      platforms (for instance i386) requires lower level information
     400             :   ///      related to available registers that can not be known at the IR level.
     401             :   ///
     402             :   ///   2. Even if the previous point were not true, the decision on whether to
     403             :   ///      perform a tail call is done in LowerCallTo in SelectionDAG which
     404             :   ///      occurs after the Stack Protector Pass. As a result, one would need to
     405             :   ///      put the relevant callinst into the stack protector check success
     406             :   ///      basic block (where the return inst is placed) and then move it back
     407             :   ///      later at SelectionDAG/MI time before the stack protector check if the
     408             :   ///      tail call optimization failed. The MI level option was nixed
     409             :   ///      immediately since it would require platform-specific pattern
     410             :   ///      matching. The SelectionDAG level option was nixed because
     411             :   ///      SelectionDAG only processes one IR level basic block at a time
     412             :   ///      implying one could not create a DAG Combine to move the callinst.
     413             :   ///
     414             :   /// To get around this problem a few things were realized:
     415             :   ///
     416             :   ///   1. While one can not handle multiple IR level basic blocks at the
     417             :   ///      SelectionDAG Level, one can generate multiple machine basic blocks
     418             :   ///      for one IR level basic block. This is how we handle bit tests and
     419             :   ///      switches.
     420             :   ///
     421             :   ///   2. At the MI level, tail calls are represented via a special return
     422             :   ///      MIInst called "tcreturn". Thus if we know the basic block in which we
     423             :   ///      wish to insert the stack protector check, we get the correct behavior
     424             :   ///      by always inserting the stack protector check right before the return
     425             :   ///      statement. This is a "magical transformation" since no matter where
     426             :   ///      the stack protector check intrinsic is, we always insert the stack
     427             :   ///      protector check code at the end of the BB.
     428             :   ///
     429             :   /// Given the aforementioned constraints, the following solution was devised:
     430             :   ///
     431             :   ///   1. On platforms that do not support SelectionDAG stack protector check
     432             :   ///      generation, allow for the normal IR level stack protector check
     433             :   ///      generation to continue.
     434             :   ///
     435             :   ///   2. On platforms that do support SelectionDAG stack protector check
     436             :   ///      generation:
     437             :   ///
     438             :   ///     a. Use the IR level stack protector pass to decide if a stack
     439             :   ///        protector is required/which BB we insert the stack protector check
     440             :   ///        in by reusing the logic already therein. If we wish to generate a
     441             :   ///        stack protector check in a basic block, we place a special IR
     442             :   ///        intrinsic called llvm.stackprotectorcheck right before the BB's
     443             :   ///        returninst or if there is a callinst that could potentially be
     444             :   ///        sibling call optimized, before the call inst.
     445             :   ///
     446             :   ///     b. Then when a BB with said intrinsic is processed, we codegen the BB
     447             :   ///        normally via SelectBasicBlock. In said process, when we visit the
     448             :   ///        stack protector check, we do not actually emit anything into the
     449             :   ///        BB. Instead, we just initialize the stack protector descriptor
     450             :   ///        class (which involves stashing information/creating the success
     451             :   ///        mbbb and the failure mbb if we have not created one for this
     452             :   ///        function yet) and export the guard variable that we are going to
     453             :   ///        compare.
     454             :   ///
     455             :   ///     c. After we finish selecting the basic block, in FinishBasicBlock if
     456             :   ///        the StackProtectorDescriptor attached to the SelectionDAGBuilder is
     457             :   ///        initialized, we produce the validation code with one of these
     458             :   ///        techniques:
     459             :   ///          1) with a call to a guard check function
     460             :   ///          2) with inlined instrumentation
     461             :   ///
     462             :   ///        1) We insert a call to the check function before the terminator.
     463             :   ///
     464             :   ///        2) We first find a splice point in the parent basic block
     465             :   ///        before the terminator and then splice the terminator of said basic
     466             :   ///        block into the success basic block. Then we code-gen a new tail for
     467             :   ///        the parent basic block consisting of the two loads, the comparison,
     468             :   ///        and finally two branches to the success/failure basic blocks. We
     469             :   ///        conclude by code-gening the failure basic block if we have not
     470             :   ///        code-gened it already (all stack protector checks we generate in
     471             :   ///        the same function, use the same failure basic block).
     472             :   class StackProtectorDescriptor {
     473             :   public:
     474             :     StackProtectorDescriptor()
     475       18528 :         : ParentMBB(nullptr), SuccessMBB(nullptr), FailureMBB(nullptr) {}
     476             : 
     477             :     /// Returns true if all fields of the stack protector descriptor are
     478             :     /// initialized implying that we should/are ready to emit a stack protector.
     479             :     bool shouldEmitStackProtector() const {
     480      279516 :       return ParentMBB && SuccessMBB && FailureMBB;
     481             :     }
     482             : 
     483             :     bool shouldEmitFunctionBasedCheckStackProtector() const {
     484      279582 :       return ParentMBB && !SuccessMBB && !FailureMBB;
     485             :     }
     486             : 
     487             :     /// Initialize the stack protector descriptor structure for a new basic
     488             :     /// block.
     489         254 :     void initialize(const BasicBlock *BB, MachineBasicBlock *MBB,
     490             :                     bool FunctionBasedInstrumentation) {
     491             :       // Make sure we are not initialized yet.
     492             :       assert(!shouldEmitStackProtector() && "Stack Protector Descriptor is "
     493             :              "already initialized!");
     494         254 :       ParentMBB = MBB;
     495         254 :       if (!FunctionBasedInstrumentation) {
     496         188 :         SuccessMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ true);
     497         188 :         FailureMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ false, FailureMBB);
     498             :       }
     499         254 :     }
     500             : 
     501             :     /// Reset state that changes when we handle different basic blocks.
     502             :     ///
     503             :     /// This currently includes:
     504             :     ///
     505             :     /// 1. The specific basic block we are generating a
     506             :     /// stack protector for (ParentMBB).
     507             :     ///
     508             :     /// 2. The successor machine basic block that will contain the tail of
     509             :     /// parent mbb after we create the stack protector check (SuccessMBB). This
     510             :     /// BB is visited only on stack protector check success.
     511             :     void resetPerBBState() {
     512         254 :       ParentMBB = nullptr;
     513         254 :       SuccessMBB = nullptr;
     514             :     }
     515             : 
     516             :     /// Reset state that only changes when we switch functions.
     517             :     ///
     518             :     /// This currently includes:
     519             :     ///
     520             :     /// 1. FailureMBB since we reuse the failure code path for all stack
     521             :     /// protector checks created in an individual function.
     522             :     ///
     523             :     /// 2.The guard variable since the guard variable we are checking against is
     524             :     /// always the same.
     525             :     void resetPerFunctionState() {
     526      142254 :       FailureMBB = nullptr;
     527             :     }
     528             : 
     529             :     MachineBasicBlock *getParentMBB() { return ParentMBB; }
     530             :     MachineBasicBlock *getSuccessMBB() { return SuccessMBB; }
     531             :     MachineBasicBlock *getFailureMBB() { return FailureMBB; }
     532             : 
     533             :   private:
     534             :     /// The basic block for which we are generating the stack protector.
     535             :     ///
     536             :     /// As a result of stack protector generation, we will splice the
     537             :     /// terminators of this basic block into the successor mbb SuccessMBB and
     538             :     /// replace it with a compare/branch to the successor mbbs
     539             :     /// SuccessMBB/FailureMBB depending on whether or not the stack protector
     540             :     /// was violated.
     541             :     MachineBasicBlock *ParentMBB;
     542             : 
     543             :     /// A basic block visited on stack protector check success that contains the
     544             :     /// terminators of ParentMBB.
     545             :     MachineBasicBlock *SuccessMBB;
     546             : 
     547             :     /// This basic block visited on stack protector check failure that will
     548             :     /// contain a call to __stack_chk_fail().
     549             :     MachineBasicBlock *FailureMBB;
     550             : 
     551             :     /// Add a successor machine basic block to ParentMBB. If the successor mbb
     552             :     /// has not been created yet (i.e. if SuccMBB = 0), then the machine basic
     553             :     /// block will be created. Assign a large weight if IsLikely is true.
     554             :     MachineBasicBlock *AddSuccessorMBB(const BasicBlock *BB,
     555             :                                        MachineBasicBlock *ParentMBB,
     556             :                                        bool IsLikely,
     557             :                                        MachineBasicBlock *SuccMBB = nullptr);
     558             :   };
     559             : 
     560             : private:
     561             :   const TargetMachine &TM;
     562             : public:
     563             :   /// Lowest valid SDNodeOrder. The special case 0 is reserved for scheduling
     564             :   /// nodes without a corresponding SDNode.
     565             :   static const unsigned LowestSDNodeOrder = 1;
     566             : 
     567             :   SelectionDAG &DAG;
     568             :   const DataLayout *DL;
     569             :   AliasAnalysis *AA;
     570             :   const TargetLibraryInfo *LibInfo;
     571             : 
     572             :   /// SwitchCases - Vector of CaseBlock structures used to communicate
     573             :   /// SwitchInst code generation information.
     574             :   std::vector<CaseBlock> SwitchCases;
     575             :   /// JTCases - Vector of JumpTable structures used to communicate
     576             :   /// SwitchInst code generation information.
     577             :   std::vector<JumpTableBlock> JTCases;
     578             :   /// BitTestCases - Vector of BitTestBlock structures used to communicate
     579             :   /// SwitchInst code generation information.
     580             :   std::vector<BitTestBlock> BitTestCases;
     581             :   /// A StackProtectorDescriptor structure used to communicate stack protector
     582             :   /// information in between SelectBasicBlock and FinishBasicBlock.
     583             :   StackProtectorDescriptor SPDescriptor;
     584             : 
     585             :   // Emit PHI-node-operand constants only once even if used by multiple
     586             :   // PHI nodes.
     587             :   DenseMap<const Constant *, unsigned> ConstantsOut;
     588             : 
     589             :   /// FuncInfo - Information about the function as a whole.
     590             :   ///
     591             :   FunctionLoweringInfo &FuncInfo;
     592             : 
     593             :   /// GFI - Garbage collection metadata for the function.
     594             :   GCFunctionInfo *GFI;
     595             : 
     596             :   /// LPadToCallSiteMap - Map a landing pad to the call site indexes.
     597             :   DenseMap<MachineBasicBlock*, SmallVector<unsigned, 4> > LPadToCallSiteMap;
     598             : 
     599             :   /// HasTailCall - This is set to true if a call in the current
     600             :   /// block has been translated as a tail call. In this case,
     601             :   /// no subsequent DAG nodes should be created.
     602             :   ///
     603             :   bool HasTailCall;
     604             : 
     605             :   LLVMContext *Context;
     606             : 
     607       18528 :   SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo,
     608             :                       CodeGenOpt::Level ol)
     609       37056 :     : CurInst(nullptr), SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()),
     610             :       DAG(dag), DL(nullptr), AA(nullptr), FuncInfo(funcinfo),
     611      259392 :       HasTailCall(false) {
     612       18528 :   }
     613             : 
     614             :   void init(GCFunctionInfo *gfi, AliasAnalysis *AA,
     615             :             const TargetLibraryInfo *li);
     616             : 
     617             :   /// Clear out the current SelectionDAG and the associated state and prepare
     618             :   /// this SelectionDAGBuilder object to be used for a new block. This doesn't
     619             :   /// clear out information about additional blocks that are needed to complete
     620             :   /// switch lowering or PHI node updating; that information is cleared out as
     621             :   /// it is consumed.
     622             :   void clear();
     623             : 
     624             :   /// Clear the dangling debug information map. This function is separated from
     625             :   /// the clear so that debug information that is dangling in a basic block can
     626             :   /// be properly resolved in a different basic block. This allows the
     627             :   /// SelectionDAG to resolve dangling debug information attached to PHI nodes.
     628             :   void clearDanglingDebugInfo();
     629             : 
     630             :   /// Return the current virtual root of the Selection DAG, flushing any
     631             :   /// PendingLoad items. This must be done before emitting a store or any other
     632             :   /// node that may need to be ordered after any prior load instructions.
     633             :   SDValue getRoot();
     634             : 
     635             :   /// Similar to getRoot, but instead of flushing all the PendingLoad items,
     636             :   /// flush all the PendingExports items. It is necessary to do this before
     637             :   /// emitting a terminator instruction.
     638             :   SDValue getControlRoot();
     639             : 
     640             :   SDLoc getCurSDLoc() const {
     641     8592564 :     return SDLoc(CurInst, SDNodeOrder);
     642             :   }
     643             : 
     644      162055 :   DebugLoc getCurDebugLoc() const {
     645      345929 :     return CurInst ? CurInst->getDebugLoc() : DebugLoc();
     646             :   }
     647             : 
     648             :   void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
     649             : 
     650             :   void visit(const Instruction &I);
     651             : 
     652             :   void visit(unsigned Opcode, const User &I);
     653             : 
     654             :   /// getCopyFromRegs - If there was virtual register allocated for the value V
     655             :   /// emit CopyFromReg of the specified type Ty. Return empty SDValue() otherwise.
     656             :   SDValue getCopyFromRegs(const Value *V, Type *Ty);
     657             : 
     658             :   // resolveDanglingDebugInfo - if we saw an earlier dbg_value referring to V,
     659             :   // generate the debug data structures now that we've seen its definition.
     660             :   void resolveDanglingDebugInfo(const Value *V, SDValue Val);
     661             :   SDValue getValue(const Value *V);
     662             :   bool findValue(const Value *V) const;
     663             : 
     664             :   SDValue getNonRegisterValue(const Value *V);
     665             :   SDValue getValueImpl(const Value *V);
     666             : 
     667             :   void setValue(const Value *V, SDValue NewN) {
     668     3303642 :     SDValue &N = NodeMap[V];
     669             :     assert(!N.getNode() && "Already set a value for this node!");
     670     1651821 :     N = NewN;
     671             :   }
     672             : 
     673             :   void setUnusedArgValue(const Value *V, SDValue NewN) {
     674       28760 :     SDValue &N = UnusedArgNodeMap[V];
     675             :     assert(!N.getNode() && "Already set a value for this node!");
     676       14380 :     N = NewN;
     677             :   }
     678             : 
     679             :   void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
     680             :                             MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
     681             :                             MachineBasicBlock *SwitchBB,
     682             :                             Instruction::BinaryOps Opc, BranchProbability TW,
     683             :                             BranchProbability FW, bool InvertCond);
     684             :   void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
     685             :                                     MachineBasicBlock *FBB,
     686             :                                     MachineBasicBlock *CurBB,
     687             :                                     MachineBasicBlock *SwitchBB,
     688             :                                     BranchProbability TW, BranchProbability FW,
     689             :                                     bool InvertCond);
     690             :   bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
     691             :   bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
     692             :   void CopyToExportRegsIfNeeded(const Value *V);
     693             :   void ExportFromCurrentBlock(const Value *V);
     694             :   void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall,
     695             :                    const BasicBlock *EHPadBB = nullptr);
     696             : 
     697             :   // Lower range metadata from 0 to N to assert zext to an integer of nearest
     698             :   // floor power of two.
     699             :   SDValue lowerRangeToAssertZExt(SelectionDAG &DAG, const Instruction &I,
     700             :                                  SDValue Op);
     701             : 
     702             :   void populateCallLoweringInfo(TargetLowering::CallLoweringInfo &CLI,
     703             :                                 ImmutableCallSite CS, unsigned ArgIdx,
     704             :                                 unsigned NumArgs, SDValue Callee,
     705             :                                 Type *ReturnTy, bool IsPatchPoint);
     706             : 
     707             :   std::pair<SDValue, SDValue>
     708             :   lowerInvokable(TargetLowering::CallLoweringInfo &CLI,
     709             :                  const BasicBlock *EHPadBB = nullptr);
     710             : 
     711             :   /// UpdateSplitBlock - When an MBB was split during scheduling, update the
     712             :   /// references that need to refer to the last resulting block.
     713             :   void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last);
     714             : 
     715             :   /// Describes a gc.statepoint or a gc.statepoint like thing for the purposes
     716             :   /// of lowering into a STATEPOINT node.
     717         276 :   struct StatepointLoweringInfo {
     718             :     /// Bases[i] is the base pointer for Ptrs[i].  Together they denote the set
     719             :     /// of gc pointers this STATEPOINT has to relocate.
     720             :     SmallVector<const Value *, 16> Bases;
     721             :     SmallVector<const Value *, 16> Ptrs;
     722             : 
     723             :     /// The set of gc.relocate calls associated with this gc.statepoint.
     724             :     SmallVector<const GCRelocateInst *, 16> GCRelocates;
     725             : 
     726             :     /// The full list of gc arguments to the gc.statepoint being lowered.
     727             :     ArrayRef<const Use> GCArgs;
     728             : 
     729             :     /// The gc.statepoint instruction.
     730             :     const Instruction *StatepointInstr = nullptr;
     731             : 
     732             :     /// The list of gc transition arguments present in the gc.statepoint being
     733             :     /// lowered.
     734             :     ArrayRef<const Use> GCTransitionArgs;
     735             : 
     736             :     /// The ID that the resulting STATEPOINT instruction has to report.
     737             :     unsigned ID = -1;
     738             : 
     739             :     /// Information regarding the underlying call instruction.
     740             :     TargetLowering::CallLoweringInfo CLI;
     741             : 
     742             :     /// The deoptimization state associated with this gc.statepoint call, if
     743             :     /// any.
     744             :     ArrayRef<const Use> DeoptState;
     745             : 
     746             :     /// Flags associated with the meta arguments being lowered.
     747             :     uint64_t StatepointFlags = -1;
     748             : 
     749             :     /// The number of patchable bytes the call needs to get lowered into.
     750             :     unsigned NumPatchBytes = -1;
     751             : 
     752             :     /// The exception handling unwind destination, in case this represents an
     753             :     /// invoke of gc.statepoint.
     754             :     const BasicBlock *EHPadBB = nullptr;
     755             : 
     756         483 :     explicit StatepointLoweringInfo(SelectionDAG &DAG) : CLI(DAG) {}
     757             :   };
     758             : 
     759             :   /// Lower \p SLI into a STATEPOINT instruction.
     760             :   SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SLI);
     761             : 
     762             :   // This function is responsible for the whole statepoint lowering process.
     763             :   // It uniformly handles invoke and call statepoints.
     764             :   void LowerStatepoint(ImmutableStatepoint Statepoint,
     765             :                        const BasicBlock *EHPadBB = nullptr);
     766             : 
     767             :   void LowerCallSiteWithDeoptBundle(ImmutableCallSite CS, SDValue Callee,
     768             :                                     const BasicBlock *EHPadBB);
     769             : 
     770             :   void LowerDeoptimizeCall(const CallInst *CI);
     771             :   void LowerDeoptimizingReturn();
     772             : 
     773             :   void LowerCallSiteWithDeoptBundleImpl(ImmutableCallSite CS, SDValue Callee,
     774             :                                         const BasicBlock *EHPadBB,
     775             :                                         bool VarArgDisallowed,
     776             :                                         bool ForceVoidReturnTy);
     777             : 
     778             :   /// Returns the type of FrameIndex and TargetFrameIndex nodes.
     779             :   MVT getFrameIndexTy() {
     780         264 :     return DAG.getTargetLoweringInfo().getFrameIndexTy(DAG.getDataLayout());
     781             :   }
     782             : 
     783             : private:
     784             :   // Terminator instructions.
     785             :   void visitRet(const ReturnInst &I);
     786             :   void visitBr(const BranchInst &I);
     787             :   void visitSwitch(const SwitchInst &I);
     788             :   void visitIndirectBr(const IndirectBrInst &I);
     789             :   void visitUnreachable(const UnreachableInst &I);
     790             :   void visitCleanupRet(const CleanupReturnInst &I);
     791             :   void visitCatchSwitch(const CatchSwitchInst &I);
     792             :   void visitCatchRet(const CatchReturnInst &I);
     793             :   void visitCatchPad(const CatchPadInst &I);
     794             :   void visitCleanupPad(const CleanupPadInst &CPI);
     795             : 
     796             :   BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
     797             :                                        const MachineBasicBlock *Dst) const;
     798             :   void addSuccessorWithProb(
     799             :       MachineBasicBlock *Src, MachineBasicBlock *Dst,
     800             :       BranchProbability Prob = BranchProbability::getUnknown());
     801             : 
     802             : public:
     803             :   void visitSwitchCase(CaseBlock &CB,
     804             :                        MachineBasicBlock *SwitchBB);
     805             :   void visitSPDescriptorParent(StackProtectorDescriptor &SPD,
     806             :                                MachineBasicBlock *ParentBB);
     807             :   void visitSPDescriptorFailure(StackProtectorDescriptor &SPD);
     808             :   void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB);
     809             :   void visitBitTestCase(BitTestBlock &BB,
     810             :                         MachineBasicBlock* NextMBB,
     811             :                         BranchProbability BranchProbToNext,
     812             :                         unsigned Reg,
     813             :                         BitTestCase &B,
     814             :                         MachineBasicBlock *SwitchBB);
     815             :   void visitJumpTable(JumpTable &JT);
     816             :   void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH,
     817             :                             MachineBasicBlock *SwitchBB);
     818             : 
     819             : private:
     820             :   // These all get lowered before this pass.
     821             :   void visitInvoke(const InvokeInst &I);
     822             :   void visitResume(const ResumeInst &I);
     823             : 
     824             :   void visitBinary(const User &I, unsigned OpCode);
     825             :   void visitShift(const User &I, unsigned Opcode);
     826      202539 :   void visitAdd(const User &I)  { visitBinary(I, ISD::ADD); }
     827        9795 :   void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
     828        5757 :   void visitSub(const User &I)  { visitBinary(I, ISD::SUB); }
     829             :   void visitFSub(const User &I);
     830        4961 :   void visitMul(const User &I)  { visitBinary(I, ISD::MUL); }
     831        6986 :   void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
     832         781 :   void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
     833         764 :   void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
     834          95 :   void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
     835         834 :   void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
     836             :   void visitSDiv(const User &I);
     837        1633 :   void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
     838       10394 :   void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
     839        7173 :   void visitOr  (const User &I) { visitBinary(I, ISD::OR); }
     840        4617 :   void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
     841        6973 :   void visitShl (const User &I) { visitShift(I, ISD::SHL); }
     842        5302 :   void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
     843        2859 :   void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
     844             :   void visitICmp(const User &I);
     845             :   void visitFCmp(const User &I);
     846             :   // Visit the conversion instructions
     847             :   void visitTrunc(const User &I);
     848             :   void visitZExt(const User &I);
     849             :   void visitSExt(const User &I);
     850             :   void visitFPTrunc(const User &I);
     851             :   void visitFPExt(const User &I);
     852             :   void visitFPToUI(const User &I);
     853             :   void visitFPToSI(const User &I);
     854             :   void visitUIToFP(const User &I);
     855             :   void visitSIToFP(const User &I);
     856             :   void visitPtrToInt(const User &I);
     857             :   void visitIntToPtr(const User &I);
     858             :   void visitBitCast(const User &I);
     859             :   void visitAddrSpaceCast(const User &I);
     860             : 
     861             :   void visitExtractElement(const User &I);
     862             :   void visitInsertElement(const User &I);
     863             :   void visitShuffleVector(const User &I);
     864             : 
     865             :   void visitExtractValue(const User &I);
     866             :   void visitInsertValue(const User &I);
     867             :   void visitLandingPad(const LandingPadInst &I);
     868             : 
     869             :   void visitGetElementPtr(const User &I);
     870             :   void visitSelect(const User &I);
     871             : 
     872             :   void visitAlloca(const AllocaInst &I);
     873             :   void visitLoad(const LoadInst &I);
     874             :   void visitStore(const StoreInst &I);
     875             :   void visitMaskedLoad(const CallInst &I, bool IsExpanding = false);
     876             :   void visitMaskedStore(const CallInst &I, bool IsCompressing = false);
     877             :   void visitMaskedGather(const CallInst &I);
     878             :   void visitMaskedScatter(const CallInst &I);
     879             :   void visitAtomicCmpXchg(const AtomicCmpXchgInst &I);
     880             :   void visitAtomicRMW(const AtomicRMWInst &I);
     881             :   void visitFence(const FenceInst &I);
     882             :   void visitPHI(const PHINode &I);
     883             :   void visitCall(const CallInst &I);
     884             :   bool visitMemCmpCall(const CallInst &I);
     885             :   bool visitMemPCpyCall(const CallInst &I);
     886             :   bool visitMemChrCall(const CallInst &I);
     887             :   bool visitStrCpyCall(const CallInst &I, bool isStpcpy);
     888             :   bool visitStrCmpCall(const CallInst &I);
     889             :   bool visitStrLenCall(const CallInst &I);
     890             :   bool visitStrNLenCall(const CallInst &I);
     891             :   bool visitUnaryFloatCall(const CallInst &I, unsigned Opcode);
     892             :   bool visitBinaryFloatCall(const CallInst &I, unsigned Opcode);
     893             :   void visitAtomicLoad(const LoadInst &I);
     894             :   void visitAtomicStore(const StoreInst &I);
     895             :   void visitLoadFromSwiftError(const LoadInst &I);
     896             :   void visitStoreToSwiftError(const StoreInst &I);
     897             : 
     898             :   void visitInlineAsm(ImmutableCallSite CS);
     899             :   const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
     900             :   void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
     901             :   void visitConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI);
     902             : 
     903             :   void visitVAStart(const CallInst &I);
     904             :   void visitVAArg(const VAArgInst &I);
     905             :   void visitVAEnd(const CallInst &I);
     906             :   void visitVACopy(const CallInst &I);
     907             :   void visitStackmap(const CallInst &I);
     908             :   void visitPatchpoint(ImmutableCallSite CS,
     909             :                        const BasicBlock *EHPadBB = nullptr);
     910             : 
     911             :   // These two are implemented in StatepointLowering.cpp
     912             :   void visitGCRelocate(const GCRelocateInst &I);
     913             :   void visitGCResult(const GCResultInst &I);
     914             : 
     915             :   void visitVectorReduce(const CallInst &I, unsigned Intrinsic);
     916             : 
     917             :   void visitUserOp1(const Instruction &I) {
     918           0 :     llvm_unreachable("UserOp1 should not exist at instruction selection time!");
     919             :   }
     920             :   void visitUserOp2(const Instruction &I) {
     921           0 :     llvm_unreachable("UserOp2 should not exist at instruction selection time!");
     922             :   }
     923             : 
     924             :   void processIntegerCallValue(const Instruction &I,
     925             :                                SDValue Value, bool IsSigned);
     926             : 
     927             :   void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
     928             : 
     929             :   void emitInlineAsmError(ImmutableCallSite CS, const Twine &Message);
     930             : 
     931             :   /// If V is an function argument then create corresponding DBG_VALUE machine
     932             :   /// instruction for it now. At the end of instruction selection, they will be
     933             :   /// inserted to the entry BB.
     934             :   bool EmitFuncArgumentDbgValue(const Value *V, DILocalVariable *Variable,
     935             :                                 DIExpression *Expr, DILocation *DL,
     936             :                                 bool IsDbgDeclare, const SDValue &N);
     937             : 
     938             :   /// Return the next block after MBB, or nullptr if there is none.
     939             :   MachineBasicBlock *NextBlock(MachineBasicBlock *MBB);
     940             : 
     941             :   /// Update the DAG and DAG builder with the relevant information after
     942             :   /// a new root node has been created which could be a tail call.
     943             :   void updateDAGForMaybeTailCall(SDValue MaybeTC);
     944             : 
     945             :   /// Return the appropriate SDDbgValue based on N.
     946             :   SDDbgValue *getDbgValue(SDValue N, DILocalVariable *Variable,
     947             :                           DIExpression *Expr, const DebugLoc &dl,
     948             :                           unsigned DbgSDNodeOrder);
     949             : };
     950             : 
     951             : /// RegsForValue - This struct represents the registers (physical or virtual)
     952             : /// that a particular set of values is assigned, and the type information about
     953             : /// the value. The most common situation is to represent one value at a time,
     954             : /// but struct or array values are handled element-wise as multiple values.  The
     955             : /// splitting of aggregates is performed recursively, so that we never have
     956             : /// aggregate-typed registers. The values at this point do not necessarily have
     957             : /// legal types, so each value may require one or more registers of some legal
     958             : /// type.
     959             : ///
     960     2768510 : struct RegsForValue {
     961             :   /// The value types of the values, which may not be legal, and
     962             :   /// may need be promoted or synthesized from one or more registers.
     963             :   SmallVector<EVT, 4> ValueVTs;
     964             : 
     965             :   /// The value types of the registers. This is the same size as ValueVTs and it
     966             :   /// records, for each value, what the type of the assigned register or
     967             :   /// registers are. (Individual values are never synthesized from more than one
     968             :   /// type of register.)
     969             :   ///
     970             :   /// With virtual registers, the contents of RegVTs is redundant with TLI's
     971             :   /// getRegisterType member function, however when with physical registers
     972             :   /// it is necessary to have a separate record of the types.
     973             :   SmallVector<MVT, 4> RegVTs;
     974             : 
     975             :   /// This list holds the registers assigned to the values.
     976             :   /// Each legal or promoted value requires one register, and each
     977             :   /// expanded value requires multiple registers.
     978             :   SmallVector<unsigned, 4> Regs;
     979             : 
     980             :   /// This list holds the number of registers for each value.
     981             :   SmallVector<unsigned, 4> RegCount;
     982             : 
     983             :   /// Records if this value needs to be treated in an ABI dependant manner,
     984             :   /// different to normal type legalization.
     985             :   bool IsABIMangled;
     986             : 
     987             :   RegsForValue();
     988             : 
     989             :   RegsForValue(const SmallVector<unsigned, 4> &regs, MVT regvt, EVT valuevt,
     990             :                bool IsABIMangledValue = false);
     991             : 
     992             :   RegsForValue(LLVMContext &Context, const TargetLowering &TLI,
     993             :                const DataLayout &DL, unsigned Reg, Type *Ty,
     994             :                bool IsABIMangledValue = false);
     995             : 
     996             :   /// Add the specified values to this one.
     997        3364 :   void append(const RegsForValue &RHS) {
     998       10092 :     ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
     999       10092 :     RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
    1000       10092 :     Regs.append(RHS.Regs.begin(), RHS.Regs.end());
    1001        6728 :     RegCount.push_back(RHS.Regs.size());
    1002        3364 :   }
    1003             : 
    1004             :   /// Emit a series of CopyFromReg nodes that copies from this value and returns
    1005             :   /// the result as a ValueVTs value. This uses Chain/Flag as the input and
    1006             :   /// updates them for the output Chain/Flag. If the Flag pointer is NULL, no
    1007             :   /// flag is used.
    1008             :   SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
    1009             :                           const SDLoc &dl, SDValue &Chain, SDValue *Flag,
    1010             :                           const Value *V = nullptr) const;
    1011             : 
    1012             :   /// Emit a series of CopyToReg nodes that copies the specified value into the
    1013             :   /// registers specified by this object. This uses Chain/Flag as the input and
    1014             :   /// updates them for the output Chain/Flag. If the Flag pointer is nullptr, no
    1015             :   /// flag is used. If V is not nullptr, then it is used in printing better
    1016             :   /// diagnostic messages on error.
    1017             :   void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl,
    1018             :                      SDValue &Chain, SDValue *Flag, const Value *V = nullptr,
    1019             :                      ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
    1020             : 
    1021             :   /// Add this value to the specified inlineasm node operand list. This adds the
    1022             :   /// code marker, matching input operand index (if applicable), and includes
    1023             :   /// the number of values added into it.
    1024             :   void AddInlineAsmOperands(unsigned Kind, bool HasMatching,
    1025             :                             unsigned MatchingIdx, const SDLoc &dl,
    1026             :                             SelectionDAG &DAG, std::vector<SDValue> &Ops) const;
    1027             : };
    1028             : 
    1029             : } // end namespace llvm
    1030             : 
    1031             : #endif

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