LCOV - code coverage report
Current view: top level - lib/CodeGen/SelectionDAG - SelectionDAGBuilder.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 71 73 97.3 %
Date: 2018-02-18 16:14:26 Functions: 33 34 97.1 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- SelectionDAGBuilder.h - Selection-DAG building -----------*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This implements routines for translating from LLVM IR into SelectionDAG IR.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #ifndef LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
      15             : #define LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H
      16             : 
      17             : #include "StatepointLowering.h"
      18             : #include "llvm/ADT/APInt.h"
      19             : #include "llvm/ADT/ArrayRef.h"
      20             : #include "llvm/ADT/DenseMap.h"
      21             : #include "llvm/ADT/SmallVector.h"
      22             : #include "llvm/Analysis/AliasAnalysis.h"
      23             : #include "llvm/CodeGen/ISDOpcodes.h"
      24             : #include "llvm/CodeGen/MachineValueType.h"
      25             : #include "llvm/CodeGen/SelectionDAG.h"
      26             : #include "llvm/CodeGen/SelectionDAGNodes.h"
      27             : #include "llvm/CodeGen/TargetLowering.h"
      28             : #include "llvm/CodeGen/ValueTypes.h"
      29             : #include "llvm/IR/CallSite.h"
      30             : #include "llvm/IR/DebugLoc.h"
      31             : #include "llvm/IR/Instruction.h"
      32             : #include "llvm/IR/Statepoint.h"
      33             : #include "llvm/Support/BranchProbability.h"
      34             : #include "llvm/Support/CodeGen.h"
      35             : #include "llvm/Support/ErrorHandling.h"
      36             : #include <algorithm>
      37             : #include <cassert>
      38             : #include <cstdint>
      39             : #include <utility>
      40             : #include <vector>
      41             : 
      42             : namespace llvm {
      43             : 
      44             : class AllocaInst;
      45             : class AtomicCmpXchgInst;
      46             : class AtomicRMWInst;
      47             : class BasicBlock;
      48             : class BranchInst;
      49             : class CallInst;
      50             : class CatchPadInst;
      51             : class CatchReturnInst;
      52             : class CatchSwitchInst;
      53             : class CleanupPadInst;
      54             : class CleanupReturnInst;
      55             : class Constant;
      56             : class ConstantInt;
      57             : class ConstrainedFPIntrinsic;
      58             : class DbgValueInst;
      59             : class DataLayout;
      60             : class DIExpression;
      61             : class DILocalVariable;
      62             : class DILocation;
      63             : class FenceInst;
      64             : class FunctionLoweringInfo;
      65             : class GCFunctionInfo;
      66             : class GCRelocateInst;
      67             : class GCResultInst;
      68             : class IndirectBrInst;
      69             : class InvokeInst;
      70             : class LandingPadInst;
      71             : class LLVMContext;
      72             : class LoadInst;
      73             : class MachineBasicBlock;
      74             : class PHINode;
      75             : class ResumeInst;
      76             : class ReturnInst;
      77             : class SDDbgValue;
      78             : class StoreInst;
      79             : class SwitchInst;
      80             : class TargetLibraryInfo;
      81             : class TargetMachine;
      82             : class Type;
      83             : class VAArgInst;
      84             : class UnreachableInst;
      85             : class Use;
      86             : class User;
      87             : class Value;
      88             : 
      89             : //===----------------------------------------------------------------------===//
      90             : /// SelectionDAGBuilder - This is the common target-independent lowering
      91             : /// implementation that is parameterized by a TargetLowering object.
      92             : ///
      93      112068 : class SelectionDAGBuilder {
      94             :   /// CurInst - The current instruction being visited
      95             :   const Instruction *CurInst = nullptr;
      96             : 
      97             :   DenseMap<const Value*, SDValue> NodeMap;
      98             : 
      99             :   /// UnusedArgNodeMap - Maps argument value for unused arguments. This is used
     100             :   /// to preserve debug information for incoming arguments.
     101             :   DenseMap<const Value*, SDValue> UnusedArgNodeMap;
     102             : 
     103             :   /// DanglingDebugInfo - Helper type for DanglingDebugInfoMap.
     104     2053144 :   class DanglingDebugInfo {
     105             :     const DbgValueInst* DI = nullptr;
     106             :     DebugLoc dl;
     107             :     unsigned SDNodeOrder = 0;
     108             : 
     109             :   public:
     110             :     DanglingDebugInfo() = default;
     111             :     DanglingDebugInfo(const DbgValueInst *di, DebugLoc DL, unsigned SDNO)
     112       23404 :         : DI(di), dl(std::move(DL)), SDNodeOrder(SDNO) {}
     113             : 
     114             :     const DbgValueInst* getDI() { return DI; }
     115             :     DebugLoc getdl() { return dl; }
     116             :     unsigned getSDNodeOrder() { return SDNodeOrder; }
     117             :   };
     118             : 
     119             :   /// DanglingDebugInfoMap - Keeps track of dbg_values for which we have not
     120             :   /// yet seen the referent.  We defer handling these until we do see it.
     121             :   DenseMap<const Value*, DanglingDebugInfo> DanglingDebugInfoMap;
     122             : 
     123             : public:
     124             :   /// PendingLoads - Loads are not emitted to the program immediately.  We bunch
     125             :   /// them up and then emit token factor nodes when possible.  This allows us to
     126             :   /// get simple disambiguation between loads without worrying about alias
     127             :   /// analysis.
     128             :   SmallVector<SDValue, 8> PendingLoads;
     129             : 
     130             :   /// State used while lowering a statepoint sequence (gc_statepoint,
     131             :   /// gc_relocate, and gc_result).  See StatepointLowering.hpp/cpp for details.
     132             :   StatepointLoweringState StatepointLowering;
     133             : 
     134             : private:
     135             :   /// PendingExports - CopyToReg nodes that copy values to virtual registers
     136             :   /// for export to other blocks need to be emitted before any terminator
     137             :   /// instruction, but they have no other ordering requirements. We bunch them
     138             :   /// up and the emit a single tokenfactor for them just before terminator
     139             :   /// instructions.
     140             :   SmallVector<SDValue, 8> PendingExports;
     141             : 
     142             :   /// SDNodeOrder - A unique monotonically increasing number used to order the
     143             :   /// SDNodes we create.
     144             :   unsigned SDNodeOrder;
     145             : 
     146             :   enum CaseClusterKind {
     147             :     /// A cluster of adjacent case labels with the same destination, or just one
     148             :     /// case.
     149             :     CC_Range,
     150             :     /// A cluster of cases suitable for jump table lowering.
     151             :     CC_JumpTable,
     152             :     /// A cluster of cases suitable for bit test lowering.
     153             :     CC_BitTests
     154             :   };
     155             : 
     156             :   /// A cluster of case labels.
     157             :   struct CaseCluster {
     158             :     CaseClusterKind Kind;
     159             :     const ConstantInt *Low, *High;
     160             :     union {
     161             :       MachineBasicBlock *MBB;
     162             :       unsigned JTCasesIndex;
     163             :       unsigned BTCasesIndex;
     164             :     };
     165             :     BranchProbability Prob;
     166             : 
     167             :     static CaseCluster range(const ConstantInt *Low, const ConstantInt *High,
     168             :                              MachineBasicBlock *MBB, BranchProbability Prob) {
     169             :       CaseCluster C;
     170        4602 :       C.Kind = CC_Range;
     171        4602 :       C.Low = Low;
     172        4602 :       C.High = High;
     173        4602 :       C.MBB = MBB;
     174        4602 :       C.Prob = Prob;
     175             :       return C;
     176             :     }
     177             : 
     178             :     static CaseCluster jumpTable(const ConstantInt *Low,
     179             :                                  const ConstantInt *High, unsigned JTCasesIndex,
     180             :                                  BranchProbability Prob) {
     181             :       CaseCluster C;
     182             :       C.Kind = CC_JumpTable;
     183             :       C.Low = Low;
     184             :       C.High = High;
     185             :       C.JTCasesIndex = JTCasesIndex;
     186             :       C.Prob = Prob;
     187             :       return C;
     188             :     }
     189             : 
     190             :     static CaseCluster bitTests(const ConstantInt *Low, const ConstantInt *High,
     191             :                                 unsigned BTCasesIndex, BranchProbability Prob) {
     192             :       CaseCluster C;
     193             :       C.Kind = CC_BitTests;
     194             :       C.Low = Low;
     195             :       C.High = High;
     196             :       C.BTCasesIndex = BTCasesIndex;
     197             :       C.Prob = Prob;
     198             :       return C;
     199             :     }
     200             :   };
     201             : 
     202             :   using CaseClusterVector = std::vector<CaseCluster>;
     203             :   using CaseClusterIt = CaseClusterVector::iterator;
     204             : 
     205             :   struct CaseBits {
     206             :     uint64_t Mask = 0;
     207             :     MachineBasicBlock* BB = nullptr;
     208             :     unsigned Bits = 0;
     209             :     BranchProbability ExtraProb;
     210             : 
     211             :     CaseBits() = default;
     212             :     CaseBits(uint64_t mask, MachineBasicBlock* bb, unsigned bits,
     213          42 :              BranchProbability Prob):
     214          42 :       Mask(mask), BB(bb), Bits(bits), ExtraProb(Prob) {}
     215             :   };
     216             : 
     217             :   using CaseBitsVector = std::vector<CaseBits>;
     218             : 
     219             :   /// Sort Clusters and merge adjacent cases.
     220             :   void sortAndRangeify(CaseClusterVector &Clusters);
     221             : 
     222             :   /// CaseBlock - This structure is used to communicate between
     223             :   /// SelectionDAGBuilder and SDISel for the code generation of additional basic
     224             :   /// blocks needed by multi-case switch statements.
     225        8012 :   struct CaseBlock {
     226             :     // CC - the condition code to use for the case block's setcc node
     227             :     ISD::CondCode CC;
     228             : 
     229             :     // CmpLHS/CmpRHS/CmpMHS - The LHS/MHS/RHS of the comparison to emit.
     230             :     // Emit by default LHS op RHS. MHS is used for range comparisons:
     231             :     // If MHS is not null: (LHS <= MHS) and (MHS <= RHS).
     232             :     const Value *CmpLHS, *CmpMHS, *CmpRHS;
     233             : 
     234             :     // TrueBB/FalseBB - the block to branch to if the setcc is true/false.
     235             :     MachineBasicBlock *TrueBB, *FalseBB;
     236             : 
     237             :     // ThisBB - the block into which to emit the code for the setcc and branches
     238             :     MachineBasicBlock *ThisBB;
     239             : 
     240             :     /// The debug location of the instruction this CaseBlock was
     241             :     /// produced from.
     242             :     SDLoc DL;
     243             : 
     244             :     // TrueProb/FalseProb - branch weights.
     245             :     BranchProbability TrueProb, FalseProb;
     246             : 
     247             :     CaseBlock(ISD::CondCode cc, const Value *cmplhs, const Value *cmprhs,
     248             :               const Value *cmpmiddle, MachineBasicBlock *truebb,
     249             :               MachineBasicBlock *falsebb, MachineBasicBlock *me,
     250             :               SDLoc dl,
     251             :               BranchProbability trueprob = BranchProbability::getUnknown(),
     252             :               BranchProbability falseprob = BranchProbability::getUnknown())
     253       42222 :         : CC(cc), CmpLHS(cmplhs), CmpMHS(cmpmiddle), CmpRHS(cmprhs),
     254             :           TrueBB(truebb), FalseBB(falsebb), ThisBB(me), DL(dl),
     255       84444 :           TrueProb(trueprob), FalseProb(falseprob) {}
     256             :   };
     257             : 
     258             :   struct JumpTable {
     259             :     /// Reg - the virtual register containing the index of the jump table entry
     260             :     //. to jump to.
     261             :     unsigned Reg;
     262             :     /// JTI - the JumpTableIndex for this jump table in the function.
     263             :     unsigned JTI;
     264             :     /// MBB - the MBB into which to emit the code for the indirect jump.
     265             :     MachineBasicBlock *MBB;
     266             :     /// Default - the MBB of the default bb, which is a successor of the range
     267             :     /// check MBB.  This is when updating PHI nodes in successors.
     268             :     MachineBasicBlock *Default;
     269             : 
     270             :     JumpTable(unsigned R, unsigned J, MachineBasicBlock *M,
     271         198 :               MachineBasicBlock *D): Reg(R), JTI(J), MBB(M), Default(D) {}
     272             :   };
     273        1233 :   struct JumpTableHeader {
     274             :     APInt First;
     275             :     APInt Last;
     276             :     const Value *SValue;
     277             :     MachineBasicBlock *HeaderBB;
     278             :     bool Emitted;
     279             : 
     280             :     JumpTableHeader(APInt F, APInt L, const Value *SV, MachineBasicBlock *H,
     281             :                     bool E = false)
     282         198 :         : First(std::move(F)), Last(std::move(L)), SValue(SV), HeaderBB(H),
     283         198 :           Emitted(E) {}
     284             :   };
     285             :   using JumpTableBlock = std::pair<JumpTableHeader, JumpTable>;
     286             : 
     287             :   struct BitTestCase {
     288             :     uint64_t Mask;
     289             :     MachineBasicBlock *ThisBB;
     290             :     MachineBasicBlock *TargetBB;
     291             :     BranchProbability ExtraProb;
     292             : 
     293             :     BitTestCase(uint64_t M, MachineBasicBlock* T, MachineBasicBlock* Tr,
     294          42 :                 BranchProbability Prob):
     295          42 :       Mask(M), ThisBB(T), TargetBB(Tr), ExtraProb(Prob) {}
     296             :   };
     297             : 
     298             :   using BitTestInfo = SmallVector<BitTestCase, 3>;
     299             : 
     300          52 :   struct BitTestBlock {
     301             :     APInt First;
     302             :     APInt Range;
     303             :     const Value *SValue;
     304             :     unsigned Reg;
     305             :     MVT RegVT;
     306             :     bool Emitted;
     307             :     bool ContiguousRange;
     308             :     MachineBasicBlock *Parent;
     309             :     MachineBasicBlock *Default;
     310             :     BitTestInfo Cases;
     311             :     BranchProbability Prob;
     312             :     BranchProbability DefaultProb;
     313             : 
     314             :     BitTestBlock(APInt F, APInt R, const Value *SV, unsigned Rg, MVT RgVT,
     315             :                  bool E, bool CR, MachineBasicBlock *P, MachineBasicBlock *D,
     316             :                  BitTestInfo C, BranchProbability Pr)
     317          26 :         : First(std::move(F)), Range(std::move(R)), SValue(SV), Reg(Rg),
     318             :           RegVT(RgVT), Emitted(E), ContiguousRange(CR), Parent(P), Default(D),
     319          52 :           Cases(std::move(C)), Prob(Pr) {}
     320             :   };
     321             : 
     322             :   /// Return the range of value in [First..Last].
     323             :   uint64_t getJumpTableRange(const CaseClusterVector &Clusters, unsigned First,
     324             :                              unsigned Last) const;
     325             : 
     326             :   /// Return the number of cases in [First..Last].
     327             :   uint64_t getJumpTableNumCases(const SmallVectorImpl<unsigned> &TotalCases,
     328             :                                 unsigned First, unsigned Last) const;
     329             : 
     330             :   /// Build a jump table cluster from Clusters[First..Last]. Returns false if it
     331             :   /// decides it's not a good idea.
     332             :   bool buildJumpTable(const CaseClusterVector &Clusters, unsigned First,
     333             :                       unsigned Last, const SwitchInst *SI,
     334             :                       MachineBasicBlock *DefaultMBB, CaseCluster &JTCluster);
     335             : 
     336             :   /// Find clusters of cases suitable for jump table lowering.
     337             :   void findJumpTables(CaseClusterVector &Clusters, const SwitchInst *SI,
     338             :                       MachineBasicBlock *DefaultMBB);
     339             : 
     340             :   /// Build a bit test cluster from Clusters[First..Last]. Returns false if it
     341             :   /// decides it's not a good idea.
     342             :   bool buildBitTests(CaseClusterVector &Clusters, unsigned First, unsigned Last,
     343             :                      const SwitchInst *SI, CaseCluster &BTCluster);
     344             : 
     345             :   /// Find clusters of cases suitable for bit test lowering.
     346             :   void findBitTestClusters(CaseClusterVector &Clusters, const SwitchInst *SI);
     347             : 
     348             :   struct SwitchWorkListItem {
     349             :     MachineBasicBlock *MBB;
     350             :     CaseClusterIt FirstCluster;
     351             :     CaseClusterIt LastCluster;
     352             :     const ConstantInt *GE;
     353             :     const ConstantInt *LT;
     354             :     BranchProbability DefaultProb;
     355             :   };
     356             :   using SwitchWorkList = SmallVector<SwitchWorkListItem, 4>;
     357             : 
     358             :   /// Determine the rank by weight of CC in [First,Last]. If CC has more weight
     359             :   /// than each cluster in the range, its rank is 0.
     360             :   static unsigned caseClusterRank(const CaseCluster &CC, CaseClusterIt First,
     361             :                                   CaseClusterIt Last);
     362             : 
     363             :   /// Emit comparison and split W into two subtrees.
     364             :   void splitWorkItem(SwitchWorkList &WorkList, const SwitchWorkListItem &W,
     365             :                      Value *Cond, MachineBasicBlock *SwitchMBB);
     366             : 
     367             :   /// Lower W.
     368             :   void lowerWorkItem(SwitchWorkListItem W, Value *Cond,
     369             :                      MachineBasicBlock *SwitchMBB,
     370             :                      MachineBasicBlock *DefaultMBB);
     371             : 
     372             :   /// Peel the top probability case if it exceeds the threshold
     373             :   MachineBasicBlock *peelDominantCaseCluster(const SwitchInst &SI,
     374             :                                              CaseClusterVector &Clusters,
     375             :                                              BranchProbability &PeeledCaseProb);
     376             : 
     377             :   /// A class which encapsulates all of the information needed to generate a
     378             :   /// stack protector check and signals to isel via its state being initialized
     379             :   /// that a stack protector needs to be generated.
     380             :   ///
     381             :   /// *NOTE* The following is a high level documentation of SelectionDAG Stack
     382             :   /// Protector Generation. The reason that it is placed here is for a lack of
     383             :   /// other good places to stick it.
     384             :   ///
     385             :   /// High Level Overview of SelectionDAG Stack Protector Generation:
     386             :   ///
     387             :   /// Previously, generation of stack protectors was done exclusively in the
     388             :   /// pre-SelectionDAG Codegen LLVM IR Pass "Stack Protector". This necessitated
     389             :   /// splitting basic blocks at the IR level to create the success/failure basic
     390             :   /// blocks in the tail of the basic block in question. As a result of this,
     391             :   /// calls that would have qualified for the sibling call optimization were no
     392             :   /// longer eligible for optimization since said calls were no longer right in
     393             :   /// the "tail position" (i.e. the immediate predecessor of a ReturnInst
     394             :   /// instruction).
     395             :   ///
     396             :   /// Then it was noticed that since the sibling call optimization causes the
     397             :   /// callee to reuse the caller's stack, if we could delay the generation of
     398             :   /// the stack protector check until later in CodeGen after the sibling call
     399             :   /// decision was made, we get both the tail call optimization and the stack
     400             :   /// protector check!
     401             :   ///
     402             :   /// A few goals in solving this problem were:
     403             :   ///
     404             :   ///   1. Preserve the architecture independence of stack protector generation.
     405             :   ///
     406             :   ///   2. Preserve the normal IR level stack protector check for platforms like
     407             :   ///      OpenBSD for which we support platform-specific stack protector
     408             :   ///      generation.
     409             :   ///
     410             :   /// The main problem that guided the present solution is that one can not
     411             :   /// solve this problem in an architecture independent manner at the IR level
     412             :   /// only. This is because:
     413             :   ///
     414             :   ///   1. The decision on whether or not to perform a sibling call on certain
     415             :   ///      platforms (for instance i386) requires lower level information
     416             :   ///      related to available registers that can not be known at the IR level.
     417             :   ///
     418             :   ///   2. Even if the previous point were not true, the decision on whether to
     419             :   ///      perform a tail call is done in LowerCallTo in SelectionDAG which
     420             :   ///      occurs after the Stack Protector Pass. As a result, one would need to
     421             :   ///      put the relevant callinst into the stack protector check success
     422             :   ///      basic block (where the return inst is placed) and then move it back
     423             :   ///      later at SelectionDAG/MI time before the stack protector check if the
     424             :   ///      tail call optimization failed. The MI level option was nixed
     425             :   ///      immediately since it would require platform-specific pattern
     426             :   ///      matching. The SelectionDAG level option was nixed because
     427             :   ///      SelectionDAG only processes one IR level basic block at a time
     428             :   ///      implying one could not create a DAG Combine to move the callinst.
     429             :   ///
     430             :   /// To get around this problem a few things were realized:
     431             :   ///
     432             :   ///   1. While one can not handle multiple IR level basic blocks at the
     433             :   ///      SelectionDAG Level, one can generate multiple machine basic blocks
     434             :   ///      for one IR level basic block. This is how we handle bit tests and
     435             :   ///      switches.
     436             :   ///
     437             :   ///   2. At the MI level, tail calls are represented via a special return
     438             :   ///      MIInst called "tcreturn". Thus if we know the basic block in which we
     439             :   ///      wish to insert the stack protector check, we get the correct behavior
     440             :   ///      by always inserting the stack protector check right before the return
     441             :   ///      statement. This is a "magical transformation" since no matter where
     442             :   ///      the stack protector check intrinsic is, we always insert the stack
     443             :   ///      protector check code at the end of the BB.
     444             :   ///
     445             :   /// Given the aforementioned constraints, the following solution was devised:
     446             :   ///
     447             :   ///   1. On platforms that do not support SelectionDAG stack protector check
     448             :   ///      generation, allow for the normal IR level stack protector check
     449             :   ///      generation to continue.
     450             :   ///
     451             :   ///   2. On platforms that do support SelectionDAG stack protector check
     452             :   ///      generation:
     453             :   ///
     454             :   ///     a. Use the IR level stack protector pass to decide if a stack
     455             :   ///        protector is required/which BB we insert the stack protector check
     456             :   ///        in by reusing the logic already therein. If we wish to generate a
     457             :   ///        stack protector check in a basic block, we place a special IR
     458             :   ///        intrinsic called llvm.stackprotectorcheck right before the BB's
     459             :   ///        returninst or if there is a callinst that could potentially be
     460             :   ///        sibling call optimized, before the call inst.
     461             :   ///
     462             :   ///     b. Then when a BB with said intrinsic is processed, we codegen the BB
     463             :   ///        normally via SelectBasicBlock. In said process, when we visit the
     464             :   ///        stack protector check, we do not actually emit anything into the
     465             :   ///        BB. Instead, we just initialize the stack protector descriptor
     466             :   ///        class (which involves stashing information/creating the success
     467             :   ///        mbbb and the failure mbb if we have not created one for this
     468             :   ///        function yet) and export the guard variable that we are going to
     469             :   ///        compare.
     470             :   ///
     471             :   ///     c. After we finish selecting the basic block, in FinishBasicBlock if
     472             :   ///        the StackProtectorDescriptor attached to the SelectionDAGBuilder is
     473             :   ///        initialized, we produce the validation code with one of these
     474             :   ///        techniques:
     475             :   ///          1) with a call to a guard check function
     476             :   ///          2) with inlined instrumentation
     477             :   ///
     478             :   ///        1) We insert a call to the check function before the terminator.
     479             :   ///
     480             :   ///        2) We first find a splice point in the parent basic block
     481             :   ///        before the terminator and then splice the terminator of said basic
     482             :   ///        block into the success basic block. Then we code-gen a new tail for
     483             :   ///        the parent basic block consisting of the two loads, the comparison,
     484             :   ///        and finally two branches to the success/failure basic blocks. We
     485             :   ///        conclude by code-gening the failure basic block if we have not
     486             :   ///        code-gened it already (all stack protector checks we generate in
     487             :   ///        the same function, use the same failure basic block).
     488             :   class StackProtectorDescriptor {
     489             :   public:
     490       22523 :     StackProtectorDescriptor() = default;
     491             : 
     492             :     /// Returns true if all fields of the stack protector descriptor are
     493             :     /// initialized implying that we should/are ready to emit a stack protector.
     494             :     bool shouldEmitStackProtector() const {
     495      391983 :       return ParentMBB && SuccessMBB && FailureMBB;
     496             :     }
     497             : 
     498             :     bool shouldEmitFunctionBasedCheckStackProtector() const {
     499      392061 :       return ParentMBB && !SuccessMBB && !FailureMBB;
     500             :     }
     501             : 
     502             :     /// Initialize the stack protector descriptor structure for a new basic
     503             :     /// block.
     504         268 :     void initialize(const BasicBlock *BB, MachineBasicBlock *MBB,
     505             :                     bool FunctionBasedInstrumentation) {
     506             :       // Make sure we are not initialized yet.
     507             :       assert(!shouldEmitStackProtector() && "Stack Protector Descriptor is "
     508             :              "already initialized!");
     509         268 :       ParentMBB = MBB;
     510         268 :       if (!FunctionBasedInstrumentation) {
     511         190 :         SuccessMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ true);
     512         190 :         FailureMBB = AddSuccessorMBB(BB, MBB, /* IsLikely */ false, FailureMBB);
     513             :       }
     514         268 :     }
     515             : 
     516             :     /// Reset state that changes when we handle different basic blocks.
     517             :     ///
     518             :     /// This currently includes:
     519             :     ///
     520             :     /// 1. The specific basic block we are generating a
     521             :     /// stack protector for (ParentMBB).
     522             :     ///
     523             :     /// 2. The successor machine basic block that will contain the tail of
     524             :     /// parent mbb after we create the stack protector check (SuccessMBB). This
     525             :     /// BB is visited only on stack protector check success.
     526             :     void resetPerBBState() {
     527         268 :       ParentMBB = nullptr;
     528         268 :       SuccessMBB = nullptr;
     529             :     }
     530             : 
     531             :     /// Reset state that only changes when we switch functions.
     532             :     ///
     533             :     /// This currently includes:
     534             :     ///
     535             :     /// 1. FailureMBB since we reuse the failure code path for all stack
     536             :     /// protector checks created in an individual function.
     537             :     ///
     538             :     /// 2.The guard variable since the guard variable we are checking against is
     539             :     /// always the same.
     540             :     void resetPerFunctionState() {
     541      200798 :       FailureMBB = nullptr;
     542             :     }
     543             : 
     544             :     MachineBasicBlock *getParentMBB() { return ParentMBB; }
     545             :     MachineBasicBlock *getSuccessMBB() { return SuccessMBB; }
     546             :     MachineBasicBlock *getFailureMBB() { return FailureMBB; }
     547             : 
     548             :   private:
     549             :     /// The basic block for which we are generating the stack protector.
     550             :     ///
     551             :     /// As a result of stack protector generation, we will splice the
     552             :     /// terminators of this basic block into the successor mbb SuccessMBB and
     553             :     /// replace it with a compare/branch to the successor mbbs
     554             :     /// SuccessMBB/FailureMBB depending on whether or not the stack protector
     555             :     /// was violated.
     556             :     MachineBasicBlock *ParentMBB = nullptr;
     557             : 
     558             :     /// A basic block visited on stack protector check success that contains the
     559             :     /// terminators of ParentMBB.
     560             :     MachineBasicBlock *SuccessMBB = nullptr;
     561             : 
     562             :     /// This basic block visited on stack protector check failure that will
     563             :     /// contain a call to __stack_chk_fail().
     564             :     MachineBasicBlock *FailureMBB = nullptr;
     565             : 
     566             :     /// Add a successor machine basic block to ParentMBB. If the successor mbb
     567             :     /// has not been created yet (i.e. if SuccMBB = 0), then the machine basic
     568             :     /// block will be created. Assign a large weight if IsLikely is true.
     569             :     MachineBasicBlock *AddSuccessorMBB(const BasicBlock *BB,
     570             :                                        MachineBasicBlock *ParentMBB,
     571             :                                        bool IsLikely,
     572             :                                        MachineBasicBlock *SuccMBB = nullptr);
     573             :   };
     574             : 
     575             : private:
     576             :   const TargetMachine &TM;
     577             : 
     578             : public:
     579             :   /// Lowest valid SDNodeOrder. The special case 0 is reserved for scheduling
     580             :   /// nodes without a corresponding SDNode.
     581             :   static const unsigned LowestSDNodeOrder = 1;
     582             : 
     583             :   SelectionDAG &DAG;
     584             :   const DataLayout *DL = nullptr;
     585             :   AliasAnalysis *AA = nullptr;
     586             :   const TargetLibraryInfo *LibInfo;
     587             : 
     588             :   /// SwitchCases - Vector of CaseBlock structures used to communicate
     589             :   /// SwitchInst code generation information.
     590             :   std::vector<CaseBlock> SwitchCases;
     591             : 
     592             :   /// JTCases - Vector of JumpTable structures used to communicate
     593             :   /// SwitchInst code generation information.
     594             :   std::vector<JumpTableBlock> JTCases;
     595             : 
     596             :   /// BitTestCases - Vector of BitTestBlock structures used to communicate
     597             :   /// SwitchInst code generation information.
     598             :   std::vector<BitTestBlock> BitTestCases;
     599             : 
     600             :   /// A StackProtectorDescriptor structure used to communicate stack protector
     601             :   /// information in between SelectBasicBlock and FinishBasicBlock.
     602             :   StackProtectorDescriptor SPDescriptor;
     603             : 
     604             :   // Emit PHI-node-operand constants only once even if used by multiple
     605             :   // PHI nodes.
     606             :   DenseMap<const Constant *, unsigned> ConstantsOut;
     607             : 
     608             :   /// FuncInfo - Information about the function as a whole.
     609             :   ///
     610             :   FunctionLoweringInfo &FuncInfo;
     611             : 
     612             :   /// GFI - Garbage collection metadata for the function.
     613             :   GCFunctionInfo *GFI;
     614             : 
     615             :   /// LPadToCallSiteMap - Map a landing pad to the call site indexes.
     616             :   DenseMap<MachineBasicBlock *, SmallVector<unsigned, 4>> LPadToCallSiteMap;
     617             : 
     618             :   /// HasTailCall - This is set to true if a call in the current
     619             :   /// block has been translated as a tail call. In this case,
     620             :   /// no subsequent DAG nodes should be created.
     621             :   bool HasTailCall = false;
     622             : 
     623             :   LLVMContext *Context;
     624             : 
     625       22523 :   SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo,
     626             :                       CodeGenOpt::Level ol)
     627       22523 :     : SDNodeOrder(LowestSDNodeOrder), TM(dag.getTarget()), DAG(dag),
     628      157661 :       FuncInfo(funcinfo) {}
     629             : 
     630             :   void init(GCFunctionInfo *gfi, AliasAnalysis *AA,
     631             :             const TargetLibraryInfo *li);
     632             : 
     633             :   /// Clear out the current SelectionDAG and the associated state and prepare
     634             :   /// this SelectionDAGBuilder object to be used for a new block. This doesn't
     635             :   /// clear out information about additional blocks that are needed to complete
     636             :   /// switch lowering or PHI node updating; that information is cleared out as
     637             :   /// it is consumed.
     638             :   void clear();
     639             : 
     640             :   /// Clear the dangling debug information map. This function is separated from
     641             :   /// the clear so that debug information that is dangling in a basic block can
     642             :   /// be properly resolved in a different basic block. This allows the
     643             :   /// SelectionDAG to resolve dangling debug information attached to PHI nodes.
     644             :   void clearDanglingDebugInfo();
     645             : 
     646             :   /// Return the current virtual root of the Selection DAG, flushing any
     647             :   /// PendingLoad items. This must be done before emitting a store or any other
     648             :   /// node that may need to be ordered after any prior load instructions.
     649             :   SDValue getRoot();
     650             : 
     651             :   /// Similar to getRoot, but instead of flushing all the PendingLoad items,
     652             :   /// flush all the PendingExports items. It is necessary to do this before
     653             :   /// emitting a terminator instruction.
     654             :   SDValue getControlRoot();
     655             : 
     656             :   SDLoc getCurSDLoc() const {
     657     4930408 :     return SDLoc(CurInst, SDNodeOrder);
     658             :   }
     659             : 
     660      197269 :   DebugLoc getCurDebugLoc() const {
     661      224407 :     return CurInst ? CurInst->getDebugLoc() : DebugLoc();
     662             :   }
     663             : 
     664             :   void CopyValueToVirtualRegister(const Value *V, unsigned Reg);
     665             : 
     666             :   void visit(const Instruction &I);
     667             : 
     668             :   void visit(unsigned Opcode, const User &I);
     669             : 
     670             :   /// getCopyFromRegs - If there was virtual register allocated for the value V
     671             :   /// emit CopyFromReg of the specified type Ty. Return empty SDValue() otherwise.
     672             :   SDValue getCopyFromRegs(const Value *V, Type *Ty);
     673             : 
     674             :   // resolveDanglingDebugInfo - if we saw an earlier dbg_value referring to V,
     675             :   // generate the debug data structures now that we've seen its definition.
     676             :   void resolveDanglingDebugInfo(const Value *V, SDValue Val);
     677             : 
     678             :   SDValue getValue(const Value *V);
     679             :   bool findValue(const Value *V) const;
     680             : 
     681             :   SDValue getNonRegisterValue(const Value *V);
     682             :   SDValue getValueImpl(const Value *V);
     683             : 
     684             :   void setValue(const Value *V, SDValue NewN) {
     685     1898256 :     SDValue &N = NodeMap[V];
     686             :     assert(!N.getNode() && "Already set a value for this node!");
     687     1898256 :     N = NewN;
     688             :   }
     689             : 
     690             :   void setUnusedArgValue(const Value *V, SDValue NewN) {
     691       15674 :     SDValue &N = UnusedArgNodeMap[V];
     692             :     assert(!N.getNode() && "Already set a value for this node!");
     693       15674 :     N = NewN;
     694             :   }
     695             : 
     696             :   void FindMergedConditions(const Value *Cond, MachineBasicBlock *TBB,
     697             :                             MachineBasicBlock *FBB, MachineBasicBlock *CurBB,
     698             :                             MachineBasicBlock *SwitchBB,
     699             :                             Instruction::BinaryOps Opc, BranchProbability TW,
     700             :                             BranchProbability FW, bool InvertCond);
     701             :   void EmitBranchForMergedCondition(const Value *Cond, MachineBasicBlock *TBB,
     702             :                                     MachineBasicBlock *FBB,
     703             :                                     MachineBasicBlock *CurBB,
     704             :                                     MachineBasicBlock *SwitchBB,
     705             :                                     BranchProbability TW, BranchProbability FW,
     706             :                                     bool InvertCond);
     707             :   bool ShouldEmitAsBranches(const std::vector<CaseBlock> &Cases);
     708             :   bool isExportableFromCurrentBlock(const Value *V, const BasicBlock *FromBB);
     709             :   void CopyToExportRegsIfNeeded(const Value *V);
     710             :   void ExportFromCurrentBlock(const Value *V);
     711             :   void LowerCallTo(ImmutableCallSite CS, SDValue Callee, bool IsTailCall,
     712             :                    const BasicBlock *EHPadBB = nullptr);
     713             : 
     714             :   // Lower range metadata from 0 to N to assert zext to an integer of nearest
     715             :   // floor power of two.
     716             :   SDValue lowerRangeToAssertZExt(SelectionDAG &DAG, const Instruction &I,
     717             :                                  SDValue Op);
     718             : 
     719             :   void populateCallLoweringInfo(TargetLowering::CallLoweringInfo &CLI,
     720             :                                 ImmutableCallSite CS, unsigned ArgIdx,
     721             :                                 unsigned NumArgs, SDValue Callee,
     722             :                                 Type *ReturnTy, bool IsPatchPoint);
     723             : 
     724             :   std::pair<SDValue, SDValue>
     725             :   lowerInvokable(TargetLowering::CallLoweringInfo &CLI,
     726             :                  const BasicBlock *EHPadBB = nullptr);
     727             : 
     728             :   /// UpdateSplitBlock - When an MBB was split during scheduling, update the
     729             :   /// references that need to refer to the last resulting block.
     730             :   void UpdateSplitBlock(MachineBasicBlock *First, MachineBasicBlock *Last);
     731             : 
     732             :   /// Describes a gc.statepoint or a gc.statepoint like thing for the purposes
     733             :   /// of lowering into a STATEPOINT node.
     734         138 :   struct StatepointLoweringInfo {
     735             :     /// Bases[i] is the base pointer for Ptrs[i].  Together they denote the set
     736             :     /// of gc pointers this STATEPOINT has to relocate.
     737             :     SmallVector<const Value *, 16> Bases;
     738             :     SmallVector<const Value *, 16> Ptrs;
     739             : 
     740             :     /// The set of gc.relocate calls associated with this gc.statepoint.
     741             :     SmallVector<const GCRelocateInst *, 16> GCRelocates;
     742             : 
     743             :     /// The full list of gc arguments to the gc.statepoint being lowered.
     744             :     ArrayRef<const Use> GCArgs;
     745             : 
     746             :     /// The gc.statepoint instruction.
     747             :     const Instruction *StatepointInstr = nullptr;
     748             : 
     749             :     /// The list of gc transition arguments present in the gc.statepoint being
     750             :     /// lowered.
     751             :     ArrayRef<const Use> GCTransitionArgs;
     752             : 
     753             :     /// The ID that the resulting STATEPOINT instruction has to report.
     754             :     unsigned ID = -1;
     755             : 
     756             :     /// Information regarding the underlying call instruction.
     757             :     TargetLowering::CallLoweringInfo CLI;
     758             : 
     759             :     /// The deoptimization state associated with this gc.statepoint call, if
     760             :     /// any.
     761             :     ArrayRef<const Use> DeoptState;
     762             : 
     763             :     /// Flags associated with the meta arguments being lowered.
     764             :     uint64_t StatepointFlags = -1;
     765             : 
     766             :     /// The number of patchable bytes the call needs to get lowered into.
     767             :     unsigned NumPatchBytes = -1;
     768             : 
     769             :     /// The exception handling unwind destination, in case this represents an
     770             :     /// invoke of gc.statepoint.
     771             :     const BasicBlock *EHPadBB = nullptr;
     772             : 
     773         276 :     explicit StatepointLoweringInfo(SelectionDAG &DAG) : CLI(DAG) {}
     774             :   };
     775             : 
     776             :   /// Lower \p SLI into a STATEPOINT instruction.
     777             :   SDValue LowerAsSTATEPOINT(StatepointLoweringInfo &SLI);
     778             : 
     779             :   // This function is responsible for the whole statepoint lowering process.
     780             :   // It uniformly handles invoke and call statepoints.
     781             :   void LowerStatepoint(ImmutableStatepoint Statepoint,
     782             :                        const BasicBlock *EHPadBB = nullptr);
     783             : 
     784             :   void LowerCallSiteWithDeoptBundle(ImmutableCallSite CS, SDValue Callee,
     785             :                                     const BasicBlock *EHPadBB);
     786             : 
     787             :   void LowerDeoptimizeCall(const CallInst *CI);
     788             :   void LowerDeoptimizingReturn();
     789             : 
     790             :   void LowerCallSiteWithDeoptBundleImpl(ImmutableCallSite CS, SDValue Callee,
     791             :                                         const BasicBlock *EHPadBB,
     792             :                                         bool VarArgDisallowed,
     793             :                                         bool ForceVoidReturnTy);
     794             : 
     795             :   /// Returns the type of FrameIndex and TargetFrameIndex nodes.
     796             :   MVT getFrameIndexTy() {
     797         132 :     return DAG.getTargetLoweringInfo().getFrameIndexTy(DAG.getDataLayout());
     798             :   }
     799             : 
     800             : private:
     801             :   // Terminator instructions.
     802             :   void visitRet(const ReturnInst &I);
     803             :   void visitBr(const BranchInst &I);
     804             :   void visitSwitch(const SwitchInst &I);
     805             :   void visitIndirectBr(const IndirectBrInst &I);
     806             :   void visitUnreachable(const UnreachableInst &I);
     807             :   void visitCleanupRet(const CleanupReturnInst &I);
     808             :   void visitCatchSwitch(const CatchSwitchInst &I);
     809             :   void visitCatchRet(const CatchReturnInst &I);
     810             :   void visitCatchPad(const CatchPadInst &I);
     811             :   void visitCleanupPad(const CleanupPadInst &CPI);
     812             : 
     813             :   BranchProbability getEdgeProbability(const MachineBasicBlock *Src,
     814             :                                        const MachineBasicBlock *Dst) const;
     815             :   void addSuccessorWithProb(
     816             :       MachineBasicBlock *Src, MachineBasicBlock *Dst,
     817             :       BranchProbability Prob = BranchProbability::getUnknown());
     818             : 
     819             : public:
     820             :   void visitSwitchCase(CaseBlock &CB,
     821             :                        MachineBasicBlock *SwitchBB);
     822             :   void visitSPDescriptorParent(StackProtectorDescriptor &SPD,
     823             :                                MachineBasicBlock *ParentBB);
     824             :   void visitSPDescriptorFailure(StackProtectorDescriptor &SPD);
     825             :   void visitBitTestHeader(BitTestBlock &B, MachineBasicBlock *SwitchBB);
     826             :   void visitBitTestCase(BitTestBlock &BB,
     827             :                         MachineBasicBlock* NextMBB,
     828             :                         BranchProbability BranchProbToNext,
     829             :                         unsigned Reg,
     830             :                         BitTestCase &B,
     831             :                         MachineBasicBlock *SwitchBB);
     832             :   void visitJumpTable(JumpTable &JT);
     833             :   void visitJumpTableHeader(JumpTable &JT, JumpTableHeader &JTH,
     834             :                             MachineBasicBlock *SwitchBB);
     835             : 
     836             : private:
     837             :   // These all get lowered before this pass.
     838             :   void visitInvoke(const InvokeInst &I);
     839             :   void visitResume(const ResumeInst &I);
     840             : 
     841             :   void visitBinary(const User &I, unsigned OpCode);
     842             :   void visitShift(const User &I, unsigned Opcode);
     843      211792 :   void visitAdd(const User &I)  { visitBinary(I, ISD::ADD); }
     844       10678 :   void visitFAdd(const User &I) { visitBinary(I, ISD::FADD); }
     845        6672 :   void visitSub(const User &I)  { visitBinary(I, ISD::SUB); }
     846             :   void visitFSub(const User &I);
     847        6366 :   void visitMul(const User &I)  { visitBinary(I, ISD::MUL); }
     848        7479 :   void visitFMul(const User &I) { visitBinary(I, ISD::FMUL); }
     849         845 :   void visitURem(const User &I) { visitBinary(I, ISD::UREM); }
     850         784 :   void visitSRem(const User &I) { visitBinary(I, ISD::SREM); }
     851          98 :   void visitFRem(const User &I) { visitBinary(I, ISD::FREM); }
     852         945 :   void visitUDiv(const User &I) { visitBinary(I, ISD::UDIV); }
     853             :   void visitSDiv(const User &I);
     854        1707 :   void visitFDiv(const User &I) { visitBinary(I, ISD::FDIV); }
     855       11882 :   void visitAnd (const User &I) { visitBinary(I, ISD::AND); }
     856        7807 :   void visitOr  (const User &I) { visitBinary(I, ISD::OR); }
     857        5582 :   void visitXor (const User &I) { visitBinary(I, ISD::XOR); }
     858        7595 :   void visitShl (const User &I) { visitShift(I, ISD::SHL); }
     859        6288 :   void visitLShr(const User &I) { visitShift(I, ISD::SRL); }
     860        3075 :   void visitAShr(const User &I) { visitShift(I, ISD::SRA); }
     861             :   void visitICmp(const User &I);
     862             :   void visitFCmp(const User &I);
     863             :   // Visit the conversion instructions
     864             :   void visitTrunc(const User &I);
     865             :   void visitZExt(const User &I);
     866             :   void visitSExt(const User &I);
     867             :   void visitFPTrunc(const User &I);
     868             :   void visitFPExt(const User &I);
     869             :   void visitFPToUI(const User &I);
     870             :   void visitFPToSI(const User &I);
     871             :   void visitUIToFP(const User &I);
     872             :   void visitSIToFP(const User &I);
     873             :   void visitPtrToInt(const User &I);
     874             :   void visitIntToPtr(const User &I);
     875             :   void visitBitCast(const User &I);
     876             :   void visitAddrSpaceCast(const User &I);
     877             : 
     878             :   void visitExtractElement(const User &I);
     879             :   void visitInsertElement(const User &I);
     880             :   void visitShuffleVector(const User &I);
     881             : 
     882             :   void visitExtractValue(const User &I);
     883             :   void visitInsertValue(const User &I);
     884             :   void visitLandingPad(const LandingPadInst &I);
     885             : 
     886             :   void visitGetElementPtr(const User &I);
     887             :   void visitSelect(const User &I);
     888             : 
     889             :   void visitAlloca(const AllocaInst &I);
     890             :   void visitLoad(const LoadInst &I);
     891             :   void visitStore(const StoreInst &I);
     892             :   void visitMaskedLoad(const CallInst &I, bool IsExpanding = false);
     893             :   void visitMaskedStore(const CallInst &I, bool IsCompressing = false);
     894             :   void visitMaskedGather(const CallInst &I);
     895             :   void visitMaskedScatter(const CallInst &I);
     896             :   void visitAtomicCmpXchg(const AtomicCmpXchgInst &I);
     897             :   void visitAtomicRMW(const AtomicRMWInst &I);
     898             :   void visitFence(const FenceInst &I);
     899             :   void visitPHI(const PHINode &I);
     900             :   void visitCall(const CallInst &I);
     901             :   bool visitMemCmpCall(const CallInst &I);
     902             :   bool visitMemPCpyCall(const CallInst &I);
     903             :   bool visitMemChrCall(const CallInst &I);
     904             :   bool visitStrCpyCall(const CallInst &I, bool isStpcpy);
     905             :   bool visitStrCmpCall(const CallInst &I);
     906             :   bool visitStrLenCall(const CallInst &I);
     907             :   bool visitStrNLenCall(const CallInst &I);
     908             :   bool visitUnaryFloatCall(const CallInst &I, unsigned Opcode);
     909             :   bool visitBinaryFloatCall(const CallInst &I, unsigned Opcode);
     910             :   void visitAtomicLoad(const LoadInst &I);
     911             :   void visitAtomicStore(const StoreInst &I);
     912             :   void visitLoadFromSwiftError(const LoadInst &I);
     913             :   void visitStoreToSwiftError(const StoreInst &I);
     914             : 
     915             :   void visitInlineAsm(ImmutableCallSite CS);
     916             :   const char *visitIntrinsicCall(const CallInst &I, unsigned Intrinsic);
     917             :   void visitTargetIntrinsic(const CallInst &I, unsigned Intrinsic);
     918             :   void visitConstrainedFPIntrinsic(const ConstrainedFPIntrinsic &FPI);
     919             : 
     920             :   void visitVAStart(const CallInst &I);
     921             :   void visitVAArg(const VAArgInst &I);
     922             :   void visitVAEnd(const CallInst &I);
     923             :   void visitVACopy(const CallInst &I);
     924             :   void visitStackmap(const CallInst &I);
     925             :   void visitPatchpoint(ImmutableCallSite CS,
     926             :                        const BasicBlock *EHPadBB = nullptr);
     927             : 
     928             :   // These two are implemented in StatepointLowering.cpp
     929             :   void visitGCRelocate(const GCRelocateInst &I);
     930             :   void visitGCResult(const GCResultInst &I);
     931             : 
     932             :   void visitVectorReduce(const CallInst &I, unsigned Intrinsic);
     933             : 
     934             :   void visitUserOp1(const Instruction &I) {
     935           0 :     llvm_unreachable("UserOp1 should not exist at instruction selection time!");
     936             :   }
     937             :   void visitUserOp2(const Instruction &I) {
     938           0 :     llvm_unreachable("UserOp2 should not exist at instruction selection time!");
     939             :   }
     940             : 
     941             :   void processIntegerCallValue(const Instruction &I,
     942             :                                SDValue Value, bool IsSigned);
     943             : 
     944             :   void HandlePHINodesInSuccessorBlocks(const BasicBlock *LLVMBB);
     945             : 
     946             :   void emitInlineAsmError(ImmutableCallSite CS, const Twine &Message);
     947             : 
     948             :   /// If V is an function argument then create corresponding DBG_VALUE machine
     949             :   /// instruction for it now. At the end of instruction selection, they will be
     950             :   /// inserted to the entry BB.
     951             :   bool EmitFuncArgumentDbgValue(const Value *V, DILocalVariable *Variable,
     952             :                                 DIExpression *Expr, DILocation *DL,
     953             :                                 bool IsDbgDeclare, const SDValue &N);
     954             : 
     955             :   /// Return the next block after MBB, or nullptr if there is none.
     956             :   MachineBasicBlock *NextBlock(MachineBasicBlock *MBB);
     957             : 
     958             :   /// Update the DAG and DAG builder with the relevant information after
     959             :   /// a new root node has been created which could be a tail call.
     960             :   void updateDAGForMaybeTailCall(SDValue MaybeTC);
     961             : 
     962             :   /// Return the appropriate SDDbgValue based on N.
     963             :   SDDbgValue *getDbgValue(SDValue N, DILocalVariable *Variable,
     964             :                           DIExpression *Expr, const DebugLoc &dl,
     965             :                           unsigned DbgSDNodeOrder);
     966             : };
     967             : 
     968             : /// RegsForValue - This struct represents the registers (physical or virtual)
     969             : /// that a particular set of values is assigned, and the type information about
     970             : /// the value. The most common situation is to represent one value at a time,
     971             : /// but struct or array values are handled element-wise as multiple values.  The
     972             : /// splitting of aggregates is performed recursively, so that we never have
     973             : /// aggregate-typed registers. The values at this point do not necessarily have
     974             : /// legal types, so each value may require one or more registers of some legal
     975             : /// type.
     976             : ///
     977     1297486 : struct RegsForValue {
     978             :   /// The value types of the values, which may not be legal, and
     979             :   /// may need be promoted or synthesized from one or more registers.
     980             :   SmallVector<EVT, 4> ValueVTs;
     981             : 
     982             :   /// The value types of the registers. This is the same size as ValueVTs and it
     983             :   /// records, for each value, what the type of the assigned register or
     984             :   /// registers are. (Individual values are never synthesized from more than one
     985             :   /// type of register.)
     986             :   ///
     987             :   /// With virtual registers, the contents of RegVTs is redundant with TLI's
     988             :   /// getRegisterType member function, however when with physical registers
     989             :   /// it is necessary to have a separate record of the types.
     990             :   SmallVector<MVT, 4> RegVTs;
     991             : 
     992             :   /// This list holds the registers assigned to the values.
     993             :   /// Each legal or promoted value requires one register, and each
     994             :   /// expanded value requires multiple registers.
     995             :   SmallVector<unsigned, 4> Regs;
     996             : 
     997             :   /// This list holds the number of registers for each value.
     998             :   SmallVector<unsigned, 4> RegCount;
     999             : 
    1000             :   /// Records if this value needs to be treated in an ABI dependant manner,
    1001             :   /// different to normal type legalization.
    1002             :   bool IsABIMangled = false;
    1003             : 
    1004       77613 :   RegsForValue() = default;
    1005             :   RegsForValue(const SmallVector<unsigned, 4> &regs, MVT regvt, EVT valuevt,
    1006             :                bool IsABIMangledValue = false);
    1007             :   RegsForValue(LLVMContext &Context, const TargetLowering &TLI,
    1008             :                const DataLayout &DL, unsigned Reg, Type *Ty,
    1009             :                bool IsABIMangledValue = false);
    1010             : 
    1011             :   /// Add the specified values to this one.
    1012        3782 :   void append(const RegsForValue &RHS) {
    1013        7564 :     ValueVTs.append(RHS.ValueVTs.begin(), RHS.ValueVTs.end());
    1014        7564 :     RegVTs.append(RHS.RegVTs.begin(), RHS.RegVTs.end());
    1015        7564 :     Regs.append(RHS.Regs.begin(), RHS.Regs.end());
    1016        7564 :     RegCount.push_back(RHS.Regs.size());
    1017        3782 :   }
    1018             : 
    1019             :   /// Emit a series of CopyFromReg nodes that copies from this value and returns
    1020             :   /// the result as a ValueVTs value. This uses Chain/Flag as the input and
    1021             :   /// updates them for the output Chain/Flag. If the Flag pointer is NULL, no
    1022             :   /// flag is used.
    1023             :   SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
    1024             :                           const SDLoc &dl, SDValue &Chain, SDValue *Flag,
    1025             :                           const Value *V = nullptr) const;
    1026             : 
    1027             :   /// Emit a series of CopyToReg nodes that copies the specified value into the
    1028             :   /// registers specified by this object. This uses Chain/Flag as the input and
    1029             :   /// updates them for the output Chain/Flag. If the Flag pointer is nullptr, no
    1030             :   /// flag is used. If V is not nullptr, then it is used in printing better
    1031             :   /// diagnostic messages on error.
    1032             :   void getCopyToRegs(SDValue Val, SelectionDAG &DAG, const SDLoc &dl,
    1033             :                      SDValue &Chain, SDValue *Flag, const Value *V = nullptr,
    1034             :                      ISD::NodeType PreferredExtendType = ISD::ANY_EXTEND) const;
    1035             : 
    1036             :   /// Add this value to the specified inlineasm node operand list. This adds the
    1037             :   /// code marker, matching input operand index (if applicable), and includes
    1038             :   /// the number of values added into it.
    1039             :   void AddInlineAsmOperands(unsigned Kind, bool HasMatching,
    1040             :                             unsigned MatchingIdx, const SDLoc &dl,
    1041             :                             SelectionDAG &DAG, std::vector<SDValue> &Ops) const;
    1042             : };
    1043             : 
    1044             : } // end namespace llvm
    1045             : 
    1046             : #endif // LLVM_LIB_CODEGEN_SELECTIONDAG_SELECTIONDAGBUILDER_H

Generated by: LCOV version 1.13