LCOV - code coverage report
Current view: top level - lib/MC - MCRegisterInfo.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 52 55 94.5 %
Date: 2018-06-17 00:07:59 Functions: 11 11 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- MC/MCRegisterInfo.cpp - Target Register Description ----------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file implements MCRegisterInfo functions.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #include "llvm/MC/MCRegisterInfo.h"
      15             : #include "llvm/ADT/DenseMap.h"
      16             : #include "llvm/Support/ErrorHandling.h"
      17             : #include <algorithm>
      18             : #include <cassert>
      19             : #include <cstdint>
      20             : 
      21             : using namespace llvm;
      22             : 
      23       78179 : unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx,
      24             :                                              const MCRegisterClass *RC) const {
      25      158416 :   for (MCSuperRegIterator Supers(Reg, this); Supers.isValid(); ++Supers)
      26      285600 :     if (RC->contains(*Supers) && Reg == getSubReg(*Supers, SubIdx))
      27             :       return *Supers;
      28        3623 :   return 0;
      29             : }
      30             : 
      31      779458 : unsigned MCRegisterInfo::getSubReg(unsigned Reg, unsigned Idx) const {
      32             :   assert(Idx && Idx < getNumSubRegIndices() &&
      33             :          "This is not a subregister index");
      34             :   // Get a pointer to the corresponding SubRegIndices list. This list has the
      35             :   // name of each sub-register in the same order as MCSubRegIterator.
      36     1558916 :   const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
      37     2018282 :   for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
      38     1153013 :     if (*SRI == Idx)
      39             :       return *Subs;
      40      245857 :   return 0;
      41             : }
      42             : 
      43       50114 : unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
      44             :   assert(SubReg && SubReg < getNumRegs() && "This is not a register");
      45             :   // Get a pointer to the corresponding SubRegIndices list. This list has the
      46             :   // name of each sub-register in the same order as MCSubRegIterator.
      47      100228 :   const uint16_t *SRI = SubRegIndices + get(Reg).SubRegIndices;
      48       97716 :   for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI)
      49       58565 :     if (*Subs == SubReg)
      50       34764 :       return *SRI;
      51       15350 :   return 0;
      52             : }
      53             : 
      54        1205 : unsigned MCRegisterInfo::getSubRegIdxSize(unsigned Idx) const {
      55             :   assert(Idx && Idx < getNumSubRegIndices() &&
      56             :          "This is not a subregister index");
      57        1205 :   return SubRegIdxRanges[Idx].Size;
      58             : }
      59             : 
      60         852 : unsigned MCRegisterInfo::getSubRegIdxOffset(unsigned Idx) const {
      61             :   assert(Idx && Idx < getNumSubRegIndices() &&
      62             :          "This is not a subregister index");
      63         852 :   return SubRegIdxRanges[Idx].Offset;
      64             : }
      65             : 
      66      480319 : int MCRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
      67      480319 :   const DwarfLLVMRegPair *M = isEH ? EHL2DwarfRegs : L2DwarfRegs;
      68      480319 :   unsigned Size = isEH ? EHL2DwarfRegsSize : L2DwarfRegsSize;
      69             : 
      70      480319 :   if (!M)
      71             :     return -1;
      72             :   DwarfLLVMRegPair Key = { RegNum, 0 };
      73      480296 :   const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
      74      480296 :   if (I == M+Size || I->FromReg != RegNum)
      75             :     return -1;
      76      478796 :   return I->ToReg;
      77             : }
      78             : 
      79        2826 : int MCRegisterInfo::getLLVMRegNum(unsigned RegNum, bool isEH) const {
      80        2826 :   const DwarfLLVMRegPair *M = isEH ? EHDwarf2LRegs : Dwarf2LRegs;
      81        2826 :   unsigned Size = isEH ? EHDwarf2LRegsSize : Dwarf2LRegsSize;
      82             : 
      83        2826 :   if (!M)
      84             :     return -1;
      85             :   DwarfLLVMRegPair Key = { RegNum, 0 };
      86        2826 :   const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
      87             :   assert(I != M+Size && I->FromReg == RegNum && "Invalid RegNum");
      88        2826 :   return I->ToReg;
      89             : }
      90             : 
      91       18694 : int MCRegisterInfo::getLLVMRegNumFromEH(unsigned RegNum) const {
      92       18694 :   const DwarfLLVMRegPair *M = EHDwarf2LRegs;
      93       18694 :   unsigned Size = EHDwarf2LRegsSize;
      94             : 
      95       18694 :   if (!M)
      96             :     return -1;
      97             :   DwarfLLVMRegPair Key = { RegNum, 0 };
      98       18694 :   const DwarfLLVMRegPair *I = std::lower_bound(M, M+Size, Key);
      99       18694 :   if (I == M+Size || I->FromReg != RegNum)
     100             :     return -1;
     101       18693 :   return I->ToReg;
     102             : }
     103             : 
     104         254 : int MCRegisterInfo::getDwarfRegNumFromDwarfEHRegNum(unsigned RegNum) const {
     105             :   // On ELF platforms, DWARF EH register numbers are the same as DWARF
     106             :   // other register numbers.  On Darwin x86, they differ and so need to be
     107             :   // mapped.  The .cfi_* directives accept integer literals as well as
     108             :   // register names and should generate exactly what the assembly code
     109             :   // asked for, so there might be DWARF/EH register numbers that don't have
     110             :   // a corresponding LLVM register number at all.  So if we can't map the
     111             :   // EH register number to an LLVM register number, assume it's just a
     112             :   // valid DWARF register number as is.
     113         254 :   int LRegNum = getLLVMRegNumFromEH(RegNum);
     114         254 :   if (LRegNum != -1)
     115         254 :     return getDwarfRegNum(LRegNum, false);
     116           0 :   return RegNum;
     117             : }
     118             : 
     119           7 : int MCRegisterInfo::getSEHRegNum(unsigned RegNum) const {
     120           7 :   const DenseMap<unsigned, int>::const_iterator I = L2SEHRegs.find(RegNum);
     121           7 :   if (I == L2SEHRegs.end()) return (int)RegNum;
     122           7 :   return I->second;
     123             : }
     124             : 
     125         321 : int MCRegisterInfo::getCodeViewRegNum(unsigned RegNum) const {
     126         321 :   if (L2CVRegs.empty())
     127           0 :     report_fatal_error("target does not implement codeview register mapping");
     128         321 :   const DenseMap<unsigned, int>::const_iterator I = L2CVRegs.find(RegNum);
     129         321 :   if (I == L2CVRegs.end())
     130           0 :     report_fatal_error("unknown codeview register");
     131         321 :   return I->second;
     132             : }

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