LCOV - code coverage report
Current view: top level - lib/Target/AArch64 - AArch64LegalizerInfo.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 181 181 100.0 %
Date: 2017-09-14 15:23:50 Functions: 3 3 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- AArch64LegalizerInfo.cpp ----------------------------------*- C++ -*-==//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : /// \file
      10             : /// This file implements the targeting of the Machinelegalizer class for
      11             : /// AArch64.
      12             : /// \todo This should be generated by TableGen.
      13             : //===----------------------------------------------------------------------===//
      14             : 
      15             : #include "AArch64LegalizerInfo.h"
      16             : #include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
      17             : #include "llvm/CodeGen/MachineInstr.h"
      18             : #include "llvm/CodeGen/MachineRegisterInfo.h"
      19             : #include "llvm/CodeGen/ValueTypes.h"
      20             : #include "llvm/IR/DerivedTypes.h"
      21             : #include "llvm/IR/Type.h"
      22             : #include "llvm/Target/TargetOpcodes.h"
      23             : 
      24             : using namespace llvm;
      25             : 
      26        1214 : AArch64LegalizerInfo::AArch64LegalizerInfo() {
      27             :   using namespace TargetOpcode;
      28        1214 :   const LLT p0 = LLT::pointer(0, 64);
      29        1214 :   const LLT s1 = LLT::scalar(1);
      30        1214 :   const LLT s8 = LLT::scalar(8);
      31        1214 :   const LLT s16 = LLT::scalar(16);
      32        1214 :   const LLT s32 = LLT::scalar(32);
      33        1214 :   const LLT s64 = LLT::scalar(64);
      34        1214 :   const LLT v2s32 = LLT::vector(2, 32);
      35        1214 :   const LLT v4s32 = LLT::vector(4, 32);
      36        1214 :   const LLT v2s64 = LLT::vector(2, 64);
      37             : 
      38        9712 :   for (auto Ty : {p0, s1, s8, s16, s32, s64})
      39       14568 :     setAction({G_IMPLICIT_DEF, Ty}, Legal);
      40             : 
      41        6070 :   for (auto Ty : {s16, s32, s64})
      42        7284 :     setAction({G_PHI, Ty}, Legal);
      43             : 
      44        4856 :   for (auto Ty : {s1, s8})
      45        4856 :     setAction({G_PHI, Ty}, WidenScalar);
      46             : 
      47       10926 :   for (unsigned BinOp : {G_ADD, G_SUB, G_MUL, G_AND, G_OR, G_XOR, G_SHL}) {
      48             :     // These operations naturally get the right answer when used on
      49             :     // GPR32, even if the actual type is narrower.
      50       59486 :     for (auto Ty : {s32, s64, v2s32, v4s32, v2s64})
      51       84980 :       setAction({BinOp, Ty}, Legal);
      52             : 
      53       42490 :     for (auto Ty : {s1, s8, s16})
      54       50988 :       setAction({BinOp, Ty}, WidenScalar);
      55             :   }
      56             : 
      57        2428 :   setAction({G_GEP, p0}, Legal);
      58        2428 :   setAction({G_GEP, 1, s64}, Legal);
      59             : 
      60        7284 :   for (auto Ty : {s1, s8, s16, s32})
      61        9712 :     setAction({G_GEP, 1, Ty}, WidenScalar);
      62             : 
      63        2428 :   setAction({G_PTR_MASK, p0}, Legal);
      64             : 
      65        7284 :   for (unsigned BinOp : {G_LSHR, G_ASHR, G_SDIV, G_UDIV}) {
      66       19424 :     for (auto Ty : {s32, s64})
      67       19424 :       setAction({BinOp, Ty}, Legal);
      68             : 
      69       24280 :     for (auto Ty : {s1, s8, s16})
      70       29136 :       setAction({BinOp, Ty}, WidenScalar);
      71             :   }
      72             : 
      73        6070 :   for (unsigned BinOp : {G_SREM, G_UREM})
      74       16996 :     for (auto Ty : { s1, s8, s16, s32, s64 })
      75       24280 :       setAction({BinOp, Ty}, Lower);
      76             : 
      77        6070 :   for (unsigned Op : {G_SMULO, G_UMULO})
      78        4856 :       setAction({Op, s64}, Lower);
      79             : 
      80       15782 :   for (unsigned Op : {G_UADDE, G_USUBE, G_SADDO, G_SSUBO, G_SMULH, G_UMULH}) {
      81       29136 :     for (auto Ty : { s32, s64 })
      82       29136 :       setAction({Op, Ty}, Legal);
      83             : 
      84       14568 :     setAction({Op, 1, s1}, Legal);
      85             :   }
      86             : 
      87       13354 :   for (unsigned BinOp : {G_FADD, G_FSUB, G_FMA, G_FMUL, G_FDIV})
      88       24280 :     for (auto Ty : {s32, s64})
      89       24280 :       setAction({BinOp, Ty}, Legal);
      90             : 
      91        6070 :   for (unsigned BinOp : {G_FREM, G_FPOW}) {
      92        4856 :     setAction({BinOp, s32}, Libcall);
      93        4856 :     setAction({BinOp, s64}, Libcall);
      94             :   }
      95             : 
      96        6070 :   for (auto Ty : {s32, s64, p0}) {
      97        7284 :     setAction({G_INSERT, Ty}, Legal);
      98        7284 :     setAction({G_INSERT, 1, Ty}, Legal);
      99             :   }
     100        6070 :   for (auto Ty : {s1, s8, s16}) {
     101        7284 :     setAction({G_INSERT, Ty}, WidenScalar);
     102        7284 :     setAction({G_INSERT, 1, Ty}, Legal);
     103             :     // FIXME: Can't widen the sources because that violates the constraints on
     104             :     // G_INSERT (It seems entirely reasonable that inputs shouldn't overlap).
     105             :   }
     106             : 
     107        9712 :   for (auto Ty : {s1, s8, s16, s32, s64, p0})
     108       14568 :     setAction({G_EXTRACT, Ty}, Legal);
     109             : 
     110        4856 :   for (auto Ty : {s32, s64})
     111        4856 :     setAction({G_EXTRACT, 1, Ty}, Legal);
     112             : 
     113        4856 :   for (unsigned MemOp : {G_LOAD, G_STORE}) {
     114       19424 :     for (auto Ty : {s8, s16, s32, s64, p0, v2s32})
     115       29136 :       setAction({MemOp, Ty}, Legal);
     116             : 
     117        4856 :     setAction({MemOp, s1}, WidenScalar);
     118             : 
     119             :     // And everything's fine in addrspace 0.
     120        4856 :     setAction({MemOp, 1, p0}, Legal);
     121             :   }
     122             : 
     123             :   // Constants
     124        4856 :   for (auto Ty : {s32, s64}) {
     125        4856 :     setAction({TargetOpcode::G_CONSTANT, Ty}, Legal);
     126        4856 :     setAction({TargetOpcode::G_FCONSTANT, Ty}, Legal);
     127             :   }
     128             : 
     129        2428 :   setAction({G_CONSTANT, p0}, Legal);
     130             : 
     131        6070 :   for (auto Ty : {s1, s8, s16})
     132        7284 :     setAction({TargetOpcode::G_CONSTANT, Ty}, WidenScalar);
     133             : 
     134        2428 :   setAction({TargetOpcode::G_FCONSTANT, s16}, WidenScalar);
     135             : 
     136        2428 :   setAction({G_ICMP, 1, s32}, Legal);
     137        2428 :   setAction({G_ICMP, 1, s64}, Legal);
     138        2428 :   setAction({G_ICMP, 1, p0}, Legal);
     139             : 
     140        6070 :   for (auto Ty : {s1, s8, s16}) {
     141        7284 :     setAction({G_ICMP, Ty}, WidenScalar);
     142        7284 :     setAction({G_FCMP, Ty}, WidenScalar);
     143        7284 :     setAction({G_ICMP, 1, Ty}, WidenScalar);
     144             :   }
     145             : 
     146        2428 :   setAction({G_ICMP, s32}, Legal);
     147        2428 :   setAction({G_FCMP, s32}, Legal);
     148        2428 :   setAction({G_FCMP, 1, s32}, Legal);
     149        2428 :   setAction({G_FCMP, 1, s64}, Legal);
     150             : 
     151             :   // Extensions
     152        8498 :   for (auto Ty : { s1, s8, s16, s32, s64 }) {
     153       12140 :     setAction({G_ZEXT, Ty}, Legal);
     154       12140 :     setAction({G_SEXT, Ty}, Legal);
     155       12140 :     setAction({G_ANYEXT, Ty}, Legal);
     156             :   }
     157             : 
     158        7284 :   for (auto Ty : { s1, s8, s16, s32 }) {
     159        9712 :     setAction({G_ZEXT, 1, Ty}, Legal);
     160        9712 :     setAction({G_SEXT, 1, Ty}, Legal);
     161        9712 :     setAction({G_ANYEXT, 1, Ty}, Legal);
     162             :   }
     163             : 
     164             :   // FP conversions
     165        4856 :   for (auto Ty : { s16, s32 }) {
     166        4856 :     setAction({G_FPTRUNC, Ty}, Legal);
     167        4856 :     setAction({G_FPEXT, 1, Ty}, Legal);
     168             :   }
     169             : 
     170        4856 :   for (auto Ty : { s32, s64 }) {
     171        4856 :     setAction({G_FPTRUNC, 1, Ty}, Legal);
     172        4856 :     setAction({G_FPEXT, Ty}, Legal);
     173             :   }
     174             : 
     175        7284 :   for (auto Ty : { s1, s8, s16, s32 })
     176        9712 :     setAction({G_TRUNC, Ty}, Legal);
     177             : 
     178        7284 :   for (auto Ty : { s8, s16, s32, s64 })
     179        9712 :     setAction({G_TRUNC, 1, Ty}, Legal);
     180             : 
     181             :   // Conversions
     182        4856 :   for (auto Ty : { s32, s64 }) {
     183        4856 :     setAction({G_FPTOSI, 0, Ty}, Legal);
     184        4856 :     setAction({G_FPTOUI, 0, Ty}, Legal);
     185        4856 :     setAction({G_SITOFP, 1, Ty}, Legal);
     186        4856 :     setAction({G_UITOFP, 1, Ty}, Legal);
     187             :   }
     188        6070 :   for (auto Ty : { s1, s8, s16 }) {
     189        7284 :     setAction({G_FPTOSI, 0, Ty}, WidenScalar);
     190        7284 :     setAction({G_FPTOUI, 0, Ty}, WidenScalar);
     191        7284 :     setAction({G_SITOFP, 1, Ty}, WidenScalar);
     192        7284 :     setAction({G_UITOFP, 1, Ty}, WidenScalar);
     193             :   }
     194             : 
     195        4856 :   for (auto Ty : { s32, s64 }) {
     196        4856 :     setAction({G_FPTOSI, 1, Ty}, Legal);
     197        4856 :     setAction({G_FPTOUI, 1, Ty}, Legal);
     198        4856 :     setAction({G_SITOFP, 0, Ty}, Legal);
     199        4856 :     setAction({G_UITOFP, 0, Ty}, Legal);
     200             :   }
     201             : 
     202             :   // Control-flow
     203        7284 :   for (auto Ty : {s1, s8, s16, s32})
     204        9712 :     setAction({G_BRCOND, Ty}, Legal);
     205        2428 :   setAction({G_BRINDIRECT, p0}, Legal);
     206             : 
     207             :   // Select
     208        6070 :   for (auto Ty : {s1, s8, s16})
     209        7284 :     setAction({G_SELECT, Ty}, WidenScalar);
     210             : 
     211        6070 :   for (auto Ty : {s32, s64, p0})
     212        7284 :     setAction({G_SELECT, Ty}, Legal);
     213             : 
     214        2428 :   setAction({G_SELECT, 1, s1}, Legal);
     215             : 
     216             :   // Pointer-handling
     217        2428 :   setAction({G_FRAME_INDEX, p0}, Legal);
     218        2428 :   setAction({G_GLOBAL_VALUE, p0}, Legal);
     219             : 
     220        8498 :   for (auto Ty : {s1, s8, s16, s32, s64})
     221       12140 :     setAction({G_PTRTOINT, 0, Ty}, Legal);
     222             : 
     223        2428 :   setAction({G_PTRTOINT, 1, p0}, Legal);
     224             : 
     225        2428 :   setAction({G_INTTOPTR, 0, p0}, Legal);
     226        2428 :   setAction({G_INTTOPTR, 1, s64}, Legal);
     227             : 
     228             :   // Casts for 32 and 64-bit width type are just copies.
     229        8498 :   for (auto Ty : {s1, s8, s16, s32, s64}) {
     230       12140 :     setAction({G_BITCAST, 0, Ty}, Legal);
     231       12140 :     setAction({G_BITCAST, 1, Ty}, Legal);
     232             :   }
     233             : 
     234             :   // For the sake of copying bits around, the type does not really
     235             :   // matter as long as it fits a register.
     236        6070 :   for (int EltSize = 8; EltSize <= 64; EltSize *= 2) {
     237       14568 :     setAction({G_BITCAST, 0, LLT::vector(128/EltSize, EltSize)}, Legal);
     238        9712 :     setAction({G_BITCAST, 1, LLT::vector(128/EltSize, EltSize)}, Legal);
     239        4856 :     if (EltSize >= 64)
     240        1214 :       continue;
     241             : 
     242       10926 :     setAction({G_BITCAST, 0, LLT::vector(64/EltSize, EltSize)}, Legal);
     243        7284 :     setAction({G_BITCAST, 1, LLT::vector(64/EltSize, EltSize)}, Legal);
     244        3642 :     if (EltSize >= 32)
     245        1214 :       continue;
     246             : 
     247        7284 :     setAction({G_BITCAST, 0, LLT::vector(32/EltSize, EltSize)}, Legal);
     248        4856 :     setAction({G_BITCAST, 1, LLT::vector(32/EltSize, EltSize)}, Legal);
     249             :   }
     250             : 
     251        2428 :   setAction({G_VASTART, p0}, Legal);
     252             : 
     253             :   // va_list must be a pointer, but most sized types are pretty easy to handle
     254             :   // as the destination.
     255        2428 :   setAction({G_VAARG, 1, p0}, Legal);
     256             : 
     257        8498 :   for (auto Ty : {s8, s16, s32, s64, p0})
     258       12140 :     setAction({G_VAARG, Ty}, Custom);
     259             : 
     260        1214 :   computeTables();
     261        1214 : }
     262             : 
     263           3 : bool AArch64LegalizerInfo::legalizeCustom(MachineInstr &MI,
     264             :                                           MachineRegisterInfo &MRI,
     265             :                                           MachineIRBuilder &MIRBuilder) const {
     266           6 :   switch (MI.getOpcode()) {
     267             :   default:
     268             :     // No idea what to do.
     269             :     return false;
     270           3 :   case TargetOpcode::G_VAARG:
     271           3 :     return legalizeVaArg(MI, MRI, MIRBuilder);
     272             :   }
     273             : 
     274             :   llvm_unreachable("expected switch to return");
     275             : }
     276             : 
     277           3 : bool AArch64LegalizerInfo::legalizeVaArg(MachineInstr &MI,
     278             :                                          MachineRegisterInfo &MRI,
     279             :                                          MachineIRBuilder &MIRBuilder) const {
     280           3 :   MIRBuilder.setInstr(MI);
     281           3 :   MachineFunction &MF = MIRBuilder.getMF();
     282           3 :   unsigned Align = MI.getOperand(2).getImm();
     283           3 :   unsigned Dst = MI.getOperand(0).getReg();
     284           3 :   unsigned ListPtr = MI.getOperand(1).getReg();
     285             : 
     286           3 :   LLT PtrTy = MRI.getType(ListPtr);
     287           6 :   LLT IntPtrTy = LLT::scalar(PtrTy.getSizeInBits());
     288             : 
     289           3 :   const unsigned PtrSize = PtrTy.getSizeInBits() / 8;
     290           3 :   unsigned List = MRI.createGenericVirtualRegister(PtrTy);
     291           3 :   MIRBuilder.buildLoad(
     292             :       List, ListPtr,
     293           9 :       *MF.getMachineMemOperand(MachinePointerInfo(), MachineMemOperand::MOLoad,
     294             :                                PtrSize, /* Align = */ PtrSize));
     295             : 
     296             :   unsigned DstPtr;
     297           3 :   if (Align > PtrSize) {
     298             :     // Realign the list to the actual required alignment.
     299           1 :     auto AlignMinus1 = MIRBuilder.buildConstant(IntPtrTy, Align - 1);
     300             : 
     301           1 :     unsigned ListTmp = MRI.createGenericVirtualRegister(PtrTy);
     302           1 :     MIRBuilder.buildGEP(ListTmp, List, AlignMinus1->getOperand(0).getReg());
     303             : 
     304           1 :     DstPtr = MRI.createGenericVirtualRegister(PtrTy);
     305           2 :     MIRBuilder.buildPtrMask(DstPtr, ListTmp, Log2_64(Align));
     306             :   } else
     307             :     DstPtr = List;
     308             : 
     309           3 :   uint64_t ValSize = MRI.getType(Dst).getSizeInBits() / 8;
     310           3 :   MIRBuilder.buildLoad(
     311             :       Dst, DstPtr,
     312          12 :       *MF.getMachineMemOperand(MachinePointerInfo(), MachineMemOperand::MOLoad,
     313           3 :                                ValSize, std::max(Align, PtrSize)));
     314             : 
     315           3 :   unsigned SizeReg = MRI.createGenericVirtualRegister(IntPtrTy);
     316           6 :   MIRBuilder.buildConstant(SizeReg, alignTo(ValSize, PtrSize));
     317             : 
     318           3 :   unsigned NewList = MRI.createGenericVirtualRegister(PtrTy);
     319           3 :   MIRBuilder.buildGEP(NewList, DstPtr, SizeReg);
     320             : 
     321           3 :   MIRBuilder.buildStore(
     322             :       NewList, ListPtr,
     323           9 :       *MF.getMachineMemOperand(MachinePointerInfo(), MachineMemOperand::MOStore,
     324             :                                PtrSize, /* Align = */ PtrSize));
     325             : 
     326           3 :   MI.eraseFromParent();
     327           3 :   return true;
     328             : }

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