LCOV - code coverage report
Current view: top level - lib/Target/AArch64 - AArch64RegisterBankInfo.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 2 2 100.0 %
Date: 2017-09-14 15:23:50 Functions: 1 4 25.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- AArch64RegisterBankInfo -----------------------------------*- C++ -*-==//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : /// \file
      10             : /// This file declares the targeting of the RegisterBankInfo class for AArch64.
      11             : /// \todo This should be generated by TableGen.
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERBANKINFO_H
      15             : #define LLVM_LIB_TARGET_AARCH64_AARCH64REGISTERBANKINFO_H
      16             : 
      17             : #include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
      18             : 
      19             : #define GET_REGBANK_DECLARATIONS
      20             : #include "AArch64GenRegisterBank.inc"
      21             : 
      22             : namespace llvm {
      23             : 
      24             : class TargetRegisterInfo;
      25             : 
      26        1193 : class AArch64GenRegisterBankInfo : public RegisterBankInfo {
      27             : protected:
      28             : 
      29             :   enum PartialMappingIdx {
      30             :     PMI_None = -1,
      31             :     PMI_FPR32 = 1,
      32             :     PMI_FPR64,
      33             :     PMI_FPR128,
      34             :     PMI_FPR256,
      35             :     PMI_FPR512,
      36             :     PMI_GPR32,
      37             :     PMI_GPR64,
      38             :     PMI_FirstGPR = PMI_GPR32,
      39             :     PMI_LastGPR = PMI_GPR64,
      40             :     PMI_FirstFPR = PMI_FPR32,
      41             :     PMI_LastFPR = PMI_FPR512,
      42             :     PMI_Min = PMI_FirstFPR,
      43             :   };
      44             : 
      45             :   static RegisterBankInfo::PartialMapping PartMappings[];
      46             :   static RegisterBankInfo::ValueMapping ValMappings[];
      47             :   static PartialMappingIdx BankIDToCopyMapIdx[];
      48             : 
      49             :   enum ValueMappingIdx {
      50             :     InvalidIdx = 0,
      51             :     First3OpsIdx = 1,
      52             :     Last3OpsIdx = 19,
      53             :     DistanceBetweenRegBanks = 3,
      54             :     FirstCrossRegCpyIdx = 22,
      55             :     LastCrossRegCpyIdx = 34,
      56             :     DistanceBetweenCrossRegCpy = 2
      57             :   };
      58             : 
      59             :   static bool checkPartialMap(unsigned Idx, unsigned ValStartIdx,
      60             :                               unsigned ValLength, const RegisterBank &RB);
      61             :   static bool checkValueMapImpl(unsigned Idx, unsigned FirstInBank,
      62             :                                 unsigned Size, unsigned Offset);
      63             :   static bool checkPartialMappingIdx(PartialMappingIdx FirstAlias,
      64             :                                      PartialMappingIdx LastAlias,
      65             :                                      ArrayRef<PartialMappingIdx> Order);
      66             : 
      67             :   static unsigned getRegBankBaseIdxOffset(unsigned RBIdx, unsigned Size);
      68             : 
      69             :   /// Get the pointer to the ValueMapping representing the RegisterBank
      70             :   /// at \p RBIdx with a size of \p Size.
      71             :   ///
      72             :   /// The returned mapping works for instructions with the same kind of
      73             :   /// operands for up to 3 operands.
      74             :   ///
      75             :   /// \pre \p RBIdx != PartialMappingIdx::None
      76             :   static const RegisterBankInfo::ValueMapping *
      77             :   getValueMapping(PartialMappingIdx RBIdx, unsigned Size);
      78             : 
      79             :   /// Get the pointer to the ValueMapping of the operands of a copy
      80             :   /// instruction from the \p SrcBankID register bank to the \p DstBankID
      81             :   /// register bank with a size of \p Size.
      82             :   static const RegisterBankInfo::ValueMapping *
      83             :   getCopyMapping(unsigned DstBankID, unsigned SrcBankID, unsigned Size);
      84             : 
      85             : #define GET_TARGET_REGBANK_CLASS
      86             : #include "AArch64GenRegisterBank.inc"
      87             : };
      88             : 
      89             : /// This class provides the information for the target register banks.
      90        2386 : class AArch64RegisterBankInfo final : public AArch64GenRegisterBankInfo {
      91             :   /// See RegisterBankInfo::applyMapping.
      92             :   void applyMappingImpl(const OperandsMapper &OpdMapper) const override;
      93             : 
      94             :   /// Get an instruction mapping where all the operands map to
      95             :   /// the same register bank and have similar size.
      96             :   ///
      97             :   /// \pre MI.getNumOperands() <= 3
      98             :   ///
      99             :   /// \return An InstructionMappings with a statically allocated
     100             :   /// OperandsMapping.
     101             :   const InstructionMapping &
     102             :   getSameKindOfOperandsMapping(const MachineInstr &MI) const;
     103             : 
     104             : public:
     105             :   AArch64RegisterBankInfo(const TargetRegisterInfo &TRI);
     106             : 
     107             :   unsigned copyCost(const RegisterBank &A, const RegisterBank &B,
     108             :                     unsigned Size) const override;
     109             : 
     110             :   const RegisterBank &
     111             :   getRegBankFromRegClass(const TargetRegisterClass &RC) const override;
     112             : 
     113             :   InstructionMappings
     114             :   getInstrAlternativeMappings(const MachineInstr &MI) const override;
     115             : 
     116             :   const InstructionMapping &
     117             :   getInstrMapping(const MachineInstr &MI) const override;
     118             : };
     119             : } // End llvm namespace.
     120             : #endif

Generated by: LCOV version 1.13