LCOV - code coverage report
Current view: top level - lib/Target/AArch64 - AArch64TargetTransformInfo.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 9 9 100.0 %
Date: 2017-09-14 15:23:50 Functions: 1 1 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- AArch64TargetTransformInfo.h - AArch64 specific TTI ------*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : /// \file
      10             : /// This file a TargetTransformInfo::Concept conforming object specific to the
      11             : /// AArch64 target machine. It uses the target's detailed information to
      12             : /// provide more precise answers to certain TTI queries, while letting the
      13             : /// target independent and default TTI implementations handle the rest.
      14             : ///
      15             : //===----------------------------------------------------------------------===//
      16             : 
      17             : #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
      18             : #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H
      19             : 
      20             : #include "AArch64.h"
      21             : #include "AArch64Subtarget.h"
      22             : #include "AArch64TargetMachine.h"
      23             : #include "llvm/ADT/ArrayRef.h"
      24             : #include "llvm/Analysis/TargetTransformInfo.h"
      25             : #include "llvm/CodeGen/BasicTTIImpl.h"
      26             : #include "llvm/IR/Function.h"
      27             : #include "llvm/IR/Intrinsics.h"
      28             : #include <cstdint>
      29             : 
      30             : namespace llvm {
      31             : 
      32             : class APInt;
      33             : class Instruction;
      34             : class IntrinsicInst;
      35             : class Loop;
      36             : class SCEV;
      37             : class ScalarEvolution;
      38             : class Type;
      39             : class Value;
      40             : class VectorType;
      41             : 
      42      324052 : class AArch64TTIImpl : public BasicTTIImplBase<AArch64TTIImpl> {
      43             :   using BaseT = BasicTTIImplBase<AArch64TTIImpl>;
      44             :   using TTI = TargetTransformInfo;
      45             : 
      46             :   friend BaseT;
      47             : 
      48             :   const AArch64Subtarget *ST;
      49             :   const AArch64TargetLowering *TLI;
      50             : 
      51             :   const AArch64Subtarget *getST() const { return ST; }
      52             :   const AArch64TargetLowering *getTLI() const { return TLI; }
      53             : 
      54             :   enum MemIntrinsicType {
      55             :     VECTOR_LDST_TWO_ELEMENTS,
      56             :     VECTOR_LDST_THREE_ELEMENTS,
      57             :     VECTOR_LDST_FOUR_ELEMENTS
      58             :   };
      59             : 
      60             :   bool isWideningInstruction(Type *Ty, unsigned Opcode,
      61             :                              ArrayRef<const Value *> Args);
      62             : 
      63             : public:
      64       81013 :   explicit AArch64TTIImpl(const AArch64TargetMachine *TM, const Function &F)
      65      162026 :       : BaseT(TM, F.getParent()->getDataLayout()), ST(TM->getSubtargetImpl(F)),
      66      324052 :         TLI(ST->getTargetLowering()) {}
      67             : 
      68             :   bool areInlineCompatible(const Function *Caller,
      69             :                            const Function *Callee) const;
      70             : 
      71             :   /// \name Scalar TTI Implementations
      72             :   /// @{
      73             : 
      74             :   using BaseT::getIntImmCost;
      75             :   int getIntImmCost(int64_t Val);
      76             :   int getIntImmCost(const APInt &Imm, Type *Ty);
      77             :   int getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty);
      78             :   int getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm,
      79             :                     Type *Ty);
      80             :   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth);
      81             : 
      82             :   /// @}
      83             : 
      84             :   /// \name Vector TTI Implementations
      85             :   /// @{
      86             : 
      87             :   bool enableInterleavedAccessVectorization() { return true; }
      88             : 
      89             :   unsigned getNumberOfRegisters(bool Vector) {
      90        2216 :     if (Vector) {
      91         229 :       if (ST->hasNEON())
      92             :         return 32;
      93             :       return 0;
      94             :     }
      95             :     return 31;
      96             :   }
      97             : 
      98             :   unsigned getRegisterBitWidth(bool Vector) const {
      99         124 :     if (Vector) {
     100         124 :       if (ST->hasNEON())
     101             :         return 128;
     102             :       return 0;
     103             :     }
     104             :     return 64;
     105             :   }
     106             : 
     107             :   unsigned getMinVectorRegisterBitWidth() {
     108          57 :     return ST->getMinVectorRegisterBitWidth();
     109             :   }
     110             : 
     111             :   unsigned getMaxInterleaveFactor(unsigned VF);
     112             : 
     113             :   int getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src,
     114             :                        const Instruction *I = nullptr);
     115             : 
     116             :   int getExtractWithExtendCost(unsigned Opcode, Type *Dst, VectorType *VecTy,
     117             :                                unsigned Index);
     118             : 
     119             :   int getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index);
     120             : 
     121             :   int getArithmeticInstrCost(
     122             :       unsigned Opcode, Type *Ty,
     123             :       TTI::OperandValueKind Opd1Info = TTI::OK_AnyValue,
     124             :       TTI::OperandValueKind Opd2Info = TTI::OK_AnyValue,
     125             :       TTI::OperandValueProperties Opd1PropInfo = TTI::OP_None,
     126             :       TTI::OperandValueProperties Opd2PropInfo = TTI::OP_None,
     127             :       ArrayRef<const Value *> Args = ArrayRef<const Value *>());
     128             : 
     129             :   int getAddressComputationCost(Type *Ty, ScalarEvolution *SE, const SCEV *Ptr);
     130             : 
     131             :   int getCmpSelInstrCost(unsigned Opcode, Type *ValTy, Type *CondTy,
     132             :                          const Instruction *I = nullptr);
     133             : 
     134             :   int getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
     135             :                       unsigned AddressSpace, const Instruction *I = nullptr);
     136             : 
     137             :   int getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys);
     138             : 
     139             :   void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
     140             :                                TTI::UnrollingPreferences &UP);
     141             : 
     142             :   Value *getOrCreateResultFromMemIntrinsic(IntrinsicInst *Inst,
     143             :                                            Type *ExpectedType);
     144             : 
     145             :   bool getTgtMemIntrinsic(IntrinsicInst *Inst, MemIntrinsicInfo &Info);
     146             : 
     147             :   int getInterleavedMemoryOpCost(unsigned Opcode, Type *VecTy, unsigned Factor,
     148             :                                  ArrayRef<unsigned> Indices, unsigned Alignment,
     149             :                                  unsigned AddressSpace);
     150             : 
     151             :   bool
     152             :   shouldConsiderAddressTypePromotion(const Instruction &I,
     153             :                                      bool &AllowPromotionWithoutCommonHeader);
     154             : 
     155             :   unsigned getCacheLineSize();
     156             : 
     157             :   unsigned getPrefetchDistance();
     158             : 
     159             :   unsigned getMinPrefetchStride();
     160             : 
     161             :   unsigned getMaxPrefetchIterationsAhead();
     162             : 
     163             :   bool shouldExpandReduction(const IntrinsicInst *II) const {
     164             :     return false;
     165             :   }
     166             : 
     167             :   bool useReductionIntrinsic(unsigned Opcode, Type *Ty,
     168             :                              TTI::ReductionFlags Flags) const;
     169             :   /// @}
     170             : };
     171             : 
     172             : } // end namespace llvm
     173             : 
     174             : #endif // LLVM_LIB_TARGET_AARCH64_AARCH64TARGETTRANSFORMINFO_H

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