LCOV - code coverage report
Current view: top level - lib/Target/AArch64/Disassembler - AArch64Disassembler.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 454 459 98.9 %
Date: 2017-09-14 15:23:50 Functions: 40 40 100.0 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZL35DecodeGPRSeqPairsClassRegisterClassRN4llvm6MCInstEjjmPKv.isra.11 6
_ZL31createAArch64ExternalSymbolizerRKN4llvm6TripleEPFiPvmmmiS3_EPFPKcS3_mPmmPS7_ES3_PNS_9MCContextEOSt10unique_ptrINS_16MCRelocationInfoESt14default_deleteISF_EE 7
_Z10DecodeSImmILi10EEN4llvm14MCDisassembler12DecodeStatusERNS0_6MCInstEmmPKv.isra.33 10
_ZL25DecodeFMOVLaneInstructionRN4llvm6MCInstEjmPKv.isra.57 12
_ZL19DecodeTestAndBranchRN4llvm6MCInstEjmPKv 25
_ZL29DecodeSystemPStateInstructionRN4llvm6MCInstEjmPKv.isra.30 27
_ZL27DecodeModImmTiedInstructionRN4llvm6MCInstEjmPKv.isra.22 29
_ZL21DecodeDDRegisterClassRN4llvm6MCInstEjmPKv.isra.17 44
_ZL25DecodeUnconditionalBranchRN4llvm6MCInstEjmPKv 47
_ZL22DecodeDDDRegisterClassRN4llvm6MCInstEjmPKv.isra.16 52
_ZL23DecodeDDDDRegisterClassRN4llvm6MCInstEjmPKv.isra.15 52
_ZL23DecodeModImmInstructionRN4llvm6MCInstEjmPKv.isra.47 57
_ZL18DecodePCRelLabel19RN4llvm6MCInstEjmPKv 65
_ZL20DecodeAdrInstructionRN4llvm6MCInstEjmPKv 70
_ZL27DecodeAddSubERegInstructionRN4llvm6MCInstEjmPKv.isra.52 83
_ZL24DecodeMoveImmInstructionRN4llvm6MCInstEjmPKv.isra.55 88
_ZL21DecodeQQRegisterClassRN4llvm6MCInstEjmPKv.isra.18 112
_ZL23DecodeQQQQRegisterClassRN4llvm6MCInstEjmPKv.isra.20 112
_ZL25DecodeVectorRegisterClassRN4llvm6MCInstEjmPKv.isra.21 112
_ZL22DecodeQQQRegisterClassRN4llvm6MCInstEjmPKv.isra.19 113
_ZL27DecodeLogicalImmInstructionRN4llvm6MCInstEjmPKv.isra.54 130
_ZL25createAArch64DisassemblerRKN4llvm6TargetERKNS_15MCSubtargetInfoERNS_9MCContextE 137
_ZL23DecodeFPR8RegisterClassRN4llvm6MCInstEjmPKv.isra.39 144
_ZL30DecodeExclusiveLdStInstructionRN4llvm6MCInstEjmPKv.isra.50 172
_ZL15DecodeMemExtendRN4llvm6MCInstEjmPKv.isra.58 215
_ZL26DecodeGPR32spRegisterClassRN4llvm6MCInstEjmPKv.isra.14 244
_ZL19DecodeBaseAddSubImmRN4llvm6MCInstEjmPKv 269
_ZL29DecodeUnsignedLdStInstructionRN4llvm6MCInstEjmPKv 295
_ZL25DecodePairLdStInstructionRN4llvm6MCInstEjmPKv.isra.53 316
_ZL24DecodeFPR16RegisterClassRN4llvm6MCInstEjmPKv.isra.43 482
_ZL27DecodeSignedLdStInstructionRN4llvm6MCInstEjmPKv.isra.56 625
_ZL30DecodeThreeAddrSRegInstructionRN4llvm6MCInstEjmPKv.isra.51 812
_ZL24DecodeFPR32RegisterClassRN4llvm6MCInstEjmPKv.isra.44 1323
_ZL24DecodeFPR64RegisterClassRN4llvm6MCInstEjmPKv.isra.46 3265
_ZL25DecodeFPR128RegisterClassRN4llvm6MCInstEjmPKv.isra.40 3391
_ZL26DecodeGPR64spRegisterClassRN4llvm6MCInstEjmPKv.isra.48 3439
_ZL24DecodeGPR32RegisterClassRN4llvm6MCInstEjmPKv.isra.45 3996
_ZL24DecodeGPR64RegisterClassRN4llvm6MCInstEjmPKv.isra.49 7368
LLVMInitializeAArch64Disassembler 10550
_ZNK4llvm19AArch64Disassembler14getInstructionERNS_6MCInstERmNS_8ArrayRefIhEEmRNS_11raw_ostreamES7_ 12369

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