LCOV - code coverage report
Current view: top level - lib/Target/AArch64/MCTargetDesc - AArch64MCTargetDesc.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 64 64 100.0 %
Date: 2017-09-14 15:23:50 Functions: 13 13 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- AArch64MCTargetDesc.cpp - AArch64 Target Descriptions ---*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : //
      10             : // This file provides AArch64 specific target descriptions.
      11             : //
      12             : //===----------------------------------------------------------------------===//
      13             : 
      14             : #include "AArch64MCTargetDesc.h"
      15             : #include "AArch64ELFStreamer.h"
      16             : #include "AArch64MCAsmInfo.h"
      17             : #include "AArch64WinCOFFStreamer.h"
      18             : #include "InstPrinter/AArch64InstPrinter.h"
      19             : #include "llvm/MC/MCInstrAnalysis.h"
      20             : #include "llvm/MC/MCInstrInfo.h"
      21             : #include "llvm/MC/MCRegisterInfo.h"
      22             : #include "llvm/MC/MCStreamer.h"
      23             : #include "llvm/MC/MCSubtargetInfo.h"
      24             : #include "llvm/Support/ErrorHandling.h"
      25             : #include "llvm/Support/TargetRegistry.h"
      26             : 
      27             : using namespace llvm;
      28             : 
      29             : #define GET_INSTRINFO_MC_DESC
      30             : #include "AArch64GenInstrInfo.inc"
      31             : 
      32             : #define GET_SUBTARGETINFO_MC_DESC
      33             : #include "AArch64GenSubtargetInfo.inc"
      34             : 
      35             : #define GET_REGINFO_MC_DESC
      36             : #include "AArch64GenRegisterInfo.inc"
      37             : 
      38        1965 : static MCInstrInfo *createAArch64MCInstrInfo() {
      39        1965 :   MCInstrInfo *X = new MCInstrInfo();
      40        1965 :   InitAArch64MCInstrInfo(X);
      41        1965 :   return X;
      42             : }
      43             : 
      44             : static MCSubtargetInfo *
      45        1893 : createAArch64MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
      46        1893 :   if (CPU.empty())
      47        1643 :     CPU = "generic";
      48             : 
      49        1893 :   return createAArch64MCSubtargetInfoImpl(TT, CPU, FS);
      50             : }
      51             : 
      52        3205 : void AArch64_MC::initLLVMToCVRegMapping(MCRegisterInfo *MRI) {
      53     1551220 :   for (unsigned Reg = AArch64::NoRegister + 1;
      54     1551220 :        Reg < AArch64::NUM_TARGET_REGS; ++Reg) {
      55     3096030 :     unsigned CV = MRI->getEncodingValue(Reg);
      56     3096030 :     MRI->mapLLVMRegToCVReg(Reg, CV);
      57             :   }
      58        3205 : }
      59             : 
      60        1988 : static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) {
      61        3976 :   MCRegisterInfo *X = new MCRegisterInfo();
      62        1988 :   InitAArch64MCRegisterInfo(X, AArch64::LR);
      63        1988 :   AArch64_MC::initLLVMToCVRegMapping(X);
      64        1988 :   return X;
      65             : }
      66             : 
      67        1974 : static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
      68             :                                          const Triple &TheTriple) {
      69             :   MCAsmInfo *MAI;
      70        1974 :   if (TheTriple.isOSBinFormatMachO())
      71         478 :     MAI = new AArch64MCAsmInfoDarwin();
      72             :   else if (TheTriple.isWindowsMSVCEnvironment())
      73          11 :     MAI = new AArch64MCAsmInfoMicrosoftCOFF();
      74        1485 :   else if (TheTriple.isOSBinFormatCOFF())
      75           3 :     MAI = new AArch64MCAsmInfoGNUCOFF();
      76             :   else {
      77             :     assert(TheTriple.isOSBinFormatELF() && "Invalid target");
      78        1482 :     MAI = new AArch64MCAsmInfoELF(TheTriple);
      79             :   }
      80             : 
      81             :   // Initial state of the frame pointer is SP.
      82        1974 :   unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true);
      83        3948 :   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
      84        1974 :   MAI->addInitialFrameState(Inst);
      85             : 
      86        3948 :   return MAI;
      87             : }
      88             : 
      89        1266 : static MCInstPrinter *createAArch64MCInstPrinter(const Triple &T,
      90             :                                                  unsigned SyntaxVariant,
      91             :                                                  const MCAsmInfo &MAI,
      92             :                                                  const MCInstrInfo &MII,
      93             :                                                  const MCRegisterInfo &MRI) {
      94        1266 :   if (SyntaxVariant == 0)
      95         870 :     return new AArch64InstPrinter(MAI, MII, MRI);
      96         396 :   if (SyntaxVariant == 1)
      97         396 :     return new AArch64AppleInstPrinter(MAI, MII, MRI);
      98             : 
      99             :   return nullptr;
     100             : }
     101             : 
     102         156 : static MCStreamer *createELFStreamer(const Triple &T, MCContext &Ctx,
     103             :                                      MCAsmBackend &TAB, raw_pwrite_stream &OS,
     104             :                                      MCCodeEmitter *Emitter, bool RelaxAll) {
     105         156 :   return createAArch64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll);
     106             : }
     107             : 
     108          28 : static MCStreamer *createMachOStreamer(MCContext &Ctx, MCAsmBackend &TAB,
     109             :                                        raw_pwrite_stream &OS,
     110             :                                        MCCodeEmitter *Emitter, bool RelaxAll,
     111             :                                        bool DWARFMustBeAtTheEnd) {
     112          28 :   return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
     113             :                              DWARFMustBeAtTheEnd,
     114          28 :                              /*LabelSections*/ true);
     115             : }
     116             : 
     117           5 : static MCStreamer *createWinCOFFStreamer(MCContext &Ctx, MCAsmBackend &TAB,
     118             :                                          raw_pwrite_stream &OS,
     119             :                                          MCCodeEmitter *Emitter, bool RelaxAll,
     120             :                                          bool IncrementalLinkerCompatible) {
     121           5 :   return createAArch64WinCOFFStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
     122           5 :                                       IncrementalLinkerCompatible);
     123             : }
     124             : 
     125          42 : static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
     126          84 :   return new MCInstrAnalysis(Info);
     127             : }
     128             : 
     129             : // Force static initialization.
     130       56333 : extern "C" void LLVMInitializeAArch64TargetMC() {
     131      450664 :   for (Target *T : {&getTheAArch64leTarget(), &getTheAArch64beTarget(),
     132      168999 :                     &getTheARM64Target()}) {
     133             :     // Register the MC asm info.
     134      168999 :     RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
     135             : 
     136             :     // Register the MC instruction info.
     137      337998 :     TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);
     138             : 
     139             :     // Register the MC register info.
     140      337998 :     TargetRegistry::RegisterMCRegInfo(*T, createAArch64MCRegisterInfo);
     141             : 
     142             :     // Register the MC subtarget info.
     143      337998 :     TargetRegistry::RegisterMCSubtargetInfo(*T, createAArch64MCSubtargetInfo);
     144             : 
     145             :     // Register the MC instruction analyzer.
     146      337998 :     TargetRegistry::RegisterMCInstrAnalysis(*T, createAArch64InstrAnalysis);
     147             : 
     148             :     // Register the MC Code Emitter
     149      337998 :     TargetRegistry::RegisterMCCodeEmitter(*T, createAArch64MCCodeEmitter);
     150             : 
     151             :     // Register the obj streamers.
     152      337998 :     TargetRegistry::RegisterELFStreamer(*T, createELFStreamer);
     153      337998 :     TargetRegistry::RegisterMachOStreamer(*T, createMachOStreamer);
     154      337998 :     TargetRegistry::RegisterCOFFStreamer(*T, createWinCOFFStreamer);
     155             : 
     156             :     // Register the obj target streamer.
     157      337998 :     TargetRegistry::RegisterObjectTargetStreamer(
     158             :         *T, createAArch64ObjectTargetStreamer);
     159             : 
     160             :     // Register the asm streamer.
     161      337998 :     TargetRegistry::RegisterAsmTargetStreamer(*T,
     162             :                                               createAArch64AsmTargetStreamer);
     163             :     // Register the MCInstPrinter.
     164      337998 :     TargetRegistry::RegisterMCInstPrinter(*T, createAArch64MCInstPrinter);
     165             :   }
     166             : 
     167             :   // Register the asm backend.
     168      225332 :   for (Target *T : {&getTheAArch64leTarget(), &getTheARM64Target()})
     169      225332 :     TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend);
     170      112666 :   TargetRegistry::RegisterMCAsmBackend(getTheAArch64beTarget(),
     171             :                                        createAArch64beAsmBackend);
     172      273251 : }

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