LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - AMDGPUISelLowering.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 1811 1987 91.1 %
Date: 2017-09-14 15:23:50 Functions: 108 113 95.6 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZNK4llvm20AMDGPUTargetLowering11LowerFFLOORENS_7SDValueERNS_12SelectionDAGE 0
_ZNK4llvm20AMDGPUTargetLowering11getLoHalf64ENS_7SDValueERNS_12SelectionDAGE 0
_ZNK4llvm20AMDGPUTargetLowering12isFPImmLegalERKNS_7APFloatENS_3EVTE 0
_ZNK4llvm20AMDGPUTargetLowering17getTargetNodeNameEj 0
_ZNK4llvm20AMDGPUTargetLowering22ShouldShrinkFPConstantENS_3EVTE 0
_ZNK4llvm20AMDGPUTargetLowering10isZExtFreeEPNS_4TypeES2_ 2
_ZNK4llvm20AMDGPUTargetLowering23LowerDYNAMIC_STACKALLOCENS_7SDValueERNS_12SelectionDAGE 3
_ZNK4llvm20AMDGPUTargetLowering15getSqrtEstimateENS_7SDValueERNS_12SelectionDAGEiRiRbb 8
_ZNK4llvm20AMDGPUTargetLowering19loadStackInputValueERNS_12SelectionDAGENS_3EVTERKNS_5SDLocEl 8
_ZNK4llvm20AMDGPUTargetLowering16LowerINT_TO_FP64ENS_7SDValueERNS_12SelectionDAGEb 10
_ZNK4llvm20AMDGPUTargetLowering20storeStackInputValueERNS_12SelectionDAGERKNS_5SDLocENS_7SDValueES6_S6_l 10
_ZNK4llvm20AMDGPUTargetLowering16getRecipEstimateENS_7SDValueERNS_12SelectionDAGEiRi 12
_ZNK4llvm20AMDGPUTargetLowering22isCheapToSpeculateCttzEv 12
_ZNK4llvm20AMDGPUTargetLowering10LowerFRINTENS_7SDValueERNS_12SelectionDAGE 14
_ZNK4llvm20AMDGPUTargetLowering9LowerCallERNS_14TargetLowering16CallLoweringInfoERNS_15SmallVectorImplINS_7SDValueEEE 14
_ZNK4llvm20AMDGPUTargetLowering13LowerFROUND64ENS_7SDValueERNS_12SelectionDAGE 16
_ZNK4llvm20AMDGPUTargetLowering16LowerFP64_TO_INTENS_7SDValueERNS_12SelectionDAGEb 16
_ZNK4llvm20AMDGPUTargetLowering18lowerUnhandledCallERNS_14TargetLowering16CallLoweringInfoERNS_15SmallVectorImplINS_7SDValueEEENS_9StringRefE 20
_Z15constantFoldBFEIiEN4llvm7SDValueERNS0_12SelectionDAGET_jjRKNS0_5SDLocE 24
_Z15constantFoldBFEIjEN4llvm7SDValueERNS0_12SelectionDAGET_jjRKNS0_5SDLocE 24
_ZL25distributeOpThroughSelectRN4llvm14TargetLowering15DAGCombinerInfoEjRKNS_5SDLocENS_7SDValueES6_S6_.isra.48 24
_ZL13isNegativeOneN4llvm7SDValueE.isra.195 25
_ZNK4llvm20AMDGPUTargetLowering19addTokenForArgumentENS_7SDValueERNS_12SelectionDAGERNS_16MachineFrameInfoEi 27
_ZNK4llvm20AMDGPUTargetLowering22LowerSIGN_EXTEND_INREGENS_7SDValueERNS_12SelectionDAGE 30
_ZNK4llvm20AMDGPUTargetLowering26getImplicitParameterOffsetEPKNS_21AMDGPUMachineFunctionENS0_17ImplicitParameterE 30
_ZNK4llvm20AMDGPUTargetLowering10LowerFCEILENS_7SDValueERNS_12SelectionDAGE 31
_ZNK4llvm20AMDGPUTargetLowering9LowerFREMENS_7SDValueERNS_12SelectionDAGE 36
_ZNK4llvm20AMDGPUTargetLowering15LowerFP_TO_UINTENS_7SDValueERNS_12SelectionDAGE 37
_ZNK4llvm20AMDGPUTargetLowering15LowerSINT_TO_FPENS_7SDValueERNS_12SelectionDAGE 42
_ZNK4llvm20AMDGPUTargetLowering15LowerFNEARBYINTENS_7SDValueERNS_12SelectionDAGE 44
_ZNK4llvm20AMDGPUTargetLowering15LowerUINT_TO_FPENS_7SDValueERNS_12SelectionDAGE 51
_ZNK4llvm20AMDGPUTargetLowering18ReplaceNodeResultsEPNS_6SDNodeERNS_15SmallVectorImplINS_7SDValueEEERNS_12SelectionDAGE 51
_ZNK4llvm20AMDGPUTargetLowering22isCheapToSpeculateCtlzEv 60
_ZL16isConstantFPZeroN4llvm7SDValueE 63
_ZNK4llvm20AMDGPUTargetLowering15LowerFP_TO_SINTENS_7SDValueERNS_12SelectionDAGE 65
_ZNK4llvm20AMDGPUTargetLowering14LowerUDIVREM64ENS_7SDValueERNS_12SelectionDAGERNS_15SmallVectorImplIS1_EE 66
_ZNK4llvm20AMDGPUTargetLowering16LowerINT_TO_FP32ENS_7SDValueERNS_12SelectionDAGEb 67
_ZNK4llvm20AMDGPUTargetLowering19performMulhsCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 73
_ZNK4llvm20AMDGPUTargetLowering16LowerFROUND32_16ENS_7SDValueERNS_12SelectionDAGE 74
_ZNK4llvm20AMDGPUTargetLowering11LowerFTRUNCENS_7SDValueERNS_12SelectionDAGE 75
_ZNK4llvm20AMDGPUTargetLowering11LowerFROUNDENS_7SDValueERNS_12SelectionDAGE 90
_ZL18extractF64ExponentN4llvm7SDValueERKNS_5SDLocERNS_12SelectionDAGE 91
_ZNK4llvm20AMDGPUTargetLowering23performMulLoHi24CombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 121
_ZNK4llvm20AMDGPUTargetLowering11getHiHalf64ENS_7SDValueERNS_12SelectionDAGE 131
_ZNK4llvm20AMDGPUTargetLowering12LowerSDIVREMENS_7SDValueERNS_12SelectionDAGE 159
_ZNK4llvm20AMDGPUTargetLowering19performClampCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 244
_ZN4llvm20AMDGPUTargetLowering19isOrEquivalentToAddERNS_12SelectionDAGENS_7SDValueE 255
_ZNK4llvm20AMDGPUTargetLowering18LowerGlobalAddressEPNS_21AMDGPUMachineFunctionENS_7SDValueERNS_12SelectionDAGE 303
_ZL17allocateSGPRTuplejN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateE.isra.121 317
_ZL8getMul24RN4llvm12SelectionDAGERKNS_5SDLocENS_7SDValueES5_jb 325
_ZNK4llvm20AMDGPUTargetLowering9LowerCTLZENS_7SDValueERNS_12SelectionDAGE 342
_ZNK4llvm20AMDGPUTargetLowering12LowerUDIVREMENS_7SDValueERNS_12SelectionDAGE 344
_ZNK4llvm20AMDGPUTargetLowering13LowerDIVREM24ENS_7SDValueERNS_12SelectionDAGEb 423
_ZNK4llvm20AMDGPUTargetLowering14isTruncateFreeEPNS_4TypeES2_ 498
_ZNK4llvm20AMDGPUTargetLowering15LowerFP_TO_FP16ENS_7SDValueERNS_12SelectionDAGE 561
_ZL17allocateVGPRTuplejN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateE.isra.120 646
_ZNK4llvm20AMDGPUTargetLowering20combineFMinMaxLegacyERKNS_5SDLocENS_3EVTENS_7SDValueES5_S5_S5_S5_RNS_14TargetLowering15DAGCombinerInfoE 687
_ZL15fnegFoldsIntoOpj 728
_ZL14allocateCCRegsjN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateEPKNS_19TargetRegisterClassEj.isra.119 963
_ZNK4llvm20AMDGPUTargetLowering19performMulhuCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 1077
_ZNK4llvm20AMDGPUTargetLowering28splitBinaryBitConstantOpImplERNS_14TargetLowering15DAGCombinerInfoERKNS_5SDLocEjNS_7SDValueEjj 1130
_ZL5isI24N4llvm7SDValueERNS_12SelectionDAGE 1181
_ZNK4llvm20AMDGPUTargetLowering17isSelectSupportedENS_18TargetLoweringBase17SelectSupportKindE 1484
_ZNK4llvm20AMDGPUTargetLowering21shouldReduceLoadWidthEPNS_6SDNodeENS_3ISD11LoadExtTypeENS_3EVTE 1522
_ZNK4llvm20AMDGPUTargetLowering31ComputeNumSignBitsForTargetNodeENS_7SDValueERKNS_5APIntERKNS_12SelectionDAGEj 1597
_ZNK4llvm20AMDGPUTargetLowering18performFAbsCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 1773
_ZN4llvm20AMDGPUTargetLowering17CCAssignFnForCallEjb 1805
_ZNK4llvm20AMDGPUTargetLowering15SplitVectorLoadENS_7SDValueERNS_12SelectionDAGE 1839
_ZN4llvm18AMDGPUCallLowering17CCAssignFnForCallEjb 1841
_ZNK4llvm20AMDGPUTargetLowering17performMulCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 1907
_ZNK4llvm20AMDGPUTargetLowering10isFAbsFreeENS_3EVTE 1914
_ZNK4llvm20AMDGPUTargetLowering19LowerCONCAT_VECTORSENS_7SDValueERNS_12SelectionDAGE 2231
_ZN4llvm20AMDGPUTargetLowering21allUsesHaveSourceModsEPKNS_6SDNodeEj 2381
_ZL13hasSourceModsPKN4llvm6SDNodeE 2476
_ZN4llvm18AMDGPUCallLowering19CCAssignFnForReturnEjb 2703
_ZN4llvm20AMDGPUTargetLowering19CCAssignFnForReturnEjb 2703
_ZNK4llvm20AMDGPUTargetLowering18performFNegCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 2812
_ZNK4llvm20AMDGPUTargetLowering15split64BitValueENS_7SDValueERNS_12SelectionDAGE 2830
_ZNK4llvm20AMDGPUTargetLowering14loadInputValueERNS_12SelectionDAGEPKNS_19TargetRegisterClassENS_3EVTERKNS_5SDLocERKNS_13ArgDescriptorE 2948
_ZL5isU24N4llvm7SDValueERNS_12SelectionDAGE 3144
_ZNK4llvm20AMDGPUTargetLowering10isFNegFreeENS_3EVTE 3187
_ZNK4llvm20AMDGPUTargetLowering20CreateLiveInRegisterERNS_12SelectionDAGEPKNS_19TargetRegisterClassEjNS_3EVTERKNS_5SDLocEb 3961
_ZNK4llvm20AMDGPUTargetLowering28storeOfVectorConstantIsCheapENS_3EVTEjj 3964
_ZN4llvm20AMDGPUTargetLowering20getEquivalentMemTypeERNS_11LLVMContextENS_3EVTE 4150
_ZNK4llvm20AMDGPUTargetLowering17performSraCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 5292
_ZNK4llvm20AMDGPUTargetLowering10isZExtFreeENS_7SDValueENS_3EVTE 5817
_ZNK4llvm20AMDGPUTargetLowering16SplitVectorStoreENS_7SDValueERNS_12SelectionDAGE 5925
_ZNK4llvm20AMDGPUTargetLowering10isZExtFreeENS_3EVTES1_ 5939
_ZNK4llvm20AMDGPUTargetLowering21isNarrowingProfitableENS_3EVTES1_ 6729
_ZNK4llvm20AMDGPUTargetLowering25performAssertSZExtCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 9583
_ZNK4llvm20AMDGPUTargetLowering14isTruncateFreeENS_3EVTES1_ 11915
_ZNK4llvm20AMDGPUTargetLowering23isLoadBitCastBeneficialENS_3EVTES1_ 12157
_ZNK4llvm20AMDGPUTargetLowering18performCtlzCombineERKNS_5SDLocENS_7SDValueES4_S4_RNS_14TargetLowering15DAGCombinerInfoE 12236
_ZNK4llvm20AMDGPUTargetLowering22LowerEXTRACT_SUBVECTORENS_7SDValueERNS_12SelectionDAGE 12980
_ZL20foldFreeOpFromSelectRN4llvm14TargetLowering15DAGCombinerInfoENS_7SDValueE.isra.193 13619
_ZNK4llvm20AMDGPUTargetLowering20performSelectCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 13619
_ZNK4llvm20AMDGPUTargetLowering29analyzeFormalArgumentsComputeERNS_7CCStateERKNS_15SmallVectorImplINS_3ISD8InputArgEEE 15622
_ZNK4llvm20AMDGPUTargetLowering11LowerReturnENS_7SDValueEjbRKNS_15SmallVectorImplINS_3ISD9OutputArgEEERKNS2_IS1_EERKNS_5SDLocERNS_12SelectionDAGE 15656
_ZNK4llvm20AMDGPUTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE 17123
_ZNK4llvm20AMDGPUTargetLowering36aggressivelyPreferBuildVectorSourcesENS_3EVTE 23550
_ZL15allocateKernArgjN4llvm3MVTES0_NS_11CCValAssign7LocInfoENS_3ISD10ArgFlagsTyERNS_7CCStateE 37256
_ZNK4llvm20AMDGPUTargetLowering17performSrlCombineEPNS_6SDNodeERNS_14TargetLowering15DAGCombinerInfoE 52944
_ZL15hasVolatileUserPN4llvm6SDNodeE 81362
_ZNK4llvm20AMDGPUTargetLowering14getVectorIdxTyERKNS_10DataLayoutE 83268
_ZNK4llvm20AMDGPUTargetLowering29computeKnownBitsForTargetNodeENS_7SDValueERNS_9KnownBitsERKNS_5APIntERKNS_12SelectionDAGEj 115521

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