LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - AMDGPUTargetTransformInfo.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 231 260 88.8 %
Date: 2018-07-13 00:08:38 Functions: 36 39 92.3 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZN4llvm11R600TTIImpl14getCFInstrCostEj 0
_ZN4llvm11R600TTIImpl18getVectorInstrCostEjPNS_4TypeEj 0
_ZN4llvm11R600TTIImpl22getMaxInterleaveFactorEj 0
_ZNK4llvm11R600TTIImpl19getRegisterBitWidthEb 2
_ZNK4llvm11R600TTIImpl28getMinVectorRegisterBitWidthEv 2
_ZN4llvm11R600TTIImpl23getUnrollingPreferencesEPNS_4LoopERNS_15ScalarEvolutionERNS_19TargetTransformInfo20UnrollingPreferencesE 3
_ZL17dependsOnLocalPhiPKN4llvm4LoopEPKNS_5ValueEj 8
_ZN4llvm10GCNTTIImpl22getMaxInterleaveFactorEj 8
_ZN4llvm10GCNTTIImpl23getUnrollingPreferencesEPNS_4LoopERNS_15ScalarEvolutionERNS_19TargetTransformInfo20UnrollingPreferencesE 17
_ZN4llvm13AMDGPUTTIImpl23getUnrollingPreferencesEPNS_4LoopERNS_15ScalarEvolutionERNS_19TargetTransformInfo20UnrollingPreferencesE 20
_ZN4llvm10GCNTTIImpl26getArithmeticReductionCostEjPNS_4TypeEb 24
_ZN4llvm10GCNTTIImpl22getMinMaxReductionCostEPNS_4TypeES2_bb 38
_ZNK4llvm11R600TTIImpl28isLegalToVectorizeStoreChainEjjj 38
_ZNK4llvm10GCNTTIImpl28getMinVectorRegisterBitWidthEv 75
_ZNK4llvm11R600TTIImpl27isLegalToVectorizeLoadChainEjjj 80
_ZN4llvm10GCNTTIImpl14getShuffleCostENS_19TargetTransformInfo11ShuffleKindEPNS_4TypeEiS4_ 85
_ZNK4llvm10GCNTTIImpl19getRegisterBitWidthEb 89
_ZNK4llvm11R600TTIImpl26isLegalToVectorizeMemChainEjjj 118
_ZNK4llvm10GCNTTIImpl19areInlineCompatibleEPKNS_8FunctionES3_ 120
_ZNK4llvm11R600TTIImpl20getNumberOfRegistersEb 220
_ZNK4llvm11R600TTIImpl28getHardwareNumberOfRegistersEb 220
_ZN4llvm10GCNTTIImpl22getArithmeticInstrCostEjPNS_4TypeENS_19TargetTransformInfo16OperandValueKindES4_NS3_22OperandValuePropertiesES5_NS_8ArrayRefIPKNS_5ValueEEE 313
_ZN4llvm10GCNTTIImpl14getCFInstrCostEj 314
_ZNK4llvm10GCNTTIImpl28isLegalToVectorizeStoreChainEjjj 434
_ZN4llvm10GCNTTIImpl18getVectorInstrCostEjPNS_4TypeEj 1373
_ZNK4llvm10GCNTTIImpl20getNumberOfRegistersEb 2483
_ZNK4llvm10GCNTTIImpl28getHardwareNumberOfRegistersEb 2483
_ZNK4llvm10GCNTTIImpl20getStoreVectorFactorEjjjPNS_10VectorTypeE 3520
_ZNK4llvm11R600TTIImpl26getLoadStoreVecRegBitWidthEj 3795
_ZNK4llvm10GCNTTIImpl18getTgtMemIntrinsicEPNS_13IntrinsicInstERNS_16MemIntrinsicInfoE 7184
_ZNK4llvm10GCNTTIImpl27isLegalToVectorizeLoadChainEjjj 8264
_ZNK4llvm10GCNTTIImpl26isLegalToVectorizeMemChainEjjj 8698
_ZNK4llvm10GCNTTIImpl19getLoadVectorFactorEjjjPNS_10VectorTypeE 12386
_ZNK4llvm10GCNTTIImpl26getLoadStoreVecRegBitWidthEj 61003
_GLOBAL__sub_I_AMDGPUTargetTransformInfo.cpp 99743
_Z41__static_initialization_and_destruction_0ii 99743
_ZL17isArgPassedInSGPRPKN4llvm8ArgumentE 205348
_ZNK4llvm10GCNTTIImpl15isAlwaysUniformEPKNS_5ValueE 234654
_ZNK4llvm10GCNTTIImpl20isSourceOfDivergenceEPKNS_5ValueE 1325008

Generated by: LCOV version 1.13