LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - GCNIterativeScheduler.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 4 4 100.0 %
Date: 2017-09-14 15:23:50 Functions: 2 2 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===- GCNIterativeScheduler.h - GCN Scheduler ------------------*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #ifndef LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
      11             : #define LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H
      12             : 
      13             : #include "GCNRegPressure.h"
      14             : #include "llvm/ADT/ArrayRef.h"
      15             : #include "llvm/CodeGen/MachineBasicBlock.h"
      16             : #include "llvm/CodeGen/MachineScheduler.h"
      17             : #include "llvm/Support/Allocator.h"
      18             : #include <limits>
      19             : #include <memory>
      20             : #include <vector>
      21             : 
      22             : namespace llvm {
      23             : 
      24             : class MachineInstr;
      25             : class SUnit;
      26             : class raw_ostream;
      27             : 
      28          30 : class GCNIterativeScheduler : public ScheduleDAGMILive {
      29             :   using BaseClass = ScheduleDAGMILive;
      30             : 
      31             : public:
      32             :   enum StrategyKind {
      33             :     SCHEDULE_MINREGONLY,
      34             :     SCHEDULE_MINREGFORCED,
      35             :     SCHEDULE_LEGACYMAXOCCUPANCY
      36             :   };
      37             : 
      38             :   GCNIterativeScheduler(MachineSchedContext *C,
      39             :                         StrategyKind S);
      40             : 
      41             :   void schedule() override;
      42             : 
      43             :   void enterRegion(MachineBasicBlock *BB,
      44             :                    MachineBasicBlock::iterator Begin,
      45             :                    MachineBasicBlock::iterator End,
      46             :                    unsigned RegionInstrs) override;
      47             : 
      48             :   void finalizeSchedule() override;
      49             : 
      50             : protected:
      51             :   using ScheduleRef = ArrayRef<const SUnit *>;
      52             : 
      53           4 :   struct TentativeSchedule {
      54             :     std::vector<MachineInstr *> Schedule;
      55             :     GCNRegPressure MaxPressure;
      56             :   };
      57             : 
      58          12 :   struct Region {
      59             :     // Fields except for BestSchedule are supposed to reflect current IR state
      60             :     // `const` fields are to emphasize they shouldn't change for any schedule.
      61             :     MachineBasicBlock::iterator Begin;
      62             :     // End is either a boundary instruction or end of basic block
      63             :     const MachineBasicBlock::iterator End;
      64             :     const unsigned NumRegionInstrs;
      65             :     GCNRegPressure MaxPressure;
      66             : 
      67             :     // best schedule for the region so far (not scheduled yet)
      68             :     std::unique_ptr<TentativeSchedule> BestSchedule;
      69             :   };
      70             : 
      71             :   SpecificBumpPtrAllocator<Region> Alloc;
      72             :   std::vector<Region*> Regions;
      73             : 
      74             :   MachineSchedContext *Context;
      75             :   const StrategyKind Strategy;
      76             :   mutable GCNUpwardRPTracker UPTracker;
      77             : 
      78             :   class BuildDAG;
      79             :   class OverrideLegacyStrategy;
      80             : 
      81             :   template <typename Range>
      82             :   GCNRegPressure getSchedulePressure(const Region &R,
      83             :                                      Range &&Schedule) const;
      84             : 
      85             :   GCNRegPressure getRegionPressure(MachineBasicBlock::iterator Begin,
      86             :                                    MachineBasicBlock::iterator End) const;
      87             : 
      88             :   GCNRegPressure getRegionPressure(const Region &R) const {
      89           5 :     return getRegionPressure(R.Begin, R.End);
      90             :   }
      91             : 
      92             :   void setBestSchedule(Region &R,
      93             :                        ScheduleRef Schedule,
      94             :                        const GCNRegPressure &MaxRP = GCNRegPressure());
      95             : 
      96             :   void scheduleBest(Region &R);
      97             : 
      98             :   std::vector<MachineInstr*> detachSchedule(ScheduleRef Schedule) const;
      99             : 
     100             :   void sortRegionsByPressure(unsigned TargetOcc);
     101             : 
     102             :   template <typename Range>
     103             :   void scheduleRegion(Region &R, Range &&Schedule,
     104             :                       const GCNRegPressure &MaxRP = GCNRegPressure());
     105             : 
     106             :   unsigned tryMaximizeOccupancy(unsigned TargetOcc =
     107             :                                 std::numeric_limits<unsigned>::max());
     108             : 
     109             :   void scheduleLegacyMaxOccupancy(bool TryMaximizeOccupancy = true);
     110             :   void scheduleMinReg(bool force = false);
     111             : 
     112             :   void printRegions(raw_ostream &OS) const;
     113             :   void printSchedResult(raw_ostream &OS,
     114             :                         const Region *R,
     115             :                         const GCNRegPressure &RP) const;
     116             :   void printSchedRP(raw_ostream &OS,
     117             :                     const GCNRegPressure &Before,
     118             :                     const GCNRegPressure &After) const;
     119             : };
     120             : 
     121             : } // end namespace llvm
     122             : 
     123             : #endif // LLVM_LIB_TARGET_AMDGPU_GCNITERATIVESCHEDULER_H

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