LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU/MCTargetDesc - AMDGPUTargetStreamer.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 2 2 100.0 %
Date: 2018-10-19 05:06:59 Functions: 0 1 0.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- AMDGPUTargetStreamer.h - AMDGPU Target Streamer --------*- C++ -*--===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #ifndef LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUTARGETSTREAMER_H
      11             : #define LLVM_LIB_TARGET_AMDGPU_MCTARGETDESC_AMDGPUTARGETSTREAMER_H
      12             : 
      13             : #include "AMDKernelCodeT.h"
      14             : #include "llvm/MC/MCStreamer.h"
      15             : #include "llvm/MC/MCSubtargetInfo.h"
      16             : #include "llvm/Support/AMDGPUMetadata.h"
      17             : #include "llvm/Support/AMDHSAKernelDescriptor.h"
      18             : 
      19             : namespace llvm {
      20             : #include "AMDGPUPTNote.h"
      21             : 
      22             : class DataLayout;
      23             : class Function;
      24             : class MCELFStreamer;
      25             : class MCSymbol;
      26             : class MDNode;
      27             : class Module;
      28             : class Type;
      29             : 
      30             : class AMDGPUTargetStreamer : public MCTargetStreamer {
      31             : protected:
      32         258 :   MCContext &getContext() const { return Streamer.getContext(); }
      33             : 
      34             : public:
      35        2380 :   AMDGPUTargetStreamer(MCStreamer &S) : MCTargetStreamer(S) {}
      36             : 
      37             :   virtual void EmitDirectiveAMDGCNTarget(StringRef Target) = 0;
      38             : 
      39             :   virtual void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
      40             :                                                  uint32_t Minor) = 0;
      41             : 
      42             :   virtual void EmitDirectiveHSACodeObjectISA(uint32_t Major, uint32_t Minor,
      43             :                                              uint32_t Stepping,
      44             :                                              StringRef VendorName,
      45             :                                              StringRef ArchName) = 0;
      46             : 
      47             :   virtual void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) = 0;
      48             : 
      49             :   virtual void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) = 0;
      50             : 
      51             :   /// \returns True on success, false on failure.
      52             :   virtual bool EmitISAVersion(StringRef IsaVersionString) = 0;
      53             : 
      54             :   /// \returns True on success, false on failure.
      55             :   virtual bool EmitHSAMetadata(StringRef HSAMetadataString);
      56             : 
      57             :   /// \returns True on success, false on failure.
      58             :   virtual bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata) = 0;
      59             : 
      60             :   /// \returns True on success, false on failure.
      61             :   virtual bool EmitPALMetadata(const AMDGPU::PALMD::Metadata &PALMetadata) = 0;
      62             : 
      63             :   virtual void EmitAmdhsaKernelDescriptor(
      64             :       const MCSubtargetInfo &STI, StringRef KernelName,
      65             :       const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
      66             :       uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
      67             :       bool ReserveXNACK) = 0;
      68             : 
      69             :   static StringRef getArchNameFromElfMach(unsigned ElfMach);
      70             :   static unsigned getElfMach(StringRef GPU);
      71             : };
      72             : 
      73             : class AMDGPUTargetAsmStreamer final : public AMDGPUTargetStreamer {
      74             :   formatted_raw_ostream &OS;
      75             : public:
      76             :   AMDGPUTargetAsmStreamer(MCStreamer &S, formatted_raw_ostream &OS);
      77             : 
      78             :   void EmitDirectiveAMDGCNTarget(StringRef Target) override;
      79             : 
      80             :   void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
      81             :                                          uint32_t Minor) override;
      82             : 
      83             :   void EmitDirectiveHSACodeObjectISA(uint32_t Major, uint32_t Minor,
      84             :                                      uint32_t Stepping, StringRef VendorName,
      85             :                                      StringRef ArchName) override;
      86             : 
      87             :   void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) override;
      88             : 
      89             :   void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) override;
      90             : 
      91             :   /// \returns True on success, false on failure.
      92             :   bool EmitISAVersion(StringRef IsaVersionString) override;
      93             : 
      94             :   /// \returns True on success, false on failure.
      95             :   bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata) override;
      96             : 
      97             :   /// \returns True on success, false on failure.
      98             :   bool EmitPALMetadata(const AMDGPU::PALMD::Metadata &PALMetadata) override;
      99             : 
     100             :   void EmitAmdhsaKernelDescriptor(
     101             :       const MCSubtargetInfo &STI, StringRef KernelName,
     102             :       const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
     103             :       uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
     104             :       bool ReserveXNACK) override;
     105             : };
     106             : 
     107             : class AMDGPUTargetELFStreamer final : public AMDGPUTargetStreamer {
     108             :   MCStreamer &Streamer;
     109             : 
     110             :   void EmitAMDGPUNote(const MCExpr *DescSize, unsigned NoteType,
     111             :                       function_ref<void(MCELFStreamer &)> EmitDesc);
     112             : 
     113             : public:
     114             :   AMDGPUTargetELFStreamer(MCStreamer &S, const MCSubtargetInfo &STI);
     115             : 
     116             :   MCELFStreamer &getStreamer();
     117             : 
     118             :   void EmitDirectiveAMDGCNTarget(StringRef Target) override;
     119             : 
     120             :   void EmitDirectiveHSACodeObjectVersion(uint32_t Major,
     121             :                                          uint32_t Minor) override;
     122             : 
     123             :   void EmitDirectiveHSACodeObjectISA(uint32_t Major, uint32_t Minor,
     124             :                                      uint32_t Stepping, StringRef VendorName,
     125             :                                      StringRef ArchName) override;
     126             : 
     127             :   void EmitAMDKernelCodeT(const amd_kernel_code_t &Header) override;
     128             : 
     129             :   void EmitAMDGPUSymbolType(StringRef SymbolName, unsigned Type) override;
     130             : 
     131             :   /// \returns True on success, false on failure.
     132             :   bool EmitISAVersion(StringRef IsaVersionString) override;
     133             : 
     134             :   /// \returns True on success, false on failure.
     135             :   bool EmitHSAMetadata(const AMDGPU::HSAMD::Metadata &HSAMetadata) override;
     136             : 
     137             :   /// \returns True on success, false on failure.
     138             :   bool EmitPALMetadata(const AMDGPU::PALMD::Metadata &PALMetadata) override;
     139             : 
     140             :   void EmitAmdhsaKernelDescriptor(
     141             :       const MCSubtargetInfo &STI, StringRef KernelName,
     142             :       const amdhsa::kernel_descriptor_t &KernelDescriptor, uint64_t NextVGPR,
     143             :       uint64_t NextSGPR, bool ReserveVCC, bool ReserveFlatScr,
     144             :       bool ReserveXNACK) override;
     145             : };
     146             : 
     147             : }
     148             : #endif

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