LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - R600FrameLowering.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 13 13 100.0 %
Date: 2017-09-14 15:23:50 Functions: 1 1 100.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===----------------------- R600FrameLowering.cpp ------------------------===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //==-----------------------------------------------------------------------===//
       9             : 
      10             : #include "R600FrameLowering.h"
      11             : #include "AMDGPUSubtarget.h"
      12             : #include "R600RegisterInfo.h"
      13             : #include "llvm/CodeGen/MachineFrameInfo.h"
      14             : #include "llvm/CodeGen/MachineFunction.h"
      15             : #include "llvm/Support/MathExtras.h"
      16             : 
      17             : using namespace llvm;
      18             : 
      19             : R600FrameLowering::~R600FrameLowering() = default;
      20             : 
      21             : /// \returns The number of registers allocated for \p FI.
      22        2342 : int R600FrameLowering::getFrameIndexReference(const MachineFunction &MF,
      23             :                                               int FI,
      24             :                                               unsigned &FrameReg) const {
      25        2342 :   const MachineFrameInfo &MFI = MF.getFrameInfo();
      26             :   const R600RegisterInfo *RI
      27        4684 :     = MF.getSubtarget<R600Subtarget>().getRegisterInfo();
      28             : 
      29             :   // Fill in FrameReg output argument.
      30        2342 :   FrameReg = RI->getFrameRegister(MF);
      31             : 
      32             :   // Start the offset at 2 so we don't overwrite work group information.
      33             :   // FIXME: We should only do this when the shader actually uses this
      34             :   // information.
      35        2342 :   unsigned OffsetBytes = 2 * (getStackWidth(MF) * 4);
      36        3114 :   int UpperBound = FI == -1 ? MFI.getNumObjects() : FI;
      37             : 
      38       11783 :   for (int i = MFI.getObjectIndexBegin(); i < UpperBound; ++i) {
      39       18882 :     OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlignment(i));
      40        9441 :     OffsetBytes += MFI.getObjectSize(i);
      41             :     // Each register holds 4 bytes, so we must always align the offset to at
      42             :     // least 4 bytes, so that 2 frame objects won't share the same register.
      43       18882 :     OffsetBytes = alignTo(OffsetBytes, 4);
      44             :   }
      45             : 
      46        2342 :   if (FI != -1)
      47        3140 :     OffsetBytes = alignTo(OffsetBytes, MFI.getObjectAlignment(FI));
      48             : 
      49        2342 :   return OffsetBytes / (getStackWidth(MF) * 4);
      50             : }

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