LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - R600InstrInfo.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 670 727 92.2 %
Date: 2017-09-14 15:23:50 Functions: 75 76 98.7 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZNK4llvm13R600InstrInfo19isLegalToSplitMBBAtERNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEE 0
_ZNK4llvm13R600InstrInfo19isProfitableToIfCvtERNS_17MachineBasicBlockEjjS2_jjNS_17BranchProbabilityE 2
_ZNK4llvm13R600InstrInfo25isProfitableToUnpredicateERNS_17MachineBasicBlockES2_ 2
_ZNK4llvm13R600InstrInfo19isProfitableToIfCvtERNS_17MachineBasicBlockEjjNS_17BranchProbabilityE 97
_ZNK4llvm13R600InstrInfo17buildIndirectReadEPNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjjj 103
_ZNK4llvm13R600InstrInfo18buildIndirectWriteEPNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjjj 114
_ZNK4llvm13R600InstrInfo18buildIndirectWriteEPNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjjjj 115
_ZNK4llvm13R600InstrInfo17buildIndirectReadEPNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjjjj 117
_ZNK4llvm13R600InstrInfo28buildSlotOfVectorInstructionERNS_17MachineBasicBlockEPNS_12MachineInstrEjj 128
_ZNK4llvm13R600InstrInfo25isProfitableToDupForIfCvtERNS_17MachineBasicBlockEjNS_17BranchProbabilityE 134
_ZNK4llvm13R600InstrInfo12insertBranchERNS_17MachineBasicBlockEPS1_S3_NS_8ArrayRefINS_14MachineOperandEEERKNS_8DebugLocEPi 223
_ZNK4llvm13R600InstrInfo20PredicateInstructionERNS_12MachineInstrENS_8ArrayRefINS_14MachineOperandEEE 235
_ZN4llvm13R600InstrInfoC2ERKNS_13R600SubtargetE 253
_ZNK4llvm13R600InstrInfo22reverseBranchConditionERNS_15SmallVectorImplINS_14MachineOperandEEE 312
_ZNK4llvm13R600InstrInfo12removeBranchERNS_17MachineBasicBlockEPi 314
_ZL17FindLastAluClauseRN4llvm17MachineBasicBlockE 422
_ZL28findFirstPredicateSetterFromRN4llvm17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEE 422
_ZNK4llvm13R600InstrInfo11buildMovImmERNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjm 469
_ZNK4llvm13R600InstrInfo9clearFlagERNS_12MachineInstrEjj 728
_ZNK4llvm13R600InstrInfo7addFlagERNS_12MachineInstrEjj 826
_ZNK4llvm13R600InstrInfo21getIndirectIndexBeginERKNS_15MachineFunctionE 1544
_ZNK4llvm13R600InstrInfo9getFlagOpERNS_12MachineInstrEjj 1638
_ZNK4llvm13R600InstrInfo23getIndirectAddrRegClassEv 1659
_ZL12getSlotedOpsjj 1792
_ZNK4llvm13R600InstrInfo24calculateIndirectAddressEjj 1966
_ZNK4llvm13R600InstrInfo11copyPhysRegERNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEERKNS_8DebugLocEjjb 1982
_ZNK4llvm13R600InstrInfo25CreateTargetScheduleStateERKNS_19TargetSubtargetInfoE 2057
_ZNK4llvm13R600InstrInfo5isMovEj 2193
_ZNK4llvm13R600InstrInfo13buildMovInstrEPNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjj 2446
_ZNK4llvm13R600InstrInfo16DefinesPredicateERNS_12MachineInstrERSt6vectorINS_14MachineOperandESaIS4_EE 2983
_ZNK4llvm13R600InstrInfo18getPredicationCostERKNS_12MachineInstrE 2983
_ZNK4llvm13R600InstrInfo8isExportEj 3127
_ZNK4llvm13R600InstrInfo19getIndirectIndexEndERKNS_15MachineFunctionE 4114
_ZNK4llvm13R600InstrInfo24reserveIndirectRegistersERNS_9BitVectorERKNS_15MachineFunctionE 4114
_ZNK4llvm13R600InstrInfo18expandPostRAPseudoERNS_12MachineInstrE 6144
_ZNK4llvm13R600InstrInfo13setImmOperandERNS_12MachineInstrEjl 6146
_ZNK4llvm13R600InstrInfo23buildDefaultInstructionERNS_17MachineBasicBlockENS_26MachineInstrBundleIteratorINS_12MachineInstrELb0EEEjjjj 8451
_ZNK4llvm13R600InstrInfo15usesVertexCacheERKNS_12MachineInstrE 8578
_ZL17isConstCompatibleN4llvm13R600InstrInfo11BankSwizzleERKSt6vectorISt4pairIijESaIS4_EEj 9829
_ZNK4llvm13R600InstrInfo13getOperandIdxERKNS_12MachineInstrEj 10625
_ZNK4llvm13R600InstrInfo16usesTextureCacheERKNS_12MachineInstrE 13788
_ZNK4llvm13R600InstrInfo12isVectorOnlyERKNS_12MachineInstrE 21651
_ZNK4llvm13R600InstrInfo12isVectorOnlyEj 21651
_ZNK4llvm13R600InstrInfo13analyzeBranchERNS_17MachineBasicBlockERPS1_S4_RNS_15SmallVectorImplINS_14MachineOperandEEEb 34033
_ZNK4llvm13R600InstrInfo14readsLDSSrcRegERKNS_12MachineInstrE 36354
_ZNK4llvm13R600InstrInfo23fitsReadPortLimitationsERKSt6vectorIPNS_12MachineInstrESaIS3_EERKNS_8DenseMapIjjNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjjEEEERS1_INS0_11BankSwizzleESaISH_EEb 41428
_ZNK4llvm13R600InstrInfo24FindSwizzleForVectorSlotERKSt6vectorIS1_ISt4pairIijESaIS3_EESaIS5_EERS1_INS0_11BankSwizzleESaISA_EERKS5_SA_ 42083
_ZNK4llvm13R600InstrInfo19getMaxAlusPerClauseEv 50355
_ZNK4llvm13R600InstrInfo18canBeConsideredALUERKNS_12MachineInstrE 57489
_ZNK4llvm13R600InstrInfo16usesTextureCacheEj 61006
_ZNK4llvm13R600InstrInfo15usesVertexCacheEj 63042
_ZNK4llvm13R600InstrInfo11ExtractSrcsERNS_12MachineInstrERKNS_8DenseMapIjjNS_12DenseMapInfoIjEENS_6detail12DenseMapPairIjjEEEERj 81664
_ZNK4llvm13R600InstrInfo24fitsConstReadLimitationsERKSt6vectorIPNS_12MachineInstrESaIS3_EE 86517
_ZNK4llvm13R600InstrInfo22definesAddressRegisterERNS_12MachineInstrE 93587
_ZNK4llvm13R600InstrInfo19usesAddressRegisterERNS_12MachineInstrE 93762
_ZNK4llvm13R600InstrInfo24fitsConstReadLimitationsERKSt6vectorIjSaIjEE 95417
_ZNK4llvm13R600InstrInfo18mustBeLastInClauseEj 97255
_ZNK4llvm13R600InstrInfo13isLDSRetInstrEj 105679
_ZNK4llvm13R600InstrInfo12isPredicatedERKNS_12MachineInstrE 121812
_ZNK4llvm13R600InstrInfo17hasInstrModifiersEj 151318
_ZNK4llvm13R600InstrInfo13isReductionOpEj 190167
_ZNK4llvm13R600InstrInfo11isTransOnlyERKNS_12MachineInstrE 210909
_ZNK4llvm13R600InstrInfo11isTransOnlyEj 210909
_ZNK4llvm13R600InstrInfo8isCubeOpEj 210943
_ZNK4llvm13R600InstrInfo10isLDSInstrEj 239699
_ZNK4llvm13R600InstrInfo15getInstrLatencyEPKNS_18InstrItineraryDataERKNS_12MachineInstrEPj 247819
_ZL15getTransSwizzleN4llvm13R600InstrInfo11BankSwizzleEj 263157
_ZNK4llvm13R600InstrInfo8isVectorERKNS_12MachineInstrE 270261
_ZNK4llvm13R600InstrInfo9getSelIdxEjj 313753
_ZNK4llvm13R600InstrInfo7getSrcsERNS_12MachineInstrE 325629
_ZL20NextPossibleSolutionRSt6vectorIN4llvm13R600InstrInfo11BankSwizzleESaIS2_EEj 482677
_ZNK4llvm13R600InstrInfo10isALUInstrEj 517756
_ZNK4llvm13R600InstrInfo11isLegalUpToERKSt6vectorIS1_ISt4pairIijESaIS3_EESaIS5_EERKS1_INS0_11BankSwizzleESaISA_EERKS5_SA_ 523592
_ZL7SwizzleSt6vectorISt4pairIijESaIS1_EEN4llvm13R600InstrInfo11BankSwizzleE 1914988
_ZNK4llvm13R600InstrInfo13getOperandIdxEjj 4077570

Generated by: LCOV version 1.13