LCOV - code coverage report
Current view: top level - lib/Target/AMDGPU - SIISelLowering.cpp (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 3398 3727 91.2 %
Date: 2018-09-23 13:06:45 Functions: 156 172 90.7 %
Legend: Lines: hit not hit

Function Name Sort by function name Hit count Sort by hit count
_ZL22processShaderInputArgsRN4llvm15SmallVectorImplINS_3ISD8InputArgEEEjNS_8ArrayRefIS2_EERNS_9BitVectorEPNS_12FunctionTypeEPNS_21SIMachineFunctionInfoE 0
_ZL23allocateSGPR32InputImplRN4llvm7CCStateEPKNS_19TargetRegisterClassEj 0
_ZL25allocateSpecialInputSGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE 0
_ZL25allocateSpecialInputVGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE 0
_ZL27computeIndirectRegAndOffsetRKN4llvm14SIRegisterInfoEPKNS_19TargetRegisterClassEji 0
_ZL30allocateSpecialEntryInputVGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE 0
_ZNK4llvm16SITargetLowering14isMemOpUniformEPKNS_6SDNodeE 0
_ZNK4llvm16SITargetLowering34createDebuggerPrologueStackObjectsERNS_15MachineFunctionE 4
_ZNK4llvm16SITargetLowering15isFPExtFoldableEjNS_3EVTES1_ 24
_ZNK4llvm16SITargetLowering17getRegisterByNameEPKcNS_3EVTERNS_12SelectionDAGE 27
_ZNK4llvm16SITargetLowering22mayBeEmittedAsTailCallEPKNS_8CallInstE 28
_ZL14loadM0FromVGPRPKN4llvm11SIInstrInfoERNS_17MachineBasicBlockERNS_12MachineInstrEjjibb 32
_ZL22emitLoadM0FromVGPRLoopPKN4llvm11SIInstrInfoERNS_19MachineRegisterInfoERNS_17MachineBasicBlockES6_RKNS_8DebugLocERKNS_14MachineOperandEjjjjibb 32
_ZNK4llvm16SITargetLowering18isShuffleMaskLegalENS_8ArrayRefIiEENS_3EVTE 32
_ZNK4llvm16SITargetLowering33shouldConvertConstantLoadToIntImmERKNS_5APIntEPNS_4TypeE 32
_ZL19allocateVGPR32InputRN4llvm7CCStateE 36
_ZNK4llvm16SITargetLowering17getImplicitArgPtrERNS_12SelectionDAGERKNS_5SDLocE 42
_ZNK4llvm16SITargetLowering33isEligibleForTailCallOptimizationENS_7SDValueEjbRKNS_15SmallVectorImplINS_3ISD9OutputArgEEERKNS2_IS1_EERKNS2_INS3_8InputArgEEERNS_12SelectionDAGE 51
_ZL16getMOVRELDPseudoRKN4llvm14SIRegisterInfoEPKNS_19TargetRegisterClassE 66
_ZL15emitIndirectSrcRN4llvm12MachineInstrERNS_17MachineBasicBlockERKNS_12GCNSubtargetE 71
_ZNK4llvm16SITargetLowering14splitKillBlockERNS_12MachineInstrEPNS_17MachineBasicBlockE 84
_ZL15emitIndirectDstRN4llvm12MachineInstrERNS_17MachineBasicBlockERKNS_12GCNSubtargetE 90
_ZNK4llvm16SITargetLowering20isCheapAddrSpaceCastEjj 94
_ZNK4llvm16SITargetLowering19getOptimalMemOpTypeEmjjbbbRNS_15MachineFunctionE 124
_ZNK4llvm16SITargetLowering22getCanonicalConstantFPERNS_12SelectionDAGERKNS_5SDLocENS_3EVTERKNS_7APFloatE 149
_ZL20setM0ToIndexFromSGPRPKN4llvm11SIInstrInfoERNS_19MachineRegisterInfoERNS_12MachineInstrEibb 161
_ZNK4llvm16SITargetLowering19isNoopAddrSpaceCastEjj 246
_ZL22getConstantPermuteMaskj 318
_ZL20fp16SrcZerosHighBitsj 324
_ZNK4llvm16SITargetLowering19lowerStackParameterERNS_12SelectionDAGERNS_11CCValAssignERKNS_5SDLocENS_7SDValueERKNS_3ISD8InputArgE 402
_ZNK4llvm16SITargetLowering17passSpecialInputsERNS_14TargetLowering16CallLoweringInfoERNS_7CCStateERKNS_21SIMachineFunctionInfoERNS_15SmallVectorImplISt4pairIjNS_7SDValueEEEERNS9_ISB_EESB_ 575
_ZNK4llvm16SITargetLowering17shouldEmitPCRelocEPKNS_11GlobalValueE 588
_ZNK4llvm16SITargetLowering18shouldEmitGOTRelocEPKNS_11GlobalValueE 694
_ZNK4llvm16SITargetLowering23denormalsEnabledForTypeENS_3EVTE 720
_ZNK4llvm16SITargetLowering15shouldEmitFixupEPKNS_11GlobalValueE 1338
_ZNK4llvm16SITargetLowering20isOffsetFoldingLegalEPKNS_19GlobalAddressSDNodeE 1701
_ZNK4llvm16SITargetLowering20insertCopiesSplitCSREPNS_17MachineBasicBlockERKNS_15SmallVectorImplIS2_EE 1748
_ZNK4llvm16SITargetLowering18initializeSplitCSREPNS_17MachineBasicBlockE 1749
_ZNK4llvm16SITargetLowering28getRegForInlineAsmConstraintEPKNS_18TargetRegisterInfoENS_9StringRefENS_3MVTE 2341
_ZN4llvm16SITargetLoweringC2ERKNS_13TargetMachineERKNS_12GCNSubtargetE 2423
_ZNK4llvm16SITargetLowering36getVectorTypeBreakdownForCallingConvERNS_11LLVMContextEjNS_3EVTERS3_RjRNS_3MVTE 3357
_ZNK4llvm16SITargetLowering25enableAggressiveFMAFusionENS_3EVTE 4423
_ZNK4llvm16SITargetLowering31isMemOpHasNoClobberedMemOperandEPKNS_6SDNodeE 4578
_ZNK4llvm16SITargetLowering17getConstraintTypeENS_9StringRefE 7623
_ZNK4llvm16SITargetLowering8copyToM0ERNS_12SelectionDAGENS_7SDValueERKNS_5SDLocES3_ 9089
_ZNK4llvm16SITargetLowering26isFMAFasterThanFMulAndFAddENS_3EVTE 12639
_ZNK4llvm16SITargetLowering17getPreloadedValueERNS_12SelectionDAGERKNS_21SIMachineFunctionInfoENS_3EVTENS_21AMDGPUFunctionArgInfo14PreloadedValueE 13513
_ZNK4llvm16SITargetLowering27EmitInstrWithCustomInserterERNS_12MachineInstrEPNS_17MachineBasicBlockE 14180
_ZNK4llvm16SITargetLowering18getSetCCResultTypeERKNS_10DataLayoutERNS_11LLVMContextENS_3EVTE 14394
_ZNK4llvm16SITargetLowering16canMergeStoresToEjNS_3EVTERKNS_12SelectionDAGE 15564
_ZNK4llvm16SITargetLowering9buildRSRCERNS_12SelectionDAGERKNS_5SDLocENS_7SDValueEjm 17064
_ZL19allocateSystemSGPRsRN4llvm7CCStateERNS_15MachineFunctionERNS_21SIMachineFunctionInfoEjb 17660
_ZL20allocateHSAUserSGPRsRN4llvm7CCStateERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE 17660
_ZL24reservePrivateMemoryRegsRKN4llvm13TargetMachineERNS_15MachineFunctionERKNS_14SIRegisterInfoERNS_21SIMachineFunctionInfoE 17683
_ZNK4llvm16SITargetLowering15supportSplitCSREPNS_15MachineFunctionE 19228
_ZNK4llvm16SITargetLowering16finalizeLoweringERNS_15MachineFunctionE 19445
_ZNK4llvm16SITargetLowering14CanLowerReturnEjRNS_15MachineFunctionEbRKNS_15SmallVectorImplINS_3ISD9OutputArgEEERNS_11LLVMContextE 19996
_ZNK4llvm16SITargetLowering18getTgtMemIntrinsicERNS_18TargetLoweringBase13IntrinsicInfoERKNS_8CallInstERNS_15MachineFunctionEj 24722
_ZNK4llvm16SITargetLowering23hasBitPreservingFPLogicENS_3EVTE 28548
_ZNK4llvm16SITargetLowering20getAddrModeArgumentsEPNS_13IntrinsicInstERNS_15SmallVectorImplIPNS_5ValueEEERPNS_4TypeE 31313
_ZNK4llvm16SITargetLowering24lowerKernArgParameterPtrERNS_12SelectionDAGERKNS_5SDLocENS_7SDValueEm 40646
_ZL14buildSMovImm32RN4llvm12SelectionDAGERKNS_5SDLocEm 41394
_ZNK4llvm16SITargetLowering26isLegalMUBUFAddressingModeERKNS_18TargetLoweringBase8AddrModeE 52697
_ZNK4llvm16SITargetLowering25isLegalFlatAddressingModeERKNS_18TargetLoweringBase8AddrModeE 53775
_ZNK4llvm16SITargetLowering27isLegalGlobalAddressingModeERKNS_18TargetLoweringBase8AddrModeE 110123
_ZNK4llvm16SITargetLowering30allowsMisalignedMemoryAccessesENS_3EVTEjjPb 129064
_ZNK4llvm16SITargetLowering22getScalarShiftAmountTyERKNS_10DataLayoutENS_3EVTE 143448
_ZNK4llvm16SITargetLowering29getNumRegistersForCallingConvERNS_11LLVMContextEjNS_3EVTE 145010
_ZNK4llvm16SITargetLowering29getRegisterTypeForCallingConvERNS_11LLVMContextEjNS_3EVTE 145010
_ZNK4llvm16SITargetLowering24getPreferredVectorActionENS_3EVTE 201135
_ZNK4llvm16SITargetLowering21isLegalAddressingModeERKNS_10DataLayoutERKNS_18TargetLoweringBase8AddrModeEPNS_4TypeEjPNS_11InstructionE 218487
_ZNK4llvm16SITargetLowering20isTypeDesirableForOpEjNS_3EVTE 291866
_ZNK4llvm16SITargetLowering29computeKnownBitsForFrameIndexENS_7SDValueERNS_9KnownBitsERKNS_5APIntERKNS_12SelectionDAGEj 437665
_ZNK4llvm16SITargetLowering12getSubtargetEv 1018544

Generated by: LCOV version 1.13