LCOV - code coverage report
Current view: top level - lib/Target/ARM/MCTargetDesc - ARMAsmBackend.h (source / functions) Hit Total Coverage
Test: llvm-toolchain.info Lines: 4 6 66.7 %
Date: 2018-02-23 15:42:53 Functions: 0 1 0.0 %
Legend: Lines: hit not hit

          Line data    Source code
       1             : //===-- ARMAsmBackend.h - ARM Assembler Backend -----------------*- C++ -*-===//
       2             : //
       3             : //                     The LLVM Compiler Infrastructure
       4             : //
       5             : // This file is distributed under the University of Illinois Open Source
       6             : // License. See LICENSE.TXT for details.
       7             : //
       8             : //===----------------------------------------------------------------------===//
       9             : 
      10             : #ifndef LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
      11             : #define LLVM_LIB_TARGET_ARM_ARMASMBACKEND_H
      12             : 
      13             : #include "MCTargetDesc/ARMFixupKinds.h"
      14             : #include "MCTargetDesc/ARMMCTargetDesc.h"
      15             : #include "llvm/MC/MCAsmBackend.h"
      16             : #include "llvm/MC/MCSubtargetInfo.h"
      17             : #include "llvm/Support/TargetRegistry.h"
      18             : 
      19             : namespace llvm {
      20             : 
      21        3362 : class ARMAsmBackend : public MCAsmBackend {
      22             :   const MCSubtargetInfo &STI;
      23             :   bool isThumbMode;    // Currently emitting Thumb code.
      24             :   bool IsLittleEndian; // Big or little endian.
      25             : public:
      26             :   ARMAsmBackend(const Target &T, const MCSubtargetInfo &STI, bool IsLittle)
      27        3395 :       : MCAsmBackend(), STI(STI),
      28             :         isThumbMode(STI.getTargetTriple().isThumb()),
      29        6790 :         IsLittleEndian(IsLittle) {}
      30             : 
      31           0 :   unsigned getNumFixupKinds() const override {
      32           0 :     return ARM::NumTargetFixupKinds;
      33             :   }
      34             : 
      35             :   bool hasNOP() const { return STI.getFeatureBits()[ARM::HasV6T2Ops]; }
      36             : 
      37             :   const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const override;
      38             : 
      39             :   bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup,
      40             :                              const MCValue &Target) override;
      41             : 
      42             :   unsigned adjustFixupValue(const MCAssembler &Asm, const MCFixup &Fixup,
      43             :                             const MCValue &Target, uint64_t Value,
      44             :                             bool IsResolved, MCContext &Ctx,
      45             :                             bool IsLittleEndian) const;
      46             : 
      47             :   void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
      48             :                   const MCValue &Target, MutableArrayRef<char> Data,
      49             :                   uint64_t Value, bool IsResolved) const override;
      50             : 
      51             :   unsigned getRelaxedOpcode(unsigned Op) const;
      52             : 
      53             :   bool mayNeedRelaxation(const MCInst &Inst) const override;
      54             : 
      55             :   const char *reasonForFixupRelaxation(const MCFixup &Fixup,
      56             :                                        uint64_t Value) const;
      57             : 
      58             :   bool fixupNeedsRelaxation(const MCFixup &Fixup, uint64_t Value,
      59             :                             const MCRelaxableFragment *DF,
      60             :                             const MCAsmLayout &Layout) const override;
      61             : 
      62             :   void relaxInstruction(const MCInst &Inst, const MCSubtargetInfo &STI,
      63             :                         MCInst &Res) const override;
      64             : 
      65             :   bool writeNopData(uint64_t Count, MCObjectWriter *OW) const override;
      66             : 
      67             :   void handleAssemblerFlag(MCAssemblerFlag Flag) override;
      68             : 
      69             :   unsigned getPointerSize() const { return 4; }
      70             :   bool isThumb() const { return isThumbMode; }
      71         663 :   void setIsThumb(bool it) { isThumbMode = it; }
      72             :   bool isLittle() const { return IsLittleEndian; }
      73             : };
      74             : } // end namespace llvm
      75             : 
      76             : #endif

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